1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2017 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean
elf32_arm_write_section (bfd
*output_bfd
,
69 struct bfd_link_info
*link_info
,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1
[] =
80 HOWTO (R_ARM_NONE
, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE
, /* pc_relative */
86 complain_overflow_dont
,/* complain_on_overflow */
87 bfd_elf_generic_reloc
, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE
, /* partial_inplace */
92 FALSE
), /* pcrel_offset */
94 HOWTO (R_ARM_PC24
, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE
, /* pc_relative */
100 complain_overflow_signed
,/* complain_on_overflow */
101 bfd_elf_generic_reloc
, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE
, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE
), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32
, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE
, /* pc_relative */
115 complain_overflow_bitfield
,/* complain_on_overflow */
116 bfd_elf_generic_reloc
, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE
, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE
), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32
, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE
, /* pc_relative */
130 complain_overflow_bitfield
,/* complain_on_overflow */
131 bfd_elf_generic_reloc
, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE
, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE
), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0
, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE
, /* pc_relative */
145 complain_overflow_dont
,/* complain_on_overflow */
146 bfd_elf_generic_reloc
, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE
, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE
), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16
, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE
, /* pc_relative */
160 complain_overflow_bitfield
,/* complain_on_overflow */
161 bfd_elf_generic_reloc
, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE
, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE
), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12
, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE
, /* pc_relative */
175 complain_overflow_bitfield
,/* complain_on_overflow */
176 bfd_elf_generic_reloc
, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE
, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE
), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5
, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE
, /* pc_relative */
189 complain_overflow_bitfield
,/* complain_on_overflow */
190 bfd_elf_generic_reloc
, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE
, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE
), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8
, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE
, /* pc_relative */
204 complain_overflow_bitfield
,/* complain_on_overflow */
205 bfd_elf_generic_reloc
, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE
, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE
), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32
, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE
, /* pc_relative */
218 complain_overflow_dont
,/* complain_on_overflow */
219 bfd_elf_generic_reloc
, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE
, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE
), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL
, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE
, /* pc_relative */
232 complain_overflow_signed
,/* complain_on_overflow */
233 bfd_elf_generic_reloc
, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE
, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE
), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8
, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE
, /* pc_relative */
246 complain_overflow_signed
,/* complain_on_overflow */
247 bfd_elf_generic_reloc
, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE
, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE
), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ
, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE
, /* pc_relative */
260 complain_overflow_signed
,/* complain_on_overflow */
261 bfd_elf_generic_reloc
, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE
, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE
), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC
, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE
, /* pc_relative */
274 complain_overflow_bitfield
,/* complain_on_overflow */
275 bfd_elf_generic_reloc
, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE
, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE
), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8
, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE
, /* pc_relative */
288 complain_overflow_signed
,/* complain_on_overflow */
289 bfd_elf_generic_reloc
, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE
, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE
), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25
, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE
, /* pc_relative */
303 complain_overflow_signed
,/* complain_on_overflow */
304 bfd_elf_generic_reloc
, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE
, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE
), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22
, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE
, /* pc_relative */
318 complain_overflow_signed
,/* complain_on_overflow */
319 bfd_elf_generic_reloc
, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE
, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE
), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32
, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE
, /* pc_relative */
334 complain_overflow_bitfield
,/* complain_on_overflow */
335 bfd_elf_generic_reloc
, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE
, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE
), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32
, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE
, /* pc_relative */
348 complain_overflow_bitfield
,/* complain_on_overflow */
349 bfd_elf_generic_reloc
, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE
, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE
), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32
, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE
, /* pc_relative */
362 complain_overflow_bitfield
,/* complain_on_overflow */
363 bfd_elf_generic_reloc
, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE
, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE
), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY
, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE
, /* pc_relative */
378 complain_overflow_bitfield
,/* complain_on_overflow */
379 bfd_elf_generic_reloc
, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE
, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE
), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT
, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE
, /* pc_relative */
392 complain_overflow_bitfield
,/* complain_on_overflow */
393 bfd_elf_generic_reloc
, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE
, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE
), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT
, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE
, /* pc_relative */
406 complain_overflow_bitfield
,/* complain_on_overflow */
407 bfd_elf_generic_reloc
, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE
, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE
), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE
, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE
, /* pc_relative */
420 complain_overflow_bitfield
,/* complain_on_overflow */
421 bfd_elf_generic_reloc
, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE
, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE
), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32
, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE
, /* pc_relative */
434 complain_overflow_bitfield
,/* complain_on_overflow */
435 bfd_elf_generic_reloc
, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE
, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE
), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC
, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE
, /* pc_relative */
448 complain_overflow_bitfield
,/* complain_on_overflow */
449 bfd_elf_generic_reloc
, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE
, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE
), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32
, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE
, /* pc_relative */
462 complain_overflow_bitfield
,/* complain_on_overflow */
463 bfd_elf_generic_reloc
, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE
, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE
), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32
, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE
, /* pc_relative */
476 complain_overflow_bitfield
,/* complain_on_overflow */
477 bfd_elf_generic_reloc
, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE
, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE
), /* pcrel_offset */
484 HOWTO (R_ARM_CALL
, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE
, /* pc_relative */
490 complain_overflow_signed
,/* complain_on_overflow */
491 bfd_elf_generic_reloc
, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE
, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE
), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24
, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE
, /* pc_relative */
504 complain_overflow_signed
,/* complain_on_overflow */
505 bfd_elf_generic_reloc
, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE
, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE
), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24
, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE
, /* pc_relative */
518 complain_overflow_signed
,/* complain_on_overflow */
519 bfd_elf_generic_reloc
, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE
, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE
), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS
, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE
, /* pc_relative */
532 complain_overflow_dont
,/* complain_on_overflow */
533 bfd_elf_generic_reloc
, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE
, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE
), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0
, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE
, /* pc_relative */
546 complain_overflow_dont
,/* complain_on_overflow */
547 bfd_elf_generic_reloc
, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE
, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE
), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8
, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE
, /* pc_relative */
560 complain_overflow_dont
,/* complain_on_overflow */
561 bfd_elf_generic_reloc
, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE
, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE
), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15
, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE
, /* pc_relative */
574 complain_overflow_dont
,/* complain_on_overflow */
575 bfd_elf_generic_reloc
, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE
, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE
), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0
, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE
, /* pc_relative */
588 complain_overflow_dont
,/* complain_on_overflow */
589 bfd_elf_generic_reloc
, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE
, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE
), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12
, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE
, /* pc_relative */
602 complain_overflow_dont
,/* complain_on_overflow */
603 bfd_elf_generic_reloc
, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE
, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE
), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20
, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE
, /* pc_relative */
616 complain_overflow_dont
,/* complain_on_overflow */
617 bfd_elf_generic_reloc
, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE
, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE
), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1
, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE
, /* pc_relative */
630 complain_overflow_dont
,/* complain_on_overflow */
631 bfd_elf_generic_reloc
, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE
, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE
), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32
, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE
, /* pc_relative */
644 complain_overflow_dont
,/* complain_on_overflow */
645 bfd_elf_generic_reloc
, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE
, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE
), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX
, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE
, /* pc_relative */
658 complain_overflow_dont
,/* complain_on_overflow */
659 bfd_elf_generic_reloc
, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE
, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE
), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2
, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE
, /* pc_relative */
672 complain_overflow_signed
,/* complain_on_overflow */
673 bfd_elf_generic_reloc
, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE
, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE
), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31
, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE
, /* pc_relative */
686 complain_overflow_signed
,/* complain_on_overflow */
687 bfd_elf_generic_reloc
, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE
, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE
), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC
, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE
, /* pc_relative */
700 complain_overflow_dont
,/* complain_on_overflow */
701 bfd_elf_generic_reloc
, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE
, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE
), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS
, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE
, /* pc_relative */
714 complain_overflow_bitfield
,/* complain_on_overflow */
715 bfd_elf_generic_reloc
, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE
, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE
), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC
, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE
, /* pc_relative */
728 complain_overflow_dont
,/* complain_on_overflow */
729 bfd_elf_generic_reloc
, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE
, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE
), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL
, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE
, /* pc_relative */
742 complain_overflow_bitfield
,/* complain_on_overflow */
743 bfd_elf_generic_reloc
, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE
, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE
), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC
, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE
, /* pc_relative */
756 complain_overflow_dont
,/* complain_on_overflow */
757 bfd_elf_generic_reloc
, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE
, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE
), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS
, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE
, /* pc_relative */
770 complain_overflow_bitfield
,/* complain_on_overflow */
771 bfd_elf_generic_reloc
, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE
, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE
), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC
,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE
, /* pc_relative */
784 complain_overflow_dont
,/* complain_on_overflow */
785 bfd_elf_generic_reloc
, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE
, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE
), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL
, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE
, /* pc_relative */
798 complain_overflow_bitfield
,/* complain_on_overflow */
799 bfd_elf_generic_reloc
, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE
, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE
), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19
, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE
, /* pc_relative */
812 complain_overflow_signed
,/* complain_on_overflow */
813 bfd_elf_generic_reloc
, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE
, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE
), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6
, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE
, /* pc_relative */
826 complain_overflow_unsigned
,/* complain_on_overflow */
827 bfd_elf_generic_reloc
, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE
, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE
), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0
,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE
, /* pc_relative */
843 complain_overflow_dont
,/* complain_on_overflow */
844 bfd_elf_generic_reloc
, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE
, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE
), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12
, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE
, /* pc_relative */
857 complain_overflow_dont
,/* complain_on_overflow */
858 bfd_elf_generic_reloc
, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE
, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE
), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI
, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE
, /* pc_relative */
871 complain_overflow_dont
,/* complain_on_overflow */
872 bfd_elf_generic_reloc
, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE
, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE
), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI
, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE
, /* pc_relative */
885 complain_overflow_dont
,/* complain_on_overflow */
886 bfd_elf_generic_reloc
, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE
, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE
), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC
, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE
, /* pc_relative */
901 complain_overflow_dont
,/* complain_on_overflow */
902 bfd_elf_generic_reloc
, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE
, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE
), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0
, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE
, /* pc_relative */
915 complain_overflow_dont
,/* complain_on_overflow */
916 bfd_elf_generic_reloc
, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE
, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE
), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC
, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE
, /* pc_relative */
929 complain_overflow_dont
,/* complain_on_overflow */
930 bfd_elf_generic_reloc
, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE
, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE
), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1
, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE
, /* pc_relative */
943 complain_overflow_dont
,/* complain_on_overflow */
944 bfd_elf_generic_reloc
, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE
, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE
), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2
, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE
, /* pc_relative */
957 complain_overflow_dont
,/* complain_on_overflow */
958 bfd_elf_generic_reloc
, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE
, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE
), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1
, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE
, /* pc_relative */
971 complain_overflow_dont
,/* complain_on_overflow */
972 bfd_elf_generic_reloc
, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE
, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE
), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2
, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE
, /* pc_relative */
985 complain_overflow_dont
,/* complain_on_overflow */
986 bfd_elf_generic_reloc
, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE
, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE
), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0
, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE
, /* pc_relative */
999 complain_overflow_dont
,/* complain_on_overflow */
1000 bfd_elf_generic_reloc
, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE
, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE
), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1
, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE
, /* pc_relative */
1013 complain_overflow_dont
,/* complain_on_overflow */
1014 bfd_elf_generic_reloc
, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE
, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE
), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2
, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE
, /* pc_relative */
1027 complain_overflow_dont
,/* complain_on_overflow */
1028 bfd_elf_generic_reloc
, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE
, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE
), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0
, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE
, /* pc_relative */
1041 complain_overflow_dont
,/* complain_on_overflow */
1042 bfd_elf_generic_reloc
, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE
, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE
), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1
, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE
, /* pc_relative */
1055 complain_overflow_dont
,/* complain_on_overflow */
1056 bfd_elf_generic_reloc
, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE
, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE
), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2
, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE
, /* pc_relative */
1069 complain_overflow_dont
,/* complain_on_overflow */
1070 bfd_elf_generic_reloc
, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE
, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE
), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC
, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE
, /* pc_relative */
1083 complain_overflow_dont
,/* complain_on_overflow */
1084 bfd_elf_generic_reloc
, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE
, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE
), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0
, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE
, /* pc_relative */
1097 complain_overflow_dont
,/* complain_on_overflow */
1098 bfd_elf_generic_reloc
, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE
, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE
), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC
, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE
, /* pc_relative */
1111 complain_overflow_dont
,/* complain_on_overflow */
1112 bfd_elf_generic_reloc
, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE
, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE
), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1
, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE
, /* pc_relative */
1125 complain_overflow_dont
,/* complain_on_overflow */
1126 bfd_elf_generic_reloc
, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE
, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE
), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2
, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE
, /* pc_relative */
1139 complain_overflow_dont
,/* complain_on_overflow */
1140 bfd_elf_generic_reloc
, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE
, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE
), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0
, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE
, /* pc_relative */
1153 complain_overflow_dont
,/* complain_on_overflow */
1154 bfd_elf_generic_reloc
, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE
, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE
), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1
, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE
, /* pc_relative */
1167 complain_overflow_dont
,/* complain_on_overflow */
1168 bfd_elf_generic_reloc
, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE
, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE
), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2
, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE
, /* pc_relative */
1181 complain_overflow_dont
,/* complain_on_overflow */
1182 bfd_elf_generic_reloc
, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE
, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE
), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0
, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE
, /* pc_relative */
1195 complain_overflow_dont
,/* complain_on_overflow */
1196 bfd_elf_generic_reloc
, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE
, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE
), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1
, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE
, /* pc_relative */
1209 complain_overflow_dont
,/* complain_on_overflow */
1210 bfd_elf_generic_reloc
, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE
, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE
), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2
, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE
, /* pc_relative */
1223 complain_overflow_dont
,/* complain_on_overflow */
1224 bfd_elf_generic_reloc
, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE
, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE
), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0
, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE
, /* pc_relative */
1237 complain_overflow_dont
,/* complain_on_overflow */
1238 bfd_elf_generic_reloc
, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE
, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE
), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1
, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE
, /* pc_relative */
1251 complain_overflow_dont
,/* complain_on_overflow */
1252 bfd_elf_generic_reloc
, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE
, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE
), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2
, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE
, /* pc_relative */
1265 complain_overflow_dont
,/* complain_on_overflow */
1266 bfd_elf_generic_reloc
, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE
, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE
), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC
, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE
, /* pc_relative */
1281 complain_overflow_dont
,/* complain_on_overflow */
1282 bfd_elf_generic_reloc
, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE
, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE
), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL
, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE
, /* pc_relative */
1295 complain_overflow_bitfield
,/* complain_on_overflow */
1296 bfd_elf_generic_reloc
, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE
, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE
), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL
, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE
, /* pc_relative */
1309 complain_overflow_dont
,/* complain_on_overflow */
1310 bfd_elf_generic_reloc
, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE
, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE
), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC
,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE
, /* pc_relative */
1323 complain_overflow_dont
,/* complain_on_overflow */
1324 bfd_elf_generic_reloc
, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE
, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE
), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL
, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE
, /* pc_relative */
1337 complain_overflow_bitfield
,/* complain_on_overflow */
1338 bfd_elf_generic_reloc
, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE
, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE
), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL
, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE
, /* pc_relative */
1351 complain_overflow_dont
,/* complain_on_overflow */
1352 bfd_elf_generic_reloc
, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE
, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE
), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC
, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE
, /* pc_relative */
1365 complain_overflow_bitfield
,/* complain_on_overflow */
1366 NULL
, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE
, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE
), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL
, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE
, /* pc_relative */
1379 complain_overflow_dont
,/* complain_on_overflow */
1380 bfd_elf_generic_reloc
, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE
, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE
), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ
, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE
, /* pc_relative */
1393 complain_overflow_bitfield
,/* complain_on_overflow */
1394 bfd_elf_generic_reloc
, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE
, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE
), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL
, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE
, /* pc_relative */
1407 complain_overflow_dont
,/* complain_on_overflow */
1408 bfd_elf_generic_reloc
, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE
, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE
), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS
, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE
, /* pc_relative */
1421 complain_overflow_dont
,/* complain_on_overflow */
1422 bfd_elf_generic_reloc
, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE
, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE
), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS
, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE
, /* pc_relative */
1435 complain_overflow_dont
,/* complain_on_overflow */
1436 bfd_elf_generic_reloc
, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE
, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE
), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL
, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE
, /* pc_relative */
1449 complain_overflow_dont
, /* complain_on_overflow */
1450 bfd_elf_generic_reloc
, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE
, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE
), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12
, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE
, /* pc_relative */
1463 complain_overflow_bitfield
,/* complain_on_overflow */
1464 bfd_elf_generic_reloc
, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE
, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE
), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12
, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE
, /* pc_relative */
1477 complain_overflow_bitfield
,/* complain_on_overflow */
1478 bfd_elf_generic_reloc
, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE
, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE
), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX
), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY
, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE
, /* pc_relative */
1494 complain_overflow_dont
, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn
, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE
, /* partial_inplace */
1500 FALSE
), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT
, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE
, /* pc_relative */
1509 complain_overflow_dont
, /* complain_on_overflow */
1510 NULL
, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE
, /* partial_inplace */
1515 FALSE
), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11
, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE
, /* pc_relative */
1523 complain_overflow_signed
, /* complain_on_overflow */
1524 bfd_elf_generic_reloc
, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE
, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE
), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8
, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE
, /* pc_relative */
1537 complain_overflow_signed
, /* complain_on_overflow */
1538 bfd_elf_generic_reloc
, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE
, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE
), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32
, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE
, /* pc_relative */
1552 complain_overflow_bitfield
,/* complain_on_overflow */
1553 NULL
, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE
, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE
), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32
, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE
, /* pc_relative */
1566 complain_overflow_bitfield
,/* complain_on_overflow */
1567 bfd_elf_generic_reloc
, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE
, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE
), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32
, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE
, /* pc_relative */
1580 complain_overflow_bitfield
,/* complain_on_overflow */
1581 bfd_elf_generic_reloc
, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE
, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE
), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32
, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE
, /* pc_relative */
1594 complain_overflow_bitfield
,/* complain_on_overflow */
1595 NULL
, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE
, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE
), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32
, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE
, /* pc_relative */
1608 complain_overflow_bitfield
,/* complain_on_overflow */
1609 NULL
, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE
, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE
), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12
, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE
, /* pc_relative */
1622 complain_overflow_bitfield
,/* complain_on_overflow */
1623 bfd_elf_generic_reloc
, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE
, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE
), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12
, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE
, /* pc_relative */
1636 complain_overflow_bitfield
,/* complain_on_overflow */
1637 bfd_elf_generic_reloc
, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE
, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE
), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP
, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE
, /* pc_relative */
1650 complain_overflow_bitfield
,/* complain_on_overflow */
1651 bfd_elf_generic_reloc
, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE
, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE
), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ
, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE
, /* pc_relative */
1685 complain_overflow_bitfield
,/* complain_on_overflow */
1686 bfd_elf_generic_reloc
, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE
, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE
), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC
,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE
, /* pc_relative. */
1700 complain_overflow_bitfield
,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc
, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE
, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE
), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC
,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE
, /* pc_relative. */
1713 complain_overflow_bitfield
,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc
, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE
, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE
), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC
,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE
, /* pc_relative. */
1726 complain_overflow_bitfield
,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc
, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE
, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE
), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC
,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE
, /* pc_relative. */
1739 complain_overflow_bitfield
,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc
, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE
, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE
), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2
[1] =
1751 HOWTO (R_ARM_IRELATIVE
, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE
, /* pc_relative */
1757 complain_overflow_bitfield
,/* complain_on_overflow */
1758 bfd_elf_generic_reloc
, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE
, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE
) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3
[4] =
1769 HOWTO (R_ARM_RREL32
, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE
, /* pc_relative */
1775 complain_overflow_dont
,/* complain_on_overflow */
1776 bfd_elf_generic_reloc
, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE
, /* partial_inplace */
1781 FALSE
), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32
, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE
, /* pc_relative */
1789 complain_overflow_dont
,/* complain_on_overflow */
1790 bfd_elf_generic_reloc
, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE
, /* partial_inplace */
1795 FALSE
), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24
, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE
, /* pc_relative */
1803 complain_overflow_dont
,/* complain_on_overflow */
1804 bfd_elf_generic_reloc
, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE
, /* partial_inplace */
1809 FALSE
), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE
, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE
, /* pc_relative */
1817 complain_overflow_dont
,/* complain_on_overflow */
1818 bfd_elf_generic_reloc
, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE
, /* partial_inplace */
1823 FALSE
) /* pcrel_offset */
1826 static reloc_howto_type
*
1827 elf32_arm_howto_from_type (unsigned int r_type
)
1829 if (r_type
< ARRAY_SIZE (elf32_arm_howto_table_1
))
1830 return &elf32_arm_howto_table_1
[r_type
];
1832 if (r_type
== R_ARM_IRELATIVE
)
1833 return &elf32_arm_howto_table_2
[r_type
- R_ARM_IRELATIVE
];
1835 if (r_type
>= R_ARM_RREL32
1836 && r_type
< R_ARM_RREL32
+ ARRAY_SIZE (elf32_arm_howto_table_3
))
1837 return &elf32_arm_howto_table_3
[r_type
- R_ARM_RREL32
];
1843 elf32_arm_info_to_howto (bfd
* abfd ATTRIBUTE_UNUSED
, arelent
* bfd_reloc
,
1844 Elf_Internal_Rela
* elf_reloc
)
1846 unsigned int r_type
;
1848 r_type
= ELF32_R_TYPE (elf_reloc
->r_info
);
1849 bfd_reloc
->howto
= elf32_arm_howto_from_type (r_type
);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val
;
1855 unsigned char elf_reloc_val
;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map
[] =
1861 {BFD_RELOC_NONE
, R_ARM_NONE
},
1862 {BFD_RELOC_ARM_PCREL_BRANCH
, R_ARM_PC24
},
1863 {BFD_RELOC_ARM_PCREL_CALL
, R_ARM_CALL
},
1864 {BFD_RELOC_ARM_PCREL_JUMP
, R_ARM_JUMP24
},
1865 {BFD_RELOC_ARM_PCREL_BLX
, R_ARM_XPC25
},
1866 {BFD_RELOC_THUMB_PCREL_BLX
, R_ARM_THM_XPC22
},
1867 {BFD_RELOC_32
, R_ARM_ABS32
},
1868 {BFD_RELOC_32_PCREL
, R_ARM_REL32
},
1869 {BFD_RELOC_8
, R_ARM_ABS8
},
1870 {BFD_RELOC_16
, R_ARM_ABS16
},
1871 {BFD_RELOC_ARM_OFFSET_IMM
, R_ARM_ABS12
},
1872 {BFD_RELOC_ARM_THUMB_OFFSET
, R_ARM_THM_ABS5
},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25
, R_ARM_THM_JUMP24
},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23
, R_ARM_THM_CALL
},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12
, R_ARM_THM_JUMP11
},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20
, R_ARM_THM_JUMP19
},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9
, R_ARM_THM_JUMP8
},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7
, R_ARM_THM_JUMP6
},
1879 {BFD_RELOC_ARM_GLOB_DAT
, R_ARM_GLOB_DAT
},
1880 {BFD_RELOC_ARM_JUMP_SLOT
, R_ARM_JUMP_SLOT
},
1881 {BFD_RELOC_ARM_RELATIVE
, R_ARM_RELATIVE
},
1882 {BFD_RELOC_ARM_GOTOFF
, R_ARM_GOTOFF32
},
1883 {BFD_RELOC_ARM_GOTPC
, R_ARM_GOTPC
},
1884 {BFD_RELOC_ARM_GOT_PREL
, R_ARM_GOT_PREL
},
1885 {BFD_RELOC_ARM_GOT32
, R_ARM_GOT32
},
1886 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1887 {BFD_RELOC_ARM_TARGET1
, R_ARM_TARGET1
},
1888 {BFD_RELOC_ARM_ROSEGREL32
, R_ARM_ROSEGREL32
},
1889 {BFD_RELOC_ARM_SBREL32
, R_ARM_SBREL32
},
1890 {BFD_RELOC_ARM_PREL31
, R_ARM_PREL31
},
1891 {BFD_RELOC_ARM_TARGET2
, R_ARM_TARGET2
},
1892 {BFD_RELOC_ARM_PLT32
, R_ARM_PLT32
},
1893 {BFD_RELOC_ARM_TLS_GOTDESC
, R_ARM_TLS_GOTDESC
},
1894 {BFD_RELOC_ARM_TLS_CALL
, R_ARM_TLS_CALL
},
1895 {BFD_RELOC_ARM_THM_TLS_CALL
, R_ARM_THM_TLS_CALL
},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ
, R_ARM_TLS_DESCSEQ
},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ
, R_ARM_THM_TLS_DESCSEQ
},
1898 {BFD_RELOC_ARM_TLS_DESC
, R_ARM_TLS_DESC
},
1899 {BFD_RELOC_ARM_TLS_GD32
, R_ARM_TLS_GD32
},
1900 {BFD_RELOC_ARM_TLS_LDO32
, R_ARM_TLS_LDO32
},
1901 {BFD_RELOC_ARM_TLS_LDM32
, R_ARM_TLS_LDM32
},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32
, R_ARM_TLS_DTPMOD32
},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32
, R_ARM_TLS_DTPOFF32
},
1904 {BFD_RELOC_ARM_TLS_TPOFF32
, R_ARM_TLS_TPOFF32
},
1905 {BFD_RELOC_ARM_TLS_IE32
, R_ARM_TLS_IE32
},
1906 {BFD_RELOC_ARM_TLS_LE32
, R_ARM_TLS_LE32
},
1907 {BFD_RELOC_ARM_IRELATIVE
, R_ARM_IRELATIVE
},
1908 {BFD_RELOC_VTABLE_INHERIT
, R_ARM_GNU_VTINHERIT
},
1909 {BFD_RELOC_VTABLE_ENTRY
, R_ARM_GNU_VTENTRY
},
1910 {BFD_RELOC_ARM_MOVW
, R_ARM_MOVW_ABS_NC
},
1911 {BFD_RELOC_ARM_MOVT
, R_ARM_MOVT_ABS
},
1912 {BFD_RELOC_ARM_MOVW_PCREL
, R_ARM_MOVW_PREL_NC
},
1913 {BFD_RELOC_ARM_MOVT_PCREL
, R_ARM_MOVT_PREL
},
1914 {BFD_RELOC_ARM_THUMB_MOVW
, R_ARM_THM_MOVW_ABS_NC
},
1915 {BFD_RELOC_ARM_THUMB_MOVT
, R_ARM_THM_MOVT_ABS
},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL
, R_ARM_THM_MOVW_PREL_NC
},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL
, R_ARM_THM_MOVT_PREL
},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC
, R_ARM_ALU_PC_G0_NC
},
1919 {BFD_RELOC_ARM_ALU_PC_G0
, R_ARM_ALU_PC_G0
},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC
, R_ARM_ALU_PC_G1_NC
},
1921 {BFD_RELOC_ARM_ALU_PC_G1
, R_ARM_ALU_PC_G1
},
1922 {BFD_RELOC_ARM_ALU_PC_G2
, R_ARM_ALU_PC_G2
},
1923 {BFD_RELOC_ARM_LDR_PC_G0
, R_ARM_LDR_PC_G0
},
1924 {BFD_RELOC_ARM_LDR_PC_G1
, R_ARM_LDR_PC_G1
},
1925 {BFD_RELOC_ARM_LDR_PC_G2
, R_ARM_LDR_PC_G2
},
1926 {BFD_RELOC_ARM_LDRS_PC_G0
, R_ARM_LDRS_PC_G0
},
1927 {BFD_RELOC_ARM_LDRS_PC_G1
, R_ARM_LDRS_PC_G1
},
1928 {BFD_RELOC_ARM_LDRS_PC_G2
, R_ARM_LDRS_PC_G2
},
1929 {BFD_RELOC_ARM_LDC_PC_G0
, R_ARM_LDC_PC_G0
},
1930 {BFD_RELOC_ARM_LDC_PC_G1
, R_ARM_LDC_PC_G1
},
1931 {BFD_RELOC_ARM_LDC_PC_G2
, R_ARM_LDC_PC_G2
},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC
, R_ARM_ALU_SB_G0_NC
},
1933 {BFD_RELOC_ARM_ALU_SB_G0
, R_ARM_ALU_SB_G0
},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC
, R_ARM_ALU_SB_G1_NC
},
1935 {BFD_RELOC_ARM_ALU_SB_G1
, R_ARM_ALU_SB_G1
},
1936 {BFD_RELOC_ARM_ALU_SB_G2
, R_ARM_ALU_SB_G2
},
1937 {BFD_RELOC_ARM_LDR_SB_G0
, R_ARM_LDR_SB_G0
},
1938 {BFD_RELOC_ARM_LDR_SB_G1
, R_ARM_LDR_SB_G1
},
1939 {BFD_RELOC_ARM_LDR_SB_G2
, R_ARM_LDR_SB_G2
},
1940 {BFD_RELOC_ARM_LDRS_SB_G0
, R_ARM_LDRS_SB_G0
},
1941 {BFD_RELOC_ARM_LDRS_SB_G1
, R_ARM_LDRS_SB_G1
},
1942 {BFD_RELOC_ARM_LDRS_SB_G2
, R_ARM_LDRS_SB_G2
},
1943 {BFD_RELOC_ARM_LDC_SB_G0
, R_ARM_LDC_SB_G0
},
1944 {BFD_RELOC_ARM_LDC_SB_G1
, R_ARM_LDC_SB_G1
},
1945 {BFD_RELOC_ARM_LDC_SB_G2
, R_ARM_LDC_SB_G2
},
1946 {BFD_RELOC_ARM_V4BX
, R_ARM_V4BX
},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
, R_ARM_THM_ALU_ABS_G3_NC
},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
, R_ARM_THM_ALU_ABS_G2_NC
},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
, R_ARM_THM_ALU_ABS_G1_NC
},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
, R_ARM_THM_ALU_ABS_G0_NC
}
1953 static reloc_howto_type
*
1954 elf32_arm_reloc_type_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1955 bfd_reloc_code_real_type code
)
1959 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_reloc_map
); i
++)
1960 if (elf32_arm_reloc_map
[i
].bfd_reloc_val
== code
)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map
[i
].elf_reloc_val
);
1966 static reloc_howto_type
*
1967 elf32_arm_reloc_name_lookup (bfd
*abfd ATTRIBUTE_UNUSED
,
1972 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_1
); i
++)
1973 if (elf32_arm_howto_table_1
[i
].name
!= NULL
1974 && strcasecmp (elf32_arm_howto_table_1
[i
].name
, r_name
) == 0)
1975 return &elf32_arm_howto_table_1
[i
];
1977 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_2
); i
++)
1978 if (elf32_arm_howto_table_2
[i
].name
!= NULL
1979 && strcasecmp (elf32_arm_howto_table_2
[i
].name
, r_name
) == 0)
1980 return &elf32_arm_howto_table_2
[i
];
1982 for (i
= 0; i
< ARRAY_SIZE (elf32_arm_howto_table_3
); i
++)
1983 if (elf32_arm_howto_table_3
[i
].name
!= NULL
1984 && strcasecmp (elf32_arm_howto_table_3
[i
].name
, r_name
) == 0)
1985 return &elf32_arm_howto_table_3
[i
];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd
*abfd
, Elf_Internal_Note
*note
)
1998 switch (note
->descsz
)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd
)->core
->signal
= bfd_get_16 (abfd
, note
->descdata
+ 12);
2008 elf_tdata (abfd
)->core
->lwpid
= bfd_get_32 (abfd
, note
->descdata
+ 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd
, ".reg",
2019 size
, note
->descpos
+ offset
);
2023 elf32_arm_nabi_grok_psinfo (bfd
*abfd
, Elf_Internal_Note
*note
)
2025 switch (note
->descsz
)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd
)->core
->pid
2032 = bfd_get_32 (abfd
, note
->descdata
+ 12);
2033 elf_tdata (abfd
)->core
->program
2034 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 28, 16);
2035 elf_tdata (abfd
)->core
->command
2036 = _bfd_elfcore_strndup (abfd
, note
->descdata
+ 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command
= elf_tdata (abfd
)->core
->command
;
2044 int n
= strlen (command
);
2046 if (0 < n
&& command
[n
- 1] == ' ')
2047 command
[n
- 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd
*abfd
, char *buf
, int *bufsiz
,
2067 va_start (ap
, note_type
);
2068 memset (data
, 0, sizeof (data
));
2069 strncpy (data
+ 28, va_arg (ap
, const char *), 16);
2070 strncpy (data
+ 44, va_arg (ap
, const char *), 80);
2073 return elfcore_write_note (abfd
, buf
, bufsiz
,
2074 "CORE", note_type
, data
, sizeof (data
));
2085 va_start (ap
, note_type
);
2086 memset (data
, 0, sizeof (data
));
2087 pid
= va_arg (ap
, long);
2088 bfd_put_32 (abfd
, pid
, data
+ 24);
2089 cursig
= va_arg (ap
, int);
2090 bfd_put_16 (abfd
, cursig
, data
+ 12);
2091 greg
= va_arg (ap
, const void *);
2092 memcpy (data
+ 72, greg
, 72);
2095 return elfcore_write_note (abfd
, buf
, bufsiz
,
2096 "CORE", note_type
, data
, sizeof (data
));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32
;
2111 typedef unsigned short int insn16
;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 #define CMSE_PREFIX "__acle_se_"
2143 /* The name of the dynamic interpreter. This is put in the .interp
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2147 static const unsigned long tls_trampoline
[] =
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2154 static const unsigned long dl_tlsdesc_lazy_trampoline
[] =
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2167 #ifdef FOUR_WORD_PLT
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2173 static const bfd_vma elf32_arm_plt0_entry
[] =
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2181 /* Subsequent entries in a procedure linkage table look like
2183 static const bfd_vma elf32_arm_plt_entry
[] =
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2191 #else /* not FOUR_WORD_PLT */
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2197 static const bfd_vma elf32_arm_plt0_entry
[] =
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short
[] =
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long
[] =
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2225 static bfd_boolean elf32_arm_use_long_plt_entry
= FALSE
;
2227 #endif /* not FOUR_WORD_PLT */
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry
[] =
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2245 static const bfd_vma elf32_thumb2_plt_entry
[] =
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry
[] =
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry
[] =
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry
[] =
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub
[] =
2296 /* The entries in a PLT when using a DLL-based target with multiple
2298 static const bfd_vma elf32_arm_symbian_plt_entry
[] =
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2308 static const bfd_vma elf32_arm_nacl_plt0_entry
[] =
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry
[] =
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2375 enum stub_insn_type type
;
2376 unsigned int r_type
;
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any
[] =
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only
[] =
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only
[] =
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(x) */
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure
[] =
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic
[] =
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic
[] =
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic
[] =
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32
, 4), /* dcd R_ARM_REL32(X) */
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32
, 0), /* dcd R_ARM_REL32(X) */
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic
[] =
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X-4) */
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic
[] =
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32
, -4), /* dcd R_ARM_REL32(X) */
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl
[] =
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32
, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic
[] =
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32
, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE
, 0), /* .word 0 */
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only
[] =
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2574 /* Cortex-A8 erratum-workaround stubs. */
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond
[] =
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2586 /* Stub used for b.w and bl.w instructions. */
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b
[] =
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl
[] =
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx
[] =
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2616 const char * stubborn_problems[] = { "np" };
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2621 .data.rel.local.stubborn_problems
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2632 #define STUB_SUFFIX ".__stub"
2634 /* One entry per long/short branch stub defined above. */
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm
= arm_stub_a8_veneer_b_cond
;
2674 const insn_sequence
* template_sequence
;
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions
[] =
2685 struct elf32_arm_stub_hash_entry
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root
;
2690 /* The stub section. */
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset
;
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value
;
2699 asection
*target_section
;
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2706 bfd_vma source_value
;
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn
;
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type
;
2714 /* Its encoding size in bytes. */
2717 const insn_sequence
*stub_template
;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size
;
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry
*h
;
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type
;
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2737 /* Used to build a map of a section. This is required for mixed-endian
2740 typedef struct elf32_elf_section_map
2745 elf32_arm_section_map
;
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
,
2753 VFP11_ERRATUM_ARM_VENEER
,
2754 VFP11_ERRATUM_THUMB_VENEER
2756 elf32_vfp11_erratum_type
;
2758 typedef struct elf32_vfp11_erratum_list
2760 struct elf32_vfp11_erratum_list
*next
;
2766 struct elf32_vfp11_erratum_list
*veneer
;
2767 unsigned int vfp_insn
;
2771 struct elf32_vfp11_erratum_list
*branch
;
2775 elf32_vfp11_erratum_type type
;
2777 elf32_vfp11_erratum_list
;
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
,
2784 STM32L4XX_ERRATUM_VENEER
2786 elf32_stm32l4xx_erratum_type
;
2788 typedef struct elf32_stm32l4xx_erratum_list
2790 struct elf32_stm32l4xx_erratum_list
*next
;
2796 struct elf32_stm32l4xx_erratum_list
*veneer
;
2801 struct elf32_stm32l4xx_erratum_list
*branch
;
2805 elf32_stm32l4xx_erratum_type type
;
2807 elf32_stm32l4xx_erratum_list
;
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2814 arm_unwind_edit_type
;
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2819 arm_unwind_edit_type type
;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection
*linked_section
;
2825 struct arm_unwind_table_edit
*next
;
2827 arm_unwind_table_edit
;
2829 typedef struct _arm_elf_section_data
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf
;
2833 unsigned int mapcount
;
2834 unsigned int mapsize
;
2835 elf32_arm_section_map
*map
;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount
;
2838 elf32_vfp11_erratum_list
*erratumlist
;
2839 unsigned int stm32l4xx_erratumcount
;
2840 elf32_stm32l4xx_erratum_list
*stm32l4xx_erratumlist
;
2841 unsigned int additional_reloc_count
;
2842 /* Information about unwind tables. */
2845 /* Unwind info attached to a text section. */
2848 asection
*arm_exidx_sec
;
2851 /* Unwind info attached to an .ARM.exidx section. */
2854 arm_unwind_table_edit
*unwind_edit_list
;
2855 arm_unwind_table_edit
*unwind_edit_tail
;
2859 _arm_elf_section_data
;
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2870 struct a8_erratum_fix
2875 bfd_vma target_offset
;
2876 unsigned long orig_insn
;
2878 enum elf32_arm_stub_type stub_type
;
2879 enum arm_st_branch_type branch_type
;
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2885 struct a8_erratum_reloc
2888 bfd_vma destination
;
2889 struct elf32_arm_link_hash_entry
*hash
;
2890 const char *sym_name
;
2891 unsigned int r_type
;
2892 enum arm_st_branch_type branch_type
;
2893 bfd_boolean non_a8_stub
;
2896 /* The size of the thread control block. */
2899 /* ARM-specific information about a PLT entry, over and above the usual
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount
;
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount
;
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount
;
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset
;
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root
;
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm
;
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs
*dyn_relocs
;
2939 struct elf_arm_obj_tdata
2941 struct elf_obj_tdata root
;
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type
;
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma
*local_tlsdesc_gotent
;
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info
**local_iplt
;
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning
;
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning
;
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2977 elf32_arm_mkobject (bfd
*abfd
)
2979 return bfd_elf_allocate_object (abfd
, sizeof (struct elf_arm_obj_tdata
),
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2988 struct elf_link_hash_entry root
;
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs
*dyn_relocs
;
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt
;
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type
: 8;
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt
: 1;
3007 unsigned int unused
: 23;
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got
;
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry
*export_glue
;
3017 /* A pointer to the most recently used stub hash entry against this
3019 struct elf32_arm_stub_hash_entry
*stub_cache
;
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3042 /* This is the section to which stubs in the group will be
3045 /* The stub section. */
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3055 /* The main hash table. */
3056 struct elf_link_hash_table root
;
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size
;
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size
;
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size
;
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset
[15];
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3073 bfd_size_type vfp11_erratum_glue_size
;
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3077 bfd_size_type stm32l4xx_erratum_glue_size
;
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix
*a8_erratum_fixes
;
3083 unsigned int num_a8_erratum_fixes
;
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd
* bfd_of_glue_owner
;
3088 /* Nonzero to output a BE8 image. */
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix
;
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes
;
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix
;
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes
;
3126 /* Nonzero to force PIC branch veneers. */
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size
;
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size
;
3135 /* True if the target system is VxWorks. */
3138 /* True if the target system is Symbian OS. */
3141 /* True if the target system is Native Client. */
3144 /* True if the target uses REL relocations. */
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index
;
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc
;
3161 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3164 /* The offset into splt of the PLT entry for the TLS descriptor
3165 resolver. Special values are 0, if not necessary (or not found
3166 to be necessary yet), and -1 if needed but not determined
3168 bfd_vma dt_tlsdesc_plt
;
3170 /* The offset into sgot of the GOT entry used by the PLT entry
3172 bfd_vma dt_tlsdesc_got
;
3174 /* Offset in .plt section of tls_arm_trampoline. */
3175 bfd_vma tls_trampoline
;
3177 /* Data for R_ARM_TLS_LDM32 relocations. */
3180 bfd_signed_vma refcount
;
3184 /* Small local sym cache. */
3185 struct sym_cache sym_cache
;
3187 /* For convenience in allocate_dynrelocs. */
3190 /* The amount of space used by the reserved portion of the sgotplt
3191 section, plus whatever space is used by the jump slots. */
3192 bfd_vma sgotplt_jump_table_size
;
3194 /* The stub hash table. */
3195 struct bfd_hash_table stub_hash_table
;
3197 /* Linker stub bfd. */
3200 /* Linker call-backs. */
3201 asection
* (*add_stub_section
) (const char *, asection
*, asection
*,
3203 void (*layout_sections_again
) (void);
3205 /* Array to keep track of which stub sections have been created, and
3206 information on stub grouping. */
3207 struct map_stub
*stub_group
;
3209 /* Input stub section holding secure gateway veneers. */
3210 asection
*cmse_stub_sec
;
3212 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3213 start to be allocated. */
3214 bfd_vma new_cmse_stub_offset
;
3216 /* Number of elements in stub_group. */
3217 unsigned int top_id
;
3219 /* Assorted information used by elf32_arm_size_stubs. */
3220 unsigned int bfd_count
;
3221 unsigned int top_index
;
3222 asection
**input_list
;
3226 ctz (unsigned int mask
)
3228 #if GCC_VERSION >= 3004
3229 return __builtin_ctz (mask
);
3233 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3244 elf32_arm_popcount (unsigned int mask
)
3246 #if GCC_VERSION >= 3004
3247 return __builtin_popcount (mask
);
3252 for (i
= 0; i
< 8 * sizeof (mask
); i
++)
3262 /* Create an entry in an ARM ELF linker hash table. */
3264 static struct bfd_hash_entry
*
3265 elf32_arm_link_hash_newfunc (struct bfd_hash_entry
* entry
,
3266 struct bfd_hash_table
* table
,
3267 const char * string
)
3269 struct elf32_arm_link_hash_entry
* ret
=
3270 (struct elf32_arm_link_hash_entry
*) entry
;
3272 /* Allocate the structure if it has not already been allocated by a
3275 ret
= (struct elf32_arm_link_hash_entry
*)
3276 bfd_hash_allocate (table
, sizeof (struct elf32_arm_link_hash_entry
));
3278 return (struct bfd_hash_entry
*) ret
;
3280 /* Call the allocation method of the superclass. */
3281 ret
= ((struct elf32_arm_link_hash_entry
*)
3282 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry
*) ret
,
3286 ret
->dyn_relocs
= NULL
;
3287 ret
->tls_type
= GOT_UNKNOWN
;
3288 ret
->tlsdesc_got
= (bfd_vma
) -1;
3289 ret
->plt
.thumb_refcount
= 0;
3290 ret
->plt
.maybe_thumb_refcount
= 0;
3291 ret
->plt
.noncall_refcount
= 0;
3292 ret
->plt
.got_offset
= -1;
3293 ret
->is_iplt
= FALSE
;
3294 ret
->export_glue
= NULL
;
3296 ret
->stub_cache
= NULL
;
3299 return (struct bfd_hash_entry
*) ret
;
3302 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3306 elf32_arm_allocate_local_sym_info (bfd
*abfd
)
3308 if (elf_local_got_refcounts (abfd
) == NULL
)
3310 bfd_size_type num_syms
;
3314 num_syms
= elf_tdata (abfd
)->symtab_hdr
.sh_info
;
3315 size
= num_syms
* (sizeof (bfd_signed_vma
)
3316 + sizeof (struct arm_local_iplt_info
*)
3319 data
= bfd_zalloc (abfd
, size
);
3323 elf_local_got_refcounts (abfd
) = (bfd_signed_vma
*) data
;
3324 data
+= num_syms
* sizeof (bfd_signed_vma
);
3326 elf32_arm_local_iplt (abfd
) = (struct arm_local_iplt_info
**) data
;
3327 data
+= num_syms
* sizeof (struct arm_local_iplt_info
*);
3329 elf32_arm_local_tlsdesc_gotent (abfd
) = (bfd_vma
*) data
;
3330 data
+= num_syms
* sizeof (bfd_vma
);
3332 elf32_arm_local_got_tls_type (abfd
) = data
;
3337 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3338 to input bfd ABFD. Create the information if it doesn't already exist.
3339 Return null if an allocation fails. */
3341 static struct arm_local_iplt_info
*
3342 elf32_arm_create_local_iplt (bfd
*abfd
, unsigned long r_symndx
)
3344 struct arm_local_iplt_info
**ptr
;
3346 if (!elf32_arm_allocate_local_sym_info (abfd
))
3349 BFD_ASSERT (r_symndx
< elf_tdata (abfd
)->symtab_hdr
.sh_info
);
3350 ptr
= &elf32_arm_local_iplt (abfd
)[r_symndx
];
3352 *ptr
= bfd_zalloc (abfd
, sizeof (**ptr
));
3356 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3357 in ABFD's symbol table. If the symbol is global, H points to its
3358 hash table entry, otherwise H is null.
3360 Return true if the symbol does have PLT information. When returning
3361 true, point *ROOT_PLT at the target-independent reference count/offset
3362 union and *ARM_PLT at the ARM-specific information. */
3365 elf32_arm_get_plt_info (bfd
*abfd
, struct elf32_arm_link_hash_table
*globals
,
3366 struct elf32_arm_link_hash_entry
*h
,
3367 unsigned long r_symndx
, union gotplt_union
**root_plt
,
3368 struct arm_plt_info
**arm_plt
)
3370 struct arm_local_iplt_info
*local_iplt
;
3372 if (globals
->root
.splt
== NULL
&& globals
->root
.iplt
== NULL
)
3377 *root_plt
= &h
->root
.plt
;
3382 if (elf32_arm_local_iplt (abfd
) == NULL
)
3385 local_iplt
= elf32_arm_local_iplt (abfd
)[r_symndx
];
3386 if (local_iplt
== NULL
)
3389 *root_plt
= &local_iplt
->root
;
3390 *arm_plt
= &local_iplt
->arm
;
3394 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3398 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info
*info
,
3399 struct arm_plt_info
*arm_plt
)
3401 struct elf32_arm_link_hash_table
*htab
;
3403 htab
= elf32_arm_hash_table (info
);
3404 return (arm_plt
->thumb_refcount
!= 0
3405 || (!htab
->use_blx
&& arm_plt
->maybe_thumb_refcount
!= 0));
3408 /* Return a pointer to the head of the dynamic reloc list that should
3409 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3410 ABFD's symbol table. Return null if an error occurs. */
3412 static struct elf_dyn_relocs
**
3413 elf32_arm_get_local_dynreloc_list (bfd
*abfd
, unsigned long r_symndx
,
3414 Elf_Internal_Sym
*isym
)
3416 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
)
3418 struct arm_local_iplt_info
*local_iplt
;
3420 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
3421 if (local_iplt
== NULL
)
3423 return &local_iplt
->dyn_relocs
;
3427 /* Track dynamic relocs needed for local syms too.
3428 We really need local syms available to do this
3433 s
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
3437 vpp
= &elf_section_data (s
)->local_dynrel
;
3438 return (struct elf_dyn_relocs
**) vpp
;
3442 /* Initialize an entry in the stub hash table. */
3444 static struct bfd_hash_entry
*
3445 stub_hash_newfunc (struct bfd_hash_entry
*entry
,
3446 struct bfd_hash_table
*table
,
3449 /* Allocate the structure if it has not already been allocated by a
3453 entry
= (struct bfd_hash_entry
*)
3454 bfd_hash_allocate (table
, sizeof (struct elf32_arm_stub_hash_entry
));
3459 /* Call the allocation method of the superclass. */
3460 entry
= bfd_hash_newfunc (entry
, table
, string
);
3463 struct elf32_arm_stub_hash_entry
*eh
;
3465 /* Initialize the local fields. */
3466 eh
= (struct elf32_arm_stub_hash_entry
*) entry
;
3467 eh
->stub_sec
= NULL
;
3468 eh
->stub_offset
= (bfd_vma
) -1;
3469 eh
->source_value
= 0;
3470 eh
->target_value
= 0;
3471 eh
->target_section
= NULL
;
3473 eh
->stub_type
= arm_stub_none
;
3475 eh
->stub_template
= NULL
;
3476 eh
->stub_template_size
= -1;
3479 eh
->output_name
= NULL
;
3485 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3486 shortcuts to them in our hash table. */
3489 create_got_section (bfd
*dynobj
, struct bfd_link_info
*info
)
3491 struct elf32_arm_link_hash_table
*htab
;
3493 htab
= elf32_arm_hash_table (info
);
3497 /* BPABI objects never have a GOT, or associated sections. */
3498 if (htab
->symbian_p
)
3501 if (! _bfd_elf_create_got_section (dynobj
, info
))
3507 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3510 create_ifunc_sections (struct bfd_link_info
*info
)
3512 struct elf32_arm_link_hash_table
*htab
;
3513 const struct elf_backend_data
*bed
;
3518 htab
= elf32_arm_hash_table (info
);
3519 dynobj
= htab
->root
.dynobj
;
3520 bed
= get_elf_backend_data (dynobj
);
3521 flags
= bed
->dynamic_sec_flags
;
3523 if (htab
->root
.iplt
== NULL
)
3525 s
= bfd_make_section_anyway_with_flags (dynobj
, ".iplt",
3526 flags
| SEC_READONLY
| SEC_CODE
);
3528 || !bfd_set_section_alignment (dynobj
, s
, bed
->plt_alignment
))
3530 htab
->root
.iplt
= s
;
3533 if (htab
->root
.irelplt
== NULL
)
3535 s
= bfd_make_section_anyway_with_flags (dynobj
,
3536 RELOC_SECTION (htab
, ".iplt"),
3537 flags
| SEC_READONLY
);
3539 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3541 htab
->root
.irelplt
= s
;
3544 if (htab
->root
.igotplt
== NULL
)
3546 s
= bfd_make_section_anyway_with_flags (dynobj
, ".igot.plt", flags
);
3548 || !bfd_set_section_alignment (dynobj
, s
, bed
->s
->log_file_align
))
3550 htab
->root
.igotplt
= s
;
3555 /* Determine if we're dealing with a Thumb only architecture. */
3558 using_thumb_only (struct elf32_arm_link_hash_table
*globals
)
3561 int profile
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3562 Tag_CPU_arch_profile
);
3565 return profile
== 'M';
3567 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3569 /* Force return logic to be reviewed for each new architecture. */
3570 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3572 if (arch
== TAG_CPU_ARCH_V6_M
3573 || arch
== TAG_CPU_ARCH_V6S_M
3574 || arch
== TAG_CPU_ARCH_V7E_M
3575 || arch
== TAG_CPU_ARCH_V8M_BASE
3576 || arch
== TAG_CPU_ARCH_V8M_MAIN
)
3582 /* Determine if we're dealing with a Thumb-2 object. */
3585 using_thumb2 (struct elf32_arm_link_hash_table
*globals
)
3588 int thumb_isa
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3592 return thumb_isa
== 2;
3594 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3596 /* Force return logic to be reviewed for each new architecture. */
3597 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3599 return (arch
== TAG_CPU_ARCH_V6T2
3600 || arch
== TAG_CPU_ARCH_V7
3601 || arch
== TAG_CPU_ARCH_V7E_M
3602 || arch
== TAG_CPU_ARCH_V8
3603 || arch
== TAG_CPU_ARCH_V8R
3604 || arch
== TAG_CPU_ARCH_V8M_MAIN
);
3607 /* Determine whether Thumb-2 BL instruction is available. */
3610 using_thumb2_bl (struct elf32_arm_link_hash_table
*globals
)
3613 bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3615 /* Force return logic to be reviewed for each new architecture. */
3616 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3618 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3619 return (arch
== TAG_CPU_ARCH_V6T2
3620 || arch
>= TAG_CPU_ARCH_V7
);
3623 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3624 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3628 elf32_arm_create_dynamic_sections (bfd
*dynobj
, struct bfd_link_info
*info
)
3630 struct elf32_arm_link_hash_table
*htab
;
3632 htab
= elf32_arm_hash_table (info
);
3636 if (!htab
->root
.sgot
&& !create_got_section (dynobj
, info
))
3639 if (!_bfd_elf_create_dynamic_sections (dynobj
, info
))
3642 if (htab
->vxworks_p
)
3644 if (!elf_vxworks_create_dynamic_sections (dynobj
, info
, &htab
->srelplt2
))
3647 if (bfd_link_pic (info
))
3649 htab
->plt_header_size
= 0;
3650 htab
->plt_entry_size
3651 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry
);
3655 htab
->plt_header_size
3656 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry
);
3657 htab
->plt_entry_size
3658 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry
);
3661 if (elf_elfheader (dynobj
))
3662 elf_elfheader (dynobj
)->e_ident
[EI_CLASS
] = ELFCLASS32
;
3667 Test for thumb only architectures. Note - we cannot just call
3668 using_thumb_only() as the attributes in the output bfd have not been
3669 initialised at this point, so instead we use the input bfd. */
3670 bfd
* saved_obfd
= htab
->obfd
;
3672 htab
->obfd
= dynobj
;
3673 if (using_thumb_only (htab
))
3675 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
3676 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
3678 htab
->obfd
= saved_obfd
;
3681 if (!htab
->root
.splt
3682 || !htab
->root
.srelplt
3683 || !htab
->root
.sdynbss
3684 || (!bfd_link_pic (info
) && !htab
->root
.srelbss
))
3690 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3693 elf32_arm_copy_indirect_symbol (struct bfd_link_info
*info
,
3694 struct elf_link_hash_entry
*dir
,
3695 struct elf_link_hash_entry
*ind
)
3697 struct elf32_arm_link_hash_entry
*edir
, *eind
;
3699 edir
= (struct elf32_arm_link_hash_entry
*) dir
;
3700 eind
= (struct elf32_arm_link_hash_entry
*) ind
;
3702 if (eind
->dyn_relocs
!= NULL
)
3704 if (edir
->dyn_relocs
!= NULL
)
3706 struct elf_dyn_relocs
**pp
;
3707 struct elf_dyn_relocs
*p
;
3709 /* Add reloc counts against the indirect sym to the direct sym
3710 list. Merge any entries against the same section. */
3711 for (pp
= &eind
->dyn_relocs
; (p
= *pp
) != NULL
; )
3713 struct elf_dyn_relocs
*q
;
3715 for (q
= edir
->dyn_relocs
; q
!= NULL
; q
= q
->next
)
3716 if (q
->sec
== p
->sec
)
3718 q
->pc_count
+= p
->pc_count
;
3719 q
->count
+= p
->count
;
3726 *pp
= edir
->dyn_relocs
;
3729 edir
->dyn_relocs
= eind
->dyn_relocs
;
3730 eind
->dyn_relocs
= NULL
;
3733 if (ind
->root
.type
== bfd_link_hash_indirect
)
3735 /* Copy over PLT info. */
3736 edir
->plt
.thumb_refcount
+= eind
->plt
.thumb_refcount
;
3737 eind
->plt
.thumb_refcount
= 0;
3738 edir
->plt
.maybe_thumb_refcount
+= eind
->plt
.maybe_thumb_refcount
;
3739 eind
->plt
.maybe_thumb_refcount
= 0;
3740 edir
->plt
.noncall_refcount
+= eind
->plt
.noncall_refcount
;
3741 eind
->plt
.noncall_refcount
= 0;
3743 /* We should only allocate a function to .iplt once the final
3744 symbol information is known. */
3745 BFD_ASSERT (!eind
->is_iplt
);
3747 if (dir
->got
.refcount
<= 0)
3749 edir
->tls_type
= eind
->tls_type
;
3750 eind
->tls_type
= GOT_UNKNOWN
;
3754 _bfd_elf_link_hash_copy_indirect (info
, dir
, ind
);
3757 /* Destroy an ARM elf linker hash table. */
3760 elf32_arm_link_hash_table_free (bfd
*obfd
)
3762 struct elf32_arm_link_hash_table
*ret
3763 = (struct elf32_arm_link_hash_table
*) obfd
->link
.hash
;
3765 bfd_hash_table_free (&ret
->stub_hash_table
);
3766 _bfd_elf_link_hash_table_free (obfd
);
3769 /* Create an ARM elf linker hash table. */
3771 static struct bfd_link_hash_table
*
3772 elf32_arm_link_hash_table_create (bfd
*abfd
)
3774 struct elf32_arm_link_hash_table
*ret
;
3775 bfd_size_type amt
= sizeof (struct elf32_arm_link_hash_table
);
3777 ret
= (struct elf32_arm_link_hash_table
*) bfd_zmalloc (amt
);
3781 if (!_bfd_elf_link_hash_table_init (& ret
->root
, abfd
,
3782 elf32_arm_link_hash_newfunc
,
3783 sizeof (struct elf32_arm_link_hash_entry
),
3790 ret
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
3791 ret
->stm32l4xx_fix
= BFD_ARM_STM32L4XX_FIX_NONE
;
3792 #ifdef FOUR_WORD_PLT
3793 ret
->plt_header_size
= 16;
3794 ret
->plt_entry_size
= 16;
3796 ret
->plt_header_size
= 20;
3797 ret
->plt_entry_size
= elf32_arm_use_long_plt_entry
? 16 : 12;
3802 if (!bfd_hash_table_init (&ret
->stub_hash_table
, stub_hash_newfunc
,
3803 sizeof (struct elf32_arm_stub_hash_entry
)))
3805 _bfd_elf_link_hash_table_free (abfd
);
3808 ret
->root
.root
.hash_table_free
= elf32_arm_link_hash_table_free
;
3810 return &ret
->root
.root
;
3813 /* Determine what kind of NOPs are available. */
3816 arch_has_arm_nop (struct elf32_arm_link_hash_table
*globals
)
3818 const int arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
3821 /* Force return logic to be reviewed for each new architecture. */
3822 BFD_ASSERT (arch
<= TAG_CPU_ARCH_V8M_MAIN
);
3824 return (arch
== TAG_CPU_ARCH_V6T2
3825 || arch
== TAG_CPU_ARCH_V6K
3826 || arch
== TAG_CPU_ARCH_V7
3827 || arch
== TAG_CPU_ARCH_V8
3828 || arch
== TAG_CPU_ARCH_V8R
);
3832 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type
)
3836 case arm_stub_long_branch_thumb_only
:
3837 case arm_stub_long_branch_thumb2_only
:
3838 case arm_stub_long_branch_thumb2_only_pure
:
3839 case arm_stub_long_branch_v4t_thumb_arm
:
3840 case arm_stub_short_branch_v4t_thumb_arm
:
3841 case arm_stub_long_branch_v4t_thumb_arm_pic
:
3842 case arm_stub_long_branch_v4t_thumb_tls_pic
:
3843 case arm_stub_long_branch_thumb_only_pic
:
3844 case arm_stub_cmse_branch_thumb_only
:
3855 /* Determine the type of stub needed, if any, for a call. */
3857 static enum elf32_arm_stub_type
3858 arm_type_of_stub (struct bfd_link_info
*info
,
3859 asection
*input_sec
,
3860 const Elf_Internal_Rela
*rel
,
3861 unsigned char st_type
,
3862 enum arm_st_branch_type
*actual_branch_type
,
3863 struct elf32_arm_link_hash_entry
*hash
,
3864 bfd_vma destination
,
3870 bfd_signed_vma branch_offset
;
3871 unsigned int r_type
;
3872 struct elf32_arm_link_hash_table
* globals
;
3873 bfd_boolean thumb2
, thumb2_bl
, thumb_only
;
3874 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
3876 enum arm_st_branch_type branch_type
= *actual_branch_type
;
3877 union gotplt_union
*root_plt
;
3878 struct arm_plt_info
*arm_plt
;
3882 if (branch_type
== ST_BRANCH_LONG
)
3885 globals
= elf32_arm_hash_table (info
);
3886 if (globals
== NULL
)
3889 thumb_only
= using_thumb_only (globals
);
3890 thumb2
= using_thumb2 (globals
);
3891 thumb2_bl
= using_thumb2_bl (globals
);
3893 arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
3895 /* True for architectures that implement the thumb2 movw instruction. */
3896 thumb2_movw
= thumb2
|| (arch
== TAG_CPU_ARCH_V8M_BASE
);
3898 /* Determine where the call point is. */
3899 location
= (input_sec
->output_offset
3900 + input_sec
->output_section
->vma
3903 r_type
= ELF32_R_TYPE (rel
->r_info
);
3905 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3906 are considering a function call relocation. */
3907 if (thumb_only
&& (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3908 || r_type
== R_ARM_THM_JUMP19
)
3909 && branch_type
== ST_BRANCH_TO_ARM
)
3910 branch_type
= ST_BRANCH_TO_THUMB
;
3912 /* For TLS call relocs, it is the caller's responsibility to provide
3913 the address of the appropriate trampoline. */
3914 if (r_type
!= R_ARM_TLS_CALL
3915 && r_type
!= R_ARM_THM_TLS_CALL
3916 && elf32_arm_get_plt_info (input_bfd
, globals
, hash
,
3917 ELF32_R_SYM (rel
->r_info
), &root_plt
,
3919 && root_plt
->offset
!= (bfd_vma
) -1)
3923 if (hash
== NULL
|| hash
->is_iplt
)
3924 splt
= globals
->root
.iplt
;
3926 splt
= globals
->root
.splt
;
3931 /* Note when dealing with PLT entries: the main PLT stub is in
3932 ARM mode, so if the branch is in Thumb mode, another
3933 Thumb->ARM stub will be inserted later just before the ARM
3934 PLT stub. If a long branch stub is needed, we'll add a
3935 Thumb->Arm one and branch directly to the ARM PLT entry.
3936 Here, we have to check if a pre-PLT Thumb->ARM stub
3937 is needed and if it will be close enough. */
3939 destination
= (splt
->output_section
->vma
3940 + splt
->output_offset
3941 + root_plt
->offset
);
3944 /* Thumb branch/call to PLT: it can become a branch to ARM
3945 or to Thumb. We must perform the same checks and
3946 corrections as in elf32_arm_final_link_relocate. */
3947 if ((r_type
== R_ARM_THM_CALL
)
3948 || (r_type
== R_ARM_THM_JUMP24
))
3950 if (globals
->use_blx
3951 && r_type
== R_ARM_THM_CALL
3954 /* If the Thumb BLX instruction is available, convert
3955 the BL to a BLX instruction to call the ARM-mode
3957 branch_type
= ST_BRANCH_TO_ARM
;
3962 /* Target the Thumb stub before the ARM PLT entry. */
3963 destination
-= PLT_THUMB_STUB_SIZE
;
3964 branch_type
= ST_BRANCH_TO_THUMB
;
3969 branch_type
= ST_BRANCH_TO_ARM
;
3973 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3974 BFD_ASSERT (st_type
!= STT_GNU_IFUNC
);
3976 branch_offset
= (bfd_signed_vma
)(destination
- location
);
3978 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
3979 || r_type
== R_ARM_THM_TLS_CALL
|| r_type
== R_ARM_THM_JUMP19
)
3981 /* Handle cases where:
3982 - this call goes too far (different Thumb/Thumb2 max
3984 - it's a Thumb->Arm call and blx is not available, or it's a
3985 Thumb->Arm branch (not bl). A stub is needed in this case,
3986 but only if this call is not through a PLT entry. Indeed,
3987 PLT stubs handle mode switching already. */
3989 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
3990 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
3992 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
3993 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
3995 && (branch_offset
> THM2_MAX_FWD_COND_BRANCH_OFFSET
3996 || (branch_offset
< THM2_MAX_BWD_COND_BRANCH_OFFSET
))
3997 && (r_type
== R_ARM_THM_JUMP19
))
3998 || (branch_type
== ST_BRANCH_TO_ARM
3999 && (((r_type
== R_ARM_THM_CALL
4000 || r_type
== R_ARM_THM_TLS_CALL
) && !globals
->use_blx
)
4001 || (r_type
== R_ARM_THM_JUMP24
)
4002 || (r_type
== R_ARM_THM_JUMP19
))
4005 /* If we need to insert a Thumb-Thumb long branch stub to a
4006 PLT, use one that branches directly to the ARM PLT
4007 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4008 stub, undo this now. */
4009 if ((branch_type
== ST_BRANCH_TO_THUMB
) && use_plt
&& !thumb_only
)
4011 branch_type
= ST_BRANCH_TO_ARM
;
4012 branch_offset
+= PLT_THUMB_STUB_SIZE
;
4015 if (branch_type
== ST_BRANCH_TO_THUMB
)
4017 /* Thumb to thumb. */
4020 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4022 (_("%B(%A): warning: long branch veneers used in"
4023 " section with SHF_ARM_PURECODE section"
4024 " attribute is only supported for M-profile"
4025 " targets that implement the movw instruction."),
4026 input_bfd
, input_sec
);
4028 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4030 ? ((globals
->use_blx
4031 && (r_type
== R_ARM_THM_CALL
))
4032 /* V5T and above. Stub starts with ARM code, so
4033 we must be able to switch mode before
4034 reaching it, which is only possible for 'bl'
4035 (ie R_ARM_THM_CALL relocation). */
4036 ? arm_stub_long_branch_any_thumb_pic
4037 /* On V4T, use Thumb code only. */
4038 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4040 /* non-PIC stubs. */
4041 : ((globals
->use_blx
4042 && (r_type
== R_ARM_THM_CALL
))
4043 /* V5T and above. */
4044 ? arm_stub_long_branch_any_any
4046 : arm_stub_long_branch_v4t_thumb_thumb
);
4050 if (thumb2_movw
&& (input_sec
->flags
& SEC_ELF_PURECODE
))
4051 stub_type
= arm_stub_long_branch_thumb2_only_pure
;
4054 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4056 (_("%B(%A): warning: long branch veneers used in"
4057 " section with SHF_ARM_PURECODE section"
4058 " attribute is only supported for M-profile"
4059 " targets that implement the movw instruction."),
4060 input_bfd
, input_sec
);
4062 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4064 ? arm_stub_long_branch_thumb_only_pic
4066 : (thumb2
? arm_stub_long_branch_thumb2_only
4067 : arm_stub_long_branch_thumb_only
);
4073 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4075 (_("%B(%A): warning: long branch veneers used in"
4076 " section with SHF_ARM_PURECODE section"
4077 " attribute is only supported" " for M-profile"
4078 " targets that implement the movw instruction."),
4079 input_bfd
, input_sec
);
4083 && sym_sec
->owner
!= NULL
4084 && !INTERWORK_FLAG (sym_sec
->owner
))
4087 (_("%B(%s): warning: interworking not enabled.\n"
4088 " first occurrence: %B: Thumb call to ARM"),
4089 sym_sec
->owner
, name
, input_bfd
);
4093 (bfd_link_pic (info
) | globals
->pic_veneer
)
4095 ? (r_type
== R_ARM_THM_TLS_CALL
4096 /* TLS PIC stubs. */
4097 ? (globals
->use_blx
? arm_stub_long_branch_any_tls_pic
4098 : arm_stub_long_branch_v4t_thumb_tls_pic
)
4099 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4100 /* V5T PIC and above. */
4101 ? arm_stub_long_branch_any_arm_pic
4103 : arm_stub_long_branch_v4t_thumb_arm_pic
))
4105 /* non-PIC stubs. */
4106 : ((globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
4107 /* V5T and above. */
4108 ? arm_stub_long_branch_any_any
4110 : arm_stub_long_branch_v4t_thumb_arm
);
4112 /* Handle v4t short branches. */
4113 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4114 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4115 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4116 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4120 else if (r_type
== R_ARM_CALL
4121 || r_type
== R_ARM_JUMP24
4122 || r_type
== R_ARM_PLT32
4123 || r_type
== R_ARM_TLS_CALL
)
4125 if (input_sec
->flags
& SEC_ELF_PURECODE
)
4127 (_("%B(%A): warning: long branch veneers used in"
4128 " section with SHF_ARM_PURECODE section"
4129 " attribute is only supported for M-profile"
4130 " targets that implement the movw instruction."),
4131 input_bfd
, input_sec
);
4132 if (branch_type
== ST_BRANCH_TO_THUMB
)
4137 && sym_sec
->owner
!= NULL
4138 && !INTERWORK_FLAG (sym_sec
->owner
))
4141 (_("%B(%s): warning: interworking not enabled.\n"
4142 " first occurrence: %B: ARM call to Thumb"),
4143 sym_sec
->owner
, name
, input_bfd
);
4146 /* We have an extra 2-bytes reach because of
4147 the mode change (bit 24 (H) of BLX encoding). */
4148 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4149 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4150 || (r_type
== R_ARM_CALL
&& !globals
->use_blx
)
4151 || (r_type
== R_ARM_JUMP24
)
4152 || (r_type
== R_ARM_PLT32
))
4154 stub_type
= (bfd_link_pic (info
) | globals
->pic_veneer
)
4156 ? ((globals
->use_blx
)
4157 /* V5T and above. */
4158 ? arm_stub_long_branch_any_thumb_pic
4160 : arm_stub_long_branch_v4t_arm_thumb_pic
)
4162 /* non-PIC stubs. */
4163 : ((globals
->use_blx
)
4164 /* V5T and above. */
4165 ? arm_stub_long_branch_any_any
4167 : arm_stub_long_branch_v4t_arm_thumb
);
4173 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4174 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4177 (bfd_link_pic (info
) | globals
->pic_veneer
)
4179 ? (r_type
== R_ARM_TLS_CALL
4181 ? arm_stub_long_branch_any_tls_pic
4183 ? arm_stub_long_branch_arm_nacl_pic
4184 : arm_stub_long_branch_any_arm_pic
))
4185 /* non-PIC stubs. */
4187 ? arm_stub_long_branch_arm_nacl
4188 : arm_stub_long_branch_any_any
);
4193 /* If a stub is needed, record the actual destination type. */
4194 if (stub_type
!= arm_stub_none
)
4195 *actual_branch_type
= branch_type
;
4200 /* Build a name for an entry in the stub hash table. */
4203 elf32_arm_stub_name (const asection
*input_section
,
4204 const asection
*sym_sec
,
4205 const struct elf32_arm_link_hash_entry
*hash
,
4206 const Elf_Internal_Rela
*rel
,
4207 enum elf32_arm_stub_type stub_type
)
4214 len
= 8 + 1 + strlen (hash
->root
.root
.root
.string
) + 1 + 8 + 1 + 2 + 1;
4215 stub_name
= (char *) bfd_malloc (len
);
4216 if (stub_name
!= NULL
)
4217 sprintf (stub_name
, "%08x_%s+%x_%d",
4218 input_section
->id
& 0xffffffff,
4219 hash
->root
.root
.root
.string
,
4220 (int) rel
->r_addend
& 0xffffffff,
4225 len
= 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4226 stub_name
= (char *) bfd_malloc (len
);
4227 if (stub_name
!= NULL
)
4228 sprintf (stub_name
, "%08x_%x:%x+%x_%d",
4229 input_section
->id
& 0xffffffff,
4230 sym_sec
->id
& 0xffffffff,
4231 ELF32_R_TYPE (rel
->r_info
) == R_ARM_TLS_CALL
4232 || ELF32_R_TYPE (rel
->r_info
) == R_ARM_THM_TLS_CALL
4233 ? 0 : (int) ELF32_R_SYM (rel
->r_info
) & 0xffffffff,
4234 (int) rel
->r_addend
& 0xffffffff,
4241 /* Look up an entry in the stub hash. Stub entries are cached because
4242 creating the stub name takes a bit of time. */
4244 static struct elf32_arm_stub_hash_entry
*
4245 elf32_arm_get_stub_entry (const asection
*input_section
,
4246 const asection
*sym_sec
,
4247 struct elf_link_hash_entry
*hash
,
4248 const Elf_Internal_Rela
*rel
,
4249 struct elf32_arm_link_hash_table
*htab
,
4250 enum elf32_arm_stub_type stub_type
)
4252 struct elf32_arm_stub_hash_entry
*stub_entry
;
4253 struct elf32_arm_link_hash_entry
*h
= (struct elf32_arm_link_hash_entry
*) hash
;
4254 const asection
*id_sec
;
4256 if ((input_section
->flags
& SEC_CODE
) == 0)
4259 /* If this input section is part of a group of sections sharing one
4260 stub section, then use the id of the first section in the group.
4261 Stub names need to include a section id, as there may well be
4262 more than one stub used to reach say, printf, and we need to
4263 distinguish between them. */
4264 BFD_ASSERT (input_section
->id
<= htab
->top_id
);
4265 id_sec
= htab
->stub_group
[input_section
->id
].link_sec
;
4267 if (h
!= NULL
&& h
->stub_cache
!= NULL
4268 && h
->stub_cache
->h
== h
4269 && h
->stub_cache
->id_sec
== id_sec
4270 && h
->stub_cache
->stub_type
== stub_type
)
4272 stub_entry
= h
->stub_cache
;
4278 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, h
, rel
, stub_type
);
4279 if (stub_name
== NULL
)
4282 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
,
4283 stub_name
, FALSE
, FALSE
);
4285 h
->stub_cache
= stub_entry
;
4293 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4297 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type
)
4299 if (stub_type
>= max_stub_type
)
4300 abort (); /* Should be unreachable. */
4304 case arm_stub_cmse_branch_thumb_only
:
4311 abort (); /* Should be unreachable. */
4314 /* Required alignment (as a power of 2) for the dedicated section holding
4315 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4316 with input sections. */
4319 arm_dedicated_stub_output_section_required_alignment
4320 (enum elf32_arm_stub_type stub_type
)
4322 if (stub_type
>= max_stub_type
)
4323 abort (); /* Should be unreachable. */
4327 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4329 case arm_stub_cmse_branch_thumb_only
:
4333 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4337 abort (); /* Should be unreachable. */
4340 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4341 NULL if veneers of this type are interspersed with input sections. */
4344 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type
)
4346 if (stub_type
>= max_stub_type
)
4347 abort (); /* Should be unreachable. */
4351 case arm_stub_cmse_branch_thumb_only
:
4352 return ".gnu.sgstubs";
4355 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4359 abort (); /* Should be unreachable. */
4362 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4363 returns the address of the hash table field in HTAB holding a pointer to the
4364 corresponding input section. Otherwise, returns NULL. */
4367 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table
*htab
,
4368 enum elf32_arm_stub_type stub_type
)
4370 if (stub_type
>= max_stub_type
)
4371 abort (); /* Should be unreachable. */
4375 case arm_stub_cmse_branch_thumb_only
:
4376 return &htab
->cmse_stub_sec
;
4379 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4383 abort (); /* Should be unreachable. */
4386 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4387 is the section that branch into veneer and can be NULL if stub should go in
4388 a dedicated output section. Returns a pointer to the stub section, and the
4389 section to which the stub section will be attached (in *LINK_SEC_P).
4390 LINK_SEC_P may be NULL. */
4393 elf32_arm_create_or_find_stub_sec (asection
**link_sec_p
, asection
*section
,
4394 struct elf32_arm_link_hash_table
*htab
,
4395 enum elf32_arm_stub_type stub_type
)
4397 asection
*link_sec
, *out_sec
, **stub_sec_p
;
4398 const char *stub_sec_prefix
;
4399 bfd_boolean dedicated_output_section
=
4400 arm_dedicated_stub_output_section_required (stub_type
);
4403 if (dedicated_output_section
)
4405 bfd
*output_bfd
= htab
->obfd
;
4406 const char *out_sec_name
=
4407 arm_dedicated_stub_output_section_name (stub_type
);
4409 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
4410 stub_sec_prefix
= out_sec_name
;
4411 align
= arm_dedicated_stub_output_section_required_alignment (stub_type
);
4412 out_sec
= bfd_get_section_by_name (output_bfd
, out_sec_name
);
4413 if (out_sec
== NULL
)
4415 _bfd_error_handler (_("No address assigned to the veneers output "
4416 "section %s"), out_sec_name
);
4422 BFD_ASSERT (section
->id
<= htab
->top_id
);
4423 link_sec
= htab
->stub_group
[section
->id
].link_sec
;
4424 BFD_ASSERT (link_sec
!= NULL
);
4425 stub_sec_p
= &htab
->stub_group
[section
->id
].stub_sec
;
4426 if (*stub_sec_p
== NULL
)
4427 stub_sec_p
= &htab
->stub_group
[link_sec
->id
].stub_sec
;
4428 stub_sec_prefix
= link_sec
->name
;
4429 out_sec
= link_sec
->output_section
;
4430 align
= htab
->nacl_p
? 4 : 3;
4433 if (*stub_sec_p
== NULL
)
4439 namelen
= strlen (stub_sec_prefix
);
4440 len
= namelen
+ sizeof (STUB_SUFFIX
);
4441 s_name
= (char *) bfd_alloc (htab
->stub_bfd
, len
);
4445 memcpy (s_name
, stub_sec_prefix
, namelen
);
4446 memcpy (s_name
+ namelen
, STUB_SUFFIX
, sizeof (STUB_SUFFIX
));
4447 *stub_sec_p
= (*htab
->add_stub_section
) (s_name
, out_sec
, link_sec
,
4449 if (*stub_sec_p
== NULL
)
4452 out_sec
->flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
| SEC_CODE
4453 | SEC_HAS_CONTENTS
| SEC_RELOC
| SEC_IN_MEMORY
4457 if (!dedicated_output_section
)
4458 htab
->stub_group
[section
->id
].stub_sec
= *stub_sec_p
;
4461 *link_sec_p
= link_sec
;
4466 /* Add a new stub entry to the stub hash. Not all fields of the new
4467 stub entry are initialised. */
4469 static struct elf32_arm_stub_hash_entry
*
4470 elf32_arm_add_stub (const char *stub_name
, asection
*section
,
4471 struct elf32_arm_link_hash_table
*htab
,
4472 enum elf32_arm_stub_type stub_type
)
4476 struct elf32_arm_stub_hash_entry
*stub_entry
;
4478 stub_sec
= elf32_arm_create_or_find_stub_sec (&link_sec
, section
, htab
,
4480 if (stub_sec
== NULL
)
4483 /* Enter this entry into the linker stub hash table. */
4484 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
4486 if (stub_entry
== NULL
)
4488 if (section
== NULL
)
4490 _bfd_error_handler (_("%B: cannot create stub entry %s"),
4491 section
->owner
, stub_name
);
4495 stub_entry
->stub_sec
= stub_sec
;
4496 stub_entry
->stub_offset
= (bfd_vma
) -1;
4497 stub_entry
->id_sec
= link_sec
;
4502 /* Store an Arm insn into an output section not processed by
4503 elf32_arm_write_section. */
4506 put_arm_insn (struct elf32_arm_link_hash_table
* htab
,
4507 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4509 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4510 bfd_putl32 (val
, ptr
);
4512 bfd_putb32 (val
, ptr
);
4515 /* Store a 16-bit Thumb insn into an output section not processed by
4516 elf32_arm_write_section. */
4519 put_thumb_insn (struct elf32_arm_link_hash_table
* htab
,
4520 bfd
* output_bfd
, bfd_vma val
, void * ptr
)
4522 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4523 bfd_putl16 (val
, ptr
);
4525 bfd_putb16 (val
, ptr
);
4528 /* Store a Thumb2 insn into an output section not processed by
4529 elf32_arm_write_section. */
4532 put_thumb2_insn (struct elf32_arm_link_hash_table
* htab
,
4533 bfd
* output_bfd
, bfd_vma val
, bfd_byte
* ptr
)
4535 /* T2 instructions are 16-bit streamed. */
4536 if (htab
->byteswap_code
!= bfd_little_endian (output_bfd
))
4538 bfd_putl16 ((val
>> 16) & 0xffff, ptr
);
4539 bfd_putl16 ((val
& 0xffff), ptr
+ 2);
4543 bfd_putb16 ((val
>> 16) & 0xffff, ptr
);
4544 bfd_putb16 ((val
& 0xffff), ptr
+ 2);
4548 /* If it's possible to change R_TYPE to a more efficient access
4549 model, return the new reloc type. */
4552 elf32_arm_tls_transition (struct bfd_link_info
*info
, int r_type
,
4553 struct elf_link_hash_entry
*h
)
4555 int is_local
= (h
== NULL
);
4557 if (bfd_link_pic (info
)
4558 || (h
&& h
->root
.type
== bfd_link_hash_undefweak
))
4561 /* We do not support relaxations for Old TLS models. */
4564 case R_ARM_TLS_GOTDESC
:
4565 case R_ARM_TLS_CALL
:
4566 case R_ARM_THM_TLS_CALL
:
4567 case R_ARM_TLS_DESCSEQ
:
4568 case R_ARM_THM_TLS_DESCSEQ
:
4569 return is_local
? R_ARM_TLS_LE32
: R_ARM_TLS_IE32
;
4575 static bfd_reloc_status_type elf32_arm_final_link_relocate
4576 (reloc_howto_type
*, bfd
*, bfd
*, asection
*, bfd_byte
*,
4577 Elf_Internal_Rela
*, bfd_vma
, struct bfd_link_info
*, asection
*,
4578 const char *, unsigned char, enum arm_st_branch_type
,
4579 struct elf_link_hash_entry
*, bfd_boolean
*, char **);
4582 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type
)
4586 case arm_stub_a8_veneer_b_cond
:
4587 case arm_stub_a8_veneer_b
:
4588 case arm_stub_a8_veneer_bl
:
4591 case arm_stub_long_branch_any_any
:
4592 case arm_stub_long_branch_v4t_arm_thumb
:
4593 case arm_stub_long_branch_thumb_only
:
4594 case arm_stub_long_branch_thumb2_only
:
4595 case arm_stub_long_branch_thumb2_only_pure
:
4596 case arm_stub_long_branch_v4t_thumb_thumb
:
4597 case arm_stub_long_branch_v4t_thumb_arm
:
4598 case arm_stub_short_branch_v4t_thumb_arm
:
4599 case arm_stub_long_branch_any_arm_pic
:
4600 case arm_stub_long_branch_any_thumb_pic
:
4601 case arm_stub_long_branch_v4t_thumb_thumb_pic
:
4602 case arm_stub_long_branch_v4t_arm_thumb_pic
:
4603 case arm_stub_long_branch_v4t_thumb_arm_pic
:
4604 case arm_stub_long_branch_thumb_only_pic
:
4605 case arm_stub_long_branch_any_tls_pic
:
4606 case arm_stub_long_branch_v4t_thumb_tls_pic
:
4607 case arm_stub_cmse_branch_thumb_only
:
4608 case arm_stub_a8_veneer_blx
:
4611 case arm_stub_long_branch_arm_nacl
:
4612 case arm_stub_long_branch_arm_nacl_pic
:
4616 abort (); /* Should be unreachable. */
4620 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4621 veneering (TRUE) or have their own symbol (FALSE). */
4624 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type
)
4626 if (stub_type
>= max_stub_type
)
4627 abort (); /* Should be unreachable. */
4631 case arm_stub_cmse_branch_thumb_only
:
4638 abort (); /* Should be unreachable. */
4641 /* Returns the padding needed for the dedicated section used stubs of type
4645 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type
)
4647 if (stub_type
>= max_stub_type
)
4648 abort (); /* Should be unreachable. */
4652 case arm_stub_cmse_branch_thumb_only
:
4659 abort (); /* Should be unreachable. */
4662 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4663 returns the address of the hash table field in HTAB holding the offset at
4664 which new veneers should be layed out in the stub section. */
4667 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table
*htab
,
4668 enum elf32_arm_stub_type stub_type
)
4672 case arm_stub_cmse_branch_thumb_only
:
4673 return &htab
->new_cmse_stub_offset
;
4676 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type
));
4682 arm_build_one_stub (struct bfd_hash_entry
*gen_entry
,
4686 bfd_boolean removed_sg_veneer
;
4687 struct elf32_arm_stub_hash_entry
*stub_entry
;
4688 struct elf32_arm_link_hash_table
*globals
;
4689 struct bfd_link_info
*info
;
4696 const insn_sequence
*template_sequence
;
4698 int stub_reloc_idx
[MAXRELOCS
] = {-1, -1};
4699 int stub_reloc_offset
[MAXRELOCS
] = {0, 0};
4701 int just_allocated
= 0;
4703 /* Massage our args to the form they really have. */
4704 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4705 info
= (struct bfd_link_info
*) in_arg
;
4707 globals
= elf32_arm_hash_table (info
);
4708 if (globals
== NULL
)
4711 stub_sec
= stub_entry
->stub_sec
;
4713 if ((globals
->fix_cortex_a8
< 0)
4714 != (arm_stub_required_alignment (stub_entry
->stub_type
) == 2))
4715 /* We have to do less-strictly-aligned fixes last. */
4718 /* Assign a slot at the end of section if none assigned yet. */
4719 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
4721 stub_entry
->stub_offset
= stub_sec
->size
;
4724 loc
= stub_sec
->contents
+ stub_entry
->stub_offset
;
4726 stub_bfd
= stub_sec
->owner
;
4728 /* This is the address of the stub destination. */
4729 sym_value
= (stub_entry
->target_value
4730 + stub_entry
->target_section
->output_offset
4731 + stub_entry
->target_section
->output_section
->vma
);
4733 template_sequence
= stub_entry
->stub_template
;
4734 template_size
= stub_entry
->stub_template_size
;
4737 for (i
= 0; i
< template_size
; i
++)
4739 switch (template_sequence
[i
].type
)
4743 bfd_vma data
= (bfd_vma
) template_sequence
[i
].data
;
4744 if (template_sequence
[i
].reloc_addend
!= 0)
4746 /* We've borrowed the reloc_addend field to mean we should
4747 insert a condition code into this (Thumb-1 branch)
4748 instruction. See THUMB16_BCOND_INSN. */
4749 BFD_ASSERT ((data
& 0xff00) == 0xd000);
4750 data
|= ((stub_entry
->orig_insn
>> 22) & 0xf) << 8;
4752 bfd_put_16 (stub_bfd
, data
, loc
+ size
);
4758 bfd_put_16 (stub_bfd
,
4759 (template_sequence
[i
].data
>> 16) & 0xffff,
4761 bfd_put_16 (stub_bfd
, template_sequence
[i
].data
& 0xffff,
4763 if (template_sequence
[i
].r_type
!= R_ARM_NONE
)
4765 stub_reloc_idx
[nrelocs
] = i
;
4766 stub_reloc_offset
[nrelocs
++] = size
;
4772 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
,
4774 /* Handle cases where the target is encoded within the
4776 if (template_sequence
[i
].r_type
== R_ARM_JUMP24
)
4778 stub_reloc_idx
[nrelocs
] = i
;
4779 stub_reloc_offset
[nrelocs
++] = size
;
4785 bfd_put_32 (stub_bfd
, template_sequence
[i
].data
, loc
+ size
);
4786 stub_reloc_idx
[nrelocs
] = i
;
4787 stub_reloc_offset
[nrelocs
++] = size
;
4798 stub_sec
->size
+= size
;
4800 /* Stub size has already been computed in arm_size_one_stub. Check
4802 BFD_ASSERT (size
== stub_entry
->stub_size
);
4804 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4805 if (stub_entry
->branch_type
== ST_BRANCH_TO_THUMB
)
4808 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4809 to relocate in each stub. */
4811 (size
== 0 && stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
4812 BFD_ASSERT (removed_sg_veneer
|| (nrelocs
!= 0 && nrelocs
<= MAXRELOCS
));
4814 for (i
= 0; i
< nrelocs
; i
++)
4816 Elf_Internal_Rela rel
;
4817 bfd_boolean unresolved_reloc
;
4818 char *error_message
;
4820 sym_value
+ template_sequence
[stub_reloc_idx
[i
]].reloc_addend
;
4822 rel
.r_offset
= stub_entry
->stub_offset
+ stub_reloc_offset
[i
];
4823 rel
.r_info
= ELF32_R_INFO (0,
4824 template_sequence
[stub_reloc_idx
[i
]].r_type
);
4827 if (stub_entry
->stub_type
== arm_stub_a8_veneer_b_cond
&& i
== 0)
4828 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4829 template should refer back to the instruction after the original
4830 branch. We use target_section as Cortex-A8 erratum workaround stubs
4831 are only generated when both source and target are in the same
4833 points_to
= stub_entry
->target_section
->output_section
->vma
4834 + stub_entry
->target_section
->output_offset
4835 + stub_entry
->source_value
;
4837 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4838 (template_sequence
[stub_reloc_idx
[i
]].r_type
),
4839 stub_bfd
, info
->output_bfd
, stub_sec
, stub_sec
->contents
, &rel
,
4840 points_to
, info
, stub_entry
->target_section
, "", STT_FUNC
,
4841 stub_entry
->branch_type
,
4842 (struct elf_link_hash_entry
*) stub_entry
->h
, &unresolved_reloc
,
4850 /* Calculate the template, template size and instruction size for a stub.
4851 Return value is the instruction size. */
4854 find_stub_size_and_template (enum elf32_arm_stub_type stub_type
,
4855 const insn_sequence
**stub_template
,
4856 int *stub_template_size
)
4858 const insn_sequence
*template_sequence
= NULL
;
4859 int template_size
= 0, i
;
4862 template_sequence
= stub_definitions
[stub_type
].template_sequence
;
4864 *stub_template
= template_sequence
;
4866 template_size
= stub_definitions
[stub_type
].template_size
;
4867 if (stub_template_size
)
4868 *stub_template_size
= template_size
;
4871 for (i
= 0; i
< template_size
; i
++)
4873 switch (template_sequence
[i
].type
)
4894 /* As above, but don't actually build the stub. Just bump offset so
4895 we know stub section sizes. */
4898 arm_size_one_stub (struct bfd_hash_entry
*gen_entry
,
4899 void *in_arg ATTRIBUTE_UNUSED
)
4901 struct elf32_arm_stub_hash_entry
*stub_entry
;
4902 const insn_sequence
*template_sequence
;
4903 int template_size
, size
;
4905 /* Massage our args to the form they really have. */
4906 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
4908 BFD_ASSERT((stub_entry
->stub_type
> arm_stub_none
)
4909 && stub_entry
->stub_type
< ARRAY_SIZE(stub_definitions
));
4911 size
= find_stub_size_and_template (stub_entry
->stub_type
, &template_sequence
,
4914 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4915 if (stub_entry
->stub_template_size
)
4917 stub_entry
->stub_size
= size
;
4918 stub_entry
->stub_template
= template_sequence
;
4919 stub_entry
->stub_template_size
= template_size
;
4922 /* Already accounted for. */
4923 if (stub_entry
->stub_offset
!= (bfd_vma
) -1)
4926 size
= (size
+ 7) & ~7;
4927 stub_entry
->stub_sec
->size
+= size
;
4932 /* External entry points for sizing and building linker stubs. */
4934 /* Set up various things so that we can make a list of input sections
4935 for each output section included in the link. Returns -1 on error,
4936 0 when no stubs will be needed, and 1 on success. */
4939 elf32_arm_setup_section_lists (bfd
*output_bfd
,
4940 struct bfd_link_info
*info
)
4943 unsigned int bfd_count
;
4944 unsigned int top_id
, top_index
;
4946 asection
**input_list
, **list
;
4948 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
4952 if (! is_elf_hash_table (htab
))
4955 /* Count the number of input BFDs and find the top input section id. */
4956 for (input_bfd
= info
->input_bfds
, bfd_count
= 0, top_id
= 0;
4958 input_bfd
= input_bfd
->link
.next
)
4961 for (section
= input_bfd
->sections
;
4963 section
= section
->next
)
4965 if (top_id
< section
->id
)
4966 top_id
= section
->id
;
4969 htab
->bfd_count
= bfd_count
;
4971 amt
= sizeof (struct map_stub
) * (top_id
+ 1);
4972 htab
->stub_group
= (struct map_stub
*) bfd_zmalloc (amt
);
4973 if (htab
->stub_group
== NULL
)
4975 htab
->top_id
= top_id
;
4977 /* We can't use output_bfd->section_count here to find the top output
4978 section index as some sections may have been removed, and
4979 _bfd_strip_section_from_output doesn't renumber the indices. */
4980 for (section
= output_bfd
->sections
, top_index
= 0;
4982 section
= section
->next
)
4984 if (top_index
< section
->index
)
4985 top_index
= section
->index
;
4988 htab
->top_index
= top_index
;
4989 amt
= sizeof (asection
*) * (top_index
+ 1);
4990 input_list
= (asection
**) bfd_malloc (amt
);
4991 htab
->input_list
= input_list
;
4992 if (input_list
== NULL
)
4995 /* For sections we aren't interested in, mark their entries with a
4996 value we can check later. */
4997 list
= input_list
+ top_index
;
4999 *list
= bfd_abs_section_ptr
;
5000 while (list
-- != input_list
);
5002 for (section
= output_bfd
->sections
;
5004 section
= section
->next
)
5006 if ((section
->flags
& SEC_CODE
) != 0)
5007 input_list
[section
->index
] = NULL
;
5013 /* The linker repeatedly calls this function for each input section,
5014 in the order that input sections are linked into output sections.
5015 Build lists of input sections to determine groupings between which
5016 we may insert linker stubs. */
5019 elf32_arm_next_input_section (struct bfd_link_info
*info
,
5022 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5027 if (isec
->output_section
->index
<= htab
->top_index
)
5029 asection
**list
= htab
->input_list
+ isec
->output_section
->index
;
5031 if (*list
!= bfd_abs_section_ptr
&& (isec
->flags
& SEC_CODE
) != 0)
5033 /* Steal the link_sec pointer for our list. */
5034 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5035 /* This happens to make the list in reverse order,
5036 which we reverse later. */
5037 PREV_SEC (isec
) = *list
;
5043 /* See whether we can group stub sections together. Grouping stub
5044 sections may result in fewer stubs. More importantly, we need to
5045 put all .init* and .fini* stubs at the end of the .init or
5046 .fini output sections respectively, because glibc splits the
5047 _init and _fini functions into multiple parts. Putting a stub in
5048 the middle of a function is not a good idea. */
5051 group_sections (struct elf32_arm_link_hash_table
*htab
,
5052 bfd_size_type stub_group_size
,
5053 bfd_boolean stubs_always_after_branch
)
5055 asection
**list
= htab
->input_list
;
5059 asection
*tail
= *list
;
5062 if (tail
== bfd_abs_section_ptr
)
5065 /* Reverse the list: we must avoid placing stubs at the
5066 beginning of the section because the beginning of the text
5067 section may be required for an interrupt vector in bare metal
5069 #define NEXT_SEC PREV_SEC
5071 while (tail
!= NULL
)
5073 /* Pop from tail. */
5074 asection
*item
= tail
;
5075 tail
= PREV_SEC (item
);
5078 NEXT_SEC (item
) = head
;
5082 while (head
!= NULL
)
5086 bfd_vma stub_group_start
= head
->output_offset
;
5087 bfd_vma end_of_next
;
5090 while (NEXT_SEC (curr
) != NULL
)
5092 next
= NEXT_SEC (curr
);
5093 end_of_next
= next
->output_offset
+ next
->size
;
5094 if (end_of_next
- stub_group_start
>= stub_group_size
)
5095 /* End of NEXT is too far from start, so stop. */
5097 /* Add NEXT to the group. */
5101 /* OK, the size from the start to the start of CURR is less
5102 than stub_group_size and thus can be handled by one stub
5103 section. (Or the head section is itself larger than
5104 stub_group_size, in which case we may be toast.)
5105 We should really be keeping track of the total size of
5106 stubs added here, as stubs contribute to the final output
5110 next
= NEXT_SEC (head
);
5111 /* Set up this stub group. */
5112 htab
->stub_group
[head
->id
].link_sec
= curr
;
5114 while (head
!= curr
&& (head
= next
) != NULL
);
5116 /* But wait, there's more! Input sections up to stub_group_size
5117 bytes after the stub section can be handled by it too. */
5118 if (!stubs_always_after_branch
)
5120 stub_group_start
= curr
->output_offset
+ curr
->size
;
5122 while (next
!= NULL
)
5124 end_of_next
= next
->output_offset
+ next
->size
;
5125 if (end_of_next
- stub_group_start
>= stub_group_size
)
5126 /* End of NEXT is too far from stubs, so stop. */
5128 /* Add NEXT to the stub group. */
5130 next
= NEXT_SEC (head
);
5131 htab
->stub_group
[head
->id
].link_sec
= curr
;
5137 while (list
++ != htab
->input_list
+ htab
->top_index
);
5139 free (htab
->input_list
);
5144 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5148 a8_reloc_compare (const void *a
, const void *b
)
5150 const struct a8_erratum_reloc
*ra
= (const struct a8_erratum_reloc
*) a
;
5151 const struct a8_erratum_reloc
*rb
= (const struct a8_erratum_reloc
*) b
;
5153 if (ra
->from
< rb
->from
)
5155 else if (ra
->from
> rb
->from
)
5161 static struct elf_link_hash_entry
*find_thumb_glue (struct bfd_link_info
*,
5162 const char *, char **);
5164 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5165 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5166 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5170 cortex_a8_erratum_scan (bfd
*input_bfd
,
5171 struct bfd_link_info
*info
,
5172 struct a8_erratum_fix
**a8_fixes_p
,
5173 unsigned int *num_a8_fixes_p
,
5174 unsigned int *a8_fix_table_size_p
,
5175 struct a8_erratum_reloc
*a8_relocs
,
5176 unsigned int num_a8_relocs
,
5177 unsigned prev_num_a8_fixes
,
5178 bfd_boolean
*stub_changed_p
)
5181 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
5182 struct a8_erratum_fix
*a8_fixes
= *a8_fixes_p
;
5183 unsigned int num_a8_fixes
= *num_a8_fixes_p
;
5184 unsigned int a8_fix_table_size
= *a8_fix_table_size_p
;
5189 for (section
= input_bfd
->sections
;
5191 section
= section
->next
)
5193 bfd_byte
*contents
= NULL
;
5194 struct _arm_elf_section_data
*sec_data
;
5198 if (elf_section_type (section
) != SHT_PROGBITS
5199 || (elf_section_flags (section
) & SHF_EXECINSTR
) == 0
5200 || (section
->flags
& SEC_EXCLUDE
) != 0
5201 || (section
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
)
5202 || (section
->output_section
== bfd_abs_section_ptr
))
5205 base_vma
= section
->output_section
->vma
+ section
->output_offset
;
5207 if (elf_section_data (section
)->this_hdr
.contents
!= NULL
)
5208 contents
= elf_section_data (section
)->this_hdr
.contents
;
5209 else if (! bfd_malloc_and_get_section (input_bfd
, section
, &contents
))
5212 sec_data
= elf32_arm_section_data (section
);
5214 for (span
= 0; span
< sec_data
->mapcount
; span
++)
5216 unsigned int span_start
= sec_data
->map
[span
].vma
;
5217 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
5218 ? section
->size
: sec_data
->map
[span
+ 1].vma
;
5220 char span_type
= sec_data
->map
[span
].type
;
5221 bfd_boolean last_was_32bit
= FALSE
, last_was_branch
= FALSE
;
5223 if (span_type
!= 't')
5226 /* Span is entirely within a single 4KB region: skip scanning. */
5227 if (((base_vma
+ span_start
) & ~0xfff)
5228 == ((base_vma
+ span_end
) & ~0xfff))
5231 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5233 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5234 * The branch target is in the same 4KB region as the
5235 first half of the branch.
5236 * The instruction before the branch is a 32-bit
5237 length non-branch instruction. */
5238 for (i
= span_start
; i
< span_end
;)
5240 unsigned int insn
= bfd_getl16 (&contents
[i
]);
5241 bfd_boolean insn_32bit
= FALSE
, is_blx
= FALSE
, is_b
= FALSE
;
5242 bfd_boolean is_bl
= FALSE
, is_bcc
= FALSE
, is_32bit_branch
;
5244 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
5249 /* Load the rest of the insn (in manual-friendly order). */
5250 insn
= (insn
<< 16) | bfd_getl16 (&contents
[i
+ 2]);
5252 /* Encoding T4: B<c>.W. */
5253 is_b
= (insn
& 0xf800d000) == 0xf0009000;
5254 /* Encoding T1: BL<c>.W. */
5255 is_bl
= (insn
& 0xf800d000) == 0xf000d000;
5256 /* Encoding T2: BLX<c>.W. */
5257 is_blx
= (insn
& 0xf800d000) == 0xf000c000;
5258 /* Encoding T3: B<c>.W (not permitted in IT block). */
5259 is_bcc
= (insn
& 0xf800d000) == 0xf0008000
5260 && (insn
& 0x07f00000) != 0x03800000;
5263 is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
5265 if (((base_vma
+ i
) & 0xfff) == 0xffe
5269 && ! last_was_branch
)
5271 bfd_signed_vma offset
= 0;
5272 bfd_boolean force_target_arm
= FALSE
;
5273 bfd_boolean force_target_thumb
= FALSE
;
5275 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
5276 struct a8_erratum_reloc key
, *found
;
5277 bfd_boolean use_plt
= FALSE
;
5279 key
.from
= base_vma
+ i
;
5280 found
= (struct a8_erratum_reloc
*)
5281 bsearch (&key
, a8_relocs
, num_a8_relocs
,
5282 sizeof (struct a8_erratum_reloc
),
5287 char *error_message
= NULL
;
5288 struct elf_link_hash_entry
*entry
;
5290 /* We don't care about the error returned from this
5291 function, only if there is glue or not. */
5292 entry
= find_thumb_glue (info
, found
->sym_name
,
5296 found
->non_a8_stub
= TRUE
;
5298 /* Keep a simpler condition, for the sake of clarity. */
5299 if (htab
->root
.splt
!= NULL
&& found
->hash
!= NULL
5300 && found
->hash
->root
.plt
.offset
!= (bfd_vma
) -1)
5303 if (found
->r_type
== R_ARM_THM_CALL
)
5305 if (found
->branch_type
== ST_BRANCH_TO_ARM
5307 force_target_arm
= TRUE
;
5309 force_target_thumb
= TRUE
;
5313 /* Check if we have an offending branch instruction. */
5315 if (found
&& found
->non_a8_stub
)
5316 /* We've already made a stub for this instruction, e.g.
5317 it's a long branch or a Thumb->ARM stub. Assume that
5318 stub will suffice to work around the A8 erratum (see
5319 setting of always_after_branch above). */
5323 offset
= (insn
& 0x7ff) << 1;
5324 offset
|= (insn
& 0x3f0000) >> 4;
5325 offset
|= (insn
& 0x2000) ? 0x40000 : 0;
5326 offset
|= (insn
& 0x800) ? 0x80000 : 0;
5327 offset
|= (insn
& 0x4000000) ? 0x100000 : 0;
5328 if (offset
& 0x100000)
5329 offset
|= ~ ((bfd_signed_vma
) 0xfffff);
5330 stub_type
= arm_stub_a8_veneer_b_cond
;
5332 else if (is_b
|| is_bl
|| is_blx
)
5334 int s
= (insn
& 0x4000000) != 0;
5335 int j1
= (insn
& 0x2000) != 0;
5336 int j2
= (insn
& 0x800) != 0;
5340 offset
= (insn
& 0x7ff) << 1;
5341 offset
|= (insn
& 0x3ff0000) >> 4;
5345 if (offset
& 0x1000000)
5346 offset
|= ~ ((bfd_signed_vma
) 0xffffff);
5349 offset
&= ~ ((bfd_signed_vma
) 3);
5351 stub_type
= is_blx
? arm_stub_a8_veneer_blx
:
5352 is_bl
? arm_stub_a8_veneer_bl
: arm_stub_a8_veneer_b
;
5355 if (stub_type
!= arm_stub_none
)
5357 bfd_vma pc_for_insn
= base_vma
+ i
+ 4;
5359 /* The original instruction is a BL, but the target is
5360 an ARM instruction. If we were not making a stub,
5361 the BL would have been converted to a BLX. Use the
5362 BLX stub instead in that case. */
5363 if (htab
->use_blx
&& force_target_arm
5364 && stub_type
== arm_stub_a8_veneer_bl
)
5366 stub_type
= arm_stub_a8_veneer_blx
;
5370 /* Conversely, if the original instruction was
5371 BLX but the target is Thumb mode, use the BL
5373 else if (force_target_thumb
5374 && stub_type
== arm_stub_a8_veneer_blx
)
5376 stub_type
= arm_stub_a8_veneer_bl
;
5382 pc_for_insn
&= ~ ((bfd_vma
) 3);
5384 /* If we found a relocation, use the proper destination,
5385 not the offset in the (unrelocated) instruction.
5386 Note this is always done if we switched the stub type
5390 (bfd_signed_vma
) (found
->destination
- pc_for_insn
);
5392 /* If the stub will use a Thumb-mode branch to a
5393 PLT target, redirect it to the preceding Thumb
5395 if (stub_type
!= arm_stub_a8_veneer_blx
&& use_plt
)
5396 offset
-= PLT_THUMB_STUB_SIZE
;
5398 target
= pc_for_insn
+ offset
;
5400 /* The BLX stub is ARM-mode code. Adjust the offset to
5401 take the different PC value (+8 instead of +4) into
5403 if (stub_type
== arm_stub_a8_veneer_blx
)
5406 if (((base_vma
+ i
) & ~0xfff) == (target
& ~0xfff))
5408 char *stub_name
= NULL
;
5410 if (num_a8_fixes
== a8_fix_table_size
)
5412 a8_fix_table_size
*= 2;
5413 a8_fixes
= (struct a8_erratum_fix
*)
5414 bfd_realloc (a8_fixes
,
5415 sizeof (struct a8_erratum_fix
)
5416 * a8_fix_table_size
);
5419 if (num_a8_fixes
< prev_num_a8_fixes
)
5421 /* If we're doing a subsequent scan,
5422 check if we've found the same fix as
5423 before, and try and reuse the stub
5425 stub_name
= a8_fixes
[num_a8_fixes
].stub_name
;
5426 if ((a8_fixes
[num_a8_fixes
].section
!= section
)
5427 || (a8_fixes
[num_a8_fixes
].offset
!= i
))
5431 *stub_changed_p
= TRUE
;
5437 stub_name
= (char *) bfd_malloc (8 + 1 + 8 + 1);
5438 if (stub_name
!= NULL
)
5439 sprintf (stub_name
, "%x:%x", section
->id
, i
);
5442 a8_fixes
[num_a8_fixes
].input_bfd
= input_bfd
;
5443 a8_fixes
[num_a8_fixes
].section
= section
;
5444 a8_fixes
[num_a8_fixes
].offset
= i
;
5445 a8_fixes
[num_a8_fixes
].target_offset
=
5447 a8_fixes
[num_a8_fixes
].orig_insn
= insn
;
5448 a8_fixes
[num_a8_fixes
].stub_name
= stub_name
;
5449 a8_fixes
[num_a8_fixes
].stub_type
= stub_type
;
5450 a8_fixes
[num_a8_fixes
].branch_type
=
5451 is_blx
? ST_BRANCH_TO_ARM
: ST_BRANCH_TO_THUMB
;
5458 i
+= insn_32bit
? 4 : 2;
5459 last_was_32bit
= insn_32bit
;
5460 last_was_branch
= is_32bit_branch
;
5464 if (elf_section_data (section
)->this_hdr
.contents
== NULL
)
5468 *a8_fixes_p
= a8_fixes
;
5469 *num_a8_fixes_p
= num_a8_fixes
;
5470 *a8_fix_table_size_p
= a8_fix_table_size
;
5475 /* Create or update a stub entry depending on whether the stub can already be
5476 found in HTAB. The stub is identified by:
5477 - its type STUB_TYPE
5478 - its source branch (note that several can share the same stub) whose
5479 section and relocation (if any) are given by SECTION and IRELA
5481 - its target symbol whose input section, hash, name, value and branch type
5482 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5485 If found, the value of the stub's target symbol is updated from SYM_VALUE
5486 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5487 TRUE and the stub entry is initialized.
5489 Returns the stub that was created or updated, or NULL if an error
5492 static struct elf32_arm_stub_hash_entry
*
5493 elf32_arm_create_stub (struct elf32_arm_link_hash_table
*htab
,
5494 enum elf32_arm_stub_type stub_type
, asection
*section
,
5495 Elf_Internal_Rela
*irela
, asection
*sym_sec
,
5496 struct elf32_arm_link_hash_entry
*hash
, char *sym_name
,
5497 bfd_vma sym_value
, enum arm_st_branch_type branch_type
,
5498 bfd_boolean
*new_stub
)
5500 const asection
*id_sec
;
5502 struct elf32_arm_stub_hash_entry
*stub_entry
;
5503 unsigned int r_type
;
5504 bfd_boolean sym_claimed
= arm_stub_sym_claimed (stub_type
);
5506 BFD_ASSERT (stub_type
!= arm_stub_none
);
5510 stub_name
= sym_name
;
5514 BFD_ASSERT (section
);
5515 BFD_ASSERT (section
->id
<= htab
->top_id
);
5517 /* Support for grouping stub sections. */
5518 id_sec
= htab
->stub_group
[section
->id
].link_sec
;
5520 /* Get the name of this stub. */
5521 stub_name
= elf32_arm_stub_name (id_sec
, sym_sec
, hash
, irela
,
5527 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
, FALSE
,
5529 /* The proper stub has already been created, just update its value. */
5530 if (stub_entry
!= NULL
)
5534 stub_entry
->target_value
= sym_value
;
5538 stub_entry
= elf32_arm_add_stub (stub_name
, section
, htab
, stub_type
);
5539 if (stub_entry
== NULL
)
5546 stub_entry
->target_value
= sym_value
;
5547 stub_entry
->target_section
= sym_sec
;
5548 stub_entry
->stub_type
= stub_type
;
5549 stub_entry
->h
= hash
;
5550 stub_entry
->branch_type
= branch_type
;
5553 stub_entry
->output_name
= sym_name
;
5556 if (sym_name
== NULL
)
5557 sym_name
= "unnamed";
5558 stub_entry
->output_name
= (char *)
5559 bfd_alloc (htab
->stub_bfd
, sizeof (THUMB2ARM_GLUE_ENTRY_NAME
)
5560 + strlen (sym_name
));
5561 if (stub_entry
->output_name
== NULL
)
5567 /* For historical reasons, use the existing names for ARM-to-Thumb and
5568 Thumb-to-ARM stubs. */
5569 r_type
= ELF32_R_TYPE (irela
->r_info
);
5570 if ((r_type
== (unsigned int) R_ARM_THM_CALL
5571 || r_type
== (unsigned int) R_ARM_THM_JUMP24
5572 || r_type
== (unsigned int) R_ARM_THM_JUMP19
)
5573 && branch_type
== ST_BRANCH_TO_ARM
)
5574 sprintf (stub_entry
->output_name
, THUMB2ARM_GLUE_ENTRY_NAME
, sym_name
);
5575 else if ((r_type
== (unsigned int) R_ARM_CALL
5576 || r_type
== (unsigned int) R_ARM_JUMP24
)
5577 && branch_type
== ST_BRANCH_TO_THUMB
)
5578 sprintf (stub_entry
->output_name
, ARM2THUMB_GLUE_ENTRY_NAME
, sym_name
);
5580 sprintf (stub_entry
->output_name
, STUB_ENTRY_NAME
, sym_name
);
5587 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5588 gateway veneer to transition from non secure to secure state and create them
5591 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5592 defines the conditions that govern Secure Gateway veneer creation for a
5593 given symbol <SYM> as follows:
5594 - it has function type
5595 - it has non local binding
5596 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5597 same type, binding and value as <SYM> (called normal symbol).
5598 An entry function can handle secure state transition itself in which case
5599 its special symbol would have a different value from the normal symbol.
5601 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5602 entry mapping while HTAB gives the name to hash entry mapping.
5603 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5606 The return value gives whether a stub failed to be allocated. */
5609 cmse_scan (bfd
*input_bfd
, struct elf32_arm_link_hash_table
*htab
,
5610 obj_attribute
*out_attr
, struct elf_link_hash_entry
**sym_hashes
,
5611 int *cmse_stub_created
)
5613 const struct elf_backend_data
*bed
;
5614 Elf_Internal_Shdr
*symtab_hdr
;
5615 unsigned i
, j
, sym_count
, ext_start
;
5616 Elf_Internal_Sym
*cmse_sym
, *local_syms
;
5617 struct elf32_arm_link_hash_entry
*hash
, *cmse_hash
= NULL
;
5618 enum arm_st_branch_type branch_type
;
5619 char *sym_name
, *lsym_name
;
5622 struct elf32_arm_stub_hash_entry
*stub_entry
;
5623 bfd_boolean is_v8m
, new_stub
, cmse_invalid
, ret
= TRUE
;
5625 bed
= get_elf_backend_data (input_bfd
);
5626 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
5627 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
5628 ext_start
= symtab_hdr
->sh_info
;
5629 is_v8m
= (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
5630 && out_attr
[Tag_CPU_arch_profile
].i
== 'M');
5632 local_syms
= (Elf_Internal_Sym
*) symtab_hdr
->contents
;
5633 if (local_syms
== NULL
)
5634 local_syms
= bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
5635 symtab_hdr
->sh_info
, 0, NULL
, NULL
,
5637 if (symtab_hdr
->sh_info
&& local_syms
== NULL
)
5641 for (i
= 0; i
< sym_count
; i
++)
5643 cmse_invalid
= FALSE
;
5647 cmse_sym
= &local_syms
[i
];
5648 /* Not a special symbol. */
5649 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym
->st_target_internal
))
5651 sym_name
= bfd_elf_string_from_elf_section (input_bfd
,
5652 symtab_hdr
->sh_link
,
5654 /* Special symbol with local binding. */
5655 cmse_invalid
= TRUE
;
5659 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
5660 sym_name
= (char *) cmse_hash
->root
.root
.root
.string
;
5662 /* Not a special symbol. */
5663 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
5666 /* Special symbol has incorrect binding or type. */
5667 if ((cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
5668 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5669 || cmse_hash
->root
.type
!= STT_FUNC
)
5670 cmse_invalid
= TRUE
;
5675 _bfd_error_handler (_("%B: Special symbol `%s' only allowed for "
5676 "ARMv8-M architecture or later."),
5677 input_bfd
, sym_name
);
5678 is_v8m
= TRUE
; /* Avoid multiple warning. */
5684 _bfd_error_handler (_("%B: invalid special symbol `%s'."),
5685 input_bfd
, sym_name
);
5686 _bfd_error_handler (_("It must be a global or weak function "
5693 sym_name
+= strlen (CMSE_PREFIX
);
5694 hash
= (struct elf32_arm_link_hash_entry
*)
5695 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
5697 /* No associated normal symbol or it is neither global nor weak. */
5699 || (hash
->root
.root
.type
!= bfd_link_hash_defined
5700 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5701 || hash
->root
.type
!= STT_FUNC
)
5703 /* Initialize here to avoid warning about use of possibly
5704 uninitialized variable. */
5709 /* Searching for a normal symbol with local binding. */
5710 for (; j
< ext_start
; j
++)
5713 bfd_elf_string_from_elf_section (input_bfd
,
5714 symtab_hdr
->sh_link
,
5715 local_syms
[j
].st_name
);
5716 if (!strcmp (sym_name
, lsym_name
))
5721 if (hash
|| j
< ext_start
)
5724 (_("%B: invalid standard symbol `%s'."), input_bfd
, sym_name
);
5726 (_("It must be a global or weak function symbol."));
5730 (_("%B: absent standard symbol `%s'."), input_bfd
, sym_name
);
5736 sym_value
= hash
->root
.root
.u
.def
.value
;
5737 section
= hash
->root
.root
.u
.def
.section
;
5739 if (cmse_hash
->root
.root
.u
.def
.section
!= section
)
5742 (_("%B: `%s' and its special symbol are in different sections."),
5743 input_bfd
, sym_name
);
5746 if (cmse_hash
->root
.root
.u
.def
.value
!= sym_value
)
5747 continue; /* Ignore: could be an entry function starting with SG. */
5749 /* If this section is a link-once section that will be discarded, then
5750 don't create any stubs. */
5751 if (section
->output_section
== NULL
)
5754 (_("%B: entry function `%s' not output."), input_bfd
, sym_name
);
5758 if (hash
->root
.size
== 0)
5761 (_("%B: entry function `%s' is empty."), input_bfd
, sym_name
);
5767 branch_type
= ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
5769 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
5770 NULL
, NULL
, section
, hash
, sym_name
,
5771 sym_value
, branch_type
, &new_stub
);
5773 if (stub_entry
== NULL
)
5777 BFD_ASSERT (new_stub
);
5778 (*cmse_stub_created
)++;
5782 if (!symtab_hdr
->contents
)
5787 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5788 code entry function, ie can be called from non secure code without using a
5792 cmse_entry_fct_p (struct elf32_arm_link_hash_entry
*hash
)
5794 bfd_byte contents
[4];
5795 uint32_t first_insn
;
5800 /* Defined symbol of function type. */
5801 if (hash
->root
.root
.type
!= bfd_link_hash_defined
5802 && hash
->root
.root
.type
!= bfd_link_hash_defweak
)
5804 if (hash
->root
.type
!= STT_FUNC
)
5807 /* Read first instruction. */
5808 section
= hash
->root
.root
.u
.def
.section
;
5809 abfd
= section
->owner
;
5810 offset
= hash
->root
.root
.u
.def
.value
- section
->vma
;
5811 if (!bfd_get_section_contents (abfd
, section
, contents
, offset
,
5815 first_insn
= bfd_get_32 (abfd
, contents
);
5817 /* Starts by SG instruction. */
5818 return first_insn
== 0xe97fe97f;
5821 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5822 secure gateway veneers (ie. the veneers was not in the input import library)
5823 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5826 arm_list_new_cmse_stub (struct bfd_hash_entry
*gen_entry
, void *gen_info
)
5828 struct elf32_arm_stub_hash_entry
*stub_entry
;
5829 struct bfd_link_info
*info
;
5831 /* Massage our args to the form they really have. */
5832 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
5833 info
= (struct bfd_link_info
*) gen_info
;
5835 if (info
->out_implib_bfd
)
5838 if (stub_entry
->stub_type
!= arm_stub_cmse_branch_thumb_only
)
5841 if (stub_entry
->stub_offset
== (bfd_vma
) -1)
5842 _bfd_error_handler (" %s", stub_entry
->output_name
);
5847 /* Set offset of each secure gateway veneers so that its address remain
5848 identical to the one in the input import library referred by
5849 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5850 (present in input import library but absent from the executable being
5851 linked) or if new veneers appeared and there is no output import library
5852 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5853 number of secure gateway veneers found in the input import library.
5855 The function returns whether an error occurred. If no error occurred,
5856 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5857 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5858 veneer observed set for new veneers to be layed out after. */
5861 set_cmse_veneer_addr_from_implib (struct bfd_link_info
*info
,
5862 struct elf32_arm_link_hash_table
*htab
,
5863 int *cmse_stub_created
)
5870 asection
*stub_out_sec
;
5871 bfd_boolean ret
= TRUE
;
5872 Elf_Internal_Sym
*intsym
;
5873 const char *out_sec_name
;
5874 bfd_size_type cmse_stub_size
;
5875 asymbol
**sympp
= NULL
, *sym
;
5876 struct elf32_arm_link_hash_entry
*hash
;
5877 const insn_sequence
*cmse_stub_template
;
5878 struct elf32_arm_stub_hash_entry
*stub_entry
;
5879 int cmse_stub_template_size
, new_cmse_stubs_created
= *cmse_stub_created
;
5880 bfd_vma veneer_value
, stub_offset
, next_cmse_stub_offset
;
5881 bfd_vma cmse_stub_array_start
= (bfd_vma
) -1, cmse_stub_sec_vma
= 0;
5883 /* No input secure gateway import library. */
5884 if (!htab
->in_implib_bfd
)
5887 in_implib_bfd
= htab
->in_implib_bfd
;
5888 if (!htab
->cmse_implib
)
5890 _bfd_error_handler (_("%B: --in-implib only supported for Secure "
5891 "Gateway import libraries."), in_implib_bfd
);
5895 /* Get symbol table size. */
5896 symsize
= bfd_get_symtab_upper_bound (in_implib_bfd
);
5900 /* Read in the input secure gateway import library's symbol table. */
5901 sympp
= (asymbol
**) xmalloc (symsize
);
5902 symcount
= bfd_canonicalize_symtab (in_implib_bfd
, sympp
);
5909 htab
->new_cmse_stub_offset
= 0;
5911 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only
,
5912 &cmse_stub_template
,
5913 &cmse_stub_template_size
);
5915 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only
);
5917 bfd_get_section_by_name (htab
->obfd
, out_sec_name
);
5918 if (stub_out_sec
!= NULL
)
5919 cmse_stub_sec_vma
= stub_out_sec
->vma
;
5921 /* Set addresses of veneers mentionned in input secure gateway import
5922 library's symbol table. */
5923 for (i
= 0; i
< symcount
; i
++)
5927 sym_name
= (char *) bfd_asymbol_name (sym
);
5928 intsym
= &((elf_symbol_type
*) sym
)->internal_elf_sym
;
5930 if (sym
->section
!= bfd_abs_section_ptr
5931 || !(flags
& (BSF_GLOBAL
| BSF_WEAK
))
5932 || (flags
& BSF_FUNCTION
) != BSF_FUNCTION
5933 || (ARM_GET_SYM_BRANCH_TYPE (intsym
->st_target_internal
)
5934 != ST_BRANCH_TO_THUMB
))
5936 _bfd_error_handler (_("%B: invalid import library entry: `%s'."),
5937 in_implib_bfd
, sym_name
);
5938 _bfd_error_handler (_("Symbol should be absolute, global and "
5939 "refer to Thumb functions."));
5944 veneer_value
= bfd_asymbol_value (sym
);
5945 stub_offset
= veneer_value
- cmse_stub_sec_vma
;
5946 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, sym_name
,
5948 hash
= (struct elf32_arm_link_hash_entry
*)
5949 elf_link_hash_lookup (&(htab
)->root
, sym_name
, FALSE
, FALSE
, TRUE
);
5951 /* Stub entry should have been created by cmse_scan or the symbol be of
5952 a secure function callable from non secure code. */
5953 if (!stub_entry
&& !hash
)
5955 bfd_boolean new_stub
;
5958 (_("Entry function `%s' disappeared from secure code."), sym_name
);
5959 hash
= (struct elf32_arm_link_hash_entry
*)
5960 elf_link_hash_lookup (&(htab
)->root
, sym_name
, TRUE
, TRUE
, TRUE
);
5962 = elf32_arm_create_stub (htab
, arm_stub_cmse_branch_thumb_only
,
5963 NULL
, NULL
, bfd_abs_section_ptr
, hash
,
5964 sym_name
, veneer_value
,
5965 ST_BRANCH_TO_THUMB
, &new_stub
);
5966 if (stub_entry
== NULL
)
5970 BFD_ASSERT (new_stub
);
5971 new_cmse_stubs_created
++;
5972 (*cmse_stub_created
)++;
5974 stub_entry
->stub_template_size
= stub_entry
->stub_size
= 0;
5975 stub_entry
->stub_offset
= stub_offset
;
5977 /* Symbol found is not callable from non secure code. */
5978 else if (!stub_entry
)
5980 if (!cmse_entry_fct_p (hash
))
5982 _bfd_error_handler (_("`%s' refers to a non entry function."),
5990 /* Only stubs for SG veneers should have been created. */
5991 BFD_ASSERT (stub_entry
->stub_type
== arm_stub_cmse_branch_thumb_only
);
5993 /* Check visibility hasn't changed. */
5994 if (!!(flags
& BSF_GLOBAL
)
5995 != (hash
->root
.root
.type
== bfd_link_hash_defined
))
5997 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd
,
6000 stub_entry
->stub_offset
= stub_offset
;
6003 /* Size should match that of a SG veneer. */
6004 if (intsym
->st_size
!= cmse_stub_size
)
6006 _bfd_error_handler (_("%B: incorrect size for symbol `%s'."),
6007 in_implib_bfd
, sym_name
);
6011 /* Previous veneer address is before current SG veneer section. */
6012 if (veneer_value
< cmse_stub_sec_vma
)
6014 /* Avoid offset underflow. */
6016 stub_entry
->stub_offset
= 0;
6021 /* Complain if stub offset not a multiple of stub size. */
6022 if (stub_offset
% cmse_stub_size
)
6025 (_("Offset of veneer for entry function `%s' not a multiple of "
6026 "its size."), sym_name
);
6033 new_cmse_stubs_created
--;
6034 if (veneer_value
< cmse_stub_array_start
)
6035 cmse_stub_array_start
= veneer_value
;
6036 next_cmse_stub_offset
= stub_offset
+ ((cmse_stub_size
+ 7) & ~7);
6037 if (next_cmse_stub_offset
> htab
->new_cmse_stub_offset
)
6038 htab
->new_cmse_stub_offset
= next_cmse_stub_offset
;
6041 if (!info
->out_implib_bfd
&& new_cmse_stubs_created
!= 0)
6043 BFD_ASSERT (new_cmse_stubs_created
> 0);
6045 (_("new entry function(s) introduced but no output import library "
6047 bfd_hash_traverse (&htab
->stub_hash_table
, arm_list_new_cmse_stub
, info
);
6050 if (cmse_stub_array_start
!= cmse_stub_sec_vma
)
6053 (_("Start address of `%s' is different from previous link."),
6063 /* Determine and set the size of the stub section for a final link.
6065 The basic idea here is to examine all the relocations looking for
6066 PC-relative calls to a target that is unreachable with a "bl"
6070 elf32_arm_size_stubs (bfd
*output_bfd
,
6072 struct bfd_link_info
*info
,
6073 bfd_signed_vma group_size
,
6074 asection
* (*add_stub_section
) (const char *, asection
*,
6077 void (*layout_sections_again
) (void))
6079 bfd_boolean ret
= TRUE
;
6080 obj_attribute
*out_attr
;
6081 int cmse_stub_created
= 0;
6082 bfd_size_type stub_group_size
;
6083 bfd_boolean m_profile
, stubs_always_after_branch
, first_veneer_scan
= TRUE
;
6084 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
6085 struct a8_erratum_fix
*a8_fixes
= NULL
;
6086 unsigned int num_a8_fixes
= 0, a8_fix_table_size
= 10;
6087 struct a8_erratum_reloc
*a8_relocs
= NULL
;
6088 unsigned int num_a8_relocs
= 0, a8_reloc_table_size
= 10, i
;
6093 if (htab
->fix_cortex_a8
)
6095 a8_fixes
= (struct a8_erratum_fix
*)
6096 bfd_zmalloc (sizeof (struct a8_erratum_fix
) * a8_fix_table_size
);
6097 a8_relocs
= (struct a8_erratum_reloc
*)
6098 bfd_zmalloc (sizeof (struct a8_erratum_reloc
) * a8_reloc_table_size
);
6101 /* Propagate mach to stub bfd, because it may not have been
6102 finalized when we created stub_bfd. */
6103 bfd_set_arch_mach (stub_bfd
, bfd_get_arch (output_bfd
),
6104 bfd_get_mach (output_bfd
));
6106 /* Stash our params away. */
6107 htab
->stub_bfd
= stub_bfd
;
6108 htab
->add_stub_section
= add_stub_section
;
6109 htab
->layout_sections_again
= layout_sections_again
;
6110 stubs_always_after_branch
= group_size
< 0;
6112 out_attr
= elf_known_obj_attributes_proc (output_bfd
);
6113 m_profile
= out_attr
[Tag_CPU_arch_profile
].i
== 'M';
6115 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6116 as the first half of a 32-bit branch straddling two 4K pages. This is a
6117 crude way of enforcing that. */
6118 if (htab
->fix_cortex_a8
)
6119 stubs_always_after_branch
= 1;
6122 stub_group_size
= -group_size
;
6124 stub_group_size
= group_size
;
6126 if (stub_group_size
== 1)
6128 /* Default values. */
6129 /* Thumb branch range is +-4MB has to be used as the default
6130 maximum size (a given section can contain both ARM and Thumb
6131 code, so the worst case has to be taken into account).
6133 This value is 24K less than that, which allows for 2025
6134 12-byte stubs. If we exceed that, then we will fail to link.
6135 The user will have to relink with an explicit group size
6137 stub_group_size
= 4170000;
6140 group_sections (htab
, stub_group_size
, stubs_always_after_branch
);
6142 /* If we're applying the cortex A8 fix, we need to determine the
6143 program header size now, because we cannot change it later --
6144 that could alter section placements. Notice the A8 erratum fix
6145 ends up requiring the section addresses to remain unchanged
6146 modulo the page size. That's something we cannot represent
6147 inside BFD, and we don't want to force the section alignment to
6148 be the page size. */
6149 if (htab
->fix_cortex_a8
)
6150 (*htab
->layout_sections_again
) ();
6155 unsigned int bfd_indx
;
6157 enum elf32_arm_stub_type stub_type
;
6158 bfd_boolean stub_changed
= FALSE
;
6159 unsigned prev_num_a8_fixes
= num_a8_fixes
;
6162 for (input_bfd
= info
->input_bfds
, bfd_indx
= 0;
6164 input_bfd
= input_bfd
->link
.next
, bfd_indx
++)
6166 Elf_Internal_Shdr
*symtab_hdr
;
6168 Elf_Internal_Sym
*local_syms
= NULL
;
6170 if (!is_arm_elf (input_bfd
))
6175 /* We'll need the symbol table in a second. */
6176 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
6177 if (symtab_hdr
->sh_info
== 0)
6180 /* Limit scan of symbols to object file whose profile is
6181 Microcontroller to not hinder performance in the general case. */
6182 if (m_profile
&& first_veneer_scan
)
6184 struct elf_link_hash_entry
**sym_hashes
;
6186 sym_hashes
= elf_sym_hashes (input_bfd
);
6187 if (!cmse_scan (input_bfd
, htab
, out_attr
, sym_hashes
,
6188 &cmse_stub_created
))
6189 goto error_ret_free_local
;
6191 if (cmse_stub_created
!= 0)
6192 stub_changed
= TRUE
;
6195 /* Walk over each section attached to the input bfd. */
6196 for (section
= input_bfd
->sections
;
6198 section
= section
->next
)
6200 Elf_Internal_Rela
*internal_relocs
, *irelaend
, *irela
;
6202 /* If there aren't any relocs, then there's nothing more
6204 if ((section
->flags
& SEC_RELOC
) == 0
6205 || section
->reloc_count
== 0
6206 || (section
->flags
& SEC_CODE
) == 0)
6209 /* If this section is a link-once section that will be
6210 discarded, then don't create any stubs. */
6211 if (section
->output_section
== NULL
6212 || section
->output_section
->owner
!= output_bfd
)
6215 /* Get the relocs. */
6217 = _bfd_elf_link_read_relocs (input_bfd
, section
, NULL
,
6218 NULL
, info
->keep_memory
);
6219 if (internal_relocs
== NULL
)
6220 goto error_ret_free_local
;
6222 /* Now examine each relocation. */
6223 irela
= internal_relocs
;
6224 irelaend
= irela
+ section
->reloc_count
;
6225 for (; irela
< irelaend
; irela
++)
6227 unsigned int r_type
, r_indx
;
6230 bfd_vma destination
;
6231 struct elf32_arm_link_hash_entry
*hash
;
6232 const char *sym_name
;
6233 unsigned char st_type
;
6234 enum arm_st_branch_type branch_type
;
6235 bfd_boolean created_stub
= FALSE
;
6237 r_type
= ELF32_R_TYPE (irela
->r_info
);
6238 r_indx
= ELF32_R_SYM (irela
->r_info
);
6240 if (r_type
>= (unsigned int) R_ARM_max
)
6242 bfd_set_error (bfd_error_bad_value
);
6243 error_ret_free_internal
:
6244 if (elf_section_data (section
)->relocs
== NULL
)
6245 free (internal_relocs
);
6247 error_ret_free_local
:
6248 if (local_syms
!= NULL
6249 && (symtab_hdr
->contents
6250 != (unsigned char *) local_syms
))
6256 if (r_indx
>= symtab_hdr
->sh_info
)
6257 hash
= elf32_arm_hash_entry
6258 (elf_sym_hashes (input_bfd
)
6259 [r_indx
- symtab_hdr
->sh_info
]);
6261 /* Only look for stubs on branch instructions, or
6262 non-relaxed TLSCALL */
6263 if ((r_type
!= (unsigned int) R_ARM_CALL
)
6264 && (r_type
!= (unsigned int) R_ARM_THM_CALL
)
6265 && (r_type
!= (unsigned int) R_ARM_JUMP24
)
6266 && (r_type
!= (unsigned int) R_ARM_THM_JUMP19
)
6267 && (r_type
!= (unsigned int) R_ARM_THM_XPC22
)
6268 && (r_type
!= (unsigned int) R_ARM_THM_JUMP24
)
6269 && (r_type
!= (unsigned int) R_ARM_PLT32
)
6270 && !((r_type
== (unsigned int) R_ARM_TLS_CALL
6271 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6272 && r_type
== elf32_arm_tls_transition
6273 (info
, r_type
, &hash
->root
)
6274 && ((hash
? hash
->tls_type
6275 : (elf32_arm_local_got_tls_type
6276 (input_bfd
)[r_indx
]))
6277 & GOT_TLS_GDESC
) != 0))
6280 /* Now determine the call target, its name, value,
6287 if (r_type
== (unsigned int) R_ARM_TLS_CALL
6288 || r_type
== (unsigned int) R_ARM_THM_TLS_CALL
)
6290 /* A non-relaxed TLS call. The target is the
6291 plt-resident trampoline and nothing to do
6293 BFD_ASSERT (htab
->tls_trampoline
> 0);
6294 sym_sec
= htab
->root
.splt
;
6295 sym_value
= htab
->tls_trampoline
;
6298 branch_type
= ST_BRANCH_TO_ARM
;
6302 /* It's a local symbol. */
6303 Elf_Internal_Sym
*sym
;
6305 if (local_syms
== NULL
)
6308 = (Elf_Internal_Sym
*) symtab_hdr
->contents
;
6309 if (local_syms
== NULL
)
6311 = bfd_elf_get_elf_syms (input_bfd
, symtab_hdr
,
6312 symtab_hdr
->sh_info
, 0,
6314 if (local_syms
== NULL
)
6315 goto error_ret_free_internal
;
6318 sym
= local_syms
+ r_indx
;
6319 if (sym
->st_shndx
== SHN_UNDEF
)
6320 sym_sec
= bfd_und_section_ptr
;
6321 else if (sym
->st_shndx
== SHN_ABS
)
6322 sym_sec
= bfd_abs_section_ptr
;
6323 else if (sym
->st_shndx
== SHN_COMMON
)
6324 sym_sec
= bfd_com_section_ptr
;
6327 bfd_section_from_elf_index (input_bfd
, sym
->st_shndx
);
6330 /* This is an undefined symbol. It can never
6334 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
6335 sym_value
= sym
->st_value
;
6336 destination
= (sym_value
+ irela
->r_addend
6337 + sym_sec
->output_offset
6338 + sym_sec
->output_section
->vma
);
6339 st_type
= ELF_ST_TYPE (sym
->st_info
);
6341 ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
6343 = bfd_elf_string_from_elf_section (input_bfd
,
6344 symtab_hdr
->sh_link
,
6349 /* It's an external symbol. */
6350 while (hash
->root
.root
.type
== bfd_link_hash_indirect
6351 || hash
->root
.root
.type
== bfd_link_hash_warning
)
6352 hash
= ((struct elf32_arm_link_hash_entry
*)
6353 hash
->root
.root
.u
.i
.link
);
6355 if (hash
->root
.root
.type
== bfd_link_hash_defined
6356 || hash
->root
.root
.type
== bfd_link_hash_defweak
)
6358 sym_sec
= hash
->root
.root
.u
.def
.section
;
6359 sym_value
= hash
->root
.root
.u
.def
.value
;
6361 struct elf32_arm_link_hash_table
*globals
=
6362 elf32_arm_hash_table (info
);
6364 /* For a destination in a shared library,
6365 use the PLT stub as target address to
6366 decide whether a branch stub is
6369 && globals
->root
.splt
!= NULL
6371 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6373 sym_sec
= globals
->root
.splt
;
6374 sym_value
= hash
->root
.plt
.offset
;
6375 if (sym_sec
->output_section
!= NULL
)
6376 destination
= (sym_value
6377 + sym_sec
->output_offset
6378 + sym_sec
->output_section
->vma
);
6380 else if (sym_sec
->output_section
!= NULL
)
6381 destination
= (sym_value
+ irela
->r_addend
6382 + sym_sec
->output_offset
6383 + sym_sec
->output_section
->vma
);
6385 else if ((hash
->root
.root
.type
== bfd_link_hash_undefined
)
6386 || (hash
->root
.root
.type
== bfd_link_hash_undefweak
))
6388 /* For a shared library, use the PLT stub as
6389 target address to decide whether a long
6390 branch stub is needed.
6391 For absolute code, they cannot be handled. */
6392 struct elf32_arm_link_hash_table
*globals
=
6393 elf32_arm_hash_table (info
);
6396 && globals
->root
.splt
!= NULL
6398 && hash
->root
.plt
.offset
!= (bfd_vma
) -1)
6400 sym_sec
= globals
->root
.splt
;
6401 sym_value
= hash
->root
.plt
.offset
;
6402 if (sym_sec
->output_section
!= NULL
)
6403 destination
= (sym_value
6404 + sym_sec
->output_offset
6405 + sym_sec
->output_section
->vma
);
6412 bfd_set_error (bfd_error_bad_value
);
6413 goto error_ret_free_internal
;
6415 st_type
= hash
->root
.type
;
6417 ARM_GET_SYM_BRANCH_TYPE (hash
->root
.target_internal
);
6418 sym_name
= hash
->root
.root
.root
.string
;
6423 bfd_boolean new_stub
;
6424 struct elf32_arm_stub_hash_entry
*stub_entry
;
6426 /* Determine what (if any) linker stub is needed. */
6427 stub_type
= arm_type_of_stub (info
, section
, irela
,
6428 st_type
, &branch_type
,
6429 hash
, destination
, sym_sec
,
6430 input_bfd
, sym_name
);
6431 if (stub_type
== arm_stub_none
)
6434 /* We've either created a stub for this reloc already,
6435 or we are about to. */
6437 elf32_arm_create_stub (htab
, stub_type
, section
, irela
,
6439 (char *) sym_name
, sym_value
,
6440 branch_type
, &new_stub
);
6442 created_stub
= stub_entry
!= NULL
;
6444 goto error_ret_free_internal
;
6448 stub_changed
= TRUE
;
6452 /* Look for relocations which might trigger Cortex-A8
6454 if (htab
->fix_cortex_a8
6455 && (r_type
== (unsigned int) R_ARM_THM_JUMP24
6456 || r_type
== (unsigned int) R_ARM_THM_JUMP19
6457 || r_type
== (unsigned int) R_ARM_THM_CALL
6458 || r_type
== (unsigned int) R_ARM_THM_XPC22
))
6460 bfd_vma from
= section
->output_section
->vma
6461 + section
->output_offset
6464 if ((from
& 0xfff) == 0xffe)
6466 /* Found a candidate. Note we haven't checked the
6467 destination is within 4K here: if we do so (and
6468 don't create an entry in a8_relocs) we can't tell
6469 that a branch should have been relocated when
6471 if (num_a8_relocs
== a8_reloc_table_size
)
6473 a8_reloc_table_size
*= 2;
6474 a8_relocs
= (struct a8_erratum_reloc
*)
6475 bfd_realloc (a8_relocs
,
6476 sizeof (struct a8_erratum_reloc
)
6477 * a8_reloc_table_size
);
6480 a8_relocs
[num_a8_relocs
].from
= from
;
6481 a8_relocs
[num_a8_relocs
].destination
= destination
;
6482 a8_relocs
[num_a8_relocs
].r_type
= r_type
;
6483 a8_relocs
[num_a8_relocs
].branch_type
= branch_type
;
6484 a8_relocs
[num_a8_relocs
].sym_name
= sym_name
;
6485 a8_relocs
[num_a8_relocs
].non_a8_stub
= created_stub
;
6486 a8_relocs
[num_a8_relocs
].hash
= hash
;
6493 /* We're done with the internal relocs, free them. */
6494 if (elf_section_data (section
)->relocs
== NULL
)
6495 free (internal_relocs
);
6498 if (htab
->fix_cortex_a8
)
6500 /* Sort relocs which might apply to Cortex-A8 erratum. */
6501 qsort (a8_relocs
, num_a8_relocs
,
6502 sizeof (struct a8_erratum_reloc
),
6505 /* Scan for branches which might trigger Cortex-A8 erratum. */
6506 if (cortex_a8_erratum_scan (input_bfd
, info
, &a8_fixes
,
6507 &num_a8_fixes
, &a8_fix_table_size
,
6508 a8_relocs
, num_a8_relocs
,
6509 prev_num_a8_fixes
, &stub_changed
)
6511 goto error_ret_free_local
;
6514 if (local_syms
!= NULL
6515 && symtab_hdr
->contents
!= (unsigned char *) local_syms
)
6517 if (!info
->keep_memory
)
6520 symtab_hdr
->contents
= (unsigned char *) local_syms
;
6524 if (first_veneer_scan
6525 && !set_cmse_veneer_addr_from_implib (info
, htab
,
6526 &cmse_stub_created
))
6529 if (prev_num_a8_fixes
!= num_a8_fixes
)
6530 stub_changed
= TRUE
;
6535 /* OK, we've added some stubs. Find out the new size of the
6537 for (stub_sec
= htab
->stub_bfd
->sections
;
6539 stub_sec
= stub_sec
->next
)
6541 /* Ignore non-stub sections. */
6542 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6548 /* Add new SG veneers after those already in the input import
6550 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6553 bfd_vma
*start_offset_p
;
6554 asection
**stub_sec_p
;
6556 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6557 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6558 if (start_offset_p
== NULL
)
6561 BFD_ASSERT (stub_sec_p
!= NULL
);
6562 if (*stub_sec_p
!= NULL
)
6563 (*stub_sec_p
)->size
= *start_offset_p
;
6566 /* Compute stub section size, considering padding. */
6567 bfd_hash_traverse (&htab
->stub_hash_table
, arm_size_one_stub
, htab
);
6568 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
;
6572 asection
**stub_sec_p
;
6574 padding
= arm_dedicated_stub_section_padding (stub_type
);
6575 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6576 /* Skip if no stub input section or no stub section padding
6578 if ((stub_sec_p
!= NULL
&& *stub_sec_p
== NULL
) || padding
== 0)
6580 /* Stub section padding required but no dedicated section. */
6581 BFD_ASSERT (stub_sec_p
);
6583 size
= (*stub_sec_p
)->size
;
6584 size
= (size
+ padding
- 1) & ~(padding
- 1);
6585 (*stub_sec_p
)->size
= size
;
6588 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6589 if (htab
->fix_cortex_a8
)
6590 for (i
= 0; i
< num_a8_fixes
; i
++)
6592 stub_sec
= elf32_arm_create_or_find_stub_sec (NULL
,
6593 a8_fixes
[i
].section
, htab
, a8_fixes
[i
].stub_type
);
6595 if (stub_sec
== NULL
)
6599 += find_stub_size_and_template (a8_fixes
[i
].stub_type
, NULL
,
6604 /* Ask the linker to do its stuff. */
6605 (*htab
->layout_sections_again
) ();
6606 first_veneer_scan
= FALSE
;
6609 /* Add stubs for Cortex-A8 erratum fixes now. */
6610 if (htab
->fix_cortex_a8
)
6612 for (i
= 0; i
< num_a8_fixes
; i
++)
6614 struct elf32_arm_stub_hash_entry
*stub_entry
;
6615 char *stub_name
= a8_fixes
[i
].stub_name
;
6616 asection
*section
= a8_fixes
[i
].section
;
6617 unsigned int section_id
= a8_fixes
[i
].section
->id
;
6618 asection
*link_sec
= htab
->stub_group
[section_id
].link_sec
;
6619 asection
*stub_sec
= htab
->stub_group
[section_id
].stub_sec
;
6620 const insn_sequence
*template_sequence
;
6621 int template_size
, size
= 0;
6623 stub_entry
= arm_stub_hash_lookup (&htab
->stub_hash_table
, stub_name
,
6625 if (stub_entry
== NULL
)
6627 _bfd_error_handler (_("%B: cannot create stub entry %s"),
6628 section
->owner
, stub_name
);
6632 stub_entry
->stub_sec
= stub_sec
;
6633 stub_entry
->stub_offset
= (bfd_vma
) -1;
6634 stub_entry
->id_sec
= link_sec
;
6635 stub_entry
->stub_type
= a8_fixes
[i
].stub_type
;
6636 stub_entry
->source_value
= a8_fixes
[i
].offset
;
6637 stub_entry
->target_section
= a8_fixes
[i
].section
;
6638 stub_entry
->target_value
= a8_fixes
[i
].target_offset
;
6639 stub_entry
->orig_insn
= a8_fixes
[i
].orig_insn
;
6640 stub_entry
->branch_type
= a8_fixes
[i
].branch_type
;
6642 size
= find_stub_size_and_template (a8_fixes
[i
].stub_type
,
6646 stub_entry
->stub_size
= size
;
6647 stub_entry
->stub_template
= template_sequence
;
6648 stub_entry
->stub_template_size
= template_size
;
6651 /* Stash the Cortex-A8 erratum fix array for use later in
6652 elf32_arm_write_section(). */
6653 htab
->a8_erratum_fixes
= a8_fixes
;
6654 htab
->num_a8_erratum_fixes
= num_a8_fixes
;
6658 htab
->a8_erratum_fixes
= NULL
;
6659 htab
->num_a8_erratum_fixes
= 0;
6664 /* Build all the stubs associated with the current output file. The
6665 stubs are kept in a hash table attached to the main linker hash
6666 table. We also set up the .plt entries for statically linked PIC
6667 functions here. This function is called via arm_elf_finish in the
6671 elf32_arm_build_stubs (struct bfd_link_info
*info
)
6674 struct bfd_hash_table
*table
;
6675 enum elf32_arm_stub_type stub_type
;
6676 struct elf32_arm_link_hash_table
*htab
;
6678 htab
= elf32_arm_hash_table (info
);
6682 for (stub_sec
= htab
->stub_bfd
->sections
;
6684 stub_sec
= stub_sec
->next
)
6688 /* Ignore non-stub sections. */
6689 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
6692 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6693 must at least be done for stub section requiring padding and for SG
6694 veneers to ensure that a non secure code branching to a removed SG
6695 veneer causes an error. */
6696 size
= stub_sec
->size
;
6697 stub_sec
->contents
= (unsigned char *) bfd_zalloc (htab
->stub_bfd
, size
);
6698 if (stub_sec
->contents
== NULL
&& size
!= 0)
6704 /* Add new SG veneers after those already in the input import library. */
6705 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
6707 bfd_vma
*start_offset_p
;
6708 asection
**stub_sec_p
;
6710 start_offset_p
= arm_new_stubs_start_offset_ptr (htab
, stub_type
);
6711 stub_sec_p
= arm_dedicated_stub_input_section_ptr (htab
, stub_type
);
6712 if (start_offset_p
== NULL
)
6715 BFD_ASSERT (stub_sec_p
!= NULL
);
6716 if (*stub_sec_p
!= NULL
)
6717 (*stub_sec_p
)->size
= *start_offset_p
;
6720 /* Build the stubs as directed by the stub hash table. */
6721 table
= &htab
->stub_hash_table
;
6722 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
6723 if (htab
->fix_cortex_a8
)
6725 /* Place the cortex a8 stubs last. */
6726 htab
->fix_cortex_a8
= -1;
6727 bfd_hash_traverse (table
, arm_build_one_stub
, info
);
6733 /* Locate the Thumb encoded calling stub for NAME. */
6735 static struct elf_link_hash_entry
*
6736 find_thumb_glue (struct bfd_link_info
*link_info
,
6738 char **error_message
)
6741 struct elf_link_hash_entry
*hash
;
6742 struct elf32_arm_link_hash_table
*hash_table
;
6744 /* We need a pointer to the armelf specific hash table. */
6745 hash_table
= elf32_arm_hash_table (link_info
);
6746 if (hash_table
== NULL
)
6749 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6750 + strlen (THUMB2ARM_GLUE_ENTRY_NAME
) + 1);
6752 BFD_ASSERT (tmp_name
);
6754 sprintf (tmp_name
, THUMB2ARM_GLUE_ENTRY_NAME
, name
);
6756 hash
= elf_link_hash_lookup
6757 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6760 && asprintf (error_message
, _("unable to find THUMB glue '%s' for '%s'"),
6761 tmp_name
, name
) == -1)
6762 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
6769 /* Locate the ARM encoded calling stub for NAME. */
6771 static struct elf_link_hash_entry
*
6772 find_arm_glue (struct bfd_link_info
*link_info
,
6774 char **error_message
)
6777 struct elf_link_hash_entry
*myh
;
6778 struct elf32_arm_link_hash_table
*hash_table
;
6780 /* We need a pointer to the elfarm specific hash table. */
6781 hash_table
= elf32_arm_hash_table (link_info
);
6782 if (hash_table
== NULL
)
6785 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6786 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
6788 BFD_ASSERT (tmp_name
);
6790 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
6792 myh
= elf_link_hash_lookup
6793 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6796 && asprintf (error_message
, _("unable to find ARM glue '%s' for '%s'"),
6797 tmp_name
, name
) == -1)
6798 *error_message
= (char *) bfd_errmsg (bfd_error_system_call
);
6805 /* ARM->Thumb glue (static images):
6809 ldr r12, __func_addr
6812 .word func @ behave as if you saw a ARM_32 reloc.
6819 .word func @ behave as if you saw a ARM_32 reloc.
6821 (relocatable images)
6824 ldr r12, __func_offset
6830 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6831 static const insn32 a2t1_ldr_insn
= 0xe59fc000;
6832 static const insn32 a2t2_bx_r12_insn
= 0xe12fff1c;
6833 static const insn32 a2t3_func_addr_insn
= 0x00000001;
6835 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6836 static const insn32 a2t1v5_ldr_insn
= 0xe51ff004;
6837 static const insn32 a2t2v5_func_addr_insn
= 0x00000001;
6839 #define ARM2THUMB_PIC_GLUE_SIZE 16
6840 static const insn32 a2t1p_ldr_insn
= 0xe59fc004;
6841 static const insn32 a2t2p_add_pc_insn
= 0xe08cc00f;
6842 static const insn32 a2t3p_bx_r12_insn
= 0xe12fff1c;
6844 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6848 __func_from_thumb: __func_from_thumb:
6850 nop ldr r6, __func_addr
6860 #define THUMB2ARM_GLUE_SIZE 8
6861 static const insn16 t2a1_bx_pc_insn
= 0x4778;
6862 static const insn16 t2a2_noop_insn
= 0x46c0;
6863 static const insn32 t2a3_b_insn
= 0xea000000;
6865 #define VFP11_ERRATUM_VENEER_SIZE 8
6866 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6867 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6869 #define ARM_BX_VENEER_SIZE 12
6870 static const insn32 armbx1_tst_insn
= 0xe3100001;
6871 static const insn32 armbx2_moveq_insn
= 0x01a0f000;
6872 static const insn32 armbx3_bx_insn
= 0xe12fff10;
6874 #ifndef ELFARM_NABI_C_INCLUDED
6876 arm_allocate_glue_section_space (bfd
* abfd
, bfd_size_type size
, const char * name
)
6879 bfd_byte
* contents
;
6883 /* Do not include empty glue sections in the output. */
6886 s
= bfd_get_linker_section (abfd
, name
);
6888 s
->flags
|= SEC_EXCLUDE
;
6893 BFD_ASSERT (abfd
!= NULL
);
6895 s
= bfd_get_linker_section (abfd
, name
);
6896 BFD_ASSERT (s
!= NULL
);
6898 contents
= (bfd_byte
*) bfd_alloc (abfd
, size
);
6900 BFD_ASSERT (s
->size
== size
);
6901 s
->contents
= contents
;
6905 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info
* info
)
6907 struct elf32_arm_link_hash_table
* globals
;
6909 globals
= elf32_arm_hash_table (info
);
6910 BFD_ASSERT (globals
!= NULL
);
6912 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6913 globals
->arm_glue_size
,
6914 ARM2THUMB_GLUE_SECTION_NAME
);
6916 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6917 globals
->thumb_glue_size
,
6918 THUMB2ARM_GLUE_SECTION_NAME
);
6920 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6921 globals
->vfp11_erratum_glue_size
,
6922 VFP11_ERRATUM_VENEER_SECTION_NAME
);
6924 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6925 globals
->stm32l4xx_erratum_glue_size
,
6926 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
6928 arm_allocate_glue_section_space (globals
->bfd_of_glue_owner
,
6929 globals
->bx_glue_size
,
6930 ARM_BX_GLUE_SECTION_NAME
);
6935 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6936 returns the symbol identifying the stub. */
6938 static struct elf_link_hash_entry
*
6939 record_arm_to_thumb_glue (struct bfd_link_info
* link_info
,
6940 struct elf_link_hash_entry
* h
)
6942 const char * name
= h
->root
.root
.string
;
6945 struct elf_link_hash_entry
* myh
;
6946 struct bfd_link_hash_entry
* bh
;
6947 struct elf32_arm_link_hash_table
* globals
;
6951 globals
= elf32_arm_hash_table (link_info
);
6952 BFD_ASSERT (globals
!= NULL
);
6953 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
6955 s
= bfd_get_linker_section
6956 (globals
->bfd_of_glue_owner
, ARM2THUMB_GLUE_SECTION_NAME
);
6958 BFD_ASSERT (s
!= NULL
);
6960 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen (name
)
6961 + strlen (ARM2THUMB_GLUE_ENTRY_NAME
) + 1);
6963 BFD_ASSERT (tmp_name
);
6965 sprintf (tmp_name
, ARM2THUMB_GLUE_ENTRY_NAME
, name
);
6967 myh
= elf_link_hash_lookup
6968 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
6972 /* We've already seen this guy. */
6977 /* The only trick here is using hash_table->arm_glue_size as the value.
6978 Even though the section isn't allocated yet, this is where we will be
6979 putting it. The +1 on the value marks that the stub has not been
6980 output yet - not that it is a Thumb function. */
6982 val
= globals
->arm_glue_size
+ 1;
6983 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
6984 tmp_name
, BSF_GLOBAL
, s
, val
,
6985 NULL
, TRUE
, FALSE
, &bh
);
6987 myh
= (struct elf_link_hash_entry
*) bh
;
6988 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
6989 myh
->forced_local
= 1;
6993 if (bfd_link_pic (link_info
)
6994 || globals
->root
.is_relocatable_executable
6995 || globals
->pic_veneer
)
6996 size
= ARM2THUMB_PIC_GLUE_SIZE
;
6997 else if (globals
->use_blx
)
6998 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
7000 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
7003 globals
->arm_glue_size
+= size
;
7008 /* Allocate space for ARMv4 BX veneers. */
7011 record_arm_bx_glue (struct bfd_link_info
* link_info
, int reg
)
7014 struct elf32_arm_link_hash_table
*globals
;
7016 struct elf_link_hash_entry
*myh
;
7017 struct bfd_link_hash_entry
*bh
;
7020 /* BX PC does not need a veneer. */
7024 globals
= elf32_arm_hash_table (link_info
);
7025 BFD_ASSERT (globals
!= NULL
);
7026 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
7028 /* Check if this veneer has already been allocated. */
7029 if (globals
->bx_glue_offset
[reg
])
7032 s
= bfd_get_linker_section
7033 (globals
->bfd_of_glue_owner
, ARM_BX_GLUE_SECTION_NAME
);
7035 BFD_ASSERT (s
!= NULL
);
7037 /* Add symbol for veneer. */
7039 bfd_malloc ((bfd_size_type
) strlen (ARM_BX_GLUE_ENTRY_NAME
) + 1);
7041 BFD_ASSERT (tmp_name
);
7043 sprintf (tmp_name
, ARM_BX_GLUE_ENTRY_NAME
, reg
);
7045 myh
= elf_link_hash_lookup
7046 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7048 BFD_ASSERT (myh
== NULL
);
7051 val
= globals
->bx_glue_size
;
7052 _bfd_generic_link_add_one_symbol (link_info
, globals
->bfd_of_glue_owner
,
7053 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7054 NULL
, TRUE
, FALSE
, &bh
);
7056 myh
= (struct elf_link_hash_entry
*) bh
;
7057 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7058 myh
->forced_local
= 1;
7060 s
->size
+= ARM_BX_VENEER_SIZE
;
7061 globals
->bx_glue_offset
[reg
] = globals
->bx_glue_size
| 2;
7062 globals
->bx_glue_size
+= ARM_BX_VENEER_SIZE
;
7066 /* Add an entry to the code/data map for section SEC. */
7069 elf32_arm_section_map_add (asection
*sec
, char type
, bfd_vma vma
)
7071 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
7072 unsigned int newidx
;
7074 if (sec_data
->map
== NULL
)
7076 sec_data
->map
= (elf32_arm_section_map
*)
7077 bfd_malloc (sizeof (elf32_arm_section_map
));
7078 sec_data
->mapcount
= 0;
7079 sec_data
->mapsize
= 1;
7082 newidx
= sec_data
->mapcount
++;
7084 if (sec_data
->mapcount
> sec_data
->mapsize
)
7086 sec_data
->mapsize
*= 2;
7087 sec_data
->map
= (elf32_arm_section_map
*)
7088 bfd_realloc_or_free (sec_data
->map
, sec_data
->mapsize
7089 * sizeof (elf32_arm_section_map
));
7094 sec_data
->map
[newidx
].vma
= vma
;
7095 sec_data
->map
[newidx
].type
= type
;
7100 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7101 veneers are handled for now. */
7104 record_vfp11_erratum_veneer (struct bfd_link_info
*link_info
,
7105 elf32_vfp11_erratum_list
*branch
,
7107 asection
*branch_sec
,
7108 unsigned int offset
)
7111 struct elf32_arm_link_hash_table
*hash_table
;
7113 struct elf_link_hash_entry
*myh
;
7114 struct bfd_link_hash_entry
*bh
;
7116 struct _arm_elf_section_data
*sec_data
;
7117 elf32_vfp11_erratum_list
*newerr
;
7119 hash_table
= elf32_arm_hash_table (link_info
);
7120 BFD_ASSERT (hash_table
!= NULL
);
7121 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7123 s
= bfd_get_linker_section
7124 (hash_table
->bfd_of_glue_owner
, VFP11_ERRATUM_VENEER_SECTION_NAME
);
7126 sec_data
= elf32_arm_section_data (s
);
7128 BFD_ASSERT (s
!= NULL
);
7130 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7131 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7133 BFD_ASSERT (tmp_name
);
7135 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
7136 hash_table
->num_vfp11_fixes
);
7138 myh
= elf_link_hash_lookup
7139 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7141 BFD_ASSERT (myh
== NULL
);
7144 val
= hash_table
->vfp11_erratum_glue_size
;
7145 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7146 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7147 NULL
, TRUE
, FALSE
, &bh
);
7149 myh
= (struct elf_link_hash_entry
*) bh
;
7150 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7151 myh
->forced_local
= 1;
7153 /* Link veneer back to calling location. */
7154 sec_data
->erratumcount
+= 1;
7155 newerr
= (elf32_vfp11_erratum_list
*)
7156 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
7158 newerr
->type
= VFP11_ERRATUM_ARM_VENEER
;
7160 newerr
->u
.v
.branch
= branch
;
7161 newerr
->u
.v
.id
= hash_table
->num_vfp11_fixes
;
7162 branch
->u
.b
.veneer
= newerr
;
7164 newerr
->next
= sec_data
->erratumlist
;
7165 sec_data
->erratumlist
= newerr
;
7167 /* A symbol for the return from the veneer. */
7168 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
7169 hash_table
->num_vfp11_fixes
);
7171 myh
= elf_link_hash_lookup
7172 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7179 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7180 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7182 myh
= (struct elf_link_hash_entry
*) bh
;
7183 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7184 myh
->forced_local
= 1;
7188 /* Generate a mapping symbol for the veneer section, and explicitly add an
7189 entry for that symbol to the code/data map for the section. */
7190 if (hash_table
->vfp11_erratum_glue_size
== 0)
7193 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7194 ever requires this erratum fix. */
7195 _bfd_generic_link_add_one_symbol (link_info
,
7196 hash_table
->bfd_of_glue_owner
, "$a",
7197 BSF_LOCAL
, s
, 0, NULL
,
7200 myh
= (struct elf_link_hash_entry
*) bh
;
7201 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7202 myh
->forced_local
= 1;
7204 /* The elf32_arm_init_maps function only cares about symbols from input
7205 BFDs. We must make a note of this generated mapping symbol
7206 ourselves so that code byteswapping works properly in
7207 elf32_arm_write_section. */
7208 elf32_arm_section_map_add (s
, 'a', 0);
7211 s
->size
+= VFP11_ERRATUM_VENEER_SIZE
;
7212 hash_table
->vfp11_erratum_glue_size
+= VFP11_ERRATUM_VENEER_SIZE
;
7213 hash_table
->num_vfp11_fixes
++;
7215 /* The offset of the veneer. */
7219 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7220 veneers need to be handled because used only in Cortex-M. */
7223 record_stm32l4xx_erratum_veneer (struct bfd_link_info
*link_info
,
7224 elf32_stm32l4xx_erratum_list
*branch
,
7226 asection
*branch_sec
,
7227 unsigned int offset
,
7228 bfd_size_type veneer_size
)
7231 struct elf32_arm_link_hash_table
*hash_table
;
7233 struct elf_link_hash_entry
*myh
;
7234 struct bfd_link_hash_entry
*bh
;
7236 struct _arm_elf_section_data
*sec_data
;
7237 elf32_stm32l4xx_erratum_list
*newerr
;
7239 hash_table
= elf32_arm_hash_table (link_info
);
7240 BFD_ASSERT (hash_table
!= NULL
);
7241 BFD_ASSERT (hash_table
->bfd_of_glue_owner
!= NULL
);
7243 s
= bfd_get_linker_section
7244 (hash_table
->bfd_of_glue_owner
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7246 BFD_ASSERT (s
!= NULL
);
7248 sec_data
= elf32_arm_section_data (s
);
7250 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
7251 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
7253 BFD_ASSERT (tmp_name
);
7255 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
7256 hash_table
->num_stm32l4xx_fixes
);
7258 myh
= elf_link_hash_lookup
7259 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7261 BFD_ASSERT (myh
== NULL
);
7264 val
= hash_table
->stm32l4xx_erratum_glue_size
;
7265 _bfd_generic_link_add_one_symbol (link_info
, hash_table
->bfd_of_glue_owner
,
7266 tmp_name
, BSF_FUNCTION
| BSF_LOCAL
, s
, val
,
7267 NULL
, TRUE
, FALSE
, &bh
);
7269 myh
= (struct elf_link_hash_entry
*) bh
;
7270 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7271 myh
->forced_local
= 1;
7273 /* Link veneer back to calling location. */
7274 sec_data
->stm32l4xx_erratumcount
+= 1;
7275 newerr
= (elf32_stm32l4xx_erratum_list
*)
7276 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list
));
7278 newerr
->type
= STM32L4XX_ERRATUM_VENEER
;
7280 newerr
->u
.v
.branch
= branch
;
7281 newerr
->u
.v
.id
= hash_table
->num_stm32l4xx_fixes
;
7282 branch
->u
.b
.veneer
= newerr
;
7284 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
7285 sec_data
->stm32l4xx_erratumlist
= newerr
;
7287 /* A symbol for the return from the veneer. */
7288 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
7289 hash_table
->num_stm32l4xx_fixes
);
7291 myh
= elf_link_hash_lookup
7292 (&(hash_table
)->root
, tmp_name
, FALSE
, FALSE
, FALSE
);
7299 _bfd_generic_link_add_one_symbol (link_info
, branch_bfd
, tmp_name
, BSF_LOCAL
,
7300 branch_sec
, val
, NULL
, TRUE
, FALSE
, &bh
);
7302 myh
= (struct elf_link_hash_entry
*) bh
;
7303 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
7304 myh
->forced_local
= 1;
7308 /* Generate a mapping symbol for the veneer section, and explicitly add an
7309 entry for that symbol to the code/data map for the section. */
7310 if (hash_table
->stm32l4xx_erratum_glue_size
== 0)
7313 /* Creates a THUMB symbol since there is no other choice. */
7314 _bfd_generic_link_add_one_symbol (link_info
,
7315 hash_table
->bfd_of_glue_owner
, "$t",
7316 BSF_LOCAL
, s
, 0, NULL
,
7319 myh
= (struct elf_link_hash_entry
*) bh
;
7320 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
7321 myh
->forced_local
= 1;
7323 /* The elf32_arm_init_maps function only cares about symbols from input
7324 BFDs. We must make a note of this generated mapping symbol
7325 ourselves so that code byteswapping works properly in
7326 elf32_arm_write_section. */
7327 elf32_arm_section_map_add (s
, 't', 0);
7330 s
->size
+= veneer_size
;
7331 hash_table
->stm32l4xx_erratum_glue_size
+= veneer_size
;
7332 hash_table
->num_stm32l4xx_fixes
++;
7334 /* The offset of the veneer. */
7338 #define ARM_GLUE_SECTION_FLAGS \
7339 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7340 | SEC_READONLY | SEC_LINKER_CREATED)
7342 /* Create a fake section for use by the ARM backend of the linker. */
7345 arm_make_glue_section (bfd
* abfd
, const char * name
)
7349 sec
= bfd_get_linker_section (abfd
, name
);
7354 sec
= bfd_make_section_anyway_with_flags (abfd
, name
, ARM_GLUE_SECTION_FLAGS
);
7357 || !bfd_set_section_alignment (abfd
, sec
, 2))
7360 /* Set the gc mark to prevent the section from being removed by garbage
7361 collection, despite the fact that no relocs refer to this section. */
7367 /* Set size of .plt entries. This function is called from the
7368 linker scripts in ld/emultempl/{armelf}.em. */
7371 bfd_elf32_arm_use_long_plt (void)
7373 elf32_arm_use_long_plt_entry
= TRUE
;
7376 /* Add the glue sections to ABFD. This function is called from the
7377 linker scripts in ld/emultempl/{armelf}.em. */
7380 bfd_elf32_arm_add_glue_sections_to_bfd (bfd
*abfd
,
7381 struct bfd_link_info
*info
)
7383 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
7384 bfd_boolean dostm32l4xx
= globals
7385 && globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
;
7386 bfd_boolean addglue
;
7388 /* If we are only performing a partial
7389 link do not bother adding the glue. */
7390 if (bfd_link_relocatable (info
))
7393 addglue
= arm_make_glue_section (abfd
, ARM2THUMB_GLUE_SECTION_NAME
)
7394 && arm_make_glue_section (abfd
, THUMB2ARM_GLUE_SECTION_NAME
)
7395 && arm_make_glue_section (abfd
, VFP11_ERRATUM_VENEER_SECTION_NAME
)
7396 && arm_make_glue_section (abfd
, ARM_BX_GLUE_SECTION_NAME
);
7402 && arm_make_glue_section (abfd
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
);
7405 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7406 ensures they are not marked for deletion by
7407 strip_excluded_output_sections () when veneers are going to be created
7408 later. Not doing so would trigger assert on empty section size in
7409 lang_size_sections_1 (). */
7412 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info
*info
)
7414 enum elf32_arm_stub_type stub_type
;
7416 /* If we are only performing a partial
7417 link do not bother adding the glue. */
7418 if (bfd_link_relocatable (info
))
7421 for (stub_type
= arm_stub_none
+ 1; stub_type
< max_stub_type
; stub_type
++)
7424 const char *out_sec_name
;
7426 if (!arm_dedicated_stub_output_section_required (stub_type
))
7429 out_sec_name
= arm_dedicated_stub_output_section_name (stub_type
);
7430 out_sec
= bfd_get_section_by_name (info
->output_bfd
, out_sec_name
);
7431 if (out_sec
!= NULL
)
7432 out_sec
->flags
|= SEC_KEEP
;
7436 /* Select a BFD to be used to hold the sections used by the glue code.
7437 This function is called from the linker scripts in ld/emultempl/
7441 bfd_elf32_arm_get_bfd_for_interworking (bfd
*abfd
, struct bfd_link_info
*info
)
7443 struct elf32_arm_link_hash_table
*globals
;
7445 /* If we are only performing a partial link
7446 do not bother getting a bfd to hold the glue. */
7447 if (bfd_link_relocatable (info
))
7450 /* Make sure we don't attach the glue sections to a dynamic object. */
7451 BFD_ASSERT (!(abfd
->flags
& DYNAMIC
));
7453 globals
= elf32_arm_hash_table (info
);
7454 BFD_ASSERT (globals
!= NULL
);
7456 if (globals
->bfd_of_glue_owner
!= NULL
)
7459 /* Save the bfd for later use. */
7460 globals
->bfd_of_glue_owner
= abfd
;
7466 check_use_blx (struct elf32_arm_link_hash_table
*globals
)
7470 cpu_arch
= bfd_elf_get_obj_attr_int (globals
->obfd
, OBJ_ATTR_PROC
,
7473 if (globals
->fix_arm1176
)
7475 if (cpu_arch
== TAG_CPU_ARCH_V6T2
|| cpu_arch
> TAG_CPU_ARCH_V6K
)
7476 globals
->use_blx
= 1;
7480 if (cpu_arch
> TAG_CPU_ARCH_V4T
)
7481 globals
->use_blx
= 1;
7486 bfd_elf32_arm_process_before_allocation (bfd
*abfd
,
7487 struct bfd_link_info
*link_info
)
7489 Elf_Internal_Shdr
*symtab_hdr
;
7490 Elf_Internal_Rela
*internal_relocs
= NULL
;
7491 Elf_Internal_Rela
*irel
, *irelend
;
7492 bfd_byte
*contents
= NULL
;
7495 struct elf32_arm_link_hash_table
*globals
;
7497 /* If we are only performing a partial link do not bother
7498 to construct any glue. */
7499 if (bfd_link_relocatable (link_info
))
7502 /* Here we have a bfd that is to be included on the link. We have a
7503 hook to do reloc rummaging, before section sizes are nailed down. */
7504 globals
= elf32_arm_hash_table (link_info
);
7505 BFD_ASSERT (globals
!= NULL
);
7507 check_use_blx (globals
);
7509 if (globals
->byteswap_code
&& !bfd_big_endian (abfd
))
7511 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7516 /* PR 5398: If we have not decided to include any loadable sections in
7517 the output then we will not have a glue owner bfd. This is OK, it
7518 just means that there is nothing else for us to do here. */
7519 if (globals
->bfd_of_glue_owner
== NULL
)
7522 /* Rummage around all the relocs and map the glue vectors. */
7523 sec
= abfd
->sections
;
7528 for (; sec
!= NULL
; sec
= sec
->next
)
7530 if (sec
->reloc_count
== 0)
7533 if ((sec
->flags
& SEC_EXCLUDE
) != 0)
7536 symtab_hdr
= & elf_symtab_hdr (abfd
);
7538 /* Load the relocs. */
7540 = _bfd_elf_link_read_relocs (abfd
, sec
, NULL
, NULL
, FALSE
);
7542 if (internal_relocs
== NULL
)
7545 irelend
= internal_relocs
+ sec
->reloc_count
;
7546 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
7549 unsigned long r_index
;
7551 struct elf_link_hash_entry
*h
;
7553 r_type
= ELF32_R_TYPE (irel
->r_info
);
7554 r_index
= ELF32_R_SYM (irel
->r_info
);
7556 /* These are the only relocation types we care about. */
7557 if ( r_type
!= R_ARM_PC24
7558 && (r_type
!= R_ARM_V4BX
|| globals
->fix_v4bx
< 2))
7561 /* Get the section contents if we haven't done so already. */
7562 if (contents
== NULL
)
7564 /* Get cached copy if it exists. */
7565 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
7566 contents
= elf_section_data (sec
)->this_hdr
.contents
;
7569 /* Go get them off disk. */
7570 if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
7575 if (r_type
== R_ARM_V4BX
)
7579 reg
= bfd_get_32 (abfd
, contents
+ irel
->r_offset
) & 0xf;
7580 record_arm_bx_glue (link_info
, reg
);
7584 /* If the relocation is not against a symbol it cannot concern us. */
7587 /* We don't care about local symbols. */
7588 if (r_index
< symtab_hdr
->sh_info
)
7591 /* This is an external symbol. */
7592 r_index
-= symtab_hdr
->sh_info
;
7593 h
= (struct elf_link_hash_entry
*)
7594 elf_sym_hashes (abfd
)[r_index
];
7596 /* If the relocation is against a static symbol it must be within
7597 the current section and so cannot be a cross ARM/Thumb relocation. */
7601 /* If the call will go through a PLT entry then we do not need
7603 if (globals
->root
.splt
!= NULL
&& h
->plt
.offset
!= (bfd_vma
) -1)
7609 /* This one is a call from arm code. We need to look up
7610 the target of the call. If it is a thumb target, we
7612 if (ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
7613 == ST_BRANCH_TO_THUMB
)
7614 record_arm_to_thumb_glue (link_info
, h
);
7622 if (contents
!= NULL
7623 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7627 if (internal_relocs
!= NULL
7628 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7629 free (internal_relocs
);
7630 internal_relocs
= NULL
;
7636 if (contents
!= NULL
7637 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
7639 if (internal_relocs
!= NULL
7640 && elf_section_data (sec
)->relocs
!= internal_relocs
)
7641 free (internal_relocs
);
7648 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7651 bfd_elf32_arm_init_maps (bfd
*abfd
)
7653 Elf_Internal_Sym
*isymbuf
;
7654 Elf_Internal_Shdr
*hdr
;
7655 unsigned int i
, localsyms
;
7657 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7658 if (! is_arm_elf (abfd
))
7661 if ((abfd
->flags
& DYNAMIC
) != 0)
7664 hdr
= & elf_symtab_hdr (abfd
);
7665 localsyms
= hdr
->sh_info
;
7667 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7668 should contain the number of local symbols, which should come before any
7669 global symbols. Mapping symbols are always local. */
7670 isymbuf
= bfd_elf_get_elf_syms (abfd
, hdr
, localsyms
, 0, NULL
, NULL
,
7673 /* No internal symbols read? Skip this BFD. */
7674 if (isymbuf
== NULL
)
7677 for (i
= 0; i
< localsyms
; i
++)
7679 Elf_Internal_Sym
*isym
= &isymbuf
[i
];
7680 asection
*sec
= bfd_section_from_elf_index (abfd
, isym
->st_shndx
);
7684 && ELF_ST_BIND (isym
->st_info
) == STB_LOCAL
)
7686 name
= bfd_elf_string_from_elf_section (abfd
,
7687 hdr
->sh_link
, isym
->st_name
);
7689 if (bfd_is_arm_special_symbol_name (name
,
7690 BFD_ARM_SPECIAL_SYM_TYPE_MAP
))
7691 elf32_arm_section_map_add (sec
, name
[1], isym
->st_value
);
7697 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7698 say what they wanted. */
7701 bfd_elf32_arm_set_cortex_a8_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7703 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7704 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7706 if (globals
== NULL
)
7709 if (globals
->fix_cortex_a8
== -1)
7711 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7712 if (out_attr
[Tag_CPU_arch
].i
== TAG_CPU_ARCH_V7
7713 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
7714 || out_attr
[Tag_CPU_arch_profile
].i
== 0))
7715 globals
->fix_cortex_a8
= 1;
7717 globals
->fix_cortex_a8
= 0;
7723 bfd_elf32_arm_set_vfp11_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7725 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7726 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7728 if (globals
== NULL
)
7730 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7731 if (out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V7
)
7733 switch (globals
->vfp11_fix
)
7735 case BFD_ARM_VFP11_FIX_DEFAULT
:
7736 case BFD_ARM_VFP11_FIX_NONE
:
7737 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
7741 /* Give a warning, but do as the user requests anyway. */
7742 _bfd_error_handler (_("%B: warning: selected VFP11 erratum "
7743 "workaround is not necessary for target architecture"), obfd
);
7746 else if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_DEFAULT
)
7747 /* For earlier architectures, we might need the workaround, but do not
7748 enable it by default. If users is running with broken hardware, they
7749 must enable the erratum fix explicitly. */
7750 globals
->vfp11_fix
= BFD_ARM_VFP11_FIX_NONE
;
7754 bfd_elf32_arm_set_stm32l4xx_fix (bfd
*obfd
, struct bfd_link_info
*link_info
)
7756 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
7757 obj_attribute
*out_attr
= elf_known_obj_attributes_proc (obfd
);
7759 if (globals
== NULL
)
7762 /* We assume only Cortex-M4 may require the fix. */
7763 if (out_attr
[Tag_CPU_arch
].i
!= TAG_CPU_ARCH_V7E_M
7764 || out_attr
[Tag_CPU_arch_profile
].i
!= 'M')
7766 if (globals
->stm32l4xx_fix
!= BFD_ARM_STM32L4XX_FIX_NONE
)
7767 /* Give a warning, but do as the user requests anyway. */
7769 (_("%B: warning: selected STM32L4XX erratum "
7770 "workaround is not necessary for target architecture"), obfd
);
7774 enum bfd_arm_vfp11_pipe
7782 /* Return a VFP register number. This is encoded as RX:X for single-precision
7783 registers, or X:RX for double-precision registers, where RX is the group of
7784 four bits in the instruction encoding and X is the single extension bit.
7785 RX and X fields are specified using their lowest (starting) bit. The return
7788 0...31: single-precision registers s0...s31
7789 32...63: double-precision registers d0...d31.
7791 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7792 encounter VFP3 instructions, so we allow the full range for DP registers. */
7795 bfd_arm_vfp11_regno (unsigned int insn
, bfd_boolean is_double
, unsigned int rx
,
7799 return (((insn
>> rx
) & 0xf) | (((insn
>> x
) & 1) << 4)) + 32;
7801 return (((insn
>> rx
) & 0xf) << 1) | ((insn
>> x
) & 1);
7804 /* Set bits in *WMASK according to a register number REG as encoded by
7805 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7808 bfd_arm_vfp11_write_mask (unsigned int *wmask
, unsigned int reg
)
7813 *wmask
|= 3 << ((reg
- 32) * 2);
7816 /* Return TRUE if WMASK overwrites anything in REGS. */
7819 bfd_arm_vfp11_antidependency (unsigned int wmask
, int *regs
, int numregs
)
7823 for (i
= 0; i
< numregs
; i
++)
7825 unsigned int reg
= regs
[i
];
7827 if (reg
< 32 && (wmask
& (1 << reg
)) != 0)
7835 if ((wmask
& (3 << (reg
* 2))) != 0)
7842 /* In this function, we're interested in two things: finding input registers
7843 for VFP data-processing instructions, and finding the set of registers which
7844 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7845 hold the written set, so FLDM etc. are easy to deal with (we're only
7846 interested in 32 SP registers or 16 dp registers, due to the VFP version
7847 implemented by the chip in question). DP registers are marked by setting
7848 both SP registers in the write mask). */
7850 static enum bfd_arm_vfp11_pipe
7851 bfd_arm_vfp11_insn_decode (unsigned int insn
, unsigned int *destmask
, int *regs
,
7854 enum bfd_arm_vfp11_pipe vpipe
= VFP11_BAD
;
7855 bfd_boolean is_double
= ((insn
& 0xf00) == 0xb00) ? 1 : 0;
7857 if ((insn
& 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7860 unsigned int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
7861 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
7863 pqrs
= ((insn
& 0x00800000) >> 20)
7864 | ((insn
& 0x00300000) >> 19)
7865 | ((insn
& 0x00000040) >> 6);
7869 case 0: /* fmac[sd]. */
7870 case 1: /* fnmac[sd]. */
7871 case 2: /* fmsc[sd]. */
7872 case 3: /* fnmsc[sd]. */
7874 bfd_arm_vfp11_write_mask (destmask
, fd
);
7876 regs
[1] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
7881 case 4: /* fmul[sd]. */
7882 case 5: /* fnmul[sd]. */
7883 case 6: /* fadd[sd]. */
7884 case 7: /* fsub[sd]. */
7888 case 8: /* fdiv[sd]. */
7891 bfd_arm_vfp11_write_mask (destmask
, fd
);
7892 regs
[0] = bfd_arm_vfp11_regno (insn
, is_double
, 16, 7); /* Fn. */
7897 case 15: /* extended opcode. */
7899 unsigned int extn
= ((insn
>> 15) & 0x1e)
7900 | ((insn
>> 7) & 1);
7904 case 0: /* fcpy[sd]. */
7905 case 1: /* fabs[sd]. */
7906 case 2: /* fneg[sd]. */
7907 case 8: /* fcmp[sd]. */
7908 case 9: /* fcmpe[sd]. */
7909 case 10: /* fcmpz[sd]. */
7910 case 11: /* fcmpez[sd]. */
7911 case 16: /* fuito[sd]. */
7912 case 17: /* fsito[sd]. */
7913 case 24: /* ftoui[sd]. */
7914 case 25: /* ftouiz[sd]. */
7915 case 26: /* ftosi[sd]. */
7916 case 27: /* ftosiz[sd]. */
7917 /* These instructions will not bounce due to underflow. */
7922 case 3: /* fsqrt[sd]. */
7923 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7924 registers to cause the erratum in previous instructions. */
7925 bfd_arm_vfp11_write_mask (destmask
, fd
);
7929 case 15: /* fcvt{ds,sd}. */
7933 bfd_arm_vfp11_write_mask (destmask
, fd
);
7935 /* Only FCVTSD can underflow. */
7936 if ((insn
& 0x100) != 0)
7955 /* Two-register transfer. */
7956 else if ((insn
& 0x0fe00ed0) == 0x0c400a10)
7958 unsigned int fm
= bfd_arm_vfp11_regno (insn
, is_double
, 0, 5);
7960 if ((insn
& 0x100000) == 0)
7963 bfd_arm_vfp11_write_mask (destmask
, fm
);
7966 bfd_arm_vfp11_write_mask (destmask
, fm
);
7967 bfd_arm_vfp11_write_mask (destmask
, fm
+ 1);
7973 else if ((insn
& 0x0e100e00) == 0x0c100a00) /* A load insn. */
7975 int fd
= bfd_arm_vfp11_regno (insn
, is_double
, 12, 22);
7976 unsigned int puw
= ((insn
>> 21) & 0x1) | (((insn
>> 23) & 3) << 1);
7980 case 0: /* Two-reg transfer. We should catch these above. */
7983 case 2: /* fldm[sdx]. */
7987 unsigned int i
, offset
= insn
& 0xff;
7992 for (i
= fd
; i
< fd
+ offset
; i
++)
7993 bfd_arm_vfp11_write_mask (destmask
, i
);
7997 case 4: /* fld[sd]. */
7999 bfd_arm_vfp11_write_mask (destmask
, fd
);
8008 /* Single-register transfer. Note L==0. */
8009 else if ((insn
& 0x0f100e10) == 0x0e000a10)
8011 unsigned int opcode
= (insn
>> 21) & 7;
8012 unsigned int fn
= bfd_arm_vfp11_regno (insn
, is_double
, 16, 7);
8016 case 0: /* fmsr/fmdlr. */
8017 case 1: /* fmdhr. */
8018 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8019 destination register. I don't know if this is exactly right,
8020 but it is the conservative choice. */
8021 bfd_arm_vfp11_write_mask (destmask
, fn
);
8035 static int elf32_arm_compare_mapping (const void * a
, const void * b
);
8038 /* Look for potentially-troublesome code sequences which might trigger the
8039 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8040 (available from ARM) for details of the erratum. A short version is
8041 described in ld.texinfo. */
8044 bfd_elf32_arm_vfp11_erratum_scan (bfd
*abfd
, struct bfd_link_info
*link_info
)
8047 bfd_byte
*contents
= NULL
;
8049 int regs
[3], numregs
= 0;
8050 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8051 int use_vector
= (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_VECTOR
);
8053 if (globals
== NULL
)
8056 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8057 The states transition as follows:
8059 0 -> 1 (vector) or 0 -> 2 (scalar)
8060 A VFP FMAC-pipeline instruction has been seen. Fill
8061 regs[0]..regs[numregs-1] with its input operands. Remember this
8062 instruction in 'first_fmac'.
8065 Any instruction, except for a VFP instruction which overwrites
8070 A VFP instruction has been seen which overwrites any of regs[*].
8071 We must make a veneer! Reset state to 0 before examining next
8075 If we fail to match anything in state 2, reset to state 0 and reset
8076 the instruction pointer to the instruction after 'first_fmac'.
8078 If the VFP11 vector mode is in use, there must be at least two unrelated
8079 instructions between anti-dependent VFP11 instructions to properly avoid
8080 triggering the erratum, hence the use of the extra state 1. */
8082 /* If we are only performing a partial link do not bother
8083 to construct any glue. */
8084 if (bfd_link_relocatable (link_info
))
8087 /* Skip if this bfd does not correspond to an ELF image. */
8088 if (! is_arm_elf (abfd
))
8091 /* We should have chosen a fix type by the time we get here. */
8092 BFD_ASSERT (globals
->vfp11_fix
!= BFD_ARM_VFP11_FIX_DEFAULT
);
8094 if (globals
->vfp11_fix
== BFD_ARM_VFP11_FIX_NONE
)
8097 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8098 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8101 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8103 unsigned int i
, span
, first_fmac
= 0, veneer_of_insn
= 0;
8104 struct _arm_elf_section_data
*sec_data
;
8106 /* If we don't have executable progbits, we're not interested in this
8107 section. Also skip if section is to be excluded. */
8108 if (elf_section_type (sec
) != SHT_PROGBITS
8109 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8110 || (sec
->flags
& SEC_EXCLUDE
) != 0
8111 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8112 || sec
->output_section
== bfd_abs_section_ptr
8113 || strcmp (sec
->name
, VFP11_ERRATUM_VENEER_SECTION_NAME
) == 0)
8116 sec_data
= elf32_arm_section_data (sec
);
8118 if (sec_data
->mapcount
== 0)
8121 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8122 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8123 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8126 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8127 elf32_arm_compare_mapping
);
8129 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8131 unsigned int span_start
= sec_data
->map
[span
].vma
;
8132 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8133 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8134 char span_type
= sec_data
->map
[span
].type
;
8136 /* FIXME: Only ARM mode is supported at present. We may need to
8137 support Thumb-2 mode also at some point. */
8138 if (span_type
!= 'a')
8141 for (i
= span_start
; i
< span_end
;)
8143 unsigned int next_i
= i
+ 4;
8144 unsigned int insn
= bfd_big_endian (abfd
)
8145 ? (contents
[i
] << 24)
8146 | (contents
[i
+ 1] << 16)
8147 | (contents
[i
+ 2] << 8)
8149 : (contents
[i
+ 3] << 24)
8150 | (contents
[i
+ 2] << 16)
8151 | (contents
[i
+ 1] << 8)
8153 unsigned int writemask
= 0;
8154 enum bfd_arm_vfp11_pipe vpipe
;
8159 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
, regs
,
8161 /* I'm assuming the VFP11 erratum can trigger with denorm
8162 operands on either the FMAC or the DS pipeline. This might
8163 lead to slightly overenthusiastic veneer insertion. */
8164 if (vpipe
== VFP11_FMAC
|| vpipe
== VFP11_DS
)
8166 state
= use_vector
? 1 : 2;
8168 veneer_of_insn
= insn
;
8174 int other_regs
[3], other_numregs
;
8175 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8178 if (vpipe
!= VFP11_BAD
8179 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8189 int other_regs
[3], other_numregs
;
8190 vpipe
= bfd_arm_vfp11_insn_decode (insn
, &writemask
,
8193 if (vpipe
!= VFP11_BAD
8194 && bfd_arm_vfp11_antidependency (writemask
, regs
,
8200 next_i
= first_fmac
+ 4;
8206 abort (); /* Should be unreachable. */
8211 elf32_vfp11_erratum_list
*newerr
=(elf32_vfp11_erratum_list
*)
8212 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list
));
8214 elf32_arm_section_data (sec
)->erratumcount
+= 1;
8216 newerr
->u
.b
.vfp_insn
= veneer_of_insn
;
8221 newerr
->type
= VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
;
8228 record_vfp11_erratum_veneer (link_info
, newerr
, abfd
, sec
,
8233 newerr
->next
= sec_data
->erratumlist
;
8234 sec_data
->erratumlist
= newerr
;
8243 if (contents
!= NULL
8244 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8252 if (contents
!= NULL
8253 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8259 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8260 after sections have been laid out, using specially-named symbols. */
8263 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd
*abfd
,
8264 struct bfd_link_info
*link_info
)
8267 struct elf32_arm_link_hash_table
*globals
;
8270 if (bfd_link_relocatable (link_info
))
8273 /* Skip if this bfd does not correspond to an ELF image. */
8274 if (! is_arm_elf (abfd
))
8277 globals
= elf32_arm_hash_table (link_info
);
8278 if (globals
== NULL
)
8281 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8282 (VFP11_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8284 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8286 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8287 elf32_vfp11_erratum_list
*errnode
= sec_data
->erratumlist
;
8289 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8291 struct elf_link_hash_entry
*myh
;
8294 switch (errnode
->type
)
8296 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
8297 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER
:
8298 /* Find veneer symbol. */
8299 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
,
8300 errnode
->u
.b
.veneer
->u
.v
.id
);
8302 myh
= elf_link_hash_lookup
8303 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8306 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8307 "`%s'"), abfd
, tmp_name
);
8309 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8310 + myh
->root
.u
.def
.section
->output_offset
8311 + myh
->root
.u
.def
.value
;
8313 errnode
->u
.b
.veneer
->vma
= vma
;
8316 case VFP11_ERRATUM_ARM_VENEER
:
8317 case VFP11_ERRATUM_THUMB_VENEER
:
8318 /* Find return location. */
8319 sprintf (tmp_name
, VFP11_ERRATUM_VENEER_ENTRY_NAME
"_r",
8322 myh
= elf_link_hash_lookup
8323 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8326 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8327 "`%s'"), abfd
, tmp_name
);
8329 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8330 + myh
->root
.u
.def
.section
->output_offset
8331 + myh
->root
.u
.def
.value
;
8333 errnode
->u
.v
.branch
->vma
= vma
;
8345 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8346 return locations after sections have been laid out, using
8347 specially-named symbols. */
8350 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd
*abfd
,
8351 struct bfd_link_info
*link_info
)
8354 struct elf32_arm_link_hash_table
*globals
;
8357 if (bfd_link_relocatable (link_info
))
8360 /* Skip if this bfd does not correspond to an ELF image. */
8361 if (! is_arm_elf (abfd
))
8364 globals
= elf32_arm_hash_table (link_info
);
8365 if (globals
== NULL
)
8368 tmp_name
= (char *) bfd_malloc ((bfd_size_type
) strlen
8369 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
) + 10);
8371 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8373 struct _arm_elf_section_data
*sec_data
= elf32_arm_section_data (sec
);
8374 elf32_stm32l4xx_erratum_list
*errnode
= sec_data
->stm32l4xx_erratumlist
;
8376 for (; errnode
!= NULL
; errnode
= errnode
->next
)
8378 struct elf_link_hash_entry
*myh
;
8381 switch (errnode
->type
)
8383 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
8384 /* Find veneer symbol. */
8385 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
,
8386 errnode
->u
.b
.veneer
->u
.v
.id
);
8388 myh
= elf_link_hash_lookup
8389 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8392 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8393 "`%s'"), abfd
, tmp_name
);
8395 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8396 + myh
->root
.u
.def
.section
->output_offset
8397 + myh
->root
.u
.def
.value
;
8399 errnode
->u
.b
.veneer
->vma
= vma
;
8402 case STM32L4XX_ERRATUM_VENEER
:
8403 /* Find return location. */
8404 sprintf (tmp_name
, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME
"_r",
8407 myh
= elf_link_hash_lookup
8408 (&(globals
)->root
, tmp_name
, FALSE
, FALSE
, TRUE
);
8411 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8412 "`%s'"), abfd
, tmp_name
);
8414 vma
= myh
->root
.u
.def
.section
->output_section
->vma
8415 + myh
->root
.u
.def
.section
->output_offset
8416 + myh
->root
.u
.def
.value
;
8418 errnode
->u
.v
.branch
->vma
= vma
;
8430 static inline bfd_boolean
8431 is_thumb2_ldmia (const insn32 insn
)
8433 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8434 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8435 return (insn
& 0xffd02000) == 0xe8900000;
8438 static inline bfd_boolean
8439 is_thumb2_ldmdb (const insn32 insn
)
8441 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8442 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8443 return (insn
& 0xffd02000) == 0xe9100000;
8446 static inline bfd_boolean
8447 is_thumb2_vldm (const insn32 insn
)
8449 /* A6.5 Extension register load or store instruction
8451 We look for SP 32-bit and DP 64-bit registers.
8452 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8453 <list> is consecutive 64-bit registers
8454 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8455 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8456 <list> is consecutive 32-bit registers
8457 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8458 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8459 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8461 (((insn
& 0xfe100f00) == 0xec100b00) ||
8462 ((insn
& 0xfe100f00) == 0xec100a00))
8463 && /* (IA without !). */
8464 (((((insn
<< 7) >> 28) & 0xd) == 0x4)
8465 /* (IA with !), includes VPOP (when reg number is SP). */
8466 || ((((insn
<< 7) >> 28) & 0xd) == 0x5)
8468 || ((((insn
<< 7) >> 28) & 0xd) == 0x9));
8471 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8473 - computes the number and the mode of memory accesses
8474 - decides if the replacement should be done:
8475 . replaces only if > 8-word accesses
8476 . or (testing purposes only) replaces all accesses. */
8479 stm32l4xx_need_create_replacing_stub (const insn32 insn
,
8480 bfd_arm_stm32l4xx_fix stm32l4xx_fix
)
8484 /* The field encoding the register list is the same for both LDMIA
8485 and LDMDB encodings. */
8486 if (is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
))
8487 nb_words
= elf32_arm_popcount (insn
& 0x0000ffff);
8488 else if (is_thumb2_vldm (insn
))
8489 nb_words
= (insn
& 0xff);
8491 /* DEFAULT mode accounts for the real bug condition situation,
8492 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8494 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_DEFAULT
) ? nb_words
> 8 :
8495 (stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_ALL
) ? TRUE
: FALSE
;
8498 /* Look for potentially-troublesome code sequences which might trigger
8499 the STM STM32L4XX erratum. */
8502 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd
*abfd
,
8503 struct bfd_link_info
*link_info
)
8506 bfd_byte
*contents
= NULL
;
8507 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
8509 if (globals
== NULL
)
8512 /* If we are only performing a partial link do not bother
8513 to construct any glue. */
8514 if (bfd_link_relocatable (link_info
))
8517 /* Skip if this bfd does not correspond to an ELF image. */
8518 if (! is_arm_elf (abfd
))
8521 if (globals
->stm32l4xx_fix
== BFD_ARM_STM32L4XX_FIX_NONE
)
8524 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8525 if ((abfd
->flags
& (EXEC_P
| DYNAMIC
)) != 0)
8528 for (sec
= abfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
8530 unsigned int i
, span
;
8531 struct _arm_elf_section_data
*sec_data
;
8533 /* If we don't have executable progbits, we're not interested in this
8534 section. Also skip if section is to be excluded. */
8535 if (elf_section_type (sec
) != SHT_PROGBITS
8536 || (elf_section_flags (sec
) & SHF_EXECINSTR
) == 0
8537 || (sec
->flags
& SEC_EXCLUDE
) != 0
8538 || sec
->sec_info_type
== SEC_INFO_TYPE_JUST_SYMS
8539 || sec
->output_section
== bfd_abs_section_ptr
8540 || strcmp (sec
->name
, STM32L4XX_ERRATUM_VENEER_SECTION_NAME
) == 0)
8543 sec_data
= elf32_arm_section_data (sec
);
8545 if (sec_data
->mapcount
== 0)
8548 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
8549 contents
= elf_section_data (sec
)->this_hdr
.contents
;
8550 else if (! bfd_malloc_and_get_section (abfd
, sec
, &contents
))
8553 qsort (sec_data
->map
, sec_data
->mapcount
, sizeof (elf32_arm_section_map
),
8554 elf32_arm_compare_mapping
);
8556 for (span
= 0; span
< sec_data
->mapcount
; span
++)
8558 unsigned int span_start
= sec_data
->map
[span
].vma
;
8559 unsigned int span_end
= (span
== sec_data
->mapcount
- 1)
8560 ? sec
->size
: sec_data
->map
[span
+ 1].vma
;
8561 char span_type
= sec_data
->map
[span
].type
;
8562 int itblock_current_pos
= 0;
8564 /* Only Thumb2 mode need be supported with this CM4 specific
8565 code, we should not encounter any arm mode eg span_type
8567 if (span_type
!= 't')
8570 for (i
= span_start
; i
< span_end
;)
8572 unsigned int insn
= bfd_get_16 (abfd
, &contents
[i
]);
8573 bfd_boolean insn_32bit
= FALSE
;
8574 bfd_boolean is_ldm
= FALSE
;
8575 bfd_boolean is_vldm
= FALSE
;
8576 bfd_boolean is_not_last_in_it_block
= FALSE
;
8578 /* The first 16-bits of all 32-bit thumb2 instructions start
8579 with opcode[15..13]=0b111 and the encoded op1 can be anything
8580 except opcode[12..11]!=0b00.
8581 See 32-bit Thumb instruction encoding. */
8582 if ((insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000)
8585 /* Compute the predicate that tells if the instruction
8586 is concerned by the IT block
8587 - Creates an error if there is a ldm that is not
8588 last in the IT block thus cannot be replaced
8589 - Otherwise we can create a branch at the end of the
8590 IT block, it will be controlled naturally by IT
8591 with the proper pseudo-predicate
8592 - So the only interesting predicate is the one that
8593 tells that we are not on the last item of an IT
8595 if (itblock_current_pos
!= 0)
8596 is_not_last_in_it_block
= !!--itblock_current_pos
;
8600 /* Load the rest of the insn (in manual-friendly order). */
8601 insn
= (insn
<< 16) | bfd_get_16 (abfd
, &contents
[i
+ 2]);
8602 is_ldm
= is_thumb2_ldmia (insn
) || is_thumb2_ldmdb (insn
);
8603 is_vldm
= is_thumb2_vldm (insn
);
8605 /* Veneers are created for (v)ldm depending on
8606 option flags and memory accesses conditions; but
8607 if the instruction is not the last instruction of
8608 an IT block, we cannot create a jump there, so we
8610 if ((is_ldm
|| is_vldm
)
8611 && stm32l4xx_need_create_replacing_stub
8612 (insn
, globals
->stm32l4xx_fix
))
8614 if (is_not_last_in_it_block
)
8617 /* xgettext:c-format */
8618 (_("%B(%A+%#x): error: multiple load detected"
8619 " in non-last IT block instruction :"
8620 " STM32L4XX veneer cannot be generated.\n"
8621 "Use gcc option -mrestrict-it to generate"
8622 " only one instruction per IT block.\n"),
8627 elf32_stm32l4xx_erratum_list
*newerr
=
8628 (elf32_stm32l4xx_erratum_list
*)
8630 (sizeof (elf32_stm32l4xx_erratum_list
));
8632 elf32_arm_section_data (sec
)
8633 ->stm32l4xx_erratumcount
+= 1;
8634 newerr
->u
.b
.insn
= insn
;
8635 /* We create only thumb branches. */
8637 STM32L4XX_ERRATUM_BRANCH_TO_VENEER
;
8638 record_stm32l4xx_erratum_veneer
8639 (link_info
, newerr
, abfd
, sec
,
8642 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
:
8643 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
8645 newerr
->next
= sec_data
->stm32l4xx_erratumlist
;
8646 sec_data
->stm32l4xx_erratumlist
= newerr
;
8653 IT blocks are only encoded in T1
8654 Encoding T1: IT{x{y{z}}} <firstcond>
8655 1 0 1 1 - 1 1 1 1 - firstcond - mask
8656 if mask = '0000' then see 'related encodings'
8657 We don't deal with UNPREDICTABLE, just ignore these.
8658 There can be no nested IT blocks so an IT block
8659 is naturally a new one for which it is worth
8660 computing its size. */
8661 bfd_boolean is_newitblock
= ((insn
& 0xff00) == 0xbf00)
8662 && ((insn
& 0x000f) != 0x0000);
8663 /* If we have a new IT block we compute its size. */
8666 /* Compute the number of instructions controlled
8667 by the IT block, it will be used to decide
8668 whether we are inside an IT block or not. */
8669 unsigned int mask
= insn
& 0x000f;
8670 itblock_current_pos
= 4 - ctz (mask
);
8674 i
+= insn_32bit
? 4 : 2;
8678 if (contents
!= NULL
8679 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8687 if (contents
!= NULL
8688 && elf_section_data (sec
)->this_hdr
.contents
!= contents
)
8694 /* Set target relocation values needed during linking. */
8697 bfd_elf32_arm_set_target_params (struct bfd
*output_bfd
,
8698 struct bfd_link_info
*link_info
,
8699 struct elf32_arm_params
*params
)
8701 struct elf32_arm_link_hash_table
*globals
;
8703 globals
= elf32_arm_hash_table (link_info
);
8704 if (globals
== NULL
)
8707 globals
->target1_is_rel
= params
->target1_is_rel
;
8708 if (strcmp (params
->target2_type
, "rel") == 0)
8709 globals
->target2_reloc
= R_ARM_REL32
;
8710 else if (strcmp (params
->target2_type
, "abs") == 0)
8711 globals
->target2_reloc
= R_ARM_ABS32
;
8712 else if (strcmp (params
->target2_type
, "got-rel") == 0)
8713 globals
->target2_reloc
= R_ARM_GOT_PREL
;
8716 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8717 params
->target2_type
);
8719 globals
->fix_v4bx
= params
->fix_v4bx
;
8720 globals
->use_blx
|= params
->use_blx
;
8721 globals
->vfp11_fix
= params
->vfp11_denorm_fix
;
8722 globals
->stm32l4xx_fix
= params
->stm32l4xx_fix
;
8723 globals
->pic_veneer
= params
->pic_veneer
;
8724 globals
->fix_cortex_a8
= params
->fix_cortex_a8
;
8725 globals
->fix_arm1176
= params
->fix_arm1176
;
8726 globals
->cmse_implib
= params
->cmse_implib
;
8727 globals
->in_implib_bfd
= params
->in_implib_bfd
;
8729 BFD_ASSERT (is_arm_elf (output_bfd
));
8730 elf_arm_tdata (output_bfd
)->no_enum_size_warning
8731 = params
->no_enum_size_warning
;
8732 elf_arm_tdata (output_bfd
)->no_wchar_size_warning
8733 = params
->no_wchar_size_warning
;
8736 /* Replace the target offset of a Thumb bl or b.w instruction. */
8739 insert_thumb_branch (bfd
*abfd
, long int offset
, bfd_byte
*insn
)
8745 BFD_ASSERT ((offset
& 1) == 0);
8747 upper
= bfd_get_16 (abfd
, insn
);
8748 lower
= bfd_get_16 (abfd
, insn
+ 2);
8749 reloc_sign
= (offset
< 0) ? 1 : 0;
8750 upper
= (upper
& ~(bfd_vma
) 0x7ff)
8751 | ((offset
>> 12) & 0x3ff)
8752 | (reloc_sign
<< 10);
8753 lower
= (lower
& ~(bfd_vma
) 0x2fff)
8754 | (((!((offset
>> 23) & 1)) ^ reloc_sign
) << 13)
8755 | (((!((offset
>> 22) & 1)) ^ reloc_sign
) << 11)
8756 | ((offset
>> 1) & 0x7ff);
8757 bfd_put_16 (abfd
, upper
, insn
);
8758 bfd_put_16 (abfd
, lower
, insn
+ 2);
8761 /* Thumb code calling an ARM function. */
8764 elf32_thumb_to_arm_stub (struct bfd_link_info
* info
,
8768 asection
* input_section
,
8769 bfd_byte
* hit_data
,
8772 bfd_signed_vma addend
,
8774 char **error_message
)
8778 long int ret_offset
;
8779 struct elf_link_hash_entry
* myh
;
8780 struct elf32_arm_link_hash_table
* globals
;
8782 myh
= find_thumb_glue (info
, name
, error_message
);
8786 globals
= elf32_arm_hash_table (info
);
8787 BFD_ASSERT (globals
!= NULL
);
8788 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8790 my_offset
= myh
->root
.u
.def
.value
;
8792 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8793 THUMB2ARM_GLUE_SECTION_NAME
);
8795 BFD_ASSERT (s
!= NULL
);
8796 BFD_ASSERT (s
->contents
!= NULL
);
8797 BFD_ASSERT (s
->output_section
!= NULL
);
8799 if ((my_offset
& 0x01) == 0x01)
8802 && sym_sec
->owner
!= NULL
8803 && !INTERWORK_FLAG (sym_sec
->owner
))
8806 (_("%B(%s): warning: interworking not enabled.\n"
8807 " first occurrence: %B: Thumb call to ARM"),
8808 sym_sec
->owner
, name
, input_bfd
);
8814 myh
->root
.u
.def
.value
= my_offset
;
8816 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a1_bx_pc_insn
,
8817 s
->contents
+ my_offset
);
8819 put_thumb_insn (globals
, output_bfd
, (bfd_vma
) t2a2_noop_insn
,
8820 s
->contents
+ my_offset
+ 2);
8823 /* Address of destination of the stub. */
8824 ((bfd_signed_vma
) val
)
8826 /* Offset from the start of the current section
8827 to the start of the stubs. */
8829 /* Offset of the start of this stub from the start of the stubs. */
8831 /* Address of the start of the current section. */
8832 + s
->output_section
->vma
)
8833 /* The branch instruction is 4 bytes into the stub. */
8835 /* ARM branches work from the pc of the instruction + 8. */
8838 put_arm_insn (globals
, output_bfd
,
8839 (bfd_vma
) t2a3_b_insn
| ((ret_offset
>> 2) & 0x00FFFFFF),
8840 s
->contents
+ my_offset
+ 4);
8843 BFD_ASSERT (my_offset
<= globals
->thumb_glue_size
);
8845 /* Now go back and fix up the original BL insn to point to here. */
8847 /* Address of where the stub is located. */
8848 (s
->output_section
->vma
+ s
->output_offset
+ my_offset
)
8849 /* Address of where the BL is located. */
8850 - (input_section
->output_section
->vma
+ input_section
->output_offset
8852 /* Addend in the relocation. */
8854 /* Biassing for PC-relative addressing. */
8857 insert_thumb_branch (input_bfd
, ret_offset
, hit_data
- input_section
->vma
);
8862 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8864 static struct elf_link_hash_entry
*
8865 elf32_arm_create_thumb_stub (struct bfd_link_info
* info
,
8872 char ** error_message
)
8875 long int ret_offset
;
8876 struct elf_link_hash_entry
* myh
;
8877 struct elf32_arm_link_hash_table
* globals
;
8879 myh
= find_arm_glue (info
, name
, error_message
);
8883 globals
= elf32_arm_hash_table (info
);
8884 BFD_ASSERT (globals
!= NULL
);
8885 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8887 my_offset
= myh
->root
.u
.def
.value
;
8889 if ((my_offset
& 0x01) == 0x01)
8892 && sym_sec
->owner
!= NULL
8893 && !INTERWORK_FLAG (sym_sec
->owner
))
8896 (_("%B(%s): warning: interworking not enabled.\n"
8897 " first occurrence: %B: arm call to thumb"),
8898 sym_sec
->owner
, name
, input_bfd
);
8902 myh
->root
.u
.def
.value
= my_offset
;
8904 if (bfd_link_pic (info
)
8905 || globals
->root
.is_relocatable_executable
8906 || globals
->pic_veneer
)
8908 /* For relocatable objects we can't use absolute addresses,
8909 so construct the address from a relative offset. */
8910 /* TODO: If the offset is small it's probably worth
8911 constructing the address with adds. */
8912 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1p_ldr_insn
,
8913 s
->contents
+ my_offset
);
8914 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2p_add_pc_insn
,
8915 s
->contents
+ my_offset
+ 4);
8916 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t3p_bx_r12_insn
,
8917 s
->contents
+ my_offset
+ 8);
8918 /* Adjust the offset by 4 for the position of the add,
8919 and 8 for the pipeline offset. */
8920 ret_offset
= (val
- (s
->output_offset
8921 + s
->output_section
->vma
8924 bfd_put_32 (output_bfd
, ret_offset
,
8925 s
->contents
+ my_offset
+ 12);
8927 else if (globals
->use_blx
)
8929 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1v5_ldr_insn
,
8930 s
->contents
+ my_offset
);
8932 /* It's a thumb address. Add the low order bit. */
8933 bfd_put_32 (output_bfd
, val
| a2t2v5_func_addr_insn
,
8934 s
->contents
+ my_offset
+ 4);
8938 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t1_ldr_insn
,
8939 s
->contents
+ my_offset
);
8941 put_arm_insn (globals
, output_bfd
, (bfd_vma
) a2t2_bx_r12_insn
,
8942 s
->contents
+ my_offset
+ 4);
8944 /* It's a thumb address. Add the low order bit. */
8945 bfd_put_32 (output_bfd
, val
| a2t3_func_addr_insn
,
8946 s
->contents
+ my_offset
+ 8);
8952 BFD_ASSERT (my_offset
<= globals
->arm_glue_size
);
8957 /* Arm code calling a Thumb function. */
8960 elf32_arm_to_thumb_stub (struct bfd_link_info
* info
,
8964 asection
* input_section
,
8965 bfd_byte
* hit_data
,
8968 bfd_signed_vma addend
,
8970 char **error_message
)
8972 unsigned long int tmp
;
8975 long int ret_offset
;
8976 struct elf_link_hash_entry
* myh
;
8977 struct elf32_arm_link_hash_table
* globals
;
8979 globals
= elf32_arm_hash_table (info
);
8980 BFD_ASSERT (globals
!= NULL
);
8981 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
8983 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
8984 ARM2THUMB_GLUE_SECTION_NAME
);
8985 BFD_ASSERT (s
!= NULL
);
8986 BFD_ASSERT (s
->contents
!= NULL
);
8987 BFD_ASSERT (s
->output_section
!= NULL
);
8989 myh
= elf32_arm_create_thumb_stub (info
, name
, input_bfd
, output_bfd
,
8990 sym_sec
, val
, s
, error_message
);
8994 my_offset
= myh
->root
.u
.def
.value
;
8995 tmp
= bfd_get_32 (input_bfd
, hit_data
);
8996 tmp
= tmp
& 0xFF000000;
8998 /* Somehow these are both 4 too far, so subtract 8. */
8999 ret_offset
= (s
->output_offset
9001 + s
->output_section
->vma
9002 - (input_section
->output_offset
9003 + input_section
->output_section
->vma
9007 tmp
= tmp
| ((ret_offset
>> 2) & 0x00FFFFFF);
9009 bfd_put_32 (output_bfd
, (bfd_vma
) tmp
, hit_data
- input_section
->vma
);
9014 /* Populate Arm stub for an exported Thumb function. */
9017 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry
*h
, void * inf
)
9019 struct bfd_link_info
* info
= (struct bfd_link_info
*) inf
;
9021 struct elf_link_hash_entry
* myh
;
9022 struct elf32_arm_link_hash_entry
*eh
;
9023 struct elf32_arm_link_hash_table
* globals
;
9026 char *error_message
;
9028 eh
= elf32_arm_hash_entry (h
);
9029 /* Allocate stubs for exported Thumb functions on v4t. */
9030 if (eh
->export_glue
== NULL
)
9033 globals
= elf32_arm_hash_table (info
);
9034 BFD_ASSERT (globals
!= NULL
);
9035 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9037 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9038 ARM2THUMB_GLUE_SECTION_NAME
);
9039 BFD_ASSERT (s
!= NULL
);
9040 BFD_ASSERT (s
->contents
!= NULL
);
9041 BFD_ASSERT (s
->output_section
!= NULL
);
9043 sec
= eh
->export_glue
->root
.u
.def
.section
;
9045 BFD_ASSERT (sec
->output_section
!= NULL
);
9047 val
= eh
->export_glue
->root
.u
.def
.value
+ sec
->output_offset
9048 + sec
->output_section
->vma
;
9050 myh
= elf32_arm_create_thumb_stub (info
, h
->root
.root
.string
,
9051 h
->root
.u
.def
.section
->owner
,
9052 globals
->obfd
, sec
, val
, s
,
9058 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9061 elf32_arm_bx_glue (struct bfd_link_info
* info
, int reg
)
9066 struct elf32_arm_link_hash_table
*globals
;
9068 globals
= elf32_arm_hash_table (info
);
9069 BFD_ASSERT (globals
!= NULL
);
9070 BFD_ASSERT (globals
->bfd_of_glue_owner
!= NULL
);
9072 s
= bfd_get_linker_section (globals
->bfd_of_glue_owner
,
9073 ARM_BX_GLUE_SECTION_NAME
);
9074 BFD_ASSERT (s
!= NULL
);
9075 BFD_ASSERT (s
->contents
!= NULL
);
9076 BFD_ASSERT (s
->output_section
!= NULL
);
9078 BFD_ASSERT (globals
->bx_glue_offset
[reg
] & 2);
9080 glue_addr
= globals
->bx_glue_offset
[reg
] & ~(bfd_vma
)3;
9082 if ((globals
->bx_glue_offset
[reg
] & 1) == 0)
9084 p
= s
->contents
+ glue_addr
;
9085 bfd_put_32 (globals
->obfd
, armbx1_tst_insn
+ (reg
<< 16), p
);
9086 bfd_put_32 (globals
->obfd
, armbx2_moveq_insn
+ reg
, p
+ 4);
9087 bfd_put_32 (globals
->obfd
, armbx3_bx_insn
+ reg
, p
+ 8);
9088 globals
->bx_glue_offset
[reg
] |= 1;
9091 return glue_addr
+ s
->output_section
->vma
+ s
->output_offset
;
9094 /* Generate Arm stubs for exported Thumb symbols. */
9096 elf32_arm_begin_write_processing (bfd
*abfd ATTRIBUTE_UNUSED
,
9097 struct bfd_link_info
*link_info
)
9099 struct elf32_arm_link_hash_table
* globals
;
9101 if (link_info
== NULL
)
9102 /* Ignore this if we are not called by the ELF backend linker. */
9105 globals
= elf32_arm_hash_table (link_info
);
9106 if (globals
== NULL
)
9109 /* If blx is available then exported Thumb symbols are OK and there is
9111 if (globals
->use_blx
)
9114 elf_link_hash_traverse (&globals
->root
, elf32_arm_to_thumb_export_stub
,
9118 /* Reserve space for COUNT dynamic relocations in relocation selection
9122 elf32_arm_allocate_dynrelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9123 bfd_size_type count
)
9125 struct elf32_arm_link_hash_table
*htab
;
9127 htab
= elf32_arm_hash_table (info
);
9128 BFD_ASSERT (htab
->root
.dynamic_sections_created
);
9131 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9134 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9135 dynamic, the relocations should go in SRELOC, otherwise they should
9136 go in the special .rel.iplt section. */
9139 elf32_arm_allocate_irelocs (struct bfd_link_info
*info
, asection
*sreloc
,
9140 bfd_size_type count
)
9142 struct elf32_arm_link_hash_table
*htab
;
9144 htab
= elf32_arm_hash_table (info
);
9145 if (!htab
->root
.dynamic_sections_created
)
9146 htab
->root
.irelplt
->size
+= RELOC_SIZE (htab
) * count
;
9149 BFD_ASSERT (sreloc
!= NULL
);
9150 sreloc
->size
+= RELOC_SIZE (htab
) * count
;
9154 /* Add relocation REL to the end of relocation section SRELOC. */
9157 elf32_arm_add_dynreloc (bfd
*output_bfd
, struct bfd_link_info
*info
,
9158 asection
*sreloc
, Elf_Internal_Rela
*rel
)
9161 struct elf32_arm_link_hash_table
*htab
;
9163 htab
= elf32_arm_hash_table (info
);
9164 if (!htab
->root
.dynamic_sections_created
9165 && ELF32_R_TYPE (rel
->r_info
) == R_ARM_IRELATIVE
)
9166 sreloc
= htab
->root
.irelplt
;
9169 loc
= sreloc
->contents
;
9170 loc
+= sreloc
->reloc_count
++ * RELOC_SIZE (htab
);
9171 if (sreloc
->reloc_count
* RELOC_SIZE (htab
) > sreloc
->size
)
9173 SWAP_RELOC_OUT (htab
) (output_bfd
, rel
, loc
);
9176 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9177 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9181 elf32_arm_allocate_plt_entry (struct bfd_link_info
*info
,
9182 bfd_boolean is_iplt_entry
,
9183 union gotplt_union
*root_plt
,
9184 struct arm_plt_info
*arm_plt
)
9186 struct elf32_arm_link_hash_table
*htab
;
9190 htab
= elf32_arm_hash_table (info
);
9194 splt
= htab
->root
.iplt
;
9195 sgotplt
= htab
->root
.igotplt
;
9197 /* NaCl uses a special first entry in .iplt too. */
9198 if (htab
->nacl_p
&& splt
->size
== 0)
9199 splt
->size
+= htab
->plt_header_size
;
9201 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9202 elf32_arm_allocate_irelocs (info
, htab
->root
.irelplt
, 1);
9206 splt
= htab
->root
.splt
;
9207 sgotplt
= htab
->root
.sgotplt
;
9209 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9210 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
9212 /* If this is the first .plt entry, make room for the special
9214 if (splt
->size
== 0)
9215 splt
->size
+= htab
->plt_header_size
;
9217 htab
->next_tls_desc_index
++;
9220 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9221 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9222 splt
->size
+= PLT_THUMB_STUB_SIZE
;
9223 root_plt
->offset
= splt
->size
;
9224 splt
->size
+= htab
->plt_entry_size
;
9226 if (!htab
->symbian_p
)
9228 /* We also need to make an entry in the .got.plt section, which
9229 will be placed in the .got section by the linker script. */
9231 arm_plt
->got_offset
= sgotplt
->size
;
9233 arm_plt
->got_offset
= sgotplt
->size
- 8 * htab
->num_tls_desc
;
9239 arm_movw_immediate (bfd_vma value
)
9241 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
9245 arm_movt_immediate (bfd_vma value
)
9247 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
9250 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9251 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9252 Otherwise, DYNINDX is the index of the symbol in the dynamic
9253 symbol table and SYM_VALUE is undefined.
9255 ROOT_PLT points to the offset of the PLT entry from the start of its
9256 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9257 bookkeeping information.
9259 Returns FALSE if there was a problem. */
9262 elf32_arm_populate_plt_entry (bfd
*output_bfd
, struct bfd_link_info
*info
,
9263 union gotplt_union
*root_plt
,
9264 struct arm_plt_info
*arm_plt
,
9265 int dynindx
, bfd_vma sym_value
)
9267 struct elf32_arm_link_hash_table
*htab
;
9273 Elf_Internal_Rela rel
;
9274 bfd_vma plt_header_size
;
9275 bfd_vma got_header_size
;
9277 htab
= elf32_arm_hash_table (info
);
9279 /* Pick the appropriate sections and sizes. */
9282 splt
= htab
->root
.iplt
;
9283 sgot
= htab
->root
.igotplt
;
9284 srel
= htab
->root
.irelplt
;
9286 /* There are no reserved entries in .igot.plt, and no special
9287 first entry in .iplt. */
9288 got_header_size
= 0;
9289 plt_header_size
= 0;
9293 splt
= htab
->root
.splt
;
9294 sgot
= htab
->root
.sgotplt
;
9295 srel
= htab
->root
.srelplt
;
9297 got_header_size
= get_elf_backend_data (output_bfd
)->got_header_size
;
9298 plt_header_size
= htab
->plt_header_size
;
9300 BFD_ASSERT (splt
!= NULL
&& srel
!= NULL
);
9302 /* Fill in the entry in the procedure linkage table. */
9303 if (htab
->symbian_p
)
9305 BFD_ASSERT (dynindx
>= 0);
9306 put_arm_insn (htab
, output_bfd
,
9307 elf32_arm_symbian_plt_entry
[0],
9308 splt
->contents
+ root_plt
->offset
);
9309 bfd_put_32 (output_bfd
,
9310 elf32_arm_symbian_plt_entry
[1],
9311 splt
->contents
+ root_plt
->offset
+ 4);
9313 /* Fill in the entry in the .rel.plt section. */
9314 rel
.r_offset
= (splt
->output_section
->vma
9315 + splt
->output_offset
9316 + root_plt
->offset
+ 4);
9317 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_GLOB_DAT
);
9319 /* Get the index in the procedure linkage table which
9320 corresponds to this symbol. This is the index of this symbol
9321 in all the symbols for which we are making plt entries. The
9322 first entry in the procedure linkage table is reserved. */
9323 plt_index
= ((root_plt
->offset
- plt_header_size
)
9324 / htab
->plt_entry_size
);
9328 bfd_vma got_offset
, got_address
, plt_address
;
9329 bfd_vma got_displacement
, initial_got_entry
;
9332 BFD_ASSERT (sgot
!= NULL
);
9334 /* Get the offset into the .(i)got.plt table of the entry that
9335 corresponds to this function. */
9336 got_offset
= (arm_plt
->got_offset
& -2);
9338 /* Get the index in the procedure linkage table which
9339 corresponds to this symbol. This is the index of this symbol
9340 in all the symbols for which we are making plt entries.
9341 After the reserved .got.plt entries, all symbols appear in
9342 the same order as in .plt. */
9343 plt_index
= (got_offset
- got_header_size
) / 4;
9345 /* Calculate the address of the GOT entry. */
9346 got_address
= (sgot
->output_section
->vma
9347 + sgot
->output_offset
9350 /* ...and the address of the PLT entry. */
9351 plt_address
= (splt
->output_section
->vma
9352 + splt
->output_offset
9353 + root_plt
->offset
);
9355 ptr
= splt
->contents
+ root_plt
->offset
;
9356 if (htab
->vxworks_p
&& bfd_link_pic (info
))
9361 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9363 val
= elf32_arm_vxworks_shared_plt_entry
[i
];
9365 val
|= got_address
- sgot
->output_section
->vma
;
9367 val
|= plt_index
* RELOC_SIZE (htab
);
9368 if (i
== 2 || i
== 5)
9369 bfd_put_32 (output_bfd
, val
, ptr
);
9371 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9374 else if (htab
->vxworks_p
)
9379 for (i
= 0; i
!= htab
->plt_entry_size
/ 4; i
++, ptr
+= 4)
9381 val
= elf32_arm_vxworks_exec_plt_entry
[i
];
9385 val
|= 0xffffff & -((root_plt
->offset
+ i
* 4 + 8) >> 2);
9387 val
|= plt_index
* RELOC_SIZE (htab
);
9388 if (i
== 2 || i
== 5)
9389 bfd_put_32 (output_bfd
, val
, ptr
);
9391 put_arm_insn (htab
, output_bfd
, val
, ptr
);
9394 loc
= (htab
->srelplt2
->contents
9395 + (plt_index
* 2 + 1) * RELOC_SIZE (htab
));
9397 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9398 referencing the GOT for this PLT entry. */
9399 rel
.r_offset
= plt_address
+ 8;
9400 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
9401 rel
.r_addend
= got_offset
;
9402 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9403 loc
+= RELOC_SIZE (htab
);
9405 /* Create the R_ARM_ABS32 relocation referencing the
9406 beginning of the PLT for this GOT entry. */
9407 rel
.r_offset
= got_address
;
9408 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
9410 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9412 else if (htab
->nacl_p
)
9414 /* Calculate the displacement between the PLT slot and the
9415 common tail that's part of the special initial PLT slot. */
9416 int32_t tail_displacement
9417 = ((splt
->output_section
->vma
+ splt
->output_offset
9418 + ARM_NACL_PLT_TAIL_OFFSET
)
9419 - (plt_address
+ htab
->plt_entry_size
+ 4));
9420 BFD_ASSERT ((tail_displacement
& 3) == 0);
9421 tail_displacement
>>= 2;
9423 BFD_ASSERT ((tail_displacement
& 0xff000000) == 0
9424 || (-tail_displacement
& 0xff000000) == 0);
9426 /* Calculate the displacement between the PLT slot and the entry
9427 in the GOT. The offset accounts for the value produced by
9428 adding to pc in the penultimate instruction of the PLT stub. */
9429 got_displacement
= (got_address
9430 - (plt_address
+ htab
->plt_entry_size
));
9432 /* NaCl does not support interworking at all. */
9433 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
));
9435 put_arm_insn (htab
, output_bfd
,
9436 elf32_arm_nacl_plt_entry
[0]
9437 | arm_movw_immediate (got_displacement
),
9439 put_arm_insn (htab
, output_bfd
,
9440 elf32_arm_nacl_plt_entry
[1]
9441 | arm_movt_immediate (got_displacement
),
9443 put_arm_insn (htab
, output_bfd
,
9444 elf32_arm_nacl_plt_entry
[2],
9446 put_arm_insn (htab
, output_bfd
,
9447 elf32_arm_nacl_plt_entry
[3]
9448 | (tail_displacement
& 0x00ffffff),
9451 else if (using_thumb_only (htab
))
9453 /* PR ld/16017: Generate thumb only PLT entries. */
9454 if (!using_thumb2 (htab
))
9456 /* FIXME: We ought to be able to generate thumb-1 PLT
9458 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9463 /* Calculate the displacement between the PLT slot and the entry in
9464 the GOT. The 12-byte offset accounts for the value produced by
9465 adding to pc in the 3rd instruction of the PLT stub. */
9466 got_displacement
= got_address
- (plt_address
+ 12);
9468 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9469 instead of 'put_thumb_insn'. */
9470 put_arm_insn (htab
, output_bfd
,
9471 elf32_thumb2_plt_entry
[0]
9472 | ((got_displacement
& 0x000000ff) << 16)
9473 | ((got_displacement
& 0x00000700) << 20)
9474 | ((got_displacement
& 0x00000800) >> 1)
9475 | ((got_displacement
& 0x0000f000) >> 12),
9477 put_arm_insn (htab
, output_bfd
,
9478 elf32_thumb2_plt_entry
[1]
9479 | ((got_displacement
& 0x00ff0000) )
9480 | ((got_displacement
& 0x07000000) << 4)
9481 | ((got_displacement
& 0x08000000) >> 17)
9482 | ((got_displacement
& 0xf0000000) >> 28),
9484 put_arm_insn (htab
, output_bfd
,
9485 elf32_thumb2_plt_entry
[2],
9487 put_arm_insn (htab
, output_bfd
,
9488 elf32_thumb2_plt_entry
[3],
9493 /* Calculate the displacement between the PLT slot and the
9494 entry in the GOT. The eight-byte offset accounts for the
9495 value produced by adding to pc in the first instruction
9497 got_displacement
= got_address
- (plt_address
+ 8);
9499 if (elf32_arm_plt_needs_thumb_stub_p (info
, arm_plt
))
9501 put_thumb_insn (htab
, output_bfd
,
9502 elf32_arm_plt_thumb_stub
[0], ptr
- 4);
9503 put_thumb_insn (htab
, output_bfd
,
9504 elf32_arm_plt_thumb_stub
[1], ptr
- 2);
9507 if (!elf32_arm_use_long_plt_entry
)
9509 BFD_ASSERT ((got_displacement
& 0xf0000000) == 0);
9511 put_arm_insn (htab
, output_bfd
,
9512 elf32_arm_plt_entry_short
[0]
9513 | ((got_displacement
& 0x0ff00000) >> 20),
9515 put_arm_insn (htab
, output_bfd
,
9516 elf32_arm_plt_entry_short
[1]
9517 | ((got_displacement
& 0x000ff000) >> 12),
9519 put_arm_insn (htab
, output_bfd
,
9520 elf32_arm_plt_entry_short
[2]
9521 | (got_displacement
& 0x00000fff),
9523 #ifdef FOUR_WORD_PLT
9524 bfd_put_32 (output_bfd
, elf32_arm_plt_entry_short
[3], ptr
+ 12);
9529 put_arm_insn (htab
, output_bfd
,
9530 elf32_arm_plt_entry_long
[0]
9531 | ((got_displacement
& 0xf0000000) >> 28),
9533 put_arm_insn (htab
, output_bfd
,
9534 elf32_arm_plt_entry_long
[1]
9535 | ((got_displacement
& 0x0ff00000) >> 20),
9537 put_arm_insn (htab
, output_bfd
,
9538 elf32_arm_plt_entry_long
[2]
9539 | ((got_displacement
& 0x000ff000) >> 12),
9541 put_arm_insn (htab
, output_bfd
,
9542 elf32_arm_plt_entry_long
[3]
9543 | (got_displacement
& 0x00000fff),
9548 /* Fill in the entry in the .rel(a).(i)plt section. */
9549 rel
.r_offset
= got_address
;
9553 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9554 The dynamic linker or static executable then calls SYM_VALUE
9555 to determine the correct run-time value of the .igot.plt entry. */
9556 rel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
9557 initial_got_entry
= sym_value
;
9561 rel
.r_info
= ELF32_R_INFO (dynindx
, R_ARM_JUMP_SLOT
);
9562 initial_got_entry
= (splt
->output_section
->vma
9563 + splt
->output_offset
);
9566 /* Fill in the entry in the global offset table. */
9567 bfd_put_32 (output_bfd
, initial_got_entry
,
9568 sgot
->contents
+ got_offset
);
9572 elf32_arm_add_dynreloc (output_bfd
, info
, srel
, &rel
);
9575 loc
= srel
->contents
+ plt_index
* RELOC_SIZE (htab
);
9576 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, loc
);
9582 /* Some relocations map to different relocations depending on the
9583 target. Return the real relocation. */
9586 arm_real_reloc_type (struct elf32_arm_link_hash_table
* globals
,
9592 if (globals
->target1_is_rel
)
9598 return globals
->target2_reloc
;
9605 /* Return the base VMA address which should be subtracted from real addresses
9606 when resolving @dtpoff relocation.
9607 This is PT_TLS segment p_vaddr. */
9610 dtpoff_base (struct bfd_link_info
*info
)
9612 /* If tls_sec is NULL, we should have signalled an error already. */
9613 if (elf_hash_table (info
)->tls_sec
== NULL
)
9615 return elf_hash_table (info
)->tls_sec
->vma
;
9618 /* Return the relocation value for @tpoff relocation
9619 if STT_TLS virtual address is ADDRESS. */
9622 tpoff (struct bfd_link_info
*info
, bfd_vma address
)
9624 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
9627 /* If tls_sec is NULL, we should have signalled an error already. */
9628 if (htab
->tls_sec
== NULL
)
9630 base
= align_power ((bfd_vma
) TCB_SIZE
, htab
->tls_sec
->alignment_power
);
9631 return address
- htab
->tls_sec
->vma
+ base
;
9634 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9635 VALUE is the relocation value. */
9637 static bfd_reloc_status_type
9638 elf32_arm_abs12_reloc (bfd
*abfd
, void *data
, bfd_vma value
)
9641 return bfd_reloc_overflow
;
9643 value
|= bfd_get_32 (abfd
, data
) & 0xfffff000;
9644 bfd_put_32 (abfd
, value
, data
);
9645 return bfd_reloc_ok
;
9648 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9649 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9650 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9652 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9653 is to then call final_link_relocate. Return other values in the
9656 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9657 the pre-relaxed code. It would be nice if the relocs were updated
9658 to match the optimization. */
9660 static bfd_reloc_status_type
9661 elf32_arm_tls_relax (struct elf32_arm_link_hash_table
*globals
,
9662 bfd
*input_bfd
, asection
*input_sec
, bfd_byte
*contents
,
9663 Elf_Internal_Rela
*rel
, unsigned long is_local
)
9667 switch (ELF32_R_TYPE (rel
->r_info
))
9670 return bfd_reloc_notsupported
;
9672 case R_ARM_TLS_GOTDESC
:
9677 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
9679 insn
-= 5; /* THUMB */
9681 insn
-= 8; /* ARM */
9683 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
9684 return bfd_reloc_continue
;
9686 case R_ARM_THM_TLS_DESCSEQ
:
9688 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
);
9689 if ((insn
& 0xff78) == 0x4478) /* add rx, pc */
9693 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9695 else if ((insn
& 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9699 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9702 bfd_put_16 (input_bfd
, insn
& 0xf83f, contents
+ rel
->r_offset
);
9704 else if ((insn
& 0xff87) == 0x4780) /* blx rx */
9708 bfd_put_16 (input_bfd
, 0x46c0, contents
+ rel
->r_offset
);
9711 bfd_put_16 (input_bfd
, 0x4600 | (insn
& 0x78),
9712 contents
+ rel
->r_offset
);
9716 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
9717 /* It's a 32 bit instruction, fetch the rest of it for
9718 error generation. */
9720 | bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
+ 2);
9722 /* xgettext:c-format */
9723 (_("%B(%A+%#Lx): unexpected Thumb instruction '%#lx' in TLS trampoline"),
9724 input_bfd
, input_sec
, rel
->r_offset
, insn
);
9725 return bfd_reloc_notsupported
;
9729 case R_ARM_TLS_DESCSEQ
:
9731 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
9732 if ((insn
& 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9736 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xffff),
9737 contents
+ rel
->r_offset
);
9739 else if ((insn
& 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9743 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
9746 bfd_put_32 (input_bfd
, insn
& 0xfffff000,
9747 contents
+ rel
->r_offset
);
9749 else if ((insn
& 0xfffffff0) == 0xe12fff30) /* blx rx */
9753 bfd_put_32 (input_bfd
, 0xe1a00000, contents
+ rel
->r_offset
);
9756 bfd_put_32 (input_bfd
, 0xe1a00000 | (insn
& 0xf),
9757 contents
+ rel
->r_offset
);
9762 /* xgettext:c-format */
9763 (_("%B(%A+%#Lx): unexpected ARM instruction '%#lx' in TLS trampoline"),
9764 input_bfd
, input_sec
, rel
->r_offset
, insn
);
9765 return bfd_reloc_notsupported
;
9769 case R_ARM_TLS_CALL
:
9770 /* GD->IE relaxation, turn the instruction into 'nop' or
9771 'ldr r0, [pc,r0]' */
9772 insn
= is_local
? 0xe1a00000 : 0xe79f0000;
9773 bfd_put_32 (input_bfd
, insn
, contents
+ rel
->r_offset
);
9776 case R_ARM_THM_TLS_CALL
:
9777 /* GD->IE relaxation. */
9779 /* add r0,pc; ldr r0, [r0] */
9781 else if (using_thumb2 (globals
))
9788 bfd_put_16 (input_bfd
, insn
>> 16, contents
+ rel
->r_offset
);
9789 bfd_put_16 (input_bfd
, insn
& 0xffff, contents
+ rel
->r_offset
+ 2);
9792 return bfd_reloc_ok
;
9795 /* For a given value of n, calculate the value of G_n as required to
9796 deal with group relocations. We return it in the form of an
9797 encoded constant-and-rotation, together with the final residual. If n is
9798 specified as less than zero, then final_residual is filled with the
9799 input value and no further action is performed. */
9802 calculate_group_reloc_mask (bfd_vma value
, int n
, bfd_vma
*final_residual
)
9806 bfd_vma encoded_g_n
= 0;
9807 bfd_vma residual
= value
; /* Also known as Y_n. */
9809 for (current_n
= 0; current_n
<= n
; current_n
++)
9813 /* Calculate which part of the value to mask. */
9820 /* Determine the most significant bit in the residual and
9821 align the resulting value to a 2-bit boundary. */
9822 for (msb
= 30; msb
>= 0; msb
-= 2)
9823 if (residual
& (3 << msb
))
9826 /* The desired shift is now (msb - 6), or zero, whichever
9833 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9834 g_n
= residual
& (0xff << shift
);
9835 encoded_g_n
= (g_n
>> shift
)
9836 | ((g_n
<= 0xff ? 0 : (32 - shift
) / 2) << 8);
9838 /* Calculate the residual for the next time around. */
9842 *final_residual
= residual
;
9847 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9848 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9851 identify_add_or_sub (bfd_vma insn
)
9853 int opcode
= insn
& 0x1e00000;
9855 if (opcode
== 1 << 23) /* ADD */
9858 if (opcode
== 1 << 22) /* SUB */
9864 /* Perform a relocation as part of a final link. */
9866 static bfd_reloc_status_type
9867 elf32_arm_final_link_relocate (reloc_howto_type
* howto
,
9870 asection
* input_section
,
9871 bfd_byte
* contents
,
9872 Elf_Internal_Rela
* rel
,
9874 struct bfd_link_info
* info
,
9876 const char * sym_name
,
9877 unsigned char st_type
,
9878 enum arm_st_branch_type branch_type
,
9879 struct elf_link_hash_entry
* h
,
9880 bfd_boolean
* unresolved_reloc_p
,
9881 char ** error_message
)
9883 unsigned long r_type
= howto
->type
;
9884 unsigned long r_symndx
;
9885 bfd_byte
* hit_data
= contents
+ rel
->r_offset
;
9886 bfd_vma
* local_got_offsets
;
9887 bfd_vma
* local_tlsdesc_gotents
;
9890 asection
* sreloc
= NULL
;
9893 bfd_signed_vma signed_addend
;
9894 unsigned char dynreloc_st_type
;
9895 bfd_vma dynreloc_value
;
9896 struct elf32_arm_link_hash_table
* globals
;
9897 struct elf32_arm_link_hash_entry
*eh
;
9898 union gotplt_union
*root_plt
;
9899 struct arm_plt_info
*arm_plt
;
9901 bfd_vma gotplt_offset
;
9902 bfd_boolean has_iplt_entry
;
9903 bfd_boolean resolved_to_zero
;
9905 globals
= elf32_arm_hash_table (info
);
9906 if (globals
== NULL
)
9907 return bfd_reloc_notsupported
;
9909 BFD_ASSERT (is_arm_elf (input_bfd
));
9910 BFD_ASSERT (howto
!= NULL
);
9912 /* Some relocation types map to different relocations depending on the
9913 target. We pick the right one here. */
9914 r_type
= arm_real_reloc_type (globals
, r_type
);
9916 /* It is possible to have linker relaxations on some TLS access
9917 models. Update our information here. */
9918 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
9920 if (r_type
!= howto
->type
)
9921 howto
= elf32_arm_howto_from_type (r_type
);
9923 eh
= (struct elf32_arm_link_hash_entry
*) h
;
9924 sgot
= globals
->root
.sgot
;
9925 local_got_offsets
= elf_local_got_offsets (input_bfd
);
9926 local_tlsdesc_gotents
= elf32_arm_local_tlsdesc_gotent (input_bfd
);
9928 if (globals
->root
.dynamic_sections_created
)
9929 srelgot
= globals
->root
.srelgot
;
9933 r_symndx
= ELF32_R_SYM (rel
->r_info
);
9935 if (globals
->use_rel
)
9937 addend
= bfd_get_32 (input_bfd
, hit_data
) & howto
->src_mask
;
9939 if (addend
& ((howto
->src_mask
+ 1) >> 1))
9942 signed_addend
&= ~ howto
->src_mask
;
9943 signed_addend
|= addend
;
9946 signed_addend
= addend
;
9949 addend
= signed_addend
= rel
->r_addend
;
9951 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9952 are resolving a function call relocation. */
9953 if (using_thumb_only (globals
)
9954 && (r_type
== R_ARM_THM_CALL
9955 || r_type
== R_ARM_THM_JUMP24
)
9956 && branch_type
== ST_BRANCH_TO_ARM
)
9957 branch_type
= ST_BRANCH_TO_THUMB
;
9959 /* Record the symbol information that should be used in dynamic
9961 dynreloc_st_type
= st_type
;
9962 dynreloc_value
= value
;
9963 if (branch_type
== ST_BRANCH_TO_THUMB
)
9964 dynreloc_value
|= 1;
9966 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9967 VALUE appropriately for relocations that we resolve at link time. */
9968 has_iplt_entry
= FALSE
;
9969 if (elf32_arm_get_plt_info (input_bfd
, globals
, eh
, r_symndx
, &root_plt
,
9971 && root_plt
->offset
!= (bfd_vma
) -1)
9973 plt_offset
= root_plt
->offset
;
9974 gotplt_offset
= arm_plt
->got_offset
;
9976 if (h
== NULL
|| eh
->is_iplt
)
9978 has_iplt_entry
= TRUE
;
9979 splt
= globals
->root
.iplt
;
9981 /* Populate .iplt entries here, because not all of them will
9982 be seen by finish_dynamic_symbol. The lower bit is set if
9983 we have already populated the entry. */
9988 if (elf32_arm_populate_plt_entry (output_bfd
, info
, root_plt
, arm_plt
,
9989 -1, dynreloc_value
))
9990 root_plt
->offset
|= 1;
9992 return bfd_reloc_notsupported
;
9995 /* Static relocations always resolve to the .iplt entry. */
9997 value
= (splt
->output_section
->vma
9998 + splt
->output_offset
10000 branch_type
= ST_BRANCH_TO_ARM
;
10002 /* If there are non-call relocations that resolve to the .iplt
10003 entry, then all dynamic ones must too. */
10004 if (arm_plt
->noncall_refcount
!= 0)
10006 dynreloc_st_type
= st_type
;
10007 dynreloc_value
= value
;
10011 /* We populate the .plt entry in finish_dynamic_symbol. */
10012 splt
= globals
->root
.splt
;
10017 plt_offset
= (bfd_vma
) -1;
10018 gotplt_offset
= (bfd_vma
) -1;
10021 resolved_to_zero
= (h
!= NULL
10022 && UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
));
10027 /* We don't need to find a value for this symbol. It's just a
10029 *unresolved_reloc_p
= FALSE
;
10030 return bfd_reloc_ok
;
10033 if (!globals
->vxworks_p
)
10034 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10035 /* Fall through. */
10039 case R_ARM_ABS32_NOI
:
10041 case R_ARM_REL32_NOI
:
10047 /* Handle relocations which should use the PLT entry. ABS32/REL32
10048 will use the symbol's value, which may point to a PLT entry, but we
10049 don't need to handle that here. If we created a PLT entry, all
10050 branches in this object should go to it, except if the PLT is too
10051 far away, in which case a long branch stub should be inserted. */
10052 if ((r_type
!= R_ARM_ABS32
&& r_type
!= R_ARM_REL32
10053 && r_type
!= R_ARM_ABS32_NOI
&& r_type
!= R_ARM_REL32_NOI
10054 && r_type
!= R_ARM_CALL
10055 && r_type
!= R_ARM_JUMP24
10056 && r_type
!= R_ARM_PLT32
)
10057 && plt_offset
!= (bfd_vma
) -1)
10059 /* If we've created a .plt section, and assigned a PLT entry
10060 to this function, it must either be a STT_GNU_IFUNC reference
10061 or not be known to bind locally. In other cases, we should
10062 have cleared the PLT entry by now. */
10063 BFD_ASSERT (has_iplt_entry
|| !SYMBOL_CALLS_LOCAL (info
, h
));
10065 value
= (splt
->output_section
->vma
10066 + splt
->output_offset
10068 *unresolved_reloc_p
= FALSE
;
10069 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10070 contents
, rel
->r_offset
, value
,
10074 /* When generating a shared object or relocatable executable, these
10075 relocations are copied into the output file to be resolved at
10077 if ((bfd_link_pic (info
)
10078 || globals
->root
.is_relocatable_executable
)
10079 && (input_section
->flags
& SEC_ALLOC
)
10080 && !(globals
->vxworks_p
10081 && strcmp (input_section
->output_section
->name
,
10083 && ((r_type
!= R_ARM_REL32
&& r_type
!= R_ARM_REL32_NOI
)
10084 || !SYMBOL_CALLS_LOCAL (info
, h
))
10085 && !(input_bfd
== globals
->stub_bfd
10086 && strstr (input_section
->name
, STUB_SUFFIX
))
10088 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
10089 && !resolved_to_zero
)
10090 || h
->root
.type
!= bfd_link_hash_undefweak
)
10091 && r_type
!= R_ARM_PC24
10092 && r_type
!= R_ARM_CALL
10093 && r_type
!= R_ARM_JUMP24
10094 && r_type
!= R_ARM_PREL31
10095 && r_type
!= R_ARM_PLT32
)
10097 Elf_Internal_Rela outrel
;
10098 bfd_boolean skip
, relocate
;
10100 if ((r_type
== R_ARM_REL32
|| r_type
== R_ARM_REL32_NOI
)
10101 && !h
->def_regular
)
10103 char *v
= _("shared object");
10105 if (bfd_link_executable (info
))
10106 v
= _("PIE executable");
10109 (_("%B: relocation %s against external or undefined symbol `%s'"
10110 " can not be used when making a %s; recompile with -fPIC"), input_bfd
,
10111 elf32_arm_howto_table_1
[r_type
].name
, h
->root
.root
.string
, v
);
10112 return bfd_reloc_notsupported
;
10115 *unresolved_reloc_p
= FALSE
;
10117 if (sreloc
== NULL
&& globals
->root
.dynamic_sections_created
)
10119 sreloc
= _bfd_elf_get_dynamic_reloc_section (input_bfd
, input_section
,
10120 ! globals
->use_rel
);
10122 if (sreloc
== NULL
)
10123 return bfd_reloc_notsupported
;
10129 outrel
.r_addend
= addend
;
10131 _bfd_elf_section_offset (output_bfd
, info
, input_section
,
10133 if (outrel
.r_offset
== (bfd_vma
) -1)
10135 else if (outrel
.r_offset
== (bfd_vma
) -2)
10136 skip
= TRUE
, relocate
= TRUE
;
10137 outrel
.r_offset
+= (input_section
->output_section
->vma
10138 + input_section
->output_offset
);
10141 memset (&outrel
, 0, sizeof outrel
);
10143 && h
->dynindx
!= -1
10144 && (!bfd_link_pic (info
)
10145 || !(bfd_link_pie (info
)
10146 || SYMBOLIC_BIND (info
, h
))
10147 || !h
->def_regular
))
10148 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, r_type
);
10153 /* This symbol is local, or marked to become local. */
10154 BFD_ASSERT (r_type
== R_ARM_ABS32
|| r_type
== R_ARM_ABS32_NOI
);
10155 if (globals
->symbian_p
)
10159 /* On Symbian OS, the data segment and text segement
10160 can be relocated independently. Therefore, we
10161 must indicate the segment to which this
10162 relocation is relative. The BPABI allows us to
10163 use any symbol in the right segment; we just use
10164 the section symbol as it is convenient. (We
10165 cannot use the symbol given by "h" directly as it
10166 will not appear in the dynamic symbol table.)
10168 Note that the dynamic linker ignores the section
10169 symbol value, so we don't subtract osec->vma
10170 from the emitted reloc addend. */
10172 osec
= sym_sec
->output_section
;
10174 osec
= input_section
->output_section
;
10175 symbol
= elf_section_data (osec
)->dynindx
;
10178 struct elf_link_hash_table
*htab
= elf_hash_table (info
);
10180 if ((osec
->flags
& SEC_READONLY
) == 0
10181 && htab
->data_index_section
!= NULL
)
10182 osec
= htab
->data_index_section
;
10184 osec
= htab
->text_index_section
;
10185 symbol
= elf_section_data (osec
)->dynindx
;
10187 BFD_ASSERT (symbol
!= 0);
10190 /* On SVR4-ish systems, the dynamic loader cannot
10191 relocate the text and data segments independently,
10192 so the symbol does not matter. */
10194 if (dynreloc_st_type
== STT_GNU_IFUNC
)
10195 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10196 to the .iplt entry. Instead, every non-call reference
10197 must use an R_ARM_IRELATIVE relocation to obtain the
10198 correct run-time address. */
10199 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_IRELATIVE
);
10201 outrel
.r_info
= ELF32_R_INFO (symbol
, R_ARM_RELATIVE
);
10202 if (globals
->use_rel
)
10205 outrel
.r_addend
+= dynreloc_value
;
10208 elf32_arm_add_dynreloc (output_bfd
, info
, sreloc
, &outrel
);
10210 /* If this reloc is against an external symbol, we do not want to
10211 fiddle with the addend. Otherwise, we need to include the symbol
10212 value so that it becomes an addend for the dynamic reloc. */
10214 return bfd_reloc_ok
;
10216 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
10217 contents
, rel
->r_offset
,
10218 dynreloc_value
, (bfd_vma
) 0);
10220 else switch (r_type
)
10223 return elf32_arm_abs12_reloc (input_bfd
, hit_data
, value
+ addend
);
10225 case R_ARM_XPC25
: /* Arm BLX instruction. */
10228 case R_ARM_PC24
: /* Arm B/BL instruction. */
10231 struct elf32_arm_stub_hash_entry
*stub_entry
= NULL
;
10233 if (r_type
== R_ARM_XPC25
)
10235 /* Check for Arm calling Arm function. */
10236 /* FIXME: Should we translate the instruction into a BL
10237 instruction instead ? */
10238 if (branch_type
!= ST_BRANCH_TO_THUMB
)
10240 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10242 h
? h
->root
.root
.string
: "(local)");
10244 else if (r_type
== R_ARM_PC24
)
10246 /* Check for Arm calling Thumb function. */
10247 if (branch_type
== ST_BRANCH_TO_THUMB
)
10249 if (elf32_arm_to_thumb_stub (info
, sym_name
, input_bfd
,
10250 output_bfd
, input_section
,
10251 hit_data
, sym_sec
, rel
->r_offset
,
10252 signed_addend
, value
,
10254 return bfd_reloc_ok
;
10256 return bfd_reloc_dangerous
;
10260 /* Check if a stub has to be inserted because the
10261 destination is too far or we are changing mode. */
10262 if ( r_type
== R_ARM_CALL
10263 || r_type
== R_ARM_JUMP24
10264 || r_type
== R_ARM_PLT32
)
10266 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10267 struct elf32_arm_link_hash_entry
*hash
;
10269 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10270 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10271 st_type
, &branch_type
,
10272 hash
, value
, sym_sec
,
10273 input_bfd
, sym_name
);
10275 if (stub_type
!= arm_stub_none
)
10277 /* The target is out of reach, so redirect the
10278 branch to the local stub for this function. */
10279 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10284 if (stub_entry
!= NULL
)
10285 value
= (stub_entry
->stub_offset
10286 + stub_entry
->stub_sec
->output_offset
10287 + stub_entry
->stub_sec
->output_section
->vma
);
10289 if (plt_offset
!= (bfd_vma
) -1)
10290 *unresolved_reloc_p
= FALSE
;
10295 /* If the call goes through a PLT entry, make sure to
10296 check distance to the right destination address. */
10297 if (plt_offset
!= (bfd_vma
) -1)
10299 value
= (splt
->output_section
->vma
10300 + splt
->output_offset
10302 *unresolved_reloc_p
= FALSE
;
10303 /* The PLT entry is in ARM mode, regardless of the
10304 target function. */
10305 branch_type
= ST_BRANCH_TO_ARM
;
10310 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10312 S is the address of the symbol in the relocation.
10313 P is address of the instruction being relocated.
10314 A is the addend (extracted from the instruction) in bytes.
10316 S is held in 'value'.
10317 P is the base address of the section containing the
10318 instruction plus the offset of the reloc into that
10320 (input_section->output_section->vma +
10321 input_section->output_offset +
10323 A is the addend, converted into bytes, ie:
10324 (signed_addend * 4)
10326 Note: None of these operations have knowledge of the pipeline
10327 size of the processor, thus it is up to the assembler to
10328 encode this information into the addend. */
10329 value
-= (input_section
->output_section
->vma
10330 + input_section
->output_offset
);
10331 value
-= rel
->r_offset
;
10332 if (globals
->use_rel
)
10333 value
+= (signed_addend
<< howto
->size
);
10335 /* RELA addends do not have to be adjusted by howto->size. */
10336 value
+= signed_addend
;
10338 signed_addend
= value
;
10339 signed_addend
>>= howto
->rightshift
;
10341 /* A branch to an undefined weak symbol is turned into a jump to
10342 the next instruction unless a PLT entry will be created.
10343 Do the same for local undefined symbols (but not for STN_UNDEF).
10344 The jump to the next instruction is optimized as a NOP depending
10345 on the architecture. */
10346 if (h
? (h
->root
.type
== bfd_link_hash_undefweak
10347 && plt_offset
== (bfd_vma
) -1)
10348 : r_symndx
!= STN_UNDEF
&& bfd_is_und_section (sym_sec
))
10350 value
= (bfd_get_32 (input_bfd
, hit_data
) & 0xf0000000);
10352 if (arch_has_arm_nop (globals
))
10353 value
|= 0x0320f000;
10355 value
|= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10359 /* Perform a signed range check. */
10360 if ( signed_addend
> ((bfd_signed_vma
) (howto
->dst_mask
>> 1))
10361 || signed_addend
< - ((bfd_signed_vma
) ((howto
->dst_mask
+ 1) >> 1)))
10362 return bfd_reloc_overflow
;
10364 addend
= (value
& 2);
10366 value
= (signed_addend
& howto
->dst_mask
)
10367 | (bfd_get_32 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10369 if (r_type
== R_ARM_CALL
)
10371 /* Set the H bit in the BLX instruction. */
10372 if (branch_type
== ST_BRANCH_TO_THUMB
)
10375 value
|= (1 << 24);
10377 value
&= ~(bfd_vma
)(1 << 24);
10380 /* Select the correct instruction (BL or BLX). */
10381 /* Only if we are not handling a BL to a stub. In this
10382 case, mode switching is performed by the stub. */
10383 if (branch_type
== ST_BRANCH_TO_THUMB
&& !stub_entry
)
10384 value
|= (1 << 28);
10385 else if (stub_entry
|| branch_type
!= ST_BRANCH_UNKNOWN
)
10387 value
&= ~(bfd_vma
)(1 << 28);
10388 value
|= (1 << 24);
10397 if (branch_type
== ST_BRANCH_TO_THUMB
)
10401 case R_ARM_ABS32_NOI
:
10407 if (branch_type
== ST_BRANCH_TO_THUMB
)
10409 value
-= (input_section
->output_section
->vma
10410 + input_section
->output_offset
+ rel
->r_offset
);
10413 case R_ARM_REL32_NOI
:
10415 value
-= (input_section
->output_section
->vma
10416 + input_section
->output_offset
+ rel
->r_offset
);
10420 value
-= (input_section
->output_section
->vma
10421 + input_section
->output_offset
+ rel
->r_offset
);
10422 value
+= signed_addend
;
10423 if (! h
|| h
->root
.type
!= bfd_link_hash_undefweak
)
10425 /* Check for overflow. */
10426 if ((value
^ (value
>> 1)) & (1 << 30))
10427 return bfd_reloc_overflow
;
10429 value
&= 0x7fffffff;
10430 value
|= (bfd_get_32 (input_bfd
, hit_data
) & 0x80000000);
10431 if (branch_type
== ST_BRANCH_TO_THUMB
)
10436 bfd_put_32 (input_bfd
, value
, hit_data
);
10437 return bfd_reloc_ok
;
10440 /* PR 16202: Refectch the addend using the correct size. */
10441 if (globals
->use_rel
)
10442 addend
= bfd_get_8 (input_bfd
, hit_data
);
10445 /* There is no way to tell whether the user intended to use a signed or
10446 unsigned addend. When checking for overflow we accept either,
10447 as specified by the AAELF. */
10448 if ((long) value
> 0xff || (long) value
< -0x80)
10449 return bfd_reloc_overflow
;
10451 bfd_put_8 (input_bfd
, value
, hit_data
);
10452 return bfd_reloc_ok
;
10455 /* PR 16202: Refectch the addend using the correct size. */
10456 if (globals
->use_rel
)
10457 addend
= bfd_get_16 (input_bfd
, hit_data
);
10460 /* See comment for R_ARM_ABS8. */
10461 if ((long) value
> 0xffff || (long) value
< -0x8000)
10462 return bfd_reloc_overflow
;
10464 bfd_put_16 (input_bfd
, value
, hit_data
);
10465 return bfd_reloc_ok
;
10467 case R_ARM_THM_ABS5
:
10468 /* Support ldr and str instructions for the thumb. */
10469 if (globals
->use_rel
)
10471 /* Need to refetch addend. */
10472 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10473 /* ??? Need to determine shift amount from operand size. */
10474 addend
>>= howto
->rightshift
;
10478 /* ??? Isn't value unsigned? */
10479 if ((long) value
> 0x1f || (long) value
< -0x10)
10480 return bfd_reloc_overflow
;
10482 /* ??? Value needs to be properly shifted into place first. */
10483 value
|= bfd_get_16 (input_bfd
, hit_data
) & 0xf83f;
10484 bfd_put_16 (input_bfd
, value
, hit_data
);
10485 return bfd_reloc_ok
;
10487 case R_ARM_THM_ALU_PREL_11_0
:
10488 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10491 bfd_signed_vma relocation
;
10493 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10494 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10496 if (globals
->use_rel
)
10498 signed_addend
= (insn
& 0xff) | ((insn
& 0x7000) >> 4)
10499 | ((insn
& (1 << 26)) >> 15);
10500 if (insn
& 0xf00000)
10501 signed_addend
= -signed_addend
;
10504 relocation
= value
+ signed_addend
;
10505 relocation
-= Pa (input_section
->output_section
->vma
10506 + input_section
->output_offset
10509 /* PR 21523: Use an absolute value. The user of this reloc will
10510 have already selected an ADD or SUB insn appropriately. */
10511 value
= labs (relocation
);
10513 if (value
>= 0x1000)
10514 return bfd_reloc_overflow
;
10516 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10517 if (branch_type
== ST_BRANCH_TO_THUMB
)
10520 insn
= (insn
& 0xfb0f8f00) | (value
& 0xff)
10521 | ((value
& 0x700) << 4)
10522 | ((value
& 0x800) << 15);
10523 if (relocation
< 0)
10526 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10527 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10529 return bfd_reloc_ok
;
10532 case R_ARM_THM_PC8
:
10533 /* PR 10073: This reloc is not generated by the GNU toolchain,
10534 but it is supported for compatibility with third party libraries
10535 generated by other compilers, specifically the ARM/IAR. */
10538 bfd_signed_vma relocation
;
10540 insn
= bfd_get_16 (input_bfd
, hit_data
);
10542 if (globals
->use_rel
)
10543 addend
= ((((insn
& 0x00ff) << 2) + 4) & 0x3ff) -4;
10545 relocation
= value
+ addend
;
10546 relocation
-= Pa (input_section
->output_section
->vma
10547 + input_section
->output_offset
10550 value
= relocation
;
10552 /* We do not check for overflow of this reloc. Although strictly
10553 speaking this is incorrect, it appears to be necessary in order
10554 to work with IAR generated relocs. Since GCC and GAS do not
10555 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10556 a problem for them. */
10559 insn
= (insn
& 0xff00) | (value
>> 2);
10561 bfd_put_16 (input_bfd
, insn
, hit_data
);
10563 return bfd_reloc_ok
;
10566 case R_ARM_THM_PC12
:
10567 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10570 bfd_signed_vma relocation
;
10572 insn
= (bfd_get_16 (input_bfd
, hit_data
) << 16)
10573 | bfd_get_16 (input_bfd
, hit_data
+ 2);
10575 if (globals
->use_rel
)
10577 signed_addend
= insn
& 0xfff;
10578 if (!(insn
& (1 << 23)))
10579 signed_addend
= -signed_addend
;
10582 relocation
= value
+ signed_addend
;
10583 relocation
-= Pa (input_section
->output_section
->vma
10584 + input_section
->output_offset
10587 value
= relocation
;
10589 if (value
>= 0x1000)
10590 return bfd_reloc_overflow
;
10592 insn
= (insn
& 0xff7ff000) | value
;
10593 if (relocation
>= 0)
10596 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
10597 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
10599 return bfd_reloc_ok
;
10602 case R_ARM_THM_XPC22
:
10603 case R_ARM_THM_CALL
:
10604 case R_ARM_THM_JUMP24
:
10605 /* Thumb BL (branch long instruction). */
10607 bfd_vma relocation
;
10608 bfd_vma reloc_sign
;
10609 bfd_boolean overflow
= FALSE
;
10610 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
10611 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
10612 bfd_signed_vma reloc_signed_max
;
10613 bfd_signed_vma reloc_signed_min
;
10615 bfd_signed_vma signed_check
;
10617 const int thumb2
= using_thumb2 (globals
);
10618 const int thumb2_bl
= using_thumb2_bl (globals
);
10620 /* A branch to an undefined weak symbol is turned into a jump to
10621 the next instruction unless a PLT entry will be created.
10622 The jump to the next instruction is optimized as a NOP.W for
10623 Thumb-2 enabled architectures. */
10624 if (h
&& h
->root
.type
== bfd_link_hash_undefweak
10625 && plt_offset
== (bfd_vma
) -1)
10629 bfd_put_16 (input_bfd
, 0xf3af, hit_data
);
10630 bfd_put_16 (input_bfd
, 0x8000, hit_data
+ 2);
10634 bfd_put_16 (input_bfd
, 0xe000, hit_data
);
10635 bfd_put_16 (input_bfd
, 0xbf00, hit_data
+ 2);
10637 return bfd_reloc_ok
;
10640 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10641 with Thumb-1) involving the J1 and J2 bits. */
10642 if (globals
->use_rel
)
10644 bfd_vma s
= (upper_insn
& (1 << 10)) >> 10;
10645 bfd_vma upper
= upper_insn
& 0x3ff;
10646 bfd_vma lower
= lower_insn
& 0x7ff;
10647 bfd_vma j1
= (lower_insn
& (1 << 13)) >> 13;
10648 bfd_vma j2
= (lower_insn
& (1 << 11)) >> 11;
10649 bfd_vma i1
= j1
^ s
? 0 : 1;
10650 bfd_vma i2
= j2
^ s
? 0 : 1;
10652 addend
= (i1
<< 23) | (i2
<< 22) | (upper
<< 12) | (lower
<< 1);
10654 addend
= (addend
| ((s
? 0 : 1) << 24)) - (1 << 24);
10656 signed_addend
= addend
;
10659 if (r_type
== R_ARM_THM_XPC22
)
10661 /* Check for Thumb to Thumb call. */
10662 /* FIXME: Should we translate the instruction into a BL
10663 instruction instead ? */
10664 if (branch_type
== ST_BRANCH_TO_THUMB
)
10666 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10668 h
? h
->root
.root
.string
: "(local)");
10672 /* If it is not a call to Thumb, assume call to Arm.
10673 If it is a call relative to a section name, then it is not a
10674 function call at all, but rather a long jump. Calls through
10675 the PLT do not require stubs. */
10676 if (branch_type
== ST_BRANCH_TO_ARM
&& plt_offset
== (bfd_vma
) -1)
10678 if (globals
->use_blx
&& r_type
== R_ARM_THM_CALL
)
10680 /* Convert BL to BLX. */
10681 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10683 else if (( r_type
!= R_ARM_THM_CALL
)
10684 && (r_type
!= R_ARM_THM_JUMP24
))
10686 if (elf32_thumb_to_arm_stub
10687 (info
, sym_name
, input_bfd
, output_bfd
, input_section
,
10688 hit_data
, sym_sec
, rel
->r_offset
, signed_addend
, value
,
10690 return bfd_reloc_ok
;
10692 return bfd_reloc_dangerous
;
10695 else if (branch_type
== ST_BRANCH_TO_THUMB
10696 && globals
->use_blx
10697 && r_type
== R_ARM_THM_CALL
)
10699 /* Make sure this is a BL. */
10700 lower_insn
|= 0x1800;
10704 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10705 if (r_type
== R_ARM_THM_CALL
|| r_type
== R_ARM_THM_JUMP24
)
10707 /* Check if a stub has to be inserted because the destination
10709 struct elf32_arm_stub_hash_entry
*stub_entry
;
10710 struct elf32_arm_link_hash_entry
*hash
;
10712 hash
= (struct elf32_arm_link_hash_entry
*) h
;
10714 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10715 st_type
, &branch_type
,
10716 hash
, value
, sym_sec
,
10717 input_bfd
, sym_name
);
10719 if (stub_type
!= arm_stub_none
)
10721 /* The target is out of reach or we are changing modes, so
10722 redirect the branch to the local stub for this
10724 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10728 if (stub_entry
!= NULL
)
10730 value
= (stub_entry
->stub_offset
10731 + stub_entry
->stub_sec
->output_offset
10732 + stub_entry
->stub_sec
->output_section
->vma
);
10734 if (plt_offset
!= (bfd_vma
) -1)
10735 *unresolved_reloc_p
= FALSE
;
10738 /* If this call becomes a call to Arm, force BLX. */
10739 if (globals
->use_blx
&& (r_type
== R_ARM_THM_CALL
))
10742 && !arm_stub_is_thumb (stub_entry
->stub_type
))
10743 || branch_type
!= ST_BRANCH_TO_THUMB
)
10744 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10749 /* Handle calls via the PLT. */
10750 if (stub_type
== arm_stub_none
&& plt_offset
!= (bfd_vma
) -1)
10752 value
= (splt
->output_section
->vma
10753 + splt
->output_offset
10756 if (globals
->use_blx
10757 && r_type
== R_ARM_THM_CALL
10758 && ! using_thumb_only (globals
))
10760 /* If the Thumb BLX instruction is available, convert
10761 the BL to a BLX instruction to call the ARM-mode
10763 lower_insn
= (lower_insn
& ~0x1000) | 0x0800;
10764 branch_type
= ST_BRANCH_TO_ARM
;
10768 if (! using_thumb_only (globals
))
10769 /* Target the Thumb stub before the ARM PLT entry. */
10770 value
-= PLT_THUMB_STUB_SIZE
;
10771 branch_type
= ST_BRANCH_TO_THUMB
;
10773 *unresolved_reloc_p
= FALSE
;
10776 relocation
= value
+ signed_addend
;
10778 relocation
-= (input_section
->output_section
->vma
10779 + input_section
->output_offset
10782 check
= relocation
>> howto
->rightshift
;
10784 /* If this is a signed value, the rightshift just dropped
10785 leading 1 bits (assuming twos complement). */
10786 if ((bfd_signed_vma
) relocation
>= 0)
10787 signed_check
= check
;
10789 signed_check
= check
| ~((bfd_vma
) -1 >> howto
->rightshift
);
10791 /* Calculate the permissable maximum and minimum values for
10792 this relocation according to whether we're relocating for
10794 bitsize
= howto
->bitsize
;
10797 reloc_signed_max
= (1 << (bitsize
- 1)) - 1;
10798 reloc_signed_min
= ~reloc_signed_max
;
10800 /* Assumes two's complement. */
10801 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10804 if ((lower_insn
& 0x5000) == 0x4000)
10805 /* For a BLX instruction, make sure that the relocation is rounded up
10806 to a word boundary. This follows the semantics of the instruction
10807 which specifies that bit 1 of the target address will come from bit
10808 1 of the base address. */
10809 relocation
= (relocation
+ 2) & ~ 3;
10811 /* Put RELOCATION back into the insn. Assumes two's complement.
10812 We use the Thumb-2 encoding, which is safe even if dealing with
10813 a Thumb-1 instruction by virtue of our overflow check above. */
10814 reloc_sign
= (signed_check
< 0) ? 1 : 0;
10815 upper_insn
= (upper_insn
& ~(bfd_vma
) 0x7ff)
10816 | ((relocation
>> 12) & 0x3ff)
10817 | (reloc_sign
<< 10);
10818 lower_insn
= (lower_insn
& ~(bfd_vma
) 0x2fff)
10819 | (((!((relocation
>> 23) & 1)) ^ reloc_sign
) << 13)
10820 | (((!((relocation
>> 22) & 1)) ^ reloc_sign
) << 11)
10821 | ((relocation
>> 1) & 0x7ff);
10823 /* Put the relocated value back in the object file: */
10824 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
10825 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
10827 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
10831 case R_ARM_THM_JUMP19
:
10832 /* Thumb32 conditional branch instruction. */
10834 bfd_vma relocation
;
10835 bfd_boolean overflow
= FALSE
;
10836 bfd_vma upper_insn
= bfd_get_16 (input_bfd
, hit_data
);
10837 bfd_vma lower_insn
= bfd_get_16 (input_bfd
, hit_data
+ 2);
10838 bfd_signed_vma reloc_signed_max
= 0xffffe;
10839 bfd_signed_vma reloc_signed_min
= -0x100000;
10840 bfd_signed_vma signed_check
;
10841 enum elf32_arm_stub_type stub_type
= arm_stub_none
;
10842 struct elf32_arm_stub_hash_entry
*stub_entry
;
10843 struct elf32_arm_link_hash_entry
*hash
;
10845 /* Need to refetch the addend, reconstruct the top three bits,
10846 and squish the two 11 bit pieces together. */
10847 if (globals
->use_rel
)
10849 bfd_vma S
= (upper_insn
& 0x0400) >> 10;
10850 bfd_vma upper
= (upper_insn
& 0x003f);
10851 bfd_vma J1
= (lower_insn
& 0x2000) >> 13;
10852 bfd_vma J2
= (lower_insn
& 0x0800) >> 11;
10853 bfd_vma lower
= (lower_insn
& 0x07ff);
10857 upper
|= (!S
) << 8;
10858 upper
-= 0x0100; /* Sign extend. */
10860 addend
= (upper
<< 12) | (lower
<< 1);
10861 signed_addend
= addend
;
10864 /* Handle calls via the PLT. */
10865 if (plt_offset
!= (bfd_vma
) -1)
10867 value
= (splt
->output_section
->vma
10868 + splt
->output_offset
10870 /* Target the Thumb stub before the ARM PLT entry. */
10871 value
-= PLT_THUMB_STUB_SIZE
;
10872 *unresolved_reloc_p
= FALSE
;
10875 hash
= (struct elf32_arm_link_hash_entry
*)h
;
10877 stub_type
= arm_type_of_stub (info
, input_section
, rel
,
10878 st_type
, &branch_type
,
10879 hash
, value
, sym_sec
,
10880 input_bfd
, sym_name
);
10881 if (stub_type
!= arm_stub_none
)
10883 stub_entry
= elf32_arm_get_stub_entry (input_section
,
10887 if (stub_entry
!= NULL
)
10889 value
= (stub_entry
->stub_offset
10890 + stub_entry
->stub_sec
->output_offset
10891 + stub_entry
->stub_sec
->output_section
->vma
);
10895 relocation
= value
+ signed_addend
;
10896 relocation
-= (input_section
->output_section
->vma
10897 + input_section
->output_offset
10899 signed_check
= (bfd_signed_vma
) relocation
;
10901 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10904 /* Put RELOCATION back into the insn. */
10906 bfd_vma S
= (relocation
& 0x00100000) >> 20;
10907 bfd_vma J2
= (relocation
& 0x00080000) >> 19;
10908 bfd_vma J1
= (relocation
& 0x00040000) >> 18;
10909 bfd_vma hi
= (relocation
& 0x0003f000) >> 12;
10910 bfd_vma lo
= (relocation
& 0x00000ffe) >> 1;
10912 upper_insn
= (upper_insn
& 0xfbc0) | (S
<< 10) | hi
;
10913 lower_insn
= (lower_insn
& 0xd000) | (J1
<< 13) | (J2
<< 11) | lo
;
10916 /* Put the relocated value back in the object file: */
10917 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
10918 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
10920 return (overflow
? bfd_reloc_overflow
: bfd_reloc_ok
);
10923 case R_ARM_THM_JUMP11
:
10924 case R_ARM_THM_JUMP8
:
10925 case R_ARM_THM_JUMP6
:
10926 /* Thumb B (branch) instruction). */
10928 bfd_signed_vma relocation
;
10929 bfd_signed_vma reloc_signed_max
= (1 << (howto
->bitsize
- 1)) - 1;
10930 bfd_signed_vma reloc_signed_min
= ~ reloc_signed_max
;
10931 bfd_signed_vma signed_check
;
10933 /* CZB cannot jump backward. */
10934 if (r_type
== R_ARM_THM_JUMP6
)
10935 reloc_signed_min
= 0;
10937 if (globals
->use_rel
)
10939 /* Need to refetch addend. */
10940 addend
= bfd_get_16 (input_bfd
, hit_data
) & howto
->src_mask
;
10941 if (addend
& ((howto
->src_mask
+ 1) >> 1))
10943 signed_addend
= -1;
10944 signed_addend
&= ~ howto
->src_mask
;
10945 signed_addend
|= addend
;
10948 signed_addend
= addend
;
10949 /* The value in the insn has been right shifted. We need to
10950 undo this, so that we can perform the address calculation
10951 in terms of bytes. */
10952 signed_addend
<<= howto
->rightshift
;
10954 relocation
= value
+ signed_addend
;
10956 relocation
-= (input_section
->output_section
->vma
10957 + input_section
->output_offset
10960 relocation
>>= howto
->rightshift
;
10961 signed_check
= relocation
;
10963 if (r_type
== R_ARM_THM_JUMP6
)
10964 relocation
= ((relocation
& 0x0020) << 4) | ((relocation
& 0x001f) << 3);
10966 relocation
&= howto
->dst_mask
;
10967 relocation
|= (bfd_get_16 (input_bfd
, hit_data
) & (~ howto
->dst_mask
));
10969 bfd_put_16 (input_bfd
, relocation
, hit_data
);
10971 /* Assumes two's complement. */
10972 if (signed_check
> reloc_signed_max
|| signed_check
< reloc_signed_min
)
10973 return bfd_reloc_overflow
;
10975 return bfd_reloc_ok
;
10978 case R_ARM_ALU_PCREL7_0
:
10979 case R_ARM_ALU_PCREL15_8
:
10980 case R_ARM_ALU_PCREL23_15
:
10983 bfd_vma relocation
;
10985 insn
= bfd_get_32 (input_bfd
, hit_data
);
10986 if (globals
->use_rel
)
10988 /* Extract the addend. */
10989 addend
= (insn
& 0xff) << ((insn
& 0xf00) >> 7);
10990 signed_addend
= addend
;
10992 relocation
= value
+ signed_addend
;
10994 relocation
-= (input_section
->output_section
->vma
10995 + input_section
->output_offset
10997 insn
= (insn
& ~0xfff)
10998 | ((howto
->bitpos
<< 7) & 0xf00)
10999 | ((relocation
>> howto
->bitpos
) & 0xff);
11000 bfd_put_32 (input_bfd
, value
, hit_data
);
11002 return bfd_reloc_ok
;
11004 case R_ARM_GNU_VTINHERIT
:
11005 case R_ARM_GNU_VTENTRY
:
11006 return bfd_reloc_ok
;
11008 case R_ARM_GOTOFF32
:
11009 /* Relocation is relative to the start of the
11010 global offset table. */
11012 BFD_ASSERT (sgot
!= NULL
);
11014 return bfd_reloc_notsupported
;
11016 /* If we are addressing a Thumb function, we need to adjust the
11017 address by one, so that attempts to call the function pointer will
11018 correctly interpret it as Thumb code. */
11019 if (branch_type
== ST_BRANCH_TO_THUMB
)
11022 /* Note that sgot->output_offset is not involved in this
11023 calculation. We always want the start of .got. If we
11024 define _GLOBAL_OFFSET_TABLE in a different way, as is
11025 permitted by the ABI, we might have to change this
11027 value
-= sgot
->output_section
->vma
;
11028 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11029 contents
, rel
->r_offset
, value
,
11033 /* Use global offset table as symbol value. */
11034 BFD_ASSERT (sgot
!= NULL
);
11037 return bfd_reloc_notsupported
;
11039 *unresolved_reloc_p
= FALSE
;
11040 value
= sgot
->output_section
->vma
;
11041 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11042 contents
, rel
->r_offset
, value
,
11046 case R_ARM_GOT_PREL
:
11047 /* Relocation is to the entry for this symbol in the
11048 global offset table. */
11050 return bfd_reloc_notsupported
;
11052 if (dynreloc_st_type
== STT_GNU_IFUNC
11053 && plt_offset
!= (bfd_vma
) -1
11054 && (h
== NULL
|| SYMBOL_REFERENCES_LOCAL (info
, h
)))
11056 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11057 symbol, and the relocation resolves directly to the runtime
11058 target rather than to the .iplt entry. This means that any
11059 .got entry would be the same value as the .igot.plt entry,
11060 so there's no point creating both. */
11061 sgot
= globals
->root
.igotplt
;
11062 value
= sgot
->output_offset
+ gotplt_offset
;
11064 else if (h
!= NULL
)
11068 off
= h
->got
.offset
;
11069 BFD_ASSERT (off
!= (bfd_vma
) -1);
11070 if ((off
& 1) != 0)
11072 /* We have already processsed one GOT relocation against
11075 if (globals
->root
.dynamic_sections_created
11076 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11077 *unresolved_reloc_p
= FALSE
;
11081 Elf_Internal_Rela outrel
;
11083 if (h
->dynindx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
11085 /* If the symbol doesn't resolve locally in a static
11086 object, we have an undefined reference. If the
11087 symbol doesn't resolve locally in a dynamic object,
11088 it should be resolved by the dynamic linker. */
11089 if (globals
->root
.dynamic_sections_created
)
11091 outrel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_GLOB_DAT
);
11092 *unresolved_reloc_p
= FALSE
;
11096 outrel
.r_addend
= 0;
11100 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11101 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11102 else if (bfd_link_pic (info
)
11103 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11104 || h
->root
.type
!= bfd_link_hash_undefweak
))
11105 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11108 outrel
.r_addend
= dynreloc_value
;
11111 /* The GOT entry is initialized to zero by default.
11112 See if we should install a different value. */
11113 if (outrel
.r_addend
!= 0
11114 && (outrel
.r_info
== 0 || globals
->use_rel
))
11116 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11117 sgot
->contents
+ off
);
11118 outrel
.r_addend
= 0;
11121 if (outrel
.r_info
!= 0)
11123 outrel
.r_offset
= (sgot
->output_section
->vma
11124 + sgot
->output_offset
11126 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11128 h
->got
.offset
|= 1;
11130 value
= sgot
->output_offset
+ off
;
11136 BFD_ASSERT (local_got_offsets
!= NULL
11137 && local_got_offsets
[r_symndx
] != (bfd_vma
) -1);
11139 off
= local_got_offsets
[r_symndx
];
11141 /* The offset must always be a multiple of 4. We use the
11142 least significant bit to record whether we have already
11143 generated the necessary reloc. */
11144 if ((off
& 1) != 0)
11148 if (globals
->use_rel
)
11149 bfd_put_32 (output_bfd
, dynreloc_value
, sgot
->contents
+ off
);
11151 if (bfd_link_pic (info
) || dynreloc_st_type
== STT_GNU_IFUNC
)
11153 Elf_Internal_Rela outrel
;
11155 outrel
.r_addend
= addend
+ dynreloc_value
;
11156 outrel
.r_offset
= (sgot
->output_section
->vma
11157 + sgot
->output_offset
11159 if (dynreloc_st_type
== STT_GNU_IFUNC
)
11160 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_IRELATIVE
);
11162 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_RELATIVE
);
11163 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11166 local_got_offsets
[r_symndx
] |= 1;
11169 value
= sgot
->output_offset
+ off
;
11171 if (r_type
!= R_ARM_GOT32
)
11172 value
+= sgot
->output_section
->vma
;
11174 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11175 contents
, rel
->r_offset
, value
,
11178 case R_ARM_TLS_LDO32
:
11179 value
= value
- dtpoff_base (info
);
11181 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11182 contents
, rel
->r_offset
, value
,
11185 case R_ARM_TLS_LDM32
:
11192 off
= globals
->tls_ldm_got
.offset
;
11194 if ((off
& 1) != 0)
11198 /* If we don't know the module number, create a relocation
11200 if (bfd_link_pic (info
))
11202 Elf_Internal_Rela outrel
;
11204 if (srelgot
== NULL
)
11207 outrel
.r_addend
= 0;
11208 outrel
.r_offset
= (sgot
->output_section
->vma
11209 + sgot
->output_offset
+ off
);
11210 outrel
.r_info
= ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32
);
11212 if (globals
->use_rel
)
11213 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11214 sgot
->contents
+ off
);
11216 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11219 bfd_put_32 (output_bfd
, 1, sgot
->contents
+ off
);
11221 globals
->tls_ldm_got
.offset
|= 1;
11224 value
= sgot
->output_section
->vma
+ sgot
->output_offset
+ off
11225 - (input_section
->output_section
->vma
+ input_section
->output_offset
+ rel
->r_offset
);
11227 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11228 contents
, rel
->r_offset
, value
,
11232 case R_ARM_TLS_CALL
:
11233 case R_ARM_THM_TLS_CALL
:
11234 case R_ARM_TLS_GD32
:
11235 case R_ARM_TLS_IE32
:
11236 case R_ARM_TLS_GOTDESC
:
11237 case R_ARM_TLS_DESCSEQ
:
11238 case R_ARM_THM_TLS_DESCSEQ
:
11240 bfd_vma off
, offplt
;
11244 BFD_ASSERT (sgot
!= NULL
);
11249 dyn
= globals
->root
.dynamic_sections_created
;
11250 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
11251 bfd_link_pic (info
),
11253 && (!bfd_link_pic (info
)
11254 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
11256 *unresolved_reloc_p
= FALSE
;
11259 off
= h
->got
.offset
;
11260 offplt
= elf32_arm_hash_entry (h
)->tlsdesc_got
;
11261 tls_type
= ((struct elf32_arm_link_hash_entry
*) h
)->tls_type
;
11265 BFD_ASSERT (local_got_offsets
!= NULL
);
11266 off
= local_got_offsets
[r_symndx
];
11267 offplt
= local_tlsdesc_gotents
[r_symndx
];
11268 tls_type
= elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
];
11271 /* Linker relaxations happens from one of the
11272 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11273 if (ELF32_R_TYPE(rel
->r_info
) != r_type
)
11274 tls_type
= GOT_TLS_IE
;
11276 BFD_ASSERT (tls_type
!= GOT_UNKNOWN
);
11278 if ((off
& 1) != 0)
11282 bfd_boolean need_relocs
= FALSE
;
11283 Elf_Internal_Rela outrel
;
11286 /* The GOT entries have not been initialized yet. Do it
11287 now, and emit any relocations. If both an IE GOT and a
11288 GD GOT are necessary, we emit the GD first. */
11290 if ((bfd_link_pic (info
) || indx
!= 0)
11292 || (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
11293 && !resolved_to_zero
)
11294 || h
->root
.type
!= bfd_link_hash_undefweak
))
11296 need_relocs
= TRUE
;
11297 BFD_ASSERT (srelgot
!= NULL
);
11300 if (tls_type
& GOT_TLS_GDESC
)
11304 /* We should have relaxed, unless this is an undefined
11306 BFD_ASSERT ((h
&& (h
->root
.type
== bfd_link_hash_undefweak
))
11307 || bfd_link_pic (info
));
11308 BFD_ASSERT (globals
->sgotplt_jump_table_size
+ offplt
+ 8
11309 <= globals
->root
.sgotplt
->size
);
11311 outrel
.r_addend
= 0;
11312 outrel
.r_offset
= (globals
->root
.sgotplt
->output_section
->vma
11313 + globals
->root
.sgotplt
->output_offset
11315 + globals
->sgotplt_jump_table_size
);
11317 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DESC
);
11318 sreloc
= globals
->root
.srelplt
;
11319 loc
= sreloc
->contents
;
11320 loc
+= globals
->next_tls_desc_index
++ * RELOC_SIZE (globals
);
11321 BFD_ASSERT (loc
+ RELOC_SIZE (globals
)
11322 <= sreloc
->contents
+ sreloc
->size
);
11324 SWAP_RELOC_OUT (globals
) (output_bfd
, &outrel
, loc
);
11326 /* For globals, the first word in the relocation gets
11327 the relocation index and the top bit set, or zero,
11328 if we're binding now. For locals, it gets the
11329 symbol's offset in the tls section. */
11330 bfd_put_32 (output_bfd
,
11331 !h
? value
- elf_hash_table (info
)->tls_sec
->vma
11332 : info
->flags
& DF_BIND_NOW
? 0
11333 : 0x80000000 | ELF32_R_SYM (outrel
.r_info
),
11334 globals
->root
.sgotplt
->contents
+ offplt
11335 + globals
->sgotplt_jump_table_size
);
11337 /* Second word in the relocation is always zero. */
11338 bfd_put_32 (output_bfd
, 0,
11339 globals
->root
.sgotplt
->contents
+ offplt
11340 + globals
->sgotplt_jump_table_size
+ 4);
11342 if (tls_type
& GOT_TLS_GD
)
11346 outrel
.r_addend
= 0;
11347 outrel
.r_offset
= (sgot
->output_section
->vma
11348 + sgot
->output_offset
11350 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_DTPMOD32
);
11352 if (globals
->use_rel
)
11353 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11354 sgot
->contents
+ cur_off
);
11356 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11359 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11360 sgot
->contents
+ cur_off
+ 4);
11363 outrel
.r_addend
= 0;
11364 outrel
.r_info
= ELF32_R_INFO (indx
,
11365 R_ARM_TLS_DTPOFF32
);
11366 outrel
.r_offset
+= 4;
11368 if (globals
->use_rel
)
11369 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11370 sgot
->contents
+ cur_off
+ 4);
11372 elf32_arm_add_dynreloc (output_bfd
, info
,
11378 /* If we are not emitting relocations for a
11379 general dynamic reference, then we must be in a
11380 static link or an executable link with the
11381 symbol binding locally. Mark it as belonging
11382 to module 1, the executable. */
11383 bfd_put_32 (output_bfd
, 1,
11384 sgot
->contents
+ cur_off
);
11385 bfd_put_32 (output_bfd
, value
- dtpoff_base (info
),
11386 sgot
->contents
+ cur_off
+ 4);
11392 if (tls_type
& GOT_TLS_IE
)
11397 outrel
.r_addend
= value
- dtpoff_base (info
);
11399 outrel
.r_addend
= 0;
11400 outrel
.r_offset
= (sgot
->output_section
->vma
11401 + sgot
->output_offset
11403 outrel
.r_info
= ELF32_R_INFO (indx
, R_ARM_TLS_TPOFF32
);
11405 if (globals
->use_rel
)
11406 bfd_put_32 (output_bfd
, outrel
.r_addend
,
11407 sgot
->contents
+ cur_off
);
11409 elf32_arm_add_dynreloc (output_bfd
, info
, srelgot
, &outrel
);
11412 bfd_put_32 (output_bfd
, tpoff (info
, value
),
11413 sgot
->contents
+ cur_off
);
11418 h
->got
.offset
|= 1;
11420 local_got_offsets
[r_symndx
] |= 1;
11423 if ((tls_type
& GOT_TLS_GD
) && r_type
!= R_ARM_TLS_GD32
)
11425 else if (tls_type
& GOT_TLS_GDESC
)
11428 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
11429 || ELF32_R_TYPE(rel
->r_info
) == R_ARM_THM_TLS_CALL
)
11431 bfd_signed_vma offset
;
11432 /* TLS stubs are arm mode. The original symbol is a
11433 data object, so branch_type is bogus. */
11434 branch_type
= ST_BRANCH_TO_ARM
;
11435 enum elf32_arm_stub_type stub_type
11436 = arm_type_of_stub (info
, input_section
, rel
,
11437 st_type
, &branch_type
,
11438 (struct elf32_arm_link_hash_entry
*)h
,
11439 globals
->tls_trampoline
, globals
->root
.splt
,
11440 input_bfd
, sym_name
);
11442 if (stub_type
!= arm_stub_none
)
11444 struct elf32_arm_stub_hash_entry
*stub_entry
11445 = elf32_arm_get_stub_entry
11446 (input_section
, globals
->root
.splt
, 0, rel
,
11447 globals
, stub_type
);
11448 offset
= (stub_entry
->stub_offset
11449 + stub_entry
->stub_sec
->output_offset
11450 + stub_entry
->stub_sec
->output_section
->vma
);
11453 offset
= (globals
->root
.splt
->output_section
->vma
11454 + globals
->root
.splt
->output_offset
11455 + globals
->tls_trampoline
);
11457 if (ELF32_R_TYPE(rel
->r_info
) == R_ARM_TLS_CALL
)
11459 unsigned long inst
;
11461 offset
-= (input_section
->output_section
->vma
11462 + input_section
->output_offset
11463 + rel
->r_offset
+ 8);
11465 inst
= offset
>> 2;
11466 inst
&= 0x00ffffff;
11467 value
= inst
| (globals
->use_blx
? 0xfa000000 : 0xeb000000);
11471 /* Thumb blx encodes the offset in a complicated
11473 unsigned upper_insn
, lower_insn
;
11476 offset
-= (input_section
->output_section
->vma
11477 + input_section
->output_offset
11478 + rel
->r_offset
+ 4);
11480 if (stub_type
!= arm_stub_none
11481 && arm_stub_is_thumb (stub_type
))
11483 lower_insn
= 0xd000;
11487 lower_insn
= 0xc000;
11488 /* Round up the offset to a word boundary. */
11489 offset
= (offset
+ 2) & ~2;
11493 upper_insn
= (0xf000
11494 | ((offset
>> 12) & 0x3ff)
11496 lower_insn
|= (((!((offset
>> 23) & 1)) ^ neg
) << 13)
11497 | (((!((offset
>> 22) & 1)) ^ neg
) << 11)
11498 | ((offset
>> 1) & 0x7ff);
11499 bfd_put_16 (input_bfd
, upper_insn
, hit_data
);
11500 bfd_put_16 (input_bfd
, lower_insn
, hit_data
+ 2);
11501 return bfd_reloc_ok
;
11504 /* These relocations needs special care, as besides the fact
11505 they point somewhere in .gotplt, the addend must be
11506 adjusted accordingly depending on the type of instruction
11508 else if ((r_type
== R_ARM_TLS_GOTDESC
) && (tls_type
& GOT_TLS_GDESC
))
11510 unsigned long data
, insn
;
11513 data
= bfd_get_32 (input_bfd
, hit_data
);
11519 insn
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
- data
);
11520 if ((insn
& 0xf000) == 0xf000 || (insn
& 0xf800) == 0xe800)
11521 insn
= (insn
<< 16)
11522 | bfd_get_16 (input_bfd
,
11523 contents
+ rel
->r_offset
- data
+ 2);
11524 if ((insn
& 0xf800c000) == 0xf000c000)
11527 else if ((insn
& 0xffffff00) == 0x4400)
11533 /* xgettext:c-format */
11534 (_("%B(%A+%#Lx): unexpected Thumb instruction '%#lx' referenced by TLS_GOTDESC"),
11535 input_bfd
, input_section
, rel
->r_offset
, insn
);
11536 return bfd_reloc_notsupported
;
11541 insn
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
- data
);
11543 switch (insn
>> 24)
11545 case 0xeb: /* bl */
11546 case 0xfa: /* blx */
11550 case 0xe0: /* add */
11556 /* xgettext:c-format */
11557 (_("%B(%A+%#Lx): unexpected ARM instruction '%#lx' referenced by TLS_GOTDESC"),
11558 input_bfd
, input_section
, rel
->r_offset
, insn
);
11559 return bfd_reloc_notsupported
;
11563 value
+= ((globals
->root
.sgotplt
->output_section
->vma
11564 + globals
->root
.sgotplt
->output_offset
+ off
)
11565 - (input_section
->output_section
->vma
11566 + input_section
->output_offset
11568 + globals
->sgotplt_jump_table_size
);
11571 value
= ((globals
->root
.sgot
->output_section
->vma
11572 + globals
->root
.sgot
->output_offset
+ off
)
11573 - (input_section
->output_section
->vma
11574 + input_section
->output_offset
+ rel
->r_offset
));
11576 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11577 contents
, rel
->r_offset
, value
,
11581 case R_ARM_TLS_LE32
:
11582 if (bfd_link_dll (info
))
11585 /* xgettext:c-format */
11586 (_("%B(%A+%#Lx): %s relocation not permitted in shared object"),
11587 input_bfd
, input_section
, rel
->r_offset
, howto
->name
);
11588 return bfd_reloc_notsupported
;
11591 value
= tpoff (info
, value
);
11593 return _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
11594 contents
, rel
->r_offset
, value
,
11598 if (globals
->fix_v4bx
)
11600 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11602 /* Ensure that we have a BX instruction. */
11603 BFD_ASSERT ((insn
& 0x0ffffff0) == 0x012fff10);
11605 if (globals
->fix_v4bx
== 2 && (insn
& 0xf) != 0xf)
11607 /* Branch to veneer. */
11609 glue_addr
= elf32_arm_bx_glue (info
, insn
& 0xf);
11610 glue_addr
-= input_section
->output_section
->vma
11611 + input_section
->output_offset
11612 + rel
->r_offset
+ 8;
11613 insn
= (insn
& 0xf0000000) | 0x0a000000
11614 | ((glue_addr
>> 2) & 0x00ffffff);
11618 /* Preserve Rm (lowest four bits) and the condition code
11619 (highest four bits). Other bits encode MOV PC,Rm. */
11620 insn
= (insn
& 0xf000000f) | 0x01a0f000;
11623 bfd_put_32 (input_bfd
, insn
, hit_data
);
11625 return bfd_reloc_ok
;
11627 case R_ARM_MOVW_ABS_NC
:
11628 case R_ARM_MOVT_ABS
:
11629 case R_ARM_MOVW_PREL_NC
:
11630 case R_ARM_MOVT_PREL
:
11631 /* Until we properly support segment-base-relative addressing then
11632 we assume the segment base to be zero, as for the group relocations.
11633 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11634 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11635 case R_ARM_MOVW_BREL_NC
:
11636 case R_ARM_MOVW_BREL
:
11637 case R_ARM_MOVT_BREL
:
11639 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11641 if (globals
->use_rel
)
11643 addend
= ((insn
>> 4) & 0xf000) | (insn
& 0xfff);
11644 signed_addend
= (addend
^ 0x8000) - 0x8000;
11647 value
+= signed_addend
;
11649 if (r_type
== R_ARM_MOVW_PREL_NC
|| r_type
== R_ARM_MOVT_PREL
)
11650 value
-= (input_section
->output_section
->vma
11651 + input_section
->output_offset
+ rel
->r_offset
);
11653 if (r_type
== R_ARM_MOVW_BREL
&& value
>= 0x10000)
11654 return bfd_reloc_overflow
;
11656 if (branch_type
== ST_BRANCH_TO_THUMB
)
11659 if (r_type
== R_ARM_MOVT_ABS
|| r_type
== R_ARM_MOVT_PREL
11660 || r_type
== R_ARM_MOVT_BREL
)
11663 insn
&= 0xfff0f000;
11664 insn
|= value
& 0xfff;
11665 insn
|= (value
& 0xf000) << 4;
11666 bfd_put_32 (input_bfd
, insn
, hit_data
);
11668 return bfd_reloc_ok
;
11670 case R_ARM_THM_MOVW_ABS_NC
:
11671 case R_ARM_THM_MOVT_ABS
:
11672 case R_ARM_THM_MOVW_PREL_NC
:
11673 case R_ARM_THM_MOVT_PREL
:
11674 /* Until we properly support segment-base-relative addressing then
11675 we assume the segment base to be zero, as for the above relocations.
11676 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11677 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11678 as R_ARM_THM_MOVT_ABS. */
11679 case R_ARM_THM_MOVW_BREL_NC
:
11680 case R_ARM_THM_MOVW_BREL
:
11681 case R_ARM_THM_MOVT_BREL
:
11685 insn
= bfd_get_16 (input_bfd
, hit_data
) << 16;
11686 insn
|= bfd_get_16 (input_bfd
, hit_data
+ 2);
11688 if (globals
->use_rel
)
11690 addend
= ((insn
>> 4) & 0xf000)
11691 | ((insn
>> 15) & 0x0800)
11692 | ((insn
>> 4) & 0x0700)
11694 signed_addend
= (addend
^ 0x8000) - 0x8000;
11697 value
+= signed_addend
;
11699 if (r_type
== R_ARM_THM_MOVW_PREL_NC
|| r_type
== R_ARM_THM_MOVT_PREL
)
11700 value
-= (input_section
->output_section
->vma
11701 + input_section
->output_offset
+ rel
->r_offset
);
11703 if (r_type
== R_ARM_THM_MOVW_BREL
&& value
>= 0x10000)
11704 return bfd_reloc_overflow
;
11706 if (branch_type
== ST_BRANCH_TO_THUMB
)
11709 if (r_type
== R_ARM_THM_MOVT_ABS
|| r_type
== R_ARM_THM_MOVT_PREL
11710 || r_type
== R_ARM_THM_MOVT_BREL
)
11713 insn
&= 0xfbf08f00;
11714 insn
|= (value
& 0xf000) << 4;
11715 insn
|= (value
& 0x0800) << 15;
11716 insn
|= (value
& 0x0700) << 4;
11717 insn
|= (value
& 0x00ff);
11719 bfd_put_16 (input_bfd
, insn
>> 16, hit_data
);
11720 bfd_put_16 (input_bfd
, insn
& 0xffff, hit_data
+ 2);
11722 return bfd_reloc_ok
;
11724 case R_ARM_ALU_PC_G0_NC
:
11725 case R_ARM_ALU_PC_G1_NC
:
11726 case R_ARM_ALU_PC_G0
:
11727 case R_ARM_ALU_PC_G1
:
11728 case R_ARM_ALU_PC_G2
:
11729 case R_ARM_ALU_SB_G0_NC
:
11730 case R_ARM_ALU_SB_G1_NC
:
11731 case R_ARM_ALU_SB_G0
:
11732 case R_ARM_ALU_SB_G1
:
11733 case R_ARM_ALU_SB_G2
:
11735 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11736 bfd_vma pc
= input_section
->output_section
->vma
11737 + input_section
->output_offset
+ rel
->r_offset
;
11738 /* sb is the origin of the *segment* containing the symbol. */
11739 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11742 bfd_signed_vma signed_value
;
11745 /* Determine which group of bits to select. */
11748 case R_ARM_ALU_PC_G0_NC
:
11749 case R_ARM_ALU_PC_G0
:
11750 case R_ARM_ALU_SB_G0_NC
:
11751 case R_ARM_ALU_SB_G0
:
11755 case R_ARM_ALU_PC_G1_NC
:
11756 case R_ARM_ALU_PC_G1
:
11757 case R_ARM_ALU_SB_G1_NC
:
11758 case R_ARM_ALU_SB_G1
:
11762 case R_ARM_ALU_PC_G2
:
11763 case R_ARM_ALU_SB_G2
:
11771 /* If REL, extract the addend from the insn. If RELA, it will
11772 have already been fetched for us. */
11773 if (globals
->use_rel
)
11776 bfd_vma constant
= insn
& 0xff;
11777 bfd_vma rotation
= (insn
& 0xf00) >> 8;
11780 signed_addend
= constant
;
11783 /* Compensate for the fact that in the instruction, the
11784 rotation is stored in multiples of 2 bits. */
11787 /* Rotate "constant" right by "rotation" bits. */
11788 signed_addend
= (constant
>> rotation
) |
11789 (constant
<< (8 * sizeof (bfd_vma
) - rotation
));
11792 /* Determine if the instruction is an ADD or a SUB.
11793 (For REL, this determines the sign of the addend.) */
11794 negative
= identify_add_or_sub (insn
);
11798 /* xgettext:c-format */
11799 (_("%B(%A+%#Lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11800 input_bfd
, input_section
, rel
->r_offset
);
11801 return bfd_reloc_overflow
;
11804 signed_addend
*= negative
;
11807 /* Compute the value (X) to go in the place. */
11808 if (r_type
== R_ARM_ALU_PC_G0_NC
11809 || r_type
== R_ARM_ALU_PC_G1_NC
11810 || r_type
== R_ARM_ALU_PC_G0
11811 || r_type
== R_ARM_ALU_PC_G1
11812 || r_type
== R_ARM_ALU_PC_G2
)
11814 signed_value
= value
- pc
+ signed_addend
;
11816 /* Section base relative. */
11817 signed_value
= value
- sb
+ signed_addend
;
11819 /* If the target symbol is a Thumb function, then set the
11820 Thumb bit in the address. */
11821 if (branch_type
== ST_BRANCH_TO_THUMB
)
11824 /* Calculate the value of the relevant G_n, in encoded
11825 constant-with-rotation format. */
11826 g_n
= calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11829 /* Check for overflow if required. */
11830 if ((r_type
== R_ARM_ALU_PC_G0
11831 || r_type
== R_ARM_ALU_PC_G1
11832 || r_type
== R_ARM_ALU_PC_G2
11833 || r_type
== R_ARM_ALU_SB_G0
11834 || r_type
== R_ARM_ALU_SB_G1
11835 || r_type
== R_ARM_ALU_SB_G2
) && residual
!= 0)
11838 /* xgettext:c-format */
11839 (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
11840 input_bfd
, input_section
, rel
->r_offset
,
11841 signed_value
< 0 ? -signed_value
: signed_value
, howto
->name
);
11842 return bfd_reloc_overflow
;
11845 /* Mask out the value and the ADD/SUB part of the opcode; take care
11846 not to destroy the S bit. */
11847 insn
&= 0xff1ff000;
11849 /* Set the opcode according to whether the value to go in the
11850 place is negative. */
11851 if (signed_value
< 0)
11856 /* Encode the offset. */
11859 bfd_put_32 (input_bfd
, insn
, hit_data
);
11861 return bfd_reloc_ok
;
11863 case R_ARM_LDR_PC_G0
:
11864 case R_ARM_LDR_PC_G1
:
11865 case R_ARM_LDR_PC_G2
:
11866 case R_ARM_LDR_SB_G0
:
11867 case R_ARM_LDR_SB_G1
:
11868 case R_ARM_LDR_SB_G2
:
11870 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11871 bfd_vma pc
= input_section
->output_section
->vma
11872 + input_section
->output_offset
+ rel
->r_offset
;
11873 /* sb is the origin of the *segment* containing the symbol. */
11874 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11876 bfd_signed_vma signed_value
;
11879 /* Determine which groups of bits to calculate. */
11882 case R_ARM_LDR_PC_G0
:
11883 case R_ARM_LDR_SB_G0
:
11887 case R_ARM_LDR_PC_G1
:
11888 case R_ARM_LDR_SB_G1
:
11892 case R_ARM_LDR_PC_G2
:
11893 case R_ARM_LDR_SB_G2
:
11901 /* If REL, extract the addend from the insn. If RELA, it will
11902 have already been fetched for us. */
11903 if (globals
->use_rel
)
11905 int negative
= (insn
& (1 << 23)) ? 1 : -1;
11906 signed_addend
= negative
* (insn
& 0xfff);
11909 /* Compute the value (X) to go in the place. */
11910 if (r_type
== R_ARM_LDR_PC_G0
11911 || r_type
== R_ARM_LDR_PC_G1
11912 || r_type
== R_ARM_LDR_PC_G2
)
11914 signed_value
= value
- pc
+ signed_addend
;
11916 /* Section base relative. */
11917 signed_value
= value
- sb
+ signed_addend
;
11919 /* Calculate the value of the relevant G_{n-1} to obtain
11920 the residual at that stage. */
11921 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
11922 group
- 1, &residual
);
11924 /* Check for overflow. */
11925 if (residual
>= 0x1000)
11928 /* xgettext:c-format */
11929 (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
11930 input_bfd
, input_section
, rel
->r_offset
,
11931 signed_value
< 0 ? -signed_value
: signed_value
, howto
->name
);
11932 return bfd_reloc_overflow
;
11935 /* Mask out the value and U bit. */
11936 insn
&= 0xff7ff000;
11938 /* Set the U bit if the value to go in the place is non-negative. */
11939 if (signed_value
>= 0)
11942 /* Encode the offset. */
11945 bfd_put_32 (input_bfd
, insn
, hit_data
);
11947 return bfd_reloc_ok
;
11949 case R_ARM_LDRS_PC_G0
:
11950 case R_ARM_LDRS_PC_G1
:
11951 case R_ARM_LDRS_PC_G2
:
11952 case R_ARM_LDRS_SB_G0
:
11953 case R_ARM_LDRS_SB_G1
:
11954 case R_ARM_LDRS_SB_G2
:
11956 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
11957 bfd_vma pc
= input_section
->output_section
->vma
11958 + input_section
->output_offset
+ rel
->r_offset
;
11959 /* sb is the origin of the *segment* containing the symbol. */
11960 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
11962 bfd_signed_vma signed_value
;
11965 /* Determine which groups of bits to calculate. */
11968 case R_ARM_LDRS_PC_G0
:
11969 case R_ARM_LDRS_SB_G0
:
11973 case R_ARM_LDRS_PC_G1
:
11974 case R_ARM_LDRS_SB_G1
:
11978 case R_ARM_LDRS_PC_G2
:
11979 case R_ARM_LDRS_SB_G2
:
11987 /* If REL, extract the addend from the insn. If RELA, it will
11988 have already been fetched for us. */
11989 if (globals
->use_rel
)
11991 int negative
= (insn
& (1 << 23)) ? 1 : -1;
11992 signed_addend
= negative
* (((insn
& 0xf00) >> 4) + (insn
& 0xf));
11995 /* Compute the value (X) to go in the place. */
11996 if (r_type
== R_ARM_LDRS_PC_G0
11997 || r_type
== R_ARM_LDRS_PC_G1
11998 || r_type
== R_ARM_LDRS_PC_G2
)
12000 signed_value
= value
- pc
+ signed_addend
;
12002 /* Section base relative. */
12003 signed_value
= value
- sb
+ signed_addend
;
12005 /* Calculate the value of the relevant G_{n-1} to obtain
12006 the residual at that stage. */
12007 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12008 group
- 1, &residual
);
12010 /* Check for overflow. */
12011 if (residual
>= 0x100)
12014 /* xgettext:c-format */
12015 (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
12016 input_bfd
, input_section
, rel
->r_offset
,
12017 signed_value
< 0 ? -signed_value
: signed_value
, howto
->name
);
12018 return bfd_reloc_overflow
;
12021 /* Mask out the value and U bit. */
12022 insn
&= 0xff7ff0f0;
12024 /* Set the U bit if the value to go in the place is non-negative. */
12025 if (signed_value
>= 0)
12028 /* Encode the offset. */
12029 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
12031 bfd_put_32 (input_bfd
, insn
, hit_data
);
12033 return bfd_reloc_ok
;
12035 case R_ARM_LDC_PC_G0
:
12036 case R_ARM_LDC_PC_G1
:
12037 case R_ARM_LDC_PC_G2
:
12038 case R_ARM_LDC_SB_G0
:
12039 case R_ARM_LDC_SB_G1
:
12040 case R_ARM_LDC_SB_G2
:
12042 bfd_vma insn
= bfd_get_32 (input_bfd
, hit_data
);
12043 bfd_vma pc
= input_section
->output_section
->vma
12044 + input_section
->output_offset
+ rel
->r_offset
;
12045 /* sb is the origin of the *segment* containing the symbol. */
12046 bfd_vma sb
= sym_sec
? sym_sec
->output_section
->vma
: 0;
12048 bfd_signed_vma signed_value
;
12051 /* Determine which groups of bits to calculate. */
12054 case R_ARM_LDC_PC_G0
:
12055 case R_ARM_LDC_SB_G0
:
12059 case R_ARM_LDC_PC_G1
:
12060 case R_ARM_LDC_SB_G1
:
12064 case R_ARM_LDC_PC_G2
:
12065 case R_ARM_LDC_SB_G2
:
12073 /* If REL, extract the addend from the insn. If RELA, it will
12074 have already been fetched for us. */
12075 if (globals
->use_rel
)
12077 int negative
= (insn
& (1 << 23)) ? 1 : -1;
12078 signed_addend
= negative
* ((insn
& 0xff) << 2);
12081 /* Compute the value (X) to go in the place. */
12082 if (r_type
== R_ARM_LDC_PC_G0
12083 || r_type
== R_ARM_LDC_PC_G1
12084 || r_type
== R_ARM_LDC_PC_G2
)
12086 signed_value
= value
- pc
+ signed_addend
;
12088 /* Section base relative. */
12089 signed_value
= value
- sb
+ signed_addend
;
12091 /* Calculate the value of the relevant G_{n-1} to obtain
12092 the residual at that stage. */
12093 calculate_group_reloc_mask (signed_value
< 0 ? - signed_value
: signed_value
,
12094 group
- 1, &residual
);
12096 /* Check for overflow. (The absolute value to go in the place must be
12097 divisible by four and, after having been divided by four, must
12098 fit in eight bits.) */
12099 if ((residual
& 0x3) != 0 || residual
>= 0x400)
12102 /* xgettext:c-format */
12103 (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
12104 input_bfd
, input_section
, rel
->r_offset
,
12105 signed_value
< 0 ? -signed_value
: signed_value
, howto
->name
);
12106 return bfd_reloc_overflow
;
12109 /* Mask out the value and U bit. */
12110 insn
&= 0xff7fff00;
12112 /* Set the U bit if the value to go in the place is non-negative. */
12113 if (signed_value
>= 0)
12116 /* Encode the offset. */
12117 insn
|= residual
>> 2;
12119 bfd_put_32 (input_bfd
, insn
, hit_data
);
12121 return bfd_reloc_ok
;
12123 case R_ARM_THM_ALU_ABS_G0_NC
:
12124 case R_ARM_THM_ALU_ABS_G1_NC
:
12125 case R_ARM_THM_ALU_ABS_G2_NC
:
12126 case R_ARM_THM_ALU_ABS_G3_NC
:
12128 const int shift_array
[4] = {0, 8, 16, 24};
12129 bfd_vma insn
= bfd_get_16 (input_bfd
, hit_data
);
12130 bfd_vma addr
= value
;
12131 int shift
= shift_array
[r_type
- R_ARM_THM_ALU_ABS_G0_NC
];
12133 /* Compute address. */
12134 if (globals
->use_rel
)
12135 signed_addend
= insn
& 0xff;
12136 addr
+= signed_addend
;
12137 if (branch_type
== ST_BRANCH_TO_THUMB
)
12139 /* Clean imm8 insn. */
12141 /* And update with correct part of address. */
12142 insn
|= (addr
>> shift
) & 0xff;
12144 bfd_put_16 (input_bfd
, insn
, hit_data
);
12147 *unresolved_reloc_p
= FALSE
;
12148 return bfd_reloc_ok
;
12151 return bfd_reloc_notsupported
;
12155 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12157 arm_add_to_rel (bfd
* abfd
,
12158 bfd_byte
* address
,
12159 reloc_howto_type
* howto
,
12160 bfd_signed_vma increment
)
12162 bfd_signed_vma addend
;
12164 if (howto
->type
== R_ARM_THM_CALL
12165 || howto
->type
== R_ARM_THM_JUMP24
)
12167 int upper_insn
, lower_insn
;
12170 upper_insn
= bfd_get_16 (abfd
, address
);
12171 lower_insn
= bfd_get_16 (abfd
, address
+ 2);
12172 upper
= upper_insn
& 0x7ff;
12173 lower
= lower_insn
& 0x7ff;
12175 addend
= (upper
<< 12) | (lower
<< 1);
12176 addend
+= increment
;
12179 upper_insn
= (upper_insn
& 0xf800) | ((addend
>> 11) & 0x7ff);
12180 lower_insn
= (lower_insn
& 0xf800) | (addend
& 0x7ff);
12182 bfd_put_16 (abfd
, (bfd_vma
) upper_insn
, address
);
12183 bfd_put_16 (abfd
, (bfd_vma
) lower_insn
, address
+ 2);
12189 contents
= bfd_get_32 (abfd
, address
);
12191 /* Get the (signed) value from the instruction. */
12192 addend
= contents
& howto
->src_mask
;
12193 if (addend
& ((howto
->src_mask
+ 1) >> 1))
12195 bfd_signed_vma mask
;
12198 mask
&= ~ howto
->src_mask
;
12202 /* Add in the increment, (which is a byte value). */
12203 switch (howto
->type
)
12206 addend
+= increment
;
12213 addend
<<= howto
->size
;
12214 addend
+= increment
;
12216 /* Should we check for overflow here ? */
12218 /* Drop any undesired bits. */
12219 addend
>>= howto
->rightshift
;
12223 contents
= (contents
& ~ howto
->dst_mask
) | (addend
& howto
->dst_mask
);
12225 bfd_put_32 (abfd
, contents
, address
);
12229 #define IS_ARM_TLS_RELOC(R_TYPE) \
12230 ((R_TYPE) == R_ARM_TLS_GD32 \
12231 || (R_TYPE) == R_ARM_TLS_LDO32 \
12232 || (R_TYPE) == R_ARM_TLS_LDM32 \
12233 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12234 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12235 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12236 || (R_TYPE) == R_ARM_TLS_LE32 \
12237 || (R_TYPE) == R_ARM_TLS_IE32 \
12238 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12240 /* Specific set of relocations for the gnu tls dialect. */
12241 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12242 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12243 || (R_TYPE) == R_ARM_TLS_CALL \
12244 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12245 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12246 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12248 /* Relocate an ARM ELF section. */
12251 elf32_arm_relocate_section (bfd
* output_bfd
,
12252 struct bfd_link_info
* info
,
12254 asection
* input_section
,
12255 bfd_byte
* contents
,
12256 Elf_Internal_Rela
* relocs
,
12257 Elf_Internal_Sym
* local_syms
,
12258 asection
** local_sections
)
12260 Elf_Internal_Shdr
*symtab_hdr
;
12261 struct elf_link_hash_entry
**sym_hashes
;
12262 Elf_Internal_Rela
*rel
;
12263 Elf_Internal_Rela
*relend
;
12265 struct elf32_arm_link_hash_table
* globals
;
12267 globals
= elf32_arm_hash_table (info
);
12268 if (globals
== NULL
)
12271 symtab_hdr
= & elf_symtab_hdr (input_bfd
);
12272 sym_hashes
= elf_sym_hashes (input_bfd
);
12275 relend
= relocs
+ input_section
->reloc_count
;
12276 for (; rel
< relend
; rel
++)
12279 reloc_howto_type
* howto
;
12280 unsigned long r_symndx
;
12281 Elf_Internal_Sym
* sym
;
12283 struct elf_link_hash_entry
* h
;
12284 bfd_vma relocation
;
12285 bfd_reloc_status_type r
;
12288 bfd_boolean unresolved_reloc
= FALSE
;
12289 char *error_message
= NULL
;
12291 r_symndx
= ELF32_R_SYM (rel
->r_info
);
12292 r_type
= ELF32_R_TYPE (rel
->r_info
);
12293 r_type
= arm_real_reloc_type (globals
, r_type
);
12295 if ( r_type
== R_ARM_GNU_VTENTRY
12296 || r_type
== R_ARM_GNU_VTINHERIT
)
12299 howto
= bfd_reloc
.howto
= elf32_arm_howto_from_type (r_type
);
12302 return _bfd_unrecognized_reloc (input_bfd
, input_section
, r_type
);
12308 if (r_symndx
< symtab_hdr
->sh_info
)
12310 sym
= local_syms
+ r_symndx
;
12311 sym_type
= ELF32_ST_TYPE (sym
->st_info
);
12312 sec
= local_sections
[r_symndx
];
12314 /* An object file might have a reference to a local
12315 undefined symbol. This is a daft object file, but we
12316 should at least do something about it. V4BX & NONE
12317 relocations do not use the symbol and are explicitly
12318 allowed to use the undefined symbol, so allow those.
12319 Likewise for relocations against STN_UNDEF. */
12320 if (r_type
!= R_ARM_V4BX
12321 && r_type
!= R_ARM_NONE
12322 && r_symndx
!= STN_UNDEF
12323 && bfd_is_und_section (sec
)
12324 && ELF_ST_BIND (sym
->st_info
) != STB_WEAK
)
12325 (*info
->callbacks
->undefined_symbol
)
12326 (info
, bfd_elf_string_from_elf_section
12327 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
),
12328 input_bfd
, input_section
,
12329 rel
->r_offset
, TRUE
);
12331 if (globals
->use_rel
)
12333 relocation
= (sec
->output_section
->vma
12334 + sec
->output_offset
12336 if (!bfd_link_relocatable (info
)
12337 && (sec
->flags
& SEC_MERGE
)
12338 && ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
12341 bfd_vma addend
, value
;
12345 case R_ARM_MOVW_ABS_NC
:
12346 case R_ARM_MOVT_ABS
:
12347 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
12348 addend
= ((value
& 0xf0000) >> 4) | (value
& 0xfff);
12349 addend
= (addend
^ 0x8000) - 0x8000;
12352 case R_ARM_THM_MOVW_ABS_NC
:
12353 case R_ARM_THM_MOVT_ABS
:
12354 value
= bfd_get_16 (input_bfd
, contents
+ rel
->r_offset
)
12356 value
|= bfd_get_16 (input_bfd
,
12357 contents
+ rel
->r_offset
+ 2);
12358 addend
= ((value
& 0xf7000) >> 4) | (value
& 0xff)
12359 | ((value
& 0x04000000) >> 15);
12360 addend
= (addend
^ 0x8000) - 0x8000;
12364 if (howto
->rightshift
12365 || (howto
->src_mask
& (howto
->src_mask
+ 1)))
12368 /* xgettext:c-format */
12369 (_("%B(%A+%#Lx): %s relocation against SEC_MERGE section"),
12370 input_bfd
, input_section
,
12371 rel
->r_offset
, howto
->name
);
12375 value
= bfd_get_32 (input_bfd
, contents
+ rel
->r_offset
);
12377 /* Get the (signed) value from the instruction. */
12378 addend
= value
& howto
->src_mask
;
12379 if (addend
& ((howto
->src_mask
+ 1) >> 1))
12381 bfd_signed_vma mask
;
12384 mask
&= ~ howto
->src_mask
;
12392 _bfd_elf_rel_local_sym (output_bfd
, sym
, &msec
, addend
)
12394 addend
+= msec
->output_section
->vma
+ msec
->output_offset
;
12396 /* Cases here must match those in the preceding
12397 switch statement. */
12400 case R_ARM_MOVW_ABS_NC
:
12401 case R_ARM_MOVT_ABS
:
12402 value
= (value
& 0xfff0f000) | ((addend
& 0xf000) << 4)
12403 | (addend
& 0xfff);
12404 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
12407 case R_ARM_THM_MOVW_ABS_NC
:
12408 case R_ARM_THM_MOVT_ABS
:
12409 value
= (value
& 0xfbf08f00) | ((addend
& 0xf700) << 4)
12410 | (addend
& 0xff) | ((addend
& 0x0800) << 15);
12411 bfd_put_16 (input_bfd
, value
>> 16,
12412 contents
+ rel
->r_offset
);
12413 bfd_put_16 (input_bfd
, value
,
12414 contents
+ rel
->r_offset
+ 2);
12418 value
= (value
& ~ howto
->dst_mask
)
12419 | (addend
& howto
->dst_mask
);
12420 bfd_put_32 (input_bfd
, value
, contents
+ rel
->r_offset
);
12426 relocation
= _bfd_elf_rela_local_sym (output_bfd
, sym
, &sec
, rel
);
12430 bfd_boolean warned
, ignored
;
12432 RELOC_FOR_GLOBAL_SYMBOL (info
, input_bfd
, input_section
, rel
,
12433 r_symndx
, symtab_hdr
, sym_hashes
,
12434 h
, sec
, relocation
,
12435 unresolved_reloc
, warned
, ignored
);
12437 sym_type
= h
->type
;
12440 if (sec
!= NULL
&& discarded_section (sec
))
12441 RELOC_AGAINST_DISCARDED_SECTION (info
, input_bfd
, input_section
,
12442 rel
, 1, relend
, howto
, 0, contents
);
12444 if (bfd_link_relocatable (info
))
12446 /* This is a relocatable link. We don't have to change
12447 anything, unless the reloc is against a section symbol,
12448 in which case we have to adjust according to where the
12449 section symbol winds up in the output section. */
12450 if (sym
!= NULL
&& ELF_ST_TYPE (sym
->st_info
) == STT_SECTION
)
12452 if (globals
->use_rel
)
12453 arm_add_to_rel (input_bfd
, contents
+ rel
->r_offset
,
12454 howto
, (bfd_signed_vma
) sec
->output_offset
);
12456 rel
->r_addend
+= sec
->output_offset
;
12462 name
= h
->root
.root
.string
;
12465 name
= (bfd_elf_string_from_elf_section
12466 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
12467 if (name
== NULL
|| *name
== '\0')
12468 name
= bfd_section_name (input_bfd
, sec
);
12471 if (r_symndx
!= STN_UNDEF
12472 && r_type
!= R_ARM_NONE
12474 || h
->root
.type
== bfd_link_hash_defined
12475 || h
->root
.type
== bfd_link_hash_defweak
)
12476 && IS_ARM_TLS_RELOC (r_type
) != (sym_type
== STT_TLS
))
12479 ((sym_type
== STT_TLS
12480 /* xgettext:c-format */
12481 ? _("%B(%A+%#Lx): %s used with TLS symbol %s")
12482 /* xgettext:c-format */
12483 : _("%B(%A+%#Lx): %s used with non-TLS symbol %s")),
12491 /* We call elf32_arm_final_link_relocate unless we're completely
12492 done, i.e., the relaxation produced the final output we want,
12493 and we won't let anybody mess with it. Also, we have to do
12494 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12495 both in relaxed and non-relaxed cases. */
12496 if ((elf32_arm_tls_transition (info
, r_type
, h
) != (unsigned)r_type
)
12497 || (IS_ARM_TLS_GNU_RELOC (r_type
)
12498 && !((h
? elf32_arm_hash_entry (h
)->tls_type
:
12499 elf32_arm_local_got_tls_type (input_bfd
)[r_symndx
])
12502 r
= elf32_arm_tls_relax (globals
, input_bfd
, input_section
,
12503 contents
, rel
, h
== NULL
);
12504 /* This may have been marked unresolved because it came from
12505 a shared library. But we've just dealt with that. */
12506 unresolved_reloc
= 0;
12509 r
= bfd_reloc_continue
;
12511 if (r
== bfd_reloc_continue
)
12513 unsigned char branch_type
=
12514 h
? ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
)
12515 : ARM_GET_SYM_BRANCH_TYPE (sym
->st_target_internal
);
12517 r
= elf32_arm_final_link_relocate (howto
, input_bfd
, output_bfd
,
12518 input_section
, contents
, rel
,
12519 relocation
, info
, sec
, name
,
12520 sym_type
, branch_type
, h
,
12525 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12526 because such sections are not SEC_ALLOC and thus ld.so will
12527 not process them. */
12528 if (unresolved_reloc
12529 && !((input_section
->flags
& SEC_DEBUGGING
) != 0
12531 && _bfd_elf_section_offset (output_bfd
, info
, input_section
,
12532 rel
->r_offset
) != (bfd_vma
) -1)
12535 /* xgettext:c-format */
12536 (_("%B(%A+%#Lx): unresolvable %s relocation against symbol `%s'"),
12541 h
->root
.root
.string
);
12545 if (r
!= bfd_reloc_ok
)
12549 case bfd_reloc_overflow
:
12550 /* If the overflowing reloc was to an undefined symbol,
12551 we have already printed one error message and there
12552 is no point complaining again. */
12553 if (!h
|| h
->root
.type
!= bfd_link_hash_undefined
)
12554 (*info
->callbacks
->reloc_overflow
)
12555 (info
, (h
? &h
->root
: NULL
), name
, howto
->name
,
12556 (bfd_vma
) 0, input_bfd
, input_section
, rel
->r_offset
);
12559 case bfd_reloc_undefined
:
12560 (*info
->callbacks
->undefined_symbol
)
12561 (info
, name
, input_bfd
, input_section
, rel
->r_offset
, TRUE
);
12564 case bfd_reloc_outofrange
:
12565 error_message
= _("out of range");
12568 case bfd_reloc_notsupported
:
12569 error_message
= _("unsupported relocation");
12572 case bfd_reloc_dangerous
:
12573 /* error_message should already be set. */
12577 error_message
= _("unknown error");
12578 /* Fall through. */
12581 BFD_ASSERT (error_message
!= NULL
);
12582 (*info
->callbacks
->reloc_dangerous
)
12583 (info
, error_message
, input_bfd
, input_section
, rel
->r_offset
);
12592 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12593 adds the edit to the start of the list. (The list must be built in order of
12594 ascending TINDEX: the function's callers are primarily responsible for
12595 maintaining that condition). */
12598 add_unwind_table_edit (arm_unwind_table_edit
**head
,
12599 arm_unwind_table_edit
**tail
,
12600 arm_unwind_edit_type type
,
12601 asection
*linked_section
,
12602 unsigned int tindex
)
12604 arm_unwind_table_edit
*new_edit
= (arm_unwind_table_edit
*)
12605 xmalloc (sizeof (arm_unwind_table_edit
));
12607 new_edit
->type
= type
;
12608 new_edit
->linked_section
= linked_section
;
12609 new_edit
->index
= tindex
;
12613 new_edit
->next
= NULL
;
12616 (*tail
)->next
= new_edit
;
12618 (*tail
) = new_edit
;
12621 (*head
) = new_edit
;
12625 new_edit
->next
= *head
;
12634 static _arm_elf_section_data
*get_arm_elf_section_data (asection
*);
12636 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12638 adjust_exidx_size(asection
*exidx_sec
, int adjust
)
12642 if (!exidx_sec
->rawsize
)
12643 exidx_sec
->rawsize
= exidx_sec
->size
;
12645 bfd_set_section_size (exidx_sec
->owner
, exidx_sec
, exidx_sec
->size
+ adjust
);
12646 out_sec
= exidx_sec
->output_section
;
12647 /* Adjust size of output section. */
12648 bfd_set_section_size (out_sec
->owner
, out_sec
, out_sec
->size
+adjust
);
12651 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12653 insert_cantunwind_after(asection
*text_sec
, asection
*exidx_sec
)
12655 struct _arm_elf_section_data
*exidx_arm_data
;
12657 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
12658 add_unwind_table_edit (
12659 &exidx_arm_data
->u
.exidx
.unwind_edit_list
,
12660 &exidx_arm_data
->u
.exidx
.unwind_edit_tail
,
12661 INSERT_EXIDX_CANTUNWIND_AT_END
, text_sec
, UINT_MAX
);
12663 exidx_arm_data
->additional_reloc_count
++;
12665 adjust_exidx_size(exidx_sec
, 8);
12668 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12669 made to those tables, such that:
12671 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12672 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12673 codes which have been inlined into the index).
12675 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12677 The edits are applied when the tables are written
12678 (in elf32_arm_write_section). */
12681 elf32_arm_fix_exidx_coverage (asection
**text_section_order
,
12682 unsigned int num_text_sections
,
12683 struct bfd_link_info
*info
,
12684 bfd_boolean merge_exidx_entries
)
12687 unsigned int last_second_word
= 0, i
;
12688 asection
*last_exidx_sec
= NULL
;
12689 asection
*last_text_sec
= NULL
;
12690 int last_unwind_type
= -1;
12692 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12694 for (inp
= info
->input_bfds
; inp
!= NULL
; inp
= inp
->link
.next
)
12698 for (sec
= inp
->sections
; sec
!= NULL
; sec
= sec
->next
)
12700 struct bfd_elf_section_data
*elf_sec
= elf_section_data (sec
);
12701 Elf_Internal_Shdr
*hdr
= &elf_sec
->this_hdr
;
12703 if (!hdr
|| hdr
->sh_type
!= SHT_ARM_EXIDX
)
12706 if (elf_sec
->linked_to
)
12708 Elf_Internal_Shdr
*linked_hdr
12709 = &elf_section_data (elf_sec
->linked_to
)->this_hdr
;
12710 struct _arm_elf_section_data
*linked_sec_arm_data
12711 = get_arm_elf_section_data (linked_hdr
->bfd_section
);
12713 if (linked_sec_arm_data
== NULL
)
12716 /* Link this .ARM.exidx section back from the text section it
12718 linked_sec_arm_data
->u
.text
.arm_exidx_sec
= sec
;
12723 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12724 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12725 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12727 for (i
= 0; i
< num_text_sections
; i
++)
12729 asection
*sec
= text_section_order
[i
];
12730 asection
*exidx_sec
;
12731 struct _arm_elf_section_data
*arm_data
= get_arm_elf_section_data (sec
);
12732 struct _arm_elf_section_data
*exidx_arm_data
;
12733 bfd_byte
*contents
= NULL
;
12734 int deleted_exidx_bytes
= 0;
12736 arm_unwind_table_edit
*unwind_edit_head
= NULL
;
12737 arm_unwind_table_edit
*unwind_edit_tail
= NULL
;
12738 Elf_Internal_Shdr
*hdr
;
12741 if (arm_data
== NULL
)
12744 exidx_sec
= arm_data
->u
.text
.arm_exidx_sec
;
12745 if (exidx_sec
== NULL
)
12747 /* Section has no unwind data. */
12748 if (last_unwind_type
== 0 || !last_exidx_sec
)
12751 /* Ignore zero sized sections. */
12752 if (sec
->size
== 0)
12755 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
12756 last_unwind_type
= 0;
12760 /* Skip /DISCARD/ sections. */
12761 if (bfd_is_abs_section (exidx_sec
->output_section
))
12764 hdr
= &elf_section_data (exidx_sec
)->this_hdr
;
12765 if (hdr
->sh_type
!= SHT_ARM_EXIDX
)
12768 exidx_arm_data
= get_arm_elf_section_data (exidx_sec
);
12769 if (exidx_arm_data
== NULL
)
12772 ibfd
= exidx_sec
->owner
;
12774 if (hdr
->contents
!= NULL
)
12775 contents
= hdr
->contents
;
12776 else if (! bfd_malloc_and_get_section (ibfd
, exidx_sec
, &contents
))
12780 if (last_unwind_type
> 0)
12782 unsigned int first_word
= bfd_get_32 (ibfd
, contents
);
12783 /* Add cantunwind if first unwind item does not match section
12785 if (first_word
!= sec
->vma
)
12787 insert_cantunwind_after (last_text_sec
, last_exidx_sec
);
12788 last_unwind_type
= 0;
12792 for (j
= 0; j
< hdr
->sh_size
; j
+= 8)
12794 unsigned int second_word
= bfd_get_32 (ibfd
, contents
+ j
+ 4);
12798 /* An EXIDX_CANTUNWIND entry. */
12799 if (second_word
== 1)
12801 if (last_unwind_type
== 0)
12805 /* Inlined unwinding data. Merge if equal to previous. */
12806 else if ((second_word
& 0x80000000) != 0)
12808 if (merge_exidx_entries
12809 && last_second_word
== second_word
&& last_unwind_type
== 1)
12812 last_second_word
= second_word
;
12814 /* Normal table entry. In theory we could merge these too,
12815 but duplicate entries are likely to be much less common. */
12819 if (elide
&& !bfd_link_relocatable (info
))
12821 add_unwind_table_edit (&unwind_edit_head
, &unwind_edit_tail
,
12822 DELETE_EXIDX_ENTRY
, NULL
, j
/ 8);
12824 deleted_exidx_bytes
+= 8;
12827 last_unwind_type
= unwind_type
;
12830 /* Free contents if we allocated it ourselves. */
12831 if (contents
!= hdr
->contents
)
12834 /* Record edits to be applied later (in elf32_arm_write_section). */
12835 exidx_arm_data
->u
.exidx
.unwind_edit_list
= unwind_edit_head
;
12836 exidx_arm_data
->u
.exidx
.unwind_edit_tail
= unwind_edit_tail
;
12838 if (deleted_exidx_bytes
> 0)
12839 adjust_exidx_size(exidx_sec
, -deleted_exidx_bytes
);
12841 last_exidx_sec
= exidx_sec
;
12842 last_text_sec
= sec
;
12845 /* Add terminating CANTUNWIND entry. */
12846 if (!bfd_link_relocatable (info
) && last_exidx_sec
12847 && last_unwind_type
!= 0)
12848 insert_cantunwind_after(last_text_sec
, last_exidx_sec
);
12854 elf32_arm_output_glue_section (struct bfd_link_info
*info
, bfd
*obfd
,
12855 bfd
*ibfd
, const char *name
)
12857 asection
*sec
, *osec
;
12859 sec
= bfd_get_linker_section (ibfd
, name
);
12860 if (sec
== NULL
|| (sec
->flags
& SEC_EXCLUDE
) != 0)
12863 osec
= sec
->output_section
;
12864 if (elf32_arm_write_section (obfd
, info
, sec
, sec
->contents
))
12867 if (! bfd_set_section_contents (obfd
, osec
, sec
->contents
,
12868 sec
->output_offset
, sec
->size
))
12875 elf32_arm_final_link (bfd
*abfd
, struct bfd_link_info
*info
)
12877 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
12878 asection
*sec
, *osec
;
12880 if (globals
== NULL
)
12883 /* Invoke the regular ELF backend linker to do all the work. */
12884 if (!bfd_elf_final_link (abfd
, info
))
12887 /* Process stub sections (eg BE8 encoding, ...). */
12888 struct elf32_arm_link_hash_table
*htab
= elf32_arm_hash_table (info
);
12890 for (i
=0; i
<htab
->top_id
; i
++)
12892 sec
= htab
->stub_group
[i
].stub_sec
;
12893 /* Only process it once, in its link_sec slot. */
12894 if (sec
&& i
== htab
->stub_group
[i
].link_sec
->id
)
12896 osec
= sec
->output_section
;
12897 elf32_arm_write_section (abfd
, info
, sec
, sec
->contents
);
12898 if (! bfd_set_section_contents (abfd
, osec
, sec
->contents
,
12899 sec
->output_offset
, sec
->size
))
12904 /* Write out any glue sections now that we have created all the
12906 if (globals
->bfd_of_glue_owner
!= NULL
)
12908 if (! elf32_arm_output_glue_section (info
, abfd
,
12909 globals
->bfd_of_glue_owner
,
12910 ARM2THUMB_GLUE_SECTION_NAME
))
12913 if (! elf32_arm_output_glue_section (info
, abfd
,
12914 globals
->bfd_of_glue_owner
,
12915 THUMB2ARM_GLUE_SECTION_NAME
))
12918 if (! elf32_arm_output_glue_section (info
, abfd
,
12919 globals
->bfd_of_glue_owner
,
12920 VFP11_ERRATUM_VENEER_SECTION_NAME
))
12923 if (! elf32_arm_output_glue_section (info
, abfd
,
12924 globals
->bfd_of_glue_owner
,
12925 STM32L4XX_ERRATUM_VENEER_SECTION_NAME
))
12928 if (! elf32_arm_output_glue_section (info
, abfd
,
12929 globals
->bfd_of_glue_owner
,
12930 ARM_BX_GLUE_SECTION_NAME
))
12937 /* Return a best guess for the machine number based on the attributes. */
12939 static unsigned int
12940 bfd_arm_get_mach_from_attributes (bfd
* abfd
)
12942 int arch
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_CPU_arch
);
12946 case TAG_CPU_ARCH_V4
: return bfd_mach_arm_4
;
12947 case TAG_CPU_ARCH_V4T
: return bfd_mach_arm_4T
;
12948 case TAG_CPU_ARCH_V5T
: return bfd_mach_arm_5T
;
12950 case TAG_CPU_ARCH_V5TE
:
12954 BFD_ASSERT (Tag_CPU_name
< NUM_KNOWN_OBJ_ATTRIBUTES
);
12955 name
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_CPU_name
].s
;
12959 if (strcmp (name
, "IWMMXT2") == 0)
12960 return bfd_mach_arm_iWMMXt2
;
12962 if (strcmp (name
, "IWMMXT") == 0)
12963 return bfd_mach_arm_iWMMXt
;
12965 if (strcmp (name
, "XSCALE") == 0)
12969 BFD_ASSERT (Tag_WMMX_arch
< NUM_KNOWN_OBJ_ATTRIBUTES
);
12970 wmmx
= elf_known_obj_attributes (abfd
) [OBJ_ATTR_PROC
][Tag_WMMX_arch
].i
;
12973 case 1: return bfd_mach_arm_iWMMXt
;
12974 case 2: return bfd_mach_arm_iWMMXt2
;
12975 default: return bfd_mach_arm_XScale
;
12980 return bfd_mach_arm_5TE
;
12984 return bfd_mach_arm_unknown
;
12988 /* Set the right machine number. */
12991 elf32_arm_object_p (bfd
*abfd
)
12995 mach
= bfd_arm_get_mach_from_notes (abfd
, ARM_NOTE_SECTION
);
12997 if (mach
== bfd_mach_arm_unknown
)
12999 if (elf_elfheader (abfd
)->e_flags
& EF_ARM_MAVERICK_FLOAT
)
13000 mach
= bfd_mach_arm_ep9312
;
13002 mach
= bfd_arm_get_mach_from_attributes (abfd
);
13005 bfd_default_set_arch_mach (abfd
, bfd_arch_arm
, mach
);
13009 /* Function to keep ARM specific flags in the ELF header. */
13012 elf32_arm_set_private_flags (bfd
*abfd
, flagword flags
)
13014 if (elf_flags_init (abfd
)
13015 && elf_elfheader (abfd
)->e_flags
!= flags
)
13017 if (EF_ARM_EABI_VERSION (flags
) == EF_ARM_EABI_UNKNOWN
)
13019 if (flags
& EF_ARM_INTERWORK
)
13021 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
13025 (_("Warning: Clearing the interworking flag of %B due to outside request"),
13031 elf_elfheader (abfd
)->e_flags
= flags
;
13032 elf_flags_init (abfd
) = TRUE
;
13038 /* Copy backend specific data from one object module to another. */
13041 elf32_arm_copy_private_bfd_data (bfd
*ibfd
, bfd
*obfd
)
13044 flagword out_flags
;
13046 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
13049 in_flags
= elf_elfheader (ibfd
)->e_flags
;
13050 out_flags
= elf_elfheader (obfd
)->e_flags
;
13052 if (elf_flags_init (obfd
)
13053 && EF_ARM_EABI_VERSION (out_flags
) == EF_ARM_EABI_UNKNOWN
13054 && in_flags
!= out_flags
)
13056 /* Cannot mix APCS26 and APCS32 code. */
13057 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
13060 /* Cannot mix float APCS and non-float APCS code. */
13061 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
13064 /* If the src and dest have different interworking flags
13065 then turn off the interworking bit. */
13066 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
13068 if (out_flags
& EF_ARM_INTERWORK
)
13070 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13073 in_flags
&= ~EF_ARM_INTERWORK
;
13076 /* Likewise for PIC, though don't warn for this case. */
13077 if ((in_flags
& EF_ARM_PIC
) != (out_flags
& EF_ARM_PIC
))
13078 in_flags
&= ~EF_ARM_PIC
;
13081 elf_elfheader (obfd
)->e_flags
= in_flags
;
13082 elf_flags_init (obfd
) = TRUE
;
13084 return _bfd_elf_copy_private_bfd_data (ibfd
, obfd
);
13087 /* Values for Tag_ABI_PCS_R9_use. */
13096 /* Values for Tag_ABI_PCS_RW_data. */
13099 AEABI_PCS_RW_data_absolute
,
13100 AEABI_PCS_RW_data_PCrel
,
13101 AEABI_PCS_RW_data_SBrel
,
13102 AEABI_PCS_RW_data_unused
13105 /* Values for Tag_ABI_enum_size. */
13111 AEABI_enum_forced_wide
13114 /* Determine whether an object attribute tag takes an integer, a
13118 elf32_arm_obj_attrs_arg_type (int tag
)
13120 if (tag
== Tag_compatibility
)
13121 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_STR_VAL
;
13122 else if (tag
== Tag_nodefaults
)
13123 return ATTR_TYPE_FLAG_INT_VAL
| ATTR_TYPE_FLAG_NO_DEFAULT
;
13124 else if (tag
== Tag_CPU_raw_name
|| tag
== Tag_CPU_name
)
13125 return ATTR_TYPE_FLAG_STR_VAL
;
13127 return ATTR_TYPE_FLAG_INT_VAL
;
13129 return (tag
& 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL
: ATTR_TYPE_FLAG_INT_VAL
;
13132 /* The ABI defines that Tag_conformance should be emitted first, and that
13133 Tag_nodefaults should be second (if either is defined). This sets those
13134 two positions, and bumps up the position of all the remaining tags to
13137 elf32_arm_obj_attrs_order (int num
)
13139 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
)
13140 return Tag_conformance
;
13141 if (num
== LEAST_KNOWN_OBJ_ATTRIBUTE
+ 1)
13142 return Tag_nodefaults
;
13143 if ((num
- 2) < Tag_nodefaults
)
13145 if ((num
- 1) < Tag_conformance
)
13150 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13152 elf32_arm_obj_attrs_handle_unknown (bfd
*abfd
, int tag
)
13154 if ((tag
& 127) < 64)
13157 (_("%B: Unknown mandatory EABI object attribute %d"),
13159 bfd_set_error (bfd_error_bad_value
);
13165 (_("Warning: %B: Unknown EABI object attribute %d"),
13171 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13172 Returns -1 if no architecture could be read. */
13175 get_secondary_compatible_arch (bfd
*abfd
)
13177 obj_attribute
*attr
=
13178 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
13180 /* Note: the tag and its argument below are uleb128 values, though
13181 currently-defined values fit in one byte for each. */
13183 && attr
->s
[0] == Tag_CPU_arch
13184 && (attr
->s
[1] & 128) != 128
13185 && attr
->s
[2] == 0)
13188 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13192 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13193 The tag is removed if ARCH is -1. */
13196 set_secondary_compatible_arch (bfd
*abfd
, int arch
)
13198 obj_attribute
*attr
=
13199 &elf_known_obj_attributes_proc (abfd
)[Tag_also_compatible_with
];
13207 /* Note: the tag and its argument below are uleb128 values, though
13208 currently-defined values fit in one byte for each. */
13210 attr
->s
= (char *) bfd_alloc (abfd
, 3);
13211 attr
->s
[0] = Tag_CPU_arch
;
13216 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13220 tag_cpu_arch_combine (bfd
*ibfd
, int oldtag
, int *secondary_compat_out
,
13221 int newtag
, int secondary_compat
)
13223 #define T(X) TAG_CPU_ARCH_##X
13224 int tagl
, tagh
, result
;
13227 T(V6T2
), /* PRE_V4. */
13229 T(V6T2
), /* V4T. */
13230 T(V6T2
), /* V5T. */
13231 T(V6T2
), /* V5TE. */
13232 T(V6T2
), /* V5TEJ. */
13235 T(V6T2
) /* V6T2. */
13239 T(V6K
), /* PRE_V4. */
13243 T(V6K
), /* V5TE. */
13244 T(V6K
), /* V5TEJ. */
13246 T(V6KZ
), /* V6KZ. */
13252 T(V7
), /* PRE_V4. */
13257 T(V7
), /* V5TEJ. */
13270 T(V6K
), /* V5TE. */
13271 T(V6K
), /* V5TEJ. */
13273 T(V6KZ
), /* V6KZ. */
13277 T(V6_M
) /* V6_M. */
13279 const int v6s_m
[] =
13285 T(V6K
), /* V5TE. */
13286 T(V6K
), /* V5TEJ. */
13288 T(V6KZ
), /* V6KZ. */
13292 T(V6S_M
), /* V6_M. */
13293 T(V6S_M
) /* V6S_M. */
13295 const int v7e_m
[] =
13299 T(V7E_M
), /* V4T. */
13300 T(V7E_M
), /* V5T. */
13301 T(V7E_M
), /* V5TE. */
13302 T(V7E_M
), /* V5TEJ. */
13303 T(V7E_M
), /* V6. */
13304 T(V7E_M
), /* V6KZ. */
13305 T(V7E_M
), /* V6T2. */
13306 T(V7E_M
), /* V6K. */
13307 T(V7E_M
), /* V7. */
13308 T(V7E_M
), /* V6_M. */
13309 T(V7E_M
), /* V6S_M. */
13310 T(V7E_M
) /* V7E_M. */
13314 T(V8
), /* PRE_V4. */
13319 T(V8
), /* V5TEJ. */
13326 T(V8
), /* V6S_M. */
13327 T(V8
), /* V7E_M. */
13332 T(V8R
), /* PRE_V4. */
13336 T(V8R
), /* V5TE. */
13337 T(V8R
), /* V5TEJ. */
13339 T(V8R
), /* V6KZ. */
13340 T(V8R
), /* V6T2. */
13343 T(V8R
), /* V6_M. */
13344 T(V8R
), /* V6S_M. */
13345 T(V8R
), /* V7E_M. */
13349 const int v8m_baseline
[] =
13362 T(V8M_BASE
), /* V6_M. */
13363 T(V8M_BASE
), /* V6S_M. */
13367 T(V8M_BASE
) /* V8-M BASELINE. */
13369 const int v8m_mainline
[] =
13381 T(V8M_MAIN
), /* V7. */
13382 T(V8M_MAIN
), /* V6_M. */
13383 T(V8M_MAIN
), /* V6S_M. */
13384 T(V8M_MAIN
), /* V7E_M. */
13387 T(V8M_MAIN
), /* V8-M BASELINE. */
13388 T(V8M_MAIN
) /* V8-M MAINLINE. */
13390 const int v4t_plus_v6_m
[] =
13396 T(V5TE
), /* V5TE. */
13397 T(V5TEJ
), /* V5TEJ. */
13399 T(V6KZ
), /* V6KZ. */
13400 T(V6T2
), /* V6T2. */
13403 T(V6_M
), /* V6_M. */
13404 T(V6S_M
), /* V6S_M. */
13405 T(V7E_M
), /* V7E_M. */
13408 T(V8M_BASE
), /* V8-M BASELINE. */
13409 T(V8M_MAIN
), /* V8-M MAINLINE. */
13410 T(V4T_PLUS_V6_M
) /* V4T plus V6_M. */
13412 const int *comb
[] =
13424 /* Pseudo-architecture. */
13428 /* Check we've not got a higher architecture than we know about. */
13430 if (oldtag
> MAX_TAG_CPU_ARCH
|| newtag
> MAX_TAG_CPU_ARCH
)
13432 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd
);
13436 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13438 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
13439 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
13440 oldtag
= T(V4T_PLUS_V6_M
);
13442 /* And override the new tag if we have a Tag_also_compatible_with on the
13445 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
13446 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
13447 newtag
= T(V4T_PLUS_V6_M
);
13449 tagl
= (oldtag
< newtag
) ? oldtag
: newtag
;
13450 result
= tagh
= (oldtag
> newtag
) ? oldtag
: newtag
;
13452 /* Architectures before V6KZ add features monotonically. */
13453 if (tagh
<= TAG_CPU_ARCH_V6KZ
)
13456 result
= comb
[tagh
- T(V6T2
)] ? comb
[tagh
- T(V6T2
)][tagl
] : -1;
13458 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13459 as the canonical version. */
13460 if (result
== T(V4T_PLUS_V6_M
))
13463 *secondary_compat_out
= T(V6_M
);
13466 *secondary_compat_out
= -1;
13470 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13471 ibfd
, oldtag
, newtag
);
13479 /* Query attributes object to see if integer divide instructions may be
13480 present in an object. */
13482 elf32_arm_attributes_accept_div (const obj_attribute
*attr
)
13484 int arch
= attr
[Tag_CPU_arch
].i
;
13485 int profile
= attr
[Tag_CPU_arch_profile
].i
;
13487 switch (attr
[Tag_DIV_use
].i
)
13490 /* Integer divide allowed if instruction contained in archetecture. */
13491 if (arch
== TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
13493 else if (arch
>= TAG_CPU_ARCH_V7E_M
)
13499 /* Integer divide explicitly prohibited. */
13503 /* Unrecognised case - treat as allowing divide everywhere. */
13505 /* Integer divide allowed in ARM state. */
13510 /* Query attributes object to see if integer divide instructions are
13511 forbidden to be in the object. This is not the inverse of
13512 elf32_arm_attributes_accept_div. */
13514 elf32_arm_attributes_forbid_div (const obj_attribute
*attr
)
13516 return attr
[Tag_DIV_use
].i
== 1;
13519 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13520 are conflicting attributes. */
13523 elf32_arm_merge_eabi_attributes (bfd
*ibfd
, struct bfd_link_info
*info
)
13525 bfd
*obfd
= info
->output_bfd
;
13526 obj_attribute
*in_attr
;
13527 obj_attribute
*out_attr
;
13528 /* Some tags have 0 = don't care, 1 = strong requirement,
13529 2 = weak requirement. */
13530 static const int order_021
[3] = {0, 2, 1};
13532 bfd_boolean result
= TRUE
;
13533 const char *sec_name
= get_elf_backend_data (ibfd
)->obj_attrs_section
;
13535 /* Skip the linker stubs file. This preserves previous behavior
13536 of accepting unknown attributes in the first input file - but
13538 if (ibfd
->flags
& BFD_LINKER_CREATED
)
13541 /* Skip any input that hasn't attribute section.
13542 This enables to link object files without attribute section with
13544 if (bfd_get_section_by_name (ibfd
, sec_name
) == NULL
)
13547 if (!elf_known_obj_attributes_proc (obfd
)[0].i
)
13549 /* This is the first object. Copy the attributes. */
13550 _bfd_elf_copy_obj_attributes (ibfd
, obfd
);
13552 out_attr
= elf_known_obj_attributes_proc (obfd
);
13554 /* Use the Tag_null value to indicate the attributes have been
13558 /* We do not output objects with Tag_MPextension_use_legacy - we move
13559 the attribute's value to Tag_MPextension_use. */
13560 if (out_attr
[Tag_MPextension_use_legacy
].i
!= 0)
13562 if (out_attr
[Tag_MPextension_use
].i
!= 0
13563 && out_attr
[Tag_MPextension_use_legacy
].i
13564 != out_attr
[Tag_MPextension_use
].i
)
13567 (_("Error: %B has both the current and legacy "
13568 "Tag_MPextension_use attributes"), ibfd
);
13572 out_attr
[Tag_MPextension_use
] =
13573 out_attr
[Tag_MPextension_use_legacy
];
13574 out_attr
[Tag_MPextension_use_legacy
].type
= 0;
13575 out_attr
[Tag_MPextension_use_legacy
].i
= 0;
13581 in_attr
= elf_known_obj_attributes_proc (ibfd
);
13582 out_attr
= elf_known_obj_attributes_proc (obfd
);
13583 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13584 if (in_attr
[Tag_ABI_VFP_args
].i
!= out_attr
[Tag_ABI_VFP_args
].i
)
13586 /* Ignore mismatches if the object doesn't use floating point or is
13587 floating point ABI independent. */
13588 if (out_attr
[Tag_ABI_FP_number_model
].i
== AEABI_FP_number_model_none
13589 || (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
13590 && out_attr
[Tag_ABI_VFP_args
].i
== AEABI_VFP_args_compatible
))
13591 out_attr
[Tag_ABI_VFP_args
].i
= in_attr
[Tag_ABI_VFP_args
].i
;
13592 else if (in_attr
[Tag_ABI_FP_number_model
].i
!= AEABI_FP_number_model_none
13593 && in_attr
[Tag_ABI_VFP_args
].i
!= AEABI_VFP_args_compatible
)
13596 (_("error: %B uses VFP register arguments, %B does not"),
13597 in_attr
[Tag_ABI_VFP_args
].i
? ibfd
: obfd
,
13598 in_attr
[Tag_ABI_VFP_args
].i
? obfd
: ibfd
);
13603 for (i
= LEAST_KNOWN_OBJ_ATTRIBUTE
; i
< NUM_KNOWN_OBJ_ATTRIBUTES
; i
++)
13605 /* Merge this attribute with existing attributes. */
13608 case Tag_CPU_raw_name
:
13610 /* These are merged after Tag_CPU_arch. */
13613 case Tag_ABI_optimization_goals
:
13614 case Tag_ABI_FP_optimization_goals
:
13615 /* Use the first value seen. */
13620 int secondary_compat
= -1, secondary_compat_out
= -1;
13621 unsigned int saved_out_attr
= out_attr
[i
].i
;
13623 static const char *name_table
[] =
13625 /* These aren't real CPU names, but we can't guess
13626 that from the architecture version alone. */
13642 "ARM v8-M.baseline",
13643 "ARM v8-M.mainline",
13646 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13647 secondary_compat
= get_secondary_compatible_arch (ibfd
);
13648 secondary_compat_out
= get_secondary_compatible_arch (obfd
);
13649 arch_attr
= tag_cpu_arch_combine (ibfd
, out_attr
[i
].i
,
13650 &secondary_compat_out
,
13654 /* Return with error if failed to merge. */
13655 if (arch_attr
== -1)
13658 out_attr
[i
].i
= arch_attr
;
13660 set_secondary_compatible_arch (obfd
, secondary_compat_out
);
13662 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13663 if (out_attr
[i
].i
== saved_out_attr
)
13664 ; /* Leave the names alone. */
13665 else if (out_attr
[i
].i
== in_attr
[i
].i
)
13667 /* The output architecture has been changed to match the
13668 input architecture. Use the input names. */
13669 out_attr
[Tag_CPU_name
].s
= in_attr
[Tag_CPU_name
].s
13670 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_name
].s
)
13672 out_attr
[Tag_CPU_raw_name
].s
= in_attr
[Tag_CPU_raw_name
].s
13673 ? _bfd_elf_attr_strdup (obfd
, in_attr
[Tag_CPU_raw_name
].s
)
13678 out_attr
[Tag_CPU_name
].s
= NULL
;
13679 out_attr
[Tag_CPU_raw_name
].s
= NULL
;
13682 /* If we still don't have a value for Tag_CPU_name,
13683 make one up now. Tag_CPU_raw_name remains blank. */
13684 if (out_attr
[Tag_CPU_name
].s
== NULL
13685 && out_attr
[i
].i
< ARRAY_SIZE (name_table
))
13686 out_attr
[Tag_CPU_name
].s
=
13687 _bfd_elf_attr_strdup (obfd
, name_table
[out_attr
[i
].i
]);
13691 case Tag_ARM_ISA_use
:
13692 case Tag_THUMB_ISA_use
:
13693 case Tag_WMMX_arch
:
13694 case Tag_Advanced_SIMD_arch
:
13695 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13696 case Tag_ABI_FP_rounding
:
13697 case Tag_ABI_FP_exceptions
:
13698 case Tag_ABI_FP_user_exceptions
:
13699 case Tag_ABI_FP_number_model
:
13700 case Tag_FP_HP_extension
:
13701 case Tag_CPU_unaligned_access
:
13703 case Tag_MPextension_use
:
13704 /* Use the largest value specified. */
13705 if (in_attr
[i
].i
> out_attr
[i
].i
)
13706 out_attr
[i
].i
= in_attr
[i
].i
;
13709 case Tag_ABI_align_preserved
:
13710 case Tag_ABI_PCS_RO_data
:
13711 /* Use the smallest value specified. */
13712 if (in_attr
[i
].i
< out_attr
[i
].i
)
13713 out_attr
[i
].i
= in_attr
[i
].i
;
13716 case Tag_ABI_align_needed
:
13717 if ((in_attr
[i
].i
> 0 || out_attr
[i
].i
> 0)
13718 && (in_attr
[Tag_ABI_align_preserved
].i
== 0
13719 || out_attr
[Tag_ABI_align_preserved
].i
== 0))
13721 /* This error message should be enabled once all non-conformant
13722 binaries in the toolchain have had the attributes set
13725 (_("error: %B: 8-byte data alignment conflicts with %B"),
13729 /* Fall through. */
13730 case Tag_ABI_FP_denormal
:
13731 case Tag_ABI_PCS_GOT_use
:
13732 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13733 value if greater than 2 (for future-proofing). */
13734 if ((in_attr
[i
].i
> 2 && in_attr
[i
].i
> out_attr
[i
].i
)
13735 || (in_attr
[i
].i
<= 2 && out_attr
[i
].i
<= 2
13736 && order_021
[in_attr
[i
].i
] > order_021
[out_attr
[i
].i
]))
13737 out_attr
[i
].i
= in_attr
[i
].i
;
13740 case Tag_Virtualization_use
:
13741 /* The virtualization tag effectively stores two bits of
13742 information: the intended use of TrustZone (in bit 0), and the
13743 intended use of Virtualization (in bit 1). */
13744 if (out_attr
[i
].i
== 0)
13745 out_attr
[i
].i
= in_attr
[i
].i
;
13746 else if (in_attr
[i
].i
!= 0
13747 && in_attr
[i
].i
!= out_attr
[i
].i
)
13749 if (in_attr
[i
].i
<= 3 && out_attr
[i
].i
<= 3)
13754 (_("error: %B: unable to merge virtualization attributes "
13762 case Tag_CPU_arch_profile
:
13763 if (out_attr
[i
].i
!= in_attr
[i
].i
)
13765 /* 0 will merge with anything.
13766 'A' and 'S' merge to 'A'.
13767 'R' and 'S' merge to 'R'.
13768 'M' and 'A|R|S' is an error. */
13769 if (out_attr
[i
].i
== 0
13770 || (out_attr
[i
].i
== 'S'
13771 && (in_attr
[i
].i
== 'A' || in_attr
[i
].i
== 'R')))
13772 out_attr
[i
].i
= in_attr
[i
].i
;
13773 else if (in_attr
[i
].i
== 0
13774 || (in_attr
[i
].i
== 'S'
13775 && (out_attr
[i
].i
== 'A' || out_attr
[i
].i
== 'R')))
13776 ; /* Do nothing. */
13780 (_("error: %B: Conflicting architecture profiles %c/%c"),
13782 in_attr
[i
].i
? in_attr
[i
].i
: '0',
13783 out_attr
[i
].i
? out_attr
[i
].i
: '0');
13789 case Tag_DSP_extension
:
13790 /* No need to change output value if any of:
13791 - pre (<=) ARMv5T input architecture (do not have DSP)
13792 - M input profile not ARMv7E-M and do not have DSP. */
13793 if (in_attr
[Tag_CPU_arch
].i
<= 3
13794 || (in_attr
[Tag_CPU_arch_profile
].i
== 'M'
13795 && in_attr
[Tag_CPU_arch
].i
!= 13
13796 && in_attr
[i
].i
== 0))
13797 ; /* Do nothing. */
13798 /* Output value should be 0 if DSP part of architecture, ie.
13799 - post (>=) ARMv5te architecture output
13800 - A, R or S profile output or ARMv7E-M output architecture. */
13801 else if (out_attr
[Tag_CPU_arch
].i
>= 4
13802 && (out_attr
[Tag_CPU_arch_profile
].i
== 'A'
13803 || out_attr
[Tag_CPU_arch_profile
].i
== 'R'
13804 || out_attr
[Tag_CPU_arch_profile
].i
== 'S'
13805 || out_attr
[Tag_CPU_arch
].i
== 13))
13807 /* Otherwise, DSP instructions are added and not part of output
13815 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13816 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13817 when it's 0. It might mean absence of FP hardware if
13818 Tag_FP_arch is zero. */
13820 #define VFP_VERSION_COUNT 9
13821 static const struct
13825 } vfp_versions
[VFP_VERSION_COUNT
] =
13841 /* If the output has no requirement about FP hardware,
13842 follow the requirement of the input. */
13843 if (out_attr
[i
].i
== 0)
13845 /* This assert is still reasonable, we shouldn't
13846 produce the suspicious build attribute
13847 combination (See below for in_attr). */
13848 BFD_ASSERT (out_attr
[Tag_ABI_HardFP_use
].i
== 0);
13849 out_attr
[i
].i
= in_attr
[i
].i
;
13850 out_attr
[Tag_ABI_HardFP_use
].i
13851 = in_attr
[Tag_ABI_HardFP_use
].i
;
13854 /* If the input has no requirement about FP hardware, do
13856 else if (in_attr
[i
].i
== 0)
13858 /* We used to assert that Tag_ABI_HardFP_use was
13859 zero here, but we should never assert when
13860 consuming an object file that has suspicious
13861 build attributes. The single precision variant
13862 of 'no FP architecture' is still 'no FP
13863 architecture', so we just ignore the tag in this
13868 /* Both the input and the output have nonzero Tag_FP_arch.
13869 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13871 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13873 if (in_attr
[Tag_ABI_HardFP_use
].i
== 0
13874 && out_attr
[Tag_ABI_HardFP_use
].i
== 0)
13876 /* If the input and the output have different Tag_ABI_HardFP_use,
13877 the combination of them is 0 (implied by Tag_FP_arch). */
13878 else if (in_attr
[Tag_ABI_HardFP_use
].i
13879 != out_attr
[Tag_ABI_HardFP_use
].i
)
13880 out_attr
[Tag_ABI_HardFP_use
].i
= 0;
13882 /* Now we can handle Tag_FP_arch. */
13884 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13885 pick the biggest. */
13886 if (in_attr
[i
].i
>= VFP_VERSION_COUNT
13887 && in_attr
[i
].i
> out_attr
[i
].i
)
13889 out_attr
[i
] = in_attr
[i
];
13892 /* The output uses the superset of input features
13893 (ISA version) and registers. */
13894 ver
= vfp_versions
[in_attr
[i
].i
].ver
;
13895 if (ver
< vfp_versions
[out_attr
[i
].i
].ver
)
13896 ver
= vfp_versions
[out_attr
[i
].i
].ver
;
13897 regs
= vfp_versions
[in_attr
[i
].i
].regs
;
13898 if (regs
< vfp_versions
[out_attr
[i
].i
].regs
)
13899 regs
= vfp_versions
[out_attr
[i
].i
].regs
;
13900 /* This assumes all possible supersets are also a valid
13902 for (newval
= VFP_VERSION_COUNT
- 1; newval
> 0; newval
--)
13904 if (regs
== vfp_versions
[newval
].regs
13905 && ver
== vfp_versions
[newval
].ver
)
13908 out_attr
[i
].i
= newval
;
13911 case Tag_PCS_config
:
13912 if (out_attr
[i
].i
== 0)
13913 out_attr
[i
].i
= in_attr
[i
].i
;
13914 else if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= in_attr
[i
].i
)
13916 /* It's sometimes ok to mix different configs, so this is only
13919 (_("Warning: %B: Conflicting platform configuration"), ibfd
);
13922 case Tag_ABI_PCS_R9_use
:
13923 if (in_attr
[i
].i
!= out_attr
[i
].i
13924 && out_attr
[i
].i
!= AEABI_R9_unused
13925 && in_attr
[i
].i
!= AEABI_R9_unused
)
13928 (_("error: %B: Conflicting use of R9"), ibfd
);
13931 if (out_attr
[i
].i
== AEABI_R9_unused
)
13932 out_attr
[i
].i
= in_attr
[i
].i
;
13934 case Tag_ABI_PCS_RW_data
:
13935 if (in_attr
[i
].i
== AEABI_PCS_RW_data_SBrel
13936 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_SB
13937 && out_attr
[Tag_ABI_PCS_R9_use
].i
!= AEABI_R9_unused
)
13940 (_("error: %B: SB relative addressing conflicts with use of R9"),
13944 /* Use the smallest value specified. */
13945 if (in_attr
[i
].i
< out_attr
[i
].i
)
13946 out_attr
[i
].i
= in_attr
[i
].i
;
13948 case Tag_ABI_PCS_wchar_t
:
13949 if (out_attr
[i
].i
&& in_attr
[i
].i
&& out_attr
[i
].i
!= in_attr
[i
].i
13950 && !elf_arm_tdata (obfd
)->no_wchar_size_warning
)
13953 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13954 ibfd
, in_attr
[i
].i
, out_attr
[i
].i
);
13956 else if (in_attr
[i
].i
&& !out_attr
[i
].i
)
13957 out_attr
[i
].i
= in_attr
[i
].i
;
13959 case Tag_ABI_enum_size
:
13960 if (in_attr
[i
].i
!= AEABI_enum_unused
)
13962 if (out_attr
[i
].i
== AEABI_enum_unused
13963 || out_attr
[i
].i
== AEABI_enum_forced_wide
)
13965 /* The existing object is compatible with anything.
13966 Use whatever requirements the new object has. */
13967 out_attr
[i
].i
= in_attr
[i
].i
;
13969 else if (in_attr
[i
].i
!= AEABI_enum_forced_wide
13970 && out_attr
[i
].i
!= in_attr
[i
].i
13971 && !elf_arm_tdata (obfd
)->no_enum_size_warning
)
13973 static const char *aeabi_enum_names
[] =
13974 { "", "variable-size", "32-bit", "" };
13975 const char *in_name
=
13976 in_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
13977 ? aeabi_enum_names
[in_attr
[i
].i
]
13979 const char *out_name
=
13980 out_attr
[i
].i
< ARRAY_SIZE(aeabi_enum_names
)
13981 ? aeabi_enum_names
[out_attr
[i
].i
]
13984 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13985 ibfd
, in_name
, out_name
);
13989 case Tag_ABI_VFP_args
:
13992 case Tag_ABI_WMMX_args
:
13993 if (in_attr
[i
].i
!= out_attr
[i
].i
)
13996 (_("error: %B uses iWMMXt register arguments, %B does not"),
14001 case Tag_compatibility
:
14002 /* Merged in target-independent code. */
14004 case Tag_ABI_HardFP_use
:
14005 /* This is handled along with Tag_FP_arch. */
14007 case Tag_ABI_FP_16bit_format
:
14008 if (in_attr
[i
].i
!= 0 && out_attr
[i
].i
!= 0)
14010 if (in_attr
[i
].i
!= out_attr
[i
].i
)
14013 (_("error: fp16 format mismatch between %B and %B"),
14018 if (in_attr
[i
].i
!= 0)
14019 out_attr
[i
].i
= in_attr
[i
].i
;
14023 /* A value of zero on input means that the divide instruction may
14024 be used if available in the base architecture as specified via
14025 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14026 the user did not want divide instructions. A value of 2
14027 explicitly means that divide instructions were allowed in ARM
14028 and Thumb state. */
14029 if (in_attr
[i
].i
== out_attr
[i
].i
)
14030 /* Do nothing. */ ;
14031 else if (elf32_arm_attributes_forbid_div (in_attr
)
14032 && !elf32_arm_attributes_accept_div (out_attr
))
14034 else if (elf32_arm_attributes_forbid_div (out_attr
)
14035 && elf32_arm_attributes_accept_div (in_attr
))
14036 out_attr
[i
].i
= in_attr
[i
].i
;
14037 else if (in_attr
[i
].i
== 2)
14038 out_attr
[i
].i
= in_attr
[i
].i
;
14041 case Tag_MPextension_use_legacy
:
14042 /* We don't output objects with Tag_MPextension_use_legacy - we
14043 move the value to Tag_MPextension_use. */
14044 if (in_attr
[i
].i
!= 0 && in_attr
[Tag_MPextension_use
].i
!= 0)
14046 if (in_attr
[Tag_MPextension_use
].i
!= in_attr
[i
].i
)
14049 (_("%B has both the current and legacy "
14050 "Tag_MPextension_use attributes"),
14056 if (in_attr
[i
].i
> out_attr
[Tag_MPextension_use
].i
)
14057 out_attr
[Tag_MPextension_use
] = in_attr
[i
];
14061 case Tag_nodefaults
:
14062 /* This tag is set if it exists, but the value is unused (and is
14063 typically zero). We don't actually need to do anything here -
14064 the merge happens automatically when the type flags are merged
14067 case Tag_also_compatible_with
:
14068 /* Already done in Tag_CPU_arch. */
14070 case Tag_conformance
:
14071 /* Keep the attribute if it matches. Throw it away otherwise.
14072 No attribute means no claim to conform. */
14073 if (!in_attr
[i
].s
|| !out_attr
[i
].s
14074 || strcmp (in_attr
[i
].s
, out_attr
[i
].s
) != 0)
14075 out_attr
[i
].s
= NULL
;
14080 = result
&& _bfd_elf_merge_unknown_attribute_low (ibfd
, obfd
, i
);
14083 /* If out_attr was copied from in_attr then it won't have a type yet. */
14084 if (in_attr
[i
].type
&& !out_attr
[i
].type
)
14085 out_attr
[i
].type
= in_attr
[i
].type
;
14088 /* Merge Tag_compatibility attributes and any common GNU ones. */
14089 if (!_bfd_elf_merge_object_attributes (ibfd
, info
))
14092 /* Check for any attributes not known on ARM. */
14093 result
&= _bfd_elf_merge_unknown_attribute_list (ibfd
, obfd
);
14099 /* Return TRUE if the two EABI versions are incompatible. */
14102 elf32_arm_versions_compatible (unsigned iver
, unsigned over
)
14104 /* v4 and v5 are the same spec before and after it was released,
14105 so allow mixing them. */
14106 if ((iver
== EF_ARM_EABI_VER4
&& over
== EF_ARM_EABI_VER5
)
14107 || (iver
== EF_ARM_EABI_VER5
&& over
== EF_ARM_EABI_VER4
))
14110 return (iver
== over
);
14113 /* Merge backend specific data from an object file to the output
14114 object file when linking. */
14117 elf32_arm_merge_private_bfd_data (bfd
*, struct bfd_link_info
*);
14119 /* Display the flags field. */
14122 elf32_arm_print_private_bfd_data (bfd
*abfd
, void * ptr
)
14124 FILE * file
= (FILE *) ptr
;
14125 unsigned long flags
;
14127 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
);
14129 /* Print normal ELF private data. */
14130 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
14132 flags
= elf_elfheader (abfd
)->e_flags
;
14133 /* Ignore init flag - it may not be set, despite the flags field
14134 containing valid data. */
14136 fprintf (file
, _("private flags = %lx:"), elf_elfheader (abfd
)->e_flags
);
14138 switch (EF_ARM_EABI_VERSION (flags
))
14140 case EF_ARM_EABI_UNKNOWN
:
14141 /* The following flag bits are GNU extensions and not part of the
14142 official ARM ELF extended ABI. Hence they are only decoded if
14143 the EABI version is not set. */
14144 if (flags
& EF_ARM_INTERWORK
)
14145 fprintf (file
, _(" [interworking enabled]"));
14147 if (flags
& EF_ARM_APCS_26
)
14148 fprintf (file
, " [APCS-26]");
14150 fprintf (file
, " [APCS-32]");
14152 if (flags
& EF_ARM_VFP_FLOAT
)
14153 fprintf (file
, _(" [VFP float format]"));
14154 else if (flags
& EF_ARM_MAVERICK_FLOAT
)
14155 fprintf (file
, _(" [Maverick float format]"));
14157 fprintf (file
, _(" [FPA float format]"));
14159 if (flags
& EF_ARM_APCS_FLOAT
)
14160 fprintf (file
, _(" [floats passed in float registers]"));
14162 if (flags
& EF_ARM_PIC
)
14163 fprintf (file
, _(" [position independent]"));
14165 if (flags
& EF_ARM_NEW_ABI
)
14166 fprintf (file
, _(" [new ABI]"));
14168 if (flags
& EF_ARM_OLD_ABI
)
14169 fprintf (file
, _(" [old ABI]"));
14171 if (flags
& EF_ARM_SOFT_FLOAT
)
14172 fprintf (file
, _(" [software FP]"));
14174 flags
&= ~(EF_ARM_INTERWORK
| EF_ARM_APCS_26
| EF_ARM_APCS_FLOAT
14175 | EF_ARM_PIC
| EF_ARM_NEW_ABI
| EF_ARM_OLD_ABI
14176 | EF_ARM_SOFT_FLOAT
| EF_ARM_VFP_FLOAT
14177 | EF_ARM_MAVERICK_FLOAT
);
14180 case EF_ARM_EABI_VER1
:
14181 fprintf (file
, _(" [Version1 EABI]"));
14183 if (flags
& EF_ARM_SYMSARESORTED
)
14184 fprintf (file
, _(" [sorted symbol table]"));
14186 fprintf (file
, _(" [unsorted symbol table]"));
14188 flags
&= ~ EF_ARM_SYMSARESORTED
;
14191 case EF_ARM_EABI_VER2
:
14192 fprintf (file
, _(" [Version2 EABI]"));
14194 if (flags
& EF_ARM_SYMSARESORTED
)
14195 fprintf (file
, _(" [sorted symbol table]"));
14197 fprintf (file
, _(" [unsorted symbol table]"));
14199 if (flags
& EF_ARM_DYNSYMSUSESEGIDX
)
14200 fprintf (file
, _(" [dynamic symbols use segment index]"));
14202 if (flags
& EF_ARM_MAPSYMSFIRST
)
14203 fprintf (file
, _(" [mapping symbols precede others]"));
14205 flags
&= ~(EF_ARM_SYMSARESORTED
| EF_ARM_DYNSYMSUSESEGIDX
14206 | EF_ARM_MAPSYMSFIRST
);
14209 case EF_ARM_EABI_VER3
:
14210 fprintf (file
, _(" [Version3 EABI]"));
14213 case EF_ARM_EABI_VER4
:
14214 fprintf (file
, _(" [Version4 EABI]"));
14217 case EF_ARM_EABI_VER5
:
14218 fprintf (file
, _(" [Version5 EABI]"));
14220 if (flags
& EF_ARM_ABI_FLOAT_SOFT
)
14221 fprintf (file
, _(" [soft-float ABI]"));
14223 if (flags
& EF_ARM_ABI_FLOAT_HARD
)
14224 fprintf (file
, _(" [hard-float ABI]"));
14226 flags
&= ~(EF_ARM_ABI_FLOAT_SOFT
| EF_ARM_ABI_FLOAT_HARD
);
14229 if (flags
& EF_ARM_BE8
)
14230 fprintf (file
, _(" [BE8]"));
14232 if (flags
& EF_ARM_LE8
)
14233 fprintf (file
, _(" [LE8]"));
14235 flags
&= ~(EF_ARM_LE8
| EF_ARM_BE8
);
14239 fprintf (file
, _(" <EABI version unrecognised>"));
14243 flags
&= ~ EF_ARM_EABIMASK
;
14245 if (flags
& EF_ARM_RELEXEC
)
14246 fprintf (file
, _(" [relocatable executable]"));
14248 flags
&= ~EF_ARM_RELEXEC
;
14251 fprintf (file
, _("<Unrecognised flag bits set>"));
14253 fputc ('\n', file
);
14259 elf32_arm_get_symbol_type (Elf_Internal_Sym
* elf_sym
, int type
)
14261 switch (ELF_ST_TYPE (elf_sym
->st_info
))
14263 case STT_ARM_TFUNC
:
14264 return ELF_ST_TYPE (elf_sym
->st_info
);
14266 case STT_ARM_16BIT
:
14267 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14268 This allows us to distinguish between data used by Thumb instructions
14269 and non-data (which is probably code) inside Thumb regions of an
14271 if (type
!= STT_OBJECT
&& type
!= STT_TLS
)
14272 return ELF_ST_TYPE (elf_sym
->st_info
);
14283 elf32_arm_gc_mark_hook (asection
*sec
,
14284 struct bfd_link_info
*info
,
14285 Elf_Internal_Rela
*rel
,
14286 struct elf_link_hash_entry
*h
,
14287 Elf_Internal_Sym
*sym
)
14290 switch (ELF32_R_TYPE (rel
->r_info
))
14292 case R_ARM_GNU_VTINHERIT
:
14293 case R_ARM_GNU_VTENTRY
:
14297 return _bfd_elf_gc_mark_hook (sec
, info
, rel
, h
, sym
);
14300 /* Look through the relocs for a section during the first phase. */
14303 elf32_arm_check_relocs (bfd
*abfd
, struct bfd_link_info
*info
,
14304 asection
*sec
, const Elf_Internal_Rela
*relocs
)
14306 Elf_Internal_Shdr
*symtab_hdr
;
14307 struct elf_link_hash_entry
**sym_hashes
;
14308 const Elf_Internal_Rela
*rel
;
14309 const Elf_Internal_Rela
*rel_end
;
14312 struct elf32_arm_link_hash_table
*htab
;
14313 bfd_boolean call_reloc_p
;
14314 bfd_boolean may_become_dynamic_p
;
14315 bfd_boolean may_need_local_target_p
;
14316 unsigned long nsyms
;
14318 if (bfd_link_relocatable (info
))
14321 BFD_ASSERT (is_arm_elf (abfd
));
14323 htab
= elf32_arm_hash_table (info
);
14329 /* Create dynamic sections for relocatable executables so that we can
14330 copy relocations. */
14331 if (htab
->root
.is_relocatable_executable
14332 && ! htab
->root
.dynamic_sections_created
)
14334 if (! _bfd_elf_link_create_dynamic_sections (abfd
, info
))
14338 if (htab
->root
.dynobj
== NULL
)
14339 htab
->root
.dynobj
= abfd
;
14340 if (!create_ifunc_sections (info
))
14343 dynobj
= htab
->root
.dynobj
;
14345 symtab_hdr
= & elf_symtab_hdr (abfd
);
14346 sym_hashes
= elf_sym_hashes (abfd
);
14347 nsyms
= NUM_SHDR_ENTRIES (symtab_hdr
);
14349 rel_end
= relocs
+ sec
->reloc_count
;
14350 for (rel
= relocs
; rel
< rel_end
; rel
++)
14352 Elf_Internal_Sym
*isym
;
14353 struct elf_link_hash_entry
*h
;
14354 struct elf32_arm_link_hash_entry
*eh
;
14355 unsigned int r_symndx
;
14358 r_symndx
= ELF32_R_SYM (rel
->r_info
);
14359 r_type
= ELF32_R_TYPE (rel
->r_info
);
14360 r_type
= arm_real_reloc_type (htab
, r_type
);
14362 if (r_symndx
>= nsyms
14363 /* PR 9934: It is possible to have relocations that do not
14364 refer to symbols, thus it is also possible to have an
14365 object file containing relocations but no symbol table. */
14366 && (r_symndx
> STN_UNDEF
|| nsyms
> 0))
14368 _bfd_error_handler (_("%B: bad symbol index: %d"), abfd
,
14377 if (r_symndx
< symtab_hdr
->sh_info
)
14379 /* A local symbol. */
14380 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
,
14387 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
14388 while (h
->root
.type
== bfd_link_hash_indirect
14389 || h
->root
.type
== bfd_link_hash_warning
)
14390 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
14392 /* PR15323, ref flags aren't set for references in the
14394 h
->root
.non_ir_ref_regular
= 1;
14398 eh
= (struct elf32_arm_link_hash_entry
*) h
;
14400 call_reloc_p
= FALSE
;
14401 may_become_dynamic_p
= FALSE
;
14402 may_need_local_target_p
= FALSE
;
14404 /* Could be done earlier, if h were already available. */
14405 r_type
= elf32_arm_tls_transition (info
, r_type
, h
);
14409 case R_ARM_GOT_PREL
:
14410 case R_ARM_TLS_GD32
:
14411 case R_ARM_TLS_IE32
:
14412 case R_ARM_TLS_GOTDESC
:
14413 case R_ARM_TLS_DESCSEQ
:
14414 case R_ARM_THM_TLS_DESCSEQ
:
14415 case R_ARM_TLS_CALL
:
14416 case R_ARM_THM_TLS_CALL
:
14417 /* This symbol requires a global offset table entry. */
14419 int tls_type
, old_tls_type
;
14423 case R_ARM_TLS_GD32
: tls_type
= GOT_TLS_GD
; break;
14425 case R_ARM_TLS_IE32
: tls_type
= GOT_TLS_IE
; break;
14427 case R_ARM_TLS_GOTDESC
:
14428 case R_ARM_TLS_CALL
: case R_ARM_THM_TLS_CALL
:
14429 case R_ARM_TLS_DESCSEQ
: case R_ARM_THM_TLS_DESCSEQ
:
14430 tls_type
= GOT_TLS_GDESC
; break;
14432 default: tls_type
= GOT_NORMAL
; break;
14435 if (!bfd_link_executable (info
) && (tls_type
& GOT_TLS_IE
))
14436 info
->flags
|= DF_STATIC_TLS
;
14441 old_tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
14445 /* This is a global offset table entry for a local symbol. */
14446 if (!elf32_arm_allocate_local_sym_info (abfd
))
14448 elf_local_got_refcounts (abfd
)[r_symndx
] += 1;
14449 old_tls_type
= elf32_arm_local_got_tls_type (abfd
) [r_symndx
];
14452 /* If a variable is accessed with both tls methods, two
14453 slots may be created. */
14454 if (GOT_TLS_GD_ANY_P (old_tls_type
)
14455 && GOT_TLS_GD_ANY_P (tls_type
))
14456 tls_type
|= old_tls_type
;
14458 /* We will already have issued an error message if there
14459 is a TLS/non-TLS mismatch, based on the symbol
14460 type. So just combine any TLS types needed. */
14461 if (old_tls_type
!= GOT_UNKNOWN
&& old_tls_type
!= GOT_NORMAL
14462 && tls_type
!= GOT_NORMAL
)
14463 tls_type
|= old_tls_type
;
14465 /* If the symbol is accessed in both IE and GDESC
14466 method, we're able to relax. Turn off the GDESC flag,
14467 without messing up with any other kind of tls types
14468 that may be involved. */
14469 if ((tls_type
& GOT_TLS_IE
) && (tls_type
& GOT_TLS_GDESC
))
14470 tls_type
&= ~GOT_TLS_GDESC
;
14472 if (old_tls_type
!= tls_type
)
14475 elf32_arm_hash_entry (h
)->tls_type
= tls_type
;
14477 elf32_arm_local_got_tls_type (abfd
) [r_symndx
] = tls_type
;
14480 /* Fall through. */
14482 case R_ARM_TLS_LDM32
:
14483 if (r_type
== R_ARM_TLS_LDM32
)
14484 htab
->tls_ldm_got
.refcount
++;
14485 /* Fall through. */
14487 case R_ARM_GOTOFF32
:
14489 if (htab
->root
.sgot
== NULL
14490 && !create_got_section (htab
->root
.dynobj
, info
))
14499 case R_ARM_THM_CALL
:
14500 case R_ARM_THM_JUMP24
:
14501 case R_ARM_THM_JUMP19
:
14502 call_reloc_p
= TRUE
;
14503 may_need_local_target_p
= TRUE
;
14507 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14508 ldr __GOTT_INDEX__ offsets. */
14509 if (!htab
->vxworks_p
)
14511 may_need_local_target_p
= TRUE
;
14514 else goto jump_over
;
14516 /* Fall through. */
14518 case R_ARM_MOVW_ABS_NC
:
14519 case R_ARM_MOVT_ABS
:
14520 case R_ARM_THM_MOVW_ABS_NC
:
14521 case R_ARM_THM_MOVT_ABS
:
14522 if (bfd_link_pic (info
))
14525 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14526 abfd
, elf32_arm_howto_table_1
[r_type
].name
,
14527 (h
) ? h
->root
.root
.string
: "a local symbol");
14528 bfd_set_error (bfd_error_bad_value
);
14532 /* Fall through. */
14534 case R_ARM_ABS32_NOI
:
14536 if (h
!= NULL
&& bfd_link_executable (info
))
14538 h
->pointer_equality_needed
= 1;
14540 /* Fall through. */
14542 case R_ARM_REL32_NOI
:
14543 case R_ARM_MOVW_PREL_NC
:
14544 case R_ARM_MOVT_PREL
:
14545 case R_ARM_THM_MOVW_PREL_NC
:
14546 case R_ARM_THM_MOVT_PREL
:
14548 /* Should the interworking branches be listed here? */
14549 if ((bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
14550 && (sec
->flags
& SEC_ALLOC
) != 0)
14553 && elf32_arm_howto_from_type (r_type
)->pc_relative
)
14555 /* In shared libraries and relocatable executables,
14556 we treat local relative references as calls;
14557 see the related SYMBOL_CALLS_LOCAL code in
14558 allocate_dynrelocs. */
14559 call_reloc_p
= TRUE
;
14560 may_need_local_target_p
= TRUE
;
14563 /* We are creating a shared library or relocatable
14564 executable, and this is a reloc against a global symbol,
14565 or a non-PC-relative reloc against a local symbol.
14566 We may need to copy the reloc into the output. */
14567 may_become_dynamic_p
= TRUE
;
14570 may_need_local_target_p
= TRUE
;
14573 /* This relocation describes the C++ object vtable hierarchy.
14574 Reconstruct it for later use during GC. */
14575 case R_ARM_GNU_VTINHERIT
:
14576 if (!bfd_elf_gc_record_vtinherit (abfd
, sec
, h
, rel
->r_offset
))
14580 /* This relocation describes which C++ vtable entries are actually
14581 used. Record for later use during GC. */
14582 case R_ARM_GNU_VTENTRY
:
14583 BFD_ASSERT (h
!= NULL
);
14585 && !bfd_elf_gc_record_vtentry (abfd
, sec
, h
, rel
->r_offset
))
14593 /* We may need a .plt entry if the function this reloc
14594 refers to is in a different object, regardless of the
14595 symbol's type. We can't tell for sure yet, because
14596 something later might force the symbol local. */
14598 else if (may_need_local_target_p
)
14599 /* If this reloc is in a read-only section, we might
14600 need a copy reloc. We can't check reliably at this
14601 stage whether the section is read-only, as input
14602 sections have not yet been mapped to output sections.
14603 Tentatively set the flag for now, and correct in
14604 adjust_dynamic_symbol. */
14605 h
->non_got_ref
= 1;
14608 if (may_need_local_target_p
14609 && (h
!= NULL
|| ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
))
14611 union gotplt_union
*root_plt
;
14612 struct arm_plt_info
*arm_plt
;
14613 struct arm_local_iplt_info
*local_iplt
;
14617 root_plt
= &h
->plt
;
14618 arm_plt
= &eh
->plt
;
14622 local_iplt
= elf32_arm_create_local_iplt (abfd
, r_symndx
);
14623 if (local_iplt
== NULL
)
14625 root_plt
= &local_iplt
->root
;
14626 arm_plt
= &local_iplt
->arm
;
14629 /* If the symbol is a function that doesn't bind locally,
14630 this relocation will need a PLT entry. */
14631 if (root_plt
->refcount
!= -1)
14632 root_plt
->refcount
+= 1;
14635 arm_plt
->noncall_refcount
++;
14637 /* It's too early to use htab->use_blx here, so we have to
14638 record possible blx references separately from
14639 relocs that definitely need a thumb stub. */
14641 if (r_type
== R_ARM_THM_CALL
)
14642 arm_plt
->maybe_thumb_refcount
+= 1;
14644 if (r_type
== R_ARM_THM_JUMP24
14645 || r_type
== R_ARM_THM_JUMP19
)
14646 arm_plt
->thumb_refcount
+= 1;
14649 if (may_become_dynamic_p
)
14651 struct elf_dyn_relocs
*p
, **head
;
14653 /* Create a reloc section in dynobj. */
14654 if (sreloc
== NULL
)
14656 sreloc
= _bfd_elf_make_dynamic_reloc_section
14657 (sec
, dynobj
, 2, abfd
, ! htab
->use_rel
);
14659 if (sreloc
== NULL
)
14662 /* BPABI objects never have dynamic relocations mapped. */
14663 if (htab
->symbian_p
)
14667 flags
= bfd_get_section_flags (dynobj
, sreloc
);
14668 flags
&= ~(SEC_LOAD
| SEC_ALLOC
);
14669 bfd_set_section_flags (dynobj
, sreloc
, flags
);
14673 /* If this is a global symbol, count the number of
14674 relocations we need for this symbol. */
14676 head
= &((struct elf32_arm_link_hash_entry
*) h
)->dyn_relocs
;
14679 head
= elf32_arm_get_local_dynreloc_list (abfd
, r_symndx
, isym
);
14685 if (p
== NULL
|| p
->sec
!= sec
)
14687 bfd_size_type amt
= sizeof *p
;
14689 p
= (struct elf_dyn_relocs
*) bfd_alloc (htab
->root
.dynobj
, amt
);
14699 if (elf32_arm_howto_from_type (r_type
)->pc_relative
)
14709 elf32_arm_update_relocs (asection
*o
,
14710 struct bfd_elf_section_reloc_data
*reldata
)
14712 void (*swap_in
) (bfd
*, const bfd_byte
*, Elf_Internal_Rela
*);
14713 void (*swap_out
) (bfd
*, const Elf_Internal_Rela
*, bfd_byte
*);
14714 const struct elf_backend_data
*bed
;
14715 _arm_elf_section_data
*eado
;
14716 struct bfd_link_order
*p
;
14717 bfd_byte
*erela_head
, *erela
;
14718 Elf_Internal_Rela
*irela_head
, *irela
;
14719 Elf_Internal_Shdr
*rel_hdr
;
14721 unsigned int count
;
14723 eado
= get_arm_elf_section_data (o
);
14725 if (!eado
|| eado
->elf
.this_hdr
.sh_type
!= SHT_ARM_EXIDX
)
14729 bed
= get_elf_backend_data (abfd
);
14730 rel_hdr
= reldata
->hdr
;
14732 if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rel
)
14734 swap_in
= bed
->s
->swap_reloc_in
;
14735 swap_out
= bed
->s
->swap_reloc_out
;
14737 else if (rel_hdr
->sh_entsize
== bed
->s
->sizeof_rela
)
14739 swap_in
= bed
->s
->swap_reloca_in
;
14740 swap_out
= bed
->s
->swap_reloca_out
;
14745 erela_head
= rel_hdr
->contents
;
14746 irela_head
= (Elf_Internal_Rela
*) bfd_zmalloc
14747 ((NUM_SHDR_ENTRIES (rel_hdr
) + 1) * sizeof (*irela_head
));
14749 erela
= erela_head
;
14750 irela
= irela_head
;
14753 for (p
= o
->map_head
.link_order
; p
; p
= p
->next
)
14755 if (p
->type
== bfd_section_reloc_link_order
14756 || p
->type
== bfd_symbol_reloc_link_order
)
14758 (*swap_in
) (abfd
, erela
, irela
);
14759 erela
+= rel_hdr
->sh_entsize
;
14763 else if (p
->type
== bfd_indirect_link_order
)
14765 struct bfd_elf_section_reloc_data
*input_reldata
;
14766 arm_unwind_table_edit
*edit_list
, *edit_tail
;
14767 _arm_elf_section_data
*eadi
;
14772 i
= p
->u
.indirect
.section
;
14774 eadi
= get_arm_elf_section_data (i
);
14775 edit_list
= eadi
->u
.exidx
.unwind_edit_list
;
14776 edit_tail
= eadi
->u
.exidx
.unwind_edit_tail
;
14777 offset
= o
->vma
+ i
->output_offset
;
14779 if (eadi
->elf
.rel
.hdr
&&
14780 eadi
->elf
.rel
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
14781 input_reldata
= &eadi
->elf
.rel
;
14782 else if (eadi
->elf
.rela
.hdr
&&
14783 eadi
->elf
.rela
.hdr
->sh_entsize
== rel_hdr
->sh_entsize
)
14784 input_reldata
= &eadi
->elf
.rela
;
14790 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
14792 arm_unwind_table_edit
*edit_node
, *edit_next
;
14794 bfd_vma reloc_index
;
14796 (*swap_in
) (abfd
, erela
, irela
);
14797 reloc_index
= (irela
->r_offset
- offset
) / 8;
14800 edit_node
= edit_list
;
14801 for (edit_next
= edit_list
;
14802 edit_next
&& edit_next
->index
<= reloc_index
;
14803 edit_next
= edit_node
->next
)
14806 edit_node
= edit_next
;
14809 if (edit_node
->type
!= DELETE_EXIDX_ENTRY
14810 || edit_node
->index
!= reloc_index
)
14812 irela
->r_offset
-= bias
* 8;
14817 erela
+= rel_hdr
->sh_entsize
;
14820 if (edit_tail
->type
== INSERT_EXIDX_CANTUNWIND_AT_END
)
14822 /* New relocation entity. */
14823 asection
*text_sec
= edit_tail
->linked_section
;
14824 asection
*text_out
= text_sec
->output_section
;
14825 bfd_vma exidx_offset
= offset
+ i
->size
- 8;
14827 irela
->r_addend
= 0;
14828 irela
->r_offset
= exidx_offset
;
14829 irela
->r_info
= ELF32_R_INFO
14830 (text_out
->target_index
, R_ARM_PREL31
);
14837 for (j
= 0; j
< NUM_SHDR_ENTRIES (input_reldata
->hdr
); j
++)
14839 (*swap_in
) (abfd
, erela
, irela
);
14840 erela
+= rel_hdr
->sh_entsize
;
14844 count
+= NUM_SHDR_ENTRIES (input_reldata
->hdr
);
14849 reldata
->count
= count
;
14850 rel_hdr
->sh_size
= count
* rel_hdr
->sh_entsize
;
14852 erela
= erela_head
;
14853 irela
= irela_head
;
14856 (*swap_out
) (abfd
, irela
, erela
);
14857 erela
+= rel_hdr
->sh_entsize
;
14864 /* Hashes are no longer valid. */
14865 free (reldata
->hashes
);
14866 reldata
->hashes
= NULL
;
14869 /* Unwinding tables are not referenced directly. This pass marks them as
14870 required if the corresponding code section is marked. Similarly, ARMv8-M
14871 secure entry functions can only be referenced by SG veneers which are
14872 created after the GC process. They need to be marked in case they reside in
14873 their own section (as would be the case if code was compiled with
14874 -ffunction-sections). */
14877 elf32_arm_gc_mark_extra_sections (struct bfd_link_info
*info
,
14878 elf_gc_mark_hook_fn gc_mark_hook
)
14881 Elf_Internal_Shdr
**elf_shdrp
;
14882 asection
*cmse_sec
;
14883 obj_attribute
*out_attr
;
14884 Elf_Internal_Shdr
*symtab_hdr
;
14885 unsigned i
, sym_count
, ext_start
;
14886 const struct elf_backend_data
*bed
;
14887 struct elf_link_hash_entry
**sym_hashes
;
14888 struct elf32_arm_link_hash_entry
*cmse_hash
;
14889 bfd_boolean again
, is_v8m
, first_bfd_browse
= TRUE
;
14891 _bfd_elf_gc_mark_extra_sections (info
, gc_mark_hook
);
14893 out_attr
= elf_known_obj_attributes_proc (info
->output_bfd
);
14894 is_v8m
= out_attr
[Tag_CPU_arch
].i
>= TAG_CPU_ARCH_V8M_BASE
14895 && out_attr
[Tag_CPU_arch_profile
].i
== 'M';
14897 /* Marking EH data may cause additional code sections to be marked,
14898 requiring multiple passes. */
14903 for (sub
= info
->input_bfds
; sub
!= NULL
; sub
= sub
->link
.next
)
14907 if (! is_arm_elf (sub
))
14910 elf_shdrp
= elf_elfsections (sub
);
14911 for (o
= sub
->sections
; o
!= NULL
; o
= o
->next
)
14913 Elf_Internal_Shdr
*hdr
;
14915 hdr
= &elf_section_data (o
)->this_hdr
;
14916 if (hdr
->sh_type
== SHT_ARM_EXIDX
14918 && hdr
->sh_link
< elf_numsections (sub
)
14920 && elf_shdrp
[hdr
->sh_link
]->bfd_section
->gc_mark
)
14923 if (!_bfd_elf_gc_mark (info
, o
, gc_mark_hook
))
14928 /* Mark section holding ARMv8-M secure entry functions. We mark all
14929 of them so no need for a second browsing. */
14930 if (is_v8m
&& first_bfd_browse
)
14932 sym_hashes
= elf_sym_hashes (sub
);
14933 bed
= get_elf_backend_data (sub
);
14934 symtab_hdr
= &elf_tdata (sub
)->symtab_hdr
;
14935 sym_count
= symtab_hdr
->sh_size
/ bed
->s
->sizeof_sym
;
14936 ext_start
= symtab_hdr
->sh_info
;
14938 /* Scan symbols. */
14939 for (i
= ext_start
; i
< sym_count
; i
++)
14941 cmse_hash
= elf32_arm_hash_entry (sym_hashes
[i
- ext_start
]);
14943 /* Assume it is a special symbol. If not, cmse_scan will
14944 warn about it and user can do something about it. */
14945 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
14947 cmse_sec
= cmse_hash
->root
.root
.u
.def
.section
;
14948 if (!cmse_sec
->gc_mark
14949 && !_bfd_elf_gc_mark (info
, cmse_sec
, gc_mark_hook
))
14955 first_bfd_browse
= FALSE
;
14961 /* Treat mapping symbols as special target symbols. */
14964 elf32_arm_is_target_special_symbol (bfd
* abfd ATTRIBUTE_UNUSED
, asymbol
* sym
)
14966 return bfd_is_arm_special_symbol_name (sym
->name
,
14967 BFD_ARM_SPECIAL_SYM_TYPE_ANY
);
14970 /* This is a copy of elf_find_function() from elf.c except that
14971 ARM mapping symbols are ignored when looking for function names
14972 and STT_ARM_TFUNC is considered to a function type. */
14975 arm_elf_find_function (bfd
* abfd ATTRIBUTE_UNUSED
,
14976 asymbol
** symbols
,
14977 asection
* section
,
14979 const char ** filename_ptr
,
14980 const char ** functionname_ptr
)
14982 const char * filename
= NULL
;
14983 asymbol
* func
= NULL
;
14984 bfd_vma low_func
= 0;
14987 for (p
= symbols
; *p
!= NULL
; p
++)
14989 elf_symbol_type
*q
;
14991 q
= (elf_symbol_type
*) *p
;
14993 switch (ELF_ST_TYPE (q
->internal_elf_sym
.st_info
))
14998 filename
= bfd_asymbol_name (&q
->symbol
);
15001 case STT_ARM_TFUNC
:
15003 /* Skip mapping symbols. */
15004 if ((q
->symbol
.flags
& BSF_LOCAL
)
15005 && bfd_is_arm_special_symbol_name (q
->symbol
.name
,
15006 BFD_ARM_SPECIAL_SYM_TYPE_ANY
))
15008 /* Fall through. */
15009 if (bfd_get_section (&q
->symbol
) == section
15010 && q
->symbol
.value
>= low_func
15011 && q
->symbol
.value
<= offset
)
15013 func
= (asymbol
*) q
;
15014 low_func
= q
->symbol
.value
;
15024 *filename_ptr
= filename
;
15025 if (functionname_ptr
)
15026 *functionname_ptr
= bfd_asymbol_name (func
);
15032 /* Find the nearest line to a particular section and offset, for error
15033 reporting. This code is a duplicate of the code in elf.c, except
15034 that it uses arm_elf_find_function. */
15037 elf32_arm_find_nearest_line (bfd
* abfd
,
15038 asymbol
** symbols
,
15039 asection
* section
,
15041 const char ** filename_ptr
,
15042 const char ** functionname_ptr
,
15043 unsigned int * line_ptr
,
15044 unsigned int * discriminator_ptr
)
15046 bfd_boolean found
= FALSE
;
15048 if (_bfd_dwarf2_find_nearest_line (abfd
, symbols
, NULL
, section
, offset
,
15049 filename_ptr
, functionname_ptr
,
15050 line_ptr
, discriminator_ptr
,
15051 dwarf_debug_sections
, 0,
15052 & elf_tdata (abfd
)->dwarf2_find_line_info
))
15054 if (!*functionname_ptr
)
15055 arm_elf_find_function (abfd
, symbols
, section
, offset
,
15056 *filename_ptr
? NULL
: filename_ptr
,
15062 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15065 if (! _bfd_stab_section_find_nearest_line (abfd
, symbols
, section
, offset
,
15066 & found
, filename_ptr
,
15067 functionname_ptr
, line_ptr
,
15068 & elf_tdata (abfd
)->line_info
))
15071 if (found
&& (*functionname_ptr
|| *line_ptr
))
15074 if (symbols
== NULL
)
15077 if (! arm_elf_find_function (abfd
, symbols
, section
, offset
,
15078 filename_ptr
, functionname_ptr
))
15086 elf32_arm_find_inliner_info (bfd
* abfd
,
15087 const char ** filename_ptr
,
15088 const char ** functionname_ptr
,
15089 unsigned int * line_ptr
)
15092 found
= _bfd_dwarf2_find_inliner_info (abfd
, filename_ptr
,
15093 functionname_ptr
, line_ptr
,
15094 & elf_tdata (abfd
)->dwarf2_find_line_info
);
15098 /* Adjust a symbol defined by a dynamic object and referenced by a
15099 regular object. The current definition is in some section of the
15100 dynamic object, but we're not including those sections. We have to
15101 change the definition to something the rest of the link can
15105 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info
* info
,
15106 struct elf_link_hash_entry
* h
)
15109 asection
*s
, *srel
;
15110 struct elf32_arm_link_hash_entry
* eh
;
15111 struct elf32_arm_link_hash_table
*globals
;
15113 globals
= elf32_arm_hash_table (info
);
15114 if (globals
== NULL
)
15117 dynobj
= elf_hash_table (info
)->dynobj
;
15119 /* Make sure we know what is going on here. */
15120 BFD_ASSERT (dynobj
!= NULL
15122 || h
->type
== STT_GNU_IFUNC
15123 || h
->u
.weakdef
!= NULL
15126 && !h
->def_regular
)));
15128 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15130 /* If this is a function, put it in the procedure linkage table. We
15131 will fill in the contents of the procedure linkage table later,
15132 when we know the address of the .got section. */
15133 if (h
->type
== STT_FUNC
|| h
->type
== STT_GNU_IFUNC
|| h
->needs_plt
)
15135 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15136 symbol binds locally. */
15137 if (h
->plt
.refcount
<= 0
15138 || (h
->type
!= STT_GNU_IFUNC
15139 && (SYMBOL_CALLS_LOCAL (info
, h
)
15140 || (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
15141 && h
->root
.type
== bfd_link_hash_undefweak
))))
15143 /* This case can occur if we saw a PLT32 reloc in an input
15144 file, but the symbol was never referred to by a dynamic
15145 object, or if all references were garbage collected. In
15146 such a case, we don't actually need to build a procedure
15147 linkage table, and we can just do a PC24 reloc instead. */
15148 h
->plt
.offset
= (bfd_vma
) -1;
15149 eh
->plt
.thumb_refcount
= 0;
15150 eh
->plt
.maybe_thumb_refcount
= 0;
15151 eh
->plt
.noncall_refcount
= 0;
15159 /* It's possible that we incorrectly decided a .plt reloc was
15160 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15161 in check_relocs. We can't decide accurately between function
15162 and non-function syms in check-relocs; Objects loaded later in
15163 the link may change h->type. So fix it now. */
15164 h
->plt
.offset
= (bfd_vma
) -1;
15165 eh
->plt
.thumb_refcount
= 0;
15166 eh
->plt
.maybe_thumb_refcount
= 0;
15167 eh
->plt
.noncall_refcount
= 0;
15170 /* If this is a weak symbol, and there is a real definition, the
15171 processor independent code will have arranged for us to see the
15172 real definition first, and we can just use the same value. */
15173 if (h
->u
.weakdef
!= NULL
)
15175 BFD_ASSERT (h
->u
.weakdef
->root
.type
== bfd_link_hash_defined
15176 || h
->u
.weakdef
->root
.type
== bfd_link_hash_defweak
);
15177 h
->root
.u
.def
.section
= h
->u
.weakdef
->root
.u
.def
.section
;
15178 h
->root
.u
.def
.value
= h
->u
.weakdef
->root
.u
.def
.value
;
15182 /* If there are no non-GOT references, we do not need a copy
15184 if (!h
->non_got_ref
)
15187 /* This is a reference to a symbol defined by a dynamic object which
15188 is not a function. */
15190 /* If we are creating a shared library, we must presume that the
15191 only references to the symbol are via the global offset table.
15192 For such cases we need not do anything here; the relocations will
15193 be handled correctly by relocate_section. Relocatable executables
15194 can reference data in shared objects directly, so we don't need to
15195 do anything here. */
15196 if (bfd_link_pic (info
) || globals
->root
.is_relocatable_executable
)
15199 /* We must allocate the symbol in our .dynbss section, which will
15200 become part of the .bss section of the executable. There will be
15201 an entry for this symbol in the .dynsym section. The dynamic
15202 object will contain position independent code, so all references
15203 from the dynamic object to this symbol will go through the global
15204 offset table. The dynamic linker will use the .dynsym entry to
15205 determine the address it must put in the global offset table, so
15206 both the dynamic object and the regular object will refer to the
15207 same memory location for the variable. */
15208 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15209 linker to copy the initial value out of the dynamic object and into
15210 the runtime process image. We need to remember the offset into the
15211 .rel(a).bss section we are going to use. */
15212 if ((h
->root
.u
.def
.section
->flags
& SEC_READONLY
) != 0)
15214 s
= globals
->root
.sdynrelro
;
15215 srel
= globals
->root
.sreldynrelro
;
15219 s
= globals
->root
.sdynbss
;
15220 srel
= globals
->root
.srelbss
;
15222 if (info
->nocopyreloc
== 0
15223 && (h
->root
.u
.def
.section
->flags
& SEC_ALLOC
) != 0
15226 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
15230 return _bfd_elf_adjust_dynamic_copy (info
, h
, s
);
15233 /* Allocate space in .plt, .got and associated reloc sections for
15237 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry
*h
, void * inf
)
15239 struct bfd_link_info
*info
;
15240 struct elf32_arm_link_hash_table
*htab
;
15241 struct elf32_arm_link_hash_entry
*eh
;
15242 struct elf_dyn_relocs
*p
;
15244 if (h
->root
.type
== bfd_link_hash_indirect
)
15247 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15249 info
= (struct bfd_link_info
*) inf
;
15250 htab
= elf32_arm_hash_table (info
);
15254 if ((htab
->root
.dynamic_sections_created
|| h
->type
== STT_GNU_IFUNC
)
15255 && h
->plt
.refcount
> 0)
15257 /* Make sure this symbol is output as a dynamic symbol.
15258 Undefined weak syms won't yet be marked as dynamic. */
15259 if (h
->dynindx
== -1 && !h
->forced_local
15260 && h
->root
.type
== bfd_link_hash_undefweak
)
15262 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15266 /* If the call in the PLT entry binds locally, the associated
15267 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15268 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15269 than the .plt section. */
15270 if (h
->type
== STT_GNU_IFUNC
&& SYMBOL_CALLS_LOCAL (info
, h
))
15273 if (eh
->plt
.noncall_refcount
== 0
15274 && SYMBOL_REFERENCES_LOCAL (info
, h
))
15275 /* All non-call references can be resolved directly.
15276 This means that they can (and in some cases, must)
15277 resolve directly to the run-time target, rather than
15278 to the PLT. That in turns means that any .got entry
15279 would be equal to the .igot.plt entry, so there's
15280 no point having both. */
15281 h
->got
.refcount
= 0;
15284 if (bfd_link_pic (info
)
15286 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h
))
15288 elf32_arm_allocate_plt_entry (info
, eh
->is_iplt
, &h
->plt
, &eh
->plt
);
15290 /* If this symbol is not defined in a regular file, and we are
15291 not generating a shared library, then set the symbol to this
15292 location in the .plt. This is required to make function
15293 pointers compare as equal between the normal executable and
15294 the shared library. */
15295 if (! bfd_link_pic (info
)
15296 && !h
->def_regular
)
15298 h
->root
.u
.def
.section
= htab
->root
.splt
;
15299 h
->root
.u
.def
.value
= h
->plt
.offset
;
15301 /* Make sure the function is not marked as Thumb, in case
15302 it is the target of an ABS32 relocation, which will
15303 point to the PLT entry. */
15304 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
15307 /* VxWorks executables have a second set of relocations for
15308 each PLT entry. They go in a separate relocation section,
15309 which is processed by the kernel loader. */
15310 if (htab
->vxworks_p
&& !bfd_link_pic (info
))
15312 /* There is a relocation for the initial PLT entry:
15313 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15314 if (h
->plt
.offset
== htab
->plt_header_size
)
15315 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 1);
15317 /* There are two extra relocations for each subsequent
15318 PLT entry: an R_ARM_32 relocation for the GOT entry,
15319 and an R_ARM_32 relocation for the PLT entry. */
15320 elf32_arm_allocate_dynrelocs (info
, htab
->srelplt2
, 2);
15325 h
->plt
.offset
= (bfd_vma
) -1;
15331 h
->plt
.offset
= (bfd_vma
) -1;
15335 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15336 eh
->tlsdesc_got
= (bfd_vma
) -1;
15338 if (h
->got
.refcount
> 0)
15342 int tls_type
= elf32_arm_hash_entry (h
)->tls_type
;
15345 /* Make sure this symbol is output as a dynamic symbol.
15346 Undefined weak syms won't yet be marked as dynamic. */
15347 if (h
->dynindx
== -1 && !h
->forced_local
15348 && h
->root
.type
== bfd_link_hash_undefweak
)
15350 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15354 if (!htab
->symbian_p
)
15356 s
= htab
->root
.sgot
;
15357 h
->got
.offset
= s
->size
;
15359 if (tls_type
== GOT_UNKNOWN
)
15362 if (tls_type
== GOT_NORMAL
)
15363 /* Non-TLS symbols need one GOT slot. */
15367 if (tls_type
& GOT_TLS_GDESC
)
15369 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15371 = (htab
->root
.sgotplt
->size
15372 - elf32_arm_compute_jump_table_size (htab
));
15373 htab
->root
.sgotplt
->size
+= 8;
15374 h
->got
.offset
= (bfd_vma
) -2;
15375 /* plt.got_offset needs to know there's a TLS_DESC
15376 reloc in the middle of .got.plt. */
15377 htab
->num_tls_desc
++;
15380 if (tls_type
& GOT_TLS_GD
)
15382 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15383 the symbol is both GD and GDESC, got.offset may
15384 have been overwritten. */
15385 h
->got
.offset
= s
->size
;
15389 if (tls_type
& GOT_TLS_IE
)
15390 /* R_ARM_TLS_IE32 needs one GOT slot. */
15394 dyn
= htab
->root
.dynamic_sections_created
;
15397 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn
,
15398 bfd_link_pic (info
),
15400 && (!bfd_link_pic (info
)
15401 || !SYMBOL_REFERENCES_LOCAL (info
, h
)))
15404 if (tls_type
!= GOT_NORMAL
15405 && (bfd_link_pic (info
) || indx
!= 0)
15406 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
15407 || h
->root
.type
!= bfd_link_hash_undefweak
))
15409 if (tls_type
& GOT_TLS_IE
)
15410 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15412 if (tls_type
& GOT_TLS_GD
)
15413 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15415 if (tls_type
& GOT_TLS_GDESC
)
15417 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelplt
, 1);
15418 /* GDESC needs a trampoline to jump to. */
15419 htab
->tls_trampoline
= -1;
15422 /* Only GD needs it. GDESC just emits one relocation per
15424 if ((tls_type
& GOT_TLS_GD
) && indx
!= 0)
15425 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15427 else if (indx
!= -1 && !SYMBOL_REFERENCES_LOCAL (info
, h
))
15429 if (htab
->root
.dynamic_sections_created
)
15430 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15431 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15433 else if (h
->type
== STT_GNU_IFUNC
15434 && eh
->plt
.noncall_refcount
== 0)
15435 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15436 they all resolve dynamically instead. Reserve room for the
15437 GOT entry's R_ARM_IRELATIVE relocation. */
15438 elf32_arm_allocate_irelocs (info
, htab
->root
.srelgot
, 1);
15439 else if (bfd_link_pic (info
)
15440 && (ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
15441 || h
->root
.type
!= bfd_link_hash_undefweak
))
15442 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15443 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15447 h
->got
.offset
= (bfd_vma
) -1;
15449 /* Allocate stubs for exported Thumb functions on v4t. */
15450 if (!htab
->use_blx
&& h
->dynindx
!= -1
15452 && ARM_GET_SYM_BRANCH_TYPE (h
->target_internal
) == ST_BRANCH_TO_THUMB
15453 && ELF_ST_VISIBILITY (h
->other
) == STV_DEFAULT
)
15455 struct elf_link_hash_entry
* th
;
15456 struct bfd_link_hash_entry
* bh
;
15457 struct elf_link_hash_entry
* myh
;
15461 /* Create a new symbol to regist the real location of the function. */
15462 s
= h
->root
.u
.def
.section
;
15463 sprintf (name
, "__real_%s", h
->root
.root
.string
);
15464 _bfd_generic_link_add_one_symbol (info
, s
->owner
,
15465 name
, BSF_GLOBAL
, s
,
15466 h
->root
.u
.def
.value
,
15467 NULL
, TRUE
, FALSE
, &bh
);
15469 myh
= (struct elf_link_hash_entry
*) bh
;
15470 myh
->type
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
15471 myh
->forced_local
= 1;
15472 ARM_SET_SYM_BRANCH_TYPE (myh
->target_internal
, ST_BRANCH_TO_THUMB
);
15473 eh
->export_glue
= myh
;
15474 th
= record_arm_to_thumb_glue (info
, h
);
15475 /* Point the symbol at the stub. */
15476 h
->type
= ELF_ST_INFO (ELF_ST_BIND (h
->type
), STT_FUNC
);
15477 ARM_SET_SYM_BRANCH_TYPE (h
->target_internal
, ST_BRANCH_TO_ARM
);
15478 h
->root
.u
.def
.section
= th
->root
.u
.def
.section
;
15479 h
->root
.u
.def
.value
= th
->root
.u
.def
.value
& ~1;
15482 if (eh
->dyn_relocs
== NULL
)
15485 /* In the shared -Bsymbolic case, discard space allocated for
15486 dynamic pc-relative relocs against symbols which turn out to be
15487 defined in regular objects. For the normal shared case, discard
15488 space for pc-relative relocs that have become local due to symbol
15489 visibility changes. */
15491 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
)
15493 /* Relocs that use pc_count are PC-relative forms, which will appear
15494 on something like ".long foo - ." or "movw REG, foo - .". We want
15495 calls to protected symbols to resolve directly to the function
15496 rather than going via the plt. If people want function pointer
15497 comparisons to work as expected then they should avoid writing
15498 assembly like ".long foo - .". */
15499 if (SYMBOL_CALLS_LOCAL (info
, h
))
15501 struct elf_dyn_relocs
**pp
;
15503 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
15505 p
->count
-= p
->pc_count
;
15514 if (htab
->vxworks_p
)
15516 struct elf_dyn_relocs
**pp
;
15518 for (pp
= &eh
->dyn_relocs
; (p
= *pp
) != NULL
; )
15520 if (strcmp (p
->sec
->output_section
->name
, ".tls_vars") == 0)
15527 /* Also discard relocs on undefined weak syms with non-default
15529 if (eh
->dyn_relocs
!= NULL
15530 && h
->root
.type
== bfd_link_hash_undefweak
)
15532 if (ELF_ST_VISIBILITY (h
->other
) != STV_DEFAULT
15533 || UNDEFWEAK_NO_DYNAMIC_RELOC (info
, h
))
15534 eh
->dyn_relocs
= NULL
;
15536 /* Make sure undefined weak symbols are output as a dynamic
15538 else if (h
->dynindx
== -1
15539 && !h
->forced_local
)
15541 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15546 else if (htab
->root
.is_relocatable_executable
&& h
->dynindx
== -1
15547 && h
->root
.type
== bfd_link_hash_new
)
15549 /* Output absolute symbols so that we can create relocations
15550 against them. For normal symbols we output a relocation
15551 against the section that contains them. */
15552 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15559 /* For the non-shared case, discard space for relocs against
15560 symbols which turn out to need copy relocs or are not
15563 if (!h
->non_got_ref
15564 && ((h
->def_dynamic
15565 && !h
->def_regular
)
15566 || (htab
->root
.dynamic_sections_created
15567 && (h
->root
.type
== bfd_link_hash_undefweak
15568 || h
->root
.type
== bfd_link_hash_undefined
))))
15570 /* Make sure this symbol is output as a dynamic symbol.
15571 Undefined weak syms won't yet be marked as dynamic. */
15572 if (h
->dynindx
== -1 && !h
->forced_local
15573 && h
->root
.type
== bfd_link_hash_undefweak
)
15575 if (! bfd_elf_link_record_dynamic_symbol (info
, h
))
15579 /* If that succeeded, we know we'll be keeping all the
15581 if (h
->dynindx
!= -1)
15585 eh
->dyn_relocs
= NULL
;
15590 /* Finally, allocate space. */
15591 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15593 asection
*sreloc
= elf_section_data (p
->sec
)->sreloc
;
15594 if (h
->type
== STT_GNU_IFUNC
15595 && eh
->plt
.noncall_refcount
== 0
15596 && SYMBOL_REFERENCES_LOCAL (info
, h
))
15597 elf32_arm_allocate_irelocs (info
, sreloc
, p
->count
);
15599 elf32_arm_allocate_dynrelocs (info
, sreloc
, p
->count
);
15605 /* Find any dynamic relocs that apply to read-only sections. */
15608 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry
* h
, void * inf
)
15610 struct elf32_arm_link_hash_entry
* eh
;
15611 struct elf_dyn_relocs
* p
;
15613 eh
= (struct elf32_arm_link_hash_entry
*) h
;
15614 for (p
= eh
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15616 asection
*s
= p
->sec
;
15618 if (s
!= NULL
&& (s
->flags
& SEC_READONLY
) != 0)
15620 struct bfd_link_info
*info
= (struct bfd_link_info
*) inf
;
15622 info
->flags
|= DF_TEXTREL
;
15624 /* Not an error, just cut short the traversal. */
15632 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info
*info
,
15635 struct elf32_arm_link_hash_table
*globals
;
15637 globals
= elf32_arm_hash_table (info
);
15638 if (globals
== NULL
)
15641 globals
->byteswap_code
= byteswap_code
;
15644 /* Set the sizes of the dynamic sections. */
15647 elf32_arm_size_dynamic_sections (bfd
* output_bfd ATTRIBUTE_UNUSED
,
15648 struct bfd_link_info
* info
)
15653 bfd_boolean relocs
;
15655 struct elf32_arm_link_hash_table
*htab
;
15657 htab
= elf32_arm_hash_table (info
);
15661 dynobj
= elf_hash_table (info
)->dynobj
;
15662 BFD_ASSERT (dynobj
!= NULL
);
15663 check_use_blx (htab
);
15665 if (elf_hash_table (info
)->dynamic_sections_created
)
15667 /* Set the contents of the .interp section to the interpreter. */
15668 if (bfd_link_executable (info
) && !info
->nointerp
)
15670 s
= bfd_get_linker_section (dynobj
, ".interp");
15671 BFD_ASSERT (s
!= NULL
);
15672 s
->size
= sizeof ELF_DYNAMIC_INTERPRETER
;
15673 s
->contents
= (unsigned char *) ELF_DYNAMIC_INTERPRETER
;
15677 /* Set up .got offsets for local syms, and space for local dynamic
15679 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
15681 bfd_signed_vma
*local_got
;
15682 bfd_signed_vma
*end_local_got
;
15683 struct arm_local_iplt_info
**local_iplt_ptr
, *local_iplt
;
15684 char *local_tls_type
;
15685 bfd_vma
*local_tlsdesc_gotent
;
15686 bfd_size_type locsymcount
;
15687 Elf_Internal_Shdr
*symtab_hdr
;
15689 bfd_boolean is_vxworks
= htab
->vxworks_p
;
15690 unsigned int symndx
;
15692 if (! is_arm_elf (ibfd
))
15695 for (s
= ibfd
->sections
; s
!= NULL
; s
= s
->next
)
15697 struct elf_dyn_relocs
*p
;
15699 for (p
= (struct elf_dyn_relocs
*)
15700 elf_section_data (s
)->local_dynrel
; p
!= NULL
; p
= p
->next
)
15702 if (!bfd_is_abs_section (p
->sec
)
15703 && bfd_is_abs_section (p
->sec
->output_section
))
15705 /* Input section has been discarded, either because
15706 it is a copy of a linkonce section or due to
15707 linker script /DISCARD/, so we'll be discarding
15710 else if (is_vxworks
15711 && strcmp (p
->sec
->output_section
->name
,
15714 /* Relocations in vxworks .tls_vars sections are
15715 handled specially by the loader. */
15717 else if (p
->count
!= 0)
15719 srel
= elf_section_data (p
->sec
)->sreloc
;
15720 elf32_arm_allocate_dynrelocs (info
, srel
, p
->count
);
15721 if ((p
->sec
->output_section
->flags
& SEC_READONLY
) != 0)
15722 info
->flags
|= DF_TEXTREL
;
15727 local_got
= elf_local_got_refcounts (ibfd
);
15731 symtab_hdr
= & elf_symtab_hdr (ibfd
);
15732 locsymcount
= symtab_hdr
->sh_info
;
15733 end_local_got
= local_got
+ locsymcount
;
15734 local_iplt_ptr
= elf32_arm_local_iplt (ibfd
);
15735 local_tls_type
= elf32_arm_local_got_tls_type (ibfd
);
15736 local_tlsdesc_gotent
= elf32_arm_local_tlsdesc_gotent (ibfd
);
15738 s
= htab
->root
.sgot
;
15739 srel
= htab
->root
.srelgot
;
15740 for (; local_got
< end_local_got
;
15741 ++local_got
, ++local_iplt_ptr
, ++local_tls_type
,
15742 ++local_tlsdesc_gotent
, ++symndx
)
15744 *local_tlsdesc_gotent
= (bfd_vma
) -1;
15745 local_iplt
= *local_iplt_ptr
;
15746 if (local_iplt
!= NULL
)
15748 struct elf_dyn_relocs
*p
;
15750 if (local_iplt
->root
.refcount
> 0)
15752 elf32_arm_allocate_plt_entry (info
, TRUE
,
15755 if (local_iplt
->arm
.noncall_refcount
== 0)
15756 /* All references to the PLT are calls, so all
15757 non-call references can resolve directly to the
15758 run-time target. This means that the .got entry
15759 would be the same as the .igot.plt entry, so there's
15760 no point creating both. */
15765 BFD_ASSERT (local_iplt
->arm
.noncall_refcount
== 0);
15766 local_iplt
->root
.offset
= (bfd_vma
) -1;
15769 for (p
= local_iplt
->dyn_relocs
; p
!= NULL
; p
= p
->next
)
15773 psrel
= elf_section_data (p
->sec
)->sreloc
;
15774 if (local_iplt
->arm
.noncall_refcount
== 0)
15775 elf32_arm_allocate_irelocs (info
, psrel
, p
->count
);
15777 elf32_arm_allocate_dynrelocs (info
, psrel
, p
->count
);
15780 if (*local_got
> 0)
15782 Elf_Internal_Sym
*isym
;
15784 *local_got
= s
->size
;
15785 if (*local_tls_type
& GOT_TLS_GD
)
15786 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15788 if (*local_tls_type
& GOT_TLS_GDESC
)
15790 *local_tlsdesc_gotent
= htab
->root
.sgotplt
->size
15791 - elf32_arm_compute_jump_table_size (htab
);
15792 htab
->root
.sgotplt
->size
+= 8;
15793 *local_got
= (bfd_vma
) -2;
15794 /* plt.got_offset needs to know there's a TLS_DESC
15795 reloc in the middle of .got.plt. */
15796 htab
->num_tls_desc
++;
15798 if (*local_tls_type
& GOT_TLS_IE
)
15801 if (*local_tls_type
& GOT_NORMAL
)
15803 /* If the symbol is both GD and GDESC, *local_got
15804 may have been overwritten. */
15805 *local_got
= s
->size
;
15809 isym
= bfd_sym_from_r_symndx (&htab
->sym_cache
, ibfd
, symndx
);
15813 /* If all references to an STT_GNU_IFUNC PLT are calls,
15814 then all non-call references, including this GOT entry,
15815 resolve directly to the run-time target. */
15816 if (ELF32_ST_TYPE (isym
->st_info
) == STT_GNU_IFUNC
15817 && (local_iplt
== NULL
15818 || local_iplt
->arm
.noncall_refcount
== 0))
15819 elf32_arm_allocate_irelocs (info
, srel
, 1);
15820 else if (bfd_link_pic (info
) || output_bfd
->flags
& DYNAMIC
)
15822 if ((bfd_link_pic (info
) && !(*local_tls_type
& GOT_TLS_GDESC
))
15823 || *local_tls_type
& GOT_TLS_GD
)
15824 elf32_arm_allocate_dynrelocs (info
, srel
, 1);
15826 if (bfd_link_pic (info
) && *local_tls_type
& GOT_TLS_GDESC
)
15828 elf32_arm_allocate_dynrelocs (info
,
15829 htab
->root
.srelplt
, 1);
15830 htab
->tls_trampoline
= -1;
15835 *local_got
= (bfd_vma
) -1;
15839 if (htab
->tls_ldm_got
.refcount
> 0)
15841 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15842 for R_ARM_TLS_LDM32 relocations. */
15843 htab
->tls_ldm_got
.offset
= htab
->root
.sgot
->size
;
15844 htab
->root
.sgot
->size
+= 8;
15845 if (bfd_link_pic (info
))
15846 elf32_arm_allocate_dynrelocs (info
, htab
->root
.srelgot
, 1);
15849 htab
->tls_ldm_got
.offset
= -1;
15851 /* Allocate global sym .plt and .got entries, and space for global
15852 sym dynamic relocs. */
15853 elf_link_hash_traverse (& htab
->root
, allocate_dynrelocs_for_symbol
, info
);
15855 /* Here we rummage through the found bfds to collect glue information. */
15856 for (ibfd
= info
->input_bfds
; ibfd
!= NULL
; ibfd
= ibfd
->link
.next
)
15858 if (! is_arm_elf (ibfd
))
15861 /* Initialise mapping tables for code/data. */
15862 bfd_elf32_arm_init_maps (ibfd
);
15864 if (!bfd_elf32_arm_process_before_allocation (ibfd
, info
)
15865 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd
, info
)
15866 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd
, info
))
15867 _bfd_error_handler (_("Errors encountered processing file %B"), ibfd
);
15870 /* Allocate space for the glue sections now that we've sized them. */
15871 bfd_elf32_arm_allocate_interworking_sections (info
);
15873 /* For every jump slot reserved in the sgotplt, reloc_count is
15874 incremented. However, when we reserve space for TLS descriptors,
15875 it's not incremented, so in order to compute the space reserved
15876 for them, it suffices to multiply the reloc count by the jump
15878 if (htab
->root
.srelplt
)
15879 htab
->sgotplt_jump_table_size
= elf32_arm_compute_jump_table_size(htab
);
15881 if (htab
->tls_trampoline
)
15883 if (htab
->root
.splt
->size
== 0)
15884 htab
->root
.splt
->size
+= htab
->plt_header_size
;
15886 htab
->tls_trampoline
= htab
->root
.splt
->size
;
15887 htab
->root
.splt
->size
+= htab
->plt_entry_size
;
15889 /* If we're not using lazy TLS relocations, don't generate the
15890 PLT and GOT entries they require. */
15891 if (!(info
->flags
& DF_BIND_NOW
))
15893 htab
->dt_tlsdesc_got
= htab
->root
.sgot
->size
;
15894 htab
->root
.sgot
->size
+= 4;
15896 htab
->dt_tlsdesc_plt
= htab
->root
.splt
->size
;
15897 htab
->root
.splt
->size
+= 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline
);
15901 /* The check_relocs and adjust_dynamic_symbol entry points have
15902 determined the sizes of the various dynamic sections. Allocate
15903 memory for them. */
15906 for (s
= dynobj
->sections
; s
!= NULL
; s
= s
->next
)
15910 if ((s
->flags
& SEC_LINKER_CREATED
) == 0)
15913 /* It's OK to base decisions on the section name, because none
15914 of the dynobj section names depend upon the input files. */
15915 name
= bfd_get_section_name (dynobj
, s
);
15917 if (s
== htab
->root
.splt
)
15919 /* Remember whether there is a PLT. */
15920 plt
= s
->size
!= 0;
15922 else if (CONST_STRNEQ (name
, ".rel"))
15926 /* Remember whether there are any reloc sections other
15927 than .rel(a).plt and .rela.plt.unloaded. */
15928 if (s
!= htab
->root
.srelplt
&& s
!= htab
->srelplt2
)
15931 /* We use the reloc_count field as a counter if we need
15932 to copy relocs into the output file. */
15933 s
->reloc_count
= 0;
15936 else if (s
!= htab
->root
.sgot
15937 && s
!= htab
->root
.sgotplt
15938 && s
!= htab
->root
.iplt
15939 && s
!= htab
->root
.igotplt
15940 && s
!= htab
->root
.sdynbss
15941 && s
!= htab
->root
.sdynrelro
)
15943 /* It's not one of our sections, so don't allocate space. */
15949 /* If we don't need this section, strip it from the
15950 output file. This is mostly to handle .rel(a).bss and
15951 .rel(a).plt. We must create both sections in
15952 create_dynamic_sections, because they must be created
15953 before the linker maps input sections to output
15954 sections. The linker does that before
15955 adjust_dynamic_symbol is called, and it is that
15956 function which decides whether anything needs to go
15957 into these sections. */
15958 s
->flags
|= SEC_EXCLUDE
;
15962 if ((s
->flags
& SEC_HAS_CONTENTS
) == 0)
15965 /* Allocate memory for the section contents. */
15966 s
->contents
= (unsigned char *) bfd_zalloc (dynobj
, s
->size
);
15967 if (s
->contents
== NULL
)
15971 if (elf_hash_table (info
)->dynamic_sections_created
)
15973 /* Add some entries to the .dynamic section. We fill in the
15974 values later, in elf32_arm_finish_dynamic_sections, but we
15975 must add the entries now so that we get the correct size for
15976 the .dynamic section. The DT_DEBUG entry is filled in by the
15977 dynamic linker and used by the debugger. */
15978 #define add_dynamic_entry(TAG, VAL) \
15979 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
15981 if (bfd_link_executable (info
))
15983 if (!add_dynamic_entry (DT_DEBUG
, 0))
15989 if ( !add_dynamic_entry (DT_PLTGOT
, 0)
15990 || !add_dynamic_entry (DT_PLTRELSZ
, 0)
15991 || !add_dynamic_entry (DT_PLTREL
,
15992 htab
->use_rel
? DT_REL
: DT_RELA
)
15993 || !add_dynamic_entry (DT_JMPREL
, 0))
15996 if (htab
->dt_tlsdesc_plt
15997 && (!add_dynamic_entry (DT_TLSDESC_PLT
,0)
15998 || !add_dynamic_entry (DT_TLSDESC_GOT
,0)))
16006 if (!add_dynamic_entry (DT_REL
, 0)
16007 || !add_dynamic_entry (DT_RELSZ
, 0)
16008 || !add_dynamic_entry (DT_RELENT
, RELOC_SIZE (htab
)))
16013 if (!add_dynamic_entry (DT_RELA
, 0)
16014 || !add_dynamic_entry (DT_RELASZ
, 0)
16015 || !add_dynamic_entry (DT_RELAENT
, RELOC_SIZE (htab
)))
16020 /* If any dynamic relocs apply to a read-only section,
16021 then we need a DT_TEXTREL entry. */
16022 if ((info
->flags
& DF_TEXTREL
) == 0)
16023 elf_link_hash_traverse (& htab
->root
, elf32_arm_readonly_dynrelocs
,
16026 if ((info
->flags
& DF_TEXTREL
) != 0)
16028 if (!add_dynamic_entry (DT_TEXTREL
, 0))
16031 if (htab
->vxworks_p
16032 && !elf_vxworks_add_dynamic_entries (output_bfd
, info
))
16035 #undef add_dynamic_entry
16040 /* Size sections even though they're not dynamic. We use it to setup
16041 _TLS_MODULE_BASE_, if needed. */
16044 elf32_arm_always_size_sections (bfd
*output_bfd
,
16045 struct bfd_link_info
*info
)
16049 if (bfd_link_relocatable (info
))
16052 tls_sec
= elf_hash_table (info
)->tls_sec
;
16056 struct elf_link_hash_entry
*tlsbase
;
16058 tlsbase
= elf_link_hash_lookup
16059 (elf_hash_table (info
), "_TLS_MODULE_BASE_", TRUE
, TRUE
, FALSE
);
16063 struct bfd_link_hash_entry
*bh
= NULL
;
16064 const struct elf_backend_data
*bed
16065 = get_elf_backend_data (output_bfd
);
16067 if (!(_bfd_generic_link_add_one_symbol
16068 (info
, output_bfd
, "_TLS_MODULE_BASE_", BSF_LOCAL
,
16069 tls_sec
, 0, NULL
, FALSE
,
16070 bed
->collect
, &bh
)))
16073 tlsbase
->type
= STT_TLS
;
16074 tlsbase
= (struct elf_link_hash_entry
*)bh
;
16075 tlsbase
->def_regular
= 1;
16076 tlsbase
->other
= STV_HIDDEN
;
16077 (*bed
->elf_backend_hide_symbol
) (info
, tlsbase
, TRUE
);
16083 /* Finish up dynamic symbol handling. We set the contents of various
16084 dynamic sections here. */
16087 elf32_arm_finish_dynamic_symbol (bfd
* output_bfd
,
16088 struct bfd_link_info
* info
,
16089 struct elf_link_hash_entry
* h
,
16090 Elf_Internal_Sym
* sym
)
16092 struct elf32_arm_link_hash_table
*htab
;
16093 struct elf32_arm_link_hash_entry
*eh
;
16095 htab
= elf32_arm_hash_table (info
);
16099 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16101 if (h
->plt
.offset
!= (bfd_vma
) -1)
16105 BFD_ASSERT (h
->dynindx
!= -1);
16106 if (! elf32_arm_populate_plt_entry (output_bfd
, info
, &h
->plt
, &eh
->plt
,
16111 if (!h
->def_regular
)
16113 /* Mark the symbol as undefined, rather than as defined in
16114 the .plt section. */
16115 sym
->st_shndx
= SHN_UNDEF
;
16116 /* If the symbol is weak we need to clear the value.
16117 Otherwise, the PLT entry would provide a definition for
16118 the symbol even if the symbol wasn't defined anywhere,
16119 and so the symbol would never be NULL. Leave the value if
16120 there were any relocations where pointer equality matters
16121 (this is a clue for the dynamic linker, to make function
16122 pointer comparisons work between an application and shared
16124 if (!h
->ref_regular_nonweak
|| !h
->pointer_equality_needed
)
16127 else if (eh
->is_iplt
&& eh
->plt
.noncall_refcount
!= 0)
16129 /* At least one non-call relocation references this .iplt entry,
16130 so the .iplt entry is the function's canonical address. */
16131 sym
->st_info
= ELF_ST_INFO (ELF_ST_BIND (sym
->st_info
), STT_FUNC
);
16132 ARM_SET_SYM_BRANCH_TYPE (sym
->st_target_internal
, ST_BRANCH_TO_ARM
);
16133 sym
->st_shndx
= (_bfd_elf_section_from_bfd_section
16134 (output_bfd
, htab
->root
.iplt
->output_section
));
16135 sym
->st_value
= (h
->plt
.offset
16136 + htab
->root
.iplt
->output_section
->vma
16137 + htab
->root
.iplt
->output_offset
);
16144 Elf_Internal_Rela rel
;
16146 /* This symbol needs a copy reloc. Set it up. */
16147 BFD_ASSERT (h
->dynindx
!= -1
16148 && (h
->root
.type
== bfd_link_hash_defined
16149 || h
->root
.type
== bfd_link_hash_defweak
));
16152 rel
.r_offset
= (h
->root
.u
.def
.value
16153 + h
->root
.u
.def
.section
->output_section
->vma
16154 + h
->root
.u
.def
.section
->output_offset
);
16155 rel
.r_info
= ELF32_R_INFO (h
->dynindx
, R_ARM_COPY
);
16156 if (h
->root
.u
.def
.section
== htab
->root
.sdynrelro
)
16157 s
= htab
->root
.sreldynrelro
;
16159 s
= htab
->root
.srelbss
;
16160 elf32_arm_add_dynreloc (output_bfd
, info
, s
, &rel
);
16163 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16164 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16165 to the ".got" section. */
16166 if (h
== htab
->root
.hdynamic
16167 || (!htab
->vxworks_p
&& h
== htab
->root
.hgot
))
16168 sym
->st_shndx
= SHN_ABS
;
16174 arm_put_trampoline (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
16176 const unsigned long *template, unsigned count
)
16180 for (ix
= 0; ix
!= count
; ix
++)
16182 unsigned long insn
= template[ix
];
16184 /* Emit mov pc,rx if bx is not permitted. */
16185 if (htab
->fix_v4bx
== 1 && (insn
& 0x0ffffff0) == 0x012fff10)
16186 insn
= (insn
& 0xf000000f) | 0x01a0f000;
16187 put_arm_insn (htab
, output_bfd
, insn
, (char *)contents
+ ix
*4);
16191 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16192 other variants, NaCl needs this entry in a static executable's
16193 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16194 zero. For .iplt really only the last bundle is useful, and .iplt
16195 could have a shorter first entry, with each individual PLT entry's
16196 relative branch calculated differently so it targets the last
16197 bundle instead of the instruction before it (labelled .Lplt_tail
16198 above). But it's simpler to keep the size and layout of PLT0
16199 consistent with the dynamic case, at the cost of some dead code at
16200 the start of .iplt and the one dead store to the stack at the start
16203 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table
*htab
, bfd
*output_bfd
,
16204 asection
*plt
, bfd_vma got_displacement
)
16208 put_arm_insn (htab
, output_bfd
,
16209 elf32_arm_nacl_plt0_entry
[0]
16210 | arm_movw_immediate (got_displacement
),
16211 plt
->contents
+ 0);
16212 put_arm_insn (htab
, output_bfd
,
16213 elf32_arm_nacl_plt0_entry
[1]
16214 | arm_movt_immediate (got_displacement
),
16215 plt
->contents
+ 4);
16217 for (i
= 2; i
< ARRAY_SIZE (elf32_arm_nacl_plt0_entry
); ++i
)
16218 put_arm_insn (htab
, output_bfd
,
16219 elf32_arm_nacl_plt0_entry
[i
],
16220 plt
->contents
+ (i
* 4));
16223 /* Finish up the dynamic sections. */
16226 elf32_arm_finish_dynamic_sections (bfd
* output_bfd
, struct bfd_link_info
* info
)
16231 struct elf32_arm_link_hash_table
*htab
;
16233 htab
= elf32_arm_hash_table (info
);
16237 dynobj
= elf_hash_table (info
)->dynobj
;
16239 sgot
= htab
->root
.sgotplt
;
16240 /* A broken linker script might have discarded the dynamic sections.
16241 Catch this here so that we do not seg-fault later on. */
16242 if (sgot
!= NULL
&& bfd_is_abs_section (sgot
->output_section
))
16244 sdyn
= bfd_get_linker_section (dynobj
, ".dynamic");
16246 if (elf_hash_table (info
)->dynamic_sections_created
)
16249 Elf32_External_Dyn
*dyncon
, *dynconend
;
16251 splt
= htab
->root
.splt
;
16252 BFD_ASSERT (splt
!= NULL
&& sdyn
!= NULL
);
16253 BFD_ASSERT (htab
->symbian_p
|| sgot
!= NULL
);
16255 dyncon
= (Elf32_External_Dyn
*) sdyn
->contents
;
16256 dynconend
= (Elf32_External_Dyn
*) (sdyn
->contents
+ sdyn
->size
);
16258 for (; dyncon
< dynconend
; dyncon
++)
16260 Elf_Internal_Dyn dyn
;
16264 bfd_elf32_swap_dyn_in (dynobj
, dyncon
, &dyn
);
16271 if (htab
->vxworks_p
16272 && elf_vxworks_finish_dynamic_entry (output_bfd
, &dyn
))
16273 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16278 goto get_vma_if_bpabi
;
16281 goto get_vma_if_bpabi
;
16284 goto get_vma_if_bpabi
;
16286 name
= ".gnu.version";
16287 goto get_vma_if_bpabi
;
16289 name
= ".gnu.version_d";
16290 goto get_vma_if_bpabi
;
16292 name
= ".gnu.version_r";
16293 goto get_vma_if_bpabi
;
16296 name
= htab
->symbian_p
? ".got" : ".got.plt";
16299 name
= RELOC_SECTION (htab
, ".plt");
16301 s
= bfd_get_linker_section (dynobj
, name
);
16305 (_("could not find section %s"), name
);
16306 bfd_set_error (bfd_error_invalid_operation
);
16309 if (!htab
->symbian_p
)
16310 dyn
.d_un
.d_ptr
= s
->output_section
->vma
+ s
->output_offset
;
16312 /* In the BPABI, tags in the PT_DYNAMIC section point
16313 at the file offset, not the memory address, for the
16314 convenience of the post linker. */
16315 dyn
.d_un
.d_ptr
= s
->output_section
->filepos
+ s
->output_offset
;
16316 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16320 if (htab
->symbian_p
)
16325 s
= htab
->root
.srelplt
;
16326 BFD_ASSERT (s
!= NULL
);
16327 dyn
.d_un
.d_val
= s
->size
;
16328 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16335 /* In the BPABI, the DT_REL tag must point at the file
16336 offset, not the VMA, of the first relocation
16337 section. So, we use code similar to that in
16338 elflink.c, but do not check for SHF_ALLOC on the
16339 relocation section, since relocation sections are
16340 never allocated under the BPABI. PLT relocs are also
16342 if (htab
->symbian_p
)
16345 type
= ((dyn
.d_tag
== DT_REL
|| dyn
.d_tag
== DT_RELSZ
)
16346 ? SHT_REL
: SHT_RELA
);
16347 dyn
.d_un
.d_val
= 0;
16348 for (i
= 1; i
< elf_numsections (output_bfd
); i
++)
16350 Elf_Internal_Shdr
*hdr
16351 = elf_elfsections (output_bfd
)[i
];
16352 if (hdr
->sh_type
== type
)
16354 if (dyn
.d_tag
== DT_RELSZ
16355 || dyn
.d_tag
== DT_RELASZ
)
16356 dyn
.d_un
.d_val
+= hdr
->sh_size
;
16357 else if ((ufile_ptr
) hdr
->sh_offset
16358 <= dyn
.d_un
.d_val
- 1)
16359 dyn
.d_un
.d_val
= hdr
->sh_offset
;
16362 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16366 case DT_TLSDESC_PLT
:
16367 s
= htab
->root
.splt
;
16368 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
16369 + htab
->dt_tlsdesc_plt
);
16370 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16373 case DT_TLSDESC_GOT
:
16374 s
= htab
->root
.sgot
;
16375 dyn
.d_un
.d_ptr
= (s
->output_section
->vma
+ s
->output_offset
16376 + htab
->dt_tlsdesc_got
);
16377 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16380 /* Set the bottom bit of DT_INIT/FINI if the
16381 corresponding function is Thumb. */
16383 name
= info
->init_function
;
16386 name
= info
->fini_function
;
16388 /* If it wasn't set by elf_bfd_final_link
16389 then there is nothing to adjust. */
16390 if (dyn
.d_un
.d_val
!= 0)
16392 struct elf_link_hash_entry
* eh
;
16394 eh
= elf_link_hash_lookup (elf_hash_table (info
), name
,
16395 FALSE
, FALSE
, TRUE
);
16397 && ARM_GET_SYM_BRANCH_TYPE (eh
->target_internal
)
16398 == ST_BRANCH_TO_THUMB
)
16400 dyn
.d_un
.d_val
|= 1;
16401 bfd_elf32_swap_dyn_out (output_bfd
, &dyn
, dyncon
);
16408 /* Fill in the first entry in the procedure linkage table. */
16409 if (splt
->size
> 0 && htab
->plt_header_size
)
16411 const bfd_vma
*plt0_entry
;
16412 bfd_vma got_address
, plt_address
, got_displacement
;
16414 /* Calculate the addresses of the GOT and PLT. */
16415 got_address
= sgot
->output_section
->vma
+ sgot
->output_offset
;
16416 plt_address
= splt
->output_section
->vma
+ splt
->output_offset
;
16418 if (htab
->vxworks_p
)
16420 /* The VxWorks GOT is relocated by the dynamic linker.
16421 Therefore, we must emit relocations rather than simply
16422 computing the values now. */
16423 Elf_Internal_Rela rel
;
16425 plt0_entry
= elf32_arm_vxworks_exec_plt0_entry
;
16426 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16427 splt
->contents
+ 0);
16428 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16429 splt
->contents
+ 4);
16430 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16431 splt
->contents
+ 8);
16432 bfd_put_32 (output_bfd
, got_address
, splt
->contents
+ 12);
16434 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16435 rel
.r_offset
= plt_address
+ 12;
16436 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
16438 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
,
16439 htab
->srelplt2
->contents
);
16441 else if (htab
->nacl_p
)
16442 arm_nacl_put_plt0 (htab
, output_bfd
, splt
,
16443 got_address
+ 8 - (plt_address
+ 16));
16444 else if (using_thumb_only (htab
))
16446 got_displacement
= got_address
- (plt_address
+ 12);
16448 plt0_entry
= elf32_thumb2_plt0_entry
;
16449 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16450 splt
->contents
+ 0);
16451 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16452 splt
->contents
+ 4);
16453 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16454 splt
->contents
+ 8);
16456 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 12);
16460 got_displacement
= got_address
- (plt_address
+ 16);
16462 plt0_entry
= elf32_arm_plt0_entry
;
16463 put_arm_insn (htab
, output_bfd
, plt0_entry
[0],
16464 splt
->contents
+ 0);
16465 put_arm_insn (htab
, output_bfd
, plt0_entry
[1],
16466 splt
->contents
+ 4);
16467 put_arm_insn (htab
, output_bfd
, plt0_entry
[2],
16468 splt
->contents
+ 8);
16469 put_arm_insn (htab
, output_bfd
, plt0_entry
[3],
16470 splt
->contents
+ 12);
16472 #ifdef FOUR_WORD_PLT
16473 /* The displacement value goes in the otherwise-unused
16474 last word of the second entry. */
16475 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 28);
16477 bfd_put_32 (output_bfd
, got_displacement
, splt
->contents
+ 16);
16482 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16483 really seem like the right value. */
16484 if (splt
->output_section
->owner
== output_bfd
)
16485 elf_section_data (splt
->output_section
)->this_hdr
.sh_entsize
= 4;
16487 if (htab
->dt_tlsdesc_plt
)
16489 bfd_vma got_address
16490 = sgot
->output_section
->vma
+ sgot
->output_offset
;
16491 bfd_vma gotplt_address
= (htab
->root
.sgot
->output_section
->vma
16492 + htab
->root
.sgot
->output_offset
);
16493 bfd_vma plt_address
16494 = splt
->output_section
->vma
+ splt
->output_offset
;
16496 arm_put_trampoline (htab
, output_bfd
,
16497 splt
->contents
+ htab
->dt_tlsdesc_plt
,
16498 dl_tlsdesc_lazy_trampoline
, 6);
16500 bfd_put_32 (output_bfd
,
16501 gotplt_address
+ htab
->dt_tlsdesc_got
16502 - (plt_address
+ htab
->dt_tlsdesc_plt
)
16503 - dl_tlsdesc_lazy_trampoline
[6],
16504 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24);
16505 bfd_put_32 (output_bfd
,
16506 got_address
- (plt_address
+ htab
->dt_tlsdesc_plt
)
16507 - dl_tlsdesc_lazy_trampoline
[7],
16508 splt
->contents
+ htab
->dt_tlsdesc_plt
+ 24 + 4);
16511 if (htab
->tls_trampoline
)
16513 arm_put_trampoline (htab
, output_bfd
,
16514 splt
->contents
+ htab
->tls_trampoline
,
16515 tls_trampoline
, 3);
16516 #ifdef FOUR_WORD_PLT
16517 bfd_put_32 (output_bfd
, 0x00000000,
16518 splt
->contents
+ htab
->tls_trampoline
+ 12);
16522 if (htab
->vxworks_p
16523 && !bfd_link_pic (info
)
16524 && htab
->root
.splt
->size
> 0)
16526 /* Correct the .rel(a).plt.unloaded relocations. They will have
16527 incorrect symbol indexes. */
16531 num_plts
= ((htab
->root
.splt
->size
- htab
->plt_header_size
)
16532 / htab
->plt_entry_size
);
16533 p
= htab
->srelplt2
->contents
+ RELOC_SIZE (htab
);
16535 for (; num_plts
; num_plts
--)
16537 Elf_Internal_Rela rel
;
16539 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
16540 rel
.r_info
= ELF32_R_INFO (htab
->root
.hgot
->indx
, R_ARM_ABS32
);
16541 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
16542 p
+= RELOC_SIZE (htab
);
16544 SWAP_RELOC_IN (htab
) (output_bfd
, p
, &rel
);
16545 rel
.r_info
= ELF32_R_INFO (htab
->root
.hplt
->indx
, R_ARM_ABS32
);
16546 SWAP_RELOC_OUT (htab
) (output_bfd
, &rel
, p
);
16547 p
+= RELOC_SIZE (htab
);
16552 if (htab
->nacl_p
&& htab
->root
.iplt
!= NULL
&& htab
->root
.iplt
->size
> 0)
16553 /* NaCl uses a special first entry in .iplt too. */
16554 arm_nacl_put_plt0 (htab
, output_bfd
, htab
->root
.iplt
, 0);
16556 /* Fill in the first three entries in the global offset table. */
16559 if (sgot
->size
> 0)
16562 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
);
16564 bfd_put_32 (output_bfd
,
16565 sdyn
->output_section
->vma
+ sdyn
->output_offset
,
16567 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 4);
16568 bfd_put_32 (output_bfd
, (bfd_vma
) 0, sgot
->contents
+ 8);
16571 elf_section_data (sgot
->output_section
)->this_hdr
.sh_entsize
= 4;
16578 elf32_arm_post_process_headers (bfd
* abfd
, struct bfd_link_info
* link_info ATTRIBUTE_UNUSED
)
16580 Elf_Internal_Ehdr
* i_ehdrp
; /* ELF file header, internal form. */
16581 struct elf32_arm_link_hash_table
*globals
;
16582 struct elf_segment_map
*m
;
16584 i_ehdrp
= elf_elfheader (abfd
);
16586 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_UNKNOWN
)
16587 i_ehdrp
->e_ident
[EI_OSABI
] = ELFOSABI_ARM
;
16589 _bfd_elf_post_process_headers (abfd
, link_info
);
16590 i_ehdrp
->e_ident
[EI_ABIVERSION
] = ARM_ELF_ABI_VERSION
;
16594 globals
= elf32_arm_hash_table (link_info
);
16595 if (globals
!= NULL
&& globals
->byteswap_code
)
16596 i_ehdrp
->e_flags
|= EF_ARM_BE8
;
16599 if (EF_ARM_EABI_VERSION (i_ehdrp
->e_flags
) == EF_ARM_EABI_VER5
16600 && ((i_ehdrp
->e_type
== ET_DYN
) || (i_ehdrp
->e_type
== ET_EXEC
)))
16602 int abi
= bfd_elf_get_obj_attr_int (abfd
, OBJ_ATTR_PROC
, Tag_ABI_VFP_args
);
16603 if (abi
== AEABI_VFP_args_vfp
)
16604 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_HARD
;
16606 i_ehdrp
->e_flags
|= EF_ARM_ABI_FLOAT_SOFT
;
16609 /* Scan segment to set p_flags attribute if it contains only sections with
16610 SHF_ARM_PURECODE flag. */
16611 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
16617 for (j
= 0; j
< m
->count
; j
++)
16619 if (!(elf_section_flags (m
->sections
[j
]) & SHF_ARM_PURECODE
))
16625 m
->p_flags_valid
= 1;
16630 static enum elf_reloc_type_class
16631 elf32_arm_reloc_type_class (const struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
16632 const asection
*rel_sec ATTRIBUTE_UNUSED
,
16633 const Elf_Internal_Rela
*rela
)
16635 switch ((int) ELF32_R_TYPE (rela
->r_info
))
16637 case R_ARM_RELATIVE
:
16638 return reloc_class_relative
;
16639 case R_ARM_JUMP_SLOT
:
16640 return reloc_class_plt
;
16642 return reloc_class_copy
;
16643 case R_ARM_IRELATIVE
:
16644 return reloc_class_ifunc
;
16646 return reloc_class_normal
;
16651 elf32_arm_final_write_processing (bfd
*abfd
, bfd_boolean linker ATTRIBUTE_UNUSED
)
16653 bfd_arm_update_notes (abfd
, ARM_NOTE_SECTION
);
16656 /* Return TRUE if this is an unwinding table entry. */
16659 is_arm_elf_unwind_section_name (bfd
* abfd ATTRIBUTE_UNUSED
, const char * name
)
16661 return (CONST_STRNEQ (name
, ELF_STRING_ARM_unwind
)
16662 || CONST_STRNEQ (name
, ELF_STRING_ARM_unwind_once
));
16666 /* Set the type and flags for an ARM section. We do this by
16667 the section name, which is a hack, but ought to work. */
16670 elf32_arm_fake_sections (bfd
* abfd
, Elf_Internal_Shdr
* hdr
, asection
* sec
)
16674 name
= bfd_get_section_name (abfd
, sec
);
16676 if (is_arm_elf_unwind_section_name (abfd
, name
))
16678 hdr
->sh_type
= SHT_ARM_EXIDX
;
16679 hdr
->sh_flags
|= SHF_LINK_ORDER
;
16682 if (sec
->flags
& SEC_ELF_PURECODE
)
16683 hdr
->sh_flags
|= SHF_ARM_PURECODE
;
16688 /* Handle an ARM specific section when reading an object file. This is
16689 called when bfd_section_from_shdr finds a section with an unknown
16693 elf32_arm_section_from_shdr (bfd
*abfd
,
16694 Elf_Internal_Shdr
* hdr
,
16698 /* There ought to be a place to keep ELF backend specific flags, but
16699 at the moment there isn't one. We just keep track of the
16700 sections by their name, instead. Fortunately, the ABI gives
16701 names for all the ARM specific sections, so we will probably get
16703 switch (hdr
->sh_type
)
16705 case SHT_ARM_EXIDX
:
16706 case SHT_ARM_PREEMPTMAP
:
16707 case SHT_ARM_ATTRIBUTES
:
16714 if (! _bfd_elf_make_section_from_shdr (abfd
, hdr
, name
, shindex
))
16720 static _arm_elf_section_data
*
16721 get_arm_elf_section_data (asection
* sec
)
16723 if (sec
&& sec
->owner
&& is_arm_elf (sec
->owner
))
16724 return elf32_arm_section_data (sec
);
16732 struct bfd_link_info
*info
;
16735 int (*func
) (void *, const char *, Elf_Internal_Sym
*,
16736 asection
*, struct elf_link_hash_entry
*);
16737 } output_arch_syminfo
;
16739 enum map_symbol_type
16747 /* Output a single mapping symbol. */
16750 elf32_arm_output_map_sym (output_arch_syminfo
*osi
,
16751 enum map_symbol_type type
,
16754 static const char *names
[3] = {"$a", "$t", "$d"};
16755 Elf_Internal_Sym sym
;
16757 sym
.st_value
= osi
->sec
->output_section
->vma
16758 + osi
->sec
->output_offset
16762 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_NOTYPE
);
16763 sym
.st_shndx
= osi
->sec_shndx
;
16764 sym
.st_target_internal
= 0;
16765 elf32_arm_section_map_add (osi
->sec
, names
[type
][1], offset
);
16766 return osi
->func (osi
->flaginfo
, names
[type
], &sym
, osi
->sec
, NULL
) == 1;
16769 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16770 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16773 elf32_arm_output_plt_map_1 (output_arch_syminfo
*osi
,
16774 bfd_boolean is_iplt_entry_p
,
16775 union gotplt_union
*root_plt
,
16776 struct arm_plt_info
*arm_plt
)
16778 struct elf32_arm_link_hash_table
*htab
;
16779 bfd_vma addr
, plt_header_size
;
16781 if (root_plt
->offset
== (bfd_vma
) -1)
16784 htab
= elf32_arm_hash_table (osi
->info
);
16788 if (is_iplt_entry_p
)
16790 osi
->sec
= htab
->root
.iplt
;
16791 plt_header_size
= 0;
16795 osi
->sec
= htab
->root
.splt
;
16796 plt_header_size
= htab
->plt_header_size
;
16798 osi
->sec_shndx
= (_bfd_elf_section_from_bfd_section
16799 (osi
->info
->output_bfd
, osi
->sec
->output_section
));
16801 addr
= root_plt
->offset
& -2;
16802 if (htab
->symbian_p
)
16804 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16806 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 4))
16809 else if (htab
->vxworks_p
)
16811 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16813 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 8))
16815 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
+ 12))
16817 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 20))
16820 else if (htab
->nacl_p
)
16822 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16825 else if (using_thumb_only (htab
))
16827 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
))
16832 bfd_boolean thumb_stub_p
;
16834 thumb_stub_p
= elf32_arm_plt_needs_thumb_stub_p (osi
->info
, arm_plt
);
16837 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_THUMB
, addr
- 4))
16840 #ifdef FOUR_WORD_PLT
16841 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16843 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_DATA
, addr
+ 12))
16846 /* A three-word PLT with no Thumb thunk contains only Arm code,
16847 so only need to output a mapping symbol for the first PLT entry and
16848 entries with thumb thunks. */
16849 if (thumb_stub_p
|| addr
== plt_header_size
)
16851 if (!elf32_arm_output_map_sym (osi
, ARM_MAP_ARM
, addr
))
16860 /* Output mapping symbols for PLT entries associated with H. */
16863 elf32_arm_output_plt_map (struct elf_link_hash_entry
*h
, void *inf
)
16865 output_arch_syminfo
*osi
= (output_arch_syminfo
*) inf
;
16866 struct elf32_arm_link_hash_entry
*eh
;
16868 if (h
->root
.type
== bfd_link_hash_indirect
)
16871 if (h
->root
.type
== bfd_link_hash_warning
)
16872 /* When warning symbols are created, they **replace** the "real"
16873 entry in the hash table, thus we never get to see the real
16874 symbol in a hash traversal. So look at it now. */
16875 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
16877 eh
= (struct elf32_arm_link_hash_entry
*) h
;
16878 return elf32_arm_output_plt_map_1 (osi
, SYMBOL_CALLS_LOCAL (osi
->info
, h
),
16879 &h
->plt
, &eh
->plt
);
16882 /* Bind a veneered symbol to its veneer identified by its hash entry
16883 STUB_ENTRY. The veneered location thus loose its symbol. */
16886 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry
*stub_entry
)
16888 struct elf32_arm_link_hash_entry
*hash
= stub_entry
->h
;
16891 hash
->root
.root
.u
.def
.section
= stub_entry
->stub_sec
;
16892 hash
->root
.root
.u
.def
.value
= stub_entry
->stub_offset
;
16893 hash
->root
.size
= stub_entry
->stub_size
;
16896 /* Output a single local symbol for a generated stub. */
16899 elf32_arm_output_stub_sym (output_arch_syminfo
*osi
, const char *name
,
16900 bfd_vma offset
, bfd_vma size
)
16902 Elf_Internal_Sym sym
;
16904 sym
.st_value
= osi
->sec
->output_section
->vma
16905 + osi
->sec
->output_offset
16907 sym
.st_size
= size
;
16909 sym
.st_info
= ELF_ST_INFO (STB_LOCAL
, STT_FUNC
);
16910 sym
.st_shndx
= osi
->sec_shndx
;
16911 sym
.st_target_internal
= 0;
16912 return osi
->func (osi
->flaginfo
, name
, &sym
, osi
->sec
, NULL
) == 1;
16916 arm_map_one_stub (struct bfd_hash_entry
* gen_entry
,
16919 struct elf32_arm_stub_hash_entry
*stub_entry
;
16920 asection
*stub_sec
;
16923 output_arch_syminfo
*osi
;
16924 const insn_sequence
*template_sequence
;
16925 enum stub_insn_type prev_type
;
16928 enum map_symbol_type sym_type
;
16930 /* Massage our args to the form they really have. */
16931 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
16932 osi
= (output_arch_syminfo
*) in_arg
;
16934 stub_sec
= stub_entry
->stub_sec
;
16936 /* Ensure this stub is attached to the current section being
16938 if (stub_sec
!= osi
->sec
)
16941 addr
= (bfd_vma
) stub_entry
->stub_offset
;
16942 template_sequence
= stub_entry
->stub_template
;
16944 if (arm_stub_sym_claimed (stub_entry
->stub_type
))
16945 arm_stub_claim_sym (stub_entry
);
16948 stub_name
= stub_entry
->output_name
;
16949 switch (template_sequence
[0].type
)
16952 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
,
16953 stub_entry
->stub_size
))
16958 if (!elf32_arm_output_stub_sym (osi
, stub_name
, addr
| 1,
16959 stub_entry
->stub_size
))
16968 prev_type
= DATA_TYPE
;
16970 for (i
= 0; i
< stub_entry
->stub_template_size
; i
++)
16972 switch (template_sequence
[i
].type
)
16975 sym_type
= ARM_MAP_ARM
;
16980 sym_type
= ARM_MAP_THUMB
;
16984 sym_type
= ARM_MAP_DATA
;
16992 if (template_sequence
[i
].type
!= prev_type
)
16994 prev_type
= template_sequence
[i
].type
;
16995 if (!elf32_arm_output_map_sym (osi
, sym_type
, addr
+ size
))
16999 switch (template_sequence
[i
].type
)
17023 /* Output mapping symbols for linker generated sections,
17024 and for those data-only sections that do not have a
17028 elf32_arm_output_arch_local_syms (bfd
*output_bfd
,
17029 struct bfd_link_info
*info
,
17031 int (*func
) (void *, const char *,
17032 Elf_Internal_Sym
*,
17034 struct elf_link_hash_entry
*))
17036 output_arch_syminfo osi
;
17037 struct elf32_arm_link_hash_table
*htab
;
17039 bfd_size_type size
;
17042 htab
= elf32_arm_hash_table (info
);
17046 check_use_blx (htab
);
17048 osi
.flaginfo
= flaginfo
;
17052 /* Add a $d mapping symbol to data-only sections that
17053 don't have any mapping symbol. This may result in (harmless) redundant
17054 mapping symbols. */
17055 for (input_bfd
= info
->input_bfds
;
17057 input_bfd
= input_bfd
->link
.next
)
17059 if ((input_bfd
->flags
& (BFD_LINKER_CREATED
| HAS_SYMS
)) == HAS_SYMS
)
17060 for (osi
.sec
= input_bfd
->sections
;
17062 osi
.sec
= osi
.sec
->next
)
17064 if (osi
.sec
->output_section
!= NULL
17065 && ((osi
.sec
->output_section
->flags
& (SEC_ALLOC
| SEC_CODE
))
17067 && (osi
.sec
->flags
& (SEC_HAS_CONTENTS
| SEC_LINKER_CREATED
))
17068 == SEC_HAS_CONTENTS
17069 && get_arm_elf_section_data (osi
.sec
) != NULL
17070 && get_arm_elf_section_data (osi
.sec
)->mapcount
== 0
17071 && osi
.sec
->size
> 0
17072 && (osi
.sec
->flags
& SEC_EXCLUDE
) == 0)
17074 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17075 (output_bfd
, osi
.sec
->output_section
);
17076 if (osi
.sec_shndx
!= (int)SHN_BAD
)
17077 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 0);
17082 /* ARM->Thumb glue. */
17083 if (htab
->arm_glue_size
> 0)
17085 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
17086 ARM2THUMB_GLUE_SECTION_NAME
);
17088 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17089 (output_bfd
, osi
.sec
->output_section
);
17090 if (bfd_link_pic (info
) || htab
->root
.is_relocatable_executable
17091 || htab
->pic_veneer
)
17092 size
= ARM2THUMB_PIC_GLUE_SIZE
;
17093 else if (htab
->use_blx
)
17094 size
= ARM2THUMB_V5_STATIC_GLUE_SIZE
;
17096 size
= ARM2THUMB_STATIC_GLUE_SIZE
;
17098 for (offset
= 0; offset
< htab
->arm_glue_size
; offset
+= size
)
17100 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
);
17101 elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, offset
+ size
- 4);
17105 /* Thumb->ARM glue. */
17106 if (htab
->thumb_glue_size
> 0)
17108 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
17109 THUMB2ARM_GLUE_SECTION_NAME
);
17111 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17112 (output_bfd
, osi
.sec
->output_section
);
17113 size
= THUMB2ARM_GLUE_SIZE
;
17115 for (offset
= 0; offset
< htab
->thumb_glue_size
; offset
+= size
)
17117 elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, offset
);
17118 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, offset
+ 4);
17122 /* ARMv4 BX veneers. */
17123 if (htab
->bx_glue_size
> 0)
17125 osi
.sec
= bfd_get_linker_section (htab
->bfd_of_glue_owner
,
17126 ARM_BX_GLUE_SECTION_NAME
);
17128 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17129 (output_bfd
, osi
.sec
->output_section
);
17131 elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0);
17134 /* Long calls stubs. */
17135 if (htab
->stub_bfd
&& htab
->stub_bfd
->sections
)
17137 asection
* stub_sec
;
17139 for (stub_sec
= htab
->stub_bfd
->sections
;
17141 stub_sec
= stub_sec
->next
)
17143 /* Ignore non-stub sections. */
17144 if (!strstr (stub_sec
->name
, STUB_SUFFIX
))
17147 osi
.sec
= stub_sec
;
17149 osi
.sec_shndx
= _bfd_elf_section_from_bfd_section
17150 (output_bfd
, osi
.sec
->output_section
);
17152 bfd_hash_traverse (&htab
->stub_hash_table
, arm_map_one_stub
, &osi
);
17156 /* Finally, output mapping symbols for the PLT. */
17157 if (htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
17159 osi
.sec
= htab
->root
.splt
;
17160 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
17161 (output_bfd
, osi
.sec
->output_section
));
17163 /* Output mapping symbols for the plt header. SymbianOS does not have a
17165 if (htab
->vxworks_p
)
17167 /* VxWorks shared libraries have no PLT header. */
17168 if (!bfd_link_pic (info
))
17170 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17172 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
17176 else if (htab
->nacl_p
)
17178 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17181 else if (using_thumb_only (htab
))
17183 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 0))
17185 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 12))
17187 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_THUMB
, 16))
17190 else if (!htab
->symbian_p
)
17192 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17194 #ifndef FOUR_WORD_PLT
17195 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
, 16))
17200 if (htab
->nacl_p
&& htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0)
17202 /* NaCl uses a special first entry in .iplt too. */
17203 osi
.sec
= htab
->root
.iplt
;
17204 osi
.sec_shndx
= (_bfd_elf_section_from_bfd_section
17205 (output_bfd
, osi
.sec
->output_section
));
17206 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, 0))
17209 if ((htab
->root
.splt
&& htab
->root
.splt
->size
> 0)
17210 || (htab
->root
.iplt
&& htab
->root
.iplt
->size
> 0))
17212 elf_link_hash_traverse (&htab
->root
, elf32_arm_output_plt_map
, &osi
);
17213 for (input_bfd
= info
->input_bfds
;
17215 input_bfd
= input_bfd
->link
.next
)
17217 struct arm_local_iplt_info
**local_iplt
;
17218 unsigned int i
, num_syms
;
17220 local_iplt
= elf32_arm_local_iplt (input_bfd
);
17221 if (local_iplt
!= NULL
)
17223 num_syms
= elf_symtab_hdr (input_bfd
).sh_info
;
17224 for (i
= 0; i
< num_syms
; i
++)
17225 if (local_iplt
[i
] != NULL
17226 && !elf32_arm_output_plt_map_1 (&osi
, TRUE
,
17227 &local_iplt
[i
]->root
,
17228 &local_iplt
[i
]->arm
))
17233 if (htab
->dt_tlsdesc_plt
!= 0)
17235 /* Mapping symbols for the lazy tls trampoline. */
17236 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->dt_tlsdesc_plt
))
17239 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
17240 htab
->dt_tlsdesc_plt
+ 24))
17243 if (htab
->tls_trampoline
!= 0)
17245 /* Mapping symbols for the tls trampoline. */
17246 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_ARM
, htab
->tls_trampoline
))
17248 #ifdef FOUR_WORD_PLT
17249 if (!elf32_arm_output_map_sym (&osi
, ARM_MAP_DATA
,
17250 htab
->tls_trampoline
+ 12))
17258 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17259 the import library. All SYMCOUNT symbols of ABFD can be examined
17260 from their pointers in SYMS. Pointers of symbols to keep should be
17261 stored continuously at the beginning of that array.
17263 Returns the number of symbols to keep. */
17265 static unsigned int
17266 elf32_arm_filter_cmse_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
17267 struct bfd_link_info
*info
,
17268 asymbol
**syms
, long symcount
)
17272 long src_count
, dst_count
= 0;
17273 struct elf32_arm_link_hash_table
*htab
;
17275 htab
= elf32_arm_hash_table (info
);
17276 if (!htab
->stub_bfd
|| !htab
->stub_bfd
->sections
)
17280 cmse_name
= (char *) bfd_malloc (maxnamelen
);
17281 for (src_count
= 0; src_count
< symcount
; src_count
++)
17283 struct elf32_arm_link_hash_entry
*cmse_hash
;
17289 sym
= syms
[src_count
];
17290 flags
= sym
->flags
;
17291 name
= (char *) bfd_asymbol_name (sym
);
17293 if ((flags
& BSF_FUNCTION
) != BSF_FUNCTION
)
17295 if (!(flags
& (BSF_GLOBAL
| BSF_WEAK
)))
17298 namelen
= strlen (name
) + sizeof (CMSE_PREFIX
) + 1;
17299 if (namelen
> maxnamelen
)
17301 cmse_name
= (char *)
17302 bfd_realloc (cmse_name
, namelen
);
17303 maxnamelen
= namelen
;
17305 snprintf (cmse_name
, maxnamelen
, "%s%s", CMSE_PREFIX
, name
);
17306 cmse_hash
= (struct elf32_arm_link_hash_entry
*)
17307 elf_link_hash_lookup (&(htab
)->root
, cmse_name
, FALSE
, FALSE
, TRUE
);
17310 || (cmse_hash
->root
.root
.type
!= bfd_link_hash_defined
17311 && cmse_hash
->root
.root
.type
!= bfd_link_hash_defweak
)
17312 || cmse_hash
->root
.type
!= STT_FUNC
)
17315 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash
->root
.target_internal
))
17318 syms
[dst_count
++] = sym
;
17322 syms
[dst_count
] = NULL
;
17327 /* Filter symbols of ABFD to include in the import library. All
17328 SYMCOUNT symbols of ABFD can be examined from their pointers in
17329 SYMS. Pointers of symbols to keep should be stored continuously at
17330 the beginning of that array.
17332 Returns the number of symbols to keep. */
17334 static unsigned int
17335 elf32_arm_filter_implib_symbols (bfd
*abfd ATTRIBUTE_UNUSED
,
17336 struct bfd_link_info
*info
,
17337 asymbol
**syms
, long symcount
)
17339 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (info
);
17341 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
17342 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
17343 library to be a relocatable object file. */
17344 BFD_ASSERT (!(bfd_get_file_flags (info
->out_implib_bfd
) & EXEC_P
));
17345 if (globals
->cmse_implib
)
17346 return elf32_arm_filter_cmse_symbols (abfd
, info
, syms
, symcount
);
17348 return _bfd_elf_filter_global_symbols (abfd
, info
, syms
, symcount
);
17351 /* Allocate target specific section data. */
17354 elf32_arm_new_section_hook (bfd
*abfd
, asection
*sec
)
17356 if (!sec
->used_by_bfd
)
17358 _arm_elf_section_data
*sdata
;
17359 bfd_size_type amt
= sizeof (*sdata
);
17361 sdata
= (_arm_elf_section_data
*) bfd_zalloc (abfd
, amt
);
17364 sec
->used_by_bfd
= sdata
;
17367 return _bfd_elf_new_section_hook (abfd
, sec
);
17371 /* Used to order a list of mapping symbols by address. */
17374 elf32_arm_compare_mapping (const void * a
, const void * b
)
17376 const elf32_arm_section_map
*amap
= (const elf32_arm_section_map
*) a
;
17377 const elf32_arm_section_map
*bmap
= (const elf32_arm_section_map
*) b
;
17379 if (amap
->vma
> bmap
->vma
)
17381 else if (amap
->vma
< bmap
->vma
)
17383 else if (amap
->type
> bmap
->type
)
17384 /* Ensure results do not depend on the host qsort for objects with
17385 multiple mapping symbols at the same address by sorting on type
17388 else if (amap
->type
< bmap
->type
)
17394 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17396 static unsigned long
17397 offset_prel31 (unsigned long addr
, bfd_vma offset
)
17399 return (addr
& ~0x7ffffffful
) | ((addr
+ offset
) & 0x7ffffffful
);
17402 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17406 copy_exidx_entry (bfd
*output_bfd
, bfd_byte
*to
, bfd_byte
*from
, bfd_vma offset
)
17408 unsigned long first_word
= bfd_get_32 (output_bfd
, from
);
17409 unsigned long second_word
= bfd_get_32 (output_bfd
, from
+ 4);
17411 /* High bit of first word is supposed to be zero. */
17412 if ((first_word
& 0x80000000ul
) == 0)
17413 first_word
= offset_prel31 (first_word
, offset
);
17415 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17416 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17417 if ((second_word
!= 0x1) && ((second_word
& 0x80000000ul
) == 0))
17418 second_word
= offset_prel31 (second_word
, offset
);
17420 bfd_put_32 (output_bfd
, first_word
, to
);
17421 bfd_put_32 (output_bfd
, second_word
, to
+ 4);
17424 /* Data for make_branch_to_a8_stub(). */
17426 struct a8_branch_to_stub_data
17428 asection
*writing_section
;
17429 bfd_byte
*contents
;
17433 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17434 places for a particular section. */
17437 make_branch_to_a8_stub (struct bfd_hash_entry
*gen_entry
,
17440 struct elf32_arm_stub_hash_entry
*stub_entry
;
17441 struct a8_branch_to_stub_data
*data
;
17442 bfd_byte
*contents
;
17443 unsigned long branch_insn
;
17444 bfd_vma veneered_insn_loc
, veneer_entry_loc
;
17445 bfd_signed_vma branch_offset
;
17449 stub_entry
= (struct elf32_arm_stub_hash_entry
*) gen_entry
;
17450 data
= (struct a8_branch_to_stub_data
*) in_arg
;
17452 if (stub_entry
->target_section
!= data
->writing_section
17453 || stub_entry
->stub_type
< arm_stub_a8_veneer_lwm
)
17456 contents
= data
->contents
;
17458 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17459 generated when both source and target are in the same section. */
17460 veneered_insn_loc
= stub_entry
->target_section
->output_section
->vma
17461 + stub_entry
->target_section
->output_offset
17462 + stub_entry
->source_value
;
17464 veneer_entry_loc
= stub_entry
->stub_sec
->output_section
->vma
17465 + stub_entry
->stub_sec
->output_offset
17466 + stub_entry
->stub_offset
;
17468 if (stub_entry
->stub_type
== arm_stub_a8_veneer_blx
)
17469 veneered_insn_loc
&= ~3u;
17471 branch_offset
= veneer_entry_loc
- veneered_insn_loc
- 4;
17473 abfd
= stub_entry
->target_section
->owner
;
17474 loc
= stub_entry
->source_value
;
17476 /* We attempt to avoid this condition by setting stubs_always_after_branch
17477 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17478 This check is just to be on the safe side... */
17479 if ((veneered_insn_loc
& ~0xfff) == (veneer_entry_loc
& ~0xfff))
17481 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub is "
17482 "allocated in unsafe location"), abfd
);
17486 switch (stub_entry
->stub_type
)
17488 case arm_stub_a8_veneer_b
:
17489 case arm_stub_a8_veneer_b_cond
:
17490 branch_insn
= 0xf0009000;
17493 case arm_stub_a8_veneer_blx
:
17494 branch_insn
= 0xf000e800;
17497 case arm_stub_a8_veneer_bl
:
17499 unsigned int i1
, j1
, i2
, j2
, s
;
17501 branch_insn
= 0xf000d000;
17504 if (branch_offset
< -16777216 || branch_offset
> 16777214)
17506 /* There's not much we can do apart from complain if this
17508 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub out "
17509 "of range (input file too large)"), abfd
);
17513 /* i1 = not(j1 eor s), so:
17515 j1 = (not i1) eor s. */
17517 branch_insn
|= (branch_offset
>> 1) & 0x7ff;
17518 branch_insn
|= ((branch_offset
>> 12) & 0x3ff) << 16;
17519 i2
= (branch_offset
>> 22) & 1;
17520 i1
= (branch_offset
>> 23) & 1;
17521 s
= (branch_offset
>> 24) & 1;
17524 branch_insn
|= j2
<< 11;
17525 branch_insn
|= j1
<< 13;
17526 branch_insn
|= s
<< 26;
17535 bfd_put_16 (abfd
, (branch_insn
>> 16) & 0xffff, &contents
[loc
]);
17536 bfd_put_16 (abfd
, branch_insn
& 0xffff, &contents
[loc
+ 2]);
17541 /* Beginning of stm32l4xx work-around. */
17543 /* Functions encoding instructions necessary for the emission of the
17544 fix-stm32l4xx-629360.
17545 Encoding is extracted from the
17546 ARM (C) Architecture Reference Manual
17547 ARMv7-A and ARMv7-R edition
17548 ARM DDI 0406C.b (ID072512). */
17550 static inline bfd_vma
17551 create_instruction_branch_absolute (int branch_offset
)
17553 /* A8.8.18 B (A8-334)
17554 B target_address (Encoding T4). */
17555 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17556 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17557 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17559 int s
= ((branch_offset
& 0x1000000) >> 24);
17560 int j1
= s
^ !((branch_offset
& 0x800000) >> 23);
17561 int j2
= s
^ !((branch_offset
& 0x400000) >> 22);
17563 if (branch_offset
< -(1 << 24) || branch_offset
>= (1 << 24))
17564 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17566 bfd_vma patched_inst
= 0xf0009000
17568 | (((unsigned long) (branch_offset
) >> 12) & 0x3ff) << 16 /* imm10. */
17569 | j1
<< 13 /* J1. */
17570 | j2
<< 11 /* J2. */
17571 | (((unsigned long) (branch_offset
) >> 1) & 0x7ff); /* imm11. */
17573 return patched_inst
;
17576 static inline bfd_vma
17577 create_instruction_ldmia (int base_reg
, int wback
, int reg_mask
)
17579 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17580 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17581 bfd_vma patched_inst
= 0xe8900000
17582 | (/*W=*/wback
<< 21)
17584 | (reg_mask
& 0x0000ffff);
17586 return patched_inst
;
17589 static inline bfd_vma
17590 create_instruction_ldmdb (int base_reg
, int wback
, int reg_mask
)
17592 /* A8.8.60 LDMDB/LDMEA (A8-402)
17593 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17594 bfd_vma patched_inst
= 0xe9100000
17595 | (/*W=*/wback
<< 21)
17597 | (reg_mask
& 0x0000ffff);
17599 return patched_inst
;
17602 static inline bfd_vma
17603 create_instruction_mov (int target_reg
, int source_reg
)
17605 /* A8.8.103 MOV (register) (A8-486)
17606 MOV Rd, Rm (Encoding T1). */
17607 bfd_vma patched_inst
= 0x4600
17608 | (target_reg
& 0x7)
17609 | ((target_reg
& 0x8) >> 3) << 7
17610 | (source_reg
<< 3);
17612 return patched_inst
;
17615 static inline bfd_vma
17616 create_instruction_sub (int target_reg
, int source_reg
, int value
)
17618 /* A8.8.221 SUB (immediate) (A8-708)
17619 SUB Rd, Rn, #value (Encoding T3). */
17620 bfd_vma patched_inst
= 0xf1a00000
17621 | (target_reg
<< 8)
17622 | (source_reg
<< 16)
17624 | ((value
& 0x800) >> 11) << 26
17625 | ((value
& 0x700) >> 8) << 12
17628 return patched_inst
;
17631 static inline bfd_vma
17632 create_instruction_vldmia (int base_reg
, int is_dp
, int wback
, int num_words
,
17635 /* A8.8.332 VLDM (A8-922)
17636 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17637 bfd_vma patched_inst
= (is_dp
? 0xec900b00 : 0xec900a00)
17638 | (/*W=*/wback
<< 21)
17640 | (num_words
& 0x000000ff)
17641 | (((unsigned)first_reg
>> 1) & 0x0000000f) << 12
17642 | (first_reg
& 0x00000001) << 22;
17644 return patched_inst
;
17647 static inline bfd_vma
17648 create_instruction_vldmdb (int base_reg
, int is_dp
, int num_words
,
17651 /* A8.8.332 VLDM (A8-922)
17652 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17653 bfd_vma patched_inst
= (is_dp
? 0xed300b00 : 0xed300a00)
17655 | (num_words
& 0x000000ff)
17656 | (((unsigned)first_reg
>>1 ) & 0x0000000f) << 12
17657 | (first_reg
& 0x00000001) << 22;
17659 return patched_inst
;
17662 static inline bfd_vma
17663 create_instruction_udf_w (int value
)
17665 /* A8.8.247 UDF (A8-758)
17666 Undefined (Encoding T2). */
17667 bfd_vma patched_inst
= 0xf7f0a000
17668 | (value
& 0x00000fff)
17669 | (value
& 0x000f0000) << 16;
17671 return patched_inst
;
17674 static inline bfd_vma
17675 create_instruction_udf (int value
)
17677 /* A8.8.247 UDF (A8-758)
17678 Undefined (Encoding T1). */
17679 bfd_vma patched_inst
= 0xde00
17682 return patched_inst
;
17685 /* Functions writing an instruction in memory, returning the next
17686 memory position to write to. */
17688 static inline bfd_byte
*
17689 push_thumb2_insn32 (struct elf32_arm_link_hash_table
* htab
,
17690 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
17692 put_thumb2_insn (htab
, output_bfd
, insn
, pt
);
17696 static inline bfd_byte
*
17697 push_thumb2_insn16 (struct elf32_arm_link_hash_table
* htab
,
17698 bfd
* output_bfd
, bfd_byte
*pt
, insn32 insn
)
17700 put_thumb_insn (htab
, output_bfd
, insn
, pt
);
17704 /* Function filling up a region in memory with T1 and T2 UDFs taking
17705 care of alignment. */
17708 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table
* htab
,
17710 const bfd_byte
* const base_stub_contents
,
17711 bfd_byte
* const from_stub_contents
,
17712 const bfd_byte
* const end_stub_contents
)
17714 bfd_byte
*current_stub_contents
= from_stub_contents
;
17716 /* Fill the remaining of the stub with deterministic contents : UDF
17718 Check if realignment is needed on modulo 4 frontier using T1, to
17720 if ((current_stub_contents
< end_stub_contents
)
17721 && !((current_stub_contents
- base_stub_contents
) % 2)
17722 && ((current_stub_contents
- base_stub_contents
) % 4))
17723 current_stub_contents
=
17724 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17725 create_instruction_udf (0));
17727 for (; current_stub_contents
< end_stub_contents
;)
17728 current_stub_contents
=
17729 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17730 create_instruction_udf_w (0));
17732 return current_stub_contents
;
17735 /* Functions writing the stream of instructions equivalent to the
17736 derived sequence for ldmia, ldmdb, vldm respectively. */
17739 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table
* htab
,
17741 const insn32 initial_insn
,
17742 const bfd_byte
*const initial_insn_addr
,
17743 bfd_byte
*const base_stub_contents
)
17745 int wback
= (initial_insn
& 0x00200000) >> 21;
17746 int ri
, rn
= (initial_insn
& 0x000F0000) >> 16;
17747 int insn_all_registers
= initial_insn
& 0x0000ffff;
17748 int insn_low_registers
, insn_high_registers
;
17749 int usable_register_mask
;
17750 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
17751 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
17752 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
17753 bfd_byte
*current_stub_contents
= base_stub_contents
;
17755 BFD_ASSERT (is_thumb2_ldmia (initial_insn
));
17757 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17758 smaller than 8 registers load sequences that do not cause the
17760 if (nb_registers
<= 8)
17762 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17763 current_stub_contents
=
17764 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17767 /* B initial_insn_addr+4. */
17769 current_stub_contents
=
17770 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17771 create_instruction_branch_absolute
17772 (initial_insn_addr
- current_stub_contents
));
17774 /* Fill the remaining of the stub with deterministic contents. */
17775 current_stub_contents
=
17776 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17777 base_stub_contents
, current_stub_contents
,
17778 base_stub_contents
+
17779 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17784 /* - reg_list[13] == 0. */
17785 BFD_ASSERT ((insn_all_registers
& (1 << 13))==0);
17787 /* - reg_list[14] & reg_list[15] != 1. */
17788 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
17790 /* - if (wback==1) reg_list[rn] == 0. */
17791 BFD_ASSERT (!wback
|| !restore_rn
);
17793 /* - nb_registers > 8. */
17794 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
17796 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17798 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17799 - One with the 7 lowest registers (register mask 0x007F)
17800 This LDM will finally contain between 2 and 7 registers
17801 - One with the 7 highest registers (register mask 0xDF80)
17802 This ldm will finally contain between 2 and 7 registers. */
17803 insn_low_registers
= insn_all_registers
& 0x007F;
17804 insn_high_registers
= insn_all_registers
& 0xDF80;
17806 /* A spare register may be needed during this veneer to temporarily
17807 handle the base register. This register will be restored with the
17808 last LDM operation.
17809 The usable register may be any general purpose register (that
17810 excludes PC, SP, LR : register mask is 0x1FFF). */
17811 usable_register_mask
= 0x1FFF;
17813 /* Generate the stub function. */
17816 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17817 current_stub_contents
=
17818 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17819 create_instruction_ldmia
17820 (rn
, /*wback=*/1, insn_low_registers
));
17822 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17823 current_stub_contents
=
17824 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17825 create_instruction_ldmia
17826 (rn
, /*wback=*/1, insn_high_registers
));
17829 /* B initial_insn_addr+4. */
17830 current_stub_contents
=
17831 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17832 create_instruction_branch_absolute
17833 (initial_insn_addr
- current_stub_contents
));
17836 else /* if (!wback). */
17840 /* If Rn is not part of the high-register-list, move it there. */
17841 if (!(insn_high_registers
& (1 << rn
)))
17843 /* Choose a Ri in the high-register-list that will be restored. */
17844 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
17847 current_stub_contents
=
17848 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17849 create_instruction_mov (ri
, rn
));
17852 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
17853 current_stub_contents
=
17854 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17855 create_instruction_ldmia
17856 (ri
, /*wback=*/1, insn_low_registers
));
17858 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
17859 current_stub_contents
=
17860 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17861 create_instruction_ldmia
17862 (ri
, /*wback=*/0, insn_high_registers
));
17866 /* B initial_insn_addr+4. */
17867 current_stub_contents
=
17868 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17869 create_instruction_branch_absolute
17870 (initial_insn_addr
- current_stub_contents
));
17874 /* Fill the remaining of the stub with deterministic contents. */
17875 current_stub_contents
=
17876 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17877 base_stub_contents
, current_stub_contents
,
17878 base_stub_contents
+
17879 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17883 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table
* htab
,
17885 const insn32 initial_insn
,
17886 const bfd_byte
*const initial_insn_addr
,
17887 bfd_byte
*const base_stub_contents
)
17889 int wback
= (initial_insn
& 0x00200000) >> 21;
17890 int ri
, rn
= (initial_insn
& 0x000f0000) >> 16;
17891 int insn_all_registers
= initial_insn
& 0x0000ffff;
17892 int insn_low_registers
, insn_high_registers
;
17893 int usable_register_mask
;
17894 int restore_pc
= (insn_all_registers
& (1 << 15)) ? 1 : 0;
17895 int restore_rn
= (insn_all_registers
& (1 << rn
)) ? 1 : 0;
17896 int nb_registers
= elf32_arm_popcount (insn_all_registers
);
17897 bfd_byte
*current_stub_contents
= base_stub_contents
;
17899 BFD_ASSERT (is_thumb2_ldmdb (initial_insn
));
17901 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17902 smaller than 8 registers load sequences that do not cause the
17904 if (nb_registers
<= 8)
17906 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17907 current_stub_contents
=
17908 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17911 /* B initial_insn_addr+4. */
17912 current_stub_contents
=
17913 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17914 create_instruction_branch_absolute
17915 (initial_insn_addr
- current_stub_contents
));
17917 /* Fill the remaining of the stub with deterministic contents. */
17918 current_stub_contents
=
17919 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
17920 base_stub_contents
, current_stub_contents
,
17921 base_stub_contents
+
17922 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
17927 /* - reg_list[13] == 0. */
17928 BFD_ASSERT ((insn_all_registers
& (1 << 13)) == 0);
17930 /* - reg_list[14] & reg_list[15] != 1. */
17931 BFD_ASSERT ((insn_all_registers
& 0xC000) != 0xC000);
17933 /* - if (wback==1) reg_list[rn] == 0. */
17934 BFD_ASSERT (!wback
|| !restore_rn
);
17936 /* - nb_registers > 8. */
17937 BFD_ASSERT (elf32_arm_popcount (insn_all_registers
) > 8);
17939 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17941 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
17942 - One with the 7 lowest registers (register mask 0x007F)
17943 This LDM will finally contain between 2 and 7 registers
17944 - One with the 7 highest registers (register mask 0xDF80)
17945 This ldm will finally contain between 2 and 7 registers. */
17946 insn_low_registers
= insn_all_registers
& 0x007F;
17947 insn_high_registers
= insn_all_registers
& 0xDF80;
17949 /* A spare register may be needed during this veneer to temporarily
17950 handle the base register. This register will be restored with
17951 the last LDM operation.
17952 The usable register may be any general purpose register (that excludes
17953 PC, SP, LR : register mask is 0x1FFF). */
17954 usable_register_mask
= 0x1FFF;
17956 /* Generate the stub function. */
17957 if (!wback
&& !restore_pc
&& !restore_rn
)
17959 /* Choose a Ri in the low-register-list that will be restored. */
17960 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
17963 current_stub_contents
=
17964 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
17965 create_instruction_mov (ri
, rn
));
17967 /* LDMDB Ri!, {R-high-register-list}. */
17968 current_stub_contents
=
17969 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17970 create_instruction_ldmdb
17971 (ri
, /*wback=*/1, insn_high_registers
));
17973 /* LDMDB Ri, {R-low-register-list}. */
17974 current_stub_contents
=
17975 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17976 create_instruction_ldmdb
17977 (ri
, /*wback=*/0, insn_low_registers
));
17979 /* B initial_insn_addr+4. */
17980 current_stub_contents
=
17981 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17982 create_instruction_branch_absolute
17983 (initial_insn_addr
- current_stub_contents
));
17985 else if (wback
&& !restore_pc
&& !restore_rn
)
17987 /* LDMDB Rn!, {R-high-register-list}. */
17988 current_stub_contents
=
17989 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17990 create_instruction_ldmdb
17991 (rn
, /*wback=*/1, insn_high_registers
));
17993 /* LDMDB Rn!, {R-low-register-list}. */
17994 current_stub_contents
=
17995 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
17996 create_instruction_ldmdb
17997 (rn
, /*wback=*/1, insn_low_registers
));
17999 /* B initial_insn_addr+4. */
18000 current_stub_contents
=
18001 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18002 create_instruction_branch_absolute
18003 (initial_insn_addr
- current_stub_contents
));
18005 else if (!wback
&& restore_pc
&& !restore_rn
)
18007 /* Choose a Ri in the high-register-list that will be restored. */
18008 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18010 /* SUB Ri, Rn, #(4*nb_registers). */
18011 current_stub_contents
=
18012 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18013 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
18015 /* LDMIA Ri!, {R-low-register-list}. */
18016 current_stub_contents
=
18017 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18018 create_instruction_ldmia
18019 (ri
, /*wback=*/1, insn_low_registers
));
18021 /* LDMIA Ri, {R-high-register-list}. */
18022 current_stub_contents
=
18023 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18024 create_instruction_ldmia
18025 (ri
, /*wback=*/0, insn_high_registers
));
18027 else if (wback
&& restore_pc
&& !restore_rn
)
18029 /* Choose a Ri in the high-register-list that will be restored. */
18030 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18032 /* SUB Rn, Rn, #(4*nb_registers) */
18033 current_stub_contents
=
18034 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18035 create_instruction_sub (rn
, rn
, (4 * nb_registers
)));
18038 current_stub_contents
=
18039 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18040 create_instruction_mov (ri
, rn
));
18042 /* LDMIA Ri!, {R-low-register-list}. */
18043 current_stub_contents
=
18044 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18045 create_instruction_ldmia
18046 (ri
, /*wback=*/1, insn_low_registers
));
18048 /* LDMIA Ri, {R-high-register-list}. */
18049 current_stub_contents
=
18050 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18051 create_instruction_ldmia
18052 (ri
, /*wback=*/0, insn_high_registers
));
18054 else if (!wback
&& !restore_pc
&& restore_rn
)
18057 if (!(insn_low_registers
& (1 << rn
)))
18059 /* Choose a Ri in the low-register-list that will be restored. */
18060 ri
= ctz (insn_low_registers
& usable_register_mask
& ~(1 << rn
));
18063 current_stub_contents
=
18064 push_thumb2_insn16 (htab
, output_bfd
, current_stub_contents
,
18065 create_instruction_mov (ri
, rn
));
18068 /* LDMDB Ri!, {R-high-register-list}. */
18069 current_stub_contents
=
18070 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18071 create_instruction_ldmdb
18072 (ri
, /*wback=*/1, insn_high_registers
));
18074 /* LDMDB Ri, {R-low-register-list}. */
18075 current_stub_contents
=
18076 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18077 create_instruction_ldmdb
18078 (ri
, /*wback=*/0, insn_low_registers
));
18080 /* B initial_insn_addr+4. */
18081 current_stub_contents
=
18082 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18083 create_instruction_branch_absolute
18084 (initial_insn_addr
- current_stub_contents
));
18086 else if (!wback
&& restore_pc
&& restore_rn
)
18089 if (!(insn_high_registers
& (1 << rn
)))
18091 /* Choose a Ri in the high-register-list that will be restored. */
18092 ri
= ctz (insn_high_registers
& usable_register_mask
& ~(1 << rn
));
18095 /* SUB Ri, Rn, #(4*nb_registers). */
18096 current_stub_contents
=
18097 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18098 create_instruction_sub (ri
, rn
, (4 * nb_registers
)));
18100 /* LDMIA Ri!, {R-low-register-list}. */
18101 current_stub_contents
=
18102 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18103 create_instruction_ldmia
18104 (ri
, /*wback=*/1, insn_low_registers
));
18106 /* LDMIA Ri, {R-high-register-list}. */
18107 current_stub_contents
=
18108 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18109 create_instruction_ldmia
18110 (ri
, /*wback=*/0, insn_high_registers
));
18112 else if (wback
&& restore_rn
)
18114 /* The assembler should not have accepted to encode this. */
18115 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18116 "undefined behavior.\n");
18119 /* Fill the remaining of the stub with deterministic contents. */
18120 current_stub_contents
=
18121 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18122 base_stub_contents
, current_stub_contents
,
18123 base_stub_contents
+
18124 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
);
18129 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table
* htab
,
18131 const insn32 initial_insn
,
18132 const bfd_byte
*const initial_insn_addr
,
18133 bfd_byte
*const base_stub_contents
)
18135 int num_words
= ((unsigned int) initial_insn
<< 24) >> 24;
18136 bfd_byte
*current_stub_contents
= base_stub_contents
;
18138 BFD_ASSERT (is_thumb2_vldm (initial_insn
));
18140 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18141 smaller than 8 words load sequences that do not cause the
18143 if (num_words
<= 8)
18145 /* Untouched instruction. */
18146 current_stub_contents
=
18147 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18150 /* B initial_insn_addr+4. */
18151 current_stub_contents
=
18152 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18153 create_instruction_branch_absolute
18154 (initial_insn_addr
- current_stub_contents
));
18158 bfd_boolean is_dp
= /* DP encoding. */
18159 (initial_insn
& 0xfe100f00) == 0xec100b00;
18160 bfd_boolean is_ia_nobang
= /* (IA without !). */
18161 (((initial_insn
<< 7) >> 28) & 0xd) == 0x4;
18162 bfd_boolean is_ia_bang
= /* (IA with !) - includes VPOP. */
18163 (((initial_insn
<< 7) >> 28) & 0xd) == 0x5;
18164 bfd_boolean is_db_bang
= /* (DB with !). */
18165 (((initial_insn
<< 7) >> 28) & 0xd) == 0x9;
18166 int base_reg
= ((unsigned int) initial_insn
<< 12) >> 28;
18167 /* d = UInt (Vd:D);. */
18168 int first_reg
= ((((unsigned int) initial_insn
<< 16) >> 28) << 1)
18169 | (((unsigned int)initial_insn
<< 9) >> 31);
18171 /* Compute the number of 8-words chunks needed to split. */
18172 int chunks
= (num_words
% 8) ? (num_words
/ 8 + 1) : (num_words
/ 8);
18175 /* The test coverage has been done assuming the following
18176 hypothesis that exactly one of the previous is_ predicates is
18178 BFD_ASSERT ( (is_ia_nobang
^ is_ia_bang
^ is_db_bang
)
18179 && !(is_ia_nobang
& is_ia_bang
& is_db_bang
));
18181 /* We treat the cutting of the words in one pass for all
18182 cases, then we emit the adjustments:
18185 -> vldm rx!, {8_words_or_less} for each needed 8_word
18186 -> sub rx, rx, #size (list)
18189 -> vldm rx!, {8_words_or_less} for each needed 8_word
18190 This also handles vpop instruction (when rx is sp)
18193 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18194 for (chunk
= 0; chunk
< chunks
; ++chunk
)
18196 bfd_vma new_insn
= 0;
18198 if (is_ia_nobang
|| is_ia_bang
)
18200 new_insn
= create_instruction_vldmia
18204 chunks
- (chunk
+ 1) ?
18205 8 : num_words
- chunk
* 8,
18206 first_reg
+ chunk
* 8);
18208 else if (is_db_bang
)
18210 new_insn
= create_instruction_vldmdb
18213 chunks
- (chunk
+ 1) ?
18214 8 : num_words
- chunk
* 8,
18215 first_reg
+ chunk
* 8);
18219 current_stub_contents
=
18220 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18224 /* Only this case requires the base register compensation
18228 current_stub_contents
=
18229 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18230 create_instruction_sub
18231 (base_reg
, base_reg
, 4*num_words
));
18234 /* B initial_insn_addr+4. */
18235 current_stub_contents
=
18236 push_thumb2_insn32 (htab
, output_bfd
, current_stub_contents
,
18237 create_instruction_branch_absolute
18238 (initial_insn_addr
- current_stub_contents
));
18241 /* Fill the remaining of the stub with deterministic contents. */
18242 current_stub_contents
=
18243 stm32l4xx_fill_stub_udf (htab
, output_bfd
,
18244 base_stub_contents
, current_stub_contents
,
18245 base_stub_contents
+
18246 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
);
18250 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table
* htab
,
18252 const insn32 wrong_insn
,
18253 const bfd_byte
*const wrong_insn_addr
,
18254 bfd_byte
*const stub_contents
)
18256 if (is_thumb2_ldmia (wrong_insn
))
18257 stm32l4xx_create_replacing_stub_ldmia (htab
, output_bfd
,
18258 wrong_insn
, wrong_insn_addr
,
18260 else if (is_thumb2_ldmdb (wrong_insn
))
18261 stm32l4xx_create_replacing_stub_ldmdb (htab
, output_bfd
,
18262 wrong_insn
, wrong_insn_addr
,
18264 else if (is_thumb2_vldm (wrong_insn
))
18265 stm32l4xx_create_replacing_stub_vldm (htab
, output_bfd
,
18266 wrong_insn
, wrong_insn_addr
,
18270 /* End of stm32l4xx work-around. */
18273 /* Do code byteswapping. Return FALSE afterwards so that the section is
18274 written out as normal. */
18277 elf32_arm_write_section (bfd
*output_bfd
,
18278 struct bfd_link_info
*link_info
,
18280 bfd_byte
*contents
)
18282 unsigned int mapcount
, errcount
;
18283 _arm_elf_section_data
*arm_data
;
18284 struct elf32_arm_link_hash_table
*globals
= elf32_arm_hash_table (link_info
);
18285 elf32_arm_section_map
*map
;
18286 elf32_vfp11_erratum_list
*errnode
;
18287 elf32_stm32l4xx_erratum_list
*stm32l4xx_errnode
;
18290 bfd_vma offset
= sec
->output_section
->vma
+ sec
->output_offset
;
18294 if (globals
== NULL
)
18297 /* If this section has not been allocated an _arm_elf_section_data
18298 structure then we cannot record anything. */
18299 arm_data
= get_arm_elf_section_data (sec
);
18300 if (arm_data
== NULL
)
18303 mapcount
= arm_data
->mapcount
;
18304 map
= arm_data
->map
;
18305 errcount
= arm_data
->erratumcount
;
18309 unsigned int endianflip
= bfd_big_endian (output_bfd
) ? 3 : 0;
18311 for (errnode
= arm_data
->erratumlist
; errnode
!= 0;
18312 errnode
= errnode
->next
)
18314 bfd_vma target
= errnode
->vma
- offset
;
18316 switch (errnode
->type
)
18318 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER
:
18320 bfd_vma branch_to_veneer
;
18321 /* Original condition code of instruction, plus bit mask for
18322 ARM B instruction. */
18323 unsigned int insn
= (errnode
->u
.b
.vfp_insn
& 0xf0000000)
18326 /* The instruction is before the label. */
18329 /* Above offset included in -4 below. */
18330 branch_to_veneer
= errnode
->u
.b
.veneer
->vma
18331 - errnode
->vma
- 4;
18333 if ((signed) branch_to_veneer
< -(1 << 25)
18334 || (signed) branch_to_veneer
>= (1 << 25))
18335 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18336 "range"), output_bfd
);
18338 insn
|= (branch_to_veneer
>> 2) & 0xffffff;
18339 contents
[endianflip
^ target
] = insn
& 0xff;
18340 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
18341 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
18342 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
18346 case VFP11_ERRATUM_ARM_VENEER
:
18348 bfd_vma branch_from_veneer
;
18351 /* Take size of veneer into account. */
18352 branch_from_veneer
= errnode
->u
.v
.branch
->vma
18353 - errnode
->vma
- 12;
18355 if ((signed) branch_from_veneer
< -(1 << 25)
18356 || (signed) branch_from_veneer
>= (1 << 25))
18357 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18358 "range"), output_bfd
);
18360 /* Original instruction. */
18361 insn
= errnode
->u
.v
.branch
->u
.b
.vfp_insn
;
18362 contents
[endianflip
^ target
] = insn
& 0xff;
18363 contents
[endianflip
^ (target
+ 1)] = (insn
>> 8) & 0xff;
18364 contents
[endianflip
^ (target
+ 2)] = (insn
>> 16) & 0xff;
18365 contents
[endianflip
^ (target
+ 3)] = (insn
>> 24) & 0xff;
18367 /* Branch back to insn after original insn. */
18368 insn
= 0xea000000 | ((branch_from_veneer
>> 2) & 0xffffff);
18369 contents
[endianflip
^ (target
+ 4)] = insn
& 0xff;
18370 contents
[endianflip
^ (target
+ 5)] = (insn
>> 8) & 0xff;
18371 contents
[endianflip
^ (target
+ 6)] = (insn
>> 16) & 0xff;
18372 contents
[endianflip
^ (target
+ 7)] = (insn
>> 24) & 0xff;
18382 if (arm_data
->stm32l4xx_erratumcount
!= 0)
18384 for (stm32l4xx_errnode
= arm_data
->stm32l4xx_erratumlist
;
18385 stm32l4xx_errnode
!= 0;
18386 stm32l4xx_errnode
= stm32l4xx_errnode
->next
)
18388 bfd_vma target
= stm32l4xx_errnode
->vma
- offset
;
18390 switch (stm32l4xx_errnode
->type
)
18392 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER
:
18395 bfd_vma branch_to_veneer
=
18396 stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
;
18398 if ((signed) branch_to_veneer
< -(1 << 24)
18399 || (signed) branch_to_veneer
>= (1 << 24))
18401 bfd_vma out_of_range
=
18402 ((signed) branch_to_veneer
< -(1 << 24)) ?
18403 - branch_to_veneer
- (1 << 24) :
18404 ((signed) branch_to_veneer
>= (1 << 24)) ?
18405 branch_to_veneer
- (1 << 24) : 0;
18408 (_("%B(%#Lx): error: Cannot create STM32L4XX veneer. "
18409 "Jump out of range by %Ld bytes. "
18410 "Cannot encode branch instruction. "),
18412 stm32l4xx_errnode
->vma
- 4,
18417 insn
= create_instruction_branch_absolute
18418 (stm32l4xx_errnode
->u
.b
.veneer
->vma
- stm32l4xx_errnode
->vma
);
18420 /* The instruction is before the label. */
18423 put_thumb2_insn (globals
, output_bfd
,
18424 (bfd_vma
) insn
, contents
+ target
);
18428 case STM32L4XX_ERRATUM_VENEER
:
18431 bfd_byte
* veneer_r
;
18434 veneer
= contents
+ target
;
18436 + stm32l4xx_errnode
->u
.b
.veneer
->vma
18437 - stm32l4xx_errnode
->vma
- 4;
18439 if ((signed) (veneer_r
- veneer
-
18440 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
>
18441 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
?
18442 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE
:
18443 STM32L4XX_ERRATUM_LDM_VENEER_SIZE
) < -(1 << 24)
18444 || (signed) (veneer_r
- veneer
) >= (1 << 24))
18446 _bfd_error_handler (_("%B: error: Cannot create STM32L4XX "
18447 "veneer."), output_bfd
);
18451 /* Original instruction. */
18452 insn
= stm32l4xx_errnode
->u
.v
.branch
->u
.b
.insn
;
18454 stm32l4xx_create_replacing_stub
18455 (globals
, output_bfd
, insn
, (void*)veneer_r
, (void*)veneer
);
18465 if (arm_data
->elf
.this_hdr
.sh_type
== SHT_ARM_EXIDX
)
18467 arm_unwind_table_edit
*edit_node
18468 = arm_data
->u
.exidx
.unwind_edit_list
;
18469 /* Now, sec->size is the size of the section we will write. The original
18470 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18471 markers) was sec->rawsize. (This isn't the case if we perform no
18472 edits, then rawsize will be zero and we should use size). */
18473 bfd_byte
*edited_contents
= (bfd_byte
*) bfd_malloc (sec
->size
);
18474 unsigned int input_size
= sec
->rawsize
? sec
->rawsize
: sec
->size
;
18475 unsigned int in_index
, out_index
;
18476 bfd_vma add_to_offsets
= 0;
18478 for (in_index
= 0, out_index
= 0; in_index
* 8 < input_size
|| edit_node
;)
18482 unsigned int edit_index
= edit_node
->index
;
18484 if (in_index
< edit_index
&& in_index
* 8 < input_size
)
18486 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
18487 contents
+ in_index
* 8, add_to_offsets
);
18491 else if (in_index
== edit_index
18492 || (in_index
* 8 >= input_size
18493 && edit_index
== UINT_MAX
))
18495 switch (edit_node
->type
)
18497 case DELETE_EXIDX_ENTRY
:
18499 add_to_offsets
+= 8;
18502 case INSERT_EXIDX_CANTUNWIND_AT_END
:
18504 asection
*text_sec
= edit_node
->linked_section
;
18505 bfd_vma text_offset
= text_sec
->output_section
->vma
18506 + text_sec
->output_offset
18508 bfd_vma exidx_offset
= offset
+ out_index
* 8;
18509 unsigned long prel31_offset
;
18511 /* Note: this is meant to be equivalent to an
18512 R_ARM_PREL31 relocation. These synthetic
18513 EXIDX_CANTUNWIND markers are not relocated by the
18514 usual BFD method. */
18515 prel31_offset
= (text_offset
- exidx_offset
)
18517 if (bfd_link_relocatable (link_info
))
18519 /* Here relocation for new EXIDX_CANTUNWIND is
18520 created, so there is no need to
18521 adjust offset by hand. */
18522 prel31_offset
= text_sec
->output_offset
18526 /* First address we can't unwind. */
18527 bfd_put_32 (output_bfd
, prel31_offset
,
18528 &edited_contents
[out_index
* 8]);
18530 /* Code for EXIDX_CANTUNWIND. */
18531 bfd_put_32 (output_bfd
, 0x1,
18532 &edited_contents
[out_index
* 8 + 4]);
18535 add_to_offsets
-= 8;
18540 edit_node
= edit_node
->next
;
18545 /* No more edits, copy remaining entries verbatim. */
18546 copy_exidx_entry (output_bfd
, edited_contents
+ out_index
* 8,
18547 contents
+ in_index
* 8, add_to_offsets
);
18553 if (!(sec
->flags
& SEC_EXCLUDE
) && !(sec
->flags
& SEC_NEVER_LOAD
))
18554 bfd_set_section_contents (output_bfd
, sec
->output_section
,
18556 (file_ptr
) sec
->output_offset
, sec
->size
);
18561 /* Fix code to point to Cortex-A8 erratum stubs. */
18562 if (globals
->fix_cortex_a8
)
18564 struct a8_branch_to_stub_data data
;
18566 data
.writing_section
= sec
;
18567 data
.contents
= contents
;
18569 bfd_hash_traverse (& globals
->stub_hash_table
, make_branch_to_a8_stub
,
18576 if (globals
->byteswap_code
)
18578 qsort (map
, mapcount
, sizeof (* map
), elf32_arm_compare_mapping
);
18581 for (i
= 0; i
< mapcount
; i
++)
18583 if (i
== mapcount
- 1)
18586 end
= map
[i
+ 1].vma
;
18588 switch (map
[i
].type
)
18591 /* Byte swap code words. */
18592 while (ptr
+ 3 < end
)
18594 tmp
= contents
[ptr
];
18595 contents
[ptr
] = contents
[ptr
+ 3];
18596 contents
[ptr
+ 3] = tmp
;
18597 tmp
= contents
[ptr
+ 1];
18598 contents
[ptr
+ 1] = contents
[ptr
+ 2];
18599 contents
[ptr
+ 2] = tmp
;
18605 /* Byte swap code halfwords. */
18606 while (ptr
+ 1 < end
)
18608 tmp
= contents
[ptr
];
18609 contents
[ptr
] = contents
[ptr
+ 1];
18610 contents
[ptr
+ 1] = tmp
;
18616 /* Leave data alone. */
18624 arm_data
->mapcount
= -1;
18625 arm_data
->mapsize
= 0;
18626 arm_data
->map
= NULL
;
18631 /* Mangle thumb function symbols as we read them in. */
18634 elf32_arm_swap_symbol_in (bfd
* abfd
,
18637 Elf_Internal_Sym
*dst
)
18639 Elf_Internal_Shdr
*symtab_hdr
;
18640 const char *name
= NULL
;
18642 if (!bfd_elf32_swap_symbol_in (abfd
, psrc
, pshn
, dst
))
18644 dst
->st_target_internal
= 0;
18646 /* New EABI objects mark thumb function symbols by setting the low bit of
18648 if (ELF_ST_TYPE (dst
->st_info
) == STT_FUNC
18649 || ELF_ST_TYPE (dst
->st_info
) == STT_GNU_IFUNC
)
18651 if (dst
->st_value
& 1)
18653 dst
->st_value
&= ~(bfd_vma
) 1;
18654 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
,
18655 ST_BRANCH_TO_THUMB
);
18658 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_ARM
);
18660 else if (ELF_ST_TYPE (dst
->st_info
) == STT_ARM_TFUNC
)
18662 dst
->st_info
= ELF_ST_INFO (ELF_ST_BIND (dst
->st_info
), STT_FUNC
);
18663 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_TO_THUMB
);
18665 else if (ELF_ST_TYPE (dst
->st_info
) == STT_SECTION
)
18666 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_LONG
);
18668 ARM_SET_SYM_BRANCH_TYPE (dst
->st_target_internal
, ST_BRANCH_UNKNOWN
);
18670 /* Mark CMSE special symbols. */
18671 symtab_hdr
= & elf_symtab_hdr (abfd
);
18672 if (symtab_hdr
->sh_size
)
18673 name
= bfd_elf_sym_name (abfd
, symtab_hdr
, dst
, NULL
);
18674 if (name
&& CONST_STRNEQ (name
, CMSE_PREFIX
))
18675 ARM_SET_SYM_CMSE_SPCL (dst
->st_target_internal
);
18681 /* Mangle thumb function symbols as we write them out. */
18684 elf32_arm_swap_symbol_out (bfd
*abfd
,
18685 const Elf_Internal_Sym
*src
,
18689 Elf_Internal_Sym newsym
;
18691 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18692 of the address set, as per the new EABI. We do this unconditionally
18693 because objcopy does not set the elf header flags until after
18694 it writes out the symbol table. */
18695 if (ARM_GET_SYM_BRANCH_TYPE (src
->st_target_internal
) == ST_BRANCH_TO_THUMB
)
18698 if (ELF_ST_TYPE (src
->st_info
) != STT_GNU_IFUNC
)
18699 newsym
.st_info
= ELF_ST_INFO (ELF_ST_BIND (src
->st_info
), STT_FUNC
);
18700 if (newsym
.st_shndx
!= SHN_UNDEF
)
18702 /* Do this only for defined symbols. At link type, the static
18703 linker will simulate the work of dynamic linker of resolving
18704 symbols and will carry over the thumbness of found symbols to
18705 the output symbol table. It's not clear how it happens, but
18706 the thumbness of undefined symbols can well be different at
18707 runtime, and writing '1' for them will be confusing for users
18708 and possibly for dynamic linker itself.
18710 newsym
.st_value
|= 1;
18715 bfd_elf32_swap_symbol_out (abfd
, src
, cdst
, shndx
);
18718 /* Add the PT_ARM_EXIDX program header. */
18721 elf32_arm_modify_segment_map (bfd
*abfd
,
18722 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
18724 struct elf_segment_map
*m
;
18727 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
18728 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
18730 /* If there is already a PT_ARM_EXIDX header, then we do not
18731 want to add another one. This situation arises when running
18732 "strip"; the input binary already has the header. */
18733 m
= elf_seg_map (abfd
);
18734 while (m
&& m
->p_type
!= PT_ARM_EXIDX
)
18738 m
= (struct elf_segment_map
*)
18739 bfd_zalloc (abfd
, sizeof (struct elf_segment_map
));
18742 m
->p_type
= PT_ARM_EXIDX
;
18744 m
->sections
[0] = sec
;
18746 m
->next
= elf_seg_map (abfd
);
18747 elf_seg_map (abfd
) = m
;
18754 /* We may add a PT_ARM_EXIDX program header. */
18757 elf32_arm_additional_program_headers (bfd
*abfd
,
18758 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
18762 sec
= bfd_get_section_by_name (abfd
, ".ARM.exidx");
18763 if (sec
!= NULL
&& (sec
->flags
& SEC_LOAD
) != 0)
18769 /* Hook called by the linker routine which adds symbols from an object
18773 elf32_arm_add_symbol_hook (bfd
*abfd
, struct bfd_link_info
*info
,
18774 Elf_Internal_Sym
*sym
, const char **namep
,
18775 flagword
*flagsp
, asection
**secp
, bfd_vma
*valp
)
18777 if (ELF_ST_TYPE (sym
->st_info
) == STT_GNU_IFUNC
18778 && (abfd
->flags
& DYNAMIC
) == 0
18779 && bfd_get_flavour (info
->output_bfd
) == bfd_target_elf_flavour
)
18780 elf_tdata (info
->output_bfd
)->has_gnu_symbols
|= elf_gnu_symbol_ifunc
;
18782 if (elf32_arm_hash_table (info
) == NULL
)
18785 if (elf32_arm_hash_table (info
)->vxworks_p
18786 && !elf_vxworks_add_symbol_hook (abfd
, info
, sym
, namep
,
18787 flagsp
, secp
, valp
))
18793 /* We use this to override swap_symbol_in and swap_symbol_out. */
18794 const struct elf_size_info elf32_arm_size_info
=
18796 sizeof (Elf32_External_Ehdr
),
18797 sizeof (Elf32_External_Phdr
),
18798 sizeof (Elf32_External_Shdr
),
18799 sizeof (Elf32_External_Rel
),
18800 sizeof (Elf32_External_Rela
),
18801 sizeof (Elf32_External_Sym
),
18802 sizeof (Elf32_External_Dyn
),
18803 sizeof (Elf_External_Note
),
18807 ELFCLASS32
, EV_CURRENT
,
18808 bfd_elf32_write_out_phdrs
,
18809 bfd_elf32_write_shdrs_and_ehdr
,
18810 bfd_elf32_checksum_contents
,
18811 bfd_elf32_write_relocs
,
18812 elf32_arm_swap_symbol_in
,
18813 elf32_arm_swap_symbol_out
,
18814 bfd_elf32_slurp_reloc_table
,
18815 bfd_elf32_slurp_symbol_table
,
18816 bfd_elf32_swap_dyn_in
,
18817 bfd_elf32_swap_dyn_out
,
18818 bfd_elf32_swap_reloc_in
,
18819 bfd_elf32_swap_reloc_out
,
18820 bfd_elf32_swap_reloca_in
,
18821 bfd_elf32_swap_reloca_out
18825 read_code32 (const bfd
*abfd
, const bfd_byte
*addr
)
18827 /* V7 BE8 code is always little endian. */
18828 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
18829 return bfd_getl32 (addr
);
18831 return bfd_get_32 (abfd
, addr
);
18835 read_code16 (const bfd
*abfd
, const bfd_byte
*addr
)
18837 /* V7 BE8 code is always little endian. */
18838 if ((elf_elfheader (abfd
)->e_flags
& EF_ARM_BE8
) != 0)
18839 return bfd_getl16 (addr
);
18841 return bfd_get_16 (abfd
, addr
);
18844 /* Return size of plt0 entry starting at ADDR
18845 or (bfd_vma) -1 if size can not be determined. */
18848 elf32_arm_plt0_size (const bfd
*abfd
, const bfd_byte
*addr
)
18850 bfd_vma first_word
;
18853 first_word
= read_code32 (abfd
, addr
);
18855 if (first_word
== elf32_arm_plt0_entry
[0])
18856 plt0_size
= 4 * ARRAY_SIZE (elf32_arm_plt0_entry
);
18857 else if (first_word
== elf32_thumb2_plt0_entry
[0])
18858 plt0_size
= 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry
);
18860 /* We don't yet handle this PLT format. */
18861 return (bfd_vma
) -1;
18866 /* Return size of plt entry starting at offset OFFSET
18867 of plt section located at address START
18868 or (bfd_vma) -1 if size can not be determined. */
18871 elf32_arm_plt_size (const bfd
*abfd
, const bfd_byte
*start
, bfd_vma offset
)
18873 bfd_vma first_insn
;
18874 bfd_vma plt_size
= 0;
18875 const bfd_byte
*addr
= start
+ offset
;
18877 /* PLT entry size if fixed on Thumb-only platforms. */
18878 if (read_code32 (abfd
, start
) == elf32_thumb2_plt0_entry
[0])
18879 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry
);
18881 /* Respect Thumb stub if necessary. */
18882 if (read_code16 (abfd
, addr
) == elf32_arm_plt_thumb_stub
[0])
18884 plt_size
+= 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub
);
18887 /* Strip immediate from first add. */
18888 first_insn
= read_code32 (abfd
, addr
+ plt_size
) & 0xffffff00;
18890 #ifdef FOUR_WORD_PLT
18891 if (first_insn
== elf32_arm_plt_entry
[0])
18892 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry
);
18894 if (first_insn
== elf32_arm_plt_entry_long
[0])
18895 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_long
);
18896 else if (first_insn
== elf32_arm_plt_entry_short
[0])
18897 plt_size
+= 4 * ARRAY_SIZE (elf32_arm_plt_entry_short
);
18900 /* We don't yet handle this PLT format. */
18901 return (bfd_vma
) -1;
18906 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
18909 elf32_arm_get_synthetic_symtab (bfd
*abfd
,
18910 long symcount ATTRIBUTE_UNUSED
,
18911 asymbol
**syms ATTRIBUTE_UNUSED
,
18921 Elf_Internal_Shdr
*hdr
;
18929 if ((abfd
->flags
& (DYNAMIC
| EXEC_P
)) == 0)
18932 if (dynsymcount
<= 0)
18935 relplt
= bfd_get_section_by_name (abfd
, ".rel.plt");
18936 if (relplt
== NULL
)
18939 hdr
= &elf_section_data (relplt
)->this_hdr
;
18940 if (hdr
->sh_link
!= elf_dynsymtab (abfd
)
18941 || (hdr
->sh_type
!= SHT_REL
&& hdr
->sh_type
!= SHT_RELA
))
18944 plt
= bfd_get_section_by_name (abfd
, ".plt");
18948 if (!elf32_arm_size_info
.slurp_reloc_table (abfd
, relplt
, dynsyms
, TRUE
))
18951 data
= plt
->contents
;
18954 if (!bfd_get_full_section_contents(abfd
, (asection
*) plt
, &data
) || data
== NULL
)
18956 bfd_cache_section_contents((asection
*) plt
, data
);
18959 count
= relplt
->size
/ hdr
->sh_entsize
;
18960 size
= count
* sizeof (asymbol
);
18961 p
= relplt
->relocation
;
18962 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
18964 size
+= strlen ((*p
->sym_ptr_ptr
)->name
) + sizeof ("@plt");
18965 if (p
->addend
!= 0)
18966 size
+= sizeof ("+0x") - 1 + 8;
18969 s
= *ret
= (asymbol
*) bfd_malloc (size
);
18973 offset
= elf32_arm_plt0_size (abfd
, data
);
18974 if (offset
== (bfd_vma
) -1)
18977 names
= (char *) (s
+ count
);
18978 p
= relplt
->relocation
;
18980 for (i
= 0; i
< count
; i
++, p
+= elf32_arm_size_info
.int_rels_per_ext_rel
)
18984 bfd_vma plt_size
= elf32_arm_plt_size (abfd
, data
, offset
);
18985 if (plt_size
== (bfd_vma
) -1)
18988 *s
= **p
->sym_ptr_ptr
;
18989 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
18990 we are defining a symbol, ensure one of them is set. */
18991 if ((s
->flags
& BSF_LOCAL
) == 0)
18992 s
->flags
|= BSF_GLOBAL
;
18993 s
->flags
|= BSF_SYNTHETIC
;
18998 len
= strlen ((*p
->sym_ptr_ptr
)->name
);
18999 memcpy (names
, (*p
->sym_ptr_ptr
)->name
, len
);
19001 if (p
->addend
!= 0)
19005 memcpy (names
, "+0x", sizeof ("+0x") - 1);
19006 names
+= sizeof ("+0x") - 1;
19007 bfd_sprintf_vma (abfd
, buf
, p
->addend
);
19008 for (a
= buf
; *a
== '0'; ++a
)
19011 memcpy (names
, a
, len
);
19014 memcpy (names
, "@plt", sizeof ("@plt"));
19015 names
+= sizeof ("@plt");
19017 offset
+= plt_size
;
19024 elf32_arm_section_flags (flagword
*flags
, const Elf_Internal_Shdr
* hdr
)
19026 if (hdr
->sh_flags
& SHF_ARM_PURECODE
)
19027 *flags
|= SEC_ELF_PURECODE
;
19032 elf32_arm_lookup_section_flags (char *flag_name
)
19034 if (!strcmp (flag_name
, "SHF_ARM_PURECODE"))
19035 return SHF_ARM_PURECODE
;
19037 return SEC_NO_FLAGS
;
19040 static unsigned int
19041 elf32_arm_count_additional_relocs (asection
*sec
)
19043 struct _arm_elf_section_data
*arm_data
;
19044 arm_data
= get_arm_elf_section_data (sec
);
19046 return arm_data
== NULL
? 0 : arm_data
->additional_reloc_count
;
19049 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19050 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19051 FALSE otherwise. ISECTION is the best guess matching section from the
19052 input bfd IBFD, but it might be NULL. */
19055 elf32_arm_copy_special_section_fields (const bfd
*ibfd ATTRIBUTE_UNUSED
,
19056 bfd
*obfd ATTRIBUTE_UNUSED
,
19057 const Elf_Internal_Shdr
*isection ATTRIBUTE_UNUSED
,
19058 Elf_Internal_Shdr
*osection
)
19060 switch (osection
->sh_type
)
19062 case SHT_ARM_EXIDX
:
19064 Elf_Internal_Shdr
**oheaders
= elf_elfsections (obfd
);
19065 Elf_Internal_Shdr
**iheaders
= elf_elfsections (ibfd
);
19068 osection
->sh_flags
= SHF_ALLOC
| SHF_LINK_ORDER
;
19069 osection
->sh_info
= 0;
19071 /* The sh_link field must be set to the text section associated with
19072 this index section. Unfortunately the ARM EHABI does not specify
19073 exactly how to determine this association. Our caller does try
19074 to match up OSECTION with its corresponding input section however
19075 so that is a good first guess. */
19076 if (isection
!= NULL
19077 && osection
->bfd_section
!= NULL
19078 && isection
->bfd_section
!= NULL
19079 && isection
->bfd_section
->output_section
!= NULL
19080 && isection
->bfd_section
->output_section
== osection
->bfd_section
19081 && iheaders
!= NULL
19082 && isection
->sh_link
> 0
19083 && isection
->sh_link
< elf_numsections (ibfd
)
19084 && iheaders
[isection
->sh_link
]->bfd_section
!= NULL
19085 && iheaders
[isection
->sh_link
]->bfd_section
->output_section
!= NULL
19088 for (i
= elf_numsections (obfd
); i
-- > 0;)
19089 if (oheaders
[i
]->bfd_section
19090 == iheaders
[isection
->sh_link
]->bfd_section
->output_section
)
19096 /* Failing that we have to find a matching section ourselves. If
19097 we had the output section name available we could compare that
19098 with input section names. Unfortunately we don't. So instead
19099 we use a simple heuristic and look for the nearest executable
19100 section before this one. */
19101 for (i
= elf_numsections (obfd
); i
-- > 0;)
19102 if (oheaders
[i
] == osection
)
19108 if (oheaders
[i
]->sh_type
== SHT_PROGBITS
19109 && (oheaders
[i
]->sh_flags
& (SHF_ALLOC
| SHF_EXECINSTR
))
19110 == (SHF_ALLOC
| SHF_EXECINSTR
))
19116 osection
->sh_link
= i
;
19117 /* If the text section was part of a group
19118 then the index section should be too. */
19119 if (oheaders
[i
]->sh_flags
& SHF_GROUP
)
19120 osection
->sh_flags
|= SHF_GROUP
;
19126 case SHT_ARM_PREEMPTMAP
:
19127 osection
->sh_flags
= SHF_ALLOC
;
19130 case SHT_ARM_ATTRIBUTES
:
19131 case SHT_ARM_DEBUGOVERLAY
:
19132 case SHT_ARM_OVERLAYSECTION
:
19140 /* Returns TRUE if NAME is an ARM mapping symbol.
19141 Traditionally the symbols $a, $d and $t have been used.
19142 The ARM ELF standard also defines $x (for A64 code). It also allows a
19143 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19144 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19145 not support them here. $t.x indicates the start of ThumbEE instructions. */
19148 is_arm_mapping_symbol (const char * name
)
19150 return name
!= NULL
/* Paranoia. */
19151 && name
[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19152 the mapping symbols could have acquired a prefix.
19153 We do not support this here, since such symbols no
19154 longer conform to the ARM ELF ABI. */
19155 && (name
[1] == 'a' || name
[1] == 'd' || name
[1] == 't' || name
[1] == 'x')
19156 && (name
[2] == 0 || name
[2] == '.');
19157 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19158 any characters that follow the period are legal characters for the body
19159 of a symbol's name. For now we just assume that this is the case. */
19162 /* Make sure that mapping symbols in object files are not removed via the
19163 "strip --strip-unneeded" tool. These symbols are needed in order to
19164 correctly generate interworking veneers, and for byte swapping code
19165 regions. Once an object file has been linked, it is safe to remove the
19166 symbols as they will no longer be needed. */
19169 elf32_arm_backend_symbol_processing (bfd
*abfd
, asymbol
*sym
)
19171 if (((abfd
->flags
& (EXEC_P
| DYNAMIC
)) == 0)
19172 && sym
->section
!= bfd_abs_section_ptr
19173 && is_arm_mapping_symbol (sym
->name
))
19174 sym
->flags
|= BSF_KEEP
;
19177 #undef elf_backend_copy_special_section_fields
19178 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19180 #define ELF_ARCH bfd_arch_arm
19181 #define ELF_TARGET_ID ARM_ELF_DATA
19182 #define ELF_MACHINE_CODE EM_ARM
19183 #ifdef __QNXTARGET__
19184 #define ELF_MAXPAGESIZE 0x1000
19186 #define ELF_MAXPAGESIZE 0x10000
19188 #define ELF_MINPAGESIZE 0x1000
19189 #define ELF_COMMONPAGESIZE 0x1000
19191 #define bfd_elf32_mkobject elf32_arm_mkobject
19193 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19194 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19195 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19196 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19197 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19198 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19199 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19200 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19201 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19202 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19203 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19204 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19205 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19207 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19208 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19209 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19210 #define elf_backend_check_relocs elf32_arm_check_relocs
19211 #define elf_backend_update_relocs elf32_arm_update_relocs
19212 #define elf_backend_relocate_section elf32_arm_relocate_section
19213 #define elf_backend_write_section elf32_arm_write_section
19214 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19215 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19216 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19217 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19218 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19219 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19220 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19221 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19222 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19223 #define elf_backend_object_p elf32_arm_object_p
19224 #define elf_backend_fake_sections elf32_arm_fake_sections
19225 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19226 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19227 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19228 #define elf_backend_size_info elf32_arm_size_info
19229 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19230 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19231 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19232 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19233 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19234 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19235 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19236 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19238 #define elf_backend_can_refcount 1
19239 #define elf_backend_can_gc_sections 1
19240 #define elf_backend_plt_readonly 1
19241 #define elf_backend_want_got_plt 1
19242 #define elf_backend_want_plt_sym 0
19243 #define elf_backend_want_dynrelro 1
19244 #define elf_backend_may_use_rel_p 1
19245 #define elf_backend_may_use_rela_p 0
19246 #define elf_backend_default_use_rela_p 0
19247 #define elf_backend_dtrel_excludes_plt 1
19249 #define elf_backend_got_header_size 12
19250 #define elf_backend_extern_protected_data 1
19252 #undef elf_backend_obj_attrs_vendor
19253 #define elf_backend_obj_attrs_vendor "aeabi"
19254 #undef elf_backend_obj_attrs_section
19255 #define elf_backend_obj_attrs_section ".ARM.attributes"
19256 #undef elf_backend_obj_attrs_arg_type
19257 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19258 #undef elf_backend_obj_attrs_section_type
19259 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19260 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19261 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19263 #undef elf_backend_section_flags
19264 #define elf_backend_section_flags elf32_arm_section_flags
19265 #undef elf_backend_lookup_section_flags_hook
19266 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19268 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
19270 #include "elf32-target.h"
19272 /* Native Client targets. */
19274 #undef TARGET_LITTLE_SYM
19275 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19276 #undef TARGET_LITTLE_NAME
19277 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19278 #undef TARGET_BIG_SYM
19279 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19280 #undef TARGET_BIG_NAME
19281 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19283 /* Like elf32_arm_link_hash_table_create -- but overrides
19284 appropriately for NaCl. */
19286 static struct bfd_link_hash_table
*
19287 elf32_arm_nacl_link_hash_table_create (bfd
*abfd
)
19289 struct bfd_link_hash_table
*ret
;
19291 ret
= elf32_arm_link_hash_table_create (abfd
);
19294 struct elf32_arm_link_hash_table
*htab
19295 = (struct elf32_arm_link_hash_table
*) ret
;
19299 htab
->plt_header_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry
);
19300 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry
);
19305 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19306 really need to use elf32_arm_modify_segment_map. But we do it
19307 anyway just to reduce gratuitous differences with the stock ARM backend. */
19310 elf32_arm_nacl_modify_segment_map (bfd
*abfd
, struct bfd_link_info
*info
)
19312 return (elf32_arm_modify_segment_map (abfd
, info
)
19313 && nacl_modify_segment_map (abfd
, info
));
19317 elf32_arm_nacl_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
19319 elf32_arm_final_write_processing (abfd
, linker
);
19320 nacl_final_write_processing (abfd
, linker
);
19324 elf32_arm_nacl_plt_sym_val (bfd_vma i
, const asection
*plt
,
19325 const arelent
*rel ATTRIBUTE_UNUSED
)
19328 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry
) +
19329 i
* ARRAY_SIZE (elf32_arm_nacl_plt_entry
));
19333 #define elf32_bed elf32_arm_nacl_bed
19334 #undef bfd_elf32_bfd_link_hash_table_create
19335 #define bfd_elf32_bfd_link_hash_table_create \
19336 elf32_arm_nacl_link_hash_table_create
19337 #undef elf_backend_plt_alignment
19338 #define elf_backend_plt_alignment 4
19339 #undef elf_backend_modify_segment_map
19340 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19341 #undef elf_backend_modify_program_headers
19342 #define elf_backend_modify_program_headers nacl_modify_program_headers
19343 #undef elf_backend_final_write_processing
19344 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19345 #undef bfd_elf32_get_synthetic_symtab
19346 #undef elf_backend_plt_sym_val
19347 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19348 #undef elf_backend_copy_special_section_fields
19350 #undef ELF_MINPAGESIZE
19351 #undef ELF_COMMONPAGESIZE
19354 #include "elf32-target.h"
19356 /* Reset to defaults. */
19357 #undef elf_backend_plt_alignment
19358 #undef elf_backend_modify_segment_map
19359 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19360 #undef elf_backend_modify_program_headers
19361 #undef elf_backend_final_write_processing
19362 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19363 #undef ELF_MINPAGESIZE
19364 #define ELF_MINPAGESIZE 0x1000
19365 #undef ELF_COMMONPAGESIZE
19366 #define ELF_COMMONPAGESIZE 0x1000
19369 /* VxWorks Targets. */
19371 #undef TARGET_LITTLE_SYM
19372 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19373 #undef TARGET_LITTLE_NAME
19374 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19375 #undef TARGET_BIG_SYM
19376 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19377 #undef TARGET_BIG_NAME
19378 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19380 /* Like elf32_arm_link_hash_table_create -- but overrides
19381 appropriately for VxWorks. */
19383 static struct bfd_link_hash_table
*
19384 elf32_arm_vxworks_link_hash_table_create (bfd
*abfd
)
19386 struct bfd_link_hash_table
*ret
;
19388 ret
= elf32_arm_link_hash_table_create (abfd
);
19391 struct elf32_arm_link_hash_table
*htab
19392 = (struct elf32_arm_link_hash_table
*) ret
;
19394 htab
->vxworks_p
= 1;
19400 elf32_arm_vxworks_final_write_processing (bfd
*abfd
, bfd_boolean linker
)
19402 elf32_arm_final_write_processing (abfd
, linker
);
19403 elf_vxworks_final_write_processing (abfd
, linker
);
19407 #define elf32_bed elf32_arm_vxworks_bed
19409 #undef bfd_elf32_bfd_link_hash_table_create
19410 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19411 #undef elf_backend_final_write_processing
19412 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19413 #undef elf_backend_emit_relocs
19414 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19416 #undef elf_backend_may_use_rel_p
19417 #define elf_backend_may_use_rel_p 0
19418 #undef elf_backend_may_use_rela_p
19419 #define elf_backend_may_use_rela_p 1
19420 #undef elf_backend_default_use_rela_p
19421 #define elf_backend_default_use_rela_p 1
19422 #undef elf_backend_want_plt_sym
19423 #define elf_backend_want_plt_sym 1
19424 #undef ELF_MAXPAGESIZE
19425 #define ELF_MAXPAGESIZE 0x1000
19427 #include "elf32-target.h"
19430 /* Merge backend specific data from an object file to the output
19431 object file when linking. */
19434 elf32_arm_merge_private_bfd_data (bfd
*ibfd
, struct bfd_link_info
*info
)
19436 bfd
*obfd
= info
->output_bfd
;
19437 flagword out_flags
;
19439 bfd_boolean flags_compatible
= TRUE
;
19442 /* Check if we have the same endianness. */
19443 if (! _bfd_generic_verify_endian_match (ibfd
, info
))
19446 if (! is_arm_elf (ibfd
) || ! is_arm_elf (obfd
))
19449 if (!elf32_arm_merge_eabi_attributes (ibfd
, info
))
19452 /* The input BFD must have had its flags initialised. */
19453 /* The following seems bogus to me -- The flags are initialized in
19454 the assembler but I don't think an elf_flags_init field is
19455 written into the object. */
19456 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19458 in_flags
= elf_elfheader (ibfd
)->e_flags
;
19459 out_flags
= elf_elfheader (obfd
)->e_flags
;
19461 /* In theory there is no reason why we couldn't handle this. However
19462 in practice it isn't even close to working and there is no real
19463 reason to want it. */
19464 if (EF_ARM_EABI_VERSION (in_flags
) >= EF_ARM_EABI_VER4
19465 && !(ibfd
->flags
& DYNAMIC
)
19466 && (in_flags
& EF_ARM_BE8
))
19468 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19473 if (!elf_flags_init (obfd
))
19475 /* If the input is the default architecture and had the default
19476 flags then do not bother setting the flags for the output
19477 architecture, instead allow future merges to do this. If no
19478 future merges ever set these flags then they will retain their
19479 uninitialised values, which surprise surprise, correspond
19480 to the default values. */
19481 if (bfd_get_arch_info (ibfd
)->the_default
19482 && elf_elfheader (ibfd
)->e_flags
== 0)
19485 elf_flags_init (obfd
) = TRUE
;
19486 elf_elfheader (obfd
)->e_flags
= in_flags
;
19488 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
19489 && bfd_get_arch_info (obfd
)->the_default
)
19490 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
19495 /* Determine what should happen if the input ARM architecture
19496 does not match the output ARM architecture. */
19497 if (! bfd_arm_merge_machines (ibfd
, obfd
))
19500 /* Identical flags must be compatible. */
19501 if (in_flags
== out_flags
)
19504 /* Check to see if the input BFD actually contains any sections. If
19505 not, its flags may not have been initialised either, but it
19506 cannot actually cause any incompatiblity. Do not short-circuit
19507 dynamic objects; their section list may be emptied by
19508 elf_link_add_object_symbols.
19510 Also check to see if there are no code sections in the input.
19511 In this case there is no need to check for code specific flags.
19512 XXX - do we need to worry about floating-point format compatability
19513 in data sections ? */
19514 if (!(ibfd
->flags
& DYNAMIC
))
19516 bfd_boolean null_input_bfd
= TRUE
;
19517 bfd_boolean only_data_sections
= TRUE
;
19519 for (sec
= ibfd
->sections
; sec
!= NULL
; sec
= sec
->next
)
19521 /* Ignore synthetic glue sections. */
19522 if (strcmp (sec
->name
, ".glue_7")
19523 && strcmp (sec
->name
, ".glue_7t"))
19525 if ((bfd_get_section_flags (ibfd
, sec
)
19526 & (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
19527 == (SEC_LOAD
| SEC_CODE
| SEC_HAS_CONTENTS
))
19528 only_data_sections
= FALSE
;
19530 null_input_bfd
= FALSE
;
19535 if (null_input_bfd
|| only_data_sections
)
19539 /* Complain about various flag mismatches. */
19540 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags
),
19541 EF_ARM_EABI_VERSION (out_flags
)))
19544 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19545 ibfd
, (in_flags
& EF_ARM_EABIMASK
) >> 24,
19546 obfd
, (out_flags
& EF_ARM_EABIMASK
) >> 24);
19550 /* Not sure what needs to be checked for EABI versions >= 1. */
19551 /* VxWorks libraries do not use these flags. */
19552 if (get_elf_backend_data (obfd
) != &elf32_arm_vxworks_bed
19553 && get_elf_backend_data (ibfd
) != &elf32_arm_vxworks_bed
19554 && EF_ARM_EABI_VERSION (in_flags
) == EF_ARM_EABI_UNKNOWN
)
19556 if ((in_flags
& EF_ARM_APCS_26
) != (out_flags
& EF_ARM_APCS_26
))
19559 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19560 ibfd
, in_flags
& EF_ARM_APCS_26
? 26 : 32,
19561 obfd
, out_flags
& EF_ARM_APCS_26
? 26 : 32);
19562 flags_compatible
= FALSE
;
19565 if ((in_flags
& EF_ARM_APCS_FLOAT
) != (out_flags
& EF_ARM_APCS_FLOAT
))
19567 if (in_flags
& EF_ARM_APCS_FLOAT
)
19569 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19573 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19576 flags_compatible
= FALSE
;
19579 if ((in_flags
& EF_ARM_VFP_FLOAT
) != (out_flags
& EF_ARM_VFP_FLOAT
))
19581 if (in_flags
& EF_ARM_VFP_FLOAT
)
19583 (_("error: %B uses VFP instructions, whereas %B does not"),
19587 (_("error: %B uses FPA instructions, whereas %B does not"),
19590 flags_compatible
= FALSE
;
19593 if ((in_flags
& EF_ARM_MAVERICK_FLOAT
) != (out_flags
& EF_ARM_MAVERICK_FLOAT
))
19595 if (in_flags
& EF_ARM_MAVERICK_FLOAT
)
19597 (_("error: %B uses Maverick instructions, whereas %B does not"),
19601 (_("error: %B does not use Maverick instructions, whereas %B does"),
19604 flags_compatible
= FALSE
;
19607 #ifdef EF_ARM_SOFT_FLOAT
19608 if ((in_flags
& EF_ARM_SOFT_FLOAT
) != (out_flags
& EF_ARM_SOFT_FLOAT
))
19610 /* We can allow interworking between code that is VFP format
19611 layout, and uses either soft float or integer regs for
19612 passing floating point arguments and results. We already
19613 know that the APCS_FLOAT flags match; similarly for VFP
19615 if ((in_flags
& EF_ARM_APCS_FLOAT
) != 0
19616 || (in_flags
& EF_ARM_VFP_FLOAT
) == 0)
19618 if (in_flags
& EF_ARM_SOFT_FLOAT
)
19620 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19624 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19627 flags_compatible
= FALSE
;
19632 /* Interworking mismatch is only a warning. */
19633 if ((in_flags
& EF_ARM_INTERWORK
) != (out_flags
& EF_ARM_INTERWORK
))
19635 if (in_flags
& EF_ARM_INTERWORK
)
19638 (_("Warning: %B supports interworking, whereas %B does not"),
19644 (_("Warning: %B does not support interworking, whereas %B does"),
19650 return flags_compatible
;
19654 /* Symbian OS Targets. */
19656 #undef TARGET_LITTLE_SYM
19657 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19658 #undef TARGET_LITTLE_NAME
19659 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19660 #undef TARGET_BIG_SYM
19661 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19662 #undef TARGET_BIG_NAME
19663 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19665 /* Like elf32_arm_link_hash_table_create -- but overrides
19666 appropriately for Symbian OS. */
19668 static struct bfd_link_hash_table
*
19669 elf32_arm_symbian_link_hash_table_create (bfd
*abfd
)
19671 struct bfd_link_hash_table
*ret
;
19673 ret
= elf32_arm_link_hash_table_create (abfd
);
19676 struct elf32_arm_link_hash_table
*htab
19677 = (struct elf32_arm_link_hash_table
*)ret
;
19678 /* There is no PLT header for Symbian OS. */
19679 htab
->plt_header_size
= 0;
19680 /* The PLT entries are each one instruction and one word. */
19681 htab
->plt_entry_size
= 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
);
19682 htab
->symbian_p
= 1;
19683 /* Symbian uses armv5t or above, so use_blx is always true. */
19685 htab
->root
.is_relocatable_executable
= 1;
19690 static const struct bfd_elf_special_section
19691 elf32_arm_symbian_special_sections
[] =
19693 /* In a BPABI executable, the dynamic linking sections do not go in
19694 the loadable read-only segment. The post-linker may wish to
19695 refer to these sections, but they are not part of the final
19697 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC
, 0 },
19698 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB
, 0 },
19699 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM
, 0 },
19700 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS
, 0 },
19701 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH
, 0 },
19702 /* These sections do not need to be writable as the SymbianOS
19703 postlinker will arrange things so that no dynamic relocation is
19705 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY
, SHF_ALLOC
},
19706 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY
, SHF_ALLOC
},
19707 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY
, SHF_ALLOC
},
19708 { NULL
, 0, 0, 0, 0 }
19712 elf32_arm_symbian_begin_write_processing (bfd
*abfd
,
19713 struct bfd_link_info
*link_info
)
19715 /* BPABI objects are never loaded directly by an OS kernel; they are
19716 processed by a postlinker first, into an OS-specific format. If
19717 the D_PAGED bit is set on the file, BFD will align segments on
19718 page boundaries, so that an OS can directly map the file. With
19719 BPABI objects, that just results in wasted space. In addition,
19720 because we clear the D_PAGED bit, map_sections_to_segments will
19721 recognize that the program headers should not be mapped into any
19722 loadable segment. */
19723 abfd
->flags
&= ~D_PAGED
;
19724 elf32_arm_begin_write_processing (abfd
, link_info
);
19728 elf32_arm_symbian_modify_segment_map (bfd
*abfd
,
19729 struct bfd_link_info
*info
)
19731 struct elf_segment_map
*m
;
19734 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19735 segment. However, because the .dynamic section is not marked
19736 with SEC_LOAD, the generic ELF code will not create such a
19738 dynsec
= bfd_get_section_by_name (abfd
, ".dynamic");
19741 for (m
= elf_seg_map (abfd
); m
!= NULL
; m
= m
->next
)
19742 if (m
->p_type
== PT_DYNAMIC
)
19747 m
= _bfd_elf_make_dynamic_segment (abfd
, dynsec
);
19748 m
->next
= elf_seg_map (abfd
);
19749 elf_seg_map (abfd
) = m
;
19753 /* Also call the generic arm routine. */
19754 return elf32_arm_modify_segment_map (abfd
, info
);
19757 /* Return address for Ith PLT stub in section PLT, for relocation REL
19758 or (bfd_vma) -1 if it should not be included. */
19761 elf32_arm_symbian_plt_sym_val (bfd_vma i
, const asection
*plt
,
19762 const arelent
*rel ATTRIBUTE_UNUSED
)
19764 return plt
->vma
+ 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry
) * i
;
19768 #define elf32_bed elf32_arm_symbian_bed
19770 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19771 will process them and then discard them. */
19772 #undef ELF_DYNAMIC_SEC_FLAGS
19773 #define ELF_DYNAMIC_SEC_FLAGS \
19774 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19776 #undef elf_backend_emit_relocs
19778 #undef bfd_elf32_bfd_link_hash_table_create
19779 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19780 #undef elf_backend_special_sections
19781 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19782 #undef elf_backend_begin_write_processing
19783 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19784 #undef elf_backend_final_write_processing
19785 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19787 #undef elf_backend_modify_segment_map
19788 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19790 /* There is no .got section for BPABI objects, and hence no header. */
19791 #undef elf_backend_got_header_size
19792 #define elf_backend_got_header_size 0
19794 /* Similarly, there is no .got.plt section. */
19795 #undef elf_backend_want_got_plt
19796 #define elf_backend_want_got_plt 0
19798 #undef elf_backend_plt_sym_val
19799 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19801 #undef elf_backend_may_use_rel_p
19802 #define elf_backend_may_use_rel_p 1
19803 #undef elf_backend_may_use_rela_p
19804 #define elf_backend_may_use_rela_p 0
19805 #undef elf_backend_default_use_rela_p
19806 #define elf_backend_default_use_rela_p 0
19807 #undef elf_backend_want_plt_sym
19808 #define elf_backend_want_plt_sym 0
19809 #undef elf_backend_dtrel_excludes_plt
19810 #define elf_backend_dtrel_excludes_plt 0
19811 #undef ELF_MAXPAGESIZE
19812 #define ELF_MAXPAGESIZE 0x8000
19814 #include "elf32-target.h"