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[ARM/STM32L4XX] PR 20030: --fix-stm32l4xx-629360 fails to create vldm/vpop veneers...
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1764 };
1765
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1768 {
1769 HOWTO (R_ARM_RREL32, /* type */
1770 0, /* rightshift */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1772 0, /* bitsize */
1773 FALSE, /* pc_relative */
1774 0, /* bitpos */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1779 0, /* src_mask */
1780 0, /* dst_mask */
1781 FALSE), /* pcrel_offset */
1782
1783 HOWTO (R_ARM_RABS32, /* type */
1784 0, /* rightshift */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1786 0, /* bitsize */
1787 FALSE, /* pc_relative */
1788 0, /* bitpos */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1793 0, /* src_mask */
1794 0, /* dst_mask */
1795 FALSE), /* pcrel_offset */
1796
1797 HOWTO (R_ARM_RPC24, /* type */
1798 0, /* rightshift */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1800 0, /* bitsize */
1801 FALSE, /* pc_relative */
1802 0, /* bitpos */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1807 0, /* src_mask */
1808 0, /* dst_mask */
1809 FALSE), /* pcrel_offset */
1810
1811 HOWTO (R_ARM_RBASE, /* type */
1812 0, /* rightshift */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1814 0, /* bitsize */
1815 FALSE, /* pc_relative */
1816 0, /* bitpos */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1821 0, /* src_mask */
1822 0, /* dst_mask */
1823 FALSE) /* pcrel_offset */
1824 };
1825
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1828 {
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1831
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1834
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1838
1839 return NULL;
1840 }
1841
1842 static void
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1845 {
1846 unsigned int r_type;
1847
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1850 }
1851
1852 struct elf32_arm_reloc_map
1853 {
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1856 };
1857
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1860 {
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1951 };
1952
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1956 {
1957 unsigned int i;
1958
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1962
1963 return NULL;
1964 }
1965
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1968 const char *r_name)
1969 {
1970 unsigned int i;
1971
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1976
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1981
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1986
1987 return NULL;
1988 }
1989
1990 /* Support for core dump NOTE sections. */
1991
1992 static bfd_boolean
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1994 {
1995 int offset;
1996 size_t size;
1997
1998 switch (note->descsz)
1999 {
2000 default:
2001 return FALSE;
2002
2003 case 148: /* Linux/ARM 32-bit. */
2004 /* pr_cursig */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2006
2007 /* pr_pid */
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2009
2010 /* pr_reg */
2011 offset = 72;
2012 size = 72;
2013
2014 break;
2015 }
2016
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2020 }
2021
2022 static bfd_boolean
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2024 {
2025 switch (note->descsz)
2026 {
2027 default:
2028 return FALSE;
2029
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2037 }
2038
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2042 {
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2045
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2048 }
2049
2050 return TRUE;
2051 }
2052
2053 static char *
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2055 int note_type, ...)
2056 {
2057 switch (note_type)
2058 {
2059 default:
2060 return NULL;
2061
2062 case NT_PRPSINFO:
2063 {
2064 char data[124];
2065 va_list ap;
2066
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2071 va_end (ap);
2072
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2075 }
2076
2077 case NT_PRSTATUS:
2078 {
2079 char data[148];
2080 va_list ap;
2081 long pid;
2082 int cursig;
2083 const void *greg;
2084
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2093 va_end (ap);
2094
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2097 }
2098 }
2099 }
2100
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2105
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2109
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2112
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2114 interworkable. */
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2119
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2126
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2129
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2132
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2135
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2138
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2140
2141 /* The name of the dynamic interpreter. This is put in the .interp
2142 section. */
2143 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2144
2145 static const unsigned long tls_trampoline [] =
2146 {
2147 0xe08e0000, /* add r0, lr, r0 */
2148 0xe5901004, /* ldr r1, [r0,#4] */
2149 0xe12fff11, /* bx r1 */
2150 };
2151
2152 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2153 {
2154 0xe52d2004, /* push {r2} */
2155 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2156 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2157 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2158 0xe081100f, /* 2: add r1, pc */
2159 0xe12fff12, /* bx r2 */
2160 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2161 + dl_tlsdesc_lazy_resolver(GOT) */
2162 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2163 };
2164
2165 #ifdef FOUR_WORD_PLT
2166
2167 /* The first entry in a procedure linkage table looks like
2168 this. It is set up so that any shared library function that is
2169 called before the relocation has been set up calls the dynamic
2170 linker first. */
2171 static const bfd_vma elf32_arm_plt0_entry [] =
2172 {
2173 0xe52de004, /* str lr, [sp, #-4]! */
2174 0xe59fe010, /* ldr lr, [pc, #16] */
2175 0xe08fe00e, /* add lr, pc, lr */
2176 0xe5bef008, /* ldr pc, [lr, #8]! */
2177 };
2178
2179 /* Subsequent entries in a procedure linkage table look like
2180 this. */
2181 static const bfd_vma elf32_arm_plt_entry [] =
2182 {
2183 0xe28fc600, /* add ip, pc, #NN */
2184 0xe28cca00, /* add ip, ip, #NN */
2185 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2186 0x00000000, /* unused */
2187 };
2188
2189 #else /* not FOUR_WORD_PLT */
2190
2191 /* The first entry in a procedure linkage table looks like
2192 this. It is set up so that any shared library function that is
2193 called before the relocation has been set up calls the dynamic
2194 linker first. */
2195 static const bfd_vma elf32_arm_plt0_entry [] =
2196 {
2197 0xe52de004, /* str lr, [sp, #-4]! */
2198 0xe59fe004, /* ldr lr, [pc, #4] */
2199 0xe08fe00e, /* add lr, pc, lr */
2200 0xe5bef008, /* ldr pc, [lr, #8]! */
2201 0x00000000, /* &GOT[0] - . */
2202 };
2203
2204 /* By default subsequent entries in a procedure linkage table look like
2205 this. Offsets that don't fit into 28 bits will cause link error. */
2206 static const bfd_vma elf32_arm_plt_entry_short [] =
2207 {
2208 0xe28fc600, /* add ip, pc, #0xNN00000 */
2209 0xe28cca00, /* add ip, ip, #0xNN000 */
2210 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2211 };
2212
2213 /* When explicitly asked, we'll use this "long" entry format
2214 which can cope with arbitrary displacements. */
2215 static const bfd_vma elf32_arm_plt_entry_long [] =
2216 {
2217 0xe28fc200, /* add ip, pc, #0xN0000000 */
2218 0xe28cc600, /* add ip, ip, #0xNN00000 */
2219 0xe28cca00, /* add ip, ip, #0xNN000 */
2220 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2221 };
2222
2223 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2224
2225 #endif /* not FOUR_WORD_PLT */
2226
2227 /* The first entry in a procedure linkage table looks like this.
2228 It is set up so that any shared library function that is called before the
2229 relocation has been set up calls the dynamic linker first. */
2230 static const bfd_vma elf32_thumb2_plt0_entry [] =
2231 {
2232 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2233 an instruction maybe encoded to one or two array elements. */
2234 0xf8dfb500, /* push {lr} */
2235 0x44fee008, /* ldr.w lr, [pc, #8] */
2236 /* add lr, pc */
2237 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2238 0x00000000, /* &GOT[0] - . */
2239 };
2240
2241 /* Subsequent entries in a procedure linkage table for thumb only target
2242 look like this. */
2243 static const bfd_vma elf32_thumb2_plt_entry [] =
2244 {
2245 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2246 an instruction maybe encoded to one or two array elements. */
2247 0x0c00f240, /* movw ip, #0xNNNN */
2248 0x0c00f2c0, /* movt ip, #0xNNNN */
2249 0xf8dc44fc, /* add ip, pc */
2250 0xbf00f000 /* ldr.w pc, [ip] */
2251 /* nop */
2252 };
2253
2254 /* The format of the first entry in the procedure linkage table
2255 for a VxWorks executable. */
2256 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2257 {
2258 0xe52dc008, /* str ip,[sp,#-8]! */
2259 0xe59fc000, /* ldr ip,[pc] */
2260 0xe59cf008, /* ldr pc,[ip,#8] */
2261 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2262 };
2263
2264 /* The format of subsequent entries in a VxWorks executable. */
2265 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2266 {
2267 0xe59fc000, /* ldr ip,[pc] */
2268 0xe59cf000, /* ldr pc,[ip] */
2269 0x00000000, /* .long @got */
2270 0xe59fc000, /* ldr ip,[pc] */
2271 0xea000000, /* b _PLT */
2272 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2273 };
2274
2275 /* The format of entries in a VxWorks shared library. */
2276 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2277 {
2278 0xe59fc000, /* ldr ip,[pc] */
2279 0xe79cf009, /* ldr pc,[ip,r9] */
2280 0x00000000, /* .long @got */
2281 0xe59fc000, /* ldr ip,[pc] */
2282 0xe599f008, /* ldr pc,[r9,#8] */
2283 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2284 };
2285
2286 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2287 #define PLT_THUMB_STUB_SIZE 4
2288 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2289 {
2290 0x4778, /* bx pc */
2291 0x46c0 /* nop */
2292 };
2293
2294 /* The entries in a PLT when using a DLL-based target with multiple
2295 address spaces. */
2296 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2297 {
2298 0xe51ff004, /* ldr pc, [pc, #-4] */
2299 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2300 };
2301
2302 /* The first entry in a procedure linkage table looks like
2303 this. It is set up so that any shared library function that is
2304 called before the relocation has been set up calls the dynamic
2305 linker first. */
2306 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2307 {
2308 /* First bundle: */
2309 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2310 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2311 0xe08cc00f, /* add ip, ip, pc */
2312 0xe52dc008, /* str ip, [sp, #-8]! */
2313 /* Second bundle: */
2314 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2315 0xe59cc000, /* ldr ip, [ip] */
2316 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2317 0xe12fff1c, /* bx ip */
2318 /* Third bundle: */
2319 0xe320f000, /* nop */
2320 0xe320f000, /* nop */
2321 0xe320f000, /* nop */
2322 /* .Lplt_tail: */
2323 0xe50dc004, /* str ip, [sp, #-4] */
2324 /* Fourth bundle: */
2325 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2326 0xe59cc000, /* ldr ip, [ip] */
2327 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2328 0xe12fff1c, /* bx ip */
2329 };
2330 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2331
2332 /* Subsequent entries in a procedure linkage table look like this. */
2333 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2334 {
2335 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2336 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2337 0xe08cc00f, /* add ip, ip, pc */
2338 0xea000000, /* b .Lplt_tail */
2339 };
2340
2341 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2342 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2343 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2344 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2345 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2346 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2347 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2348 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2349
2350 enum stub_insn_type
2351 {
2352 THUMB16_TYPE = 1,
2353 THUMB32_TYPE,
2354 ARM_TYPE,
2355 DATA_TYPE
2356 };
2357
2358 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2359 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2360 is inserted in arm_build_one_stub(). */
2361 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2362 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2363 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2364 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2365 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2366 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2367
2368 typedef struct
2369 {
2370 bfd_vma data;
2371 enum stub_insn_type type;
2372 unsigned int r_type;
2373 int reloc_addend;
2374 } insn_sequence;
2375
2376 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2377 to reach the stub if necessary. */
2378 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2379 {
2380 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2381 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2382 };
2383
2384 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2385 available. */
2386 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2387 {
2388 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2389 ARM_INSN (0xe12fff1c), /* bx ip */
2390 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2391 };
2392
2393 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2394 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2395 {
2396 THUMB16_INSN (0xb401), /* push {r0} */
2397 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2398 THUMB16_INSN (0x4684), /* mov ip, r0 */
2399 THUMB16_INSN (0xbc01), /* pop {r0} */
2400 THUMB16_INSN (0x4760), /* bx ip */
2401 THUMB16_INSN (0xbf00), /* nop */
2402 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2403 };
2404
2405 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2406 allowed. */
2407 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2408 {
2409 THUMB16_INSN (0x4778), /* bx pc */
2410 THUMB16_INSN (0x46c0), /* nop */
2411 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2412 ARM_INSN (0xe12fff1c), /* bx ip */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2414 };
2415
2416 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2417 available. */
2418 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2419 {
2420 THUMB16_INSN (0x4778), /* bx pc */
2421 THUMB16_INSN (0x46c0), /* nop */
2422 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2423 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2424 };
2425
2426 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2427 one, when the destination is close enough. */
2428 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2429 {
2430 THUMB16_INSN (0x4778), /* bx pc */
2431 THUMB16_INSN (0x46c0), /* nop */
2432 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2433 };
2434
2435 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2436 blx to reach the stub if necessary. */
2437 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2438 {
2439 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2440 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2441 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2442 };
2443
2444 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2445 blx to reach the stub if necessary. We can not add into pc;
2446 it is not guaranteed to mode switch (different in ARMv6 and
2447 ARMv7). */
2448 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2449 {
2450 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2451 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2452 ARM_INSN (0xe12fff1c), /* bx ip */
2453 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2454 };
2455
2456 /* V4T ARM -> ARM long branch stub, PIC. */
2457 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2458 {
2459 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2460 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2461 ARM_INSN (0xe12fff1c), /* bx ip */
2462 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2463 };
2464
2465 /* V4T Thumb -> ARM long branch stub, PIC. */
2466 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2467 {
2468 THUMB16_INSN (0x4778), /* bx pc */
2469 THUMB16_INSN (0x46c0), /* nop */
2470 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2471 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2472 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2473 };
2474
2475 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2476 architectures. */
2477 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2478 {
2479 THUMB16_INSN (0xb401), /* push {r0} */
2480 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2481 THUMB16_INSN (0x46fc), /* mov ip, pc */
2482 THUMB16_INSN (0x4484), /* add ip, r0 */
2483 THUMB16_INSN (0xbc01), /* pop {r0} */
2484 THUMB16_INSN (0x4760), /* bx ip */
2485 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2486 };
2487
2488 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2489 allowed. */
2490 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2491 {
2492 THUMB16_INSN (0x4778), /* bx pc */
2493 THUMB16_INSN (0x46c0), /* nop */
2494 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2495 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2496 ARM_INSN (0xe12fff1c), /* bx ip */
2497 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2498 };
2499
2500 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2501 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2502 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2503 {
2504 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2505 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2506 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2507 };
2508
2509 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2510 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2511 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2512 {
2513 THUMB16_INSN (0x4778), /* bx pc */
2514 THUMB16_INSN (0x46c0), /* nop */
2515 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2516 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2517 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2518 };
2519
2520 /* NaCl ARM -> ARM long branch stub. */
2521 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2522 {
2523 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2524 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2525 ARM_INSN (0xe12fff1c), /* bx ip */
2526 ARM_INSN (0xe320f000), /* nop */
2527 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2528 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2529 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2530 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2531 };
2532
2533 /* NaCl ARM -> ARM long branch stub, PIC. */
2534 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2535 {
2536 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2537 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2538 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2539 ARM_INSN (0xe12fff1c), /* bx ip */
2540 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2541 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2542 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2543 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2544 };
2545
2546
2547 /* Cortex-A8 erratum-workaround stubs. */
2548
2549 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2550 can't use a conditional branch to reach this stub). */
2551
2552 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2553 {
2554 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2555 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2556 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2557 };
2558
2559 /* Stub used for b.w and bl.w instructions. */
2560
2561 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2562 {
2563 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2564 };
2565
2566 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2567 {
2568 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2569 };
2570
2571 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2572 instruction (which switches to ARM mode) to point to this stub. Jump to the
2573 real destination using an ARM-mode branch. */
2574
2575 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2576 {
2577 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2578 };
2579
2580 /* For each section group there can be a specially created linker section
2581 to hold the stubs for that group. The name of the stub section is based
2582 upon the name of another section within that group with the suffix below
2583 applied.
2584
2585 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2586 create what appeared to be a linker stub section when it actually
2587 contained user code/data. For example, consider this fragment:
2588
2589 const char * stubborn_problems[] = { "np" };
2590
2591 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2592 section called:
2593
2594 .data.rel.local.stubborn_problems
2595
2596 This then causes problems in arm32_arm_build_stubs() as it triggers:
2597
2598 // Ignore non-stub sections.
2599 if (!strstr (stub_sec->name, STUB_SUFFIX))
2600 continue;
2601
2602 And so the section would be ignored instead of being processed. Hence
2603 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2604 C identifier. */
2605 #define STUB_SUFFIX ".__stub"
2606
2607 /* One entry per long/short branch stub defined above. */
2608 #define DEF_STUBS \
2609 DEF_STUB(long_branch_any_any) \
2610 DEF_STUB(long_branch_v4t_arm_thumb) \
2611 DEF_STUB(long_branch_thumb_only) \
2612 DEF_STUB(long_branch_v4t_thumb_thumb) \
2613 DEF_STUB(long_branch_v4t_thumb_arm) \
2614 DEF_STUB(short_branch_v4t_thumb_arm) \
2615 DEF_STUB(long_branch_any_arm_pic) \
2616 DEF_STUB(long_branch_any_thumb_pic) \
2617 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2618 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2619 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2620 DEF_STUB(long_branch_thumb_only_pic) \
2621 DEF_STUB(long_branch_any_tls_pic) \
2622 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2623 DEF_STUB(long_branch_arm_nacl) \
2624 DEF_STUB(long_branch_arm_nacl_pic) \
2625 DEF_STUB(a8_veneer_b_cond) \
2626 DEF_STUB(a8_veneer_b) \
2627 DEF_STUB(a8_veneer_bl) \
2628 DEF_STUB(a8_veneer_blx)
2629
2630 #define DEF_STUB(x) arm_stub_##x,
2631 enum elf32_arm_stub_type
2632 {
2633 arm_stub_none,
2634 DEF_STUBS
2635 /* Note the first a8_veneer type. */
2636 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2637 };
2638 #undef DEF_STUB
2639
2640 typedef struct
2641 {
2642 const insn_sequence* template_sequence;
2643 int template_size;
2644 } stub_def;
2645
2646 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2647 static const stub_def stub_definitions[] =
2648 {
2649 {NULL, 0},
2650 DEF_STUBS
2651 };
2652
2653 struct elf32_arm_stub_hash_entry
2654 {
2655 /* Base hash table entry structure. */
2656 struct bfd_hash_entry root;
2657
2658 /* The stub section. */
2659 asection *stub_sec;
2660
2661 /* Offset within stub_sec of the beginning of this stub. */
2662 bfd_vma stub_offset;
2663
2664 /* Given the symbol's value and its section we can determine its final
2665 value when building the stubs (so the stub knows where to jump). */
2666 bfd_vma target_value;
2667 asection *target_section;
2668
2669 /* Offset to apply to relocation referencing target_value. */
2670 bfd_vma target_addend;
2671
2672 /* The instruction which caused this stub to be generated (only valid for
2673 Cortex-A8 erratum workaround stubs at present). */
2674 unsigned long orig_insn;
2675
2676 /* The stub type. */
2677 enum elf32_arm_stub_type stub_type;
2678 /* Its encoding size in bytes. */
2679 int stub_size;
2680 /* Its template. */
2681 const insn_sequence *stub_template;
2682 /* The size of the template (number of entries). */
2683 int stub_template_size;
2684
2685 /* The symbol table entry, if any, that this was derived from. */
2686 struct elf32_arm_link_hash_entry *h;
2687
2688 /* Type of branch. */
2689 enum arm_st_branch_type branch_type;
2690
2691 /* Where this stub is being called from, or, in the case of combined
2692 stub sections, the first input section in the group. */
2693 asection *id_sec;
2694
2695 /* The name for the local symbol at the start of this stub. The
2696 stub name in the hash table has to be unique; this does not, so
2697 it can be friendlier. */
2698 char *output_name;
2699 };
2700
2701 /* Used to build a map of a section. This is required for mixed-endian
2702 code/data. */
2703
2704 typedef struct elf32_elf_section_map
2705 {
2706 bfd_vma vma;
2707 char type;
2708 }
2709 elf32_arm_section_map;
2710
2711 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2712
2713 typedef enum
2714 {
2715 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2716 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2717 VFP11_ERRATUM_ARM_VENEER,
2718 VFP11_ERRATUM_THUMB_VENEER
2719 }
2720 elf32_vfp11_erratum_type;
2721
2722 typedef struct elf32_vfp11_erratum_list
2723 {
2724 struct elf32_vfp11_erratum_list *next;
2725 bfd_vma vma;
2726 union
2727 {
2728 struct
2729 {
2730 struct elf32_vfp11_erratum_list *veneer;
2731 unsigned int vfp_insn;
2732 } b;
2733 struct
2734 {
2735 struct elf32_vfp11_erratum_list *branch;
2736 unsigned int id;
2737 } v;
2738 } u;
2739 elf32_vfp11_erratum_type type;
2740 }
2741 elf32_vfp11_erratum_list;
2742
2743 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2744 veneer. */
2745 typedef enum
2746 {
2747 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2748 STM32L4XX_ERRATUM_VENEER
2749 }
2750 elf32_stm32l4xx_erratum_type;
2751
2752 typedef struct elf32_stm32l4xx_erratum_list
2753 {
2754 struct elf32_stm32l4xx_erratum_list *next;
2755 bfd_vma vma;
2756 union
2757 {
2758 struct
2759 {
2760 struct elf32_stm32l4xx_erratum_list *veneer;
2761 unsigned int insn;
2762 } b;
2763 struct
2764 {
2765 struct elf32_stm32l4xx_erratum_list *branch;
2766 unsigned int id;
2767 } v;
2768 } u;
2769 elf32_stm32l4xx_erratum_type type;
2770 }
2771 elf32_stm32l4xx_erratum_list;
2772
2773 typedef enum
2774 {
2775 DELETE_EXIDX_ENTRY,
2776 INSERT_EXIDX_CANTUNWIND_AT_END
2777 }
2778 arm_unwind_edit_type;
2779
2780 /* A (sorted) list of edits to apply to an unwind table. */
2781 typedef struct arm_unwind_table_edit
2782 {
2783 arm_unwind_edit_type type;
2784 /* Note: we sometimes want to insert an unwind entry corresponding to a
2785 section different from the one we're currently writing out, so record the
2786 (text) section this edit relates to here. */
2787 asection *linked_section;
2788 unsigned int index;
2789 struct arm_unwind_table_edit *next;
2790 }
2791 arm_unwind_table_edit;
2792
2793 typedef struct _arm_elf_section_data
2794 {
2795 /* Information about mapping symbols. */
2796 struct bfd_elf_section_data elf;
2797 unsigned int mapcount;
2798 unsigned int mapsize;
2799 elf32_arm_section_map *map;
2800 /* Information about CPU errata. */
2801 unsigned int erratumcount;
2802 elf32_vfp11_erratum_list *erratumlist;
2803 unsigned int stm32l4xx_erratumcount;
2804 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2805 unsigned int additional_reloc_count;
2806 /* Information about unwind tables. */
2807 union
2808 {
2809 /* Unwind info attached to a text section. */
2810 struct
2811 {
2812 asection *arm_exidx_sec;
2813 } text;
2814
2815 /* Unwind info attached to an .ARM.exidx section. */
2816 struct
2817 {
2818 arm_unwind_table_edit *unwind_edit_list;
2819 arm_unwind_table_edit *unwind_edit_tail;
2820 } exidx;
2821 } u;
2822 }
2823 _arm_elf_section_data;
2824
2825 #define elf32_arm_section_data(sec) \
2826 ((_arm_elf_section_data *) elf_section_data (sec))
2827
2828 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2829 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2830 so may be created multiple times: we use an array of these entries whilst
2831 relaxing which we can refresh easily, then create stubs for each potentially
2832 erratum-triggering instruction once we've settled on a solution. */
2833
2834 struct a8_erratum_fix
2835 {
2836 bfd *input_bfd;
2837 asection *section;
2838 bfd_vma offset;
2839 bfd_vma addend;
2840 unsigned long orig_insn;
2841 char *stub_name;
2842 enum elf32_arm_stub_type stub_type;
2843 enum arm_st_branch_type branch_type;
2844 };
2845
2846 /* A table of relocs applied to branches which might trigger Cortex-A8
2847 erratum. */
2848
2849 struct a8_erratum_reloc
2850 {
2851 bfd_vma from;
2852 bfd_vma destination;
2853 struct elf32_arm_link_hash_entry *hash;
2854 const char *sym_name;
2855 unsigned int r_type;
2856 enum arm_st_branch_type branch_type;
2857 bfd_boolean non_a8_stub;
2858 };
2859
2860 /* The size of the thread control block. */
2861 #define TCB_SIZE 8
2862
2863 /* ARM-specific information about a PLT entry, over and above the usual
2864 gotplt_union. */
2865 struct arm_plt_info
2866 {
2867 /* We reference count Thumb references to a PLT entry separately,
2868 so that we can emit the Thumb trampoline only if needed. */
2869 bfd_signed_vma thumb_refcount;
2870
2871 /* Some references from Thumb code may be eliminated by BL->BLX
2872 conversion, so record them separately. */
2873 bfd_signed_vma maybe_thumb_refcount;
2874
2875 /* How many of the recorded PLT accesses were from non-call relocations.
2876 This information is useful when deciding whether anything takes the
2877 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2878 non-call references to the function should resolve directly to the
2879 real runtime target. */
2880 unsigned int noncall_refcount;
2881
2882 /* Since PLT entries have variable size if the Thumb prologue is
2883 used, we need to record the index into .got.plt instead of
2884 recomputing it from the PLT offset. */
2885 bfd_signed_vma got_offset;
2886 };
2887
2888 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2889 struct arm_local_iplt_info
2890 {
2891 /* The information that is usually found in the generic ELF part of
2892 the hash table entry. */
2893 union gotplt_union root;
2894
2895 /* The information that is usually found in the ARM-specific part of
2896 the hash table entry. */
2897 struct arm_plt_info arm;
2898
2899 /* A list of all potential dynamic relocations against this symbol. */
2900 struct elf_dyn_relocs *dyn_relocs;
2901 };
2902
2903 struct elf_arm_obj_tdata
2904 {
2905 struct elf_obj_tdata root;
2906
2907 /* tls_type for each local got entry. */
2908 char *local_got_tls_type;
2909
2910 /* GOTPLT entries for TLS descriptors. */
2911 bfd_vma *local_tlsdesc_gotent;
2912
2913 /* Information for local symbols that need entries in .iplt. */
2914 struct arm_local_iplt_info **local_iplt;
2915
2916 /* Zero to warn when linking objects with incompatible enum sizes. */
2917 int no_enum_size_warning;
2918
2919 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2920 int no_wchar_size_warning;
2921 };
2922
2923 #define elf_arm_tdata(bfd) \
2924 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2925
2926 #define elf32_arm_local_got_tls_type(bfd) \
2927 (elf_arm_tdata (bfd)->local_got_tls_type)
2928
2929 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2930 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2931
2932 #define elf32_arm_local_iplt(bfd) \
2933 (elf_arm_tdata (bfd)->local_iplt)
2934
2935 #define is_arm_elf(bfd) \
2936 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2937 && elf_tdata (bfd) != NULL \
2938 && elf_object_id (bfd) == ARM_ELF_DATA)
2939
2940 static bfd_boolean
2941 elf32_arm_mkobject (bfd *abfd)
2942 {
2943 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2944 ARM_ELF_DATA);
2945 }
2946
2947 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2948
2949 /* Arm ELF linker hash entry. */
2950 struct elf32_arm_link_hash_entry
2951 {
2952 struct elf_link_hash_entry root;
2953
2954 /* Track dynamic relocs copied for this symbol. */
2955 struct elf_dyn_relocs *dyn_relocs;
2956
2957 /* ARM-specific PLT information. */
2958 struct arm_plt_info plt;
2959
2960 #define GOT_UNKNOWN 0
2961 #define GOT_NORMAL 1
2962 #define GOT_TLS_GD 2
2963 #define GOT_TLS_IE 4
2964 #define GOT_TLS_GDESC 8
2965 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2966 unsigned int tls_type : 8;
2967
2968 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2969 unsigned int is_iplt : 1;
2970
2971 unsigned int unused : 23;
2972
2973 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2974 starting at the end of the jump table. */
2975 bfd_vma tlsdesc_got;
2976
2977 /* The symbol marking the real symbol location for exported thumb
2978 symbols with Arm stubs. */
2979 struct elf_link_hash_entry *export_glue;
2980
2981 /* A pointer to the most recently used stub hash entry against this
2982 symbol. */
2983 struct elf32_arm_stub_hash_entry *stub_cache;
2984 };
2985
2986 /* Traverse an arm ELF linker hash table. */
2987 #define elf32_arm_link_hash_traverse(table, func, info) \
2988 (elf_link_hash_traverse \
2989 (&(table)->root, \
2990 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2991 (info)))
2992
2993 /* Get the ARM elf linker hash table from a link_info structure. */
2994 #define elf32_arm_hash_table(info) \
2995 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2996 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2997
2998 #define arm_stub_hash_lookup(table, string, create, copy) \
2999 ((struct elf32_arm_stub_hash_entry *) \
3000 bfd_hash_lookup ((table), (string), (create), (copy)))
3001
3002 /* Array to keep track of which stub sections have been created, and
3003 information on stub grouping. */
3004 struct map_stub
3005 {
3006 /* This is the section to which stubs in the group will be
3007 attached. */
3008 asection *link_sec;
3009 /* The stub section. */
3010 asection *stub_sec;
3011 };
3012
3013 #define elf32_arm_compute_jump_table_size(htab) \
3014 ((htab)->next_tls_desc_index * 4)
3015
3016 /* ARM ELF linker hash table. */
3017 struct elf32_arm_link_hash_table
3018 {
3019 /* The main hash table. */
3020 struct elf_link_hash_table root;
3021
3022 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3023 bfd_size_type thumb_glue_size;
3024
3025 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3026 bfd_size_type arm_glue_size;
3027
3028 /* The size in bytes of section containing the ARMv4 BX veneers. */
3029 bfd_size_type bx_glue_size;
3030
3031 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3032 veneer has been populated. */
3033 bfd_vma bx_glue_offset[15];
3034
3035 /* The size in bytes of the section containing glue for VFP11 erratum
3036 veneers. */
3037 bfd_size_type vfp11_erratum_glue_size;
3038
3039 /* The size in bytes of the section containing glue for STM32L4XX erratum
3040 veneers. */
3041 bfd_size_type stm32l4xx_erratum_glue_size;
3042
3043 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3044 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3045 elf32_arm_write_section(). */
3046 struct a8_erratum_fix *a8_erratum_fixes;
3047 unsigned int num_a8_erratum_fixes;
3048
3049 /* An arbitrary input BFD chosen to hold the glue sections. */
3050 bfd * bfd_of_glue_owner;
3051
3052 /* Nonzero to output a BE8 image. */
3053 int byteswap_code;
3054
3055 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3056 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3057 int target1_is_rel;
3058
3059 /* The relocation to use for R_ARM_TARGET2 relocations. */
3060 int target2_reloc;
3061
3062 /* 0 = Ignore R_ARM_V4BX.
3063 1 = Convert BX to MOV PC.
3064 2 = Generate v4 interworing stubs. */
3065 int fix_v4bx;
3066
3067 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3068 int fix_cortex_a8;
3069
3070 /* Whether we should fix the ARM1176 BLX immediate issue. */
3071 int fix_arm1176;
3072
3073 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3074 int use_blx;
3075
3076 /* What sort of code sequences we should look for which may trigger the
3077 VFP11 denorm erratum. */
3078 bfd_arm_vfp11_fix vfp11_fix;
3079
3080 /* Global counter for the number of fixes we have emitted. */
3081 int num_vfp11_fixes;
3082
3083 /* What sort of code sequences we should look for which may trigger the
3084 STM32L4XX erratum. */
3085 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3086
3087 /* Global counter for the number of fixes we have emitted. */
3088 int num_stm32l4xx_fixes;
3089
3090 /* Nonzero to force PIC branch veneers. */
3091 int pic_veneer;
3092
3093 /* The number of bytes in the initial entry in the PLT. */
3094 bfd_size_type plt_header_size;
3095
3096 /* The number of bytes in the subsequent PLT etries. */
3097 bfd_size_type plt_entry_size;
3098
3099 /* True if the target system is VxWorks. */
3100 int vxworks_p;
3101
3102 /* True if the target system is Symbian OS. */
3103 int symbian_p;
3104
3105 /* True if the target system is Native Client. */
3106 int nacl_p;
3107
3108 /* True if the target uses REL relocations. */
3109 int use_rel;
3110
3111 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3112 bfd_vma next_tls_desc_index;
3113
3114 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3115 bfd_vma num_tls_desc;
3116
3117 /* Short-cuts to get to dynamic linker sections. */
3118 asection *sdynbss;
3119 asection *srelbss;
3120
3121 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3122 asection *srelplt2;
3123
3124 /* The offset into splt of the PLT entry for the TLS descriptor
3125 resolver. Special values are 0, if not necessary (or not found
3126 to be necessary yet), and -1 if needed but not determined
3127 yet. */
3128 bfd_vma dt_tlsdesc_plt;
3129
3130 /* The offset into sgot of the GOT entry used by the PLT entry
3131 above. */
3132 bfd_vma dt_tlsdesc_got;
3133
3134 /* Offset in .plt section of tls_arm_trampoline. */
3135 bfd_vma tls_trampoline;
3136
3137 /* Data for R_ARM_TLS_LDM32 relocations. */
3138 union
3139 {
3140 bfd_signed_vma refcount;
3141 bfd_vma offset;
3142 } tls_ldm_got;
3143
3144 /* Small local sym cache. */
3145 struct sym_cache sym_cache;
3146
3147 /* For convenience in allocate_dynrelocs. */
3148 bfd * obfd;
3149
3150 /* The amount of space used by the reserved portion of the sgotplt
3151 section, plus whatever space is used by the jump slots. */
3152 bfd_vma sgotplt_jump_table_size;
3153
3154 /* The stub hash table. */
3155 struct bfd_hash_table stub_hash_table;
3156
3157 /* Linker stub bfd. */
3158 bfd *stub_bfd;
3159
3160 /* Linker call-backs. */
3161 asection * (*add_stub_section) (const char *, asection *, unsigned int);
3162 void (*layout_sections_again) (void);
3163
3164 /* Array to keep track of which stub sections have been created, and
3165 information on stub grouping. */
3166 struct map_stub *stub_group;
3167
3168 /* Number of elements in stub_group. */
3169 unsigned int top_id;
3170
3171 /* Assorted information used by elf32_arm_size_stubs. */
3172 unsigned int bfd_count;
3173 unsigned int top_index;
3174 asection **input_list;
3175 };
3176
3177 static inline int
3178 ctz (unsigned int mask)
3179 {
3180 #if GCC_VERSION >= 3004
3181 return __builtin_ctz (mask);
3182 #else
3183 unsigned int i;
3184
3185 for (i = 0; i < 8 * sizeof (mask); i++)
3186 {
3187 if (mask & 0x1)
3188 break;
3189 mask = (mask >> 1);
3190 }
3191 return i;
3192 #endif
3193 }
3194
3195 static inline int
3196 popcount (unsigned int mask)
3197 {
3198 #if GCC_VERSION >= 3004
3199 return __builtin_popcount (mask);
3200 #else
3201 unsigned int i, sum = 0;
3202
3203 for (i = 0; i < 8 * sizeof (mask); i++)
3204 {
3205 if (mask & 0x1)
3206 sum++;
3207 mask = (mask >> 1);
3208 }
3209 return sum;
3210 #endif
3211 }
3212
3213 /* Create an entry in an ARM ELF linker hash table. */
3214
3215 static struct bfd_hash_entry *
3216 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3217 struct bfd_hash_table * table,
3218 const char * string)
3219 {
3220 struct elf32_arm_link_hash_entry * ret =
3221 (struct elf32_arm_link_hash_entry *) entry;
3222
3223 /* Allocate the structure if it has not already been allocated by a
3224 subclass. */
3225 if (ret == NULL)
3226 ret = (struct elf32_arm_link_hash_entry *)
3227 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3228 if (ret == NULL)
3229 return (struct bfd_hash_entry *) ret;
3230
3231 /* Call the allocation method of the superclass. */
3232 ret = ((struct elf32_arm_link_hash_entry *)
3233 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3234 table, string));
3235 if (ret != NULL)
3236 {
3237 ret->dyn_relocs = NULL;
3238 ret->tls_type = GOT_UNKNOWN;
3239 ret->tlsdesc_got = (bfd_vma) -1;
3240 ret->plt.thumb_refcount = 0;
3241 ret->plt.maybe_thumb_refcount = 0;
3242 ret->plt.noncall_refcount = 0;
3243 ret->plt.got_offset = -1;
3244 ret->is_iplt = FALSE;
3245 ret->export_glue = NULL;
3246
3247 ret->stub_cache = NULL;
3248 }
3249
3250 return (struct bfd_hash_entry *) ret;
3251 }
3252
3253 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3254 symbols. */
3255
3256 static bfd_boolean
3257 elf32_arm_allocate_local_sym_info (bfd *abfd)
3258 {
3259 if (elf_local_got_refcounts (abfd) == NULL)
3260 {
3261 bfd_size_type num_syms;
3262 bfd_size_type size;
3263 char *data;
3264
3265 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3266 size = num_syms * (sizeof (bfd_signed_vma)
3267 + sizeof (struct arm_local_iplt_info *)
3268 + sizeof (bfd_vma)
3269 + sizeof (char));
3270 data = bfd_zalloc (abfd, size);
3271 if (data == NULL)
3272 return FALSE;
3273
3274 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3275 data += num_syms * sizeof (bfd_signed_vma);
3276
3277 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3278 data += num_syms * sizeof (struct arm_local_iplt_info *);
3279
3280 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3281 data += num_syms * sizeof (bfd_vma);
3282
3283 elf32_arm_local_got_tls_type (abfd) = data;
3284 }
3285 return TRUE;
3286 }
3287
3288 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3289 to input bfd ABFD. Create the information if it doesn't already exist.
3290 Return null if an allocation fails. */
3291
3292 static struct arm_local_iplt_info *
3293 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3294 {
3295 struct arm_local_iplt_info **ptr;
3296
3297 if (!elf32_arm_allocate_local_sym_info (abfd))
3298 return NULL;
3299
3300 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3301 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3302 if (*ptr == NULL)
3303 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3304 return *ptr;
3305 }
3306
3307 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3308 in ABFD's symbol table. If the symbol is global, H points to its
3309 hash table entry, otherwise H is null.
3310
3311 Return true if the symbol does have PLT information. When returning
3312 true, point *ROOT_PLT at the target-independent reference count/offset
3313 union and *ARM_PLT at the ARM-specific information. */
3314
3315 static bfd_boolean
3316 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3317 unsigned long r_symndx, union gotplt_union **root_plt,
3318 struct arm_plt_info **arm_plt)
3319 {
3320 struct arm_local_iplt_info *local_iplt;
3321
3322 if (h != NULL)
3323 {
3324 *root_plt = &h->root.plt;
3325 *arm_plt = &h->plt;
3326 return TRUE;
3327 }
3328
3329 if (elf32_arm_local_iplt (abfd) == NULL)
3330 return FALSE;
3331
3332 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3333 if (local_iplt == NULL)
3334 return FALSE;
3335
3336 *root_plt = &local_iplt->root;
3337 *arm_plt = &local_iplt->arm;
3338 return TRUE;
3339 }
3340
3341 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3342 before it. */
3343
3344 static bfd_boolean
3345 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3346 struct arm_plt_info *arm_plt)
3347 {
3348 struct elf32_arm_link_hash_table *htab;
3349
3350 htab = elf32_arm_hash_table (info);
3351 return (arm_plt->thumb_refcount != 0
3352 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3353 }
3354
3355 /* Return a pointer to the head of the dynamic reloc list that should
3356 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3357 ABFD's symbol table. Return null if an error occurs. */
3358
3359 static struct elf_dyn_relocs **
3360 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3361 Elf_Internal_Sym *isym)
3362 {
3363 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3364 {
3365 struct arm_local_iplt_info *local_iplt;
3366
3367 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3368 if (local_iplt == NULL)
3369 return NULL;
3370 return &local_iplt->dyn_relocs;
3371 }
3372 else
3373 {
3374 /* Track dynamic relocs needed for local syms too.
3375 We really need local syms available to do this
3376 easily. Oh well. */
3377 asection *s;
3378 void *vpp;
3379
3380 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3381 if (s == NULL)
3382 abort ();
3383
3384 vpp = &elf_section_data (s)->local_dynrel;
3385 return (struct elf_dyn_relocs **) vpp;
3386 }
3387 }
3388
3389 /* Initialize an entry in the stub hash table. */
3390
3391 static struct bfd_hash_entry *
3392 stub_hash_newfunc (struct bfd_hash_entry *entry,
3393 struct bfd_hash_table *table,
3394 const char *string)
3395 {
3396 /* Allocate the structure if it has not already been allocated by a
3397 subclass. */
3398 if (entry == NULL)
3399 {
3400 entry = (struct bfd_hash_entry *)
3401 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3402 if (entry == NULL)
3403 return entry;
3404 }
3405
3406 /* Call the allocation method of the superclass. */
3407 entry = bfd_hash_newfunc (entry, table, string);
3408 if (entry != NULL)
3409 {
3410 struct elf32_arm_stub_hash_entry *eh;
3411
3412 /* Initialize the local fields. */
3413 eh = (struct elf32_arm_stub_hash_entry *) entry;
3414 eh->stub_sec = NULL;
3415 eh->stub_offset = 0;
3416 eh->target_value = 0;
3417 eh->target_section = NULL;
3418 eh->target_addend = 0;
3419 eh->orig_insn = 0;
3420 eh->stub_type = arm_stub_none;
3421 eh->stub_size = 0;
3422 eh->stub_template = NULL;
3423 eh->stub_template_size = 0;
3424 eh->h = NULL;
3425 eh->id_sec = NULL;
3426 eh->output_name = NULL;
3427 }
3428
3429 return entry;
3430 }
3431
3432 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3433 shortcuts to them in our hash table. */
3434
3435 static bfd_boolean
3436 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3437 {
3438 struct elf32_arm_link_hash_table *htab;
3439
3440 htab = elf32_arm_hash_table (info);
3441 if (htab == NULL)
3442 return FALSE;
3443
3444 /* BPABI objects never have a GOT, or associated sections. */
3445 if (htab->symbian_p)
3446 return TRUE;
3447
3448 if (! _bfd_elf_create_got_section (dynobj, info))
3449 return FALSE;
3450
3451 return TRUE;
3452 }
3453
3454 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3455
3456 static bfd_boolean
3457 create_ifunc_sections (struct bfd_link_info *info)
3458 {
3459 struct elf32_arm_link_hash_table *htab;
3460 const struct elf_backend_data *bed;
3461 bfd *dynobj;
3462 asection *s;
3463 flagword flags;
3464
3465 htab = elf32_arm_hash_table (info);
3466 dynobj = htab->root.dynobj;
3467 bed = get_elf_backend_data (dynobj);
3468 flags = bed->dynamic_sec_flags;
3469
3470 if (htab->root.iplt == NULL)
3471 {
3472 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3473 flags | SEC_READONLY | SEC_CODE);
3474 if (s == NULL
3475 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3476 return FALSE;
3477 htab->root.iplt = s;
3478 }
3479
3480 if (htab->root.irelplt == NULL)
3481 {
3482 s = bfd_make_section_anyway_with_flags (dynobj,
3483 RELOC_SECTION (htab, ".iplt"),
3484 flags | SEC_READONLY);
3485 if (s == NULL
3486 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3487 return FALSE;
3488 htab->root.irelplt = s;
3489 }
3490
3491 if (htab->root.igotplt == NULL)
3492 {
3493 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3494 if (s == NULL
3495 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3496 return FALSE;
3497 htab->root.igotplt = s;
3498 }
3499 return TRUE;
3500 }
3501
3502 /* Determine if we're dealing with a Thumb only architecture. */
3503
3504 static bfd_boolean
3505 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3506 {
3507 int arch;
3508 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3509 Tag_CPU_arch_profile);
3510
3511 if (profile)
3512 return profile == 'M';
3513
3514 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3515
3516 if (arch == TAG_CPU_ARCH_V6_M
3517 || arch == TAG_CPU_ARCH_V6S_M
3518 || arch == TAG_CPU_ARCH_V7E_M
3519 || arch == TAG_CPU_ARCH_V8M_BASE
3520 || arch == TAG_CPU_ARCH_V8M_MAIN)
3521 return TRUE;
3522
3523 return FALSE;
3524 }
3525
3526 /* Determine if we're dealing with a Thumb-2 object. */
3527
3528 static bfd_boolean
3529 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3530 {
3531 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3532 Tag_CPU_arch);
3533 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3534 }
3535
3536 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3537 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3538 hash table. */
3539
3540 static bfd_boolean
3541 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3542 {
3543 struct elf32_arm_link_hash_table *htab;
3544
3545 htab = elf32_arm_hash_table (info);
3546 if (htab == NULL)
3547 return FALSE;
3548
3549 if (!htab->root.sgot && !create_got_section (dynobj, info))
3550 return FALSE;
3551
3552 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3553 return FALSE;
3554
3555 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3556 if (!bfd_link_pic (info))
3557 htab->srelbss = bfd_get_linker_section (dynobj,
3558 RELOC_SECTION (htab, ".bss"));
3559
3560 if (htab->vxworks_p)
3561 {
3562 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3563 return FALSE;
3564
3565 if (bfd_link_pic (info))
3566 {
3567 htab->plt_header_size = 0;
3568 htab->plt_entry_size
3569 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3570 }
3571 else
3572 {
3573 htab->plt_header_size
3574 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3575 htab->plt_entry_size
3576 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3577 }
3578
3579 if (elf_elfheader (dynobj))
3580 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3581 }
3582 else
3583 {
3584 /* PR ld/16017
3585 Test for thumb only architectures. Note - we cannot just call
3586 using_thumb_only() as the attributes in the output bfd have not been
3587 initialised at this point, so instead we use the input bfd. */
3588 bfd * saved_obfd = htab->obfd;
3589
3590 htab->obfd = dynobj;
3591 if (using_thumb_only (htab))
3592 {
3593 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3594 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3595 }
3596 htab->obfd = saved_obfd;
3597 }
3598
3599 if (!htab->root.splt
3600 || !htab->root.srelplt
3601 || !htab->sdynbss
3602 || (!bfd_link_pic (info) && !htab->srelbss))
3603 abort ();
3604
3605 return TRUE;
3606 }
3607
3608 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3609
3610 static void
3611 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3612 struct elf_link_hash_entry *dir,
3613 struct elf_link_hash_entry *ind)
3614 {
3615 struct elf32_arm_link_hash_entry *edir, *eind;
3616
3617 edir = (struct elf32_arm_link_hash_entry *) dir;
3618 eind = (struct elf32_arm_link_hash_entry *) ind;
3619
3620 if (eind->dyn_relocs != NULL)
3621 {
3622 if (edir->dyn_relocs != NULL)
3623 {
3624 struct elf_dyn_relocs **pp;
3625 struct elf_dyn_relocs *p;
3626
3627 /* Add reloc counts against the indirect sym to the direct sym
3628 list. Merge any entries against the same section. */
3629 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3630 {
3631 struct elf_dyn_relocs *q;
3632
3633 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3634 if (q->sec == p->sec)
3635 {
3636 q->pc_count += p->pc_count;
3637 q->count += p->count;
3638 *pp = p->next;
3639 break;
3640 }
3641 if (q == NULL)
3642 pp = &p->next;
3643 }
3644 *pp = edir->dyn_relocs;
3645 }
3646
3647 edir->dyn_relocs = eind->dyn_relocs;
3648 eind->dyn_relocs = NULL;
3649 }
3650
3651 if (ind->root.type == bfd_link_hash_indirect)
3652 {
3653 /* Copy over PLT info. */
3654 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3655 eind->plt.thumb_refcount = 0;
3656 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3657 eind->plt.maybe_thumb_refcount = 0;
3658 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3659 eind->plt.noncall_refcount = 0;
3660
3661 /* We should only allocate a function to .iplt once the final
3662 symbol information is known. */
3663 BFD_ASSERT (!eind->is_iplt);
3664
3665 if (dir->got.refcount <= 0)
3666 {
3667 edir->tls_type = eind->tls_type;
3668 eind->tls_type = GOT_UNKNOWN;
3669 }
3670 }
3671
3672 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3673 }
3674
3675 /* Destroy an ARM elf linker hash table. */
3676
3677 static void
3678 elf32_arm_link_hash_table_free (bfd *obfd)
3679 {
3680 struct elf32_arm_link_hash_table *ret
3681 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3682
3683 bfd_hash_table_free (&ret->stub_hash_table);
3684 _bfd_elf_link_hash_table_free (obfd);
3685 }
3686
3687 /* Create an ARM elf linker hash table. */
3688
3689 static struct bfd_link_hash_table *
3690 elf32_arm_link_hash_table_create (bfd *abfd)
3691 {
3692 struct elf32_arm_link_hash_table *ret;
3693 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3694
3695 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3696 if (ret == NULL)
3697 return NULL;
3698
3699 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3700 elf32_arm_link_hash_newfunc,
3701 sizeof (struct elf32_arm_link_hash_entry),
3702 ARM_ELF_DATA))
3703 {
3704 free (ret);
3705 return NULL;
3706 }
3707
3708 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3709 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3710 #ifdef FOUR_WORD_PLT
3711 ret->plt_header_size = 16;
3712 ret->plt_entry_size = 16;
3713 #else
3714 ret->plt_header_size = 20;
3715 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3716 #endif
3717 ret->use_rel = 1;
3718 ret->obfd = abfd;
3719
3720 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3721 sizeof (struct elf32_arm_stub_hash_entry)))
3722 {
3723 _bfd_elf_link_hash_table_free (abfd);
3724 return NULL;
3725 }
3726 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3727
3728 return &ret->root.root;
3729 }
3730
3731 /* Determine what kind of NOPs are available. */
3732
3733 static bfd_boolean
3734 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3735 {
3736 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3737 Tag_CPU_arch);
3738 return arch == TAG_CPU_ARCH_V6T2
3739 || arch == TAG_CPU_ARCH_V6K
3740 || arch == TAG_CPU_ARCH_V7
3741 || arch == TAG_CPU_ARCH_V7E_M;
3742 }
3743
3744 static bfd_boolean
3745 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3746 {
3747 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3748 Tag_CPU_arch);
3749 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3750 || arch == TAG_CPU_ARCH_V7E_M);
3751 }
3752
3753 static bfd_boolean
3754 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3755 {
3756 switch (stub_type)
3757 {
3758 case arm_stub_long_branch_thumb_only:
3759 case arm_stub_long_branch_v4t_thumb_arm:
3760 case arm_stub_short_branch_v4t_thumb_arm:
3761 case arm_stub_long_branch_v4t_thumb_arm_pic:
3762 case arm_stub_long_branch_v4t_thumb_tls_pic:
3763 case arm_stub_long_branch_thumb_only_pic:
3764 return TRUE;
3765 case arm_stub_none:
3766 BFD_FAIL ();
3767 return FALSE;
3768 break;
3769 default:
3770 return FALSE;
3771 }
3772 }
3773
3774 /* Determine the type of stub needed, if any, for a call. */
3775
3776 static enum elf32_arm_stub_type
3777 arm_type_of_stub (struct bfd_link_info *info,
3778 asection *input_sec,
3779 const Elf_Internal_Rela *rel,
3780 unsigned char st_type,
3781 enum arm_st_branch_type *actual_branch_type,
3782 struct elf32_arm_link_hash_entry *hash,
3783 bfd_vma destination,
3784 asection *sym_sec,
3785 bfd *input_bfd,
3786 const char *name)
3787 {
3788 bfd_vma location;
3789 bfd_signed_vma branch_offset;
3790 unsigned int r_type;
3791 struct elf32_arm_link_hash_table * globals;
3792 int thumb2;
3793 int thumb_only;
3794 enum elf32_arm_stub_type stub_type = arm_stub_none;
3795 int use_plt = 0;
3796 enum arm_st_branch_type branch_type = *actual_branch_type;
3797 union gotplt_union *root_plt;
3798 struct arm_plt_info *arm_plt;
3799
3800 if (branch_type == ST_BRANCH_LONG)
3801 return stub_type;
3802
3803 globals = elf32_arm_hash_table (info);
3804 if (globals == NULL)
3805 return stub_type;
3806
3807 thumb_only = using_thumb_only (globals);
3808
3809 thumb2 = using_thumb2 (globals);
3810
3811 /* Determine where the call point is. */
3812 location = (input_sec->output_offset
3813 + input_sec->output_section->vma
3814 + rel->r_offset);
3815
3816 r_type = ELF32_R_TYPE (rel->r_info);
3817
3818 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3819 are considering a function call relocation. */
3820 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3821 || r_type == R_ARM_THM_JUMP19)
3822 && branch_type == ST_BRANCH_TO_ARM)
3823 branch_type = ST_BRANCH_TO_THUMB;
3824
3825 /* For TLS call relocs, it is the caller's responsibility to provide
3826 the address of the appropriate trampoline. */
3827 if (r_type != R_ARM_TLS_CALL
3828 && r_type != R_ARM_THM_TLS_CALL
3829 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3830 &root_plt, &arm_plt)
3831 && root_plt->offset != (bfd_vma) -1)
3832 {
3833 asection *splt;
3834
3835 if (hash == NULL || hash->is_iplt)
3836 splt = globals->root.iplt;
3837 else
3838 splt = globals->root.splt;
3839 if (splt != NULL)
3840 {
3841 use_plt = 1;
3842
3843 /* Note when dealing with PLT entries: the main PLT stub is in
3844 ARM mode, so if the branch is in Thumb mode, another
3845 Thumb->ARM stub will be inserted later just before the ARM
3846 PLT stub. We don't take this extra distance into account
3847 here, because if a long branch stub is needed, we'll add a
3848 Thumb->Arm one and branch directly to the ARM PLT entry
3849 because it avoids spreading offset corrections in several
3850 places. */
3851
3852 destination = (splt->output_section->vma
3853 + splt->output_offset
3854 + root_plt->offset);
3855 st_type = STT_FUNC;
3856 branch_type = ST_BRANCH_TO_ARM;
3857 }
3858 }
3859 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3860 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3861
3862 branch_offset = (bfd_signed_vma)(destination - location);
3863
3864 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3865 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3866 {
3867 /* Handle cases where:
3868 - this call goes too far (different Thumb/Thumb2 max
3869 distance)
3870 - it's a Thumb->Arm call and blx is not available, or it's a
3871 Thumb->Arm branch (not bl). A stub is needed in this case,
3872 but only if this call is not through a PLT entry. Indeed,
3873 PLT stubs handle mode switching already.
3874 */
3875 if ((!thumb2
3876 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3877 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3878 || (thumb2
3879 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3880 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3881 || (thumb2
3882 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3883 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3884 && (r_type == R_ARM_THM_JUMP19))
3885 || (branch_type == ST_BRANCH_TO_ARM
3886 && (((r_type == R_ARM_THM_CALL
3887 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3888 || (r_type == R_ARM_THM_JUMP24)
3889 || (r_type == R_ARM_THM_JUMP19))
3890 && !use_plt))
3891 {
3892 if (branch_type == ST_BRANCH_TO_THUMB)
3893 {
3894 /* Thumb to thumb. */
3895 if (!thumb_only)
3896 {
3897 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3898 /* PIC stubs. */
3899 ? ((globals->use_blx
3900 && (r_type == R_ARM_THM_CALL))
3901 /* V5T and above. Stub starts with ARM code, so
3902 we must be able to switch mode before
3903 reaching it, which is only possible for 'bl'
3904 (ie R_ARM_THM_CALL relocation). */
3905 ? arm_stub_long_branch_any_thumb_pic
3906 /* On V4T, use Thumb code only. */
3907 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3908
3909 /* non-PIC stubs. */
3910 : ((globals->use_blx
3911 && (r_type == R_ARM_THM_CALL))
3912 /* V5T and above. */
3913 ? arm_stub_long_branch_any_any
3914 /* V4T. */
3915 : arm_stub_long_branch_v4t_thumb_thumb);
3916 }
3917 else
3918 {
3919 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3920 /* PIC stub. */
3921 ? arm_stub_long_branch_thumb_only_pic
3922 /* non-PIC stub. */
3923 : arm_stub_long_branch_thumb_only;
3924 }
3925 }
3926 else
3927 {
3928 /* Thumb to arm. */
3929 if (sym_sec != NULL
3930 && sym_sec->owner != NULL
3931 && !INTERWORK_FLAG (sym_sec->owner))
3932 {
3933 (*_bfd_error_handler)
3934 (_("%B(%s): warning: interworking not enabled.\n"
3935 " first occurrence: %B: Thumb call to ARM"),
3936 sym_sec->owner, input_bfd, name);
3937 }
3938
3939 stub_type =
3940 (bfd_link_pic (info) | globals->pic_veneer)
3941 /* PIC stubs. */
3942 ? (r_type == R_ARM_THM_TLS_CALL
3943 /* TLS PIC stubs. */
3944 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3945 : arm_stub_long_branch_v4t_thumb_tls_pic)
3946 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3947 /* V5T PIC and above. */
3948 ? arm_stub_long_branch_any_arm_pic
3949 /* V4T PIC stub. */
3950 : arm_stub_long_branch_v4t_thumb_arm_pic))
3951
3952 /* non-PIC stubs. */
3953 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3954 /* V5T and above. */
3955 ? arm_stub_long_branch_any_any
3956 /* V4T. */
3957 : arm_stub_long_branch_v4t_thumb_arm);
3958
3959 /* Handle v4t short branches. */
3960 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3961 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3962 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3963 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3964 }
3965 }
3966 }
3967 else if (r_type == R_ARM_CALL
3968 || r_type == R_ARM_JUMP24
3969 || r_type == R_ARM_PLT32
3970 || r_type == R_ARM_TLS_CALL)
3971 {
3972 if (branch_type == ST_BRANCH_TO_THUMB)
3973 {
3974 /* Arm to thumb. */
3975
3976 if (sym_sec != NULL
3977 && sym_sec->owner != NULL
3978 && !INTERWORK_FLAG (sym_sec->owner))
3979 {
3980 (*_bfd_error_handler)
3981 (_("%B(%s): warning: interworking not enabled.\n"
3982 " first occurrence: %B: ARM call to Thumb"),
3983 sym_sec->owner, input_bfd, name);
3984 }
3985
3986 /* We have an extra 2-bytes reach because of
3987 the mode change (bit 24 (H) of BLX encoding). */
3988 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3989 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3990 || (r_type == R_ARM_CALL && !globals->use_blx)
3991 || (r_type == R_ARM_JUMP24)
3992 || (r_type == R_ARM_PLT32))
3993 {
3994 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3995 /* PIC stubs. */
3996 ? ((globals->use_blx)
3997 /* V5T and above. */
3998 ? arm_stub_long_branch_any_thumb_pic
3999 /* V4T stub. */
4000 : arm_stub_long_branch_v4t_arm_thumb_pic)
4001
4002 /* non-PIC stubs. */
4003 : ((globals->use_blx)
4004 /* V5T and above. */
4005 ? arm_stub_long_branch_any_any
4006 /* V4T. */
4007 : arm_stub_long_branch_v4t_arm_thumb);
4008 }
4009 }
4010 else
4011 {
4012 /* Arm to arm. */
4013 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4014 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4015 {
4016 stub_type =
4017 (bfd_link_pic (info) | globals->pic_veneer)
4018 /* PIC stubs. */
4019 ? (r_type == R_ARM_TLS_CALL
4020 /* TLS PIC Stub. */
4021 ? arm_stub_long_branch_any_tls_pic
4022 : (globals->nacl_p
4023 ? arm_stub_long_branch_arm_nacl_pic
4024 : arm_stub_long_branch_any_arm_pic))
4025 /* non-PIC stubs. */
4026 : (globals->nacl_p
4027 ? arm_stub_long_branch_arm_nacl
4028 : arm_stub_long_branch_any_any);
4029 }
4030 }
4031 }
4032
4033 /* If a stub is needed, record the actual destination type. */
4034 if (stub_type != arm_stub_none)
4035 *actual_branch_type = branch_type;
4036
4037 return stub_type;
4038 }
4039
4040 /* Build a name for an entry in the stub hash table. */
4041
4042 static char *
4043 elf32_arm_stub_name (const asection *input_section,
4044 const asection *sym_sec,
4045 const struct elf32_arm_link_hash_entry *hash,
4046 const Elf_Internal_Rela *rel,
4047 enum elf32_arm_stub_type stub_type)
4048 {
4049 char *stub_name;
4050 bfd_size_type len;
4051
4052 if (hash)
4053 {
4054 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4055 stub_name = (char *) bfd_malloc (len);
4056 if (stub_name != NULL)
4057 sprintf (stub_name, "%08x_%s+%x_%d",
4058 input_section->id & 0xffffffff,
4059 hash->root.root.root.string,
4060 (int) rel->r_addend & 0xffffffff,
4061 (int) stub_type);
4062 }
4063 else
4064 {
4065 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4066 stub_name = (char *) bfd_malloc (len);
4067 if (stub_name != NULL)
4068 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4069 input_section->id & 0xffffffff,
4070 sym_sec->id & 0xffffffff,
4071 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4072 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4073 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4074 (int) rel->r_addend & 0xffffffff,
4075 (int) stub_type);
4076 }
4077
4078 return stub_name;
4079 }
4080
4081 /* Look up an entry in the stub hash. Stub entries are cached because
4082 creating the stub name takes a bit of time. */
4083
4084 static struct elf32_arm_stub_hash_entry *
4085 elf32_arm_get_stub_entry (const asection *input_section,
4086 const asection *sym_sec,
4087 struct elf_link_hash_entry *hash,
4088 const Elf_Internal_Rela *rel,
4089 struct elf32_arm_link_hash_table *htab,
4090 enum elf32_arm_stub_type stub_type)
4091 {
4092 struct elf32_arm_stub_hash_entry *stub_entry;
4093 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4094 const asection *id_sec;
4095
4096 if ((input_section->flags & SEC_CODE) == 0)
4097 return NULL;
4098
4099 /* If this input section is part of a group of sections sharing one
4100 stub section, then use the id of the first section in the group.
4101 Stub names need to include a section id, as there may well be
4102 more than one stub used to reach say, printf, and we need to
4103 distinguish between them. */
4104 id_sec = htab->stub_group[input_section->id].link_sec;
4105
4106 if (h != NULL && h->stub_cache != NULL
4107 && h->stub_cache->h == h
4108 && h->stub_cache->id_sec == id_sec
4109 && h->stub_cache->stub_type == stub_type)
4110 {
4111 stub_entry = h->stub_cache;
4112 }
4113 else
4114 {
4115 char *stub_name;
4116
4117 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4118 if (stub_name == NULL)
4119 return NULL;
4120
4121 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4122 stub_name, FALSE, FALSE);
4123 if (h != NULL)
4124 h->stub_cache = stub_entry;
4125
4126 free (stub_name);
4127 }
4128
4129 return stub_entry;
4130 }
4131
4132 /* Find or create a stub section. Returns a pointer to the stub section, and
4133 the section to which the stub section will be attached (in *LINK_SEC_P).
4134 LINK_SEC_P may be NULL. */
4135
4136 static asection *
4137 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4138 struct elf32_arm_link_hash_table *htab)
4139 {
4140 asection *link_sec;
4141 asection *stub_sec;
4142
4143 link_sec = htab->stub_group[section->id].link_sec;
4144 BFD_ASSERT (link_sec != NULL);
4145 stub_sec = htab->stub_group[section->id].stub_sec;
4146
4147 if (stub_sec == NULL)
4148 {
4149 stub_sec = htab->stub_group[link_sec->id].stub_sec;
4150 if (stub_sec == NULL)
4151 {
4152 size_t namelen;
4153 bfd_size_type len;
4154 char *s_name;
4155
4156 namelen = strlen (link_sec->name);
4157 len = namelen + sizeof (STUB_SUFFIX);
4158 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4159 if (s_name == NULL)
4160 return NULL;
4161
4162 memcpy (s_name, link_sec->name, namelen);
4163 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4164 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
4165 htab->nacl_p ? 4 : 3);
4166 if (stub_sec == NULL)
4167 return NULL;
4168 htab->stub_group[link_sec->id].stub_sec = stub_sec;
4169 }
4170 htab->stub_group[section->id].stub_sec = stub_sec;
4171 }
4172
4173 if (link_sec_p)
4174 *link_sec_p = link_sec;
4175
4176 return stub_sec;
4177 }
4178
4179 /* Add a new stub entry to the stub hash. Not all fields of the new
4180 stub entry are initialised. */
4181
4182 static struct elf32_arm_stub_hash_entry *
4183 elf32_arm_add_stub (const char *stub_name,
4184 asection *section,
4185 struct elf32_arm_link_hash_table *htab)
4186 {
4187 asection *link_sec;
4188 asection *stub_sec;
4189 struct elf32_arm_stub_hash_entry *stub_entry;
4190
4191 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
4192 if (stub_sec == NULL)
4193 return NULL;
4194
4195 /* Enter this entry into the linker stub hash table. */
4196 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4197 TRUE, FALSE);
4198 if (stub_entry == NULL)
4199 {
4200 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4201 section->owner,
4202 stub_name);
4203 return NULL;
4204 }
4205
4206 stub_entry->stub_sec = stub_sec;
4207 stub_entry->stub_offset = 0;
4208 stub_entry->id_sec = link_sec;
4209
4210 return stub_entry;
4211 }
4212
4213 /* Store an Arm insn into an output section not processed by
4214 elf32_arm_write_section. */
4215
4216 static void
4217 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4218 bfd * output_bfd, bfd_vma val, void * ptr)
4219 {
4220 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4221 bfd_putl32 (val, ptr);
4222 else
4223 bfd_putb32 (val, ptr);
4224 }
4225
4226 /* Store a 16-bit Thumb insn into an output section not processed by
4227 elf32_arm_write_section. */
4228
4229 static void
4230 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4231 bfd * output_bfd, bfd_vma val, void * ptr)
4232 {
4233 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4234 bfd_putl16 (val, ptr);
4235 else
4236 bfd_putb16 (val, ptr);
4237 }
4238
4239 /* Store a Thumb2 insn into an output section not processed by
4240 elf32_arm_write_section. */
4241
4242 static void
4243 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4244 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4245 {
4246 /* T2 instructions are 16-bit streamed. */
4247 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4248 {
4249 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4250 bfd_putl16 ((val & 0xffff), ptr + 2);
4251 }
4252 else
4253 {
4254 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4255 bfd_putb16 ((val & 0xffff), ptr + 2);
4256 }
4257 }
4258
4259 /* If it's possible to change R_TYPE to a more efficient access
4260 model, return the new reloc type. */
4261
4262 static unsigned
4263 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4264 struct elf_link_hash_entry *h)
4265 {
4266 int is_local = (h == NULL);
4267
4268 if (bfd_link_pic (info)
4269 || (h && h->root.type == bfd_link_hash_undefweak))
4270 return r_type;
4271
4272 /* We do not support relaxations for Old TLS models. */
4273 switch (r_type)
4274 {
4275 case R_ARM_TLS_GOTDESC:
4276 case R_ARM_TLS_CALL:
4277 case R_ARM_THM_TLS_CALL:
4278 case R_ARM_TLS_DESCSEQ:
4279 case R_ARM_THM_TLS_DESCSEQ:
4280 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4281 }
4282
4283 return r_type;
4284 }
4285
4286 static bfd_reloc_status_type elf32_arm_final_link_relocate
4287 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4288 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4289 const char *, unsigned char, enum arm_st_branch_type,
4290 struct elf_link_hash_entry *, bfd_boolean *, char **);
4291
4292 static unsigned int
4293 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4294 {
4295 switch (stub_type)
4296 {
4297 case arm_stub_a8_veneer_b_cond:
4298 case arm_stub_a8_veneer_b:
4299 case arm_stub_a8_veneer_bl:
4300 return 2;
4301
4302 case arm_stub_long_branch_any_any:
4303 case arm_stub_long_branch_v4t_arm_thumb:
4304 case arm_stub_long_branch_thumb_only:
4305 case arm_stub_long_branch_v4t_thumb_thumb:
4306 case arm_stub_long_branch_v4t_thumb_arm:
4307 case arm_stub_short_branch_v4t_thumb_arm:
4308 case arm_stub_long_branch_any_arm_pic:
4309 case arm_stub_long_branch_any_thumb_pic:
4310 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4311 case arm_stub_long_branch_v4t_arm_thumb_pic:
4312 case arm_stub_long_branch_v4t_thumb_arm_pic:
4313 case arm_stub_long_branch_thumb_only_pic:
4314 case arm_stub_long_branch_any_tls_pic:
4315 case arm_stub_long_branch_v4t_thumb_tls_pic:
4316 case arm_stub_a8_veneer_blx:
4317 return 4;
4318
4319 case arm_stub_long_branch_arm_nacl:
4320 case arm_stub_long_branch_arm_nacl_pic:
4321 return 16;
4322
4323 default:
4324 abort (); /* Should be unreachable. */
4325 }
4326 }
4327
4328 static bfd_boolean
4329 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4330 void * in_arg)
4331 {
4332 #define MAXRELOCS 3
4333 struct elf32_arm_stub_hash_entry *stub_entry;
4334 struct elf32_arm_link_hash_table *globals;
4335 struct bfd_link_info *info;
4336 asection *stub_sec;
4337 bfd *stub_bfd;
4338 bfd_byte *loc;
4339 bfd_vma sym_value;
4340 int template_size;
4341 int size;
4342 const insn_sequence *template_sequence;
4343 int i;
4344 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4345 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4346 int nrelocs = 0;
4347
4348 /* Massage our args to the form they really have. */
4349 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4350 info = (struct bfd_link_info *) in_arg;
4351
4352 globals = elf32_arm_hash_table (info);
4353 if (globals == NULL)
4354 return FALSE;
4355
4356 stub_sec = stub_entry->stub_sec;
4357
4358 if ((globals->fix_cortex_a8 < 0)
4359 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4360 /* We have to do less-strictly-aligned fixes last. */
4361 return TRUE;
4362
4363 /* Make a note of the offset within the stubs for this entry. */
4364 stub_entry->stub_offset = stub_sec->size;
4365 loc = stub_sec->contents + stub_entry->stub_offset;
4366
4367 stub_bfd = stub_sec->owner;
4368
4369 /* This is the address of the stub destination. */
4370 sym_value = (stub_entry->target_value
4371 + stub_entry->target_section->output_offset
4372 + stub_entry->target_section->output_section->vma);
4373
4374 template_sequence = stub_entry->stub_template;
4375 template_size = stub_entry->stub_template_size;
4376
4377 size = 0;
4378 for (i = 0; i < template_size; i++)
4379 {
4380 switch (template_sequence[i].type)
4381 {
4382 case THUMB16_TYPE:
4383 {
4384 bfd_vma data = (bfd_vma) template_sequence[i].data;
4385 if (template_sequence[i].reloc_addend != 0)
4386 {
4387 /* We've borrowed the reloc_addend field to mean we should
4388 insert a condition code into this (Thumb-1 branch)
4389 instruction. See THUMB16_BCOND_INSN. */
4390 BFD_ASSERT ((data & 0xff00) == 0xd000);
4391 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4392 }
4393 bfd_put_16 (stub_bfd, data, loc + size);
4394 size += 2;
4395 }
4396 break;
4397
4398 case THUMB32_TYPE:
4399 bfd_put_16 (stub_bfd,
4400 (template_sequence[i].data >> 16) & 0xffff,
4401 loc + size);
4402 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4403 loc + size + 2);
4404 if (template_sequence[i].r_type != R_ARM_NONE)
4405 {
4406 stub_reloc_idx[nrelocs] = i;
4407 stub_reloc_offset[nrelocs++] = size;
4408 }
4409 size += 4;
4410 break;
4411
4412 case ARM_TYPE:
4413 bfd_put_32 (stub_bfd, template_sequence[i].data,
4414 loc + size);
4415 /* Handle cases where the target is encoded within the
4416 instruction. */
4417 if (template_sequence[i].r_type == R_ARM_JUMP24)
4418 {
4419 stub_reloc_idx[nrelocs] = i;
4420 stub_reloc_offset[nrelocs++] = size;
4421 }
4422 size += 4;
4423 break;
4424
4425 case DATA_TYPE:
4426 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4427 stub_reloc_idx[nrelocs] = i;
4428 stub_reloc_offset[nrelocs++] = size;
4429 size += 4;
4430 break;
4431
4432 default:
4433 BFD_FAIL ();
4434 return FALSE;
4435 }
4436 }
4437
4438 stub_sec->size += size;
4439
4440 /* Stub size has already been computed in arm_size_one_stub. Check
4441 consistency. */
4442 BFD_ASSERT (size == stub_entry->stub_size);
4443
4444 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4445 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4446 sym_value |= 1;
4447
4448 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4449 in each stub. */
4450 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4451
4452 for (i = 0; i < nrelocs; i++)
4453 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4454 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4455 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4456 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4457 {
4458 Elf_Internal_Rela rel;
4459 bfd_boolean unresolved_reloc;
4460 char *error_message;
4461 enum arm_st_branch_type branch_type
4462 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4463 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4464 bfd_vma points_to = sym_value + stub_entry->target_addend;
4465
4466 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4467 rel.r_info = ELF32_R_INFO (0,
4468 template_sequence[stub_reloc_idx[i]].r_type);
4469 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4470
4471 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4472 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4473 template should refer back to the instruction after the original
4474 branch. */
4475 points_to = sym_value;
4476
4477 /* There may be unintended consequences if this is not true. */
4478 BFD_ASSERT (stub_entry->h == NULL);
4479
4480 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4481 properly. We should probably use this function unconditionally,
4482 rather than only for certain relocations listed in the enclosing
4483 conditional, for the sake of consistency. */
4484 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4485 (template_sequence[stub_reloc_idx[i]].r_type),
4486 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4487 points_to, info, stub_entry->target_section, "", STT_FUNC,
4488 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4489 &unresolved_reloc, &error_message);
4490 }
4491 else
4492 {
4493 Elf_Internal_Rela rel;
4494 bfd_boolean unresolved_reloc;
4495 char *error_message;
4496 bfd_vma points_to = sym_value + stub_entry->target_addend
4497 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4498
4499 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4500 rel.r_info = ELF32_R_INFO (0,
4501 template_sequence[stub_reloc_idx[i]].r_type);
4502 rel.r_addend = 0;
4503
4504 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4505 (template_sequence[stub_reloc_idx[i]].r_type),
4506 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4507 points_to, info, stub_entry->target_section, "", STT_FUNC,
4508 stub_entry->branch_type,
4509 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4510 &error_message);
4511 }
4512
4513 return TRUE;
4514 #undef MAXRELOCS
4515 }
4516
4517 /* Calculate the template, template size and instruction size for a stub.
4518 Return value is the instruction size. */
4519
4520 static unsigned int
4521 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4522 const insn_sequence **stub_template,
4523 int *stub_template_size)
4524 {
4525 const insn_sequence *template_sequence = NULL;
4526 int template_size = 0, i;
4527 unsigned int size;
4528
4529 template_sequence = stub_definitions[stub_type].template_sequence;
4530 if (stub_template)
4531 *stub_template = template_sequence;
4532
4533 template_size = stub_definitions[stub_type].template_size;
4534 if (stub_template_size)
4535 *stub_template_size = template_size;
4536
4537 size = 0;
4538 for (i = 0; i < template_size; i++)
4539 {
4540 switch (template_sequence[i].type)
4541 {
4542 case THUMB16_TYPE:
4543 size += 2;
4544 break;
4545
4546 case ARM_TYPE:
4547 case THUMB32_TYPE:
4548 case DATA_TYPE:
4549 size += 4;
4550 break;
4551
4552 default:
4553 BFD_FAIL ();
4554 return 0;
4555 }
4556 }
4557
4558 return size;
4559 }
4560
4561 /* As above, but don't actually build the stub. Just bump offset so
4562 we know stub section sizes. */
4563
4564 static bfd_boolean
4565 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4566 void *in_arg ATTRIBUTE_UNUSED)
4567 {
4568 struct elf32_arm_stub_hash_entry *stub_entry;
4569 const insn_sequence *template_sequence;
4570 int template_size, size;
4571
4572 /* Massage our args to the form they really have. */
4573 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4574
4575 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4576 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4577
4578 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4579 &template_size);
4580
4581 stub_entry->stub_size = size;
4582 stub_entry->stub_template = template_sequence;
4583 stub_entry->stub_template_size = template_size;
4584
4585 size = (size + 7) & ~7;
4586 stub_entry->stub_sec->size += size;
4587
4588 return TRUE;
4589 }
4590
4591 /* External entry points for sizing and building linker stubs. */
4592
4593 /* Set up various things so that we can make a list of input sections
4594 for each output section included in the link. Returns -1 on error,
4595 0 when no stubs will be needed, and 1 on success. */
4596
4597 int
4598 elf32_arm_setup_section_lists (bfd *output_bfd,
4599 struct bfd_link_info *info)
4600 {
4601 bfd *input_bfd;
4602 unsigned int bfd_count;
4603 unsigned int top_id, top_index;
4604 asection *section;
4605 asection **input_list, **list;
4606 bfd_size_type amt;
4607 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4608
4609 if (htab == NULL)
4610 return 0;
4611 if (! is_elf_hash_table (htab))
4612 return 0;
4613
4614 /* Count the number of input BFDs and find the top input section id. */
4615 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4616 input_bfd != NULL;
4617 input_bfd = input_bfd->link.next)
4618 {
4619 bfd_count += 1;
4620 for (section = input_bfd->sections;
4621 section != NULL;
4622 section = section->next)
4623 {
4624 if (top_id < section->id)
4625 top_id = section->id;
4626 }
4627 }
4628 htab->bfd_count = bfd_count;
4629
4630 amt = sizeof (struct map_stub) * (top_id + 1);
4631 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4632 if (htab->stub_group == NULL)
4633 return -1;
4634 htab->top_id = top_id;
4635
4636 /* We can't use output_bfd->section_count here to find the top output
4637 section index as some sections may have been removed, and
4638 _bfd_strip_section_from_output doesn't renumber the indices. */
4639 for (section = output_bfd->sections, top_index = 0;
4640 section != NULL;
4641 section = section->next)
4642 {
4643 if (top_index < section->index)
4644 top_index = section->index;
4645 }
4646
4647 htab->top_index = top_index;
4648 amt = sizeof (asection *) * (top_index + 1);
4649 input_list = (asection **) bfd_malloc (amt);
4650 htab->input_list = input_list;
4651 if (input_list == NULL)
4652 return -1;
4653
4654 /* For sections we aren't interested in, mark their entries with a
4655 value we can check later. */
4656 list = input_list + top_index;
4657 do
4658 *list = bfd_abs_section_ptr;
4659 while (list-- != input_list);
4660
4661 for (section = output_bfd->sections;
4662 section != NULL;
4663 section = section->next)
4664 {
4665 if ((section->flags & SEC_CODE) != 0)
4666 input_list[section->index] = NULL;
4667 }
4668
4669 return 1;
4670 }
4671
4672 /* The linker repeatedly calls this function for each input section,
4673 in the order that input sections are linked into output sections.
4674 Build lists of input sections to determine groupings between which
4675 we may insert linker stubs. */
4676
4677 void
4678 elf32_arm_next_input_section (struct bfd_link_info *info,
4679 asection *isec)
4680 {
4681 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4682
4683 if (htab == NULL)
4684 return;
4685
4686 if (isec->output_section->index <= htab->top_index)
4687 {
4688 asection **list = htab->input_list + isec->output_section->index;
4689
4690 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4691 {
4692 /* Steal the link_sec pointer for our list. */
4693 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4694 /* This happens to make the list in reverse order,
4695 which we reverse later. */
4696 PREV_SEC (isec) = *list;
4697 *list = isec;
4698 }
4699 }
4700 }
4701
4702 /* See whether we can group stub sections together. Grouping stub
4703 sections may result in fewer stubs. More importantly, we need to
4704 put all .init* and .fini* stubs at the end of the .init or
4705 .fini output sections respectively, because glibc splits the
4706 _init and _fini functions into multiple parts. Putting a stub in
4707 the middle of a function is not a good idea. */
4708
4709 static void
4710 group_sections (struct elf32_arm_link_hash_table *htab,
4711 bfd_size_type stub_group_size,
4712 bfd_boolean stubs_always_after_branch)
4713 {
4714 asection **list = htab->input_list;
4715
4716 do
4717 {
4718 asection *tail = *list;
4719 asection *head;
4720
4721 if (tail == bfd_abs_section_ptr)
4722 continue;
4723
4724 /* Reverse the list: we must avoid placing stubs at the
4725 beginning of the section because the beginning of the text
4726 section may be required for an interrupt vector in bare metal
4727 code. */
4728 #define NEXT_SEC PREV_SEC
4729 head = NULL;
4730 while (tail != NULL)
4731 {
4732 /* Pop from tail. */
4733 asection *item = tail;
4734 tail = PREV_SEC (item);
4735
4736 /* Push on head. */
4737 NEXT_SEC (item) = head;
4738 head = item;
4739 }
4740
4741 while (head != NULL)
4742 {
4743 asection *curr;
4744 asection *next;
4745 bfd_vma stub_group_start = head->output_offset;
4746 bfd_vma end_of_next;
4747
4748 curr = head;
4749 while (NEXT_SEC (curr) != NULL)
4750 {
4751 next = NEXT_SEC (curr);
4752 end_of_next = next->output_offset + next->size;
4753 if (end_of_next - stub_group_start >= stub_group_size)
4754 /* End of NEXT is too far from start, so stop. */
4755 break;
4756 /* Add NEXT to the group. */
4757 curr = next;
4758 }
4759
4760 /* OK, the size from the start to the start of CURR is less
4761 than stub_group_size and thus can be handled by one stub
4762 section. (Or the head section is itself larger than
4763 stub_group_size, in which case we may be toast.)
4764 We should really be keeping track of the total size of
4765 stubs added here, as stubs contribute to the final output
4766 section size. */
4767 do
4768 {
4769 next = NEXT_SEC (head);
4770 /* Set up this stub group. */
4771 htab->stub_group[head->id].link_sec = curr;
4772 }
4773 while (head != curr && (head = next) != NULL);
4774
4775 /* But wait, there's more! Input sections up to stub_group_size
4776 bytes after the stub section can be handled by it too. */
4777 if (!stubs_always_after_branch)
4778 {
4779 stub_group_start = curr->output_offset + curr->size;
4780
4781 while (next != NULL)
4782 {
4783 end_of_next = next->output_offset + next->size;
4784 if (end_of_next - stub_group_start >= stub_group_size)
4785 /* End of NEXT is too far from stubs, so stop. */
4786 break;
4787 /* Add NEXT to the stub group. */
4788 head = next;
4789 next = NEXT_SEC (head);
4790 htab->stub_group[head->id].link_sec = curr;
4791 }
4792 }
4793 head = next;
4794 }
4795 }
4796 while (list++ != htab->input_list + htab->top_index);
4797
4798 free (htab->input_list);
4799 #undef PREV_SEC
4800 #undef NEXT_SEC
4801 }
4802
4803 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4804 erratum fix. */
4805
4806 static int
4807 a8_reloc_compare (const void *a, const void *b)
4808 {
4809 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4810 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4811
4812 if (ra->from < rb->from)
4813 return -1;
4814 else if (ra->from > rb->from)
4815 return 1;
4816 else
4817 return 0;
4818 }
4819
4820 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4821 const char *, char **);
4822
4823 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4824 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4825 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4826 otherwise. */
4827
4828 static bfd_boolean
4829 cortex_a8_erratum_scan (bfd *input_bfd,
4830 struct bfd_link_info *info,
4831 struct a8_erratum_fix **a8_fixes_p,
4832 unsigned int *num_a8_fixes_p,
4833 unsigned int *a8_fix_table_size_p,
4834 struct a8_erratum_reloc *a8_relocs,
4835 unsigned int num_a8_relocs,
4836 unsigned prev_num_a8_fixes,
4837 bfd_boolean *stub_changed_p)
4838 {
4839 asection *section;
4840 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4841 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4842 unsigned int num_a8_fixes = *num_a8_fixes_p;
4843 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4844
4845 if (htab == NULL)
4846 return FALSE;
4847
4848 for (section = input_bfd->sections;
4849 section != NULL;
4850 section = section->next)
4851 {
4852 bfd_byte *contents = NULL;
4853 struct _arm_elf_section_data *sec_data;
4854 unsigned int span;
4855 bfd_vma base_vma;
4856
4857 if (elf_section_type (section) != SHT_PROGBITS
4858 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4859 || (section->flags & SEC_EXCLUDE) != 0
4860 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4861 || (section->output_section == bfd_abs_section_ptr))
4862 continue;
4863
4864 base_vma = section->output_section->vma + section->output_offset;
4865
4866 if (elf_section_data (section)->this_hdr.contents != NULL)
4867 contents = elf_section_data (section)->this_hdr.contents;
4868 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4869 return TRUE;
4870
4871 sec_data = elf32_arm_section_data (section);
4872
4873 for (span = 0; span < sec_data->mapcount; span++)
4874 {
4875 unsigned int span_start = sec_data->map[span].vma;
4876 unsigned int span_end = (span == sec_data->mapcount - 1)
4877 ? section->size : sec_data->map[span + 1].vma;
4878 unsigned int i;
4879 char span_type = sec_data->map[span].type;
4880 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4881
4882 if (span_type != 't')
4883 continue;
4884
4885 /* Span is entirely within a single 4KB region: skip scanning. */
4886 if (((base_vma + span_start) & ~0xfff)
4887 == ((base_vma + span_end) & ~0xfff))
4888 continue;
4889
4890 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4891
4892 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4893 * The branch target is in the same 4KB region as the
4894 first half of the branch.
4895 * The instruction before the branch is a 32-bit
4896 length non-branch instruction. */
4897 for (i = span_start; i < span_end;)
4898 {
4899 unsigned int insn = bfd_getl16 (&contents[i]);
4900 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4901 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4902
4903 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4904 insn_32bit = TRUE;
4905
4906 if (insn_32bit)
4907 {
4908 /* Load the rest of the insn (in manual-friendly order). */
4909 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4910
4911 /* Encoding T4: B<c>.W. */
4912 is_b = (insn & 0xf800d000) == 0xf0009000;
4913 /* Encoding T1: BL<c>.W. */
4914 is_bl = (insn & 0xf800d000) == 0xf000d000;
4915 /* Encoding T2: BLX<c>.W. */
4916 is_blx = (insn & 0xf800d000) == 0xf000c000;
4917 /* Encoding T3: B<c>.W (not permitted in IT block). */
4918 is_bcc = (insn & 0xf800d000) == 0xf0008000
4919 && (insn & 0x07f00000) != 0x03800000;
4920 }
4921
4922 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4923
4924 if (((base_vma + i) & 0xfff) == 0xffe
4925 && insn_32bit
4926 && is_32bit_branch
4927 && last_was_32bit
4928 && ! last_was_branch)
4929 {
4930 bfd_signed_vma offset = 0;
4931 bfd_boolean force_target_arm = FALSE;
4932 bfd_boolean force_target_thumb = FALSE;
4933 bfd_vma target;
4934 enum elf32_arm_stub_type stub_type = arm_stub_none;
4935 struct a8_erratum_reloc key, *found;
4936 bfd_boolean use_plt = FALSE;
4937
4938 key.from = base_vma + i;
4939 found = (struct a8_erratum_reloc *)
4940 bsearch (&key, a8_relocs, num_a8_relocs,
4941 sizeof (struct a8_erratum_reloc),
4942 &a8_reloc_compare);
4943
4944 if (found)
4945 {
4946 char *error_message = NULL;
4947 struct elf_link_hash_entry *entry;
4948
4949 /* We don't care about the error returned from this
4950 function, only if there is glue or not. */
4951 entry = find_thumb_glue (info, found->sym_name,
4952 &error_message);
4953
4954 if (entry)
4955 found->non_a8_stub = TRUE;
4956
4957 /* Keep a simpler condition, for the sake of clarity. */
4958 if (htab->root.splt != NULL && found->hash != NULL
4959 && found->hash->root.plt.offset != (bfd_vma) -1)
4960 use_plt = TRUE;
4961
4962 if (found->r_type == R_ARM_THM_CALL)
4963 {
4964 if (found->branch_type == ST_BRANCH_TO_ARM
4965 || use_plt)
4966 force_target_arm = TRUE;
4967 else
4968 force_target_thumb = TRUE;
4969 }
4970 }
4971
4972 /* Check if we have an offending branch instruction. */
4973
4974 if (found && found->non_a8_stub)
4975 /* We've already made a stub for this instruction, e.g.
4976 it's a long branch or a Thumb->ARM stub. Assume that
4977 stub will suffice to work around the A8 erratum (see
4978 setting of always_after_branch above). */
4979 ;
4980 else if (is_bcc)
4981 {
4982 offset = (insn & 0x7ff) << 1;
4983 offset |= (insn & 0x3f0000) >> 4;
4984 offset |= (insn & 0x2000) ? 0x40000 : 0;
4985 offset |= (insn & 0x800) ? 0x80000 : 0;
4986 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4987 if (offset & 0x100000)
4988 offset |= ~ ((bfd_signed_vma) 0xfffff);
4989 stub_type = arm_stub_a8_veneer_b_cond;
4990 }
4991 else if (is_b || is_bl || is_blx)
4992 {
4993 int s = (insn & 0x4000000) != 0;
4994 int j1 = (insn & 0x2000) != 0;
4995 int j2 = (insn & 0x800) != 0;
4996 int i1 = !(j1 ^ s);
4997 int i2 = !(j2 ^ s);
4998
4999 offset = (insn & 0x7ff) << 1;
5000 offset |= (insn & 0x3ff0000) >> 4;
5001 offset |= i2 << 22;
5002 offset |= i1 << 23;
5003 offset |= s << 24;
5004 if (offset & 0x1000000)
5005 offset |= ~ ((bfd_signed_vma) 0xffffff);
5006
5007 if (is_blx)
5008 offset &= ~ ((bfd_signed_vma) 3);
5009
5010 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5011 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5012 }
5013
5014 if (stub_type != arm_stub_none)
5015 {
5016 bfd_vma pc_for_insn = base_vma + i + 4;
5017
5018 /* The original instruction is a BL, but the target is
5019 an ARM instruction. If we were not making a stub,
5020 the BL would have been converted to a BLX. Use the
5021 BLX stub instead in that case. */
5022 if (htab->use_blx && force_target_arm
5023 && stub_type == arm_stub_a8_veneer_bl)
5024 {
5025 stub_type = arm_stub_a8_veneer_blx;
5026 is_blx = TRUE;
5027 is_bl = FALSE;
5028 }
5029 /* Conversely, if the original instruction was
5030 BLX but the target is Thumb mode, use the BL
5031 stub. */
5032 else if (force_target_thumb
5033 && stub_type == arm_stub_a8_veneer_blx)
5034 {
5035 stub_type = arm_stub_a8_veneer_bl;
5036 is_blx = FALSE;
5037 is_bl = TRUE;
5038 }
5039
5040 if (is_blx)
5041 pc_for_insn &= ~ ((bfd_vma) 3);
5042
5043 /* If we found a relocation, use the proper destination,
5044 not the offset in the (unrelocated) instruction.
5045 Note this is always done if we switched the stub type
5046 above. */
5047 if (found)
5048 offset =
5049 (bfd_signed_vma) (found->destination - pc_for_insn);
5050
5051 /* If the stub will use a Thumb-mode branch to a
5052 PLT target, redirect it to the preceding Thumb
5053 entry point. */
5054 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5055 offset -= PLT_THUMB_STUB_SIZE;
5056
5057 target = pc_for_insn + offset;
5058
5059 /* The BLX stub is ARM-mode code. Adjust the offset to
5060 take the different PC value (+8 instead of +4) into
5061 account. */
5062 if (stub_type == arm_stub_a8_veneer_blx)
5063 offset += 4;
5064
5065 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5066 {
5067 char *stub_name = NULL;
5068
5069 if (num_a8_fixes == a8_fix_table_size)
5070 {
5071 a8_fix_table_size *= 2;
5072 a8_fixes = (struct a8_erratum_fix *)
5073 bfd_realloc (a8_fixes,
5074 sizeof (struct a8_erratum_fix)
5075 * a8_fix_table_size);
5076 }
5077
5078 if (num_a8_fixes < prev_num_a8_fixes)
5079 {
5080 /* If we're doing a subsequent scan,
5081 check if we've found the same fix as
5082 before, and try and reuse the stub
5083 name. */
5084 stub_name = a8_fixes[num_a8_fixes].stub_name;
5085 if ((a8_fixes[num_a8_fixes].section != section)
5086 || (a8_fixes[num_a8_fixes].offset != i))
5087 {
5088 free (stub_name);
5089 stub_name = NULL;
5090 *stub_changed_p = TRUE;
5091 }
5092 }
5093
5094 if (!stub_name)
5095 {
5096 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5097 if (stub_name != NULL)
5098 sprintf (stub_name, "%x:%x", section->id, i);
5099 }
5100
5101 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5102 a8_fixes[num_a8_fixes].section = section;
5103 a8_fixes[num_a8_fixes].offset = i;
5104 a8_fixes[num_a8_fixes].addend = offset;
5105 a8_fixes[num_a8_fixes].orig_insn = insn;
5106 a8_fixes[num_a8_fixes].stub_name = stub_name;
5107 a8_fixes[num_a8_fixes].stub_type = stub_type;
5108 a8_fixes[num_a8_fixes].branch_type =
5109 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5110
5111 num_a8_fixes++;
5112 }
5113 }
5114 }
5115
5116 i += insn_32bit ? 4 : 2;
5117 last_was_32bit = insn_32bit;
5118 last_was_branch = is_32bit_branch;
5119 }
5120 }
5121
5122 if (elf_section_data (section)->this_hdr.contents == NULL)
5123 free (contents);
5124 }
5125
5126 *a8_fixes_p = a8_fixes;
5127 *num_a8_fixes_p = num_a8_fixes;
5128 *a8_fix_table_size_p = a8_fix_table_size;
5129
5130 return FALSE;
5131 }
5132
5133 /* Determine and set the size of the stub section for a final link.
5134
5135 The basic idea here is to examine all the relocations looking for
5136 PC-relative calls to a target that is unreachable with a "bl"
5137 instruction. */
5138
5139 bfd_boolean
5140 elf32_arm_size_stubs (bfd *output_bfd,
5141 bfd *stub_bfd,
5142 struct bfd_link_info *info,
5143 bfd_signed_vma group_size,
5144 asection * (*add_stub_section) (const char *, asection *,
5145 unsigned int),
5146 void (*layout_sections_again) (void))
5147 {
5148 bfd_size_type stub_group_size;
5149 bfd_boolean stubs_always_after_branch;
5150 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5151 struct a8_erratum_fix *a8_fixes = NULL;
5152 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
5153 struct a8_erratum_reloc *a8_relocs = NULL;
5154 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
5155
5156 if (htab == NULL)
5157 return FALSE;
5158
5159 if (htab->fix_cortex_a8)
5160 {
5161 a8_fixes = (struct a8_erratum_fix *)
5162 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
5163 a8_relocs = (struct a8_erratum_reloc *)
5164 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
5165 }
5166
5167 /* Propagate mach to stub bfd, because it may not have been
5168 finalized when we created stub_bfd. */
5169 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
5170 bfd_get_mach (output_bfd));
5171
5172 /* Stash our params away. */
5173 htab->stub_bfd = stub_bfd;
5174 htab->add_stub_section = add_stub_section;
5175 htab->layout_sections_again = layout_sections_again;
5176 stubs_always_after_branch = group_size < 0;
5177
5178 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5179 as the first half of a 32-bit branch straddling two 4K pages. This is a
5180 crude way of enforcing that. */
5181 if (htab->fix_cortex_a8)
5182 stubs_always_after_branch = 1;
5183
5184 if (group_size < 0)
5185 stub_group_size = -group_size;
5186 else
5187 stub_group_size = group_size;
5188
5189 if (stub_group_size == 1)
5190 {
5191 /* Default values. */
5192 /* Thumb branch range is +-4MB has to be used as the default
5193 maximum size (a given section can contain both ARM and Thumb
5194 code, so the worst case has to be taken into account).
5195
5196 This value is 24K less than that, which allows for 2025
5197 12-byte stubs. If we exceed that, then we will fail to link.
5198 The user will have to relink with an explicit group size
5199 option. */
5200 stub_group_size = 4170000;
5201 }
5202
5203 group_sections (htab, stub_group_size, stubs_always_after_branch);
5204
5205 /* If we're applying the cortex A8 fix, we need to determine the
5206 program header size now, because we cannot change it later --
5207 that could alter section placements. Notice the A8 erratum fix
5208 ends up requiring the section addresses to remain unchanged
5209 modulo the page size. That's something we cannot represent
5210 inside BFD, and we don't want to force the section alignment to
5211 be the page size. */
5212 if (htab->fix_cortex_a8)
5213 (*htab->layout_sections_again) ();
5214
5215 while (1)
5216 {
5217 bfd *input_bfd;
5218 unsigned int bfd_indx;
5219 asection *stub_sec;
5220 bfd_boolean stub_changed = FALSE;
5221 unsigned prev_num_a8_fixes = num_a8_fixes;
5222
5223 num_a8_fixes = 0;
5224 for (input_bfd = info->input_bfds, bfd_indx = 0;
5225 input_bfd != NULL;
5226 input_bfd = input_bfd->link.next, bfd_indx++)
5227 {
5228 Elf_Internal_Shdr *symtab_hdr;
5229 asection *section;
5230 Elf_Internal_Sym *local_syms = NULL;
5231
5232 if (!is_arm_elf (input_bfd))
5233 continue;
5234
5235 num_a8_relocs = 0;
5236
5237 /* We'll need the symbol table in a second. */
5238 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5239 if (symtab_hdr->sh_info == 0)
5240 continue;
5241
5242 /* Walk over each section attached to the input bfd. */
5243 for (section = input_bfd->sections;
5244 section != NULL;
5245 section = section->next)
5246 {
5247 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5248
5249 /* If there aren't any relocs, then there's nothing more
5250 to do. */
5251 if ((section->flags & SEC_RELOC) == 0
5252 || section->reloc_count == 0
5253 || (section->flags & SEC_CODE) == 0)
5254 continue;
5255
5256 /* If this section is a link-once section that will be
5257 discarded, then don't create any stubs. */
5258 if (section->output_section == NULL
5259 || section->output_section->owner != output_bfd)
5260 continue;
5261
5262 /* Get the relocs. */
5263 internal_relocs
5264 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5265 NULL, info->keep_memory);
5266 if (internal_relocs == NULL)
5267 goto error_ret_free_local;
5268
5269 /* Now examine each relocation. */
5270 irela = internal_relocs;
5271 irelaend = irela + section->reloc_count;
5272 for (; irela < irelaend; irela++)
5273 {
5274 unsigned int r_type, r_indx;
5275 enum elf32_arm_stub_type stub_type;
5276 struct elf32_arm_stub_hash_entry *stub_entry;
5277 asection *sym_sec;
5278 bfd_vma sym_value;
5279 bfd_vma destination;
5280 struct elf32_arm_link_hash_entry *hash;
5281 const char *sym_name;
5282 char *stub_name;
5283 const asection *id_sec;
5284 unsigned char st_type;
5285 enum arm_st_branch_type branch_type;
5286 bfd_boolean created_stub = FALSE;
5287
5288 r_type = ELF32_R_TYPE (irela->r_info);
5289 r_indx = ELF32_R_SYM (irela->r_info);
5290
5291 if (r_type >= (unsigned int) R_ARM_max)
5292 {
5293 bfd_set_error (bfd_error_bad_value);
5294 error_ret_free_internal:
5295 if (elf_section_data (section)->relocs == NULL)
5296 free (internal_relocs);
5297 /* Fall through. */
5298 error_ret_free_local:
5299 if (local_syms != NULL
5300 && (symtab_hdr->contents
5301 != (unsigned char *) local_syms))
5302 free (local_syms);
5303 return FALSE;
5304 }
5305
5306 hash = NULL;
5307 if (r_indx >= symtab_hdr->sh_info)
5308 hash = elf32_arm_hash_entry
5309 (elf_sym_hashes (input_bfd)
5310 [r_indx - symtab_hdr->sh_info]);
5311
5312 /* Only look for stubs on branch instructions, or
5313 non-relaxed TLSCALL */
5314 if ((r_type != (unsigned int) R_ARM_CALL)
5315 && (r_type != (unsigned int) R_ARM_THM_CALL)
5316 && (r_type != (unsigned int) R_ARM_JUMP24)
5317 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5318 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5319 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5320 && (r_type != (unsigned int) R_ARM_PLT32)
5321 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5322 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5323 && r_type == elf32_arm_tls_transition
5324 (info, r_type, &hash->root)
5325 && ((hash ? hash->tls_type
5326 : (elf32_arm_local_got_tls_type
5327 (input_bfd)[r_indx]))
5328 & GOT_TLS_GDESC) != 0))
5329 continue;
5330
5331 /* Now determine the call target, its name, value,
5332 section. */
5333 sym_sec = NULL;
5334 sym_value = 0;
5335 destination = 0;
5336 sym_name = NULL;
5337
5338 if (r_type == (unsigned int) R_ARM_TLS_CALL
5339 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5340 {
5341 /* A non-relaxed TLS call. The target is the
5342 plt-resident trampoline and nothing to do
5343 with the symbol. */
5344 BFD_ASSERT (htab->tls_trampoline > 0);
5345 sym_sec = htab->root.splt;
5346 sym_value = htab->tls_trampoline;
5347 hash = 0;
5348 st_type = STT_FUNC;
5349 branch_type = ST_BRANCH_TO_ARM;
5350 }
5351 else if (!hash)
5352 {
5353 /* It's a local symbol. */
5354 Elf_Internal_Sym *sym;
5355
5356 if (local_syms == NULL)
5357 {
5358 local_syms
5359 = (Elf_Internal_Sym *) symtab_hdr->contents;
5360 if (local_syms == NULL)
5361 local_syms
5362 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5363 symtab_hdr->sh_info, 0,
5364 NULL, NULL, NULL);
5365 if (local_syms == NULL)
5366 goto error_ret_free_internal;
5367 }
5368
5369 sym = local_syms + r_indx;
5370 if (sym->st_shndx == SHN_UNDEF)
5371 sym_sec = bfd_und_section_ptr;
5372 else if (sym->st_shndx == SHN_ABS)
5373 sym_sec = bfd_abs_section_ptr;
5374 else if (sym->st_shndx == SHN_COMMON)
5375 sym_sec = bfd_com_section_ptr;
5376 else
5377 sym_sec =
5378 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5379
5380 if (!sym_sec)
5381 /* This is an undefined symbol. It can never
5382 be resolved. */
5383 continue;
5384
5385 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5386 sym_value = sym->st_value;
5387 destination = (sym_value + irela->r_addend
5388 + sym_sec->output_offset
5389 + sym_sec->output_section->vma);
5390 st_type = ELF_ST_TYPE (sym->st_info);
5391 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5392 sym_name
5393 = bfd_elf_string_from_elf_section (input_bfd,
5394 symtab_hdr->sh_link,
5395 sym->st_name);
5396 }
5397 else
5398 {
5399 /* It's an external symbol. */
5400 while (hash->root.root.type == bfd_link_hash_indirect
5401 || hash->root.root.type == bfd_link_hash_warning)
5402 hash = ((struct elf32_arm_link_hash_entry *)
5403 hash->root.root.u.i.link);
5404
5405 if (hash->root.root.type == bfd_link_hash_defined
5406 || hash->root.root.type == bfd_link_hash_defweak)
5407 {
5408 sym_sec = hash->root.root.u.def.section;
5409 sym_value = hash->root.root.u.def.value;
5410
5411 struct elf32_arm_link_hash_table *globals =
5412 elf32_arm_hash_table (info);
5413
5414 /* For a destination in a shared library,
5415 use the PLT stub as target address to
5416 decide whether a branch stub is
5417 needed. */
5418 if (globals != NULL
5419 && globals->root.splt != NULL
5420 && hash != NULL
5421 && hash->root.plt.offset != (bfd_vma) -1)
5422 {
5423 sym_sec = globals->root.splt;
5424 sym_value = hash->root.plt.offset;
5425 if (sym_sec->output_section != NULL)
5426 destination = (sym_value
5427 + sym_sec->output_offset
5428 + sym_sec->output_section->vma);
5429 }
5430 else if (sym_sec->output_section != NULL)
5431 destination = (sym_value + irela->r_addend
5432 + sym_sec->output_offset
5433 + sym_sec->output_section->vma);
5434 }
5435 else if ((hash->root.root.type == bfd_link_hash_undefined)
5436 || (hash->root.root.type == bfd_link_hash_undefweak))
5437 {
5438 /* For a shared library, use the PLT stub as
5439 target address to decide whether a long
5440 branch stub is needed.
5441 For absolute code, they cannot be handled. */
5442 struct elf32_arm_link_hash_table *globals =
5443 elf32_arm_hash_table (info);
5444
5445 if (globals != NULL
5446 && globals->root.splt != NULL
5447 && hash != NULL
5448 && hash->root.plt.offset != (bfd_vma) -1)
5449 {
5450 sym_sec = globals->root.splt;
5451 sym_value = hash->root.plt.offset;
5452 if (sym_sec->output_section != NULL)
5453 destination = (sym_value
5454 + sym_sec->output_offset
5455 + sym_sec->output_section->vma);
5456 }
5457 else
5458 continue;
5459 }
5460 else
5461 {
5462 bfd_set_error (bfd_error_bad_value);
5463 goto error_ret_free_internal;
5464 }
5465 st_type = hash->root.type;
5466 branch_type = hash->root.target_internal;
5467 sym_name = hash->root.root.root.string;
5468 }
5469
5470 do
5471 {
5472 /* Determine what (if any) linker stub is needed. */
5473 stub_type = arm_type_of_stub (info, section, irela,
5474 st_type, &branch_type,
5475 hash, destination, sym_sec,
5476 input_bfd, sym_name);
5477 if (stub_type == arm_stub_none)
5478 break;
5479
5480 /* Support for grouping stub sections. */
5481 id_sec = htab->stub_group[section->id].link_sec;
5482
5483 /* Get the name of this stub. */
5484 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5485 irela, stub_type);
5486 if (!stub_name)
5487 goto error_ret_free_internal;
5488
5489 /* We've either created a stub for this reloc already,
5490 or we are about to. */
5491 created_stub = TRUE;
5492
5493 stub_entry = arm_stub_hash_lookup
5494 (&htab->stub_hash_table, stub_name,
5495 FALSE, FALSE);
5496 if (stub_entry != NULL)
5497 {
5498 /* The proper stub has already been created. */
5499 free (stub_name);
5500 stub_entry->target_value = sym_value;
5501 break;
5502 }
5503
5504 stub_entry = elf32_arm_add_stub (stub_name, section,
5505 htab);
5506 if (stub_entry == NULL)
5507 {
5508 free (stub_name);
5509 goto error_ret_free_internal;
5510 }
5511
5512 stub_entry->target_value = sym_value;
5513 stub_entry->target_section = sym_sec;
5514 stub_entry->stub_type = stub_type;
5515 stub_entry->h = hash;
5516 stub_entry->branch_type = branch_type;
5517
5518 if (sym_name == NULL)
5519 sym_name = "unnamed";
5520 stub_entry->output_name = (char *)
5521 bfd_alloc (htab->stub_bfd,
5522 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5523 + strlen (sym_name));
5524 if (stub_entry->output_name == NULL)
5525 {
5526 free (stub_name);
5527 goto error_ret_free_internal;
5528 }
5529
5530 /* For historical reasons, use the existing names for
5531 ARM-to-Thumb and Thumb-to-ARM stubs. */
5532 if ((r_type == (unsigned int) R_ARM_THM_CALL
5533 || r_type == (unsigned int) R_ARM_THM_JUMP24
5534 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5535 && branch_type == ST_BRANCH_TO_ARM)
5536 sprintf (stub_entry->output_name,
5537 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5538 else if ((r_type == (unsigned int) R_ARM_CALL
5539 || r_type == (unsigned int) R_ARM_JUMP24)
5540 && branch_type == ST_BRANCH_TO_THUMB)
5541 sprintf (stub_entry->output_name,
5542 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5543 else
5544 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5545 sym_name);
5546
5547 stub_changed = TRUE;
5548 }
5549 while (0);
5550
5551 /* Look for relocations which might trigger Cortex-A8
5552 erratum. */
5553 if (htab->fix_cortex_a8
5554 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5555 || r_type == (unsigned int) R_ARM_THM_JUMP19
5556 || r_type == (unsigned int) R_ARM_THM_CALL
5557 || r_type == (unsigned int) R_ARM_THM_XPC22))
5558 {
5559 bfd_vma from = section->output_section->vma
5560 + section->output_offset
5561 + irela->r_offset;
5562
5563 if ((from & 0xfff) == 0xffe)
5564 {
5565 /* Found a candidate. Note we haven't checked the
5566 destination is within 4K here: if we do so (and
5567 don't create an entry in a8_relocs) we can't tell
5568 that a branch should have been relocated when
5569 scanning later. */
5570 if (num_a8_relocs == a8_reloc_table_size)
5571 {
5572 a8_reloc_table_size *= 2;
5573 a8_relocs = (struct a8_erratum_reloc *)
5574 bfd_realloc (a8_relocs,
5575 sizeof (struct a8_erratum_reloc)
5576 * a8_reloc_table_size);
5577 }
5578
5579 a8_relocs[num_a8_relocs].from = from;
5580 a8_relocs[num_a8_relocs].destination = destination;
5581 a8_relocs[num_a8_relocs].r_type = r_type;
5582 a8_relocs[num_a8_relocs].branch_type = branch_type;
5583 a8_relocs[num_a8_relocs].sym_name = sym_name;
5584 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5585 a8_relocs[num_a8_relocs].hash = hash;
5586
5587 num_a8_relocs++;
5588 }
5589 }
5590 }
5591
5592 /* We're done with the internal relocs, free them. */
5593 if (elf_section_data (section)->relocs == NULL)
5594 free (internal_relocs);
5595 }
5596
5597 if (htab->fix_cortex_a8)
5598 {
5599 /* Sort relocs which might apply to Cortex-A8 erratum. */
5600 qsort (a8_relocs, num_a8_relocs,
5601 sizeof (struct a8_erratum_reloc),
5602 &a8_reloc_compare);
5603
5604 /* Scan for branches which might trigger Cortex-A8 erratum. */
5605 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5606 &num_a8_fixes, &a8_fix_table_size,
5607 a8_relocs, num_a8_relocs,
5608 prev_num_a8_fixes, &stub_changed)
5609 != 0)
5610 goto error_ret_free_local;
5611 }
5612 }
5613
5614 if (prev_num_a8_fixes != num_a8_fixes)
5615 stub_changed = TRUE;
5616
5617 if (!stub_changed)
5618 break;
5619
5620 /* OK, we've added some stubs. Find out the new size of the
5621 stub sections. */
5622 for (stub_sec = htab->stub_bfd->sections;
5623 stub_sec != NULL;
5624 stub_sec = stub_sec->next)
5625 {
5626 /* Ignore non-stub sections. */
5627 if (!strstr (stub_sec->name, STUB_SUFFIX))
5628 continue;
5629
5630 stub_sec->size = 0;
5631 }
5632
5633 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5634
5635 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5636 if (htab->fix_cortex_a8)
5637 for (i = 0; i < num_a8_fixes; i++)
5638 {
5639 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5640 a8_fixes[i].section, htab);
5641
5642 if (stub_sec == NULL)
5643 goto error_ret_free_local;
5644
5645 stub_sec->size
5646 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5647 NULL);
5648 }
5649
5650
5651 /* Ask the linker to do its stuff. */
5652 (*htab->layout_sections_again) ();
5653 }
5654
5655 /* Add stubs for Cortex-A8 erratum fixes now. */
5656 if (htab->fix_cortex_a8)
5657 {
5658 for (i = 0; i < num_a8_fixes; i++)
5659 {
5660 struct elf32_arm_stub_hash_entry *stub_entry;
5661 char *stub_name = a8_fixes[i].stub_name;
5662 asection *section = a8_fixes[i].section;
5663 unsigned int section_id = a8_fixes[i].section->id;
5664 asection *link_sec = htab->stub_group[section_id].link_sec;
5665 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5666 const insn_sequence *template_sequence;
5667 int template_size, size = 0;
5668
5669 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5670 TRUE, FALSE);
5671 if (stub_entry == NULL)
5672 {
5673 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5674 section->owner,
5675 stub_name);
5676 return FALSE;
5677 }
5678
5679 stub_entry->stub_sec = stub_sec;
5680 stub_entry->stub_offset = 0;
5681 stub_entry->id_sec = link_sec;
5682 stub_entry->stub_type = a8_fixes[i].stub_type;
5683 stub_entry->target_section = a8_fixes[i].section;
5684 stub_entry->target_value = a8_fixes[i].offset;
5685 stub_entry->target_addend = a8_fixes[i].addend;
5686 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5687 stub_entry->branch_type = a8_fixes[i].branch_type;
5688
5689 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5690 &template_sequence,
5691 &template_size);
5692
5693 stub_entry->stub_size = size;
5694 stub_entry->stub_template = template_sequence;
5695 stub_entry->stub_template_size = template_size;
5696 }
5697
5698 /* Stash the Cortex-A8 erratum fix array for use later in
5699 elf32_arm_write_section(). */
5700 htab->a8_erratum_fixes = a8_fixes;
5701 htab->num_a8_erratum_fixes = num_a8_fixes;
5702 }
5703 else
5704 {
5705 htab->a8_erratum_fixes = NULL;
5706 htab->num_a8_erratum_fixes = 0;
5707 }
5708 return TRUE;
5709 }
5710
5711 /* Build all the stubs associated with the current output file. The
5712 stubs are kept in a hash table attached to the main linker hash
5713 table. We also set up the .plt entries for statically linked PIC
5714 functions here. This function is called via arm_elf_finish in the
5715 linker. */
5716
5717 bfd_boolean
5718 elf32_arm_build_stubs (struct bfd_link_info *info)
5719 {
5720 asection *stub_sec;
5721 struct bfd_hash_table *table;
5722 struct elf32_arm_link_hash_table *htab;
5723
5724 htab = elf32_arm_hash_table (info);
5725 if (htab == NULL)
5726 return FALSE;
5727
5728 for (stub_sec = htab->stub_bfd->sections;
5729 stub_sec != NULL;
5730 stub_sec = stub_sec->next)
5731 {
5732 bfd_size_type size;
5733
5734 /* Ignore non-stub sections. */
5735 if (!strstr (stub_sec->name, STUB_SUFFIX))
5736 continue;
5737
5738 /* Allocate memory to hold the linker stubs. */
5739 size = stub_sec->size;
5740 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5741 if (stub_sec->contents == NULL && size != 0)
5742 return FALSE;
5743 stub_sec->size = 0;
5744 }
5745
5746 /* Build the stubs as directed by the stub hash table. */
5747 table = &htab->stub_hash_table;
5748 bfd_hash_traverse (table, arm_build_one_stub, info);
5749 if (htab->fix_cortex_a8)
5750 {
5751 /* Place the cortex a8 stubs last. */
5752 htab->fix_cortex_a8 = -1;
5753 bfd_hash_traverse (table, arm_build_one_stub, info);
5754 }
5755
5756 return TRUE;
5757 }
5758
5759 /* Locate the Thumb encoded calling stub for NAME. */
5760
5761 static struct elf_link_hash_entry *
5762 find_thumb_glue (struct bfd_link_info *link_info,
5763 const char *name,
5764 char **error_message)
5765 {
5766 char *tmp_name;
5767 struct elf_link_hash_entry *hash;
5768 struct elf32_arm_link_hash_table *hash_table;
5769
5770 /* We need a pointer to the armelf specific hash table. */
5771 hash_table = elf32_arm_hash_table (link_info);
5772 if (hash_table == NULL)
5773 return NULL;
5774
5775 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5776 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5777
5778 BFD_ASSERT (tmp_name);
5779
5780 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5781
5782 hash = elf_link_hash_lookup
5783 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5784
5785 if (hash == NULL
5786 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5787 tmp_name, name) == -1)
5788 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5789
5790 free (tmp_name);
5791
5792 return hash;
5793 }
5794
5795 /* Locate the ARM encoded calling stub for NAME. */
5796
5797 static struct elf_link_hash_entry *
5798 find_arm_glue (struct bfd_link_info *link_info,
5799 const char *name,
5800 char **error_message)
5801 {
5802 char *tmp_name;
5803 struct elf_link_hash_entry *myh;
5804 struct elf32_arm_link_hash_table *hash_table;
5805
5806 /* We need a pointer to the elfarm specific hash table. */
5807 hash_table = elf32_arm_hash_table (link_info);
5808 if (hash_table == NULL)
5809 return NULL;
5810
5811 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5812 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5813
5814 BFD_ASSERT (tmp_name);
5815
5816 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5817
5818 myh = elf_link_hash_lookup
5819 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5820
5821 if (myh == NULL
5822 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5823 tmp_name, name) == -1)
5824 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5825
5826 free (tmp_name);
5827
5828 return myh;
5829 }
5830
5831 /* ARM->Thumb glue (static images):
5832
5833 .arm
5834 __func_from_arm:
5835 ldr r12, __func_addr
5836 bx r12
5837 __func_addr:
5838 .word func @ behave as if you saw a ARM_32 reloc.
5839
5840 (v5t static images)
5841 .arm
5842 __func_from_arm:
5843 ldr pc, __func_addr
5844 __func_addr:
5845 .word func @ behave as if you saw a ARM_32 reloc.
5846
5847 (relocatable images)
5848 .arm
5849 __func_from_arm:
5850 ldr r12, __func_offset
5851 add r12, r12, pc
5852 bx r12
5853 __func_offset:
5854 .word func - . */
5855
5856 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5857 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5858 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5859 static const insn32 a2t3_func_addr_insn = 0x00000001;
5860
5861 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5862 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5863 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5864
5865 #define ARM2THUMB_PIC_GLUE_SIZE 16
5866 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5867 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5868 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5869
5870 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5871
5872 .thumb .thumb
5873 .align 2 .align 2
5874 __func_from_thumb: __func_from_thumb:
5875 bx pc push {r6, lr}
5876 nop ldr r6, __func_addr
5877 .arm mov lr, pc
5878 b func bx r6
5879 .arm
5880 ;; back_to_thumb
5881 ldmia r13! {r6, lr}
5882 bx lr
5883 __func_addr:
5884 .word func */
5885
5886 #define THUMB2ARM_GLUE_SIZE 8
5887 static const insn16 t2a1_bx_pc_insn = 0x4778;
5888 static const insn16 t2a2_noop_insn = 0x46c0;
5889 static const insn32 t2a3_b_insn = 0xea000000;
5890
5891 #define VFP11_ERRATUM_VENEER_SIZE 8
5892 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
5893 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
5894
5895 #define ARM_BX_VENEER_SIZE 12
5896 static const insn32 armbx1_tst_insn = 0xe3100001;
5897 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5898 static const insn32 armbx3_bx_insn = 0xe12fff10;
5899
5900 #ifndef ELFARM_NABI_C_INCLUDED
5901 static void
5902 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5903 {
5904 asection * s;
5905 bfd_byte * contents;
5906
5907 if (size == 0)
5908 {
5909 /* Do not include empty glue sections in the output. */
5910 if (abfd != NULL)
5911 {
5912 s = bfd_get_linker_section (abfd, name);
5913 if (s != NULL)
5914 s->flags |= SEC_EXCLUDE;
5915 }
5916 return;
5917 }
5918
5919 BFD_ASSERT (abfd != NULL);
5920
5921 s = bfd_get_linker_section (abfd, name);
5922 BFD_ASSERT (s != NULL);
5923
5924 contents = (bfd_byte *) bfd_alloc (abfd, size);
5925
5926 BFD_ASSERT (s->size == size);
5927 s->contents = contents;
5928 }
5929
5930 bfd_boolean
5931 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5932 {
5933 struct elf32_arm_link_hash_table * globals;
5934
5935 globals = elf32_arm_hash_table (info);
5936 BFD_ASSERT (globals != NULL);
5937
5938 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5939 globals->arm_glue_size,
5940 ARM2THUMB_GLUE_SECTION_NAME);
5941
5942 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5943 globals->thumb_glue_size,
5944 THUMB2ARM_GLUE_SECTION_NAME);
5945
5946 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5947 globals->vfp11_erratum_glue_size,
5948 VFP11_ERRATUM_VENEER_SECTION_NAME);
5949
5950 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5951 globals->stm32l4xx_erratum_glue_size,
5952 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
5953
5954 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5955 globals->bx_glue_size,
5956 ARM_BX_GLUE_SECTION_NAME);
5957
5958 return TRUE;
5959 }
5960
5961 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5962 returns the symbol identifying the stub. */
5963
5964 static struct elf_link_hash_entry *
5965 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5966 struct elf_link_hash_entry * h)
5967 {
5968 const char * name = h->root.root.string;
5969 asection * s;
5970 char * tmp_name;
5971 struct elf_link_hash_entry * myh;
5972 struct bfd_link_hash_entry * bh;
5973 struct elf32_arm_link_hash_table * globals;
5974 bfd_vma val;
5975 bfd_size_type size;
5976
5977 globals = elf32_arm_hash_table (link_info);
5978 BFD_ASSERT (globals != NULL);
5979 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5980
5981 s = bfd_get_linker_section
5982 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5983
5984 BFD_ASSERT (s != NULL);
5985
5986 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5987 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5988
5989 BFD_ASSERT (tmp_name);
5990
5991 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5992
5993 myh = elf_link_hash_lookup
5994 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5995
5996 if (myh != NULL)
5997 {
5998 /* We've already seen this guy. */
5999 free (tmp_name);
6000 return myh;
6001 }
6002
6003 /* The only trick here is using hash_table->arm_glue_size as the value.
6004 Even though the section isn't allocated yet, this is where we will be
6005 putting it. The +1 on the value marks that the stub has not been
6006 output yet - not that it is a Thumb function. */
6007 bh = NULL;
6008 val = globals->arm_glue_size + 1;
6009 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6010 tmp_name, BSF_GLOBAL, s, val,
6011 NULL, TRUE, FALSE, &bh);
6012
6013 myh = (struct elf_link_hash_entry *) bh;
6014 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6015 myh->forced_local = 1;
6016
6017 free (tmp_name);
6018
6019 if (bfd_link_pic (link_info)
6020 || globals->root.is_relocatable_executable
6021 || globals->pic_veneer)
6022 size = ARM2THUMB_PIC_GLUE_SIZE;
6023 else if (globals->use_blx)
6024 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
6025 else
6026 size = ARM2THUMB_STATIC_GLUE_SIZE;
6027
6028 s->size += size;
6029 globals->arm_glue_size += size;
6030
6031 return myh;
6032 }
6033
6034 /* Allocate space for ARMv4 BX veneers. */
6035
6036 static void
6037 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
6038 {
6039 asection * s;
6040 struct elf32_arm_link_hash_table *globals;
6041 char *tmp_name;
6042 struct elf_link_hash_entry *myh;
6043 struct bfd_link_hash_entry *bh;
6044 bfd_vma val;
6045
6046 /* BX PC does not need a veneer. */
6047 if (reg == 15)
6048 return;
6049
6050 globals = elf32_arm_hash_table (link_info);
6051 BFD_ASSERT (globals != NULL);
6052 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6053
6054 /* Check if this veneer has already been allocated. */
6055 if (globals->bx_glue_offset[reg])
6056 return;
6057
6058 s = bfd_get_linker_section
6059 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
6060
6061 BFD_ASSERT (s != NULL);
6062
6063 /* Add symbol for veneer. */
6064 tmp_name = (char *)
6065 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
6066
6067 BFD_ASSERT (tmp_name);
6068
6069 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
6070
6071 myh = elf_link_hash_lookup
6072 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
6073
6074 BFD_ASSERT (myh == NULL);
6075
6076 bh = NULL;
6077 val = globals->bx_glue_size;
6078 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6079 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6080 NULL, TRUE, FALSE, &bh);
6081
6082 myh = (struct elf_link_hash_entry *) bh;
6083 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6084 myh->forced_local = 1;
6085
6086 s->size += ARM_BX_VENEER_SIZE;
6087 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
6088 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
6089 }
6090
6091
6092 /* Add an entry to the code/data map for section SEC. */
6093
6094 static void
6095 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
6096 {
6097 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6098 unsigned int newidx;
6099
6100 if (sec_data->map == NULL)
6101 {
6102 sec_data->map = (elf32_arm_section_map *)
6103 bfd_malloc (sizeof (elf32_arm_section_map));
6104 sec_data->mapcount = 0;
6105 sec_data->mapsize = 1;
6106 }
6107
6108 newidx = sec_data->mapcount++;
6109
6110 if (sec_data->mapcount > sec_data->mapsize)
6111 {
6112 sec_data->mapsize *= 2;
6113 sec_data->map = (elf32_arm_section_map *)
6114 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
6115 * sizeof (elf32_arm_section_map));
6116 }
6117
6118 if (sec_data->map)
6119 {
6120 sec_data->map[newidx].vma = vma;
6121 sec_data->map[newidx].type = type;
6122 }
6123 }
6124
6125
6126 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
6127 veneers are handled for now. */
6128
6129 static bfd_vma
6130 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
6131 elf32_vfp11_erratum_list *branch,
6132 bfd *branch_bfd,
6133 asection *branch_sec,
6134 unsigned int offset)
6135 {
6136 asection *s;
6137 struct elf32_arm_link_hash_table *hash_table;
6138 char *tmp_name;
6139 struct elf_link_hash_entry *myh;
6140 struct bfd_link_hash_entry *bh;
6141 bfd_vma val;
6142 struct _arm_elf_section_data *sec_data;
6143 elf32_vfp11_erratum_list *newerr;
6144
6145 hash_table = elf32_arm_hash_table (link_info);
6146 BFD_ASSERT (hash_table != NULL);
6147 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
6148
6149 s = bfd_get_linker_section
6150 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
6151
6152 sec_data = elf32_arm_section_data (s);
6153
6154 BFD_ASSERT (s != NULL);
6155
6156 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6157 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6158
6159 BFD_ASSERT (tmp_name);
6160
6161 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6162 hash_table->num_vfp11_fixes);
6163
6164 myh = elf_link_hash_lookup
6165 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6166
6167 BFD_ASSERT (myh == NULL);
6168
6169 bh = NULL;
6170 val = hash_table->vfp11_erratum_glue_size;
6171 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
6172 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6173 NULL, TRUE, FALSE, &bh);
6174
6175 myh = (struct elf_link_hash_entry *) bh;
6176 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6177 myh->forced_local = 1;
6178
6179 /* Link veneer back to calling location. */
6180 sec_data->erratumcount += 1;
6181 newerr = (elf32_vfp11_erratum_list *)
6182 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6183
6184 newerr->type = VFP11_ERRATUM_ARM_VENEER;
6185 newerr->vma = -1;
6186 newerr->u.v.branch = branch;
6187 newerr->u.v.id = hash_table->num_vfp11_fixes;
6188 branch->u.b.veneer = newerr;
6189
6190 newerr->next = sec_data->erratumlist;
6191 sec_data->erratumlist = newerr;
6192
6193 /* A symbol for the return from the veneer. */
6194 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6195 hash_table->num_vfp11_fixes);
6196
6197 myh = elf_link_hash_lookup
6198 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6199
6200 if (myh != NULL)
6201 abort ();
6202
6203 bh = NULL;
6204 val = offset + 4;
6205 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6206 branch_sec, val, NULL, TRUE, FALSE, &bh);
6207
6208 myh = (struct elf_link_hash_entry *) bh;
6209 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6210 myh->forced_local = 1;
6211
6212 free (tmp_name);
6213
6214 /* Generate a mapping symbol for the veneer section, and explicitly add an
6215 entry for that symbol to the code/data map for the section. */
6216 if (hash_table->vfp11_erratum_glue_size == 0)
6217 {
6218 bh = NULL;
6219 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
6220 ever requires this erratum fix. */
6221 _bfd_generic_link_add_one_symbol (link_info,
6222 hash_table->bfd_of_glue_owner, "$a",
6223 BSF_LOCAL, s, 0, NULL,
6224 TRUE, FALSE, &bh);
6225
6226 myh = (struct elf_link_hash_entry *) bh;
6227 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6228 myh->forced_local = 1;
6229
6230 /* The elf32_arm_init_maps function only cares about symbols from input
6231 BFDs. We must make a note of this generated mapping symbol
6232 ourselves so that code byteswapping works properly in
6233 elf32_arm_write_section. */
6234 elf32_arm_section_map_add (s, 'a', 0);
6235 }
6236
6237 s->size += VFP11_ERRATUM_VENEER_SIZE;
6238 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6239 hash_table->num_vfp11_fixes++;
6240
6241 /* The offset of the veneer. */
6242 return val;
6243 }
6244
6245 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
6246 veneers need to be handled because used only in Cortex-M. */
6247
6248 static bfd_vma
6249 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
6250 elf32_stm32l4xx_erratum_list *branch,
6251 bfd *branch_bfd,
6252 asection *branch_sec,
6253 unsigned int offset,
6254 bfd_size_type veneer_size)
6255 {
6256 asection *s;
6257 struct elf32_arm_link_hash_table *hash_table;
6258 char *tmp_name;
6259 struct elf_link_hash_entry *myh;
6260 struct bfd_link_hash_entry *bh;
6261 bfd_vma val;
6262 struct _arm_elf_section_data *sec_data;
6263 elf32_stm32l4xx_erratum_list *newerr;
6264
6265 hash_table = elf32_arm_hash_table (link_info);
6266 BFD_ASSERT (hash_table != NULL);
6267 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
6268
6269 s = bfd_get_linker_section
6270 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6271
6272 BFD_ASSERT (s != NULL);
6273
6274 sec_data = elf32_arm_section_data (s);
6275
6276 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6277 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
6278
6279 BFD_ASSERT (tmp_name);
6280
6281 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
6282 hash_table->num_stm32l4xx_fixes);
6283
6284 myh = elf_link_hash_lookup
6285 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6286
6287 BFD_ASSERT (myh == NULL);
6288
6289 bh = NULL;
6290 val = hash_table->stm32l4xx_erratum_glue_size;
6291 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
6292 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6293 NULL, TRUE, FALSE, &bh);
6294
6295 myh = (struct elf_link_hash_entry *) bh;
6296 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6297 myh->forced_local = 1;
6298
6299 /* Link veneer back to calling location. */
6300 sec_data->stm32l4xx_erratumcount += 1;
6301 newerr = (elf32_stm32l4xx_erratum_list *)
6302 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
6303
6304 newerr->type = STM32L4XX_ERRATUM_VENEER;
6305 newerr->vma = -1;
6306 newerr->u.v.branch = branch;
6307 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
6308 branch->u.b.veneer = newerr;
6309
6310 newerr->next = sec_data->stm32l4xx_erratumlist;
6311 sec_data->stm32l4xx_erratumlist = newerr;
6312
6313 /* A symbol for the return from the veneer. */
6314 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
6315 hash_table->num_stm32l4xx_fixes);
6316
6317 myh = elf_link_hash_lookup
6318 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6319
6320 if (myh != NULL)
6321 abort ();
6322
6323 bh = NULL;
6324 val = offset + 4;
6325 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6326 branch_sec, val, NULL, TRUE, FALSE, &bh);
6327
6328 myh = (struct elf_link_hash_entry *) bh;
6329 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6330 myh->forced_local = 1;
6331
6332 free (tmp_name);
6333
6334 /* Generate a mapping symbol for the veneer section, and explicitly add an
6335 entry for that symbol to the code/data map for the section. */
6336 if (hash_table->stm32l4xx_erratum_glue_size == 0)
6337 {
6338 bh = NULL;
6339 /* Creates a THUMB symbol since there is no other choice. */
6340 _bfd_generic_link_add_one_symbol (link_info,
6341 hash_table->bfd_of_glue_owner, "$t",
6342 BSF_LOCAL, s, 0, NULL,
6343 TRUE, FALSE, &bh);
6344
6345 myh = (struct elf_link_hash_entry *) bh;
6346 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6347 myh->forced_local = 1;
6348
6349 /* The elf32_arm_init_maps function only cares about symbols from input
6350 BFDs. We must make a note of this generated mapping symbol
6351 ourselves so that code byteswapping works properly in
6352 elf32_arm_write_section. */
6353 elf32_arm_section_map_add (s, 't', 0);
6354 }
6355
6356 s->size += veneer_size;
6357 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
6358 hash_table->num_stm32l4xx_fixes++;
6359
6360 /* The offset of the veneer. */
6361 return val;
6362 }
6363
6364 #define ARM_GLUE_SECTION_FLAGS \
6365 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6366 | SEC_READONLY | SEC_LINKER_CREATED)
6367
6368 /* Create a fake section for use by the ARM backend of the linker. */
6369
6370 static bfd_boolean
6371 arm_make_glue_section (bfd * abfd, const char * name)
6372 {
6373 asection * sec;
6374
6375 sec = bfd_get_linker_section (abfd, name);
6376 if (sec != NULL)
6377 /* Already made. */
6378 return TRUE;
6379
6380 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6381
6382 if (sec == NULL
6383 || !bfd_set_section_alignment (abfd, sec, 2))
6384 return FALSE;
6385
6386 /* Set the gc mark to prevent the section from being removed by garbage
6387 collection, despite the fact that no relocs refer to this section. */
6388 sec->gc_mark = 1;
6389
6390 return TRUE;
6391 }
6392
6393 /* Set size of .plt entries. This function is called from the
6394 linker scripts in ld/emultempl/{armelf}.em. */
6395
6396 void
6397 bfd_elf32_arm_use_long_plt (void)
6398 {
6399 elf32_arm_use_long_plt_entry = TRUE;
6400 }
6401
6402 /* Add the glue sections to ABFD. This function is called from the
6403 linker scripts in ld/emultempl/{armelf}.em. */
6404
6405 bfd_boolean
6406 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6407 struct bfd_link_info *info)
6408 {
6409 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
6410 bfd_boolean dostm32l4xx = globals
6411 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
6412 bfd_boolean addglue;
6413
6414 /* If we are only performing a partial
6415 link do not bother adding the glue. */
6416 if (bfd_link_relocatable (info))
6417 return TRUE;
6418
6419 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6420 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6421 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6422 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6423
6424 if (!dostm32l4xx)
6425 return addglue;
6426
6427 return addglue
6428 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6429 }
6430
6431 /* Select a BFD to be used to hold the sections used by the glue code.
6432 This function is called from the linker scripts in ld/emultempl/
6433 {armelf/pe}.em. */
6434
6435 bfd_boolean
6436 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6437 {
6438 struct elf32_arm_link_hash_table *globals;
6439
6440 /* If we are only performing a partial link
6441 do not bother getting a bfd to hold the glue. */
6442 if (bfd_link_relocatable (info))
6443 return TRUE;
6444
6445 /* Make sure we don't attach the glue sections to a dynamic object. */
6446 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6447
6448 globals = elf32_arm_hash_table (info);
6449 BFD_ASSERT (globals != NULL);
6450
6451 if (globals->bfd_of_glue_owner != NULL)
6452 return TRUE;
6453
6454 /* Save the bfd for later use. */
6455 globals->bfd_of_glue_owner = abfd;
6456
6457 return TRUE;
6458 }
6459
6460 static void
6461 check_use_blx (struct elf32_arm_link_hash_table *globals)
6462 {
6463 int cpu_arch;
6464
6465 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6466 Tag_CPU_arch);
6467
6468 if (globals->fix_arm1176)
6469 {
6470 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6471 globals->use_blx = 1;
6472 }
6473 else
6474 {
6475 if (cpu_arch > TAG_CPU_ARCH_V4T)
6476 globals->use_blx = 1;
6477 }
6478 }
6479
6480 bfd_boolean
6481 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6482 struct bfd_link_info *link_info)
6483 {
6484 Elf_Internal_Shdr *symtab_hdr;
6485 Elf_Internal_Rela *internal_relocs = NULL;
6486 Elf_Internal_Rela *irel, *irelend;
6487 bfd_byte *contents = NULL;
6488
6489 asection *sec;
6490 struct elf32_arm_link_hash_table *globals;
6491
6492 /* If we are only performing a partial link do not bother
6493 to construct any glue. */
6494 if (bfd_link_relocatable (link_info))
6495 return TRUE;
6496
6497 /* Here we have a bfd that is to be included on the link. We have a
6498 hook to do reloc rummaging, before section sizes are nailed down. */
6499 globals = elf32_arm_hash_table (link_info);
6500 BFD_ASSERT (globals != NULL);
6501
6502 check_use_blx (globals);
6503
6504 if (globals->byteswap_code && !bfd_big_endian (abfd))
6505 {
6506 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6507 abfd);
6508 return FALSE;
6509 }
6510
6511 /* PR 5398: If we have not decided to include any loadable sections in
6512 the output then we will not have a glue owner bfd. This is OK, it
6513 just means that there is nothing else for us to do here. */
6514 if (globals->bfd_of_glue_owner == NULL)
6515 return TRUE;
6516
6517 /* Rummage around all the relocs and map the glue vectors. */
6518 sec = abfd->sections;
6519
6520 if (sec == NULL)
6521 return TRUE;
6522
6523 for (; sec != NULL; sec = sec->next)
6524 {
6525 if (sec->reloc_count == 0)
6526 continue;
6527
6528 if ((sec->flags & SEC_EXCLUDE) != 0)
6529 continue;
6530
6531 symtab_hdr = & elf_symtab_hdr (abfd);
6532
6533 /* Load the relocs. */
6534 internal_relocs
6535 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6536
6537 if (internal_relocs == NULL)
6538 goto error_return;
6539
6540 irelend = internal_relocs + sec->reloc_count;
6541 for (irel = internal_relocs; irel < irelend; irel++)
6542 {
6543 long r_type;
6544 unsigned long r_index;
6545
6546 struct elf_link_hash_entry *h;
6547
6548 r_type = ELF32_R_TYPE (irel->r_info);
6549 r_index = ELF32_R_SYM (irel->r_info);
6550
6551 /* These are the only relocation types we care about. */
6552 if ( r_type != R_ARM_PC24
6553 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6554 continue;
6555
6556 /* Get the section contents if we haven't done so already. */
6557 if (contents == NULL)
6558 {
6559 /* Get cached copy if it exists. */
6560 if (elf_section_data (sec)->this_hdr.contents != NULL)
6561 contents = elf_section_data (sec)->this_hdr.contents;
6562 else
6563 {
6564 /* Go get them off disk. */
6565 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6566 goto error_return;
6567 }
6568 }
6569
6570 if (r_type == R_ARM_V4BX)
6571 {
6572 int reg;
6573
6574 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6575 record_arm_bx_glue (link_info, reg);
6576 continue;
6577 }
6578
6579 /* If the relocation is not against a symbol it cannot concern us. */
6580 h = NULL;
6581
6582 /* We don't care about local symbols. */
6583 if (r_index < symtab_hdr->sh_info)
6584 continue;
6585
6586 /* This is an external symbol. */
6587 r_index -= symtab_hdr->sh_info;
6588 h = (struct elf_link_hash_entry *)
6589 elf_sym_hashes (abfd)[r_index];
6590
6591 /* If the relocation is against a static symbol it must be within
6592 the current section and so cannot be a cross ARM/Thumb relocation. */
6593 if (h == NULL)
6594 continue;
6595
6596 /* If the call will go through a PLT entry then we do not need
6597 glue. */
6598 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6599 continue;
6600
6601 switch (r_type)
6602 {
6603 case R_ARM_PC24:
6604 /* This one is a call from arm code. We need to look up
6605 the target of the call. If it is a thumb target, we
6606 insert glue. */
6607 if (h->target_internal == ST_BRANCH_TO_THUMB)
6608 record_arm_to_thumb_glue (link_info, h);
6609 break;
6610
6611 default:
6612 abort ();
6613 }
6614 }
6615
6616 if (contents != NULL
6617 && elf_section_data (sec)->this_hdr.contents != contents)
6618 free (contents);
6619 contents = NULL;
6620
6621 if (internal_relocs != NULL
6622 && elf_section_data (sec)->relocs != internal_relocs)
6623 free (internal_relocs);
6624 internal_relocs = NULL;
6625 }
6626
6627 return TRUE;
6628
6629 error_return:
6630 if (contents != NULL
6631 && elf_section_data (sec)->this_hdr.contents != contents)
6632 free (contents);
6633 if (internal_relocs != NULL
6634 && elf_section_data (sec)->relocs != internal_relocs)
6635 free (internal_relocs);
6636
6637 return FALSE;
6638 }
6639 #endif
6640
6641
6642 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6643
6644 void
6645 bfd_elf32_arm_init_maps (bfd *abfd)
6646 {
6647 Elf_Internal_Sym *isymbuf;
6648 Elf_Internal_Shdr *hdr;
6649 unsigned int i, localsyms;
6650
6651 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6652 if (! is_arm_elf (abfd))
6653 return;
6654
6655 if ((abfd->flags & DYNAMIC) != 0)
6656 return;
6657
6658 hdr = & elf_symtab_hdr (abfd);
6659 localsyms = hdr->sh_info;
6660
6661 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6662 should contain the number of local symbols, which should come before any
6663 global symbols. Mapping symbols are always local. */
6664 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6665 NULL);
6666
6667 /* No internal symbols read? Skip this BFD. */
6668 if (isymbuf == NULL)
6669 return;
6670
6671 for (i = 0; i < localsyms; i++)
6672 {
6673 Elf_Internal_Sym *isym = &isymbuf[i];
6674 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6675 const char *name;
6676
6677 if (sec != NULL
6678 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6679 {
6680 name = bfd_elf_string_from_elf_section (abfd,
6681 hdr->sh_link, isym->st_name);
6682
6683 if (bfd_is_arm_special_symbol_name (name,
6684 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6685 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6686 }
6687 }
6688 }
6689
6690
6691 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6692 say what they wanted. */
6693
6694 void
6695 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6696 {
6697 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6698 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6699
6700 if (globals == NULL)
6701 return;
6702
6703 if (globals->fix_cortex_a8 == -1)
6704 {
6705 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6706 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6707 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6708 || out_attr[Tag_CPU_arch_profile].i == 0))
6709 globals->fix_cortex_a8 = 1;
6710 else
6711 globals->fix_cortex_a8 = 0;
6712 }
6713 }
6714
6715
6716 void
6717 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6718 {
6719 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6720 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6721
6722 if (globals == NULL)
6723 return;
6724 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6725 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6726 {
6727 switch (globals->vfp11_fix)
6728 {
6729 case BFD_ARM_VFP11_FIX_DEFAULT:
6730 case BFD_ARM_VFP11_FIX_NONE:
6731 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6732 break;
6733
6734 default:
6735 /* Give a warning, but do as the user requests anyway. */
6736 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6737 "workaround is not necessary for target architecture"), obfd);
6738 }
6739 }
6740 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6741 /* For earlier architectures, we might need the workaround, but do not
6742 enable it by default. If users is running with broken hardware, they
6743 must enable the erratum fix explicitly. */
6744 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6745 }
6746
6747 void
6748 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
6749 {
6750 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6751 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6752
6753 if (globals == NULL)
6754 return;
6755
6756 /* We assume only Cortex-M4 may require the fix. */
6757 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
6758 || out_attr[Tag_CPU_arch_profile].i != 'M')
6759 {
6760 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
6761 /* Give a warning, but do as the user requests anyway. */
6762 (*_bfd_error_handler)
6763 (_("%B: warning: selected STM32L4XX erratum "
6764 "workaround is not necessary for target architecture"), obfd);
6765 }
6766 }
6767
6768 enum bfd_arm_vfp11_pipe
6769 {
6770 VFP11_FMAC,
6771 VFP11_LS,
6772 VFP11_DS,
6773 VFP11_BAD
6774 };
6775
6776 /* Return a VFP register number. This is encoded as RX:X for single-precision
6777 registers, or X:RX for double-precision registers, where RX is the group of
6778 four bits in the instruction encoding and X is the single extension bit.
6779 RX and X fields are specified using their lowest (starting) bit. The return
6780 value is:
6781
6782 0...31: single-precision registers s0...s31
6783 32...63: double-precision registers d0...d31.
6784
6785 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6786 encounter VFP3 instructions, so we allow the full range for DP registers. */
6787
6788 static unsigned int
6789 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6790 unsigned int x)
6791 {
6792 if (is_double)
6793 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6794 else
6795 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6796 }
6797
6798 /* Set bits in *WMASK according to a register number REG as encoded by
6799 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6800
6801 static void
6802 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6803 {
6804 if (reg < 32)
6805 *wmask |= 1 << reg;
6806 else if (reg < 48)
6807 *wmask |= 3 << ((reg - 32) * 2);
6808 }
6809
6810 /* Return TRUE if WMASK overwrites anything in REGS. */
6811
6812 static bfd_boolean
6813 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6814 {
6815 int i;
6816
6817 for (i = 0; i < numregs; i++)
6818 {
6819 unsigned int reg = regs[i];
6820
6821 if (reg < 32 && (wmask & (1 << reg)) != 0)
6822 return TRUE;
6823
6824 reg -= 32;
6825
6826 if (reg >= 16)
6827 continue;
6828
6829 if ((wmask & (3 << (reg * 2))) != 0)
6830 return TRUE;
6831 }
6832
6833 return FALSE;
6834 }
6835
6836 /* In this function, we're interested in two things: finding input registers
6837 for VFP data-processing instructions, and finding the set of registers which
6838 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6839 hold the written set, so FLDM etc. are easy to deal with (we're only
6840 interested in 32 SP registers or 16 dp registers, due to the VFP version
6841 implemented by the chip in question). DP registers are marked by setting
6842 both SP registers in the write mask). */
6843
6844 static enum bfd_arm_vfp11_pipe
6845 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6846 int *numregs)
6847 {
6848 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6849 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6850
6851 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6852 {
6853 unsigned int pqrs;
6854 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6855 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6856
6857 pqrs = ((insn & 0x00800000) >> 20)
6858 | ((insn & 0x00300000) >> 19)
6859 | ((insn & 0x00000040) >> 6);
6860
6861 switch (pqrs)
6862 {
6863 case 0: /* fmac[sd]. */
6864 case 1: /* fnmac[sd]. */
6865 case 2: /* fmsc[sd]. */
6866 case 3: /* fnmsc[sd]. */
6867 vpipe = VFP11_FMAC;
6868 bfd_arm_vfp11_write_mask (destmask, fd);
6869 regs[0] = fd;
6870 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6871 regs[2] = fm;
6872 *numregs = 3;
6873 break;
6874
6875 case 4: /* fmul[sd]. */
6876 case 5: /* fnmul[sd]. */
6877 case 6: /* fadd[sd]. */
6878 case 7: /* fsub[sd]. */
6879 vpipe = VFP11_FMAC;
6880 goto vfp_binop;
6881
6882 case 8: /* fdiv[sd]. */
6883 vpipe = VFP11_DS;
6884 vfp_binop:
6885 bfd_arm_vfp11_write_mask (destmask, fd);
6886 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6887 regs[1] = fm;
6888 *numregs = 2;
6889 break;
6890
6891 case 15: /* extended opcode. */
6892 {
6893 unsigned int extn = ((insn >> 15) & 0x1e)
6894 | ((insn >> 7) & 1);
6895
6896 switch (extn)
6897 {
6898 case 0: /* fcpy[sd]. */
6899 case 1: /* fabs[sd]. */
6900 case 2: /* fneg[sd]. */
6901 case 8: /* fcmp[sd]. */
6902 case 9: /* fcmpe[sd]. */
6903 case 10: /* fcmpz[sd]. */
6904 case 11: /* fcmpez[sd]. */
6905 case 16: /* fuito[sd]. */
6906 case 17: /* fsito[sd]. */
6907 case 24: /* ftoui[sd]. */
6908 case 25: /* ftouiz[sd]. */
6909 case 26: /* ftosi[sd]. */
6910 case 27: /* ftosiz[sd]. */
6911 /* These instructions will not bounce due to underflow. */
6912 *numregs = 0;
6913 vpipe = VFP11_FMAC;
6914 break;
6915
6916 case 3: /* fsqrt[sd]. */
6917 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6918 registers to cause the erratum in previous instructions. */
6919 bfd_arm_vfp11_write_mask (destmask, fd);
6920 vpipe = VFP11_DS;
6921 break;
6922
6923 case 15: /* fcvt{ds,sd}. */
6924 {
6925 int rnum = 0;
6926
6927 bfd_arm_vfp11_write_mask (destmask, fd);
6928
6929 /* Only FCVTSD can underflow. */
6930 if ((insn & 0x100) != 0)
6931 regs[rnum++] = fm;
6932
6933 *numregs = rnum;
6934
6935 vpipe = VFP11_FMAC;
6936 }
6937 break;
6938
6939 default:
6940 return VFP11_BAD;
6941 }
6942 }
6943 break;
6944
6945 default:
6946 return VFP11_BAD;
6947 }
6948 }
6949 /* Two-register transfer. */
6950 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6951 {
6952 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6953
6954 if ((insn & 0x100000) == 0)
6955 {
6956 if (is_double)
6957 bfd_arm_vfp11_write_mask (destmask, fm);
6958 else
6959 {
6960 bfd_arm_vfp11_write_mask (destmask, fm);
6961 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6962 }
6963 }
6964
6965 vpipe = VFP11_LS;
6966 }
6967 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6968 {
6969 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6970 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6971
6972 switch (puw)
6973 {
6974 case 0: /* Two-reg transfer. We should catch these above. */
6975 abort ();
6976
6977 case 2: /* fldm[sdx]. */
6978 case 3:
6979 case 5:
6980 {
6981 unsigned int i, offset = insn & 0xff;
6982
6983 if (is_double)
6984 offset >>= 1;
6985
6986 for (i = fd; i < fd + offset; i++)
6987 bfd_arm_vfp11_write_mask (destmask, i);
6988 }
6989 break;
6990
6991 case 4: /* fld[sd]. */
6992 case 6:
6993 bfd_arm_vfp11_write_mask (destmask, fd);
6994 break;
6995
6996 default:
6997 return VFP11_BAD;
6998 }
6999
7000 vpipe = VFP11_LS;
7001 }
7002 /* Single-register transfer. Note L==0. */
7003 else if ((insn & 0x0f100e10) == 0x0e000a10)
7004 {
7005 unsigned int opcode = (insn >> 21) & 7;
7006 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
7007
7008 switch (opcode)
7009 {
7010 case 0: /* fmsr/fmdlr. */
7011 case 1: /* fmdhr. */
7012 /* Mark fmdhr and fmdlr as writing to the whole of the DP
7013 destination register. I don't know if this is exactly right,
7014 but it is the conservative choice. */
7015 bfd_arm_vfp11_write_mask (destmask, fn);
7016 break;
7017
7018 case 7: /* fmxr. */
7019 break;
7020 }
7021
7022 vpipe = VFP11_LS;
7023 }
7024
7025 return vpipe;
7026 }
7027
7028
7029 static int elf32_arm_compare_mapping (const void * a, const void * b);
7030
7031
7032 /* Look for potentially-troublesome code sequences which might trigger the
7033 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
7034 (available from ARM) for details of the erratum. A short version is
7035 described in ld.texinfo. */
7036
7037 bfd_boolean
7038 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
7039 {
7040 asection *sec;
7041 bfd_byte *contents = NULL;
7042 int state = 0;
7043 int regs[3], numregs = 0;
7044 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7045 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
7046
7047 if (globals == NULL)
7048 return FALSE;
7049
7050 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
7051 The states transition as follows:
7052
7053 0 -> 1 (vector) or 0 -> 2 (scalar)
7054 A VFP FMAC-pipeline instruction has been seen. Fill
7055 regs[0]..regs[numregs-1] with its input operands. Remember this
7056 instruction in 'first_fmac'.
7057
7058 1 -> 2
7059 Any instruction, except for a VFP instruction which overwrites
7060 regs[*].
7061
7062 1 -> 3 [ -> 0 ] or
7063 2 -> 3 [ -> 0 ]
7064 A VFP instruction has been seen which overwrites any of regs[*].
7065 We must make a veneer! Reset state to 0 before examining next
7066 instruction.
7067
7068 2 -> 0
7069 If we fail to match anything in state 2, reset to state 0 and reset
7070 the instruction pointer to the instruction after 'first_fmac'.
7071
7072 If the VFP11 vector mode is in use, there must be at least two unrelated
7073 instructions between anti-dependent VFP11 instructions to properly avoid
7074 triggering the erratum, hence the use of the extra state 1. */
7075
7076 /* If we are only performing a partial link do not bother
7077 to construct any glue. */
7078 if (bfd_link_relocatable (link_info))
7079 return TRUE;
7080
7081 /* Skip if this bfd does not correspond to an ELF image. */
7082 if (! is_arm_elf (abfd))
7083 return TRUE;
7084
7085 /* We should have chosen a fix type by the time we get here. */
7086 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
7087
7088 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
7089 return TRUE;
7090
7091 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7092 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
7093 return TRUE;
7094
7095 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7096 {
7097 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
7098 struct _arm_elf_section_data *sec_data;
7099
7100 /* If we don't have executable progbits, we're not interested in this
7101 section. Also skip if section is to be excluded. */
7102 if (elf_section_type (sec) != SHT_PROGBITS
7103 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
7104 || (sec->flags & SEC_EXCLUDE) != 0
7105 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
7106 || sec->output_section == bfd_abs_section_ptr
7107 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
7108 continue;
7109
7110 sec_data = elf32_arm_section_data (sec);
7111
7112 if (sec_data->mapcount == 0)
7113 continue;
7114
7115 if (elf_section_data (sec)->this_hdr.contents != NULL)
7116 contents = elf_section_data (sec)->this_hdr.contents;
7117 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7118 goto error_return;
7119
7120 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
7121 elf32_arm_compare_mapping);
7122
7123 for (span = 0; span < sec_data->mapcount; span++)
7124 {
7125 unsigned int span_start = sec_data->map[span].vma;
7126 unsigned int span_end = (span == sec_data->mapcount - 1)
7127 ? sec->size : sec_data->map[span + 1].vma;
7128 char span_type = sec_data->map[span].type;
7129
7130 /* FIXME: Only ARM mode is supported at present. We may need to
7131 support Thumb-2 mode also at some point. */
7132 if (span_type != 'a')
7133 continue;
7134
7135 for (i = span_start; i < span_end;)
7136 {
7137 unsigned int next_i = i + 4;
7138 unsigned int insn = bfd_big_endian (abfd)
7139 ? (contents[i] << 24)
7140 | (contents[i + 1] << 16)
7141 | (contents[i + 2] << 8)
7142 | contents[i + 3]
7143 : (contents[i + 3] << 24)
7144 | (contents[i + 2] << 16)
7145 | (contents[i + 1] << 8)
7146 | contents[i];
7147 unsigned int writemask = 0;
7148 enum bfd_arm_vfp11_pipe vpipe;
7149
7150 switch (state)
7151 {
7152 case 0:
7153 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
7154 &numregs);
7155 /* I'm assuming the VFP11 erratum can trigger with denorm
7156 operands on either the FMAC or the DS pipeline. This might
7157 lead to slightly overenthusiastic veneer insertion. */
7158 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
7159 {
7160 state = use_vector ? 1 : 2;
7161 first_fmac = i;
7162 veneer_of_insn = insn;
7163 }
7164 break;
7165
7166 case 1:
7167 {
7168 int other_regs[3], other_numregs;
7169 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
7170 other_regs,
7171 &other_numregs);
7172 if (vpipe != VFP11_BAD
7173 && bfd_arm_vfp11_antidependency (writemask, regs,
7174 numregs))
7175 state = 3;
7176 else
7177 state = 2;
7178 }
7179 break;
7180
7181 case 2:
7182 {
7183 int other_regs[3], other_numregs;
7184 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
7185 other_regs,
7186 &other_numregs);
7187 if (vpipe != VFP11_BAD
7188 && bfd_arm_vfp11_antidependency (writemask, regs,
7189 numregs))
7190 state = 3;
7191 else
7192 {
7193 state = 0;
7194 next_i = first_fmac + 4;
7195 }
7196 }
7197 break;
7198
7199 case 3:
7200 abort (); /* Should be unreachable. */
7201 }
7202
7203 if (state == 3)
7204 {
7205 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
7206 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7207
7208 elf32_arm_section_data (sec)->erratumcount += 1;
7209
7210 newerr->u.b.vfp_insn = veneer_of_insn;
7211
7212 switch (span_type)
7213 {
7214 case 'a':
7215 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
7216 break;
7217
7218 default:
7219 abort ();
7220 }
7221
7222 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
7223 first_fmac);
7224
7225 newerr->vma = -1;
7226
7227 newerr->next = sec_data->erratumlist;
7228 sec_data->erratumlist = newerr;
7229
7230 state = 0;
7231 }
7232
7233 i = next_i;
7234 }
7235 }
7236
7237 if (contents != NULL
7238 && elf_section_data (sec)->this_hdr.contents != contents)
7239 free (contents);
7240 contents = NULL;
7241 }
7242
7243 return TRUE;
7244
7245 error_return:
7246 if (contents != NULL
7247 && elf_section_data (sec)->this_hdr.contents != contents)
7248 free (contents);
7249
7250 return FALSE;
7251 }
7252
7253 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
7254 after sections have been laid out, using specially-named symbols. */
7255
7256 void
7257 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
7258 struct bfd_link_info *link_info)
7259 {
7260 asection *sec;
7261 struct elf32_arm_link_hash_table *globals;
7262 char *tmp_name;
7263
7264 if (bfd_link_relocatable (link_info))
7265 return;
7266
7267 /* Skip if this bfd does not correspond to an ELF image. */
7268 if (! is_arm_elf (abfd))
7269 return;
7270
7271 globals = elf32_arm_hash_table (link_info);
7272 if (globals == NULL)
7273 return;
7274
7275 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7276 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7277
7278 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7279 {
7280 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7281 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
7282
7283 for (; errnode != NULL; errnode = errnode->next)
7284 {
7285 struct elf_link_hash_entry *myh;
7286 bfd_vma vma;
7287
7288 switch (errnode->type)
7289 {
7290 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
7291 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
7292 /* Find veneer symbol. */
7293 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7294 errnode->u.b.veneer->u.v.id);
7295
7296 myh = elf_link_hash_lookup
7297 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7298
7299 if (myh == NULL)
7300 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
7301 "`%s'"), abfd, tmp_name);
7302
7303 vma = myh->root.u.def.section->output_section->vma
7304 + myh->root.u.def.section->output_offset
7305 + myh->root.u.def.value;
7306
7307 errnode->u.b.veneer->vma = vma;
7308 break;
7309
7310 case VFP11_ERRATUM_ARM_VENEER:
7311 case VFP11_ERRATUM_THUMB_VENEER:
7312 /* Find return location. */
7313 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7314 errnode->u.v.id);
7315
7316 myh = elf_link_hash_lookup
7317 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7318
7319 if (myh == NULL)
7320 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
7321 "`%s'"), abfd, tmp_name);
7322
7323 vma = myh->root.u.def.section->output_section->vma
7324 + myh->root.u.def.section->output_offset
7325 + myh->root.u.def.value;
7326
7327 errnode->u.v.branch->vma = vma;
7328 break;
7329
7330 default:
7331 abort ();
7332 }
7333 }
7334 }
7335
7336 free (tmp_name);
7337 }
7338
7339 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
7340 return locations after sections have been laid out, using
7341 specially-named symbols. */
7342
7343 void
7344 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
7345 struct bfd_link_info *link_info)
7346 {
7347 asection *sec;
7348 struct elf32_arm_link_hash_table *globals;
7349 char *tmp_name;
7350
7351 if (bfd_link_relocatable (link_info))
7352 return;
7353
7354 /* Skip if this bfd does not correspond to an ELF image. */
7355 if (! is_arm_elf (abfd))
7356 return;
7357
7358 globals = elf32_arm_hash_table (link_info);
7359 if (globals == NULL)
7360 return;
7361
7362 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7363 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7364
7365 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7366 {
7367 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7368 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
7369
7370 for (; errnode != NULL; errnode = errnode->next)
7371 {
7372 struct elf_link_hash_entry *myh;
7373 bfd_vma vma;
7374
7375 switch (errnode->type)
7376 {
7377 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
7378 /* Find veneer symbol. */
7379 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7380 errnode->u.b.veneer->u.v.id);
7381
7382 myh = elf_link_hash_lookup
7383 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7384
7385 if (myh == NULL)
7386 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
7387 "`%s'"), abfd, tmp_name);
7388
7389 vma = myh->root.u.def.section->output_section->vma
7390 + myh->root.u.def.section->output_offset
7391 + myh->root.u.def.value;
7392
7393 errnode->u.b.veneer->vma = vma;
7394 break;
7395
7396 case STM32L4XX_ERRATUM_VENEER:
7397 /* Find return location. */
7398 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7399 errnode->u.v.id);
7400
7401 myh = elf_link_hash_lookup
7402 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7403
7404 if (myh == NULL)
7405 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
7406 "`%s'"), abfd, tmp_name);
7407
7408 vma = myh->root.u.def.section->output_section->vma
7409 + myh->root.u.def.section->output_offset
7410 + myh->root.u.def.value;
7411
7412 errnode->u.v.branch->vma = vma;
7413 break;
7414
7415 default:
7416 abort ();
7417 }
7418 }
7419 }
7420
7421 free (tmp_name);
7422 }
7423
7424 static inline bfd_boolean
7425 is_thumb2_ldmia (const insn32 insn)
7426 {
7427 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
7428 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
7429 return (insn & 0xffd02000) == 0xe8900000;
7430 }
7431
7432 static inline bfd_boolean
7433 is_thumb2_ldmdb (const insn32 insn)
7434 {
7435 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
7436 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
7437 return (insn & 0xffd02000) == 0xe9100000;
7438 }
7439
7440 static inline bfd_boolean
7441 is_thumb2_vldm (const insn32 insn)
7442 {
7443 /* A6.5 Extension register load or store instruction
7444 A7.7.229
7445 We look for SP 32-bit and DP 64-bit registers.
7446 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
7447 <list> is consecutive 64-bit registers
7448 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
7449 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
7450 <list> is consecutive 32-bit registers
7451 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
7452 if P==0 && U==1 && W==1 && Rn=1101 VPOP
7453 if PUW=010 || PUW=011 || PUW=101 VLDM. */
7454 return
7455 (((insn & 0xfe100f00) == 0xec100b00) ||
7456 ((insn & 0xfe100f00) == 0xec100a00))
7457 && /* (IA without !). */
7458 (((((insn << 7) >> 28) & 0xd) == 0x4)
7459 /* (IA with !), includes VPOP (when reg number is SP). */
7460 || ((((insn << 7) >> 28) & 0xd) == 0x5)
7461 /* (DB with !). */
7462 || ((((insn << 7) >> 28) & 0xd) == 0x9));
7463 }
7464
7465 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
7466 VLDM opcode and:
7467 - computes the number and the mode of memory accesses
7468 - decides if the replacement should be done:
7469 . replaces only if > 8-word accesses
7470 . or (testing purposes only) replaces all accesses. */
7471
7472 static bfd_boolean
7473 stm32l4xx_need_create_replacing_stub (const insn32 insn,
7474 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
7475 {
7476 int nb_words = 0;
7477
7478 /* The field encoding the register list is the same for both LDMIA
7479 and LDMDB encodings. */
7480 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
7481 nb_words = popcount (insn & 0x0000ffff);
7482 else if (is_thumb2_vldm (insn))
7483 nb_words = (insn & 0xff);
7484
7485 /* DEFAULT mode accounts for the real bug condition situation,
7486 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
7487 return
7488 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
7489 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
7490 }
7491
7492 /* Look for potentially-troublesome code sequences which might trigger
7493 the STM STM32L4XX erratum. */
7494
7495 bfd_boolean
7496 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
7497 struct bfd_link_info *link_info)
7498 {
7499 asection *sec;
7500 bfd_byte *contents = NULL;
7501 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7502
7503 if (globals == NULL)
7504 return FALSE;
7505
7506 /* If we are only performing a partial link do not bother
7507 to construct any glue. */
7508 if (bfd_link_relocatable (link_info))
7509 return TRUE;
7510
7511 /* Skip if this bfd does not correspond to an ELF image. */
7512 if (! is_arm_elf (abfd))
7513 return TRUE;
7514
7515 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
7516 return TRUE;
7517
7518 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7519 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
7520 return TRUE;
7521
7522 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7523 {
7524 unsigned int i, span;
7525 struct _arm_elf_section_data *sec_data;
7526
7527 /* If we don't have executable progbits, we're not interested in this
7528 section. Also skip if section is to be excluded. */
7529 if (elf_section_type (sec) != SHT_PROGBITS
7530 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
7531 || (sec->flags & SEC_EXCLUDE) != 0
7532 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
7533 || sec->output_section == bfd_abs_section_ptr
7534 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
7535 continue;
7536
7537 sec_data = elf32_arm_section_data (sec);
7538
7539 if (sec_data->mapcount == 0)
7540 continue;
7541
7542 if (elf_section_data (sec)->this_hdr.contents != NULL)
7543 contents = elf_section_data (sec)->this_hdr.contents;
7544 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7545 goto error_return;
7546
7547 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
7548 elf32_arm_compare_mapping);
7549
7550 for (span = 0; span < sec_data->mapcount; span++)
7551 {
7552 unsigned int span_start = sec_data->map[span].vma;
7553 unsigned int span_end = (span == sec_data->mapcount - 1)
7554 ? sec->size : sec_data->map[span + 1].vma;
7555 char span_type = sec_data->map[span].type;
7556 int itblock_current_pos = 0;
7557
7558 /* Only Thumb2 mode need be supported with this CM4 specific
7559 code, we should not encounter any arm mode eg span_type
7560 != 'a'. */
7561 if (span_type != 't')
7562 continue;
7563
7564 for (i = span_start; i < span_end;)
7565 {
7566 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
7567 bfd_boolean insn_32bit = FALSE;
7568 bfd_boolean is_ldm = FALSE;
7569 bfd_boolean is_vldm = FALSE;
7570 bfd_boolean is_not_last_in_it_block = FALSE;
7571
7572 /* The first 16-bits of all 32-bit thumb2 instructions start
7573 with opcode[15..13]=0b111 and the encoded op1 can be anything
7574 except opcode[12..11]!=0b00.
7575 See 32-bit Thumb instruction encoding. */
7576 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
7577 insn_32bit = TRUE;
7578
7579 /* Compute the predicate that tells if the instruction
7580 is concerned by the IT block
7581 - Creates an error if there is a ldm that is not
7582 last in the IT block thus cannot be replaced
7583 - Otherwise we can create a branch at the end of the
7584 IT block, it will be controlled naturally by IT
7585 with the proper pseudo-predicate
7586 - So the only interesting predicate is the one that
7587 tells that we are not on the last item of an IT
7588 block. */
7589 if (itblock_current_pos != 0)
7590 is_not_last_in_it_block = !!--itblock_current_pos;
7591
7592 if (insn_32bit)
7593 {
7594 /* Load the rest of the insn (in manual-friendly order). */
7595 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
7596 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
7597 is_vldm = is_thumb2_vldm (insn);
7598
7599 /* Veneers are created for (v)ldm depending on
7600 option flags and memory accesses conditions; but
7601 if the instruction is not the last instruction of
7602 an IT block, we cannot create a jump there, so we
7603 bail out. */
7604 if ((is_ldm || is_vldm) &&
7605 stm32l4xx_need_create_replacing_stub
7606 (insn, globals->stm32l4xx_fix))
7607 {
7608 if (is_not_last_in_it_block)
7609 {
7610 (*_bfd_error_handler)
7611 /* Note - overlong line used here to allow for translation. */
7612 (_("\
7613 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
7614 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
7615 abfd, sec, (long)i);
7616 }
7617 else
7618 {
7619 elf32_stm32l4xx_erratum_list *newerr =
7620 (elf32_stm32l4xx_erratum_list *)
7621 bfd_zmalloc
7622 (sizeof (elf32_stm32l4xx_erratum_list));
7623
7624 elf32_arm_section_data (sec)
7625 ->stm32l4xx_erratumcount += 1;
7626 newerr->u.b.insn = insn;
7627 /* We create only thumb branches. */
7628 newerr->type =
7629 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
7630 record_stm32l4xx_erratum_veneer
7631 (link_info, newerr, abfd, sec,
7632 i,
7633 is_ldm ?
7634 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
7635 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
7636 newerr->vma = -1;
7637 newerr->next = sec_data->stm32l4xx_erratumlist;
7638 sec_data->stm32l4xx_erratumlist = newerr;
7639 }
7640 }
7641 }
7642 else
7643 {
7644 /* A7.7.37 IT p208
7645 IT blocks are only encoded in T1
7646 Encoding T1: IT{x{y{z}}} <firstcond>
7647 1 0 1 1 - 1 1 1 1 - firstcond - mask
7648 if mask = '0000' then see 'related encodings'
7649 We don't deal with UNPREDICTABLE, just ignore these.
7650 There can be no nested IT blocks so an IT block
7651 is naturally a new one for which it is worth
7652 computing its size. */
7653 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00) &&
7654 ((insn & 0x000f) != 0x0000);
7655 /* If we have a new IT block we compute its size. */
7656 if (is_newitblock)
7657 {
7658 /* Compute the number of instructions controlled
7659 by the IT block, it will be used to decide
7660 whether we are inside an IT block or not. */
7661 unsigned int mask = insn & 0x000f;
7662 itblock_current_pos = 4 - ctz (mask);
7663 }
7664 }
7665
7666 i += insn_32bit ? 4 : 2;
7667 }
7668 }
7669
7670 if (contents != NULL
7671 && elf_section_data (sec)->this_hdr.contents != contents)
7672 free (contents);
7673 contents = NULL;
7674 }
7675
7676 return TRUE;
7677
7678 error_return:
7679 if (contents != NULL
7680 && elf_section_data (sec)->this_hdr.contents != contents)
7681 free (contents);
7682
7683 return FALSE;
7684 }
7685
7686 /* Set target relocation values needed during linking. */
7687
7688 void
7689 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
7690 struct bfd_link_info *link_info,
7691 int target1_is_rel,
7692 char * target2_type,
7693 int fix_v4bx,
7694 int use_blx,
7695 bfd_arm_vfp11_fix vfp11_fix,
7696 bfd_arm_stm32l4xx_fix stm32l4xx_fix,
7697 int no_enum_warn, int no_wchar_warn,
7698 int pic_veneer, int fix_cortex_a8,
7699 int fix_arm1176)
7700 {
7701 struct elf32_arm_link_hash_table *globals;
7702
7703 globals = elf32_arm_hash_table (link_info);
7704 if (globals == NULL)
7705 return;
7706
7707 globals->target1_is_rel = target1_is_rel;
7708 if (strcmp (target2_type, "rel") == 0)
7709 globals->target2_reloc = R_ARM_REL32;
7710 else if (strcmp (target2_type, "abs") == 0)
7711 globals->target2_reloc = R_ARM_ABS32;
7712 else if (strcmp (target2_type, "got-rel") == 0)
7713 globals->target2_reloc = R_ARM_GOT_PREL;
7714 else
7715 {
7716 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7717 target2_type);
7718 }
7719 globals->fix_v4bx = fix_v4bx;
7720 globals->use_blx |= use_blx;
7721 globals->vfp11_fix = vfp11_fix;
7722 globals->stm32l4xx_fix = stm32l4xx_fix;
7723 globals->pic_veneer = pic_veneer;
7724 globals->fix_cortex_a8 = fix_cortex_a8;
7725 globals->fix_arm1176 = fix_arm1176;
7726
7727 BFD_ASSERT (is_arm_elf (output_bfd));
7728 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
7729 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
7730 }
7731
7732 /* Replace the target offset of a Thumb bl or b.w instruction. */
7733
7734 static void
7735 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7736 {
7737 bfd_vma upper;
7738 bfd_vma lower;
7739 int reloc_sign;
7740
7741 BFD_ASSERT ((offset & 1) == 0);
7742
7743 upper = bfd_get_16 (abfd, insn);
7744 lower = bfd_get_16 (abfd, insn + 2);
7745 reloc_sign = (offset < 0) ? 1 : 0;
7746 upper = (upper & ~(bfd_vma) 0x7ff)
7747 | ((offset >> 12) & 0x3ff)
7748 | (reloc_sign << 10);
7749 lower = (lower & ~(bfd_vma) 0x2fff)
7750 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7751 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7752 | ((offset >> 1) & 0x7ff);
7753 bfd_put_16 (abfd, upper, insn);
7754 bfd_put_16 (abfd, lower, insn + 2);
7755 }
7756
7757 /* Thumb code calling an ARM function. */
7758
7759 static int
7760 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7761 const char * name,
7762 bfd * input_bfd,
7763 bfd * output_bfd,
7764 asection * input_section,
7765 bfd_byte * hit_data,
7766 asection * sym_sec,
7767 bfd_vma offset,
7768 bfd_signed_vma addend,
7769 bfd_vma val,
7770 char **error_message)
7771 {
7772 asection * s = 0;
7773 bfd_vma my_offset;
7774 long int ret_offset;
7775 struct elf_link_hash_entry * myh;
7776 struct elf32_arm_link_hash_table * globals;
7777
7778 myh = find_thumb_glue (info, name, error_message);
7779 if (myh == NULL)
7780 return FALSE;
7781
7782 globals = elf32_arm_hash_table (info);
7783 BFD_ASSERT (globals != NULL);
7784 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7785
7786 my_offset = myh->root.u.def.value;
7787
7788 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7789 THUMB2ARM_GLUE_SECTION_NAME);
7790
7791 BFD_ASSERT (s != NULL);
7792 BFD_ASSERT (s->contents != NULL);
7793 BFD_ASSERT (s->output_section != NULL);
7794
7795 if ((my_offset & 0x01) == 0x01)
7796 {
7797 if (sym_sec != NULL
7798 && sym_sec->owner != NULL
7799 && !INTERWORK_FLAG (sym_sec->owner))
7800 {
7801 (*_bfd_error_handler)
7802 (_("%B(%s): warning: interworking not enabled.\n"
7803 " first occurrence: %B: Thumb call to ARM"),
7804 sym_sec->owner, input_bfd, name);
7805
7806 return FALSE;
7807 }
7808
7809 --my_offset;
7810 myh->root.u.def.value = my_offset;
7811
7812 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7813 s->contents + my_offset);
7814
7815 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7816 s->contents + my_offset + 2);
7817
7818 ret_offset =
7819 /* Address of destination of the stub. */
7820 ((bfd_signed_vma) val)
7821 - ((bfd_signed_vma)
7822 /* Offset from the start of the current section
7823 to the start of the stubs. */
7824 (s->output_offset
7825 /* Offset of the start of this stub from the start of the stubs. */
7826 + my_offset
7827 /* Address of the start of the current section. */
7828 + s->output_section->vma)
7829 /* The branch instruction is 4 bytes into the stub. */
7830 + 4
7831 /* ARM branches work from the pc of the instruction + 8. */
7832 + 8);
7833
7834 put_arm_insn (globals, output_bfd,
7835 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7836 s->contents + my_offset + 4);
7837 }
7838
7839 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7840
7841 /* Now go back and fix up the original BL insn to point to here. */
7842 ret_offset =
7843 /* Address of where the stub is located. */
7844 (s->output_section->vma + s->output_offset + my_offset)
7845 /* Address of where the BL is located. */
7846 - (input_section->output_section->vma + input_section->output_offset
7847 + offset)
7848 /* Addend in the relocation. */
7849 - addend
7850 /* Biassing for PC-relative addressing. */
7851 - 8;
7852
7853 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7854
7855 return TRUE;
7856 }
7857
7858 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7859
7860 static struct elf_link_hash_entry *
7861 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7862 const char * name,
7863 bfd * input_bfd,
7864 bfd * output_bfd,
7865 asection * sym_sec,
7866 bfd_vma val,
7867 asection * s,
7868 char ** error_message)
7869 {
7870 bfd_vma my_offset;
7871 long int ret_offset;
7872 struct elf_link_hash_entry * myh;
7873 struct elf32_arm_link_hash_table * globals;
7874
7875 myh = find_arm_glue (info, name, error_message);
7876 if (myh == NULL)
7877 return NULL;
7878
7879 globals = elf32_arm_hash_table (info);
7880 BFD_ASSERT (globals != NULL);
7881 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7882
7883 my_offset = myh->root.u.def.value;
7884
7885 if ((my_offset & 0x01) == 0x01)
7886 {
7887 if (sym_sec != NULL
7888 && sym_sec->owner != NULL
7889 && !INTERWORK_FLAG (sym_sec->owner))
7890 {
7891 (*_bfd_error_handler)
7892 (_("%B(%s): warning: interworking not enabled.\n"
7893 " first occurrence: %B: arm call to thumb"),
7894 sym_sec->owner, input_bfd, name);
7895 }
7896
7897 --my_offset;
7898 myh->root.u.def.value = my_offset;
7899
7900 if (bfd_link_pic (info)
7901 || globals->root.is_relocatable_executable
7902 || globals->pic_veneer)
7903 {
7904 /* For relocatable objects we can't use absolute addresses,
7905 so construct the address from a relative offset. */
7906 /* TODO: If the offset is small it's probably worth
7907 constructing the address with adds. */
7908 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7909 s->contents + my_offset);
7910 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7911 s->contents + my_offset + 4);
7912 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7913 s->contents + my_offset + 8);
7914 /* Adjust the offset by 4 for the position of the add,
7915 and 8 for the pipeline offset. */
7916 ret_offset = (val - (s->output_offset
7917 + s->output_section->vma
7918 + my_offset + 12))
7919 | 1;
7920 bfd_put_32 (output_bfd, ret_offset,
7921 s->contents + my_offset + 12);
7922 }
7923 else if (globals->use_blx)
7924 {
7925 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7926 s->contents + my_offset);
7927
7928 /* It's a thumb address. Add the low order bit. */
7929 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7930 s->contents + my_offset + 4);
7931 }
7932 else
7933 {
7934 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7935 s->contents + my_offset);
7936
7937 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7938 s->contents + my_offset + 4);
7939
7940 /* It's a thumb address. Add the low order bit. */
7941 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7942 s->contents + my_offset + 8);
7943
7944 my_offset += 12;
7945 }
7946 }
7947
7948 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7949
7950 return myh;
7951 }
7952
7953 /* Arm code calling a Thumb function. */
7954
7955 static int
7956 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7957 const char * name,
7958 bfd * input_bfd,
7959 bfd * output_bfd,
7960 asection * input_section,
7961 bfd_byte * hit_data,
7962 asection * sym_sec,
7963 bfd_vma offset,
7964 bfd_signed_vma addend,
7965 bfd_vma val,
7966 char **error_message)
7967 {
7968 unsigned long int tmp;
7969 bfd_vma my_offset;
7970 asection * s;
7971 long int ret_offset;
7972 struct elf_link_hash_entry * myh;
7973 struct elf32_arm_link_hash_table * globals;
7974
7975 globals = elf32_arm_hash_table (info);
7976 BFD_ASSERT (globals != NULL);
7977 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7978
7979 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7980 ARM2THUMB_GLUE_SECTION_NAME);
7981 BFD_ASSERT (s != NULL);
7982 BFD_ASSERT (s->contents != NULL);
7983 BFD_ASSERT (s->output_section != NULL);
7984
7985 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7986 sym_sec, val, s, error_message);
7987 if (!myh)
7988 return FALSE;
7989
7990 my_offset = myh->root.u.def.value;
7991 tmp = bfd_get_32 (input_bfd, hit_data);
7992 tmp = tmp & 0xFF000000;
7993
7994 /* Somehow these are both 4 too far, so subtract 8. */
7995 ret_offset = (s->output_offset
7996 + my_offset
7997 + s->output_section->vma
7998 - (input_section->output_offset
7999 + input_section->output_section->vma
8000 + offset + addend)
8001 - 8);
8002
8003 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
8004
8005 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
8006
8007 return TRUE;
8008 }
8009
8010 /* Populate Arm stub for an exported Thumb function. */
8011
8012 static bfd_boolean
8013 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
8014 {
8015 struct bfd_link_info * info = (struct bfd_link_info *) inf;
8016 asection * s;
8017 struct elf_link_hash_entry * myh;
8018 struct elf32_arm_link_hash_entry *eh;
8019 struct elf32_arm_link_hash_table * globals;
8020 asection *sec;
8021 bfd_vma val;
8022 char *error_message;
8023
8024 eh = elf32_arm_hash_entry (h);
8025 /* Allocate stubs for exported Thumb functions on v4t. */
8026 if (eh->export_glue == NULL)
8027 return TRUE;
8028
8029 globals = elf32_arm_hash_table (info);
8030 BFD_ASSERT (globals != NULL);
8031 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8032
8033 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8034 ARM2THUMB_GLUE_SECTION_NAME);
8035 BFD_ASSERT (s != NULL);
8036 BFD_ASSERT (s->contents != NULL);
8037 BFD_ASSERT (s->output_section != NULL);
8038
8039 sec = eh->export_glue->root.u.def.section;
8040
8041 BFD_ASSERT (sec->output_section != NULL);
8042
8043 val = eh->export_glue->root.u.def.value + sec->output_offset
8044 + sec->output_section->vma;
8045
8046 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
8047 h->root.u.def.section->owner,
8048 globals->obfd, sec, val, s,
8049 &error_message);
8050 BFD_ASSERT (myh);
8051 return TRUE;
8052 }
8053
8054 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
8055
8056 static bfd_vma
8057 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
8058 {
8059 bfd_byte *p;
8060 bfd_vma glue_addr;
8061 asection *s;
8062 struct elf32_arm_link_hash_table *globals;
8063
8064 globals = elf32_arm_hash_table (info);
8065 BFD_ASSERT (globals != NULL);
8066 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8067
8068 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8069 ARM_BX_GLUE_SECTION_NAME);
8070 BFD_ASSERT (s != NULL);
8071 BFD_ASSERT (s->contents != NULL);
8072 BFD_ASSERT (s->output_section != NULL);
8073
8074 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
8075
8076 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
8077
8078 if ((globals->bx_glue_offset[reg] & 1) == 0)
8079 {
8080 p = s->contents + glue_addr;
8081 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
8082 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
8083 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
8084 globals->bx_glue_offset[reg] |= 1;
8085 }
8086
8087 return glue_addr + s->output_section->vma + s->output_offset;
8088 }
8089
8090 /* Generate Arm stubs for exported Thumb symbols. */
8091 static void
8092 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
8093 struct bfd_link_info *link_info)
8094 {
8095 struct elf32_arm_link_hash_table * globals;
8096
8097 if (link_info == NULL)
8098 /* Ignore this if we are not called by the ELF backend linker. */
8099 return;
8100
8101 globals = elf32_arm_hash_table (link_info);
8102 if (globals == NULL)
8103 return;
8104
8105 /* If blx is available then exported Thumb symbols are OK and there is
8106 nothing to do. */
8107 if (globals->use_blx)
8108 return;
8109
8110 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
8111 link_info);
8112 }
8113
8114 /* Reserve space for COUNT dynamic relocations in relocation selection
8115 SRELOC. */
8116
8117 static void
8118 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
8119 bfd_size_type count)
8120 {
8121 struct elf32_arm_link_hash_table *htab;
8122
8123 htab = elf32_arm_hash_table (info);
8124 BFD_ASSERT (htab->root.dynamic_sections_created);
8125 if (sreloc == NULL)
8126 abort ();
8127 sreloc->size += RELOC_SIZE (htab) * count;
8128 }
8129
8130 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
8131 dynamic, the relocations should go in SRELOC, otherwise they should
8132 go in the special .rel.iplt section. */
8133
8134 static void
8135 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
8136 bfd_size_type count)
8137 {
8138 struct elf32_arm_link_hash_table *htab;
8139
8140 htab = elf32_arm_hash_table (info);
8141 if (!htab->root.dynamic_sections_created)
8142 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
8143 else
8144 {
8145 BFD_ASSERT (sreloc != NULL);
8146 sreloc->size += RELOC_SIZE (htab) * count;
8147 }
8148 }
8149
8150 /* Add relocation REL to the end of relocation section SRELOC. */
8151
8152 static void
8153 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
8154 asection *sreloc, Elf_Internal_Rela *rel)
8155 {
8156 bfd_byte *loc;
8157 struct elf32_arm_link_hash_table *htab;
8158
8159 htab = elf32_arm_hash_table (info);
8160 if (!htab->root.dynamic_sections_created
8161 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
8162 sreloc = htab->root.irelplt;
8163 if (sreloc == NULL)
8164 abort ();
8165 loc = sreloc->contents;
8166 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
8167 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
8168 abort ();
8169 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
8170 }
8171
8172 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
8173 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
8174 to .plt. */
8175
8176 static void
8177 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
8178 bfd_boolean is_iplt_entry,
8179 union gotplt_union *root_plt,
8180 struct arm_plt_info *arm_plt)
8181 {
8182 struct elf32_arm_link_hash_table *htab;
8183 asection *splt;
8184 asection *sgotplt;
8185
8186 htab = elf32_arm_hash_table (info);
8187
8188 if (is_iplt_entry)
8189 {
8190 splt = htab->root.iplt;
8191 sgotplt = htab->root.igotplt;
8192
8193 /* NaCl uses a special first entry in .iplt too. */
8194 if (htab->nacl_p && splt->size == 0)
8195 splt->size += htab->plt_header_size;
8196
8197 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
8198 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
8199 }
8200 else
8201 {
8202 splt = htab->root.splt;
8203 sgotplt = htab->root.sgotplt;
8204
8205 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
8206 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
8207
8208 /* If this is the first .plt entry, make room for the special
8209 first entry. */
8210 if (splt->size == 0)
8211 splt->size += htab->plt_header_size;
8212
8213 htab->next_tls_desc_index++;
8214 }
8215
8216 /* Allocate the PLT entry itself, including any leading Thumb stub. */
8217 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
8218 splt->size += PLT_THUMB_STUB_SIZE;
8219 root_plt->offset = splt->size;
8220 splt->size += htab->plt_entry_size;
8221
8222 if (!htab->symbian_p)
8223 {
8224 /* We also need to make an entry in the .got.plt section, which
8225 will be placed in the .got section by the linker script. */
8226 if (is_iplt_entry)
8227 arm_plt->got_offset = sgotplt->size;
8228 else
8229 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
8230 sgotplt->size += 4;
8231 }
8232 }
8233
8234 static bfd_vma
8235 arm_movw_immediate (bfd_vma value)
8236 {
8237 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
8238 }
8239
8240 static bfd_vma
8241 arm_movt_immediate (bfd_vma value)
8242 {
8243 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
8244 }
8245
8246 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
8247 the entry lives in .iplt and resolves to (*SYM_VALUE)().
8248 Otherwise, DYNINDX is the index of the symbol in the dynamic
8249 symbol table and SYM_VALUE is undefined.
8250
8251 ROOT_PLT points to the offset of the PLT entry from the start of its
8252 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
8253 bookkeeping information.
8254
8255 Returns FALSE if there was a problem. */
8256
8257 static bfd_boolean
8258 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
8259 union gotplt_union *root_plt,
8260 struct arm_plt_info *arm_plt,
8261 int dynindx, bfd_vma sym_value)
8262 {
8263 struct elf32_arm_link_hash_table *htab;
8264 asection *sgot;
8265 asection *splt;
8266 asection *srel;
8267 bfd_byte *loc;
8268 bfd_vma plt_index;
8269 Elf_Internal_Rela rel;
8270 bfd_vma plt_header_size;
8271 bfd_vma got_header_size;
8272
8273 htab = elf32_arm_hash_table (info);
8274
8275 /* Pick the appropriate sections and sizes. */
8276 if (dynindx == -1)
8277 {
8278 splt = htab->root.iplt;
8279 sgot = htab->root.igotplt;
8280 srel = htab->root.irelplt;
8281
8282 /* There are no reserved entries in .igot.plt, and no special
8283 first entry in .iplt. */
8284 got_header_size = 0;
8285 plt_header_size = 0;
8286 }
8287 else
8288 {
8289 splt = htab->root.splt;
8290 sgot = htab->root.sgotplt;
8291 srel = htab->root.srelplt;
8292
8293 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
8294 plt_header_size = htab->plt_header_size;
8295 }
8296 BFD_ASSERT (splt != NULL && srel != NULL);
8297
8298 /* Fill in the entry in the procedure linkage table. */
8299 if (htab->symbian_p)
8300 {
8301 BFD_ASSERT (dynindx >= 0);
8302 put_arm_insn (htab, output_bfd,
8303 elf32_arm_symbian_plt_entry[0],
8304 splt->contents + root_plt->offset);
8305 bfd_put_32 (output_bfd,
8306 elf32_arm_symbian_plt_entry[1],
8307 splt->contents + root_plt->offset + 4);
8308
8309 /* Fill in the entry in the .rel.plt section. */
8310 rel.r_offset = (splt->output_section->vma
8311 + splt->output_offset
8312 + root_plt->offset + 4);
8313 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
8314
8315 /* Get the index in the procedure linkage table which
8316 corresponds to this symbol. This is the index of this symbol
8317 in all the symbols for which we are making plt entries. The
8318 first entry in the procedure linkage table is reserved. */
8319 plt_index = ((root_plt->offset - plt_header_size)
8320 / htab->plt_entry_size);
8321 }
8322 else
8323 {
8324 bfd_vma got_offset, got_address, plt_address;
8325 bfd_vma got_displacement, initial_got_entry;
8326 bfd_byte * ptr;
8327
8328 BFD_ASSERT (sgot != NULL);
8329
8330 /* Get the offset into the .(i)got.plt table of the entry that
8331 corresponds to this function. */
8332 got_offset = (arm_plt->got_offset & -2);
8333
8334 /* Get the index in the procedure linkage table which
8335 corresponds to this symbol. This is the index of this symbol
8336 in all the symbols for which we are making plt entries.
8337 After the reserved .got.plt entries, all symbols appear in
8338 the same order as in .plt. */
8339 plt_index = (got_offset - got_header_size) / 4;
8340
8341 /* Calculate the address of the GOT entry. */
8342 got_address = (sgot->output_section->vma
8343 + sgot->output_offset
8344 + got_offset);
8345
8346 /* ...and the address of the PLT entry. */
8347 plt_address = (splt->output_section->vma
8348 + splt->output_offset
8349 + root_plt->offset);
8350
8351 ptr = splt->contents + root_plt->offset;
8352 if (htab->vxworks_p && bfd_link_pic (info))
8353 {
8354 unsigned int i;
8355 bfd_vma val;
8356
8357 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
8358 {
8359 val = elf32_arm_vxworks_shared_plt_entry[i];
8360 if (i == 2)
8361 val |= got_address - sgot->output_section->vma;
8362 if (i == 5)
8363 val |= plt_index * RELOC_SIZE (htab);
8364 if (i == 2 || i == 5)
8365 bfd_put_32 (output_bfd, val, ptr);
8366 else
8367 put_arm_insn (htab, output_bfd, val, ptr);
8368 }
8369 }
8370 else if (htab->vxworks_p)
8371 {
8372 unsigned int i;
8373 bfd_vma val;
8374
8375 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
8376 {
8377 val = elf32_arm_vxworks_exec_plt_entry[i];
8378 if (i == 2)
8379 val |= got_address;
8380 if (i == 4)
8381 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
8382 if (i == 5)
8383 val |= plt_index * RELOC_SIZE (htab);
8384 if (i == 2 || i == 5)
8385 bfd_put_32 (output_bfd, val, ptr);
8386 else
8387 put_arm_insn (htab, output_bfd, val, ptr);
8388 }
8389
8390 loc = (htab->srelplt2->contents
8391 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
8392
8393 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
8394 referencing the GOT for this PLT entry. */
8395 rel.r_offset = plt_address + 8;
8396 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
8397 rel.r_addend = got_offset;
8398 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8399 loc += RELOC_SIZE (htab);
8400
8401 /* Create the R_ARM_ABS32 relocation referencing the
8402 beginning of the PLT for this GOT entry. */
8403 rel.r_offset = got_address;
8404 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
8405 rel.r_addend = 0;
8406 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8407 }
8408 else if (htab->nacl_p)
8409 {
8410 /* Calculate the displacement between the PLT slot and the
8411 common tail that's part of the special initial PLT slot. */
8412 int32_t tail_displacement
8413 = ((splt->output_section->vma + splt->output_offset
8414 + ARM_NACL_PLT_TAIL_OFFSET)
8415 - (plt_address + htab->plt_entry_size + 4));
8416 BFD_ASSERT ((tail_displacement & 3) == 0);
8417 tail_displacement >>= 2;
8418
8419 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
8420 || (-tail_displacement & 0xff000000) == 0);
8421
8422 /* Calculate the displacement between the PLT slot and the entry
8423 in the GOT. The offset accounts for the value produced by
8424 adding to pc in the penultimate instruction of the PLT stub. */
8425 got_displacement = (got_address
8426 - (plt_address + htab->plt_entry_size));
8427
8428 /* NaCl does not support interworking at all. */
8429 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
8430
8431 put_arm_insn (htab, output_bfd,
8432 elf32_arm_nacl_plt_entry[0]
8433 | arm_movw_immediate (got_displacement),
8434 ptr + 0);
8435 put_arm_insn (htab, output_bfd,
8436 elf32_arm_nacl_plt_entry[1]
8437 | arm_movt_immediate (got_displacement),
8438 ptr + 4);
8439 put_arm_insn (htab, output_bfd,
8440 elf32_arm_nacl_plt_entry[2],
8441 ptr + 8);
8442 put_arm_insn (htab, output_bfd,
8443 elf32_arm_nacl_plt_entry[3]
8444 | (tail_displacement & 0x00ffffff),
8445 ptr + 12);
8446 }
8447 else if (using_thumb_only (htab))
8448 {
8449 /* PR ld/16017: Generate thumb only PLT entries. */
8450 if (!using_thumb2 (htab))
8451 {
8452 /* FIXME: We ought to be able to generate thumb-1 PLT
8453 instructions... */
8454 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
8455 output_bfd);
8456 return FALSE;
8457 }
8458
8459 /* Calculate the displacement between the PLT slot and the entry in
8460 the GOT. The 12-byte offset accounts for the value produced by
8461 adding to pc in the 3rd instruction of the PLT stub. */
8462 got_displacement = got_address - (plt_address + 12);
8463
8464 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
8465 instead of 'put_thumb_insn'. */
8466 put_arm_insn (htab, output_bfd,
8467 elf32_thumb2_plt_entry[0]
8468 | ((got_displacement & 0x000000ff) << 16)
8469 | ((got_displacement & 0x00000700) << 20)
8470 | ((got_displacement & 0x00000800) >> 1)
8471 | ((got_displacement & 0x0000f000) >> 12),
8472 ptr + 0);
8473 put_arm_insn (htab, output_bfd,
8474 elf32_thumb2_plt_entry[1]
8475 | ((got_displacement & 0x00ff0000) )
8476 | ((got_displacement & 0x07000000) << 4)
8477 | ((got_displacement & 0x08000000) >> 17)
8478 | ((got_displacement & 0xf0000000) >> 28),
8479 ptr + 4);
8480 put_arm_insn (htab, output_bfd,
8481 elf32_thumb2_plt_entry[2],
8482 ptr + 8);
8483 put_arm_insn (htab, output_bfd,
8484 elf32_thumb2_plt_entry[3],
8485 ptr + 12);
8486 }
8487 else
8488 {
8489 /* Calculate the displacement between the PLT slot and the
8490 entry in the GOT. The eight-byte offset accounts for the
8491 value produced by adding to pc in the first instruction
8492 of the PLT stub. */
8493 got_displacement = got_address - (plt_address + 8);
8494
8495 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
8496 {
8497 put_thumb_insn (htab, output_bfd,
8498 elf32_arm_plt_thumb_stub[0], ptr - 4);
8499 put_thumb_insn (htab, output_bfd,
8500 elf32_arm_plt_thumb_stub[1], ptr - 2);
8501 }
8502
8503 if (!elf32_arm_use_long_plt_entry)
8504 {
8505 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
8506
8507 put_arm_insn (htab, output_bfd,
8508 elf32_arm_plt_entry_short[0]
8509 | ((got_displacement & 0x0ff00000) >> 20),
8510 ptr + 0);
8511 put_arm_insn (htab, output_bfd,
8512 elf32_arm_plt_entry_short[1]
8513 | ((got_displacement & 0x000ff000) >> 12),
8514 ptr+ 4);
8515 put_arm_insn (htab, output_bfd,
8516 elf32_arm_plt_entry_short[2]
8517 | (got_displacement & 0x00000fff),
8518 ptr + 8);
8519 #ifdef FOUR_WORD_PLT
8520 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
8521 #endif
8522 }
8523 else
8524 {
8525 put_arm_insn (htab, output_bfd,
8526 elf32_arm_plt_entry_long[0]
8527 | ((got_displacement & 0xf0000000) >> 28),
8528 ptr + 0);
8529 put_arm_insn (htab, output_bfd,
8530 elf32_arm_plt_entry_long[1]
8531 | ((got_displacement & 0x0ff00000) >> 20),
8532 ptr + 4);
8533 put_arm_insn (htab, output_bfd,
8534 elf32_arm_plt_entry_long[2]
8535 | ((got_displacement & 0x000ff000) >> 12),
8536 ptr+ 8);
8537 put_arm_insn (htab, output_bfd,
8538 elf32_arm_plt_entry_long[3]
8539 | (got_displacement & 0x00000fff),
8540 ptr + 12);
8541 }
8542 }
8543
8544 /* Fill in the entry in the .rel(a).(i)plt section. */
8545 rel.r_offset = got_address;
8546 rel.r_addend = 0;
8547 if (dynindx == -1)
8548 {
8549 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
8550 The dynamic linker or static executable then calls SYM_VALUE
8551 to determine the correct run-time value of the .igot.plt entry. */
8552 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
8553 initial_got_entry = sym_value;
8554 }
8555 else
8556 {
8557 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
8558 initial_got_entry = (splt->output_section->vma
8559 + splt->output_offset);
8560 }
8561
8562 /* Fill in the entry in the global offset table. */
8563 bfd_put_32 (output_bfd, initial_got_entry,
8564 sgot->contents + got_offset);
8565 }
8566
8567 if (dynindx == -1)
8568 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
8569 else
8570 {
8571 loc = srel->contents + plt_index * RELOC_SIZE (htab);
8572 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8573 }
8574
8575 return TRUE;
8576 }
8577
8578 /* Some relocations map to different relocations depending on the
8579 target. Return the real relocation. */
8580
8581 static int
8582 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
8583 int r_type)
8584 {
8585 switch (r_type)
8586 {
8587 case R_ARM_TARGET1:
8588 if (globals->target1_is_rel)
8589 return R_ARM_REL32;
8590 else
8591 return R_ARM_ABS32;
8592
8593 case R_ARM_TARGET2:
8594 return globals->target2_reloc;
8595
8596 default:
8597 return r_type;
8598 }
8599 }
8600
8601 /* Return the base VMA address which should be subtracted from real addresses
8602 when resolving @dtpoff relocation.
8603 This is PT_TLS segment p_vaddr. */
8604
8605 static bfd_vma
8606 dtpoff_base (struct bfd_link_info *info)
8607 {
8608 /* If tls_sec is NULL, we should have signalled an error already. */
8609 if (elf_hash_table (info)->tls_sec == NULL)
8610 return 0;
8611 return elf_hash_table (info)->tls_sec->vma;
8612 }
8613
8614 /* Return the relocation value for @tpoff relocation
8615 if STT_TLS virtual address is ADDRESS. */
8616
8617 static bfd_vma
8618 tpoff (struct bfd_link_info *info, bfd_vma address)
8619 {
8620 struct elf_link_hash_table *htab = elf_hash_table (info);
8621 bfd_vma base;
8622
8623 /* If tls_sec is NULL, we should have signalled an error already. */
8624 if (htab->tls_sec == NULL)
8625 return 0;
8626 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
8627 return address - htab->tls_sec->vma + base;
8628 }
8629
8630 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
8631 VALUE is the relocation value. */
8632
8633 static bfd_reloc_status_type
8634 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
8635 {
8636 if (value > 0xfff)
8637 return bfd_reloc_overflow;
8638
8639 value |= bfd_get_32 (abfd, data) & 0xfffff000;
8640 bfd_put_32 (abfd, value, data);
8641 return bfd_reloc_ok;
8642 }
8643
8644 /* Handle TLS relaxations. Relaxing is possible for symbols that use
8645 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
8646 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
8647
8648 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
8649 is to then call final_link_relocate. Return other values in the
8650 case of error.
8651
8652 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
8653 the pre-relaxed code. It would be nice if the relocs were updated
8654 to match the optimization. */
8655
8656 static bfd_reloc_status_type
8657 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
8658 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
8659 Elf_Internal_Rela *rel, unsigned long is_local)
8660 {
8661 unsigned long insn;
8662
8663 switch (ELF32_R_TYPE (rel->r_info))
8664 {
8665 default:
8666 return bfd_reloc_notsupported;
8667
8668 case R_ARM_TLS_GOTDESC:
8669 if (is_local)
8670 insn = 0;
8671 else
8672 {
8673 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8674 if (insn & 1)
8675 insn -= 5; /* THUMB */
8676 else
8677 insn -= 8; /* ARM */
8678 }
8679 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8680 return bfd_reloc_continue;
8681
8682 case R_ARM_THM_TLS_DESCSEQ:
8683 /* Thumb insn. */
8684 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
8685 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
8686 {
8687 if (is_local)
8688 /* nop */
8689 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8690 }
8691 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8692 {
8693 if (is_local)
8694 /* nop */
8695 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8696 else
8697 /* ldr rx,[ry] */
8698 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
8699 }
8700 else if ((insn & 0xff87) == 0x4780) /* blx rx */
8701 {
8702 if (is_local)
8703 /* nop */
8704 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8705 else
8706 /* mov r0, rx */
8707 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
8708 contents + rel->r_offset);
8709 }
8710 else
8711 {
8712 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8713 /* It's a 32 bit instruction, fetch the rest of it for
8714 error generation. */
8715 insn = (insn << 16)
8716 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
8717 (*_bfd_error_handler)
8718 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8719 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8720 return bfd_reloc_notsupported;
8721 }
8722 break;
8723
8724 case R_ARM_TLS_DESCSEQ:
8725 /* arm insn. */
8726 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8727 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8728 {
8729 if (is_local)
8730 /* mov rx, ry */
8731 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
8732 contents + rel->r_offset);
8733 }
8734 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8735 {
8736 if (is_local)
8737 /* nop */
8738 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8739 else
8740 /* ldr rx,[ry] */
8741 bfd_put_32 (input_bfd, insn & 0xfffff000,
8742 contents + rel->r_offset);
8743 }
8744 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
8745 {
8746 if (is_local)
8747 /* nop */
8748 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8749 else
8750 /* mov r0, rx */
8751 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
8752 contents + rel->r_offset);
8753 }
8754 else
8755 {
8756 (*_bfd_error_handler)
8757 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8758 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8759 return bfd_reloc_notsupported;
8760 }
8761 break;
8762
8763 case R_ARM_TLS_CALL:
8764 /* GD->IE relaxation, turn the instruction into 'nop' or
8765 'ldr r0, [pc,r0]' */
8766 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8767 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8768 break;
8769
8770 case R_ARM_THM_TLS_CALL:
8771 /* GD->IE relaxation. */
8772 if (!is_local)
8773 /* add r0,pc; ldr r0, [r0] */
8774 insn = 0x44786800;
8775 else if (arch_has_thumb2_nop (globals))
8776 /* nop.w */
8777 insn = 0xf3af8000;
8778 else
8779 /* nop; nop */
8780 insn = 0xbf00bf00;
8781
8782 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8783 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8784 break;
8785 }
8786 return bfd_reloc_ok;
8787 }
8788
8789 /* For a given value of n, calculate the value of G_n as required to
8790 deal with group relocations. We return it in the form of an
8791 encoded constant-and-rotation, together with the final residual. If n is
8792 specified as less than zero, then final_residual is filled with the
8793 input value and no further action is performed. */
8794
8795 static bfd_vma
8796 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8797 {
8798 int current_n;
8799 bfd_vma g_n;
8800 bfd_vma encoded_g_n = 0;
8801 bfd_vma residual = value; /* Also known as Y_n. */
8802
8803 for (current_n = 0; current_n <= n; current_n++)
8804 {
8805 int shift;
8806
8807 /* Calculate which part of the value to mask. */
8808 if (residual == 0)
8809 shift = 0;
8810 else
8811 {
8812 int msb;
8813
8814 /* Determine the most significant bit in the residual and
8815 align the resulting value to a 2-bit boundary. */
8816 for (msb = 30; msb >= 0; msb -= 2)
8817 if (residual & (3 << msb))
8818 break;
8819
8820 /* The desired shift is now (msb - 6), or zero, whichever
8821 is the greater. */
8822 shift = msb - 6;
8823 if (shift < 0)
8824 shift = 0;
8825 }
8826
8827 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8828 g_n = residual & (0xff << shift);
8829 encoded_g_n = (g_n >> shift)
8830 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
8831
8832 /* Calculate the residual for the next time around. */
8833 residual &= ~g_n;
8834 }
8835
8836 *final_residual = residual;
8837
8838 return encoded_g_n;
8839 }
8840
8841 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8842 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8843
8844 static int
8845 identify_add_or_sub (bfd_vma insn)
8846 {
8847 int opcode = insn & 0x1e00000;
8848
8849 if (opcode == 1 << 23) /* ADD */
8850 return 1;
8851
8852 if (opcode == 1 << 22) /* SUB */
8853 return -1;
8854
8855 return 0;
8856 }
8857
8858 /* Perform a relocation as part of a final link. */
8859
8860 static bfd_reloc_status_type
8861 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8862 bfd * input_bfd,
8863 bfd * output_bfd,
8864 asection * input_section,
8865 bfd_byte * contents,
8866 Elf_Internal_Rela * rel,
8867 bfd_vma value,
8868 struct bfd_link_info * info,
8869 asection * sym_sec,
8870 const char * sym_name,
8871 unsigned char st_type,
8872 enum arm_st_branch_type branch_type,
8873 struct elf_link_hash_entry * h,
8874 bfd_boolean * unresolved_reloc_p,
8875 char ** error_message)
8876 {
8877 unsigned long r_type = howto->type;
8878 unsigned long r_symndx;
8879 bfd_byte * hit_data = contents + rel->r_offset;
8880 bfd_vma * local_got_offsets;
8881 bfd_vma * local_tlsdesc_gotents;
8882 asection * sgot;
8883 asection * splt;
8884 asection * sreloc = NULL;
8885 asection * srelgot;
8886 bfd_vma addend;
8887 bfd_signed_vma signed_addend;
8888 unsigned char dynreloc_st_type;
8889 bfd_vma dynreloc_value;
8890 struct elf32_arm_link_hash_table * globals;
8891 struct elf32_arm_link_hash_entry *eh;
8892 union gotplt_union *root_plt;
8893 struct arm_plt_info *arm_plt;
8894 bfd_vma plt_offset;
8895 bfd_vma gotplt_offset;
8896 bfd_boolean has_iplt_entry;
8897
8898 globals = elf32_arm_hash_table (info);
8899 if (globals == NULL)
8900 return bfd_reloc_notsupported;
8901
8902 BFD_ASSERT (is_arm_elf (input_bfd));
8903
8904 /* Some relocation types map to different relocations depending on the
8905 target. We pick the right one here. */
8906 r_type = arm_real_reloc_type (globals, r_type);
8907
8908 /* It is possible to have linker relaxations on some TLS access
8909 models. Update our information here. */
8910 r_type = elf32_arm_tls_transition (info, r_type, h);
8911
8912 if (r_type != howto->type)
8913 howto = elf32_arm_howto_from_type (r_type);
8914
8915 eh = (struct elf32_arm_link_hash_entry *) h;
8916 sgot = globals->root.sgot;
8917 local_got_offsets = elf_local_got_offsets (input_bfd);
8918 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8919
8920 if (globals->root.dynamic_sections_created)
8921 srelgot = globals->root.srelgot;
8922 else
8923 srelgot = NULL;
8924
8925 r_symndx = ELF32_R_SYM (rel->r_info);
8926
8927 if (globals->use_rel)
8928 {
8929 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8930
8931 if (addend & ((howto->src_mask + 1) >> 1))
8932 {
8933 signed_addend = -1;
8934 signed_addend &= ~ howto->src_mask;
8935 signed_addend |= addend;
8936 }
8937 else
8938 signed_addend = addend;
8939 }
8940 else
8941 addend = signed_addend = rel->r_addend;
8942
8943 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8944 are resolving a function call relocation. */
8945 if (using_thumb_only (globals)
8946 && (r_type == R_ARM_THM_CALL
8947 || r_type == R_ARM_THM_JUMP24)
8948 && branch_type == ST_BRANCH_TO_ARM)
8949 branch_type = ST_BRANCH_TO_THUMB;
8950
8951 /* Record the symbol information that should be used in dynamic
8952 relocations. */
8953 dynreloc_st_type = st_type;
8954 dynreloc_value = value;
8955 if (branch_type == ST_BRANCH_TO_THUMB)
8956 dynreloc_value |= 1;
8957
8958 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8959 VALUE appropriately for relocations that we resolve at link time. */
8960 has_iplt_entry = FALSE;
8961 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8962 && root_plt->offset != (bfd_vma) -1)
8963 {
8964 plt_offset = root_plt->offset;
8965 gotplt_offset = arm_plt->got_offset;
8966
8967 if (h == NULL || eh->is_iplt)
8968 {
8969 has_iplt_entry = TRUE;
8970 splt = globals->root.iplt;
8971
8972 /* Populate .iplt entries here, because not all of them will
8973 be seen by finish_dynamic_symbol. The lower bit is set if
8974 we have already populated the entry. */
8975 if (plt_offset & 1)
8976 plt_offset--;
8977 else
8978 {
8979 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8980 -1, dynreloc_value))
8981 root_plt->offset |= 1;
8982 else
8983 return bfd_reloc_notsupported;
8984 }
8985
8986 /* Static relocations always resolve to the .iplt entry. */
8987 st_type = STT_FUNC;
8988 value = (splt->output_section->vma
8989 + splt->output_offset
8990 + plt_offset);
8991 branch_type = ST_BRANCH_TO_ARM;
8992
8993 /* If there are non-call relocations that resolve to the .iplt
8994 entry, then all dynamic ones must too. */
8995 if (arm_plt->noncall_refcount != 0)
8996 {
8997 dynreloc_st_type = st_type;
8998 dynreloc_value = value;
8999 }
9000 }
9001 else
9002 /* We populate the .plt entry in finish_dynamic_symbol. */
9003 splt = globals->root.splt;
9004 }
9005 else
9006 {
9007 splt = NULL;
9008 plt_offset = (bfd_vma) -1;
9009 gotplt_offset = (bfd_vma) -1;
9010 }
9011
9012 switch (r_type)
9013 {
9014 case R_ARM_NONE:
9015 /* We don't need to find a value for this symbol. It's just a
9016 marker. */
9017 *unresolved_reloc_p = FALSE;
9018 return bfd_reloc_ok;
9019
9020 case R_ARM_ABS12:
9021 if (!globals->vxworks_p)
9022 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
9023
9024 case R_ARM_PC24:
9025 case R_ARM_ABS32:
9026 case R_ARM_ABS32_NOI:
9027 case R_ARM_REL32:
9028 case R_ARM_REL32_NOI:
9029 case R_ARM_CALL:
9030 case R_ARM_JUMP24:
9031 case R_ARM_XPC25:
9032 case R_ARM_PREL31:
9033 case R_ARM_PLT32:
9034 /* Handle relocations which should use the PLT entry. ABS32/REL32
9035 will use the symbol's value, which may point to a PLT entry, but we
9036 don't need to handle that here. If we created a PLT entry, all
9037 branches in this object should go to it, except if the PLT is too
9038 far away, in which case a long branch stub should be inserted. */
9039 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
9040 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
9041 && r_type != R_ARM_CALL
9042 && r_type != R_ARM_JUMP24
9043 && r_type != R_ARM_PLT32)
9044 && plt_offset != (bfd_vma) -1)
9045 {
9046 /* If we've created a .plt section, and assigned a PLT entry
9047 to this function, it must either be a STT_GNU_IFUNC reference
9048 or not be known to bind locally. In other cases, we should
9049 have cleared the PLT entry by now. */
9050 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
9051
9052 value = (splt->output_section->vma
9053 + splt->output_offset
9054 + plt_offset);
9055 *unresolved_reloc_p = FALSE;
9056 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9057 contents, rel->r_offset, value,
9058 rel->r_addend);
9059 }
9060
9061 /* When generating a shared object or relocatable executable, these
9062 relocations are copied into the output file to be resolved at
9063 run time. */
9064 if ((bfd_link_pic (info)
9065 || globals->root.is_relocatable_executable)
9066 && (input_section->flags & SEC_ALLOC)
9067 && !(globals->vxworks_p
9068 && strcmp (input_section->output_section->name,
9069 ".tls_vars") == 0)
9070 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
9071 || !SYMBOL_CALLS_LOCAL (info, h))
9072 && !(input_bfd == globals->stub_bfd
9073 && strstr (input_section->name, STUB_SUFFIX))
9074 && (h == NULL
9075 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9076 || h->root.type != bfd_link_hash_undefweak)
9077 && r_type != R_ARM_PC24
9078 && r_type != R_ARM_CALL
9079 && r_type != R_ARM_JUMP24
9080 && r_type != R_ARM_PREL31
9081 && r_type != R_ARM_PLT32)
9082 {
9083 Elf_Internal_Rela outrel;
9084 bfd_boolean skip, relocate;
9085
9086 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
9087 && !h->def_regular)
9088 {
9089 char *v = _("shared object");
9090
9091 if (bfd_link_executable (info))
9092 v = _("PIE executable");
9093
9094 (*_bfd_error_handler)
9095 (_("%B: relocation %s against external or undefined symbol `%s'"
9096 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
9097 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
9098 return bfd_reloc_notsupported;
9099 }
9100
9101 *unresolved_reloc_p = FALSE;
9102
9103 if (sreloc == NULL && globals->root.dynamic_sections_created)
9104 {
9105 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
9106 ! globals->use_rel);
9107
9108 if (sreloc == NULL)
9109 return bfd_reloc_notsupported;
9110 }
9111
9112 skip = FALSE;
9113 relocate = FALSE;
9114
9115 outrel.r_addend = addend;
9116 outrel.r_offset =
9117 _bfd_elf_section_offset (output_bfd, info, input_section,
9118 rel->r_offset);
9119 if (outrel.r_offset == (bfd_vma) -1)
9120 skip = TRUE;
9121 else if (outrel.r_offset == (bfd_vma) -2)
9122 skip = TRUE, relocate = TRUE;
9123 outrel.r_offset += (input_section->output_section->vma
9124 + input_section->output_offset);
9125
9126 if (skip)
9127 memset (&outrel, 0, sizeof outrel);
9128 else if (h != NULL
9129 && h->dynindx != -1
9130 && (!bfd_link_pic (info)
9131 || !SYMBOLIC_BIND (info, h)
9132 || !h->def_regular))
9133 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
9134 else
9135 {
9136 int symbol;
9137
9138 /* This symbol is local, or marked to become local. */
9139 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
9140 if (globals->symbian_p)
9141 {
9142 asection *osec;
9143
9144 /* On Symbian OS, the data segment and text segement
9145 can be relocated independently. Therefore, we
9146 must indicate the segment to which this
9147 relocation is relative. The BPABI allows us to
9148 use any symbol in the right segment; we just use
9149 the section symbol as it is convenient. (We
9150 cannot use the symbol given by "h" directly as it
9151 will not appear in the dynamic symbol table.)
9152
9153 Note that the dynamic linker ignores the section
9154 symbol value, so we don't subtract osec->vma
9155 from the emitted reloc addend. */
9156 if (sym_sec)
9157 osec = sym_sec->output_section;
9158 else
9159 osec = input_section->output_section;
9160 symbol = elf_section_data (osec)->dynindx;
9161 if (symbol == 0)
9162 {
9163 struct elf_link_hash_table *htab = elf_hash_table (info);
9164
9165 if ((osec->flags & SEC_READONLY) == 0
9166 && htab->data_index_section != NULL)
9167 osec = htab->data_index_section;
9168 else
9169 osec = htab->text_index_section;
9170 symbol = elf_section_data (osec)->dynindx;
9171 }
9172 BFD_ASSERT (symbol != 0);
9173 }
9174 else
9175 /* On SVR4-ish systems, the dynamic loader cannot
9176 relocate the text and data segments independently,
9177 so the symbol does not matter. */
9178 symbol = 0;
9179 if (dynreloc_st_type == STT_GNU_IFUNC)
9180 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
9181 to the .iplt entry. Instead, every non-call reference
9182 must use an R_ARM_IRELATIVE relocation to obtain the
9183 correct run-time address. */
9184 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
9185 else
9186 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
9187 if (globals->use_rel)
9188 relocate = TRUE;
9189 else
9190 outrel.r_addend += dynreloc_value;
9191 }
9192
9193 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9194
9195 /* If this reloc is against an external symbol, we do not want to
9196 fiddle with the addend. Otherwise, we need to include the symbol
9197 value so that it becomes an addend for the dynamic reloc. */
9198 if (! relocate)
9199 return bfd_reloc_ok;
9200
9201 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9202 contents, rel->r_offset,
9203 dynreloc_value, (bfd_vma) 0);
9204 }
9205 else switch (r_type)
9206 {
9207 case R_ARM_ABS12:
9208 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
9209
9210 case R_ARM_XPC25: /* Arm BLX instruction. */
9211 case R_ARM_CALL:
9212 case R_ARM_JUMP24:
9213 case R_ARM_PC24: /* Arm B/BL instruction. */
9214 case R_ARM_PLT32:
9215 {
9216 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
9217
9218 if (r_type == R_ARM_XPC25)
9219 {
9220 /* Check for Arm calling Arm function. */
9221 /* FIXME: Should we translate the instruction into a BL
9222 instruction instead ? */
9223 if (branch_type != ST_BRANCH_TO_THUMB)
9224 (*_bfd_error_handler)
9225 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
9226 input_bfd,
9227 h ? h->root.root.string : "(local)");
9228 }
9229 else if (r_type == R_ARM_PC24)
9230 {
9231 /* Check for Arm calling Thumb function. */
9232 if (branch_type == ST_BRANCH_TO_THUMB)
9233 {
9234 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
9235 output_bfd, input_section,
9236 hit_data, sym_sec, rel->r_offset,
9237 signed_addend, value,
9238 error_message))
9239 return bfd_reloc_ok;
9240 else
9241 return bfd_reloc_dangerous;
9242 }
9243 }
9244
9245 /* Check if a stub has to be inserted because the
9246 destination is too far or we are changing mode. */
9247 if ( r_type == R_ARM_CALL
9248 || r_type == R_ARM_JUMP24
9249 || r_type == R_ARM_PLT32)
9250 {
9251 enum elf32_arm_stub_type stub_type = arm_stub_none;
9252 struct elf32_arm_link_hash_entry *hash;
9253
9254 hash = (struct elf32_arm_link_hash_entry *) h;
9255 stub_type = arm_type_of_stub (info, input_section, rel,
9256 st_type, &branch_type,
9257 hash, value, sym_sec,
9258 input_bfd, sym_name);
9259
9260 if (stub_type != arm_stub_none)
9261 {
9262 /* The target is out of reach, so redirect the
9263 branch to the local stub for this function. */
9264 stub_entry = elf32_arm_get_stub_entry (input_section,
9265 sym_sec, h,
9266 rel, globals,
9267 stub_type);
9268 {
9269 if (stub_entry != NULL)
9270 value = (stub_entry->stub_offset
9271 + stub_entry->stub_sec->output_offset
9272 + stub_entry->stub_sec->output_section->vma);
9273
9274 if (plt_offset != (bfd_vma) -1)
9275 *unresolved_reloc_p = FALSE;
9276 }
9277 }
9278 else
9279 {
9280 /* If the call goes through a PLT entry, make sure to
9281 check distance to the right destination address. */
9282 if (plt_offset != (bfd_vma) -1)
9283 {
9284 value = (splt->output_section->vma
9285 + splt->output_offset
9286 + plt_offset);
9287 *unresolved_reloc_p = FALSE;
9288 /* The PLT entry is in ARM mode, regardless of the
9289 target function. */
9290 branch_type = ST_BRANCH_TO_ARM;
9291 }
9292 }
9293 }
9294
9295 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
9296 where:
9297 S is the address of the symbol in the relocation.
9298 P is address of the instruction being relocated.
9299 A is the addend (extracted from the instruction) in bytes.
9300
9301 S is held in 'value'.
9302 P is the base address of the section containing the
9303 instruction plus the offset of the reloc into that
9304 section, ie:
9305 (input_section->output_section->vma +
9306 input_section->output_offset +
9307 rel->r_offset).
9308 A is the addend, converted into bytes, ie:
9309 (signed_addend * 4)
9310
9311 Note: None of these operations have knowledge of the pipeline
9312 size of the processor, thus it is up to the assembler to
9313 encode this information into the addend. */
9314 value -= (input_section->output_section->vma
9315 + input_section->output_offset);
9316 value -= rel->r_offset;
9317 if (globals->use_rel)
9318 value += (signed_addend << howto->size);
9319 else
9320 /* RELA addends do not have to be adjusted by howto->size. */
9321 value += signed_addend;
9322
9323 signed_addend = value;
9324 signed_addend >>= howto->rightshift;
9325
9326 /* A branch to an undefined weak symbol is turned into a jump to
9327 the next instruction unless a PLT entry will be created.
9328 Do the same for local undefined symbols (but not for STN_UNDEF).
9329 The jump to the next instruction is optimized as a NOP depending
9330 on the architecture. */
9331 if (h ? (h->root.type == bfd_link_hash_undefweak
9332 && plt_offset == (bfd_vma) -1)
9333 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
9334 {
9335 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
9336
9337 if (arch_has_arm_nop (globals))
9338 value |= 0x0320f000;
9339 else
9340 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
9341 }
9342 else
9343 {
9344 /* Perform a signed range check. */
9345 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
9346 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
9347 return bfd_reloc_overflow;
9348
9349 addend = (value & 2);
9350
9351 value = (signed_addend & howto->dst_mask)
9352 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
9353
9354 if (r_type == R_ARM_CALL)
9355 {
9356 /* Set the H bit in the BLX instruction. */
9357 if (branch_type == ST_BRANCH_TO_THUMB)
9358 {
9359 if (addend)
9360 value |= (1 << 24);
9361 else
9362 value &= ~(bfd_vma)(1 << 24);
9363 }
9364
9365 /* Select the correct instruction (BL or BLX). */
9366 /* Only if we are not handling a BL to a stub. In this
9367 case, mode switching is performed by the stub. */
9368 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
9369 value |= (1 << 28);
9370 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
9371 {
9372 value &= ~(bfd_vma)(1 << 28);
9373 value |= (1 << 24);
9374 }
9375 }
9376 }
9377 }
9378 break;
9379
9380 case R_ARM_ABS32:
9381 value += addend;
9382 if (branch_type == ST_BRANCH_TO_THUMB)
9383 value |= 1;
9384 break;
9385
9386 case R_ARM_ABS32_NOI:
9387 value += addend;
9388 break;
9389
9390 case R_ARM_REL32:
9391 value += addend;
9392 if (branch_type == ST_BRANCH_TO_THUMB)
9393 value |= 1;
9394 value -= (input_section->output_section->vma
9395 + input_section->output_offset + rel->r_offset);
9396 break;
9397
9398 case R_ARM_REL32_NOI:
9399 value += addend;
9400 value -= (input_section->output_section->vma
9401 + input_section->output_offset + rel->r_offset);
9402 break;
9403
9404 case R_ARM_PREL31:
9405 value -= (input_section->output_section->vma
9406 + input_section->output_offset + rel->r_offset);
9407 value += signed_addend;
9408 if (! h || h->root.type != bfd_link_hash_undefweak)
9409 {
9410 /* Check for overflow. */
9411 if ((value ^ (value >> 1)) & (1 << 30))
9412 return bfd_reloc_overflow;
9413 }
9414 value &= 0x7fffffff;
9415 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
9416 if (branch_type == ST_BRANCH_TO_THUMB)
9417 value |= 1;
9418 break;
9419 }
9420
9421 bfd_put_32 (input_bfd, value, hit_data);
9422 return bfd_reloc_ok;
9423
9424 case R_ARM_ABS8:
9425 /* PR 16202: Refectch the addend using the correct size. */
9426 if (globals->use_rel)
9427 addend = bfd_get_8 (input_bfd, hit_data);
9428 value += addend;
9429
9430 /* There is no way to tell whether the user intended to use a signed or
9431 unsigned addend. When checking for overflow we accept either,
9432 as specified by the AAELF. */
9433 if ((long) value > 0xff || (long) value < -0x80)
9434 return bfd_reloc_overflow;
9435
9436 bfd_put_8 (input_bfd, value, hit_data);
9437 return bfd_reloc_ok;
9438
9439 case R_ARM_ABS16:
9440 /* PR 16202: Refectch the addend using the correct size. */
9441 if (globals->use_rel)
9442 addend = bfd_get_16 (input_bfd, hit_data);
9443 value += addend;
9444
9445 /* See comment for R_ARM_ABS8. */
9446 if ((long) value > 0xffff || (long) value < -0x8000)
9447 return bfd_reloc_overflow;
9448
9449 bfd_put_16 (input_bfd, value, hit_data);
9450 return bfd_reloc_ok;
9451
9452 case R_ARM_THM_ABS5:
9453 /* Support ldr and str instructions for the thumb. */
9454 if (globals->use_rel)
9455 {
9456 /* Need to refetch addend. */
9457 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9458 /* ??? Need to determine shift amount from operand size. */
9459 addend >>= howto->rightshift;
9460 }
9461 value += addend;
9462
9463 /* ??? Isn't value unsigned? */
9464 if ((long) value > 0x1f || (long) value < -0x10)
9465 return bfd_reloc_overflow;
9466
9467 /* ??? Value needs to be properly shifted into place first. */
9468 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
9469 bfd_put_16 (input_bfd, value, hit_data);
9470 return bfd_reloc_ok;
9471
9472 case R_ARM_THM_ALU_PREL_11_0:
9473 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
9474 {
9475 bfd_vma insn;
9476 bfd_signed_vma relocation;
9477
9478 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
9479 | bfd_get_16 (input_bfd, hit_data + 2);
9480
9481 if (globals->use_rel)
9482 {
9483 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
9484 | ((insn & (1 << 26)) >> 15);
9485 if (insn & 0xf00000)
9486 signed_addend = -signed_addend;
9487 }
9488
9489 relocation = value + signed_addend;
9490 relocation -= Pa (input_section->output_section->vma
9491 + input_section->output_offset
9492 + rel->r_offset);
9493
9494 value = relocation;
9495
9496 if (value >= 0x1000)
9497 return bfd_reloc_overflow;
9498
9499 insn = (insn & 0xfb0f8f00) | (value & 0xff)
9500 | ((value & 0x700) << 4)
9501 | ((value & 0x800) << 15);
9502 if (relocation < 0)
9503 insn |= 0xa00000;
9504
9505 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9506 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9507
9508 return bfd_reloc_ok;
9509 }
9510
9511 case R_ARM_THM_PC8:
9512 /* PR 10073: This reloc is not generated by the GNU toolchain,
9513 but it is supported for compatibility with third party libraries
9514 generated by other compilers, specifically the ARM/IAR. */
9515 {
9516 bfd_vma insn;
9517 bfd_signed_vma relocation;
9518
9519 insn = bfd_get_16 (input_bfd, hit_data);
9520
9521 if (globals->use_rel)
9522 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
9523
9524 relocation = value + addend;
9525 relocation -= Pa (input_section->output_section->vma
9526 + input_section->output_offset
9527 + rel->r_offset);
9528
9529 value = relocation;
9530
9531 /* We do not check for overflow of this reloc. Although strictly
9532 speaking this is incorrect, it appears to be necessary in order
9533 to work with IAR generated relocs. Since GCC and GAS do not
9534 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
9535 a problem for them. */
9536 value &= 0x3fc;
9537
9538 insn = (insn & 0xff00) | (value >> 2);
9539
9540 bfd_put_16 (input_bfd, insn, hit_data);
9541
9542 return bfd_reloc_ok;
9543 }
9544
9545 case R_ARM_THM_PC12:
9546 /* Corresponds to: ldr.w reg, [pc, #offset]. */
9547 {
9548 bfd_vma insn;
9549 bfd_signed_vma relocation;
9550
9551 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
9552 | bfd_get_16 (input_bfd, hit_data + 2);
9553
9554 if (globals->use_rel)
9555 {
9556 signed_addend = insn & 0xfff;
9557 if (!(insn & (1 << 23)))
9558 signed_addend = -signed_addend;
9559 }
9560
9561 relocation = value + signed_addend;
9562 relocation -= Pa (input_section->output_section->vma
9563 + input_section->output_offset
9564 + rel->r_offset);
9565
9566 value = relocation;
9567
9568 if (value >= 0x1000)
9569 return bfd_reloc_overflow;
9570
9571 insn = (insn & 0xff7ff000) | value;
9572 if (relocation >= 0)
9573 insn |= (1 << 23);
9574
9575 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9576 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9577
9578 return bfd_reloc_ok;
9579 }
9580
9581 case R_ARM_THM_XPC22:
9582 case R_ARM_THM_CALL:
9583 case R_ARM_THM_JUMP24:
9584 /* Thumb BL (branch long instruction). */
9585 {
9586 bfd_vma relocation;
9587 bfd_vma reloc_sign;
9588 bfd_boolean overflow = FALSE;
9589 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9590 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9591 bfd_signed_vma reloc_signed_max;
9592 bfd_signed_vma reloc_signed_min;
9593 bfd_vma check;
9594 bfd_signed_vma signed_check;
9595 int bitsize;
9596 const int thumb2 = using_thumb2 (globals);
9597
9598 /* A branch to an undefined weak symbol is turned into a jump to
9599 the next instruction unless a PLT entry will be created.
9600 The jump to the next instruction is optimized as a NOP.W for
9601 Thumb-2 enabled architectures. */
9602 if (h && h->root.type == bfd_link_hash_undefweak
9603 && plt_offset == (bfd_vma) -1)
9604 {
9605 if (arch_has_thumb2_nop (globals))
9606 {
9607 bfd_put_16 (input_bfd, 0xf3af, hit_data);
9608 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
9609 }
9610 else
9611 {
9612 bfd_put_16 (input_bfd, 0xe000, hit_data);
9613 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
9614 }
9615 return bfd_reloc_ok;
9616 }
9617
9618 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
9619 with Thumb-1) involving the J1 and J2 bits. */
9620 if (globals->use_rel)
9621 {
9622 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
9623 bfd_vma upper = upper_insn & 0x3ff;
9624 bfd_vma lower = lower_insn & 0x7ff;
9625 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
9626 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
9627 bfd_vma i1 = j1 ^ s ? 0 : 1;
9628 bfd_vma i2 = j2 ^ s ? 0 : 1;
9629
9630 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
9631 /* Sign extend. */
9632 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
9633
9634 signed_addend = addend;
9635 }
9636
9637 if (r_type == R_ARM_THM_XPC22)
9638 {
9639 /* Check for Thumb to Thumb call. */
9640 /* FIXME: Should we translate the instruction into a BL
9641 instruction instead ? */
9642 if (branch_type == ST_BRANCH_TO_THUMB)
9643 (*_bfd_error_handler)
9644 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
9645 input_bfd,
9646 h ? h->root.root.string : "(local)");
9647 }
9648 else
9649 {
9650 /* If it is not a call to Thumb, assume call to Arm.
9651 If it is a call relative to a section name, then it is not a
9652 function call at all, but rather a long jump. Calls through
9653 the PLT do not require stubs. */
9654 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
9655 {
9656 if (globals->use_blx && r_type == R_ARM_THM_CALL)
9657 {
9658 /* Convert BL to BLX. */
9659 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9660 }
9661 else if (( r_type != R_ARM_THM_CALL)
9662 && (r_type != R_ARM_THM_JUMP24))
9663 {
9664 if (elf32_thumb_to_arm_stub
9665 (info, sym_name, input_bfd, output_bfd, input_section,
9666 hit_data, sym_sec, rel->r_offset, signed_addend, value,
9667 error_message))
9668 return bfd_reloc_ok;
9669 else
9670 return bfd_reloc_dangerous;
9671 }
9672 }
9673 else if (branch_type == ST_BRANCH_TO_THUMB
9674 && globals->use_blx
9675 && r_type == R_ARM_THM_CALL)
9676 {
9677 /* Make sure this is a BL. */
9678 lower_insn |= 0x1800;
9679 }
9680 }
9681
9682 enum elf32_arm_stub_type stub_type = arm_stub_none;
9683 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
9684 {
9685 /* Check if a stub has to be inserted because the destination
9686 is too far. */
9687 struct elf32_arm_stub_hash_entry *stub_entry;
9688 struct elf32_arm_link_hash_entry *hash;
9689
9690 hash = (struct elf32_arm_link_hash_entry *) h;
9691
9692 stub_type = arm_type_of_stub (info, input_section, rel,
9693 st_type, &branch_type,
9694 hash, value, sym_sec,
9695 input_bfd, sym_name);
9696
9697 if (stub_type != arm_stub_none)
9698 {
9699 /* The target is out of reach or we are changing modes, so
9700 redirect the branch to the local stub for this
9701 function. */
9702 stub_entry = elf32_arm_get_stub_entry (input_section,
9703 sym_sec, h,
9704 rel, globals,
9705 stub_type);
9706 if (stub_entry != NULL)
9707 {
9708 value = (stub_entry->stub_offset
9709 + stub_entry->stub_sec->output_offset
9710 + stub_entry->stub_sec->output_section->vma);
9711
9712 if (plt_offset != (bfd_vma) -1)
9713 *unresolved_reloc_p = FALSE;
9714 }
9715
9716 /* If this call becomes a call to Arm, force BLX. */
9717 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
9718 {
9719 if ((stub_entry
9720 && !arm_stub_is_thumb (stub_entry->stub_type))
9721 || branch_type != ST_BRANCH_TO_THUMB)
9722 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9723 }
9724 }
9725 }
9726
9727 /* Handle calls via the PLT. */
9728 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
9729 {
9730 value = (splt->output_section->vma
9731 + splt->output_offset
9732 + plt_offset);
9733
9734 if (globals->use_blx
9735 && r_type == R_ARM_THM_CALL
9736 && ! using_thumb_only (globals))
9737 {
9738 /* If the Thumb BLX instruction is available, convert
9739 the BL to a BLX instruction to call the ARM-mode
9740 PLT entry. */
9741 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9742 branch_type = ST_BRANCH_TO_ARM;
9743 }
9744 else
9745 {
9746 if (! using_thumb_only (globals))
9747 /* Target the Thumb stub before the ARM PLT entry. */
9748 value -= PLT_THUMB_STUB_SIZE;
9749 branch_type = ST_BRANCH_TO_THUMB;
9750 }
9751 *unresolved_reloc_p = FALSE;
9752 }
9753
9754 relocation = value + signed_addend;
9755
9756 relocation -= (input_section->output_section->vma
9757 + input_section->output_offset
9758 + rel->r_offset);
9759
9760 check = relocation >> howto->rightshift;
9761
9762 /* If this is a signed value, the rightshift just dropped
9763 leading 1 bits (assuming twos complement). */
9764 if ((bfd_signed_vma) relocation >= 0)
9765 signed_check = check;
9766 else
9767 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
9768
9769 /* Calculate the permissable maximum and minimum values for
9770 this relocation according to whether we're relocating for
9771 Thumb-2 or not. */
9772 bitsize = howto->bitsize;
9773 if (!thumb2)
9774 bitsize -= 2;
9775 reloc_signed_max = (1 << (bitsize - 1)) - 1;
9776 reloc_signed_min = ~reloc_signed_max;
9777
9778 /* Assumes two's complement. */
9779 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9780 overflow = TRUE;
9781
9782 if ((lower_insn & 0x5000) == 0x4000)
9783 /* For a BLX instruction, make sure that the relocation is rounded up
9784 to a word boundary. This follows the semantics of the instruction
9785 which specifies that bit 1 of the target address will come from bit
9786 1 of the base address. */
9787 relocation = (relocation + 2) & ~ 3;
9788
9789 /* Put RELOCATION back into the insn. Assumes two's complement.
9790 We use the Thumb-2 encoding, which is safe even if dealing with
9791 a Thumb-1 instruction by virtue of our overflow check above. */
9792 reloc_sign = (signed_check < 0) ? 1 : 0;
9793 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
9794 | ((relocation >> 12) & 0x3ff)
9795 | (reloc_sign << 10);
9796 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
9797 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9798 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9799 | ((relocation >> 1) & 0x7ff);
9800
9801 /* Put the relocated value back in the object file: */
9802 bfd_put_16 (input_bfd, upper_insn, hit_data);
9803 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9804
9805 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9806 }
9807 break;
9808
9809 case R_ARM_THM_JUMP19:
9810 /* Thumb32 conditional branch instruction. */
9811 {
9812 bfd_vma relocation;
9813 bfd_boolean overflow = FALSE;
9814 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9815 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9816 bfd_signed_vma reloc_signed_max = 0xffffe;
9817 bfd_signed_vma reloc_signed_min = -0x100000;
9818 bfd_signed_vma signed_check;
9819 enum elf32_arm_stub_type stub_type = arm_stub_none;
9820 struct elf32_arm_stub_hash_entry *stub_entry;
9821 struct elf32_arm_link_hash_entry *hash;
9822
9823 /* Need to refetch the addend, reconstruct the top three bits,
9824 and squish the two 11 bit pieces together. */
9825 if (globals->use_rel)
9826 {
9827 bfd_vma S = (upper_insn & 0x0400) >> 10;
9828 bfd_vma upper = (upper_insn & 0x003f);
9829 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9830 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9831 bfd_vma lower = (lower_insn & 0x07ff);
9832
9833 upper |= J1 << 6;
9834 upper |= J2 << 7;
9835 upper |= (!S) << 8;
9836 upper -= 0x0100; /* Sign extend. */
9837
9838 addend = (upper << 12) | (lower << 1);
9839 signed_addend = addend;
9840 }
9841
9842 /* Handle calls via the PLT. */
9843 if (plt_offset != (bfd_vma) -1)
9844 {
9845 value = (splt->output_section->vma
9846 + splt->output_offset
9847 + plt_offset);
9848 /* Target the Thumb stub before the ARM PLT entry. */
9849 value -= PLT_THUMB_STUB_SIZE;
9850 *unresolved_reloc_p = FALSE;
9851 }
9852
9853 hash = (struct elf32_arm_link_hash_entry *)h;
9854
9855 stub_type = arm_type_of_stub (info, input_section, rel,
9856 st_type, &branch_type,
9857 hash, value, sym_sec,
9858 input_bfd, sym_name);
9859 if (stub_type != arm_stub_none)
9860 {
9861 stub_entry = elf32_arm_get_stub_entry (input_section,
9862 sym_sec, h,
9863 rel, globals,
9864 stub_type);
9865 if (stub_entry != NULL)
9866 {
9867 value = (stub_entry->stub_offset
9868 + stub_entry->stub_sec->output_offset
9869 + stub_entry->stub_sec->output_section->vma);
9870 }
9871 }
9872
9873 relocation = value + signed_addend;
9874 relocation -= (input_section->output_section->vma
9875 + input_section->output_offset
9876 + rel->r_offset);
9877 signed_check = (bfd_signed_vma) relocation;
9878
9879 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9880 overflow = TRUE;
9881
9882 /* Put RELOCATION back into the insn. */
9883 {
9884 bfd_vma S = (relocation & 0x00100000) >> 20;
9885 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9886 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9887 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9888 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9889
9890 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9891 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9892 }
9893
9894 /* Put the relocated value back in the object file: */
9895 bfd_put_16 (input_bfd, upper_insn, hit_data);
9896 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9897
9898 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9899 }
9900
9901 case R_ARM_THM_JUMP11:
9902 case R_ARM_THM_JUMP8:
9903 case R_ARM_THM_JUMP6:
9904 /* Thumb B (branch) instruction). */
9905 {
9906 bfd_signed_vma relocation;
9907 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9908 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9909 bfd_signed_vma signed_check;
9910
9911 /* CZB cannot jump backward. */
9912 if (r_type == R_ARM_THM_JUMP6)
9913 reloc_signed_min = 0;
9914
9915 if (globals->use_rel)
9916 {
9917 /* Need to refetch addend. */
9918 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9919 if (addend & ((howto->src_mask + 1) >> 1))
9920 {
9921 signed_addend = -1;
9922 signed_addend &= ~ howto->src_mask;
9923 signed_addend |= addend;
9924 }
9925 else
9926 signed_addend = addend;
9927 /* The value in the insn has been right shifted. We need to
9928 undo this, so that we can perform the address calculation
9929 in terms of bytes. */
9930 signed_addend <<= howto->rightshift;
9931 }
9932 relocation = value + signed_addend;
9933
9934 relocation -= (input_section->output_section->vma
9935 + input_section->output_offset
9936 + rel->r_offset);
9937
9938 relocation >>= howto->rightshift;
9939 signed_check = relocation;
9940
9941 if (r_type == R_ARM_THM_JUMP6)
9942 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9943 else
9944 relocation &= howto->dst_mask;
9945 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9946
9947 bfd_put_16 (input_bfd, relocation, hit_data);
9948
9949 /* Assumes two's complement. */
9950 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9951 return bfd_reloc_overflow;
9952
9953 return bfd_reloc_ok;
9954 }
9955
9956 case R_ARM_ALU_PCREL7_0:
9957 case R_ARM_ALU_PCREL15_8:
9958 case R_ARM_ALU_PCREL23_15:
9959 {
9960 bfd_vma insn;
9961 bfd_vma relocation;
9962
9963 insn = bfd_get_32 (input_bfd, hit_data);
9964 if (globals->use_rel)
9965 {
9966 /* Extract the addend. */
9967 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9968 signed_addend = addend;
9969 }
9970 relocation = value + signed_addend;
9971
9972 relocation -= (input_section->output_section->vma
9973 + input_section->output_offset
9974 + rel->r_offset);
9975 insn = (insn & ~0xfff)
9976 | ((howto->bitpos << 7) & 0xf00)
9977 | ((relocation >> howto->bitpos) & 0xff);
9978 bfd_put_32 (input_bfd, value, hit_data);
9979 }
9980 return bfd_reloc_ok;
9981
9982 case R_ARM_GNU_VTINHERIT:
9983 case R_ARM_GNU_VTENTRY:
9984 return bfd_reloc_ok;
9985
9986 case R_ARM_GOTOFF32:
9987 /* Relocation is relative to the start of the
9988 global offset table. */
9989
9990 BFD_ASSERT (sgot != NULL);
9991 if (sgot == NULL)
9992 return bfd_reloc_notsupported;
9993
9994 /* If we are addressing a Thumb function, we need to adjust the
9995 address by one, so that attempts to call the function pointer will
9996 correctly interpret it as Thumb code. */
9997 if (branch_type == ST_BRANCH_TO_THUMB)
9998 value += 1;
9999
10000 /* Note that sgot->output_offset is not involved in this
10001 calculation. We always want the start of .got. If we
10002 define _GLOBAL_OFFSET_TABLE in a different way, as is
10003 permitted by the ABI, we might have to change this
10004 calculation. */
10005 value -= sgot->output_section->vma;
10006 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10007 contents, rel->r_offset, value,
10008 rel->r_addend);
10009
10010 case R_ARM_GOTPC:
10011 /* Use global offset table as symbol value. */
10012 BFD_ASSERT (sgot != NULL);
10013
10014 if (sgot == NULL)
10015 return bfd_reloc_notsupported;
10016
10017 *unresolved_reloc_p = FALSE;
10018 value = sgot->output_section->vma;
10019 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10020 contents, rel->r_offset, value,
10021 rel->r_addend);
10022
10023 case R_ARM_GOT32:
10024 case R_ARM_GOT_PREL:
10025 /* Relocation is to the entry for this symbol in the
10026 global offset table. */
10027 if (sgot == NULL)
10028 return bfd_reloc_notsupported;
10029
10030 if (dynreloc_st_type == STT_GNU_IFUNC
10031 && plt_offset != (bfd_vma) -1
10032 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
10033 {
10034 /* We have a relocation against a locally-binding STT_GNU_IFUNC
10035 symbol, and the relocation resolves directly to the runtime
10036 target rather than to the .iplt entry. This means that any
10037 .got entry would be the same value as the .igot.plt entry,
10038 so there's no point creating both. */
10039 sgot = globals->root.igotplt;
10040 value = sgot->output_offset + gotplt_offset;
10041 }
10042 else if (h != NULL)
10043 {
10044 bfd_vma off;
10045
10046 off = h->got.offset;
10047 BFD_ASSERT (off != (bfd_vma) -1);
10048 if ((off & 1) != 0)
10049 {
10050 /* We have already processsed one GOT relocation against
10051 this symbol. */
10052 off &= ~1;
10053 if (globals->root.dynamic_sections_created
10054 && !SYMBOL_REFERENCES_LOCAL (info, h))
10055 *unresolved_reloc_p = FALSE;
10056 }
10057 else
10058 {
10059 Elf_Internal_Rela outrel;
10060
10061 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
10062 {
10063 /* If the symbol doesn't resolve locally in a static
10064 object, we have an undefined reference. If the
10065 symbol doesn't resolve locally in a dynamic object,
10066 it should be resolved by the dynamic linker. */
10067 if (globals->root.dynamic_sections_created)
10068 {
10069 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
10070 *unresolved_reloc_p = FALSE;
10071 }
10072 else
10073 outrel.r_info = 0;
10074 outrel.r_addend = 0;
10075 }
10076 else
10077 {
10078 if (dynreloc_st_type == STT_GNU_IFUNC)
10079 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
10080 else if (bfd_link_pic (info) &&
10081 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10082 || h->root.type != bfd_link_hash_undefweak))
10083 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
10084 else
10085 outrel.r_info = 0;
10086 outrel.r_addend = dynreloc_value;
10087 }
10088
10089 /* The GOT entry is initialized to zero by default.
10090 See if we should install a different value. */
10091 if (outrel.r_addend != 0
10092 && (outrel.r_info == 0 || globals->use_rel))
10093 {
10094 bfd_put_32 (output_bfd, outrel.r_addend,
10095 sgot->contents + off);
10096 outrel.r_addend = 0;
10097 }
10098
10099 if (outrel.r_info != 0)
10100 {
10101 outrel.r_offset = (sgot->output_section->vma
10102 + sgot->output_offset
10103 + off);
10104 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10105 }
10106 h->got.offset |= 1;
10107 }
10108 value = sgot->output_offset + off;
10109 }
10110 else
10111 {
10112 bfd_vma off;
10113
10114 BFD_ASSERT (local_got_offsets != NULL &&
10115 local_got_offsets[r_symndx] != (bfd_vma) -1);
10116
10117 off = local_got_offsets[r_symndx];
10118
10119 /* The offset must always be a multiple of 4. We use the
10120 least significant bit to record whether we have already
10121 generated the necessary reloc. */
10122 if ((off & 1) != 0)
10123 off &= ~1;
10124 else
10125 {
10126 if (globals->use_rel)
10127 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
10128
10129 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
10130 {
10131 Elf_Internal_Rela outrel;
10132
10133 outrel.r_addend = addend + dynreloc_value;
10134 outrel.r_offset = (sgot->output_section->vma
10135 + sgot->output_offset
10136 + off);
10137 if (dynreloc_st_type == STT_GNU_IFUNC)
10138 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
10139 else
10140 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
10141 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10142 }
10143
10144 local_got_offsets[r_symndx] |= 1;
10145 }
10146
10147 value = sgot->output_offset + off;
10148 }
10149 if (r_type != R_ARM_GOT32)
10150 value += sgot->output_section->vma;
10151
10152 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10153 contents, rel->r_offset, value,
10154 rel->r_addend);
10155
10156 case R_ARM_TLS_LDO32:
10157 value = value - dtpoff_base (info);
10158
10159 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10160 contents, rel->r_offset, value,
10161 rel->r_addend);
10162
10163 case R_ARM_TLS_LDM32:
10164 {
10165 bfd_vma off;
10166
10167 if (sgot == NULL)
10168 abort ();
10169
10170 off = globals->tls_ldm_got.offset;
10171
10172 if ((off & 1) != 0)
10173 off &= ~1;
10174 else
10175 {
10176 /* If we don't know the module number, create a relocation
10177 for it. */
10178 if (bfd_link_pic (info))
10179 {
10180 Elf_Internal_Rela outrel;
10181
10182 if (srelgot == NULL)
10183 abort ();
10184
10185 outrel.r_addend = 0;
10186 outrel.r_offset = (sgot->output_section->vma
10187 + sgot->output_offset + off);
10188 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
10189
10190 if (globals->use_rel)
10191 bfd_put_32 (output_bfd, outrel.r_addend,
10192 sgot->contents + off);
10193
10194 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10195 }
10196 else
10197 bfd_put_32 (output_bfd, 1, sgot->contents + off);
10198
10199 globals->tls_ldm_got.offset |= 1;
10200 }
10201
10202 value = sgot->output_section->vma + sgot->output_offset + off
10203 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
10204
10205 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10206 contents, rel->r_offset, value,
10207 rel->r_addend);
10208 }
10209
10210 case R_ARM_TLS_CALL:
10211 case R_ARM_THM_TLS_CALL:
10212 case R_ARM_TLS_GD32:
10213 case R_ARM_TLS_IE32:
10214 case R_ARM_TLS_GOTDESC:
10215 case R_ARM_TLS_DESCSEQ:
10216 case R_ARM_THM_TLS_DESCSEQ:
10217 {
10218 bfd_vma off, offplt;
10219 int indx = 0;
10220 char tls_type;
10221
10222 BFD_ASSERT (sgot != NULL);
10223
10224 if (h != NULL)
10225 {
10226 bfd_boolean dyn;
10227 dyn = globals->root.dynamic_sections_created;
10228 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
10229 bfd_link_pic (info),
10230 h)
10231 && (!bfd_link_pic (info)
10232 || !SYMBOL_REFERENCES_LOCAL (info, h)))
10233 {
10234 *unresolved_reloc_p = FALSE;
10235 indx = h->dynindx;
10236 }
10237 off = h->got.offset;
10238 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
10239 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
10240 }
10241 else
10242 {
10243 BFD_ASSERT (local_got_offsets != NULL);
10244 off = local_got_offsets[r_symndx];
10245 offplt = local_tlsdesc_gotents[r_symndx];
10246 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
10247 }
10248
10249 /* Linker relaxations happens from one of the
10250 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
10251 if (ELF32_R_TYPE(rel->r_info) != r_type)
10252 tls_type = GOT_TLS_IE;
10253
10254 BFD_ASSERT (tls_type != GOT_UNKNOWN);
10255
10256 if ((off & 1) != 0)
10257 off &= ~1;
10258 else
10259 {
10260 bfd_boolean need_relocs = FALSE;
10261 Elf_Internal_Rela outrel;
10262 int cur_off = off;
10263
10264 /* The GOT entries have not been initialized yet. Do it
10265 now, and emit any relocations. If both an IE GOT and a
10266 GD GOT are necessary, we emit the GD first. */
10267
10268 if ((bfd_link_pic (info) || indx != 0)
10269 && (h == NULL
10270 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10271 || h->root.type != bfd_link_hash_undefweak))
10272 {
10273 need_relocs = TRUE;
10274 BFD_ASSERT (srelgot != NULL);
10275 }
10276
10277 if (tls_type & GOT_TLS_GDESC)
10278 {
10279 bfd_byte *loc;
10280
10281 /* We should have relaxed, unless this is an undefined
10282 weak symbol. */
10283 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
10284 || bfd_link_pic (info));
10285 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
10286 <= globals->root.sgotplt->size);
10287
10288 outrel.r_addend = 0;
10289 outrel.r_offset = (globals->root.sgotplt->output_section->vma
10290 + globals->root.sgotplt->output_offset
10291 + offplt
10292 + globals->sgotplt_jump_table_size);
10293
10294 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
10295 sreloc = globals->root.srelplt;
10296 loc = sreloc->contents;
10297 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
10298 BFD_ASSERT (loc + RELOC_SIZE (globals)
10299 <= sreloc->contents + sreloc->size);
10300
10301 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
10302
10303 /* For globals, the first word in the relocation gets
10304 the relocation index and the top bit set, or zero,
10305 if we're binding now. For locals, it gets the
10306 symbol's offset in the tls section. */
10307 bfd_put_32 (output_bfd,
10308 !h ? value - elf_hash_table (info)->tls_sec->vma
10309 : info->flags & DF_BIND_NOW ? 0
10310 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
10311 globals->root.sgotplt->contents + offplt
10312 + globals->sgotplt_jump_table_size);
10313
10314 /* Second word in the relocation is always zero. */
10315 bfd_put_32 (output_bfd, 0,
10316 globals->root.sgotplt->contents + offplt
10317 + globals->sgotplt_jump_table_size + 4);
10318 }
10319 if (tls_type & GOT_TLS_GD)
10320 {
10321 if (need_relocs)
10322 {
10323 outrel.r_addend = 0;
10324 outrel.r_offset = (sgot->output_section->vma
10325 + sgot->output_offset
10326 + cur_off);
10327 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
10328
10329 if (globals->use_rel)
10330 bfd_put_32 (output_bfd, outrel.r_addend,
10331 sgot->contents + cur_off);
10332
10333 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10334
10335 if (indx == 0)
10336 bfd_put_32 (output_bfd, value - dtpoff_base (info),
10337 sgot->contents + cur_off + 4);
10338 else
10339 {
10340 outrel.r_addend = 0;
10341 outrel.r_info = ELF32_R_INFO (indx,
10342 R_ARM_TLS_DTPOFF32);
10343 outrel.r_offset += 4;
10344
10345 if (globals->use_rel)
10346 bfd_put_32 (output_bfd, outrel.r_addend,
10347 sgot->contents + cur_off + 4);
10348
10349 elf32_arm_add_dynreloc (output_bfd, info,
10350 srelgot, &outrel);
10351 }
10352 }
10353 else
10354 {
10355 /* If we are not emitting relocations for a
10356 general dynamic reference, then we must be in a
10357 static link or an executable link with the
10358 symbol binding locally. Mark it as belonging
10359 to module 1, the executable. */
10360 bfd_put_32 (output_bfd, 1,
10361 sgot->contents + cur_off);
10362 bfd_put_32 (output_bfd, value - dtpoff_base (info),
10363 sgot->contents + cur_off + 4);
10364 }
10365
10366 cur_off += 8;
10367 }
10368
10369 if (tls_type & GOT_TLS_IE)
10370 {
10371 if (need_relocs)
10372 {
10373 if (indx == 0)
10374 outrel.r_addend = value - dtpoff_base (info);
10375 else
10376 outrel.r_addend = 0;
10377 outrel.r_offset = (sgot->output_section->vma
10378 + sgot->output_offset
10379 + cur_off);
10380 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
10381
10382 if (globals->use_rel)
10383 bfd_put_32 (output_bfd, outrel.r_addend,
10384 sgot->contents + cur_off);
10385
10386 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10387 }
10388 else
10389 bfd_put_32 (output_bfd, tpoff (info, value),
10390 sgot->contents + cur_off);
10391 cur_off += 4;
10392 }
10393
10394 if (h != NULL)
10395 h->got.offset |= 1;
10396 else
10397 local_got_offsets[r_symndx] |= 1;
10398 }
10399
10400 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
10401 off += 8;
10402 else if (tls_type & GOT_TLS_GDESC)
10403 off = offplt;
10404
10405 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
10406 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
10407 {
10408 bfd_signed_vma offset;
10409 /* TLS stubs are arm mode. The original symbol is a
10410 data object, so branch_type is bogus. */
10411 branch_type = ST_BRANCH_TO_ARM;
10412 enum elf32_arm_stub_type stub_type
10413 = arm_type_of_stub (info, input_section, rel,
10414 st_type, &branch_type,
10415 (struct elf32_arm_link_hash_entry *)h,
10416 globals->tls_trampoline, globals->root.splt,
10417 input_bfd, sym_name);
10418
10419 if (stub_type != arm_stub_none)
10420 {
10421 struct elf32_arm_stub_hash_entry *stub_entry
10422 = elf32_arm_get_stub_entry
10423 (input_section, globals->root.splt, 0, rel,
10424 globals, stub_type);
10425 offset = (stub_entry->stub_offset
10426 + stub_entry->stub_sec->output_offset
10427 + stub_entry->stub_sec->output_section->vma);
10428 }
10429 else
10430 offset = (globals->root.splt->output_section->vma
10431 + globals->root.splt->output_offset
10432 + globals->tls_trampoline);
10433
10434 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
10435 {
10436 unsigned long inst;
10437
10438 offset -= (input_section->output_section->vma
10439 + input_section->output_offset
10440 + rel->r_offset + 8);
10441
10442 inst = offset >> 2;
10443 inst &= 0x00ffffff;
10444 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
10445 }
10446 else
10447 {
10448 /* Thumb blx encodes the offset in a complicated
10449 fashion. */
10450 unsigned upper_insn, lower_insn;
10451 unsigned neg;
10452
10453 offset -= (input_section->output_section->vma
10454 + input_section->output_offset
10455 + rel->r_offset + 4);
10456
10457 if (stub_type != arm_stub_none
10458 && arm_stub_is_thumb (stub_type))
10459 {
10460 lower_insn = 0xd000;
10461 }
10462 else
10463 {
10464 lower_insn = 0xc000;
10465 /* Round up the offset to a word boundary. */
10466 offset = (offset + 2) & ~2;
10467 }
10468
10469 neg = offset < 0;
10470 upper_insn = (0xf000
10471 | ((offset >> 12) & 0x3ff)
10472 | (neg << 10));
10473 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
10474 | (((!((offset >> 22) & 1)) ^ neg) << 11)
10475 | ((offset >> 1) & 0x7ff);
10476 bfd_put_16 (input_bfd, upper_insn, hit_data);
10477 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10478 return bfd_reloc_ok;
10479 }
10480 }
10481 /* These relocations needs special care, as besides the fact
10482 they point somewhere in .gotplt, the addend must be
10483 adjusted accordingly depending on the type of instruction
10484 we refer to. */
10485 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
10486 {
10487 unsigned long data, insn;
10488 unsigned thumb;
10489
10490 data = bfd_get_32 (input_bfd, hit_data);
10491 thumb = data & 1;
10492 data &= ~1u;
10493
10494 if (thumb)
10495 {
10496 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
10497 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10498 insn = (insn << 16)
10499 | bfd_get_16 (input_bfd,
10500 contents + rel->r_offset - data + 2);
10501 if ((insn & 0xf800c000) == 0xf000c000)
10502 /* bl/blx */
10503 value = -6;
10504 else if ((insn & 0xffffff00) == 0x4400)
10505 /* add */
10506 value = -5;
10507 else
10508 {
10509 (*_bfd_error_handler)
10510 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
10511 input_bfd, input_section,
10512 (unsigned long)rel->r_offset, insn);
10513 return bfd_reloc_notsupported;
10514 }
10515 }
10516 else
10517 {
10518 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
10519
10520 switch (insn >> 24)
10521 {
10522 case 0xeb: /* bl */
10523 case 0xfa: /* blx */
10524 value = -4;
10525 break;
10526
10527 case 0xe0: /* add */
10528 value = -8;
10529 break;
10530
10531 default:
10532 (*_bfd_error_handler)
10533 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
10534 input_bfd, input_section,
10535 (unsigned long)rel->r_offset, insn);
10536 return bfd_reloc_notsupported;
10537 }
10538 }
10539
10540 value += ((globals->root.sgotplt->output_section->vma
10541 + globals->root.sgotplt->output_offset + off)
10542 - (input_section->output_section->vma
10543 + input_section->output_offset
10544 + rel->r_offset)
10545 + globals->sgotplt_jump_table_size);
10546 }
10547 else
10548 value = ((globals->root.sgot->output_section->vma
10549 + globals->root.sgot->output_offset + off)
10550 - (input_section->output_section->vma
10551 + input_section->output_offset + rel->r_offset));
10552
10553 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10554 contents, rel->r_offset, value,
10555 rel->r_addend);
10556 }
10557
10558 case R_ARM_TLS_LE32:
10559 if (bfd_link_dll (info))
10560 {
10561 (*_bfd_error_handler)
10562 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
10563 input_bfd, input_section,
10564 (long) rel->r_offset, howto->name);
10565 return bfd_reloc_notsupported;
10566 }
10567 else
10568 value = tpoff (info, value);
10569
10570 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10571 contents, rel->r_offset, value,
10572 rel->r_addend);
10573
10574 case R_ARM_V4BX:
10575 if (globals->fix_v4bx)
10576 {
10577 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10578
10579 /* Ensure that we have a BX instruction. */
10580 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
10581
10582 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
10583 {
10584 /* Branch to veneer. */
10585 bfd_vma glue_addr;
10586 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
10587 glue_addr -= input_section->output_section->vma
10588 + input_section->output_offset
10589 + rel->r_offset + 8;
10590 insn = (insn & 0xf0000000) | 0x0a000000
10591 | ((glue_addr >> 2) & 0x00ffffff);
10592 }
10593 else
10594 {
10595 /* Preserve Rm (lowest four bits) and the condition code
10596 (highest four bits). Other bits encode MOV PC,Rm. */
10597 insn = (insn & 0xf000000f) | 0x01a0f000;
10598 }
10599
10600 bfd_put_32 (input_bfd, insn, hit_data);
10601 }
10602 return bfd_reloc_ok;
10603
10604 case R_ARM_MOVW_ABS_NC:
10605 case R_ARM_MOVT_ABS:
10606 case R_ARM_MOVW_PREL_NC:
10607 case R_ARM_MOVT_PREL:
10608 /* Until we properly support segment-base-relative addressing then
10609 we assume the segment base to be zero, as for the group relocations.
10610 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
10611 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
10612 case R_ARM_MOVW_BREL_NC:
10613 case R_ARM_MOVW_BREL:
10614 case R_ARM_MOVT_BREL:
10615 {
10616 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10617
10618 if (globals->use_rel)
10619 {
10620 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
10621 signed_addend = (addend ^ 0x8000) - 0x8000;
10622 }
10623
10624 value += signed_addend;
10625
10626 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
10627 value -= (input_section->output_section->vma
10628 + input_section->output_offset + rel->r_offset);
10629
10630 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
10631 return bfd_reloc_overflow;
10632
10633 if (branch_type == ST_BRANCH_TO_THUMB)
10634 value |= 1;
10635
10636 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
10637 || r_type == R_ARM_MOVT_BREL)
10638 value >>= 16;
10639
10640 insn &= 0xfff0f000;
10641 insn |= value & 0xfff;
10642 insn |= (value & 0xf000) << 4;
10643 bfd_put_32 (input_bfd, insn, hit_data);
10644 }
10645 return bfd_reloc_ok;
10646
10647 case R_ARM_THM_MOVW_ABS_NC:
10648 case R_ARM_THM_MOVT_ABS:
10649 case R_ARM_THM_MOVW_PREL_NC:
10650 case R_ARM_THM_MOVT_PREL:
10651 /* Until we properly support segment-base-relative addressing then
10652 we assume the segment base to be zero, as for the above relocations.
10653 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
10654 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
10655 as R_ARM_THM_MOVT_ABS. */
10656 case R_ARM_THM_MOVW_BREL_NC:
10657 case R_ARM_THM_MOVW_BREL:
10658 case R_ARM_THM_MOVT_BREL:
10659 {
10660 bfd_vma insn;
10661
10662 insn = bfd_get_16 (input_bfd, hit_data) << 16;
10663 insn |= bfd_get_16 (input_bfd, hit_data + 2);
10664
10665 if (globals->use_rel)
10666 {
10667 addend = ((insn >> 4) & 0xf000)
10668 | ((insn >> 15) & 0x0800)
10669 | ((insn >> 4) & 0x0700)
10670 | (insn & 0x00ff);
10671 signed_addend = (addend ^ 0x8000) - 0x8000;
10672 }
10673
10674 value += signed_addend;
10675
10676 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
10677 value -= (input_section->output_section->vma
10678 + input_section->output_offset + rel->r_offset);
10679
10680 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
10681 return bfd_reloc_overflow;
10682
10683 if (branch_type == ST_BRANCH_TO_THUMB)
10684 value |= 1;
10685
10686 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
10687 || r_type == R_ARM_THM_MOVT_BREL)
10688 value >>= 16;
10689
10690 insn &= 0xfbf08f00;
10691 insn |= (value & 0xf000) << 4;
10692 insn |= (value & 0x0800) << 15;
10693 insn |= (value & 0x0700) << 4;
10694 insn |= (value & 0x00ff);
10695
10696 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10697 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10698 }
10699 return bfd_reloc_ok;
10700
10701 case R_ARM_ALU_PC_G0_NC:
10702 case R_ARM_ALU_PC_G1_NC:
10703 case R_ARM_ALU_PC_G0:
10704 case R_ARM_ALU_PC_G1:
10705 case R_ARM_ALU_PC_G2:
10706 case R_ARM_ALU_SB_G0_NC:
10707 case R_ARM_ALU_SB_G1_NC:
10708 case R_ARM_ALU_SB_G0:
10709 case R_ARM_ALU_SB_G1:
10710 case R_ARM_ALU_SB_G2:
10711 {
10712 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10713 bfd_vma pc = input_section->output_section->vma
10714 + input_section->output_offset + rel->r_offset;
10715 /* sb is the origin of the *segment* containing the symbol. */
10716 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10717 bfd_vma residual;
10718 bfd_vma g_n;
10719 bfd_signed_vma signed_value;
10720 int group = 0;
10721
10722 /* Determine which group of bits to select. */
10723 switch (r_type)
10724 {
10725 case R_ARM_ALU_PC_G0_NC:
10726 case R_ARM_ALU_PC_G0:
10727 case R_ARM_ALU_SB_G0_NC:
10728 case R_ARM_ALU_SB_G0:
10729 group = 0;
10730 break;
10731
10732 case R_ARM_ALU_PC_G1_NC:
10733 case R_ARM_ALU_PC_G1:
10734 case R_ARM_ALU_SB_G1_NC:
10735 case R_ARM_ALU_SB_G1:
10736 group = 1;
10737 break;
10738
10739 case R_ARM_ALU_PC_G2:
10740 case R_ARM_ALU_SB_G2:
10741 group = 2;
10742 break;
10743
10744 default:
10745 abort ();
10746 }
10747
10748 /* If REL, extract the addend from the insn. If RELA, it will
10749 have already been fetched for us. */
10750 if (globals->use_rel)
10751 {
10752 int negative;
10753 bfd_vma constant = insn & 0xff;
10754 bfd_vma rotation = (insn & 0xf00) >> 8;
10755
10756 if (rotation == 0)
10757 signed_addend = constant;
10758 else
10759 {
10760 /* Compensate for the fact that in the instruction, the
10761 rotation is stored in multiples of 2 bits. */
10762 rotation *= 2;
10763
10764 /* Rotate "constant" right by "rotation" bits. */
10765 signed_addend = (constant >> rotation) |
10766 (constant << (8 * sizeof (bfd_vma) - rotation));
10767 }
10768
10769 /* Determine if the instruction is an ADD or a SUB.
10770 (For REL, this determines the sign of the addend.) */
10771 negative = identify_add_or_sub (insn);
10772 if (negative == 0)
10773 {
10774 (*_bfd_error_handler)
10775 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10776 input_bfd, input_section,
10777 (long) rel->r_offset, howto->name);
10778 return bfd_reloc_overflow;
10779 }
10780
10781 signed_addend *= negative;
10782 }
10783
10784 /* Compute the value (X) to go in the place. */
10785 if (r_type == R_ARM_ALU_PC_G0_NC
10786 || r_type == R_ARM_ALU_PC_G1_NC
10787 || r_type == R_ARM_ALU_PC_G0
10788 || r_type == R_ARM_ALU_PC_G1
10789 || r_type == R_ARM_ALU_PC_G2)
10790 /* PC relative. */
10791 signed_value = value - pc + signed_addend;
10792 else
10793 /* Section base relative. */
10794 signed_value = value - sb + signed_addend;
10795
10796 /* If the target symbol is a Thumb function, then set the
10797 Thumb bit in the address. */
10798 if (branch_type == ST_BRANCH_TO_THUMB)
10799 signed_value |= 1;
10800
10801 /* Calculate the value of the relevant G_n, in encoded
10802 constant-with-rotation format. */
10803 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10804 group, &residual);
10805
10806 /* Check for overflow if required. */
10807 if ((r_type == R_ARM_ALU_PC_G0
10808 || r_type == R_ARM_ALU_PC_G1
10809 || r_type == R_ARM_ALU_PC_G2
10810 || r_type == R_ARM_ALU_SB_G0
10811 || r_type == R_ARM_ALU_SB_G1
10812 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10813 {
10814 (*_bfd_error_handler)
10815 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10816 input_bfd, input_section,
10817 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
10818 howto->name);
10819 return bfd_reloc_overflow;
10820 }
10821
10822 /* Mask out the value and the ADD/SUB part of the opcode; take care
10823 not to destroy the S bit. */
10824 insn &= 0xff1ff000;
10825
10826 /* Set the opcode according to whether the value to go in the
10827 place is negative. */
10828 if (signed_value < 0)
10829 insn |= 1 << 22;
10830 else
10831 insn |= 1 << 23;
10832
10833 /* Encode the offset. */
10834 insn |= g_n;
10835
10836 bfd_put_32 (input_bfd, insn, hit_data);
10837 }
10838 return bfd_reloc_ok;
10839
10840 case R_ARM_LDR_PC_G0:
10841 case R_ARM_LDR_PC_G1:
10842 case R_ARM_LDR_PC_G2:
10843 case R_ARM_LDR_SB_G0:
10844 case R_ARM_LDR_SB_G1:
10845 case R_ARM_LDR_SB_G2:
10846 {
10847 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10848 bfd_vma pc = input_section->output_section->vma
10849 + input_section->output_offset + rel->r_offset;
10850 /* sb is the origin of the *segment* containing the symbol. */
10851 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10852 bfd_vma residual;
10853 bfd_signed_vma signed_value;
10854 int group = 0;
10855
10856 /* Determine which groups of bits to calculate. */
10857 switch (r_type)
10858 {
10859 case R_ARM_LDR_PC_G0:
10860 case R_ARM_LDR_SB_G0:
10861 group = 0;
10862 break;
10863
10864 case R_ARM_LDR_PC_G1:
10865 case R_ARM_LDR_SB_G1:
10866 group = 1;
10867 break;
10868
10869 case R_ARM_LDR_PC_G2:
10870 case R_ARM_LDR_SB_G2:
10871 group = 2;
10872 break;
10873
10874 default:
10875 abort ();
10876 }
10877
10878 /* If REL, extract the addend from the insn. If RELA, it will
10879 have already been fetched for us. */
10880 if (globals->use_rel)
10881 {
10882 int negative = (insn & (1 << 23)) ? 1 : -1;
10883 signed_addend = negative * (insn & 0xfff);
10884 }
10885
10886 /* Compute the value (X) to go in the place. */
10887 if (r_type == R_ARM_LDR_PC_G0
10888 || r_type == R_ARM_LDR_PC_G1
10889 || r_type == R_ARM_LDR_PC_G2)
10890 /* PC relative. */
10891 signed_value = value - pc + signed_addend;
10892 else
10893 /* Section base relative. */
10894 signed_value = value - sb + signed_addend;
10895
10896 /* Calculate the value of the relevant G_{n-1} to obtain
10897 the residual at that stage. */
10898 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10899 group - 1, &residual);
10900
10901 /* Check for overflow. */
10902 if (residual >= 0x1000)
10903 {
10904 (*_bfd_error_handler)
10905 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10906 input_bfd, input_section,
10907 (long) rel->r_offset, labs (signed_value), howto->name);
10908 return bfd_reloc_overflow;
10909 }
10910
10911 /* Mask out the value and U bit. */
10912 insn &= 0xff7ff000;
10913
10914 /* Set the U bit if the value to go in the place is non-negative. */
10915 if (signed_value >= 0)
10916 insn |= 1 << 23;
10917
10918 /* Encode the offset. */
10919 insn |= residual;
10920
10921 bfd_put_32 (input_bfd, insn, hit_data);
10922 }
10923 return bfd_reloc_ok;
10924
10925 case R_ARM_LDRS_PC_G0:
10926 case R_ARM_LDRS_PC_G1:
10927 case R_ARM_LDRS_PC_G2:
10928 case R_ARM_LDRS_SB_G0:
10929 case R_ARM_LDRS_SB_G1:
10930 case R_ARM_LDRS_SB_G2:
10931 {
10932 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10933 bfd_vma pc = input_section->output_section->vma
10934 + input_section->output_offset + rel->r_offset;
10935 /* sb is the origin of the *segment* containing the symbol. */
10936 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10937 bfd_vma residual;
10938 bfd_signed_vma signed_value;
10939 int group = 0;
10940
10941 /* Determine which groups of bits to calculate. */
10942 switch (r_type)
10943 {
10944 case R_ARM_LDRS_PC_G0:
10945 case R_ARM_LDRS_SB_G0:
10946 group = 0;
10947 break;
10948
10949 case R_ARM_LDRS_PC_G1:
10950 case R_ARM_LDRS_SB_G1:
10951 group = 1;
10952 break;
10953
10954 case R_ARM_LDRS_PC_G2:
10955 case R_ARM_LDRS_SB_G2:
10956 group = 2;
10957 break;
10958
10959 default:
10960 abort ();
10961 }
10962
10963 /* If REL, extract the addend from the insn. If RELA, it will
10964 have already been fetched for us. */
10965 if (globals->use_rel)
10966 {
10967 int negative = (insn & (1 << 23)) ? 1 : -1;
10968 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10969 }
10970
10971 /* Compute the value (X) to go in the place. */
10972 if (r_type == R_ARM_LDRS_PC_G0
10973 || r_type == R_ARM_LDRS_PC_G1
10974 || r_type == R_ARM_LDRS_PC_G2)
10975 /* PC relative. */
10976 signed_value = value - pc + signed_addend;
10977 else
10978 /* Section base relative. */
10979 signed_value = value - sb + signed_addend;
10980
10981 /* Calculate the value of the relevant G_{n-1} to obtain
10982 the residual at that stage. */
10983 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10984 group - 1, &residual);
10985
10986 /* Check for overflow. */
10987 if (residual >= 0x100)
10988 {
10989 (*_bfd_error_handler)
10990 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10991 input_bfd, input_section,
10992 (long) rel->r_offset, labs (signed_value), howto->name);
10993 return bfd_reloc_overflow;
10994 }
10995
10996 /* Mask out the value and U bit. */
10997 insn &= 0xff7ff0f0;
10998
10999 /* Set the U bit if the value to go in the place is non-negative. */
11000 if (signed_value >= 0)
11001 insn |= 1 << 23;
11002
11003 /* Encode the offset. */
11004 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
11005
11006 bfd_put_32 (input_bfd, insn, hit_data);
11007 }
11008 return bfd_reloc_ok;
11009
11010 case R_ARM_LDC_PC_G0:
11011 case R_ARM_LDC_PC_G1:
11012 case R_ARM_LDC_PC_G2:
11013 case R_ARM_LDC_SB_G0:
11014 case R_ARM_LDC_SB_G1:
11015 case R_ARM_LDC_SB_G2:
11016 {
11017 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11018 bfd_vma pc = input_section->output_section->vma
11019 + input_section->output_offset + rel->r_offset;
11020 /* sb is the origin of the *segment* containing the symbol. */
11021 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11022 bfd_vma residual;
11023 bfd_signed_vma signed_value;
11024 int group = 0;
11025
11026 /* Determine which groups of bits to calculate. */
11027 switch (r_type)
11028 {
11029 case R_ARM_LDC_PC_G0:
11030 case R_ARM_LDC_SB_G0:
11031 group = 0;
11032 break;
11033
11034 case R_ARM_LDC_PC_G1:
11035 case R_ARM_LDC_SB_G1:
11036 group = 1;
11037 break;
11038
11039 case R_ARM_LDC_PC_G2:
11040 case R_ARM_LDC_SB_G2:
11041 group = 2;
11042 break;
11043
11044 default:
11045 abort ();
11046 }
11047
11048 /* If REL, extract the addend from the insn. If RELA, it will
11049 have already been fetched for us. */
11050 if (globals->use_rel)
11051 {
11052 int negative = (insn & (1 << 23)) ? 1 : -1;
11053 signed_addend = negative * ((insn & 0xff) << 2);
11054 }
11055
11056 /* Compute the value (X) to go in the place. */
11057 if (r_type == R_ARM_LDC_PC_G0
11058 || r_type == R_ARM_LDC_PC_G1
11059 || r_type == R_ARM_LDC_PC_G2)
11060 /* PC relative. */
11061 signed_value = value - pc + signed_addend;
11062 else
11063 /* Section base relative. */
11064 signed_value = value - sb + signed_addend;
11065
11066 /* Calculate the value of the relevant G_{n-1} to obtain
11067 the residual at that stage. */
11068 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11069 group - 1, &residual);
11070
11071 /* Check for overflow. (The absolute value to go in the place must be
11072 divisible by four and, after having been divided by four, must
11073 fit in eight bits.) */
11074 if ((residual & 0x3) != 0 || residual >= 0x400)
11075 {
11076 (*_bfd_error_handler)
11077 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11078 input_bfd, input_section,
11079 (long) rel->r_offset, labs (signed_value), howto->name);
11080 return bfd_reloc_overflow;
11081 }
11082
11083 /* Mask out the value and U bit. */
11084 insn &= 0xff7fff00;
11085
11086 /* Set the U bit if the value to go in the place is non-negative. */
11087 if (signed_value >= 0)
11088 insn |= 1 << 23;
11089
11090 /* Encode the offset. */
11091 insn |= residual >> 2;
11092
11093 bfd_put_32 (input_bfd, insn, hit_data);
11094 }
11095 return bfd_reloc_ok;
11096
11097 case R_ARM_THM_ALU_ABS_G0_NC:
11098 case R_ARM_THM_ALU_ABS_G1_NC:
11099 case R_ARM_THM_ALU_ABS_G2_NC:
11100 case R_ARM_THM_ALU_ABS_G3_NC:
11101 {
11102 const int shift_array[4] = {0, 8, 16, 24};
11103 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
11104 bfd_vma addr = value;
11105 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
11106
11107 /* Compute address. */
11108 if (globals->use_rel)
11109 signed_addend = insn & 0xff;
11110 addr += signed_addend;
11111 if (branch_type == ST_BRANCH_TO_THUMB)
11112 addr |= 1;
11113 /* Clean imm8 insn. */
11114 insn &= 0xff00;
11115 /* And update with correct part of address. */
11116 insn |= (addr >> shift) & 0xff;
11117 /* Update insn. */
11118 bfd_put_16 (input_bfd, insn, hit_data);
11119 }
11120
11121 *unresolved_reloc_p = FALSE;
11122 return bfd_reloc_ok;
11123
11124 default:
11125 return bfd_reloc_notsupported;
11126 }
11127 }
11128
11129 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
11130 static void
11131 arm_add_to_rel (bfd * abfd,
11132 bfd_byte * address,
11133 reloc_howto_type * howto,
11134 bfd_signed_vma increment)
11135 {
11136 bfd_signed_vma addend;
11137
11138 if (howto->type == R_ARM_THM_CALL
11139 || howto->type == R_ARM_THM_JUMP24)
11140 {
11141 int upper_insn, lower_insn;
11142 int upper, lower;
11143
11144 upper_insn = bfd_get_16 (abfd, address);
11145 lower_insn = bfd_get_16 (abfd, address + 2);
11146 upper = upper_insn & 0x7ff;
11147 lower = lower_insn & 0x7ff;
11148
11149 addend = (upper << 12) | (lower << 1);
11150 addend += increment;
11151 addend >>= 1;
11152
11153 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
11154 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
11155
11156 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
11157 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
11158 }
11159 else
11160 {
11161 bfd_vma contents;
11162
11163 contents = bfd_get_32 (abfd, address);
11164
11165 /* Get the (signed) value from the instruction. */
11166 addend = contents & howto->src_mask;
11167 if (addend & ((howto->src_mask + 1) >> 1))
11168 {
11169 bfd_signed_vma mask;
11170
11171 mask = -1;
11172 mask &= ~ howto->src_mask;
11173 addend |= mask;
11174 }
11175
11176 /* Add in the increment, (which is a byte value). */
11177 switch (howto->type)
11178 {
11179 default:
11180 addend += increment;
11181 break;
11182
11183 case R_ARM_PC24:
11184 case R_ARM_PLT32:
11185 case R_ARM_CALL:
11186 case R_ARM_JUMP24:
11187 addend <<= howto->size;
11188 addend += increment;
11189
11190 /* Should we check for overflow here ? */
11191
11192 /* Drop any undesired bits. */
11193 addend >>= howto->rightshift;
11194 break;
11195 }
11196
11197 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
11198
11199 bfd_put_32 (abfd, contents, address);
11200 }
11201 }
11202
11203 #define IS_ARM_TLS_RELOC(R_TYPE) \
11204 ((R_TYPE) == R_ARM_TLS_GD32 \
11205 || (R_TYPE) == R_ARM_TLS_LDO32 \
11206 || (R_TYPE) == R_ARM_TLS_LDM32 \
11207 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
11208 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
11209 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
11210 || (R_TYPE) == R_ARM_TLS_LE32 \
11211 || (R_TYPE) == R_ARM_TLS_IE32 \
11212 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
11213
11214 /* Specific set of relocations for the gnu tls dialect. */
11215 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
11216 ((R_TYPE) == R_ARM_TLS_GOTDESC \
11217 || (R_TYPE) == R_ARM_TLS_CALL \
11218 || (R_TYPE) == R_ARM_THM_TLS_CALL \
11219 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
11220 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
11221
11222 /* Relocate an ARM ELF section. */
11223
11224 static bfd_boolean
11225 elf32_arm_relocate_section (bfd * output_bfd,
11226 struct bfd_link_info * info,
11227 bfd * input_bfd,
11228 asection * input_section,
11229 bfd_byte * contents,
11230 Elf_Internal_Rela * relocs,
11231 Elf_Internal_Sym * local_syms,
11232 asection ** local_sections)
11233 {
11234 Elf_Internal_Shdr *symtab_hdr;
11235 struct elf_link_hash_entry **sym_hashes;
11236 Elf_Internal_Rela *rel;
11237 Elf_Internal_Rela *relend;
11238 const char *name;
11239 struct elf32_arm_link_hash_table * globals;
11240
11241 globals = elf32_arm_hash_table (info);
11242 if (globals == NULL)
11243 return FALSE;
11244
11245 symtab_hdr = & elf_symtab_hdr (input_bfd);
11246 sym_hashes = elf_sym_hashes (input_bfd);
11247
11248 rel = relocs;
11249 relend = relocs + input_section->reloc_count;
11250 for (; rel < relend; rel++)
11251 {
11252 int r_type;
11253 reloc_howto_type * howto;
11254 unsigned long r_symndx;
11255 Elf_Internal_Sym * sym;
11256 asection * sec;
11257 struct elf_link_hash_entry * h;
11258 bfd_vma relocation;
11259 bfd_reloc_status_type r;
11260 arelent bfd_reloc;
11261 char sym_type;
11262 bfd_boolean unresolved_reloc = FALSE;
11263 char *error_message = NULL;
11264
11265 r_symndx = ELF32_R_SYM (rel->r_info);
11266 r_type = ELF32_R_TYPE (rel->r_info);
11267 r_type = arm_real_reloc_type (globals, r_type);
11268
11269 if ( r_type == R_ARM_GNU_VTENTRY
11270 || r_type == R_ARM_GNU_VTINHERIT)
11271 continue;
11272
11273 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
11274 howto = bfd_reloc.howto;
11275
11276 h = NULL;
11277 sym = NULL;
11278 sec = NULL;
11279
11280 if (r_symndx < symtab_hdr->sh_info)
11281 {
11282 sym = local_syms + r_symndx;
11283 sym_type = ELF32_ST_TYPE (sym->st_info);
11284 sec = local_sections[r_symndx];
11285
11286 /* An object file might have a reference to a local
11287 undefined symbol. This is a daft object file, but we
11288 should at least do something about it. V4BX & NONE
11289 relocations do not use the symbol and are explicitly
11290 allowed to use the undefined symbol, so allow those.
11291 Likewise for relocations against STN_UNDEF. */
11292 if (r_type != R_ARM_V4BX
11293 && r_type != R_ARM_NONE
11294 && r_symndx != STN_UNDEF
11295 && bfd_is_und_section (sec)
11296 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
11297 {
11298 if (!info->callbacks->undefined_symbol
11299 (info, bfd_elf_string_from_elf_section
11300 (input_bfd, symtab_hdr->sh_link, sym->st_name),
11301 input_bfd, input_section,
11302 rel->r_offset, TRUE))
11303 return FALSE;
11304 }
11305
11306 if (globals->use_rel)
11307 {
11308 relocation = (sec->output_section->vma
11309 + sec->output_offset
11310 + sym->st_value);
11311 if (!bfd_link_relocatable (info)
11312 && (sec->flags & SEC_MERGE)
11313 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
11314 {
11315 asection *msec;
11316 bfd_vma addend, value;
11317
11318 switch (r_type)
11319 {
11320 case R_ARM_MOVW_ABS_NC:
11321 case R_ARM_MOVT_ABS:
11322 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
11323 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
11324 addend = (addend ^ 0x8000) - 0x8000;
11325 break;
11326
11327 case R_ARM_THM_MOVW_ABS_NC:
11328 case R_ARM_THM_MOVT_ABS:
11329 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
11330 << 16;
11331 value |= bfd_get_16 (input_bfd,
11332 contents + rel->r_offset + 2);
11333 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
11334 | ((value & 0x04000000) >> 15);
11335 addend = (addend ^ 0x8000) - 0x8000;
11336 break;
11337
11338 default:
11339 if (howto->rightshift
11340 || (howto->src_mask & (howto->src_mask + 1)))
11341 {
11342 (*_bfd_error_handler)
11343 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
11344 input_bfd, input_section,
11345 (long) rel->r_offset, howto->name);
11346 return FALSE;
11347 }
11348
11349 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
11350
11351 /* Get the (signed) value from the instruction. */
11352 addend = value & howto->src_mask;
11353 if (addend & ((howto->src_mask + 1) >> 1))
11354 {
11355 bfd_signed_vma mask;
11356
11357 mask = -1;
11358 mask &= ~ howto->src_mask;
11359 addend |= mask;
11360 }
11361 break;
11362 }
11363
11364 msec = sec;
11365 addend =
11366 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
11367 - relocation;
11368 addend += msec->output_section->vma + msec->output_offset;
11369
11370 /* Cases here must match those in the preceding
11371 switch statement. */
11372 switch (r_type)
11373 {
11374 case R_ARM_MOVW_ABS_NC:
11375 case R_ARM_MOVT_ABS:
11376 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
11377 | (addend & 0xfff);
11378 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
11379 break;
11380
11381 case R_ARM_THM_MOVW_ABS_NC:
11382 case R_ARM_THM_MOVT_ABS:
11383 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
11384 | (addend & 0xff) | ((addend & 0x0800) << 15);
11385 bfd_put_16 (input_bfd, value >> 16,
11386 contents + rel->r_offset);
11387 bfd_put_16 (input_bfd, value,
11388 contents + rel->r_offset + 2);
11389 break;
11390
11391 default:
11392 value = (value & ~ howto->dst_mask)
11393 | (addend & howto->dst_mask);
11394 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
11395 break;
11396 }
11397 }
11398 }
11399 else
11400 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
11401 }
11402 else
11403 {
11404 bfd_boolean warned, ignored;
11405
11406 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
11407 r_symndx, symtab_hdr, sym_hashes,
11408 h, sec, relocation,
11409 unresolved_reloc, warned, ignored);
11410
11411 sym_type = h->type;
11412 }
11413
11414 if (sec != NULL && discarded_section (sec))
11415 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
11416 rel, 1, relend, howto, 0, contents);
11417
11418 if (bfd_link_relocatable (info))
11419 {
11420 /* This is a relocatable link. We don't have to change
11421 anything, unless the reloc is against a section symbol,
11422 in which case we have to adjust according to where the
11423 section symbol winds up in the output section. */
11424 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
11425 {
11426 if (globals->use_rel)
11427 arm_add_to_rel (input_bfd, contents + rel->r_offset,
11428 howto, (bfd_signed_vma) sec->output_offset);
11429 else
11430 rel->r_addend += sec->output_offset;
11431 }
11432 continue;
11433 }
11434
11435 if (h != NULL)
11436 name = h->root.root.string;
11437 else
11438 {
11439 name = (bfd_elf_string_from_elf_section
11440 (input_bfd, symtab_hdr->sh_link, sym->st_name));
11441 if (name == NULL || *name == '\0')
11442 name = bfd_section_name (input_bfd, sec);
11443 }
11444
11445 if (r_symndx != STN_UNDEF
11446 && r_type != R_ARM_NONE
11447 && (h == NULL
11448 || h->root.type == bfd_link_hash_defined
11449 || h->root.type == bfd_link_hash_defweak)
11450 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
11451 {
11452 (*_bfd_error_handler)
11453 ((sym_type == STT_TLS
11454 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
11455 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
11456 input_bfd,
11457 input_section,
11458 (long) rel->r_offset,
11459 howto->name,
11460 name);
11461 }
11462
11463 /* We call elf32_arm_final_link_relocate unless we're completely
11464 done, i.e., the relaxation produced the final output we want,
11465 and we won't let anybody mess with it. Also, we have to do
11466 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
11467 both in relaxed and non-relaxed cases. */
11468 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
11469 || (IS_ARM_TLS_GNU_RELOC (r_type)
11470 && !((h ? elf32_arm_hash_entry (h)->tls_type :
11471 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
11472 & GOT_TLS_GDESC)))
11473 {
11474 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
11475 contents, rel, h == NULL);
11476 /* This may have been marked unresolved because it came from
11477 a shared library. But we've just dealt with that. */
11478 unresolved_reloc = 0;
11479 }
11480 else
11481 r = bfd_reloc_continue;
11482
11483 if (r == bfd_reloc_continue)
11484 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
11485 input_section, contents, rel,
11486 relocation, info, sec, name, sym_type,
11487 (h ? h->target_internal
11488 : ARM_SYM_BRANCH_TYPE (sym)), h,
11489 &unresolved_reloc, &error_message);
11490
11491 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
11492 because such sections are not SEC_ALLOC and thus ld.so will
11493 not process them. */
11494 if (unresolved_reloc
11495 && !((input_section->flags & SEC_DEBUGGING) != 0
11496 && h->def_dynamic)
11497 && _bfd_elf_section_offset (output_bfd, info, input_section,
11498 rel->r_offset) != (bfd_vma) -1)
11499 {
11500 (*_bfd_error_handler)
11501 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
11502 input_bfd,
11503 input_section,
11504 (long) rel->r_offset,
11505 howto->name,
11506 h->root.root.string);
11507 return FALSE;
11508 }
11509
11510 if (r != bfd_reloc_ok)
11511 {
11512 switch (r)
11513 {
11514 case bfd_reloc_overflow:
11515 /* If the overflowing reloc was to an undefined symbol,
11516 we have already printed one error message and there
11517 is no point complaining again. */
11518 if ((! h ||
11519 h->root.type != bfd_link_hash_undefined)
11520 && (!((*info->callbacks->reloc_overflow)
11521 (info, (h ? &h->root : NULL), name, howto->name,
11522 (bfd_vma) 0, input_bfd, input_section,
11523 rel->r_offset))))
11524 return FALSE;
11525 break;
11526
11527 case bfd_reloc_undefined:
11528 if (!((*info->callbacks->undefined_symbol)
11529 (info, name, input_bfd, input_section,
11530 rel->r_offset, TRUE)))
11531 return FALSE;
11532 break;
11533
11534 case bfd_reloc_outofrange:
11535 error_message = _("out of range");
11536 goto common_error;
11537
11538 case bfd_reloc_notsupported:
11539 error_message = _("unsupported relocation");
11540 goto common_error;
11541
11542 case bfd_reloc_dangerous:
11543 /* error_message should already be set. */
11544 goto common_error;
11545
11546 default:
11547 error_message = _("unknown error");
11548 /* Fall through. */
11549
11550 common_error:
11551 BFD_ASSERT (error_message != NULL);
11552 if (!((*info->callbacks->reloc_dangerous)
11553 (info, error_message, input_bfd, input_section,
11554 rel->r_offset)))
11555 return FALSE;
11556 break;
11557 }
11558 }
11559 }
11560
11561 return TRUE;
11562 }
11563
11564 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
11565 adds the edit to the start of the list. (The list must be built in order of
11566 ascending TINDEX: the function's callers are primarily responsible for
11567 maintaining that condition). */
11568
11569 static void
11570 add_unwind_table_edit (arm_unwind_table_edit **head,
11571 arm_unwind_table_edit **tail,
11572 arm_unwind_edit_type type,
11573 asection *linked_section,
11574 unsigned int tindex)
11575 {
11576 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
11577 xmalloc (sizeof (arm_unwind_table_edit));
11578
11579 new_edit->type = type;
11580 new_edit->linked_section = linked_section;
11581 new_edit->index = tindex;
11582
11583 if (tindex > 0)
11584 {
11585 new_edit->next = NULL;
11586
11587 if (*tail)
11588 (*tail)->next = new_edit;
11589
11590 (*tail) = new_edit;
11591
11592 if (!*head)
11593 (*head) = new_edit;
11594 }
11595 else
11596 {
11597 new_edit->next = *head;
11598
11599 if (!*tail)
11600 *tail = new_edit;
11601
11602 *head = new_edit;
11603 }
11604 }
11605
11606 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
11607
11608 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
11609 static void
11610 adjust_exidx_size(asection *exidx_sec, int adjust)
11611 {
11612 asection *out_sec;
11613
11614 if (!exidx_sec->rawsize)
11615 exidx_sec->rawsize = exidx_sec->size;
11616
11617 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
11618 out_sec = exidx_sec->output_section;
11619 /* Adjust size of output section. */
11620 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
11621 }
11622
11623 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
11624 static void
11625 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
11626 {
11627 struct _arm_elf_section_data *exidx_arm_data;
11628
11629 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11630 add_unwind_table_edit (
11631 &exidx_arm_data->u.exidx.unwind_edit_list,
11632 &exidx_arm_data->u.exidx.unwind_edit_tail,
11633 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
11634
11635 exidx_arm_data->additional_reloc_count++;
11636
11637 adjust_exidx_size(exidx_sec, 8);
11638 }
11639
11640 /* Scan .ARM.exidx tables, and create a list describing edits which should be
11641 made to those tables, such that:
11642
11643 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
11644 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
11645 codes which have been inlined into the index).
11646
11647 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
11648
11649 The edits are applied when the tables are written
11650 (in elf32_arm_write_section). */
11651
11652 bfd_boolean
11653 elf32_arm_fix_exidx_coverage (asection **text_section_order,
11654 unsigned int num_text_sections,
11655 struct bfd_link_info *info,
11656 bfd_boolean merge_exidx_entries)
11657 {
11658 bfd *inp;
11659 unsigned int last_second_word = 0, i;
11660 asection *last_exidx_sec = NULL;
11661 asection *last_text_sec = NULL;
11662 int last_unwind_type = -1;
11663
11664 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
11665 text sections. */
11666 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
11667 {
11668 asection *sec;
11669
11670 for (sec = inp->sections; sec != NULL; sec = sec->next)
11671 {
11672 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
11673 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
11674
11675 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
11676 continue;
11677
11678 if (elf_sec->linked_to)
11679 {
11680 Elf_Internal_Shdr *linked_hdr
11681 = &elf_section_data (elf_sec->linked_to)->this_hdr;
11682 struct _arm_elf_section_data *linked_sec_arm_data
11683 = get_arm_elf_section_data (linked_hdr->bfd_section);
11684
11685 if (linked_sec_arm_data == NULL)
11686 continue;
11687
11688 /* Link this .ARM.exidx section back from the text section it
11689 describes. */
11690 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
11691 }
11692 }
11693 }
11694
11695 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
11696 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
11697 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
11698
11699 for (i = 0; i < num_text_sections; i++)
11700 {
11701 asection *sec = text_section_order[i];
11702 asection *exidx_sec;
11703 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
11704 struct _arm_elf_section_data *exidx_arm_data;
11705 bfd_byte *contents = NULL;
11706 int deleted_exidx_bytes = 0;
11707 bfd_vma j;
11708 arm_unwind_table_edit *unwind_edit_head = NULL;
11709 arm_unwind_table_edit *unwind_edit_tail = NULL;
11710 Elf_Internal_Shdr *hdr;
11711 bfd *ibfd;
11712
11713 if (arm_data == NULL)
11714 continue;
11715
11716 exidx_sec = arm_data->u.text.arm_exidx_sec;
11717 if (exidx_sec == NULL)
11718 {
11719 /* Section has no unwind data. */
11720 if (last_unwind_type == 0 || !last_exidx_sec)
11721 continue;
11722
11723 /* Ignore zero sized sections. */
11724 if (sec->size == 0)
11725 continue;
11726
11727 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11728 last_unwind_type = 0;
11729 continue;
11730 }
11731
11732 /* Skip /DISCARD/ sections. */
11733 if (bfd_is_abs_section (exidx_sec->output_section))
11734 continue;
11735
11736 hdr = &elf_section_data (exidx_sec)->this_hdr;
11737 if (hdr->sh_type != SHT_ARM_EXIDX)
11738 continue;
11739
11740 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11741 if (exidx_arm_data == NULL)
11742 continue;
11743
11744 ibfd = exidx_sec->owner;
11745
11746 if (hdr->contents != NULL)
11747 contents = hdr->contents;
11748 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
11749 /* An error? */
11750 continue;
11751
11752 if (last_unwind_type > 0)
11753 {
11754 unsigned int first_word = bfd_get_32 (ibfd, contents);
11755 /* Add cantunwind if first unwind item does not match section
11756 start. */
11757 if (first_word != sec->vma)
11758 {
11759 insert_cantunwind_after (last_text_sec, last_exidx_sec);
11760 last_unwind_type = 0;
11761 }
11762 }
11763
11764 for (j = 0; j < hdr->sh_size; j += 8)
11765 {
11766 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
11767 int unwind_type;
11768 int elide = 0;
11769
11770 /* An EXIDX_CANTUNWIND entry. */
11771 if (second_word == 1)
11772 {
11773 if (last_unwind_type == 0)
11774 elide = 1;
11775 unwind_type = 0;
11776 }
11777 /* Inlined unwinding data. Merge if equal to previous. */
11778 else if ((second_word & 0x80000000) != 0)
11779 {
11780 if (merge_exidx_entries
11781 && last_second_word == second_word && last_unwind_type == 1)
11782 elide = 1;
11783 unwind_type = 1;
11784 last_second_word = second_word;
11785 }
11786 /* Normal table entry. In theory we could merge these too,
11787 but duplicate entries are likely to be much less common. */
11788 else
11789 unwind_type = 2;
11790
11791 if (elide && !bfd_link_relocatable (info))
11792 {
11793 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
11794 DELETE_EXIDX_ENTRY, NULL, j / 8);
11795
11796 deleted_exidx_bytes += 8;
11797 }
11798
11799 last_unwind_type = unwind_type;
11800 }
11801
11802 /* Free contents if we allocated it ourselves. */
11803 if (contents != hdr->contents)
11804 free (contents);
11805
11806 /* Record edits to be applied later (in elf32_arm_write_section). */
11807 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
11808 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
11809
11810 if (deleted_exidx_bytes > 0)
11811 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
11812
11813 last_exidx_sec = exidx_sec;
11814 last_text_sec = sec;
11815 }
11816
11817 /* Add terminating CANTUNWIND entry. */
11818 if (!bfd_link_relocatable (info) && last_exidx_sec
11819 && last_unwind_type != 0)
11820 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11821
11822 return TRUE;
11823 }
11824
11825 static bfd_boolean
11826 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
11827 bfd *ibfd, const char *name)
11828 {
11829 asection *sec, *osec;
11830
11831 sec = bfd_get_linker_section (ibfd, name);
11832 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
11833 return TRUE;
11834
11835 osec = sec->output_section;
11836 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
11837 return TRUE;
11838
11839 if (! bfd_set_section_contents (obfd, osec, sec->contents,
11840 sec->output_offset, sec->size))
11841 return FALSE;
11842
11843 return TRUE;
11844 }
11845
11846 static bfd_boolean
11847 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11848 {
11849 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
11850 asection *sec, *osec;
11851
11852 if (globals == NULL)
11853 return FALSE;
11854
11855 /* Invoke the regular ELF backend linker to do all the work. */
11856 if (!bfd_elf_final_link (abfd, info))
11857 return FALSE;
11858
11859 /* Process stub sections (eg BE8 encoding, ...). */
11860 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
11861 unsigned int i;
11862 for (i=0; i<htab->top_id; i++)
11863 {
11864 sec = htab->stub_group[i].stub_sec;
11865 /* Only process it once, in its link_sec slot. */
11866 if (sec && i == htab->stub_group[i].link_sec->id)
11867 {
11868 osec = sec->output_section;
11869 elf32_arm_write_section (abfd, info, sec, sec->contents);
11870 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11871 sec->output_offset, sec->size))
11872 return FALSE;
11873 }
11874 }
11875
11876 /* Write out any glue sections now that we have created all the
11877 stubs. */
11878 if (globals->bfd_of_glue_owner != NULL)
11879 {
11880 if (! elf32_arm_output_glue_section (info, abfd,
11881 globals->bfd_of_glue_owner,
11882 ARM2THUMB_GLUE_SECTION_NAME))
11883 return FALSE;
11884
11885 if (! elf32_arm_output_glue_section (info, abfd,
11886 globals->bfd_of_glue_owner,
11887 THUMB2ARM_GLUE_SECTION_NAME))
11888 return FALSE;
11889
11890 if (! elf32_arm_output_glue_section (info, abfd,
11891 globals->bfd_of_glue_owner,
11892 VFP11_ERRATUM_VENEER_SECTION_NAME))
11893 return FALSE;
11894
11895 if (! elf32_arm_output_glue_section (info, abfd,
11896 globals->bfd_of_glue_owner,
11897 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
11898 return FALSE;
11899
11900 if (! elf32_arm_output_glue_section (info, abfd,
11901 globals->bfd_of_glue_owner,
11902 ARM_BX_GLUE_SECTION_NAME))
11903 return FALSE;
11904 }
11905
11906 return TRUE;
11907 }
11908
11909 /* Return a best guess for the machine number based on the attributes. */
11910
11911 static unsigned int
11912 bfd_arm_get_mach_from_attributes (bfd * abfd)
11913 {
11914 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11915
11916 switch (arch)
11917 {
11918 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11919 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11920 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11921
11922 case TAG_CPU_ARCH_V5TE:
11923 {
11924 char * name;
11925
11926 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11927 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11928
11929 if (name)
11930 {
11931 if (strcmp (name, "IWMMXT2") == 0)
11932 return bfd_mach_arm_iWMMXt2;
11933
11934 if (strcmp (name, "IWMMXT") == 0)
11935 return bfd_mach_arm_iWMMXt;
11936
11937 if (strcmp (name, "XSCALE") == 0)
11938 {
11939 int wmmx;
11940
11941 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11942 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11943 switch (wmmx)
11944 {
11945 case 1: return bfd_mach_arm_iWMMXt;
11946 case 2: return bfd_mach_arm_iWMMXt2;
11947 default: return bfd_mach_arm_XScale;
11948 }
11949 }
11950 }
11951
11952 return bfd_mach_arm_5TE;
11953 }
11954
11955 default:
11956 return bfd_mach_arm_unknown;
11957 }
11958 }
11959
11960 /* Set the right machine number. */
11961
11962 static bfd_boolean
11963 elf32_arm_object_p (bfd *abfd)
11964 {
11965 unsigned int mach;
11966
11967 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11968
11969 if (mach == bfd_mach_arm_unknown)
11970 {
11971 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11972 mach = bfd_mach_arm_ep9312;
11973 else
11974 mach = bfd_arm_get_mach_from_attributes (abfd);
11975 }
11976
11977 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11978 return TRUE;
11979 }
11980
11981 /* Function to keep ARM specific flags in the ELF header. */
11982
11983 static bfd_boolean
11984 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11985 {
11986 if (elf_flags_init (abfd)
11987 && elf_elfheader (abfd)->e_flags != flags)
11988 {
11989 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11990 {
11991 if (flags & EF_ARM_INTERWORK)
11992 (*_bfd_error_handler)
11993 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11994 abfd);
11995 else
11996 _bfd_error_handler
11997 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11998 abfd);
11999 }
12000 }
12001 else
12002 {
12003 elf_elfheader (abfd)->e_flags = flags;
12004 elf_flags_init (abfd) = TRUE;
12005 }
12006
12007 return TRUE;
12008 }
12009
12010 /* Copy backend specific data from one object module to another. */
12011
12012 static bfd_boolean
12013 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
12014 {
12015 flagword in_flags;
12016 flagword out_flags;
12017
12018 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
12019 return TRUE;
12020
12021 in_flags = elf_elfheader (ibfd)->e_flags;
12022 out_flags = elf_elfheader (obfd)->e_flags;
12023
12024 if (elf_flags_init (obfd)
12025 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
12026 && in_flags != out_flags)
12027 {
12028 /* Cannot mix APCS26 and APCS32 code. */
12029 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
12030 return FALSE;
12031
12032 /* Cannot mix float APCS and non-float APCS code. */
12033 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
12034 return FALSE;
12035
12036 /* If the src and dest have different interworking flags
12037 then turn off the interworking bit. */
12038 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
12039 {
12040 if (out_flags & EF_ARM_INTERWORK)
12041 _bfd_error_handler
12042 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
12043 obfd, ibfd);
12044
12045 in_flags &= ~EF_ARM_INTERWORK;
12046 }
12047
12048 /* Likewise for PIC, though don't warn for this case. */
12049 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
12050 in_flags &= ~EF_ARM_PIC;
12051 }
12052
12053 elf_elfheader (obfd)->e_flags = in_flags;
12054 elf_flags_init (obfd) = TRUE;
12055
12056 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
12057 }
12058
12059 /* Values for Tag_ABI_PCS_R9_use. */
12060 enum
12061 {
12062 AEABI_R9_V6,
12063 AEABI_R9_SB,
12064 AEABI_R9_TLS,
12065 AEABI_R9_unused
12066 };
12067
12068 /* Values for Tag_ABI_PCS_RW_data. */
12069 enum
12070 {
12071 AEABI_PCS_RW_data_absolute,
12072 AEABI_PCS_RW_data_PCrel,
12073 AEABI_PCS_RW_data_SBrel,
12074 AEABI_PCS_RW_data_unused
12075 };
12076
12077 /* Values for Tag_ABI_enum_size. */
12078 enum
12079 {
12080 AEABI_enum_unused,
12081 AEABI_enum_short,
12082 AEABI_enum_wide,
12083 AEABI_enum_forced_wide
12084 };
12085
12086 /* Determine whether an object attribute tag takes an integer, a
12087 string or both. */
12088
12089 static int
12090 elf32_arm_obj_attrs_arg_type (int tag)
12091 {
12092 if (tag == Tag_compatibility)
12093 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
12094 else if (tag == Tag_nodefaults)
12095 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
12096 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
12097 return ATTR_TYPE_FLAG_STR_VAL;
12098 else if (tag < 32)
12099 return ATTR_TYPE_FLAG_INT_VAL;
12100 else
12101 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
12102 }
12103
12104 /* The ABI defines that Tag_conformance should be emitted first, and that
12105 Tag_nodefaults should be second (if either is defined). This sets those
12106 two positions, and bumps up the position of all the remaining tags to
12107 compensate. */
12108 static int
12109 elf32_arm_obj_attrs_order (int num)
12110 {
12111 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
12112 return Tag_conformance;
12113 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
12114 return Tag_nodefaults;
12115 if ((num - 2) < Tag_nodefaults)
12116 return num - 2;
12117 if ((num - 1) < Tag_conformance)
12118 return num - 1;
12119 return num;
12120 }
12121
12122 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
12123 static bfd_boolean
12124 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
12125 {
12126 if ((tag & 127) < 64)
12127 {
12128 _bfd_error_handler
12129 (_("%B: Unknown mandatory EABI object attribute %d"),
12130 abfd, tag);
12131 bfd_set_error (bfd_error_bad_value);
12132 return FALSE;
12133 }
12134 else
12135 {
12136 _bfd_error_handler
12137 (_("Warning: %B: Unknown EABI object attribute %d"),
12138 abfd, tag);
12139 return TRUE;
12140 }
12141 }
12142
12143 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
12144 Returns -1 if no architecture could be read. */
12145
12146 static int
12147 get_secondary_compatible_arch (bfd *abfd)
12148 {
12149 obj_attribute *attr =
12150 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
12151
12152 /* Note: the tag and its argument below are uleb128 values, though
12153 currently-defined values fit in one byte for each. */
12154 if (attr->s
12155 && attr->s[0] == Tag_CPU_arch
12156 && (attr->s[1] & 128) != 128
12157 && attr->s[2] == 0)
12158 return attr->s[1];
12159
12160 /* This tag is "safely ignorable", so don't complain if it looks funny. */
12161 return -1;
12162 }
12163
12164 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
12165 The tag is removed if ARCH is -1. */
12166
12167 static void
12168 set_secondary_compatible_arch (bfd *abfd, int arch)
12169 {
12170 obj_attribute *attr =
12171 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
12172
12173 if (arch == -1)
12174 {
12175 attr->s = NULL;
12176 return;
12177 }
12178
12179 /* Note: the tag and its argument below are uleb128 values, though
12180 currently-defined values fit in one byte for each. */
12181 if (!attr->s)
12182 attr->s = (char *) bfd_alloc (abfd, 3);
12183 attr->s[0] = Tag_CPU_arch;
12184 attr->s[1] = arch;
12185 attr->s[2] = '\0';
12186 }
12187
12188 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
12189 into account. */
12190
12191 static int
12192 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
12193 int newtag, int secondary_compat)
12194 {
12195 #define T(X) TAG_CPU_ARCH_##X
12196 int tagl, tagh, result;
12197 const int v6t2[] =
12198 {
12199 T(V6T2), /* PRE_V4. */
12200 T(V6T2), /* V4. */
12201 T(V6T2), /* V4T. */
12202 T(V6T2), /* V5T. */
12203 T(V6T2), /* V5TE. */
12204 T(V6T2), /* V5TEJ. */
12205 T(V6T2), /* V6. */
12206 T(V7), /* V6KZ. */
12207 T(V6T2) /* V6T2. */
12208 };
12209 const int v6k[] =
12210 {
12211 T(V6K), /* PRE_V4. */
12212 T(V6K), /* V4. */
12213 T(V6K), /* V4T. */
12214 T(V6K), /* V5T. */
12215 T(V6K), /* V5TE. */
12216 T(V6K), /* V5TEJ. */
12217 T(V6K), /* V6. */
12218 T(V6KZ), /* V6KZ. */
12219 T(V7), /* V6T2. */
12220 T(V6K) /* V6K. */
12221 };
12222 const int v7[] =
12223 {
12224 T(V7), /* PRE_V4. */
12225 T(V7), /* V4. */
12226 T(V7), /* V4T. */
12227 T(V7), /* V5T. */
12228 T(V7), /* V5TE. */
12229 T(V7), /* V5TEJ. */
12230 T(V7), /* V6. */
12231 T(V7), /* V6KZ. */
12232 T(V7), /* V6T2. */
12233 T(V7), /* V6K. */
12234 T(V7) /* V7. */
12235 };
12236 const int v6_m[] =
12237 {
12238 -1, /* PRE_V4. */
12239 -1, /* V4. */
12240 T(V6K), /* V4T. */
12241 T(V6K), /* V5T. */
12242 T(V6K), /* V5TE. */
12243 T(V6K), /* V5TEJ. */
12244 T(V6K), /* V6. */
12245 T(V6KZ), /* V6KZ. */
12246 T(V7), /* V6T2. */
12247 T(V6K), /* V6K. */
12248 T(V7), /* V7. */
12249 T(V6_M) /* V6_M. */
12250 };
12251 const int v6s_m[] =
12252 {
12253 -1, /* PRE_V4. */
12254 -1, /* V4. */
12255 T(V6K), /* V4T. */
12256 T(V6K), /* V5T. */
12257 T(V6K), /* V5TE. */
12258 T(V6K), /* V5TEJ. */
12259 T(V6K), /* V6. */
12260 T(V6KZ), /* V6KZ. */
12261 T(V7), /* V6T2. */
12262 T(V6K), /* V6K. */
12263 T(V7), /* V7. */
12264 T(V6S_M), /* V6_M. */
12265 T(V6S_M) /* V6S_M. */
12266 };
12267 const int v7e_m[] =
12268 {
12269 -1, /* PRE_V4. */
12270 -1, /* V4. */
12271 T(V7E_M), /* V4T. */
12272 T(V7E_M), /* V5T. */
12273 T(V7E_M), /* V5TE. */
12274 T(V7E_M), /* V5TEJ. */
12275 T(V7E_M), /* V6. */
12276 T(V7E_M), /* V6KZ. */
12277 T(V7E_M), /* V6T2. */
12278 T(V7E_M), /* V6K. */
12279 T(V7E_M), /* V7. */
12280 T(V7E_M), /* V6_M. */
12281 T(V7E_M), /* V6S_M. */
12282 T(V7E_M) /* V7E_M. */
12283 };
12284 const int v8[] =
12285 {
12286 T(V8), /* PRE_V4. */
12287 T(V8), /* V4. */
12288 T(V8), /* V4T. */
12289 T(V8), /* V5T. */
12290 T(V8), /* V5TE. */
12291 T(V8), /* V5TEJ. */
12292 T(V8), /* V6. */
12293 T(V8), /* V6KZ. */
12294 T(V8), /* V6T2. */
12295 T(V8), /* V6K. */
12296 T(V8), /* V7. */
12297 T(V8), /* V6_M. */
12298 T(V8), /* V6S_M. */
12299 T(V8), /* V7E_M. */
12300 T(V8) /* V8. */
12301 };
12302 const int v8m_baseline[] =
12303 {
12304 -1, /* PRE_V4. */
12305 -1, /* V4. */
12306 -1, /* V4T. */
12307 -1, /* V5T. */
12308 -1, /* V5TE. */
12309 -1, /* V5TEJ. */
12310 -1, /* V6. */
12311 -1, /* V6KZ. */
12312 -1, /* V6T2. */
12313 -1, /* V6K. */
12314 -1, /* V7. */
12315 T(V8M_BASE), /* V6_M. */
12316 T(V8M_BASE), /* V6S_M. */
12317 -1, /* V7E_M. */
12318 -1, /* V8. */
12319 -1,
12320 T(V8M_BASE) /* V8-M BASELINE. */
12321 };
12322 const int v8m_mainline[] =
12323 {
12324 -1, /* PRE_V4. */
12325 -1, /* V4. */
12326 -1, /* V4T. */
12327 -1, /* V5T. */
12328 -1, /* V5TE. */
12329 -1, /* V5TEJ. */
12330 -1, /* V6. */
12331 -1, /* V6KZ. */
12332 -1, /* V6T2. */
12333 -1, /* V6K. */
12334 T(V8M_MAIN), /* V7. */
12335 T(V8M_MAIN), /* V6_M. */
12336 T(V8M_MAIN), /* V6S_M. */
12337 T(V8M_MAIN), /* V7E_M. */
12338 -1, /* V8. */
12339 -1,
12340 T(V8M_MAIN), /* V8-M BASELINE. */
12341 T(V8M_MAIN) /* V8-M MAINLINE. */
12342 };
12343 const int v4t_plus_v6_m[] =
12344 {
12345 -1, /* PRE_V4. */
12346 -1, /* V4. */
12347 T(V4T), /* V4T. */
12348 T(V5T), /* V5T. */
12349 T(V5TE), /* V5TE. */
12350 T(V5TEJ), /* V5TEJ. */
12351 T(V6), /* V6. */
12352 T(V6KZ), /* V6KZ. */
12353 T(V6T2), /* V6T2. */
12354 T(V6K), /* V6K. */
12355 T(V7), /* V7. */
12356 T(V6_M), /* V6_M. */
12357 T(V6S_M), /* V6S_M. */
12358 T(V7E_M), /* V7E_M. */
12359 T(V8), /* V8. */
12360 -1, /* Unused. */
12361 T(V8M_BASE), /* V8-M BASELINE. */
12362 T(V8M_MAIN), /* V8-M MAINLINE. */
12363 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
12364 };
12365 const int *comb[] =
12366 {
12367 v6t2,
12368 v6k,
12369 v7,
12370 v6_m,
12371 v6s_m,
12372 v7e_m,
12373 v8,
12374 NULL,
12375 v8m_baseline,
12376 v8m_mainline,
12377 /* Pseudo-architecture. */
12378 v4t_plus_v6_m
12379 };
12380
12381 /* Check we've not got a higher architecture than we know about. */
12382
12383 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
12384 {
12385 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
12386 return -1;
12387 }
12388
12389 /* Override old tag if we have a Tag_also_compatible_with on the output. */
12390
12391 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
12392 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
12393 oldtag = T(V4T_PLUS_V6_M);
12394
12395 /* And override the new tag if we have a Tag_also_compatible_with on the
12396 input. */
12397
12398 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
12399 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
12400 newtag = T(V4T_PLUS_V6_M);
12401
12402 tagl = (oldtag < newtag) ? oldtag : newtag;
12403 result = tagh = (oldtag > newtag) ? oldtag : newtag;
12404
12405 /* Architectures before V6KZ add features monotonically. */
12406 if (tagh <= TAG_CPU_ARCH_V6KZ)
12407 return result;
12408
12409 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
12410
12411 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
12412 as the canonical version. */
12413 if (result == T(V4T_PLUS_V6_M))
12414 {
12415 result = T(V4T);
12416 *secondary_compat_out = T(V6_M);
12417 }
12418 else
12419 *secondary_compat_out = -1;
12420
12421 if (result == -1)
12422 {
12423 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
12424 ibfd, oldtag, newtag);
12425 return -1;
12426 }
12427
12428 return result;
12429 #undef T
12430 }
12431
12432 /* Query attributes object to see if integer divide instructions may be
12433 present in an object. */
12434 static bfd_boolean
12435 elf32_arm_attributes_accept_div (const obj_attribute *attr)
12436 {
12437 int arch = attr[Tag_CPU_arch].i;
12438 int profile = attr[Tag_CPU_arch_profile].i;
12439
12440 switch (attr[Tag_DIV_use].i)
12441 {
12442 case 0:
12443 /* Integer divide allowed if instruction contained in archetecture. */
12444 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
12445 return TRUE;
12446 else if (arch >= TAG_CPU_ARCH_V7E_M)
12447 return TRUE;
12448 else
12449 return FALSE;
12450
12451 case 1:
12452 /* Integer divide explicitly prohibited. */
12453 return FALSE;
12454
12455 default:
12456 /* Unrecognised case - treat as allowing divide everywhere. */
12457 case 2:
12458 /* Integer divide allowed in ARM state. */
12459 return TRUE;
12460 }
12461 }
12462
12463 /* Query attributes object to see if integer divide instructions are
12464 forbidden to be in the object. This is not the inverse of
12465 elf32_arm_attributes_accept_div. */
12466 static bfd_boolean
12467 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
12468 {
12469 return attr[Tag_DIV_use].i == 1;
12470 }
12471
12472 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
12473 are conflicting attributes. */
12474
12475 static bfd_boolean
12476 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
12477 {
12478 obj_attribute *in_attr;
12479 obj_attribute *out_attr;
12480 /* Some tags have 0 = don't care, 1 = strong requirement,
12481 2 = weak requirement. */
12482 static const int order_021[3] = {0, 2, 1};
12483 int i;
12484 bfd_boolean result = TRUE;
12485 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
12486
12487 /* Skip the linker stubs file. This preserves previous behavior
12488 of accepting unknown attributes in the first input file - but
12489 is that a bug? */
12490 if (ibfd->flags & BFD_LINKER_CREATED)
12491 return TRUE;
12492
12493 /* Skip any input that hasn't attribute section.
12494 This enables to link object files without attribute section with
12495 any others. */
12496 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
12497 return TRUE;
12498
12499 if (!elf_known_obj_attributes_proc (obfd)[0].i)
12500 {
12501 /* This is the first object. Copy the attributes. */
12502 _bfd_elf_copy_obj_attributes (ibfd, obfd);
12503
12504 out_attr = elf_known_obj_attributes_proc (obfd);
12505
12506 /* Use the Tag_null value to indicate the attributes have been
12507 initialized. */
12508 out_attr[0].i = 1;
12509
12510 /* We do not output objects with Tag_MPextension_use_legacy - we move
12511 the attribute's value to Tag_MPextension_use. */
12512 if (out_attr[Tag_MPextension_use_legacy].i != 0)
12513 {
12514 if (out_attr[Tag_MPextension_use].i != 0
12515 && out_attr[Tag_MPextension_use_legacy].i
12516 != out_attr[Tag_MPextension_use].i)
12517 {
12518 _bfd_error_handler
12519 (_("Error: %B has both the current and legacy "
12520 "Tag_MPextension_use attributes"), ibfd);
12521 result = FALSE;
12522 }
12523
12524 out_attr[Tag_MPextension_use] =
12525 out_attr[Tag_MPextension_use_legacy];
12526 out_attr[Tag_MPextension_use_legacy].type = 0;
12527 out_attr[Tag_MPextension_use_legacy].i = 0;
12528 }
12529
12530 return result;
12531 }
12532
12533 in_attr = elf_known_obj_attributes_proc (ibfd);
12534 out_attr = elf_known_obj_attributes_proc (obfd);
12535 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
12536 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
12537 {
12538 /* Ignore mismatches if the object doesn't use floating point or is
12539 floating point ABI independent. */
12540 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
12541 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
12542 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
12543 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
12544 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
12545 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
12546 {
12547 _bfd_error_handler
12548 (_("error: %B uses VFP register arguments, %B does not"),
12549 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
12550 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
12551 result = FALSE;
12552 }
12553 }
12554
12555 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
12556 {
12557 /* Merge this attribute with existing attributes. */
12558 switch (i)
12559 {
12560 case Tag_CPU_raw_name:
12561 case Tag_CPU_name:
12562 /* These are merged after Tag_CPU_arch. */
12563 break;
12564
12565 case Tag_ABI_optimization_goals:
12566 case Tag_ABI_FP_optimization_goals:
12567 /* Use the first value seen. */
12568 break;
12569
12570 case Tag_CPU_arch:
12571 {
12572 int secondary_compat = -1, secondary_compat_out = -1;
12573 unsigned int saved_out_attr = out_attr[i].i;
12574 int arch_attr;
12575 static const char *name_table[] =
12576 {
12577 /* These aren't real CPU names, but we can't guess
12578 that from the architecture version alone. */
12579 "Pre v4",
12580 "ARM v4",
12581 "ARM v4T",
12582 "ARM v5T",
12583 "ARM v5TE",
12584 "ARM v5TEJ",
12585 "ARM v6",
12586 "ARM v6KZ",
12587 "ARM v6T2",
12588 "ARM v6K",
12589 "ARM v7",
12590 "ARM v6-M",
12591 "ARM v6S-M",
12592 "ARM v8",
12593 "",
12594 "ARM v8-M.baseline",
12595 "ARM v8-M.mainline",
12596 };
12597
12598 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
12599 secondary_compat = get_secondary_compatible_arch (ibfd);
12600 secondary_compat_out = get_secondary_compatible_arch (obfd);
12601 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
12602 &secondary_compat_out,
12603 in_attr[i].i,
12604 secondary_compat);
12605
12606 /* Return with error if failed to merge. */
12607 if (arch_attr == -1)
12608 return FALSE;
12609
12610 out_attr[i].i = arch_attr;
12611
12612 set_secondary_compatible_arch (obfd, secondary_compat_out);
12613
12614 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
12615 if (out_attr[i].i == saved_out_attr)
12616 ; /* Leave the names alone. */
12617 else if (out_attr[i].i == in_attr[i].i)
12618 {
12619 /* The output architecture has been changed to match the
12620 input architecture. Use the input names. */
12621 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
12622 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
12623 : NULL;
12624 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
12625 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
12626 : NULL;
12627 }
12628 else
12629 {
12630 out_attr[Tag_CPU_name].s = NULL;
12631 out_attr[Tag_CPU_raw_name].s = NULL;
12632 }
12633
12634 /* If we still don't have a value for Tag_CPU_name,
12635 make one up now. Tag_CPU_raw_name remains blank. */
12636 if (out_attr[Tag_CPU_name].s == NULL
12637 && out_attr[i].i < ARRAY_SIZE (name_table))
12638 out_attr[Tag_CPU_name].s =
12639 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
12640 }
12641 break;
12642
12643 case Tag_ARM_ISA_use:
12644 case Tag_THUMB_ISA_use:
12645 case Tag_WMMX_arch:
12646 case Tag_Advanced_SIMD_arch:
12647 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
12648 case Tag_ABI_FP_rounding:
12649 case Tag_ABI_FP_exceptions:
12650 case Tag_ABI_FP_user_exceptions:
12651 case Tag_ABI_FP_number_model:
12652 case Tag_FP_HP_extension:
12653 case Tag_CPU_unaligned_access:
12654 case Tag_T2EE_use:
12655 case Tag_MPextension_use:
12656 /* Use the largest value specified. */
12657 if (in_attr[i].i > out_attr[i].i)
12658 out_attr[i].i = in_attr[i].i;
12659 break;
12660
12661 case Tag_ABI_align_preserved:
12662 case Tag_ABI_PCS_RO_data:
12663 /* Use the smallest value specified. */
12664 if (in_attr[i].i < out_attr[i].i)
12665 out_attr[i].i = in_attr[i].i;
12666 break;
12667
12668 case Tag_ABI_align_needed:
12669 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
12670 && (in_attr[Tag_ABI_align_preserved].i == 0
12671 || out_attr[Tag_ABI_align_preserved].i == 0))
12672 {
12673 /* This error message should be enabled once all non-conformant
12674 binaries in the toolchain have had the attributes set
12675 properly.
12676 _bfd_error_handler
12677 (_("error: %B: 8-byte data alignment conflicts with %B"),
12678 obfd, ibfd);
12679 result = FALSE; */
12680 }
12681 /* Fall through. */
12682 case Tag_ABI_FP_denormal:
12683 case Tag_ABI_PCS_GOT_use:
12684 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
12685 value if greater than 2 (for future-proofing). */
12686 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
12687 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
12688 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
12689 out_attr[i].i = in_attr[i].i;
12690 break;
12691
12692 case Tag_Virtualization_use:
12693 /* The virtualization tag effectively stores two bits of
12694 information: the intended use of TrustZone (in bit 0), and the
12695 intended use of Virtualization (in bit 1). */
12696 if (out_attr[i].i == 0)
12697 out_attr[i].i = in_attr[i].i;
12698 else if (in_attr[i].i != 0
12699 && in_attr[i].i != out_attr[i].i)
12700 {
12701 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
12702 out_attr[i].i = 3;
12703 else
12704 {
12705 _bfd_error_handler
12706 (_("error: %B: unable to merge virtualization attributes "
12707 "with %B"),
12708 obfd, ibfd);
12709 result = FALSE;
12710 }
12711 }
12712 break;
12713
12714 case Tag_CPU_arch_profile:
12715 if (out_attr[i].i != in_attr[i].i)
12716 {
12717 /* 0 will merge with anything.
12718 'A' and 'S' merge to 'A'.
12719 'R' and 'S' merge to 'R'.
12720 'M' and 'A|R|S' is an error. */
12721 if (out_attr[i].i == 0
12722 || (out_attr[i].i == 'S'
12723 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
12724 out_attr[i].i = in_attr[i].i;
12725 else if (in_attr[i].i == 0
12726 || (in_attr[i].i == 'S'
12727 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
12728 ; /* Do nothing. */
12729 else
12730 {
12731 _bfd_error_handler
12732 (_("error: %B: Conflicting architecture profiles %c/%c"),
12733 ibfd,
12734 in_attr[i].i ? in_attr[i].i : '0',
12735 out_attr[i].i ? out_attr[i].i : '0');
12736 result = FALSE;
12737 }
12738 }
12739 break;
12740 case Tag_FP_arch:
12741 {
12742 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
12743 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
12744 when it's 0. It might mean absence of FP hardware if
12745 Tag_FP_arch is zero. */
12746
12747 #define VFP_VERSION_COUNT 9
12748 static const struct
12749 {
12750 int ver;
12751 int regs;
12752 } vfp_versions[VFP_VERSION_COUNT] =
12753 {
12754 {0, 0},
12755 {1, 16},
12756 {2, 16},
12757 {3, 32},
12758 {3, 16},
12759 {4, 32},
12760 {4, 16},
12761 {8, 32},
12762 {8, 16}
12763 };
12764 int ver;
12765 int regs;
12766 int newval;
12767
12768 /* If the output has no requirement about FP hardware,
12769 follow the requirement of the input. */
12770 if (out_attr[i].i == 0)
12771 {
12772 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
12773 out_attr[i].i = in_attr[i].i;
12774 out_attr[Tag_ABI_HardFP_use].i
12775 = in_attr[Tag_ABI_HardFP_use].i;
12776 break;
12777 }
12778 /* If the input has no requirement about FP hardware, do
12779 nothing. */
12780 else if (in_attr[i].i == 0)
12781 {
12782 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
12783 break;
12784 }
12785
12786 /* Both the input and the output have nonzero Tag_FP_arch.
12787 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
12788
12789 /* If both the input and the output have zero Tag_ABI_HardFP_use,
12790 do nothing. */
12791 if (in_attr[Tag_ABI_HardFP_use].i == 0
12792 && out_attr[Tag_ABI_HardFP_use].i == 0)
12793 ;
12794 /* If the input and the output have different Tag_ABI_HardFP_use,
12795 the combination of them is 0 (implied by Tag_FP_arch). */
12796 else if (in_attr[Tag_ABI_HardFP_use].i
12797 != out_attr[Tag_ABI_HardFP_use].i)
12798 out_attr[Tag_ABI_HardFP_use].i = 0;
12799
12800 /* Now we can handle Tag_FP_arch. */
12801
12802 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
12803 pick the biggest. */
12804 if (in_attr[i].i >= VFP_VERSION_COUNT
12805 && in_attr[i].i > out_attr[i].i)
12806 {
12807 out_attr[i] = in_attr[i];
12808 break;
12809 }
12810 /* The output uses the superset of input features
12811 (ISA version) and registers. */
12812 ver = vfp_versions[in_attr[i].i].ver;
12813 if (ver < vfp_versions[out_attr[i].i].ver)
12814 ver = vfp_versions[out_attr[i].i].ver;
12815 regs = vfp_versions[in_attr[i].i].regs;
12816 if (regs < vfp_versions[out_attr[i].i].regs)
12817 regs = vfp_versions[out_attr[i].i].regs;
12818 /* This assumes all possible supersets are also a valid
12819 options. */
12820 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
12821 {
12822 if (regs == vfp_versions[newval].regs
12823 && ver == vfp_versions[newval].ver)
12824 break;
12825 }
12826 out_attr[i].i = newval;
12827 }
12828 break;
12829 case Tag_PCS_config:
12830 if (out_attr[i].i == 0)
12831 out_attr[i].i = in_attr[i].i;
12832 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
12833 {
12834 /* It's sometimes ok to mix different configs, so this is only
12835 a warning. */
12836 _bfd_error_handler
12837 (_("Warning: %B: Conflicting platform configuration"), ibfd);
12838 }
12839 break;
12840 case Tag_ABI_PCS_R9_use:
12841 if (in_attr[i].i != out_attr[i].i
12842 && out_attr[i].i != AEABI_R9_unused
12843 && in_attr[i].i != AEABI_R9_unused)
12844 {
12845 _bfd_error_handler
12846 (_("error: %B: Conflicting use of R9"), ibfd);
12847 result = FALSE;
12848 }
12849 if (out_attr[i].i == AEABI_R9_unused)
12850 out_attr[i].i = in_attr[i].i;
12851 break;
12852 case Tag_ABI_PCS_RW_data:
12853 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
12854 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
12855 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
12856 {
12857 _bfd_error_handler
12858 (_("error: %B: SB relative addressing conflicts with use of R9"),
12859 ibfd);
12860 result = FALSE;
12861 }
12862 /* Use the smallest value specified. */
12863 if (in_attr[i].i < out_attr[i].i)
12864 out_attr[i].i = in_attr[i].i;
12865 break;
12866 case Tag_ABI_PCS_wchar_t:
12867 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
12868 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
12869 {
12870 _bfd_error_handler
12871 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12872 ibfd, in_attr[i].i, out_attr[i].i);
12873 }
12874 else if (in_attr[i].i && !out_attr[i].i)
12875 out_attr[i].i = in_attr[i].i;
12876 break;
12877 case Tag_ABI_enum_size:
12878 if (in_attr[i].i != AEABI_enum_unused)
12879 {
12880 if (out_attr[i].i == AEABI_enum_unused
12881 || out_attr[i].i == AEABI_enum_forced_wide)
12882 {
12883 /* The existing object is compatible with anything.
12884 Use whatever requirements the new object has. */
12885 out_attr[i].i = in_attr[i].i;
12886 }
12887 else if (in_attr[i].i != AEABI_enum_forced_wide
12888 && out_attr[i].i != in_attr[i].i
12889 && !elf_arm_tdata (obfd)->no_enum_size_warning)
12890 {
12891 static const char *aeabi_enum_names[] =
12892 { "", "variable-size", "32-bit", "" };
12893 const char *in_name =
12894 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12895 ? aeabi_enum_names[in_attr[i].i]
12896 : "<unknown>";
12897 const char *out_name =
12898 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12899 ? aeabi_enum_names[out_attr[i].i]
12900 : "<unknown>";
12901 _bfd_error_handler
12902 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
12903 ibfd, in_name, out_name);
12904 }
12905 }
12906 break;
12907 case Tag_ABI_VFP_args:
12908 /* Aready done. */
12909 break;
12910 case Tag_ABI_WMMX_args:
12911 if (in_attr[i].i != out_attr[i].i)
12912 {
12913 _bfd_error_handler
12914 (_("error: %B uses iWMMXt register arguments, %B does not"),
12915 ibfd, obfd);
12916 result = FALSE;
12917 }
12918 break;
12919 case Tag_compatibility:
12920 /* Merged in target-independent code. */
12921 break;
12922 case Tag_ABI_HardFP_use:
12923 /* This is handled along with Tag_FP_arch. */
12924 break;
12925 case Tag_ABI_FP_16bit_format:
12926 if (in_attr[i].i != 0 && out_attr[i].i != 0)
12927 {
12928 if (in_attr[i].i != out_attr[i].i)
12929 {
12930 _bfd_error_handler
12931 (_("error: fp16 format mismatch between %B and %B"),
12932 ibfd, obfd);
12933 result = FALSE;
12934 }
12935 }
12936 if (in_attr[i].i != 0)
12937 out_attr[i].i = in_attr[i].i;
12938 break;
12939
12940 case Tag_DIV_use:
12941 /* A value of zero on input means that the divide instruction may
12942 be used if available in the base architecture as specified via
12943 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12944 the user did not want divide instructions. A value of 2
12945 explicitly means that divide instructions were allowed in ARM
12946 and Thumb state. */
12947 if (in_attr[i].i == out_attr[i].i)
12948 /* Do nothing. */ ;
12949 else if (elf32_arm_attributes_forbid_div (in_attr)
12950 && !elf32_arm_attributes_accept_div (out_attr))
12951 out_attr[i].i = 1;
12952 else if (elf32_arm_attributes_forbid_div (out_attr)
12953 && elf32_arm_attributes_accept_div (in_attr))
12954 out_attr[i].i = in_attr[i].i;
12955 else if (in_attr[i].i == 2)
12956 out_attr[i].i = in_attr[i].i;
12957 break;
12958
12959 case Tag_MPextension_use_legacy:
12960 /* We don't output objects with Tag_MPextension_use_legacy - we
12961 move the value to Tag_MPextension_use. */
12962 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
12963 {
12964 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
12965 {
12966 _bfd_error_handler
12967 (_("%B has has both the current and legacy "
12968 "Tag_MPextension_use attributes"),
12969 ibfd);
12970 result = FALSE;
12971 }
12972 }
12973
12974 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12975 out_attr[Tag_MPextension_use] = in_attr[i];
12976
12977 break;
12978
12979 case Tag_nodefaults:
12980 /* This tag is set if it exists, but the value is unused (and is
12981 typically zero). We don't actually need to do anything here -
12982 the merge happens automatically when the type flags are merged
12983 below. */
12984 break;
12985 case Tag_also_compatible_with:
12986 /* Already done in Tag_CPU_arch. */
12987 break;
12988 case Tag_conformance:
12989 /* Keep the attribute if it matches. Throw it away otherwise.
12990 No attribute means no claim to conform. */
12991 if (!in_attr[i].s || !out_attr[i].s
12992 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12993 out_attr[i].s = NULL;
12994 break;
12995
12996 default:
12997 result
12998 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
12999 }
13000
13001 /* If out_attr was copied from in_attr then it won't have a type yet. */
13002 if (in_attr[i].type && !out_attr[i].type)
13003 out_attr[i].type = in_attr[i].type;
13004 }
13005
13006 /* Merge Tag_compatibility attributes and any common GNU ones. */
13007 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
13008 return FALSE;
13009
13010 /* Check for any attributes not known on ARM. */
13011 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
13012
13013 return result;
13014 }
13015
13016
13017 /* Return TRUE if the two EABI versions are incompatible. */
13018
13019 static bfd_boolean
13020 elf32_arm_versions_compatible (unsigned iver, unsigned over)
13021 {
13022 /* v4 and v5 are the same spec before and after it was released,
13023 so allow mixing them. */
13024 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
13025 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
13026 return TRUE;
13027
13028 return (iver == over);
13029 }
13030
13031 /* Merge backend specific data from an object file to the output
13032 object file when linking. */
13033
13034 static bfd_boolean
13035 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
13036
13037 /* Display the flags field. */
13038
13039 static bfd_boolean
13040 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
13041 {
13042 FILE * file = (FILE *) ptr;
13043 unsigned long flags;
13044
13045 BFD_ASSERT (abfd != NULL && ptr != NULL);
13046
13047 /* Print normal ELF private data. */
13048 _bfd_elf_print_private_bfd_data (abfd, ptr);
13049
13050 flags = elf_elfheader (abfd)->e_flags;
13051 /* Ignore init flag - it may not be set, despite the flags field
13052 containing valid data. */
13053
13054 /* xgettext:c-format */
13055 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
13056
13057 switch (EF_ARM_EABI_VERSION (flags))
13058 {
13059 case EF_ARM_EABI_UNKNOWN:
13060 /* The following flag bits are GNU extensions and not part of the
13061 official ARM ELF extended ABI. Hence they are only decoded if
13062 the EABI version is not set. */
13063 if (flags & EF_ARM_INTERWORK)
13064 fprintf (file, _(" [interworking enabled]"));
13065
13066 if (flags & EF_ARM_APCS_26)
13067 fprintf (file, " [APCS-26]");
13068 else
13069 fprintf (file, " [APCS-32]");
13070
13071 if (flags & EF_ARM_VFP_FLOAT)
13072 fprintf (file, _(" [VFP float format]"));
13073 else if (flags & EF_ARM_MAVERICK_FLOAT)
13074 fprintf (file, _(" [Maverick float format]"));
13075 else
13076 fprintf (file, _(" [FPA float format]"));
13077
13078 if (flags & EF_ARM_APCS_FLOAT)
13079 fprintf (file, _(" [floats passed in float registers]"));
13080
13081 if (flags & EF_ARM_PIC)
13082 fprintf (file, _(" [position independent]"));
13083
13084 if (flags & EF_ARM_NEW_ABI)
13085 fprintf (file, _(" [new ABI]"));
13086
13087 if (flags & EF_ARM_OLD_ABI)
13088 fprintf (file, _(" [old ABI]"));
13089
13090 if (flags & EF_ARM_SOFT_FLOAT)
13091 fprintf (file, _(" [software FP]"));
13092
13093 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
13094 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
13095 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
13096 | EF_ARM_MAVERICK_FLOAT);
13097 break;
13098
13099 case EF_ARM_EABI_VER1:
13100 fprintf (file, _(" [Version1 EABI]"));
13101
13102 if (flags & EF_ARM_SYMSARESORTED)
13103 fprintf (file, _(" [sorted symbol table]"));
13104 else
13105 fprintf (file, _(" [unsorted symbol table]"));
13106
13107 flags &= ~ EF_ARM_SYMSARESORTED;
13108 break;
13109
13110 case EF_ARM_EABI_VER2:
13111 fprintf (file, _(" [Version2 EABI]"));
13112
13113 if (flags & EF_ARM_SYMSARESORTED)
13114 fprintf (file, _(" [sorted symbol table]"));
13115 else
13116 fprintf (file, _(" [unsorted symbol table]"));
13117
13118 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
13119 fprintf (file, _(" [dynamic symbols use segment index]"));
13120
13121 if (flags & EF_ARM_MAPSYMSFIRST)
13122 fprintf (file, _(" [mapping symbols precede others]"));
13123
13124 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
13125 | EF_ARM_MAPSYMSFIRST);
13126 break;
13127
13128 case EF_ARM_EABI_VER3:
13129 fprintf (file, _(" [Version3 EABI]"));
13130 break;
13131
13132 case EF_ARM_EABI_VER4:
13133 fprintf (file, _(" [Version4 EABI]"));
13134 goto eabi;
13135
13136 case EF_ARM_EABI_VER5:
13137 fprintf (file, _(" [Version5 EABI]"));
13138
13139 if (flags & EF_ARM_ABI_FLOAT_SOFT)
13140 fprintf (file, _(" [soft-float ABI]"));
13141
13142 if (flags & EF_ARM_ABI_FLOAT_HARD)
13143 fprintf (file, _(" [hard-float ABI]"));
13144
13145 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
13146
13147 eabi:
13148 if (flags & EF_ARM_BE8)
13149 fprintf (file, _(" [BE8]"));
13150
13151 if (flags & EF_ARM_LE8)
13152 fprintf (file, _(" [LE8]"));
13153
13154 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
13155 break;
13156
13157 default:
13158 fprintf (file, _(" <EABI version unrecognised>"));
13159 break;
13160 }
13161
13162 flags &= ~ EF_ARM_EABIMASK;
13163
13164 if (flags & EF_ARM_RELEXEC)
13165 fprintf (file, _(" [relocatable executable]"));
13166
13167 flags &= ~EF_ARM_RELEXEC;
13168
13169 if (flags)
13170 fprintf (file, _("<Unrecognised flag bits set>"));
13171
13172 fputc ('\n', file);
13173
13174 return TRUE;
13175 }
13176
13177 static int
13178 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
13179 {
13180 switch (ELF_ST_TYPE (elf_sym->st_info))
13181 {
13182 case STT_ARM_TFUNC:
13183 return ELF_ST_TYPE (elf_sym->st_info);
13184
13185 case STT_ARM_16BIT:
13186 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
13187 This allows us to distinguish between data used by Thumb instructions
13188 and non-data (which is probably code) inside Thumb regions of an
13189 executable. */
13190 if (type != STT_OBJECT && type != STT_TLS)
13191 return ELF_ST_TYPE (elf_sym->st_info);
13192 break;
13193
13194 default:
13195 break;
13196 }
13197
13198 return type;
13199 }
13200
13201 static asection *
13202 elf32_arm_gc_mark_hook (asection *sec,
13203 struct bfd_link_info *info,
13204 Elf_Internal_Rela *rel,
13205 struct elf_link_hash_entry *h,
13206 Elf_Internal_Sym *sym)
13207 {
13208 if (h != NULL)
13209 switch (ELF32_R_TYPE (rel->r_info))
13210 {
13211 case R_ARM_GNU_VTINHERIT:
13212 case R_ARM_GNU_VTENTRY:
13213 return NULL;
13214 }
13215
13216 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
13217 }
13218
13219 /* Update the got entry reference counts for the section being removed. */
13220
13221 static bfd_boolean
13222 elf32_arm_gc_sweep_hook (bfd * abfd,
13223 struct bfd_link_info * info,
13224 asection * sec,
13225 const Elf_Internal_Rela * relocs)
13226 {
13227 Elf_Internal_Shdr *symtab_hdr;
13228 struct elf_link_hash_entry **sym_hashes;
13229 bfd_signed_vma *local_got_refcounts;
13230 const Elf_Internal_Rela *rel, *relend;
13231 struct elf32_arm_link_hash_table * globals;
13232
13233 if (bfd_link_relocatable (info))
13234 return TRUE;
13235
13236 globals = elf32_arm_hash_table (info);
13237 if (globals == NULL)
13238 return FALSE;
13239
13240 elf_section_data (sec)->local_dynrel = NULL;
13241
13242 symtab_hdr = & elf_symtab_hdr (abfd);
13243 sym_hashes = elf_sym_hashes (abfd);
13244 local_got_refcounts = elf_local_got_refcounts (abfd);
13245
13246 check_use_blx (globals);
13247
13248 relend = relocs + sec->reloc_count;
13249 for (rel = relocs; rel < relend; rel++)
13250 {
13251 unsigned long r_symndx;
13252 struct elf_link_hash_entry *h = NULL;
13253 struct elf32_arm_link_hash_entry *eh;
13254 int r_type;
13255 bfd_boolean call_reloc_p;
13256 bfd_boolean may_become_dynamic_p;
13257 bfd_boolean may_need_local_target_p;
13258 union gotplt_union *root_plt;
13259 struct arm_plt_info *arm_plt;
13260
13261 r_symndx = ELF32_R_SYM (rel->r_info);
13262 if (r_symndx >= symtab_hdr->sh_info)
13263 {
13264 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13265 while (h->root.type == bfd_link_hash_indirect
13266 || h->root.type == bfd_link_hash_warning)
13267 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13268 }
13269 eh = (struct elf32_arm_link_hash_entry *) h;
13270
13271 call_reloc_p = FALSE;
13272 may_become_dynamic_p = FALSE;
13273 may_need_local_target_p = FALSE;
13274
13275 r_type = ELF32_R_TYPE (rel->r_info);
13276 r_type = arm_real_reloc_type (globals, r_type);
13277 switch (r_type)
13278 {
13279 case R_ARM_GOT32:
13280 case R_ARM_GOT_PREL:
13281 case R_ARM_TLS_GD32:
13282 case R_ARM_TLS_IE32:
13283 if (h != NULL)
13284 {
13285 if (h->got.refcount > 0)
13286 h->got.refcount -= 1;
13287 }
13288 else if (local_got_refcounts != NULL)
13289 {
13290 if (local_got_refcounts[r_symndx] > 0)
13291 local_got_refcounts[r_symndx] -= 1;
13292 }
13293 break;
13294
13295 case R_ARM_TLS_LDM32:
13296 globals->tls_ldm_got.refcount -= 1;
13297 break;
13298
13299 case R_ARM_PC24:
13300 case R_ARM_PLT32:
13301 case R_ARM_CALL:
13302 case R_ARM_JUMP24:
13303 case R_ARM_PREL31:
13304 case R_ARM_THM_CALL:
13305 case R_ARM_THM_JUMP24:
13306 case R_ARM_THM_JUMP19:
13307 call_reloc_p = TRUE;
13308 may_need_local_target_p = TRUE;
13309 break;
13310
13311 case R_ARM_ABS12:
13312 if (!globals->vxworks_p)
13313 {
13314 may_need_local_target_p = TRUE;
13315 break;
13316 }
13317 /* Fall through. */
13318 case R_ARM_ABS32:
13319 case R_ARM_ABS32_NOI:
13320 case R_ARM_REL32:
13321 case R_ARM_REL32_NOI:
13322 case R_ARM_MOVW_ABS_NC:
13323 case R_ARM_MOVT_ABS:
13324 case R_ARM_MOVW_PREL_NC:
13325 case R_ARM_MOVT_PREL:
13326 case R_ARM_THM_MOVW_ABS_NC:
13327 case R_ARM_THM_MOVT_ABS:
13328 case R_ARM_THM_MOVW_PREL_NC:
13329 case R_ARM_THM_MOVT_PREL:
13330 /* Should the interworking branches be here also? */
13331 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
13332 && (sec->flags & SEC_ALLOC) != 0)
13333 {
13334 if (h == NULL
13335 && elf32_arm_howto_from_type (r_type)->pc_relative)
13336 {
13337 call_reloc_p = TRUE;
13338 may_need_local_target_p = TRUE;
13339 }
13340 else
13341 may_become_dynamic_p = TRUE;
13342 }
13343 else
13344 may_need_local_target_p = TRUE;
13345 break;
13346
13347 default:
13348 break;
13349 }
13350
13351 if (may_need_local_target_p
13352 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
13353 {
13354 /* If PLT refcount book-keeping is wrong and too low, we'll
13355 see a zero value (going to -1) for the root PLT reference
13356 count. */
13357 if (root_plt->refcount >= 0)
13358 {
13359 BFD_ASSERT (root_plt->refcount != 0);
13360 root_plt->refcount -= 1;
13361 }
13362 else
13363 /* A value of -1 means the symbol has become local, forced
13364 or seeing a hidden definition. Any other negative value
13365 is an error. */
13366 BFD_ASSERT (root_plt->refcount == -1);
13367
13368 if (!call_reloc_p)
13369 arm_plt->noncall_refcount--;
13370
13371 if (r_type == R_ARM_THM_CALL)
13372 arm_plt->maybe_thumb_refcount--;
13373
13374 if (r_type == R_ARM_THM_JUMP24
13375 || r_type == R_ARM_THM_JUMP19)
13376 arm_plt->thumb_refcount--;
13377 }
13378
13379 if (may_become_dynamic_p)
13380 {
13381 struct elf_dyn_relocs **pp;
13382 struct elf_dyn_relocs *p;
13383
13384 if (h != NULL)
13385 pp = &(eh->dyn_relocs);
13386 else
13387 {
13388 Elf_Internal_Sym *isym;
13389
13390 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
13391 abfd, r_symndx);
13392 if (isym == NULL)
13393 return FALSE;
13394 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13395 if (pp == NULL)
13396 return FALSE;
13397 }
13398 for (; (p = *pp) != NULL; pp = &p->next)
13399 if (p->sec == sec)
13400 {
13401 /* Everything must go for SEC. */
13402 *pp = p->next;
13403 break;
13404 }
13405 }
13406 }
13407
13408 return TRUE;
13409 }
13410
13411 /* Look through the relocs for a section during the first phase. */
13412
13413 static bfd_boolean
13414 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
13415 asection *sec, const Elf_Internal_Rela *relocs)
13416 {
13417 Elf_Internal_Shdr *symtab_hdr;
13418 struct elf_link_hash_entry **sym_hashes;
13419 const Elf_Internal_Rela *rel;
13420 const Elf_Internal_Rela *rel_end;
13421 bfd *dynobj;
13422 asection *sreloc;
13423 struct elf32_arm_link_hash_table *htab;
13424 bfd_boolean call_reloc_p;
13425 bfd_boolean may_become_dynamic_p;
13426 bfd_boolean may_need_local_target_p;
13427 unsigned long nsyms;
13428
13429 if (bfd_link_relocatable (info))
13430 return TRUE;
13431
13432 BFD_ASSERT (is_arm_elf (abfd));
13433
13434 htab = elf32_arm_hash_table (info);
13435 if (htab == NULL)
13436 return FALSE;
13437
13438 sreloc = NULL;
13439
13440 /* Create dynamic sections for relocatable executables so that we can
13441 copy relocations. */
13442 if (htab->root.is_relocatable_executable
13443 && ! htab->root.dynamic_sections_created)
13444 {
13445 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
13446 return FALSE;
13447 }
13448
13449 if (htab->root.dynobj == NULL)
13450 htab->root.dynobj = abfd;
13451 if (!create_ifunc_sections (info))
13452 return FALSE;
13453
13454 dynobj = htab->root.dynobj;
13455
13456 symtab_hdr = & elf_symtab_hdr (abfd);
13457 sym_hashes = elf_sym_hashes (abfd);
13458 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
13459
13460 rel_end = relocs + sec->reloc_count;
13461 for (rel = relocs; rel < rel_end; rel++)
13462 {
13463 Elf_Internal_Sym *isym;
13464 struct elf_link_hash_entry *h;
13465 struct elf32_arm_link_hash_entry *eh;
13466 unsigned long r_symndx;
13467 int r_type;
13468
13469 r_symndx = ELF32_R_SYM (rel->r_info);
13470 r_type = ELF32_R_TYPE (rel->r_info);
13471 r_type = arm_real_reloc_type (htab, r_type);
13472
13473 if (r_symndx >= nsyms
13474 /* PR 9934: It is possible to have relocations that do not
13475 refer to symbols, thus it is also possible to have an
13476 object file containing relocations but no symbol table. */
13477 && (r_symndx > STN_UNDEF || nsyms > 0))
13478 {
13479 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
13480 r_symndx);
13481 return FALSE;
13482 }
13483
13484 h = NULL;
13485 isym = NULL;
13486 if (nsyms > 0)
13487 {
13488 if (r_symndx < symtab_hdr->sh_info)
13489 {
13490 /* A local symbol. */
13491 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
13492 abfd, r_symndx);
13493 if (isym == NULL)
13494 return FALSE;
13495 }
13496 else
13497 {
13498 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13499 while (h->root.type == bfd_link_hash_indirect
13500 || h->root.type == bfd_link_hash_warning)
13501 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13502
13503 /* PR15323, ref flags aren't set for references in the
13504 same object. */
13505 h->root.non_ir_ref = 1;
13506 }
13507 }
13508
13509 eh = (struct elf32_arm_link_hash_entry *) h;
13510
13511 call_reloc_p = FALSE;
13512 may_become_dynamic_p = FALSE;
13513 may_need_local_target_p = FALSE;
13514
13515 /* Could be done earlier, if h were already available. */
13516 r_type = elf32_arm_tls_transition (info, r_type, h);
13517 switch (r_type)
13518 {
13519 case R_ARM_GOT32:
13520 case R_ARM_GOT_PREL:
13521 case R_ARM_TLS_GD32:
13522 case R_ARM_TLS_IE32:
13523 case R_ARM_TLS_GOTDESC:
13524 case R_ARM_TLS_DESCSEQ:
13525 case R_ARM_THM_TLS_DESCSEQ:
13526 case R_ARM_TLS_CALL:
13527 case R_ARM_THM_TLS_CALL:
13528 /* This symbol requires a global offset table entry. */
13529 {
13530 int tls_type, old_tls_type;
13531
13532 switch (r_type)
13533 {
13534 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
13535
13536 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
13537
13538 case R_ARM_TLS_GOTDESC:
13539 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
13540 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
13541 tls_type = GOT_TLS_GDESC; break;
13542
13543 default: tls_type = GOT_NORMAL; break;
13544 }
13545
13546 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
13547 info->flags |= DF_STATIC_TLS;
13548
13549 if (h != NULL)
13550 {
13551 h->got.refcount++;
13552 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
13553 }
13554 else
13555 {
13556 /* This is a global offset table entry for a local symbol. */
13557 if (!elf32_arm_allocate_local_sym_info (abfd))
13558 return FALSE;
13559 elf_local_got_refcounts (abfd)[r_symndx] += 1;
13560 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
13561 }
13562
13563 /* If a variable is accessed with both tls methods, two
13564 slots may be created. */
13565 if (GOT_TLS_GD_ANY_P (old_tls_type)
13566 && GOT_TLS_GD_ANY_P (tls_type))
13567 tls_type |= old_tls_type;
13568
13569 /* We will already have issued an error message if there
13570 is a TLS/non-TLS mismatch, based on the symbol
13571 type. So just combine any TLS types needed. */
13572 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
13573 && tls_type != GOT_NORMAL)
13574 tls_type |= old_tls_type;
13575
13576 /* If the symbol is accessed in both IE and GDESC
13577 method, we're able to relax. Turn off the GDESC flag,
13578 without messing up with any other kind of tls types
13579 that may be involved. */
13580 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
13581 tls_type &= ~GOT_TLS_GDESC;
13582
13583 if (old_tls_type != tls_type)
13584 {
13585 if (h != NULL)
13586 elf32_arm_hash_entry (h)->tls_type = tls_type;
13587 else
13588 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
13589 }
13590 }
13591 /* Fall through. */
13592
13593 case R_ARM_TLS_LDM32:
13594 if (r_type == R_ARM_TLS_LDM32)
13595 htab->tls_ldm_got.refcount++;
13596 /* Fall through. */
13597
13598 case R_ARM_GOTOFF32:
13599 case R_ARM_GOTPC:
13600 if (htab->root.sgot == NULL
13601 && !create_got_section (htab->root.dynobj, info))
13602 return FALSE;
13603 break;
13604
13605 case R_ARM_PC24:
13606 case R_ARM_PLT32:
13607 case R_ARM_CALL:
13608 case R_ARM_JUMP24:
13609 case R_ARM_PREL31:
13610 case R_ARM_THM_CALL:
13611 case R_ARM_THM_JUMP24:
13612 case R_ARM_THM_JUMP19:
13613 call_reloc_p = TRUE;
13614 may_need_local_target_p = TRUE;
13615 break;
13616
13617 case R_ARM_ABS12:
13618 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
13619 ldr __GOTT_INDEX__ offsets. */
13620 if (!htab->vxworks_p)
13621 {
13622 may_need_local_target_p = TRUE;
13623 break;
13624 }
13625 else goto jump_over;
13626
13627 /* Fall through. */
13628
13629 case R_ARM_MOVW_ABS_NC:
13630 case R_ARM_MOVT_ABS:
13631 case R_ARM_THM_MOVW_ABS_NC:
13632 case R_ARM_THM_MOVT_ABS:
13633 if (bfd_link_pic (info))
13634 {
13635 (*_bfd_error_handler)
13636 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
13637 abfd, elf32_arm_howto_table_1[r_type].name,
13638 (h) ? h->root.root.string : "a local symbol");
13639 bfd_set_error (bfd_error_bad_value);
13640 return FALSE;
13641 }
13642
13643 /* Fall through. */
13644 case R_ARM_ABS32:
13645 case R_ARM_ABS32_NOI:
13646 jump_over:
13647 if (h != NULL && bfd_link_executable (info))
13648 {
13649 h->pointer_equality_needed = 1;
13650 }
13651 /* Fall through. */
13652 case R_ARM_REL32:
13653 case R_ARM_REL32_NOI:
13654 case R_ARM_MOVW_PREL_NC:
13655 case R_ARM_MOVT_PREL:
13656 case R_ARM_THM_MOVW_PREL_NC:
13657 case R_ARM_THM_MOVT_PREL:
13658
13659 /* Should the interworking branches be listed here? */
13660 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
13661 && (sec->flags & SEC_ALLOC) != 0)
13662 {
13663 if (h == NULL
13664 && elf32_arm_howto_from_type (r_type)->pc_relative)
13665 {
13666 /* In shared libraries and relocatable executables,
13667 we treat local relative references as calls;
13668 see the related SYMBOL_CALLS_LOCAL code in
13669 allocate_dynrelocs. */
13670 call_reloc_p = TRUE;
13671 may_need_local_target_p = TRUE;
13672 }
13673 else
13674 /* We are creating a shared library or relocatable
13675 executable, and this is a reloc against a global symbol,
13676 or a non-PC-relative reloc against a local symbol.
13677 We may need to copy the reloc into the output. */
13678 may_become_dynamic_p = TRUE;
13679 }
13680 else
13681 may_need_local_target_p = TRUE;
13682 break;
13683
13684 /* This relocation describes the C++ object vtable hierarchy.
13685 Reconstruct it for later use during GC. */
13686 case R_ARM_GNU_VTINHERIT:
13687 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
13688 return FALSE;
13689 break;
13690
13691 /* This relocation describes which C++ vtable entries are actually
13692 used. Record for later use during GC. */
13693 case R_ARM_GNU_VTENTRY:
13694 BFD_ASSERT (h != NULL);
13695 if (h != NULL
13696 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
13697 return FALSE;
13698 break;
13699 }
13700
13701 if (h != NULL)
13702 {
13703 if (call_reloc_p)
13704 /* We may need a .plt entry if the function this reloc
13705 refers to is in a different object, regardless of the
13706 symbol's type. We can't tell for sure yet, because
13707 something later might force the symbol local. */
13708 h->needs_plt = 1;
13709 else if (may_need_local_target_p)
13710 /* If this reloc is in a read-only section, we might
13711 need a copy reloc. We can't check reliably at this
13712 stage whether the section is read-only, as input
13713 sections have not yet been mapped to output sections.
13714 Tentatively set the flag for now, and correct in
13715 adjust_dynamic_symbol. */
13716 h->non_got_ref = 1;
13717 }
13718
13719 if (may_need_local_target_p
13720 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
13721 {
13722 union gotplt_union *root_plt;
13723 struct arm_plt_info *arm_plt;
13724 struct arm_local_iplt_info *local_iplt;
13725
13726 if (h != NULL)
13727 {
13728 root_plt = &h->plt;
13729 arm_plt = &eh->plt;
13730 }
13731 else
13732 {
13733 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
13734 if (local_iplt == NULL)
13735 return FALSE;
13736 root_plt = &local_iplt->root;
13737 arm_plt = &local_iplt->arm;
13738 }
13739
13740 /* If the symbol is a function that doesn't bind locally,
13741 this relocation will need a PLT entry. */
13742 if (root_plt->refcount != -1)
13743 root_plt->refcount += 1;
13744
13745 if (!call_reloc_p)
13746 arm_plt->noncall_refcount++;
13747
13748 /* It's too early to use htab->use_blx here, so we have to
13749 record possible blx references separately from
13750 relocs that definitely need a thumb stub. */
13751
13752 if (r_type == R_ARM_THM_CALL)
13753 arm_plt->maybe_thumb_refcount += 1;
13754
13755 if (r_type == R_ARM_THM_JUMP24
13756 || r_type == R_ARM_THM_JUMP19)
13757 arm_plt->thumb_refcount += 1;
13758 }
13759
13760 if (may_become_dynamic_p)
13761 {
13762 struct elf_dyn_relocs *p, **head;
13763
13764 /* Create a reloc section in dynobj. */
13765 if (sreloc == NULL)
13766 {
13767 sreloc = _bfd_elf_make_dynamic_reloc_section
13768 (sec, dynobj, 2, abfd, ! htab->use_rel);
13769
13770 if (sreloc == NULL)
13771 return FALSE;
13772
13773 /* BPABI objects never have dynamic relocations mapped. */
13774 if (htab->symbian_p)
13775 {
13776 flagword flags;
13777
13778 flags = bfd_get_section_flags (dynobj, sreloc);
13779 flags &= ~(SEC_LOAD | SEC_ALLOC);
13780 bfd_set_section_flags (dynobj, sreloc, flags);
13781 }
13782 }
13783
13784 /* If this is a global symbol, count the number of
13785 relocations we need for this symbol. */
13786 if (h != NULL)
13787 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
13788 else
13789 {
13790 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13791 if (head == NULL)
13792 return FALSE;
13793 }
13794
13795 p = *head;
13796 if (p == NULL || p->sec != sec)
13797 {
13798 bfd_size_type amt = sizeof *p;
13799
13800 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
13801 if (p == NULL)
13802 return FALSE;
13803 p->next = *head;
13804 *head = p;
13805 p->sec = sec;
13806 p->count = 0;
13807 p->pc_count = 0;
13808 }
13809
13810 if (elf32_arm_howto_from_type (r_type)->pc_relative)
13811 p->pc_count += 1;
13812 p->count += 1;
13813 }
13814 }
13815
13816 return TRUE;
13817 }
13818
13819 /* Unwinding tables are not referenced directly. This pass marks them as
13820 required if the corresponding code section is marked. */
13821
13822 static bfd_boolean
13823 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
13824 elf_gc_mark_hook_fn gc_mark_hook)
13825 {
13826 bfd *sub;
13827 Elf_Internal_Shdr **elf_shdrp;
13828 bfd_boolean again;
13829
13830 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
13831
13832 /* Marking EH data may cause additional code sections to be marked,
13833 requiring multiple passes. */
13834 again = TRUE;
13835 while (again)
13836 {
13837 again = FALSE;
13838 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
13839 {
13840 asection *o;
13841
13842 if (! is_arm_elf (sub))
13843 continue;
13844
13845 elf_shdrp = elf_elfsections (sub);
13846 for (o = sub->sections; o != NULL; o = o->next)
13847 {
13848 Elf_Internal_Shdr *hdr;
13849
13850 hdr = &elf_section_data (o)->this_hdr;
13851 if (hdr->sh_type == SHT_ARM_EXIDX
13852 && hdr->sh_link
13853 && hdr->sh_link < elf_numsections (sub)
13854 && !o->gc_mark
13855 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
13856 {
13857 again = TRUE;
13858 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
13859 return FALSE;
13860 }
13861 }
13862 }
13863 }
13864
13865 return TRUE;
13866 }
13867
13868 /* Treat mapping symbols as special target symbols. */
13869
13870 static bfd_boolean
13871 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
13872 {
13873 return bfd_is_arm_special_symbol_name (sym->name,
13874 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
13875 }
13876
13877 /* This is a copy of elf_find_function() from elf.c except that
13878 ARM mapping symbols are ignored when looking for function names
13879 and STT_ARM_TFUNC is considered to a function type. */
13880
13881 static bfd_boolean
13882 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
13883 asymbol ** symbols,
13884 asection * section,
13885 bfd_vma offset,
13886 const char ** filename_ptr,
13887 const char ** functionname_ptr)
13888 {
13889 const char * filename = NULL;
13890 asymbol * func = NULL;
13891 bfd_vma low_func = 0;
13892 asymbol ** p;
13893
13894 for (p = symbols; *p != NULL; p++)
13895 {
13896 elf_symbol_type *q;
13897
13898 q = (elf_symbol_type *) *p;
13899
13900 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
13901 {
13902 default:
13903 break;
13904 case STT_FILE:
13905 filename = bfd_asymbol_name (&q->symbol);
13906 break;
13907 case STT_FUNC:
13908 case STT_ARM_TFUNC:
13909 case STT_NOTYPE:
13910 /* Skip mapping symbols. */
13911 if ((q->symbol.flags & BSF_LOCAL)
13912 && bfd_is_arm_special_symbol_name (q->symbol.name,
13913 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
13914 continue;
13915 /* Fall through. */
13916 if (bfd_get_section (&q->symbol) == section
13917 && q->symbol.value >= low_func
13918 && q->symbol.value <= offset)
13919 {
13920 func = (asymbol *) q;
13921 low_func = q->symbol.value;
13922 }
13923 break;
13924 }
13925 }
13926
13927 if (func == NULL)
13928 return FALSE;
13929
13930 if (filename_ptr)
13931 *filename_ptr = filename;
13932 if (functionname_ptr)
13933 *functionname_ptr = bfd_asymbol_name (func);
13934
13935 return TRUE;
13936 }
13937
13938
13939 /* Find the nearest line to a particular section and offset, for error
13940 reporting. This code is a duplicate of the code in elf.c, except
13941 that it uses arm_elf_find_function. */
13942
13943 static bfd_boolean
13944 elf32_arm_find_nearest_line (bfd * abfd,
13945 asymbol ** symbols,
13946 asection * section,
13947 bfd_vma offset,
13948 const char ** filename_ptr,
13949 const char ** functionname_ptr,
13950 unsigned int * line_ptr,
13951 unsigned int * discriminator_ptr)
13952 {
13953 bfd_boolean found = FALSE;
13954
13955 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
13956 filename_ptr, functionname_ptr,
13957 line_ptr, discriminator_ptr,
13958 dwarf_debug_sections, 0,
13959 & elf_tdata (abfd)->dwarf2_find_line_info))
13960 {
13961 if (!*functionname_ptr)
13962 arm_elf_find_function (abfd, symbols, section, offset,
13963 *filename_ptr ? NULL : filename_ptr,
13964 functionname_ptr);
13965
13966 return TRUE;
13967 }
13968
13969 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
13970 uses DWARF1. */
13971
13972 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
13973 & found, filename_ptr,
13974 functionname_ptr, line_ptr,
13975 & elf_tdata (abfd)->line_info))
13976 return FALSE;
13977
13978 if (found && (*functionname_ptr || *line_ptr))
13979 return TRUE;
13980
13981 if (symbols == NULL)
13982 return FALSE;
13983
13984 if (! arm_elf_find_function (abfd, symbols, section, offset,
13985 filename_ptr, functionname_ptr))
13986 return FALSE;
13987
13988 *line_ptr = 0;
13989 return TRUE;
13990 }
13991
13992 static bfd_boolean
13993 elf32_arm_find_inliner_info (bfd * abfd,
13994 const char ** filename_ptr,
13995 const char ** functionname_ptr,
13996 unsigned int * line_ptr)
13997 {
13998 bfd_boolean found;
13999 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
14000 functionname_ptr, line_ptr,
14001 & elf_tdata (abfd)->dwarf2_find_line_info);
14002 return found;
14003 }
14004
14005 /* Adjust a symbol defined by a dynamic object and referenced by a
14006 regular object. The current definition is in some section of the
14007 dynamic object, but we're not including those sections. We have to
14008 change the definition to something the rest of the link can
14009 understand. */
14010
14011 static bfd_boolean
14012 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
14013 struct elf_link_hash_entry * h)
14014 {
14015 bfd * dynobj;
14016 asection * s;
14017 struct elf32_arm_link_hash_entry * eh;
14018 struct elf32_arm_link_hash_table *globals;
14019
14020 globals = elf32_arm_hash_table (info);
14021 if (globals == NULL)
14022 return FALSE;
14023
14024 dynobj = elf_hash_table (info)->dynobj;
14025
14026 /* Make sure we know what is going on here. */
14027 BFD_ASSERT (dynobj != NULL
14028 && (h->needs_plt
14029 || h->type == STT_GNU_IFUNC
14030 || h->u.weakdef != NULL
14031 || (h->def_dynamic
14032 && h->ref_regular
14033 && !h->def_regular)));
14034
14035 eh = (struct elf32_arm_link_hash_entry *) h;
14036
14037 /* If this is a function, put it in the procedure linkage table. We
14038 will fill in the contents of the procedure linkage table later,
14039 when we know the address of the .got section. */
14040 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
14041 {
14042 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
14043 symbol binds locally. */
14044 if (h->plt.refcount <= 0
14045 || (h->type != STT_GNU_IFUNC
14046 && (SYMBOL_CALLS_LOCAL (info, h)
14047 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
14048 && h->root.type == bfd_link_hash_undefweak))))
14049 {
14050 /* This case can occur if we saw a PLT32 reloc in an input
14051 file, but the symbol was never referred to by a dynamic
14052 object, or if all references were garbage collected. In
14053 such a case, we don't actually need to build a procedure
14054 linkage table, and we can just do a PC24 reloc instead. */
14055 h->plt.offset = (bfd_vma) -1;
14056 eh->plt.thumb_refcount = 0;
14057 eh->plt.maybe_thumb_refcount = 0;
14058 eh->plt.noncall_refcount = 0;
14059 h->needs_plt = 0;
14060 }
14061
14062 return TRUE;
14063 }
14064 else
14065 {
14066 /* It's possible that we incorrectly decided a .plt reloc was
14067 needed for an R_ARM_PC24 or similar reloc to a non-function sym
14068 in check_relocs. We can't decide accurately between function
14069 and non-function syms in check-relocs; Objects loaded later in
14070 the link may change h->type. So fix it now. */
14071 h->plt.offset = (bfd_vma) -1;
14072 eh->plt.thumb_refcount = 0;
14073 eh->plt.maybe_thumb_refcount = 0;
14074 eh->plt.noncall_refcount = 0;
14075 }
14076
14077 /* If this is a weak symbol, and there is a real definition, the
14078 processor independent code will have arranged for us to see the
14079 real definition first, and we can just use the same value. */
14080 if (h->u.weakdef != NULL)
14081 {
14082 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
14083 || h->u.weakdef->root.type == bfd_link_hash_defweak);
14084 h->root.u.def.section = h->u.weakdef->root.u.def.section;
14085 h->root.u.def.value = h->u.weakdef->root.u.def.value;
14086 return TRUE;
14087 }
14088
14089 /* If there are no non-GOT references, we do not need a copy
14090 relocation. */
14091 if (!h->non_got_ref)
14092 return TRUE;
14093
14094 /* This is a reference to a symbol defined by a dynamic object which
14095 is not a function. */
14096
14097 /* If we are creating a shared library, we must presume that the
14098 only references to the symbol are via the global offset table.
14099 For such cases we need not do anything here; the relocations will
14100 be handled correctly by relocate_section. Relocatable executables
14101 can reference data in shared objects directly, so we don't need to
14102 do anything here. */
14103 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
14104 return TRUE;
14105
14106 /* We must allocate the symbol in our .dynbss section, which will
14107 become part of the .bss section of the executable. There will be
14108 an entry for this symbol in the .dynsym section. The dynamic
14109 object will contain position independent code, so all references
14110 from the dynamic object to this symbol will go through the global
14111 offset table. The dynamic linker will use the .dynsym entry to
14112 determine the address it must put in the global offset table, so
14113 both the dynamic object and the regular object will refer to the
14114 same memory location for the variable. */
14115 s = bfd_get_linker_section (dynobj, ".dynbss");
14116 BFD_ASSERT (s != NULL);
14117
14118 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
14119 linker to copy the initial value out of the dynamic object and into
14120 the runtime process image. We need to remember the offset into the
14121 .rel(a).bss section we are going to use. */
14122 if (info->nocopyreloc == 0
14123 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
14124 && h->size != 0)
14125 {
14126 asection *srel;
14127
14128 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
14129 elf32_arm_allocate_dynrelocs (info, srel, 1);
14130 h->needs_copy = 1;
14131 }
14132
14133 return _bfd_elf_adjust_dynamic_copy (info, h, s);
14134 }
14135
14136 /* Allocate space in .plt, .got and associated reloc sections for
14137 dynamic relocs. */
14138
14139 static bfd_boolean
14140 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
14141 {
14142 struct bfd_link_info *info;
14143 struct elf32_arm_link_hash_table *htab;
14144 struct elf32_arm_link_hash_entry *eh;
14145 struct elf_dyn_relocs *p;
14146
14147 if (h->root.type == bfd_link_hash_indirect)
14148 return TRUE;
14149
14150 eh = (struct elf32_arm_link_hash_entry *) h;
14151
14152 info = (struct bfd_link_info *) inf;
14153 htab = elf32_arm_hash_table (info);
14154 if (htab == NULL)
14155 return FALSE;
14156
14157 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
14158 && h->plt.refcount > 0)
14159 {
14160 /* Make sure this symbol is output as a dynamic symbol.
14161 Undefined weak syms won't yet be marked as dynamic. */
14162 if (h->dynindx == -1
14163 && !h->forced_local)
14164 {
14165 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14166 return FALSE;
14167 }
14168
14169 /* If the call in the PLT entry binds locally, the associated
14170 GOT entry should use an R_ARM_IRELATIVE relocation instead of
14171 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
14172 than the .plt section. */
14173 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
14174 {
14175 eh->is_iplt = 1;
14176 if (eh->plt.noncall_refcount == 0
14177 && SYMBOL_REFERENCES_LOCAL (info, h))
14178 /* All non-call references can be resolved directly.
14179 This means that they can (and in some cases, must)
14180 resolve directly to the run-time target, rather than
14181 to the PLT. That in turns means that any .got entry
14182 would be equal to the .igot.plt entry, so there's
14183 no point having both. */
14184 h->got.refcount = 0;
14185 }
14186
14187 if (bfd_link_pic (info)
14188 || eh->is_iplt
14189 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
14190 {
14191 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
14192
14193 /* If this symbol is not defined in a regular file, and we are
14194 not generating a shared library, then set the symbol to this
14195 location in the .plt. This is required to make function
14196 pointers compare as equal between the normal executable and
14197 the shared library. */
14198 if (! bfd_link_pic (info)
14199 && !h->def_regular)
14200 {
14201 h->root.u.def.section = htab->root.splt;
14202 h->root.u.def.value = h->plt.offset;
14203
14204 /* Make sure the function is not marked as Thumb, in case
14205 it is the target of an ABS32 relocation, which will
14206 point to the PLT entry. */
14207 h->target_internal = ST_BRANCH_TO_ARM;
14208 }
14209
14210 /* VxWorks executables have a second set of relocations for
14211 each PLT entry. They go in a separate relocation section,
14212 which is processed by the kernel loader. */
14213 if (htab->vxworks_p && !bfd_link_pic (info))
14214 {
14215 /* There is a relocation for the initial PLT entry:
14216 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
14217 if (h->plt.offset == htab->plt_header_size)
14218 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
14219
14220 /* There are two extra relocations for each subsequent
14221 PLT entry: an R_ARM_32 relocation for the GOT entry,
14222 and an R_ARM_32 relocation for the PLT entry. */
14223 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
14224 }
14225 }
14226 else
14227 {
14228 h->plt.offset = (bfd_vma) -1;
14229 h->needs_plt = 0;
14230 }
14231 }
14232 else
14233 {
14234 h->plt.offset = (bfd_vma) -1;
14235 h->needs_plt = 0;
14236 }
14237
14238 eh = (struct elf32_arm_link_hash_entry *) h;
14239 eh->tlsdesc_got = (bfd_vma) -1;
14240
14241 if (h->got.refcount > 0)
14242 {
14243 asection *s;
14244 bfd_boolean dyn;
14245 int tls_type = elf32_arm_hash_entry (h)->tls_type;
14246 int indx;
14247
14248 /* Make sure this symbol is output as a dynamic symbol.
14249 Undefined weak syms won't yet be marked as dynamic. */
14250 if (h->dynindx == -1
14251 && !h->forced_local)
14252 {
14253 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14254 return FALSE;
14255 }
14256
14257 if (!htab->symbian_p)
14258 {
14259 s = htab->root.sgot;
14260 h->got.offset = s->size;
14261
14262 if (tls_type == GOT_UNKNOWN)
14263 abort ();
14264
14265 if (tls_type == GOT_NORMAL)
14266 /* Non-TLS symbols need one GOT slot. */
14267 s->size += 4;
14268 else
14269 {
14270 if (tls_type & GOT_TLS_GDESC)
14271 {
14272 /* R_ARM_TLS_DESC needs 2 GOT slots. */
14273 eh->tlsdesc_got
14274 = (htab->root.sgotplt->size
14275 - elf32_arm_compute_jump_table_size (htab));
14276 htab->root.sgotplt->size += 8;
14277 h->got.offset = (bfd_vma) -2;
14278 /* plt.got_offset needs to know there's a TLS_DESC
14279 reloc in the middle of .got.plt. */
14280 htab->num_tls_desc++;
14281 }
14282
14283 if (tls_type & GOT_TLS_GD)
14284 {
14285 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
14286 the symbol is both GD and GDESC, got.offset may
14287 have been overwritten. */
14288 h->got.offset = s->size;
14289 s->size += 8;
14290 }
14291
14292 if (tls_type & GOT_TLS_IE)
14293 /* R_ARM_TLS_IE32 needs one GOT slot. */
14294 s->size += 4;
14295 }
14296
14297 dyn = htab->root.dynamic_sections_created;
14298
14299 indx = 0;
14300 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
14301 bfd_link_pic (info),
14302 h)
14303 && (!bfd_link_pic (info)
14304 || !SYMBOL_REFERENCES_LOCAL (info, h)))
14305 indx = h->dynindx;
14306
14307 if (tls_type != GOT_NORMAL
14308 && (bfd_link_pic (info) || indx != 0)
14309 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
14310 || h->root.type != bfd_link_hash_undefweak))
14311 {
14312 if (tls_type & GOT_TLS_IE)
14313 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14314
14315 if (tls_type & GOT_TLS_GD)
14316 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14317
14318 if (tls_type & GOT_TLS_GDESC)
14319 {
14320 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
14321 /* GDESC needs a trampoline to jump to. */
14322 htab->tls_trampoline = -1;
14323 }
14324
14325 /* Only GD needs it. GDESC just emits one relocation per
14326 2 entries. */
14327 if ((tls_type & GOT_TLS_GD) && indx != 0)
14328 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14329 }
14330 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
14331 {
14332 if (htab->root.dynamic_sections_created)
14333 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
14334 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14335 }
14336 else if (h->type == STT_GNU_IFUNC
14337 && eh->plt.noncall_refcount == 0)
14338 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
14339 they all resolve dynamically instead. Reserve room for the
14340 GOT entry's R_ARM_IRELATIVE relocation. */
14341 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
14342 else if (bfd_link_pic (info)
14343 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
14344 || h->root.type != bfd_link_hash_undefweak))
14345 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
14346 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14347 }
14348 }
14349 else
14350 h->got.offset = (bfd_vma) -1;
14351
14352 /* Allocate stubs for exported Thumb functions on v4t. */
14353 if (!htab->use_blx && h->dynindx != -1
14354 && h->def_regular
14355 && h->target_internal == ST_BRANCH_TO_THUMB
14356 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
14357 {
14358 struct elf_link_hash_entry * th;
14359 struct bfd_link_hash_entry * bh;
14360 struct elf_link_hash_entry * myh;
14361 char name[1024];
14362 asection *s;
14363 bh = NULL;
14364 /* Create a new symbol to regist the real location of the function. */
14365 s = h->root.u.def.section;
14366 sprintf (name, "__real_%s", h->root.root.string);
14367 _bfd_generic_link_add_one_symbol (info, s->owner,
14368 name, BSF_GLOBAL, s,
14369 h->root.u.def.value,
14370 NULL, TRUE, FALSE, &bh);
14371
14372 myh = (struct elf_link_hash_entry *) bh;
14373 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14374 myh->forced_local = 1;
14375 myh->target_internal = ST_BRANCH_TO_THUMB;
14376 eh->export_glue = myh;
14377 th = record_arm_to_thumb_glue (info, h);
14378 /* Point the symbol at the stub. */
14379 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
14380 h->target_internal = ST_BRANCH_TO_ARM;
14381 h->root.u.def.section = th->root.u.def.section;
14382 h->root.u.def.value = th->root.u.def.value & ~1;
14383 }
14384
14385 if (eh->dyn_relocs == NULL)
14386 return TRUE;
14387
14388 /* In the shared -Bsymbolic case, discard space allocated for
14389 dynamic pc-relative relocs against symbols which turn out to be
14390 defined in regular objects. For the normal shared case, discard
14391 space for pc-relative relocs that have become local due to symbol
14392 visibility changes. */
14393
14394 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
14395 {
14396 /* Relocs that use pc_count are PC-relative forms, which will appear
14397 on something like ".long foo - ." or "movw REG, foo - .". We want
14398 calls to protected symbols to resolve directly to the function
14399 rather than going via the plt. If people want function pointer
14400 comparisons to work as expected then they should avoid writing
14401 assembly like ".long foo - .". */
14402 if (SYMBOL_CALLS_LOCAL (info, h))
14403 {
14404 struct elf_dyn_relocs **pp;
14405
14406 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
14407 {
14408 p->count -= p->pc_count;
14409 p->pc_count = 0;
14410 if (p->count == 0)
14411 *pp = p->next;
14412 else
14413 pp = &p->next;
14414 }
14415 }
14416
14417 if (htab->vxworks_p)
14418 {
14419 struct elf_dyn_relocs **pp;
14420
14421 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
14422 {
14423 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
14424 *pp = p->next;
14425 else
14426 pp = &p->next;
14427 }
14428 }
14429
14430 /* Also discard relocs on undefined weak syms with non-default
14431 visibility. */
14432 if (eh->dyn_relocs != NULL
14433 && h->root.type == bfd_link_hash_undefweak)
14434 {
14435 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
14436 eh->dyn_relocs = NULL;
14437
14438 /* Make sure undefined weak symbols are output as a dynamic
14439 symbol in PIEs. */
14440 else if (h->dynindx == -1
14441 && !h->forced_local)
14442 {
14443 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14444 return FALSE;
14445 }
14446 }
14447
14448 else if (htab->root.is_relocatable_executable && h->dynindx == -1
14449 && h->root.type == bfd_link_hash_new)
14450 {
14451 /* Output absolute symbols so that we can create relocations
14452 against them. For normal symbols we output a relocation
14453 against the section that contains them. */
14454 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14455 return FALSE;
14456 }
14457
14458 }
14459 else
14460 {
14461 /* For the non-shared case, discard space for relocs against
14462 symbols which turn out to need copy relocs or are not
14463 dynamic. */
14464
14465 if (!h->non_got_ref
14466 && ((h->def_dynamic
14467 && !h->def_regular)
14468 || (htab->root.dynamic_sections_created
14469 && (h->root.type == bfd_link_hash_undefweak
14470 || h->root.type == bfd_link_hash_undefined))))
14471 {
14472 /* Make sure this symbol is output as a dynamic symbol.
14473 Undefined weak syms won't yet be marked as dynamic. */
14474 if (h->dynindx == -1
14475 && !h->forced_local)
14476 {
14477 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14478 return FALSE;
14479 }
14480
14481 /* If that succeeded, we know we'll be keeping all the
14482 relocs. */
14483 if (h->dynindx != -1)
14484 goto keep;
14485 }
14486
14487 eh->dyn_relocs = NULL;
14488
14489 keep: ;
14490 }
14491
14492 /* Finally, allocate space. */
14493 for (p = eh->dyn_relocs; p != NULL; p = p->next)
14494 {
14495 asection *sreloc = elf_section_data (p->sec)->sreloc;
14496 if (h->type == STT_GNU_IFUNC
14497 && eh->plt.noncall_refcount == 0
14498 && SYMBOL_REFERENCES_LOCAL (info, h))
14499 elf32_arm_allocate_irelocs (info, sreloc, p->count);
14500 else
14501 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
14502 }
14503
14504 return TRUE;
14505 }
14506
14507 /* Find any dynamic relocs that apply to read-only sections. */
14508
14509 static bfd_boolean
14510 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
14511 {
14512 struct elf32_arm_link_hash_entry * eh;
14513 struct elf_dyn_relocs * p;
14514
14515 eh = (struct elf32_arm_link_hash_entry *) h;
14516 for (p = eh->dyn_relocs; p != NULL; p = p->next)
14517 {
14518 asection *s = p->sec;
14519
14520 if (s != NULL && (s->flags & SEC_READONLY) != 0)
14521 {
14522 struct bfd_link_info *info = (struct bfd_link_info *) inf;
14523
14524 info->flags |= DF_TEXTREL;
14525
14526 /* Not an error, just cut short the traversal. */
14527 return FALSE;
14528 }
14529 }
14530 return TRUE;
14531 }
14532
14533 void
14534 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
14535 int byteswap_code)
14536 {
14537 struct elf32_arm_link_hash_table *globals;
14538
14539 globals = elf32_arm_hash_table (info);
14540 if (globals == NULL)
14541 return;
14542
14543 globals->byteswap_code = byteswap_code;
14544 }
14545
14546 /* Set the sizes of the dynamic sections. */
14547
14548 static bfd_boolean
14549 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
14550 struct bfd_link_info * info)
14551 {
14552 bfd * dynobj;
14553 asection * s;
14554 bfd_boolean plt;
14555 bfd_boolean relocs;
14556 bfd *ibfd;
14557 struct elf32_arm_link_hash_table *htab;
14558
14559 htab = elf32_arm_hash_table (info);
14560 if (htab == NULL)
14561 return FALSE;
14562
14563 dynobj = elf_hash_table (info)->dynobj;
14564 BFD_ASSERT (dynobj != NULL);
14565 check_use_blx (htab);
14566
14567 if (elf_hash_table (info)->dynamic_sections_created)
14568 {
14569 /* Set the contents of the .interp section to the interpreter. */
14570 if (bfd_link_executable (info) && !info->nointerp)
14571 {
14572 s = bfd_get_linker_section (dynobj, ".interp");
14573 BFD_ASSERT (s != NULL);
14574 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
14575 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
14576 }
14577 }
14578
14579 /* Set up .got offsets for local syms, and space for local dynamic
14580 relocs. */
14581 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
14582 {
14583 bfd_signed_vma *local_got;
14584 bfd_signed_vma *end_local_got;
14585 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
14586 char *local_tls_type;
14587 bfd_vma *local_tlsdesc_gotent;
14588 bfd_size_type locsymcount;
14589 Elf_Internal_Shdr *symtab_hdr;
14590 asection *srel;
14591 bfd_boolean is_vxworks = htab->vxworks_p;
14592 unsigned int symndx;
14593
14594 if (! is_arm_elf (ibfd))
14595 continue;
14596
14597 for (s = ibfd->sections; s != NULL; s = s->next)
14598 {
14599 struct elf_dyn_relocs *p;
14600
14601 for (p = (struct elf_dyn_relocs *)
14602 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
14603 {
14604 if (!bfd_is_abs_section (p->sec)
14605 && bfd_is_abs_section (p->sec->output_section))
14606 {
14607 /* Input section has been discarded, either because
14608 it is a copy of a linkonce section or due to
14609 linker script /DISCARD/, so we'll be discarding
14610 the relocs too. */
14611 }
14612 else if (is_vxworks
14613 && strcmp (p->sec->output_section->name,
14614 ".tls_vars") == 0)
14615 {
14616 /* Relocations in vxworks .tls_vars sections are
14617 handled specially by the loader. */
14618 }
14619 else if (p->count != 0)
14620 {
14621 srel = elf_section_data (p->sec)->sreloc;
14622 elf32_arm_allocate_dynrelocs (info, srel, p->count);
14623 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
14624 info->flags |= DF_TEXTREL;
14625 }
14626 }
14627 }
14628
14629 local_got = elf_local_got_refcounts (ibfd);
14630 if (!local_got)
14631 continue;
14632
14633 symtab_hdr = & elf_symtab_hdr (ibfd);
14634 locsymcount = symtab_hdr->sh_info;
14635 end_local_got = local_got + locsymcount;
14636 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
14637 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
14638 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
14639 symndx = 0;
14640 s = htab->root.sgot;
14641 srel = htab->root.srelgot;
14642 for (; local_got < end_local_got;
14643 ++local_got, ++local_iplt_ptr, ++local_tls_type,
14644 ++local_tlsdesc_gotent, ++symndx)
14645 {
14646 *local_tlsdesc_gotent = (bfd_vma) -1;
14647 local_iplt = *local_iplt_ptr;
14648 if (local_iplt != NULL)
14649 {
14650 struct elf_dyn_relocs *p;
14651
14652 if (local_iplt->root.refcount > 0)
14653 {
14654 elf32_arm_allocate_plt_entry (info, TRUE,
14655 &local_iplt->root,
14656 &local_iplt->arm);
14657 if (local_iplt->arm.noncall_refcount == 0)
14658 /* All references to the PLT are calls, so all
14659 non-call references can resolve directly to the
14660 run-time target. This means that the .got entry
14661 would be the same as the .igot.plt entry, so there's
14662 no point creating both. */
14663 *local_got = 0;
14664 }
14665 else
14666 {
14667 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
14668 local_iplt->root.offset = (bfd_vma) -1;
14669 }
14670
14671 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
14672 {
14673 asection *psrel;
14674
14675 psrel = elf_section_data (p->sec)->sreloc;
14676 if (local_iplt->arm.noncall_refcount == 0)
14677 elf32_arm_allocate_irelocs (info, psrel, p->count);
14678 else
14679 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
14680 }
14681 }
14682 if (*local_got > 0)
14683 {
14684 Elf_Internal_Sym *isym;
14685
14686 *local_got = s->size;
14687 if (*local_tls_type & GOT_TLS_GD)
14688 /* TLS_GD relocs need an 8-byte structure in the GOT. */
14689 s->size += 8;
14690 if (*local_tls_type & GOT_TLS_GDESC)
14691 {
14692 *local_tlsdesc_gotent = htab->root.sgotplt->size
14693 - elf32_arm_compute_jump_table_size (htab);
14694 htab->root.sgotplt->size += 8;
14695 *local_got = (bfd_vma) -2;
14696 /* plt.got_offset needs to know there's a TLS_DESC
14697 reloc in the middle of .got.plt. */
14698 htab->num_tls_desc++;
14699 }
14700 if (*local_tls_type & GOT_TLS_IE)
14701 s->size += 4;
14702
14703 if (*local_tls_type & GOT_NORMAL)
14704 {
14705 /* If the symbol is both GD and GDESC, *local_got
14706 may have been overwritten. */
14707 *local_got = s->size;
14708 s->size += 4;
14709 }
14710
14711 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
14712 if (isym == NULL)
14713 return FALSE;
14714
14715 /* If all references to an STT_GNU_IFUNC PLT are calls,
14716 then all non-call references, including this GOT entry,
14717 resolve directly to the run-time target. */
14718 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
14719 && (local_iplt == NULL
14720 || local_iplt->arm.noncall_refcount == 0))
14721 elf32_arm_allocate_irelocs (info, srel, 1);
14722 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
14723 {
14724 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
14725 || *local_tls_type & GOT_TLS_GD)
14726 elf32_arm_allocate_dynrelocs (info, srel, 1);
14727
14728 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
14729 {
14730 elf32_arm_allocate_dynrelocs (info,
14731 htab->root.srelplt, 1);
14732 htab->tls_trampoline = -1;
14733 }
14734 }
14735 }
14736 else
14737 *local_got = (bfd_vma) -1;
14738 }
14739 }
14740
14741 if (htab->tls_ldm_got.refcount > 0)
14742 {
14743 /* Allocate two GOT entries and one dynamic relocation (if necessary)
14744 for R_ARM_TLS_LDM32 relocations. */
14745 htab->tls_ldm_got.offset = htab->root.sgot->size;
14746 htab->root.sgot->size += 8;
14747 if (bfd_link_pic (info))
14748 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14749 }
14750 else
14751 htab->tls_ldm_got.offset = -1;
14752
14753 /* Allocate global sym .plt and .got entries, and space for global
14754 sym dynamic relocs. */
14755 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
14756
14757 /* Here we rummage through the found bfds to collect glue information. */
14758 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
14759 {
14760 if (! is_arm_elf (ibfd))
14761 continue;
14762
14763 /* Initialise mapping tables for code/data. */
14764 bfd_elf32_arm_init_maps (ibfd);
14765
14766 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
14767 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
14768 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
14769 /* xgettext:c-format */
14770 _bfd_error_handler (_("Errors encountered processing file %s"),
14771 ibfd->filename);
14772 }
14773
14774 /* Allocate space for the glue sections now that we've sized them. */
14775 bfd_elf32_arm_allocate_interworking_sections (info);
14776
14777 /* For every jump slot reserved in the sgotplt, reloc_count is
14778 incremented. However, when we reserve space for TLS descriptors,
14779 it's not incremented, so in order to compute the space reserved
14780 for them, it suffices to multiply the reloc count by the jump
14781 slot size. */
14782 if (htab->root.srelplt)
14783 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
14784
14785 if (htab->tls_trampoline)
14786 {
14787 if (htab->root.splt->size == 0)
14788 htab->root.splt->size += htab->plt_header_size;
14789
14790 htab->tls_trampoline = htab->root.splt->size;
14791 htab->root.splt->size += htab->plt_entry_size;
14792
14793 /* If we're not using lazy TLS relocations, don't generate the
14794 PLT and GOT entries they require. */
14795 if (!(info->flags & DF_BIND_NOW))
14796 {
14797 htab->dt_tlsdesc_got = htab->root.sgot->size;
14798 htab->root.sgot->size += 4;
14799
14800 htab->dt_tlsdesc_plt = htab->root.splt->size;
14801 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
14802 }
14803 }
14804
14805 /* The check_relocs and adjust_dynamic_symbol entry points have
14806 determined the sizes of the various dynamic sections. Allocate
14807 memory for them. */
14808 plt = FALSE;
14809 relocs = FALSE;
14810 for (s = dynobj->sections; s != NULL; s = s->next)
14811 {
14812 const char * name;
14813
14814 if ((s->flags & SEC_LINKER_CREATED) == 0)
14815 continue;
14816
14817 /* It's OK to base decisions on the section name, because none
14818 of the dynobj section names depend upon the input files. */
14819 name = bfd_get_section_name (dynobj, s);
14820
14821 if (s == htab->root.splt)
14822 {
14823 /* Remember whether there is a PLT. */
14824 plt = s->size != 0;
14825 }
14826 else if (CONST_STRNEQ (name, ".rel"))
14827 {
14828 if (s->size != 0)
14829 {
14830 /* Remember whether there are any reloc sections other
14831 than .rel(a).plt and .rela.plt.unloaded. */
14832 if (s != htab->root.srelplt && s != htab->srelplt2)
14833 relocs = TRUE;
14834
14835 /* We use the reloc_count field as a counter if we need
14836 to copy relocs into the output file. */
14837 s->reloc_count = 0;
14838 }
14839 }
14840 else if (s != htab->root.sgot
14841 && s != htab->root.sgotplt
14842 && s != htab->root.iplt
14843 && s != htab->root.igotplt
14844 && s != htab->sdynbss)
14845 {
14846 /* It's not one of our sections, so don't allocate space. */
14847 continue;
14848 }
14849
14850 if (s->size == 0)
14851 {
14852 /* If we don't need this section, strip it from the
14853 output file. This is mostly to handle .rel(a).bss and
14854 .rel(a).plt. We must create both sections in
14855 create_dynamic_sections, because they must be created
14856 before the linker maps input sections to output
14857 sections. The linker does that before
14858 adjust_dynamic_symbol is called, and it is that
14859 function which decides whether anything needs to go
14860 into these sections. */
14861 s->flags |= SEC_EXCLUDE;
14862 continue;
14863 }
14864
14865 if ((s->flags & SEC_HAS_CONTENTS) == 0)
14866 continue;
14867
14868 /* Allocate memory for the section contents. */
14869 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
14870 if (s->contents == NULL)
14871 return FALSE;
14872 }
14873
14874 if (elf_hash_table (info)->dynamic_sections_created)
14875 {
14876 /* Add some entries to the .dynamic section. We fill in the
14877 values later, in elf32_arm_finish_dynamic_sections, but we
14878 must add the entries now so that we get the correct size for
14879 the .dynamic section. The DT_DEBUG entry is filled in by the
14880 dynamic linker and used by the debugger. */
14881 #define add_dynamic_entry(TAG, VAL) \
14882 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
14883
14884 if (bfd_link_executable (info))
14885 {
14886 if (!add_dynamic_entry (DT_DEBUG, 0))
14887 return FALSE;
14888 }
14889
14890 if (plt)
14891 {
14892 if ( !add_dynamic_entry (DT_PLTGOT, 0)
14893 || !add_dynamic_entry (DT_PLTRELSZ, 0)
14894 || !add_dynamic_entry (DT_PLTREL,
14895 htab->use_rel ? DT_REL : DT_RELA)
14896 || !add_dynamic_entry (DT_JMPREL, 0))
14897 return FALSE;
14898
14899 if (htab->dt_tlsdesc_plt &&
14900 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
14901 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
14902 return FALSE;
14903 }
14904
14905 if (relocs)
14906 {
14907 if (htab->use_rel)
14908 {
14909 if (!add_dynamic_entry (DT_REL, 0)
14910 || !add_dynamic_entry (DT_RELSZ, 0)
14911 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
14912 return FALSE;
14913 }
14914 else
14915 {
14916 if (!add_dynamic_entry (DT_RELA, 0)
14917 || !add_dynamic_entry (DT_RELASZ, 0)
14918 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
14919 return FALSE;
14920 }
14921 }
14922
14923 /* If any dynamic relocs apply to a read-only section,
14924 then we need a DT_TEXTREL entry. */
14925 if ((info->flags & DF_TEXTREL) == 0)
14926 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
14927 info);
14928
14929 if ((info->flags & DF_TEXTREL) != 0)
14930 {
14931 if (!add_dynamic_entry (DT_TEXTREL, 0))
14932 return FALSE;
14933 }
14934 if (htab->vxworks_p
14935 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
14936 return FALSE;
14937 }
14938 #undef add_dynamic_entry
14939
14940 return TRUE;
14941 }
14942
14943 /* Size sections even though they're not dynamic. We use it to setup
14944 _TLS_MODULE_BASE_, if needed. */
14945
14946 static bfd_boolean
14947 elf32_arm_always_size_sections (bfd *output_bfd,
14948 struct bfd_link_info *info)
14949 {
14950 asection *tls_sec;
14951
14952 if (bfd_link_relocatable (info))
14953 return TRUE;
14954
14955 tls_sec = elf_hash_table (info)->tls_sec;
14956
14957 if (tls_sec)
14958 {
14959 struct elf_link_hash_entry *tlsbase;
14960
14961 tlsbase = elf_link_hash_lookup
14962 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
14963
14964 if (tlsbase)
14965 {
14966 struct bfd_link_hash_entry *bh = NULL;
14967 const struct elf_backend_data *bed
14968 = get_elf_backend_data (output_bfd);
14969
14970 if (!(_bfd_generic_link_add_one_symbol
14971 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
14972 tls_sec, 0, NULL, FALSE,
14973 bed->collect, &bh)))
14974 return FALSE;
14975
14976 tlsbase->type = STT_TLS;
14977 tlsbase = (struct elf_link_hash_entry *)bh;
14978 tlsbase->def_regular = 1;
14979 tlsbase->other = STV_HIDDEN;
14980 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
14981 }
14982 }
14983 return TRUE;
14984 }
14985
14986 /* Finish up dynamic symbol handling. We set the contents of various
14987 dynamic sections here. */
14988
14989 static bfd_boolean
14990 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14991 struct bfd_link_info * info,
14992 struct elf_link_hash_entry * h,
14993 Elf_Internal_Sym * sym)
14994 {
14995 struct elf32_arm_link_hash_table *htab;
14996 struct elf32_arm_link_hash_entry *eh;
14997
14998 htab = elf32_arm_hash_table (info);
14999 if (htab == NULL)
15000 return FALSE;
15001
15002 eh = (struct elf32_arm_link_hash_entry *) h;
15003
15004 if (h->plt.offset != (bfd_vma) -1)
15005 {
15006 if (!eh->is_iplt)
15007 {
15008 BFD_ASSERT (h->dynindx != -1);
15009 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
15010 h->dynindx, 0))
15011 return FALSE;
15012 }
15013
15014 if (!h->def_regular)
15015 {
15016 /* Mark the symbol as undefined, rather than as defined in
15017 the .plt section. */
15018 sym->st_shndx = SHN_UNDEF;
15019 /* If the symbol is weak we need to clear the value.
15020 Otherwise, the PLT entry would provide a definition for
15021 the symbol even if the symbol wasn't defined anywhere,
15022 and so the symbol would never be NULL. Leave the value if
15023 there were any relocations where pointer equality matters
15024 (this is a clue for the dynamic linker, to make function
15025 pointer comparisons work between an application and shared
15026 library). */
15027 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
15028 sym->st_value = 0;
15029 }
15030 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
15031 {
15032 /* At least one non-call relocation references this .iplt entry,
15033 so the .iplt entry is the function's canonical address. */
15034 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
15035 sym->st_target_internal = ST_BRANCH_TO_ARM;
15036 sym->st_shndx = (_bfd_elf_section_from_bfd_section
15037 (output_bfd, htab->root.iplt->output_section));
15038 sym->st_value = (h->plt.offset
15039 + htab->root.iplt->output_section->vma
15040 + htab->root.iplt->output_offset);
15041 }
15042 }
15043
15044 if (h->needs_copy)
15045 {
15046 asection * s;
15047 Elf_Internal_Rela rel;
15048
15049 /* This symbol needs a copy reloc. Set it up. */
15050 BFD_ASSERT (h->dynindx != -1
15051 && (h->root.type == bfd_link_hash_defined
15052 || h->root.type == bfd_link_hash_defweak));
15053
15054 s = htab->srelbss;
15055 BFD_ASSERT (s != NULL);
15056
15057 rel.r_addend = 0;
15058 rel.r_offset = (h->root.u.def.value
15059 + h->root.u.def.section->output_section->vma
15060 + h->root.u.def.section->output_offset);
15061 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
15062 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
15063 }
15064
15065 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
15066 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
15067 to the ".got" section. */
15068 if (h == htab->root.hdynamic
15069 || (!htab->vxworks_p && h == htab->root.hgot))
15070 sym->st_shndx = SHN_ABS;
15071
15072 return TRUE;
15073 }
15074
15075 static void
15076 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
15077 void *contents,
15078 const unsigned long *template, unsigned count)
15079 {
15080 unsigned ix;
15081
15082 for (ix = 0; ix != count; ix++)
15083 {
15084 unsigned long insn = template[ix];
15085
15086 /* Emit mov pc,rx if bx is not permitted. */
15087 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
15088 insn = (insn & 0xf000000f) | 0x01a0f000;
15089 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
15090 }
15091 }
15092
15093 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
15094 other variants, NaCl needs this entry in a static executable's
15095 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
15096 zero. For .iplt really only the last bundle is useful, and .iplt
15097 could have a shorter first entry, with each individual PLT entry's
15098 relative branch calculated differently so it targets the last
15099 bundle instead of the instruction before it (labelled .Lplt_tail
15100 above). But it's simpler to keep the size and layout of PLT0
15101 consistent with the dynamic case, at the cost of some dead code at
15102 the start of .iplt and the one dead store to the stack at the start
15103 of .Lplt_tail. */
15104 static void
15105 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
15106 asection *plt, bfd_vma got_displacement)
15107 {
15108 unsigned int i;
15109
15110 put_arm_insn (htab, output_bfd,
15111 elf32_arm_nacl_plt0_entry[0]
15112 | arm_movw_immediate (got_displacement),
15113 plt->contents + 0);
15114 put_arm_insn (htab, output_bfd,
15115 elf32_arm_nacl_plt0_entry[1]
15116 | arm_movt_immediate (got_displacement),
15117 plt->contents + 4);
15118
15119 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
15120 put_arm_insn (htab, output_bfd,
15121 elf32_arm_nacl_plt0_entry[i],
15122 plt->contents + (i * 4));
15123 }
15124
15125 /* Finish up the dynamic sections. */
15126
15127 static bfd_boolean
15128 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
15129 {
15130 bfd * dynobj;
15131 asection * sgot;
15132 asection * sdyn;
15133 struct elf32_arm_link_hash_table *htab;
15134
15135 htab = elf32_arm_hash_table (info);
15136 if (htab == NULL)
15137 return FALSE;
15138
15139 dynobj = elf_hash_table (info)->dynobj;
15140
15141 sgot = htab->root.sgotplt;
15142 /* A broken linker script might have discarded the dynamic sections.
15143 Catch this here so that we do not seg-fault later on. */
15144 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
15145 return FALSE;
15146 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
15147
15148 if (elf_hash_table (info)->dynamic_sections_created)
15149 {
15150 asection *splt;
15151 Elf32_External_Dyn *dyncon, *dynconend;
15152
15153 splt = htab->root.splt;
15154 BFD_ASSERT (splt != NULL && sdyn != NULL);
15155 BFD_ASSERT (htab->symbian_p || sgot != NULL);
15156
15157 dyncon = (Elf32_External_Dyn *) sdyn->contents;
15158 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
15159
15160 for (; dyncon < dynconend; dyncon++)
15161 {
15162 Elf_Internal_Dyn dyn;
15163 const char * name;
15164 asection * s;
15165
15166 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
15167
15168 switch (dyn.d_tag)
15169 {
15170 unsigned int type;
15171
15172 default:
15173 if (htab->vxworks_p
15174 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
15175 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15176 break;
15177
15178 case DT_HASH:
15179 name = ".hash";
15180 goto get_vma_if_bpabi;
15181 case DT_STRTAB:
15182 name = ".dynstr";
15183 goto get_vma_if_bpabi;
15184 case DT_SYMTAB:
15185 name = ".dynsym";
15186 goto get_vma_if_bpabi;
15187 case DT_VERSYM:
15188 name = ".gnu.version";
15189 goto get_vma_if_bpabi;
15190 case DT_VERDEF:
15191 name = ".gnu.version_d";
15192 goto get_vma_if_bpabi;
15193 case DT_VERNEED:
15194 name = ".gnu.version_r";
15195 goto get_vma_if_bpabi;
15196
15197 case DT_PLTGOT:
15198 name = ".got";
15199 goto get_vma;
15200 case DT_JMPREL:
15201 name = RELOC_SECTION (htab, ".plt");
15202 get_vma:
15203 s = bfd_get_section_by_name (output_bfd, name);
15204 if (s == NULL)
15205 {
15206 /* PR ld/14397: Issue an error message if a required section is missing. */
15207 (*_bfd_error_handler)
15208 (_("error: required section '%s' not found in the linker script"), name);
15209 bfd_set_error (bfd_error_invalid_operation);
15210 return FALSE;
15211 }
15212 if (!htab->symbian_p)
15213 dyn.d_un.d_ptr = s->vma;
15214 else
15215 /* In the BPABI, tags in the PT_DYNAMIC section point
15216 at the file offset, not the memory address, for the
15217 convenience of the post linker. */
15218 dyn.d_un.d_ptr = s->filepos;
15219 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15220 break;
15221
15222 get_vma_if_bpabi:
15223 if (htab->symbian_p)
15224 goto get_vma;
15225 break;
15226
15227 case DT_PLTRELSZ:
15228 s = htab->root.srelplt;
15229 BFD_ASSERT (s != NULL);
15230 dyn.d_un.d_val = s->size;
15231 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15232 break;
15233
15234 case DT_RELSZ:
15235 case DT_RELASZ:
15236 if (!htab->symbian_p)
15237 {
15238 /* My reading of the SVR4 ABI indicates that the
15239 procedure linkage table relocs (DT_JMPREL) should be
15240 included in the overall relocs (DT_REL). This is
15241 what Solaris does. However, UnixWare can not handle
15242 that case. Therefore, we override the DT_RELSZ entry
15243 here to make it not include the JMPREL relocs. Since
15244 the linker script arranges for .rel(a).plt to follow all
15245 other relocation sections, we don't have to worry
15246 about changing the DT_REL entry. */
15247 s = htab->root.srelplt;
15248 if (s != NULL)
15249 dyn.d_un.d_val -= s->size;
15250 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15251 break;
15252 }
15253 /* Fall through. */
15254
15255 case DT_REL:
15256 case DT_RELA:
15257 /* In the BPABI, the DT_REL tag must point at the file
15258 offset, not the VMA, of the first relocation
15259 section. So, we use code similar to that in
15260 elflink.c, but do not check for SHF_ALLOC on the
15261 relcoation section, since relocations sections are
15262 never allocated under the BPABI. The comments above
15263 about Unixware notwithstanding, we include all of the
15264 relocations here. */
15265 if (htab->symbian_p)
15266 {
15267 unsigned int i;
15268 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
15269 ? SHT_REL : SHT_RELA);
15270 dyn.d_un.d_val = 0;
15271 for (i = 1; i < elf_numsections (output_bfd); i++)
15272 {
15273 Elf_Internal_Shdr *hdr
15274 = elf_elfsections (output_bfd)[i];
15275 if (hdr->sh_type == type)
15276 {
15277 if (dyn.d_tag == DT_RELSZ
15278 || dyn.d_tag == DT_RELASZ)
15279 dyn.d_un.d_val += hdr->sh_size;
15280 else if ((ufile_ptr) hdr->sh_offset
15281 <= dyn.d_un.d_val - 1)
15282 dyn.d_un.d_val = hdr->sh_offset;
15283 }
15284 }
15285 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15286 }
15287 break;
15288
15289 case DT_TLSDESC_PLT:
15290 s = htab->root.splt;
15291 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
15292 + htab->dt_tlsdesc_plt);
15293 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15294 break;
15295
15296 case DT_TLSDESC_GOT:
15297 s = htab->root.sgot;
15298 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
15299 + htab->dt_tlsdesc_got);
15300 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15301 break;
15302
15303 /* Set the bottom bit of DT_INIT/FINI if the
15304 corresponding function is Thumb. */
15305 case DT_INIT:
15306 name = info->init_function;
15307 goto get_sym;
15308 case DT_FINI:
15309 name = info->fini_function;
15310 get_sym:
15311 /* If it wasn't set by elf_bfd_final_link
15312 then there is nothing to adjust. */
15313 if (dyn.d_un.d_val != 0)
15314 {
15315 struct elf_link_hash_entry * eh;
15316
15317 eh = elf_link_hash_lookup (elf_hash_table (info), name,
15318 FALSE, FALSE, TRUE);
15319 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
15320 {
15321 dyn.d_un.d_val |= 1;
15322 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15323 }
15324 }
15325 break;
15326 }
15327 }
15328
15329 /* Fill in the first entry in the procedure linkage table. */
15330 if (splt->size > 0 && htab->plt_header_size)
15331 {
15332 const bfd_vma *plt0_entry;
15333 bfd_vma got_address, plt_address, got_displacement;
15334
15335 /* Calculate the addresses of the GOT and PLT. */
15336 got_address = sgot->output_section->vma + sgot->output_offset;
15337 plt_address = splt->output_section->vma + splt->output_offset;
15338
15339 if (htab->vxworks_p)
15340 {
15341 /* The VxWorks GOT is relocated by the dynamic linker.
15342 Therefore, we must emit relocations rather than simply
15343 computing the values now. */
15344 Elf_Internal_Rela rel;
15345
15346 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
15347 put_arm_insn (htab, output_bfd, plt0_entry[0],
15348 splt->contents + 0);
15349 put_arm_insn (htab, output_bfd, plt0_entry[1],
15350 splt->contents + 4);
15351 put_arm_insn (htab, output_bfd, plt0_entry[2],
15352 splt->contents + 8);
15353 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
15354
15355 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
15356 rel.r_offset = plt_address + 12;
15357 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
15358 rel.r_addend = 0;
15359 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
15360 htab->srelplt2->contents);
15361 }
15362 else if (htab->nacl_p)
15363 arm_nacl_put_plt0 (htab, output_bfd, splt,
15364 got_address + 8 - (plt_address + 16));
15365 else if (using_thumb_only (htab))
15366 {
15367 got_displacement = got_address - (plt_address + 12);
15368
15369 plt0_entry = elf32_thumb2_plt0_entry;
15370 put_arm_insn (htab, output_bfd, plt0_entry[0],
15371 splt->contents + 0);
15372 put_arm_insn (htab, output_bfd, plt0_entry[1],
15373 splt->contents + 4);
15374 put_arm_insn (htab, output_bfd, plt0_entry[2],
15375 splt->contents + 8);
15376
15377 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
15378 }
15379 else
15380 {
15381 got_displacement = got_address - (plt_address + 16);
15382
15383 plt0_entry = elf32_arm_plt0_entry;
15384 put_arm_insn (htab, output_bfd, plt0_entry[0],
15385 splt->contents + 0);
15386 put_arm_insn (htab, output_bfd, plt0_entry[1],
15387 splt->contents + 4);
15388 put_arm_insn (htab, output_bfd, plt0_entry[2],
15389 splt->contents + 8);
15390 put_arm_insn (htab, output_bfd, plt0_entry[3],
15391 splt->contents + 12);
15392
15393 #ifdef FOUR_WORD_PLT
15394 /* The displacement value goes in the otherwise-unused
15395 last word of the second entry. */
15396 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
15397 #else
15398 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
15399 #endif
15400 }
15401 }
15402
15403 /* UnixWare sets the entsize of .plt to 4, although that doesn't
15404 really seem like the right value. */
15405 if (splt->output_section->owner == output_bfd)
15406 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
15407
15408 if (htab->dt_tlsdesc_plt)
15409 {
15410 bfd_vma got_address
15411 = sgot->output_section->vma + sgot->output_offset;
15412 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
15413 + htab->root.sgot->output_offset);
15414 bfd_vma plt_address
15415 = splt->output_section->vma + splt->output_offset;
15416
15417 arm_put_trampoline (htab, output_bfd,
15418 splt->contents + htab->dt_tlsdesc_plt,
15419 dl_tlsdesc_lazy_trampoline, 6);
15420
15421 bfd_put_32 (output_bfd,
15422 gotplt_address + htab->dt_tlsdesc_got
15423 - (plt_address + htab->dt_tlsdesc_plt)
15424 - dl_tlsdesc_lazy_trampoline[6],
15425 splt->contents + htab->dt_tlsdesc_plt + 24);
15426 bfd_put_32 (output_bfd,
15427 got_address - (plt_address + htab->dt_tlsdesc_plt)
15428 - dl_tlsdesc_lazy_trampoline[7],
15429 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
15430 }
15431
15432 if (htab->tls_trampoline)
15433 {
15434 arm_put_trampoline (htab, output_bfd,
15435 splt->contents + htab->tls_trampoline,
15436 tls_trampoline, 3);
15437 #ifdef FOUR_WORD_PLT
15438 bfd_put_32 (output_bfd, 0x00000000,
15439 splt->contents + htab->tls_trampoline + 12);
15440 #endif
15441 }
15442
15443 if (htab->vxworks_p
15444 && !bfd_link_pic (info)
15445 && htab->root.splt->size > 0)
15446 {
15447 /* Correct the .rel(a).plt.unloaded relocations. They will have
15448 incorrect symbol indexes. */
15449 int num_plts;
15450 unsigned char *p;
15451
15452 num_plts = ((htab->root.splt->size - htab->plt_header_size)
15453 / htab->plt_entry_size);
15454 p = htab->srelplt2->contents + RELOC_SIZE (htab);
15455
15456 for (; num_plts; num_plts--)
15457 {
15458 Elf_Internal_Rela rel;
15459
15460 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
15461 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
15462 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
15463 p += RELOC_SIZE (htab);
15464
15465 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
15466 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
15467 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
15468 p += RELOC_SIZE (htab);
15469 }
15470 }
15471 }
15472
15473 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
15474 /* NaCl uses a special first entry in .iplt too. */
15475 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
15476
15477 /* Fill in the first three entries in the global offset table. */
15478 if (sgot)
15479 {
15480 if (sgot->size > 0)
15481 {
15482 if (sdyn == NULL)
15483 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
15484 else
15485 bfd_put_32 (output_bfd,
15486 sdyn->output_section->vma + sdyn->output_offset,
15487 sgot->contents);
15488 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
15489 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
15490 }
15491
15492 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
15493 }
15494
15495 return TRUE;
15496 }
15497
15498 static void
15499 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
15500 {
15501 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
15502 struct elf32_arm_link_hash_table *globals;
15503 struct elf_segment_map *m;
15504
15505 i_ehdrp = elf_elfheader (abfd);
15506
15507 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
15508 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
15509 else
15510 _bfd_elf_post_process_headers (abfd, link_info);
15511 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
15512
15513 if (link_info)
15514 {
15515 globals = elf32_arm_hash_table (link_info);
15516 if (globals != NULL && globals->byteswap_code)
15517 i_ehdrp->e_flags |= EF_ARM_BE8;
15518 }
15519
15520 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
15521 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
15522 {
15523 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
15524 if (abi == AEABI_VFP_args_vfp)
15525 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
15526 else
15527 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
15528 }
15529
15530 /* Scan segment to set p_flags attribute if it contains only sections with
15531 SHF_ARM_NOREAD flag. */
15532 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
15533 {
15534 unsigned int j;
15535
15536 if (m->count == 0)
15537 continue;
15538 for (j = 0; j < m->count; j++)
15539 {
15540 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_NOREAD))
15541 break;
15542 }
15543 if (j == m->count)
15544 {
15545 m->p_flags = PF_X;
15546 m->p_flags_valid = 1;
15547 }
15548 }
15549 }
15550
15551 static enum elf_reloc_type_class
15552 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
15553 const asection *rel_sec ATTRIBUTE_UNUSED,
15554 const Elf_Internal_Rela *rela)
15555 {
15556 switch ((int) ELF32_R_TYPE (rela->r_info))
15557 {
15558 case R_ARM_RELATIVE:
15559 return reloc_class_relative;
15560 case R_ARM_JUMP_SLOT:
15561 return reloc_class_plt;
15562 case R_ARM_COPY:
15563 return reloc_class_copy;
15564 case R_ARM_IRELATIVE:
15565 return reloc_class_ifunc;
15566 default:
15567 return reloc_class_normal;
15568 }
15569 }
15570
15571 static void
15572 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
15573 {
15574 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
15575 }
15576
15577 /* Return TRUE if this is an unwinding table entry. */
15578
15579 static bfd_boolean
15580 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
15581 {
15582 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
15583 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
15584 }
15585
15586
15587 /* Set the type and flags for an ARM section. We do this by
15588 the section name, which is a hack, but ought to work. */
15589
15590 static bfd_boolean
15591 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
15592 {
15593 const char * name;
15594
15595 name = bfd_get_section_name (abfd, sec);
15596
15597 if (is_arm_elf_unwind_section_name (abfd, name))
15598 {
15599 hdr->sh_type = SHT_ARM_EXIDX;
15600 hdr->sh_flags |= SHF_LINK_ORDER;
15601 }
15602
15603 if (sec->flags & SEC_ELF_NOREAD)
15604 hdr->sh_flags |= SHF_ARM_NOREAD;
15605
15606 return TRUE;
15607 }
15608
15609 /* Handle an ARM specific section when reading an object file. This is
15610 called when bfd_section_from_shdr finds a section with an unknown
15611 type. */
15612
15613 static bfd_boolean
15614 elf32_arm_section_from_shdr (bfd *abfd,
15615 Elf_Internal_Shdr * hdr,
15616 const char *name,
15617 int shindex)
15618 {
15619 /* There ought to be a place to keep ELF backend specific flags, but
15620 at the moment there isn't one. We just keep track of the
15621 sections by their name, instead. Fortunately, the ABI gives
15622 names for all the ARM specific sections, so we will probably get
15623 away with this. */
15624 switch (hdr->sh_type)
15625 {
15626 case SHT_ARM_EXIDX:
15627 case SHT_ARM_PREEMPTMAP:
15628 case SHT_ARM_ATTRIBUTES:
15629 break;
15630
15631 default:
15632 return FALSE;
15633 }
15634
15635 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
15636 return FALSE;
15637
15638 return TRUE;
15639 }
15640
15641 static _arm_elf_section_data *
15642 get_arm_elf_section_data (asection * sec)
15643 {
15644 if (sec && sec->owner && is_arm_elf (sec->owner))
15645 return elf32_arm_section_data (sec);
15646 else
15647 return NULL;
15648 }
15649
15650 typedef struct
15651 {
15652 void *flaginfo;
15653 struct bfd_link_info *info;
15654 asection *sec;
15655 int sec_shndx;
15656 int (*func) (void *, const char *, Elf_Internal_Sym *,
15657 asection *, struct elf_link_hash_entry *);
15658 } output_arch_syminfo;
15659
15660 enum map_symbol_type
15661 {
15662 ARM_MAP_ARM,
15663 ARM_MAP_THUMB,
15664 ARM_MAP_DATA
15665 };
15666
15667
15668 /* Output a single mapping symbol. */
15669
15670 static bfd_boolean
15671 elf32_arm_output_map_sym (output_arch_syminfo *osi,
15672 enum map_symbol_type type,
15673 bfd_vma offset)
15674 {
15675 static const char *names[3] = {"$a", "$t", "$d"};
15676 Elf_Internal_Sym sym;
15677
15678 sym.st_value = osi->sec->output_section->vma
15679 + osi->sec->output_offset
15680 + offset;
15681 sym.st_size = 0;
15682 sym.st_other = 0;
15683 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
15684 sym.st_shndx = osi->sec_shndx;
15685 sym.st_target_internal = 0;
15686 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
15687 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
15688 }
15689
15690 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
15691 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
15692
15693 static bfd_boolean
15694 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
15695 bfd_boolean is_iplt_entry_p,
15696 union gotplt_union *root_plt,
15697 struct arm_plt_info *arm_plt)
15698 {
15699 struct elf32_arm_link_hash_table *htab;
15700 bfd_vma addr, plt_header_size;
15701
15702 if (root_plt->offset == (bfd_vma) -1)
15703 return TRUE;
15704
15705 htab = elf32_arm_hash_table (osi->info);
15706 if (htab == NULL)
15707 return FALSE;
15708
15709 if (is_iplt_entry_p)
15710 {
15711 osi->sec = htab->root.iplt;
15712 plt_header_size = 0;
15713 }
15714 else
15715 {
15716 osi->sec = htab->root.splt;
15717 plt_header_size = htab->plt_header_size;
15718 }
15719 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
15720 (osi->info->output_bfd, osi->sec->output_section));
15721
15722 addr = root_plt->offset & -2;
15723 if (htab->symbian_p)
15724 {
15725 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15726 return FALSE;
15727 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
15728 return FALSE;
15729 }
15730 else if (htab->vxworks_p)
15731 {
15732 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15733 return FALSE;
15734 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
15735 return FALSE;
15736 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
15737 return FALSE;
15738 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
15739 return FALSE;
15740 }
15741 else if (htab->nacl_p)
15742 {
15743 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15744 return FALSE;
15745 }
15746 else if (using_thumb_only (htab))
15747 {
15748 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
15749 return FALSE;
15750 }
15751 else
15752 {
15753 bfd_boolean thumb_stub_p;
15754
15755 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
15756 if (thumb_stub_p)
15757 {
15758 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
15759 return FALSE;
15760 }
15761 #ifdef FOUR_WORD_PLT
15762 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15763 return FALSE;
15764 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
15765 return FALSE;
15766 #else
15767 /* A three-word PLT with no Thumb thunk contains only Arm code,
15768 so only need to output a mapping symbol for the first PLT entry and
15769 entries with thumb thunks. */
15770 if (thumb_stub_p || addr == plt_header_size)
15771 {
15772 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15773 return FALSE;
15774 }
15775 #endif
15776 }
15777
15778 return TRUE;
15779 }
15780
15781 /* Output mapping symbols for PLT entries associated with H. */
15782
15783 static bfd_boolean
15784 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
15785 {
15786 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
15787 struct elf32_arm_link_hash_entry *eh;
15788
15789 if (h->root.type == bfd_link_hash_indirect)
15790 return TRUE;
15791
15792 if (h->root.type == bfd_link_hash_warning)
15793 /* When warning symbols are created, they **replace** the "real"
15794 entry in the hash table, thus we never get to see the real
15795 symbol in a hash traversal. So look at it now. */
15796 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15797
15798 eh = (struct elf32_arm_link_hash_entry *) h;
15799 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
15800 &h->plt, &eh->plt);
15801 }
15802
15803 /* Output a single local symbol for a generated stub. */
15804
15805 static bfd_boolean
15806 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
15807 bfd_vma offset, bfd_vma size)
15808 {
15809 Elf_Internal_Sym sym;
15810
15811 sym.st_value = osi->sec->output_section->vma
15812 + osi->sec->output_offset
15813 + offset;
15814 sym.st_size = size;
15815 sym.st_other = 0;
15816 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15817 sym.st_shndx = osi->sec_shndx;
15818 sym.st_target_internal = 0;
15819 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
15820 }
15821
15822 static bfd_boolean
15823 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
15824 void * in_arg)
15825 {
15826 struct elf32_arm_stub_hash_entry *stub_entry;
15827 asection *stub_sec;
15828 bfd_vma addr;
15829 char *stub_name;
15830 output_arch_syminfo *osi;
15831 const insn_sequence *template_sequence;
15832 enum stub_insn_type prev_type;
15833 int size;
15834 int i;
15835 enum map_symbol_type sym_type;
15836
15837 /* Massage our args to the form they really have. */
15838 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15839 osi = (output_arch_syminfo *) in_arg;
15840
15841 stub_sec = stub_entry->stub_sec;
15842
15843 /* Ensure this stub is attached to the current section being
15844 processed. */
15845 if (stub_sec != osi->sec)
15846 return TRUE;
15847
15848 addr = (bfd_vma) stub_entry->stub_offset;
15849 stub_name = stub_entry->output_name;
15850
15851 template_sequence = stub_entry->stub_template;
15852 switch (template_sequence[0].type)
15853 {
15854 case ARM_TYPE:
15855 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
15856 return FALSE;
15857 break;
15858 case THUMB16_TYPE:
15859 case THUMB32_TYPE:
15860 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
15861 stub_entry->stub_size))
15862 return FALSE;
15863 break;
15864 default:
15865 BFD_FAIL ();
15866 return 0;
15867 }
15868
15869 prev_type = DATA_TYPE;
15870 size = 0;
15871 for (i = 0; i < stub_entry->stub_template_size; i++)
15872 {
15873 switch (template_sequence[i].type)
15874 {
15875 case ARM_TYPE:
15876 sym_type = ARM_MAP_ARM;
15877 break;
15878
15879 case THUMB16_TYPE:
15880 case THUMB32_TYPE:
15881 sym_type = ARM_MAP_THUMB;
15882 break;
15883
15884 case DATA_TYPE:
15885 sym_type = ARM_MAP_DATA;
15886 break;
15887
15888 default:
15889 BFD_FAIL ();
15890 return FALSE;
15891 }
15892
15893 if (template_sequence[i].type != prev_type)
15894 {
15895 prev_type = template_sequence[i].type;
15896 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
15897 return FALSE;
15898 }
15899
15900 switch (template_sequence[i].type)
15901 {
15902 case ARM_TYPE:
15903 case THUMB32_TYPE:
15904 size += 4;
15905 break;
15906
15907 case THUMB16_TYPE:
15908 size += 2;
15909 break;
15910
15911 case DATA_TYPE:
15912 size += 4;
15913 break;
15914
15915 default:
15916 BFD_FAIL ();
15917 return FALSE;
15918 }
15919 }
15920
15921 return TRUE;
15922 }
15923
15924 /* Output mapping symbols for linker generated sections,
15925 and for those data-only sections that do not have a
15926 $d. */
15927
15928 static bfd_boolean
15929 elf32_arm_output_arch_local_syms (bfd *output_bfd,
15930 struct bfd_link_info *info,
15931 void *flaginfo,
15932 int (*func) (void *, const char *,
15933 Elf_Internal_Sym *,
15934 asection *,
15935 struct elf_link_hash_entry *))
15936 {
15937 output_arch_syminfo osi;
15938 struct elf32_arm_link_hash_table *htab;
15939 bfd_vma offset;
15940 bfd_size_type size;
15941 bfd *input_bfd;
15942
15943 htab = elf32_arm_hash_table (info);
15944 if (htab == NULL)
15945 return FALSE;
15946
15947 check_use_blx (htab);
15948
15949 osi.flaginfo = flaginfo;
15950 osi.info = info;
15951 osi.func = func;
15952
15953 /* Add a $d mapping symbol to data-only sections that
15954 don't have any mapping symbol. This may result in (harmless) redundant
15955 mapping symbols. */
15956 for (input_bfd = info->input_bfds;
15957 input_bfd != NULL;
15958 input_bfd = input_bfd->link.next)
15959 {
15960 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
15961 for (osi.sec = input_bfd->sections;
15962 osi.sec != NULL;
15963 osi.sec = osi.sec->next)
15964 {
15965 if (osi.sec->output_section != NULL
15966 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
15967 != 0)
15968 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
15969 == SEC_HAS_CONTENTS
15970 && get_arm_elf_section_data (osi.sec) != NULL
15971 && get_arm_elf_section_data (osi.sec)->mapcount == 0
15972 && osi.sec->size > 0
15973 && (osi.sec->flags & SEC_EXCLUDE) == 0)
15974 {
15975 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15976 (output_bfd, osi.sec->output_section);
15977 if (osi.sec_shndx != (int)SHN_BAD)
15978 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
15979 }
15980 }
15981 }
15982
15983 /* ARM->Thumb glue. */
15984 if (htab->arm_glue_size > 0)
15985 {
15986 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15987 ARM2THUMB_GLUE_SECTION_NAME);
15988
15989 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15990 (output_bfd, osi.sec->output_section);
15991 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
15992 || htab->pic_veneer)
15993 size = ARM2THUMB_PIC_GLUE_SIZE;
15994 else if (htab->use_blx)
15995 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
15996 else
15997 size = ARM2THUMB_STATIC_GLUE_SIZE;
15998
15999 for (offset = 0; offset < htab->arm_glue_size; offset += size)
16000 {
16001 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
16002 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
16003 }
16004 }
16005
16006 /* Thumb->ARM glue. */
16007 if (htab->thumb_glue_size > 0)
16008 {
16009 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16010 THUMB2ARM_GLUE_SECTION_NAME);
16011
16012 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16013 (output_bfd, osi.sec->output_section);
16014 size = THUMB2ARM_GLUE_SIZE;
16015
16016 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
16017 {
16018 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
16019 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
16020 }
16021 }
16022
16023 /* ARMv4 BX veneers. */
16024 if (htab->bx_glue_size > 0)
16025 {
16026 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16027 ARM_BX_GLUE_SECTION_NAME);
16028
16029 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16030 (output_bfd, osi.sec->output_section);
16031
16032 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
16033 }
16034
16035 /* Long calls stubs. */
16036 if (htab->stub_bfd && htab->stub_bfd->sections)
16037 {
16038 asection* stub_sec;
16039
16040 for (stub_sec = htab->stub_bfd->sections;
16041 stub_sec != NULL;
16042 stub_sec = stub_sec->next)
16043 {
16044 /* Ignore non-stub sections. */
16045 if (!strstr (stub_sec->name, STUB_SUFFIX))
16046 continue;
16047
16048 osi.sec = stub_sec;
16049
16050 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16051 (output_bfd, osi.sec->output_section);
16052
16053 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
16054 }
16055 }
16056
16057 /* Finally, output mapping symbols for the PLT. */
16058 if (htab->root.splt && htab->root.splt->size > 0)
16059 {
16060 osi.sec = htab->root.splt;
16061 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
16062 (output_bfd, osi.sec->output_section));
16063
16064 /* Output mapping symbols for the plt header. SymbianOS does not have a
16065 plt header. */
16066 if (htab->vxworks_p)
16067 {
16068 /* VxWorks shared libraries have no PLT header. */
16069 if (!bfd_link_pic (info))
16070 {
16071 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16072 return FALSE;
16073 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
16074 return FALSE;
16075 }
16076 }
16077 else if (htab->nacl_p)
16078 {
16079 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16080 return FALSE;
16081 }
16082 else if (using_thumb_only (htab))
16083 {
16084 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
16085 return FALSE;
16086 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
16087 return FALSE;
16088 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
16089 return FALSE;
16090 }
16091 else if (!htab->symbian_p)
16092 {
16093 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16094 return FALSE;
16095 #ifndef FOUR_WORD_PLT
16096 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
16097 return FALSE;
16098 #endif
16099 }
16100 }
16101 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
16102 {
16103 /* NaCl uses a special first entry in .iplt too. */
16104 osi.sec = htab->root.iplt;
16105 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
16106 (output_bfd, osi.sec->output_section));
16107 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16108 return FALSE;
16109 }
16110 if ((htab->root.splt && htab->root.splt->size > 0)
16111 || (htab->root.iplt && htab->root.iplt->size > 0))
16112 {
16113 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
16114 for (input_bfd = info->input_bfds;
16115 input_bfd != NULL;
16116 input_bfd = input_bfd->link.next)
16117 {
16118 struct arm_local_iplt_info **local_iplt;
16119 unsigned int i, num_syms;
16120
16121 local_iplt = elf32_arm_local_iplt (input_bfd);
16122 if (local_iplt != NULL)
16123 {
16124 num_syms = elf_symtab_hdr (input_bfd).sh_info;
16125 for (i = 0; i < num_syms; i++)
16126 if (local_iplt[i] != NULL
16127 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
16128 &local_iplt[i]->root,
16129 &local_iplt[i]->arm))
16130 return FALSE;
16131 }
16132 }
16133 }
16134 if (htab->dt_tlsdesc_plt != 0)
16135 {
16136 /* Mapping symbols for the lazy tls trampoline. */
16137 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
16138 return FALSE;
16139
16140 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
16141 htab->dt_tlsdesc_plt + 24))
16142 return FALSE;
16143 }
16144 if (htab->tls_trampoline != 0)
16145 {
16146 /* Mapping symbols for the tls trampoline. */
16147 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
16148 return FALSE;
16149 #ifdef FOUR_WORD_PLT
16150 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
16151 htab->tls_trampoline + 12))
16152 return FALSE;
16153 #endif
16154 }
16155
16156 return TRUE;
16157 }
16158
16159 /* Allocate target specific section data. */
16160
16161 static bfd_boolean
16162 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
16163 {
16164 if (!sec->used_by_bfd)
16165 {
16166 _arm_elf_section_data *sdata;
16167 bfd_size_type amt = sizeof (*sdata);
16168
16169 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
16170 if (sdata == NULL)
16171 return FALSE;
16172 sec->used_by_bfd = sdata;
16173 }
16174
16175 return _bfd_elf_new_section_hook (abfd, sec);
16176 }
16177
16178
16179 /* Used to order a list of mapping symbols by address. */
16180
16181 static int
16182 elf32_arm_compare_mapping (const void * a, const void * b)
16183 {
16184 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
16185 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
16186
16187 if (amap->vma > bmap->vma)
16188 return 1;
16189 else if (amap->vma < bmap->vma)
16190 return -1;
16191 else if (amap->type > bmap->type)
16192 /* Ensure results do not depend on the host qsort for objects with
16193 multiple mapping symbols at the same address by sorting on type
16194 after vma. */
16195 return 1;
16196 else if (amap->type < bmap->type)
16197 return -1;
16198 else
16199 return 0;
16200 }
16201
16202 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
16203
16204 static unsigned long
16205 offset_prel31 (unsigned long addr, bfd_vma offset)
16206 {
16207 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
16208 }
16209
16210 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
16211 relocations. */
16212
16213 static void
16214 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
16215 {
16216 unsigned long first_word = bfd_get_32 (output_bfd, from);
16217 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
16218
16219 /* High bit of first word is supposed to be zero. */
16220 if ((first_word & 0x80000000ul) == 0)
16221 first_word = offset_prel31 (first_word, offset);
16222
16223 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
16224 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
16225 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
16226 second_word = offset_prel31 (second_word, offset);
16227
16228 bfd_put_32 (output_bfd, first_word, to);
16229 bfd_put_32 (output_bfd, second_word, to + 4);
16230 }
16231
16232 /* Data for make_branch_to_a8_stub(). */
16233
16234 struct a8_branch_to_stub_data
16235 {
16236 asection *writing_section;
16237 bfd_byte *contents;
16238 };
16239
16240
16241 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
16242 places for a particular section. */
16243
16244 static bfd_boolean
16245 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
16246 void *in_arg)
16247 {
16248 struct elf32_arm_stub_hash_entry *stub_entry;
16249 struct a8_branch_to_stub_data *data;
16250 bfd_byte *contents;
16251 unsigned long branch_insn;
16252 bfd_vma veneered_insn_loc, veneer_entry_loc;
16253 bfd_signed_vma branch_offset;
16254 bfd *abfd;
16255 unsigned int target;
16256
16257 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
16258 data = (struct a8_branch_to_stub_data *) in_arg;
16259
16260 if (stub_entry->target_section != data->writing_section
16261 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
16262 return TRUE;
16263
16264 contents = data->contents;
16265
16266 veneered_insn_loc = stub_entry->target_section->output_section->vma
16267 + stub_entry->target_section->output_offset
16268 + stub_entry->target_value;
16269
16270 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
16271 + stub_entry->stub_sec->output_offset
16272 + stub_entry->stub_offset;
16273
16274 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
16275 veneered_insn_loc &= ~3u;
16276
16277 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
16278
16279 abfd = stub_entry->target_section->owner;
16280 target = stub_entry->target_value;
16281
16282 /* We attempt to avoid this condition by setting stubs_always_after_branch
16283 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
16284 This check is just to be on the safe side... */
16285 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
16286 {
16287 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
16288 "allocated in unsafe location"), abfd);
16289 return FALSE;
16290 }
16291
16292 switch (stub_entry->stub_type)
16293 {
16294 case arm_stub_a8_veneer_b:
16295 case arm_stub_a8_veneer_b_cond:
16296 branch_insn = 0xf0009000;
16297 goto jump24;
16298
16299 case arm_stub_a8_veneer_blx:
16300 branch_insn = 0xf000e800;
16301 goto jump24;
16302
16303 case arm_stub_a8_veneer_bl:
16304 {
16305 unsigned int i1, j1, i2, j2, s;
16306
16307 branch_insn = 0xf000d000;
16308
16309 jump24:
16310 if (branch_offset < -16777216 || branch_offset > 16777214)
16311 {
16312 /* There's not much we can do apart from complain if this
16313 happens. */
16314 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
16315 "of range (input file too large)"), abfd);
16316 return FALSE;
16317 }
16318
16319 /* i1 = not(j1 eor s), so:
16320 not i1 = j1 eor s
16321 j1 = (not i1) eor s. */
16322
16323 branch_insn |= (branch_offset >> 1) & 0x7ff;
16324 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
16325 i2 = (branch_offset >> 22) & 1;
16326 i1 = (branch_offset >> 23) & 1;
16327 s = (branch_offset >> 24) & 1;
16328 j1 = (!i1) ^ s;
16329 j2 = (!i2) ^ s;
16330 branch_insn |= j2 << 11;
16331 branch_insn |= j1 << 13;
16332 branch_insn |= s << 26;
16333 }
16334 break;
16335
16336 default:
16337 BFD_FAIL ();
16338 return FALSE;
16339 }
16340
16341 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
16342 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
16343
16344 return TRUE;
16345 }
16346
16347 /* Beginning of stm32l4xx work-around. */
16348
16349 /* Functions encoding instructions necessary for the emission of the
16350 fix-stm32l4xx-629360.
16351 Encoding is extracted from the
16352 ARM (C) Architecture Reference Manual
16353 ARMv7-A and ARMv7-R edition
16354 ARM DDI 0406C.b (ID072512). */
16355
16356 static inline bfd_vma
16357 create_instruction_branch_absolute (int branch_offset)
16358 {
16359 /* A8.8.18 B (A8-334)
16360 B target_address (Encoding T4). */
16361 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
16362 /* jump offset is: S:I1:I2:imm10:imm11:0. */
16363 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
16364
16365 int s = ((branch_offset & 0x1000000) >> 24);
16366 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
16367 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
16368
16369 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
16370 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
16371
16372 bfd_vma patched_inst = 0xf0009000
16373 | s << 26 /* S. */
16374 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
16375 | j1 << 13 /* J1. */
16376 | j2 << 11 /* J2. */
16377 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
16378
16379 return patched_inst;
16380 }
16381
16382 static inline bfd_vma
16383 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
16384 {
16385 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
16386 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
16387 bfd_vma patched_inst = 0xe8900000
16388 | (/*W=*/wback << 21)
16389 | (base_reg << 16)
16390 | (reg_mask & 0x0000ffff);
16391
16392 return patched_inst;
16393 }
16394
16395 static inline bfd_vma
16396 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
16397 {
16398 /* A8.8.60 LDMDB/LDMEA (A8-402)
16399 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
16400 bfd_vma patched_inst = 0xe9100000
16401 | (/*W=*/wback << 21)
16402 | (base_reg << 16)
16403 | (reg_mask & 0x0000ffff);
16404
16405 return patched_inst;
16406 }
16407
16408 static inline bfd_vma
16409 create_instruction_mov (int target_reg, int source_reg)
16410 {
16411 /* A8.8.103 MOV (register) (A8-486)
16412 MOV Rd, Rm (Encoding T1). */
16413 bfd_vma patched_inst = 0x4600
16414 | (target_reg & 0x7)
16415 | ((target_reg & 0x8) >> 3) << 7
16416 | (source_reg << 3);
16417
16418 return patched_inst;
16419 }
16420
16421 static inline bfd_vma
16422 create_instruction_sub (int target_reg, int source_reg, int value)
16423 {
16424 /* A8.8.221 SUB (immediate) (A8-708)
16425 SUB Rd, Rn, #value (Encoding T3). */
16426 bfd_vma patched_inst = 0xf1a00000
16427 | (target_reg << 8)
16428 | (source_reg << 16)
16429 | (/*S=*/0 << 20)
16430 | ((value & 0x800) >> 11) << 26
16431 | ((value & 0x700) >> 8) << 12
16432 | (value & 0x0ff);
16433
16434 return patched_inst;
16435 }
16436
16437 static inline bfd_vma
16438 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
16439 int first_reg)
16440 {
16441 /* A8.8.332 VLDM (A8-922)
16442 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
16443 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
16444 | (/*W=*/wback << 21)
16445 | (base_reg << 16)
16446 | (num_words & 0x000000ff)
16447 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
16448 | (first_reg & 0x00000001) << 22;
16449
16450 return patched_inst;
16451 }
16452
16453 static inline bfd_vma
16454 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
16455 int first_reg)
16456 {
16457 /* A8.8.332 VLDM (A8-922)
16458 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
16459 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
16460 | (base_reg << 16)
16461 | (num_words & 0x000000ff)
16462 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
16463 | (first_reg & 0x00000001) << 22;
16464
16465 return patched_inst;
16466 }
16467
16468 static inline bfd_vma
16469 create_instruction_udf_w (int value)
16470 {
16471 /* A8.8.247 UDF (A8-758)
16472 Undefined (Encoding T2). */
16473 bfd_vma patched_inst = 0xf7f0a000
16474 | (value & 0x00000fff)
16475 | (value & 0x000f0000) << 16;
16476
16477 return patched_inst;
16478 }
16479
16480 static inline bfd_vma
16481 create_instruction_udf (int value)
16482 {
16483 /* A8.8.247 UDF (A8-758)
16484 Undefined (Encoding T1). */
16485 bfd_vma patched_inst = 0xde00
16486 | (value & 0xff);
16487
16488 return patched_inst;
16489 }
16490
16491 /* Functions writing an instruction in memory, returning the next
16492 memory position to write to. */
16493
16494 static inline bfd_byte *
16495 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
16496 bfd * output_bfd, bfd_byte *pt, insn32 insn)
16497 {
16498 put_thumb2_insn (htab, output_bfd, insn, pt);
16499 return pt + 4;
16500 }
16501
16502 static inline bfd_byte *
16503 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
16504 bfd * output_bfd, bfd_byte *pt, insn32 insn)
16505 {
16506 put_thumb_insn (htab, output_bfd, insn, pt);
16507 return pt + 2;
16508 }
16509
16510 /* Function filling up a region in memory with T1 and T2 UDFs taking
16511 care of alignment. */
16512
16513 static bfd_byte *
16514 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
16515 bfd * output_bfd,
16516 const bfd_byte * const base_stub_contents,
16517 bfd_byte * const from_stub_contents,
16518 const bfd_byte * const end_stub_contents)
16519 {
16520 bfd_byte *current_stub_contents = from_stub_contents;
16521
16522 /* Fill the remaining of the stub with deterministic contents : UDF
16523 instructions.
16524 Check if realignment is needed on modulo 4 frontier using T1, to
16525 further use T2. */
16526 if ((current_stub_contents < end_stub_contents)
16527 && !((current_stub_contents - base_stub_contents) % 2)
16528 && ((current_stub_contents - base_stub_contents) % 4))
16529 current_stub_contents =
16530 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16531 create_instruction_udf (0));
16532
16533 for (; current_stub_contents < end_stub_contents;)
16534 current_stub_contents =
16535 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16536 create_instruction_udf_w (0));
16537
16538 return current_stub_contents;
16539 }
16540
16541 /* Functions writing the stream of instructions equivalent to the
16542 derived sequence for ldmia, ldmdb, vldm respectively. */
16543
16544 static void
16545 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
16546 bfd * output_bfd,
16547 const insn32 initial_insn,
16548 const bfd_byte *const initial_insn_addr,
16549 bfd_byte *const base_stub_contents)
16550 {
16551 int wback = (initial_insn & 0x00200000) >> 21;
16552 int ri, rn = (initial_insn & 0x000F0000) >> 16;
16553 int insn_all_registers = initial_insn & 0x0000ffff;
16554 int insn_low_registers, insn_high_registers;
16555 int usable_register_mask;
16556 int nb_registers = popcount (insn_all_registers);
16557 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
16558 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
16559 bfd_byte *current_stub_contents = base_stub_contents;
16560
16561 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
16562
16563 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16564 smaller than 8 registers load sequences that do not cause the
16565 hardware issue. */
16566 if (nb_registers <= 8)
16567 {
16568 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16569 current_stub_contents =
16570 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16571 initial_insn);
16572
16573 /* B initial_insn_addr+4. */
16574 if (!restore_pc)
16575 current_stub_contents =
16576 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16577 create_instruction_branch_absolute
16578 (initial_insn_addr - current_stub_contents));
16579
16580
16581 /* Fill the remaining of the stub with deterministic contents. */
16582 current_stub_contents =
16583 stm32l4xx_fill_stub_udf (htab, output_bfd,
16584 base_stub_contents, current_stub_contents,
16585 base_stub_contents +
16586 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16587
16588 return;
16589 }
16590
16591 /* - reg_list[13] == 0. */
16592 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
16593
16594 /* - reg_list[14] & reg_list[15] != 1. */
16595 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
16596
16597 /* - if (wback==1) reg_list[rn] == 0. */
16598 BFD_ASSERT (!wback || !restore_rn);
16599
16600 /* - nb_registers > 8. */
16601 BFD_ASSERT (popcount (insn_all_registers) > 8);
16602
16603 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16604
16605 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
16606 - One with the 7 lowest registers (register mask 0x007F)
16607 This LDM will finally contain between 2 and 7 registers
16608 - One with the 7 highest registers (register mask 0xDF80)
16609 This ldm will finally contain between 2 and 7 registers. */
16610 insn_low_registers = insn_all_registers & 0x007F;
16611 insn_high_registers = insn_all_registers & 0xDF80;
16612
16613 /* A spare register may be needed during this veneer to temporarily
16614 handle the base register. This register will be restored with the
16615 last LDM operation.
16616 The usable register may be any general purpose register (that
16617 excludes PC, SP, LR : register mask is 0x1FFF). */
16618 usable_register_mask = 0x1FFF;
16619
16620 /* Generate the stub function. */
16621 if (wback)
16622 {
16623 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
16624 current_stub_contents =
16625 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16626 create_instruction_ldmia
16627 (rn, /*wback=*/1, insn_low_registers));
16628
16629 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
16630 current_stub_contents =
16631 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16632 create_instruction_ldmia
16633 (rn, /*wback=*/1, insn_high_registers));
16634 if (!restore_pc)
16635 {
16636 /* B initial_insn_addr+4. */
16637 current_stub_contents =
16638 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16639 create_instruction_branch_absolute
16640 (initial_insn_addr - current_stub_contents));
16641 }
16642 }
16643 else /* if (!wback). */
16644 {
16645 ri = rn;
16646
16647 /* If Rn is not part of the high-register-list, move it there. */
16648 if (!(insn_high_registers & (1 << rn)))
16649 {
16650 /* Choose a Ri in the high-register-list that will be restored. */
16651 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16652
16653 /* MOV Ri, Rn. */
16654 current_stub_contents =
16655 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16656 create_instruction_mov (ri, rn));
16657 }
16658
16659 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
16660 current_stub_contents =
16661 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16662 create_instruction_ldmia
16663 (ri, /*wback=*/1, insn_low_registers));
16664
16665 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
16666 current_stub_contents =
16667 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16668 create_instruction_ldmia
16669 (ri, /*wback=*/0, insn_high_registers));
16670
16671 if (!restore_pc)
16672 {
16673 /* B initial_insn_addr+4. */
16674 current_stub_contents =
16675 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16676 create_instruction_branch_absolute
16677 (initial_insn_addr - current_stub_contents));
16678 }
16679 }
16680
16681 /* Fill the remaining of the stub with deterministic contents. */
16682 current_stub_contents =
16683 stm32l4xx_fill_stub_udf (htab, output_bfd,
16684 base_stub_contents, current_stub_contents,
16685 base_stub_contents +
16686 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16687 }
16688
16689 static void
16690 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
16691 bfd * output_bfd,
16692 const insn32 initial_insn,
16693 const bfd_byte *const initial_insn_addr,
16694 bfd_byte *const base_stub_contents)
16695 {
16696 int wback = (initial_insn & 0x00200000) >> 21;
16697 int ri, rn = (initial_insn & 0x000f0000) >> 16;
16698 int insn_all_registers = initial_insn & 0x0000ffff;
16699 int insn_low_registers, insn_high_registers;
16700 int usable_register_mask;
16701 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
16702 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
16703 int nb_registers = popcount (insn_all_registers);
16704 bfd_byte *current_stub_contents = base_stub_contents;
16705
16706 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
16707
16708 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16709 smaller than 8 registers load sequences that do not cause the
16710 hardware issue. */
16711 if (nb_registers <= 8)
16712 {
16713 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16714 current_stub_contents =
16715 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16716 initial_insn);
16717
16718 /* B initial_insn_addr+4. */
16719 current_stub_contents =
16720 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16721 create_instruction_branch_absolute
16722 (initial_insn_addr - current_stub_contents));
16723
16724 /* Fill the remaining of the stub with deterministic contents. */
16725 current_stub_contents =
16726 stm32l4xx_fill_stub_udf (htab, output_bfd,
16727 base_stub_contents, current_stub_contents,
16728 base_stub_contents +
16729 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16730
16731 return;
16732 }
16733
16734 /* - reg_list[13] == 0. */
16735 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
16736
16737 /* - reg_list[14] & reg_list[15] != 1. */
16738 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
16739
16740 /* - if (wback==1) reg_list[rn] == 0. */
16741 BFD_ASSERT (!wback || !restore_rn);
16742
16743 /* - nb_registers > 8. */
16744 BFD_ASSERT (popcount (insn_all_registers) > 8);
16745
16746 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16747
16748 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
16749 - One with the 7 lowest registers (register mask 0x007F)
16750 This LDM will finally contain between 2 and 7 registers
16751 - One with the 7 highest registers (register mask 0xDF80)
16752 This ldm will finally contain between 2 and 7 registers. */
16753 insn_low_registers = insn_all_registers & 0x007F;
16754 insn_high_registers = insn_all_registers & 0xDF80;
16755
16756 /* A spare register may be needed during this veneer to temporarily
16757 handle the base register. This register will be restored with
16758 the last LDM operation.
16759 The usable register may be any general purpose register (that excludes
16760 PC, SP, LR : register mask is 0x1FFF). */
16761 usable_register_mask = 0x1FFF;
16762
16763 /* Generate the stub function. */
16764 if (!wback && !restore_pc && !restore_rn)
16765 {
16766 /* Choose a Ri in the low-register-list that will be restored. */
16767 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
16768
16769 /* MOV Ri, Rn. */
16770 current_stub_contents =
16771 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16772 create_instruction_mov (ri, rn));
16773
16774 /* LDMDB Ri!, {R-high-register-list}. */
16775 current_stub_contents =
16776 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16777 create_instruction_ldmdb
16778 (ri, /*wback=*/1, insn_high_registers));
16779
16780 /* LDMDB Ri, {R-low-register-list}. */
16781 current_stub_contents =
16782 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16783 create_instruction_ldmdb
16784 (ri, /*wback=*/0, insn_low_registers));
16785
16786 /* B initial_insn_addr+4. */
16787 current_stub_contents =
16788 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16789 create_instruction_branch_absolute
16790 (initial_insn_addr - current_stub_contents));
16791 }
16792 else if (wback && !restore_pc && !restore_rn)
16793 {
16794 /* LDMDB Rn!, {R-high-register-list}. */
16795 current_stub_contents =
16796 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16797 create_instruction_ldmdb
16798 (rn, /*wback=*/1, insn_high_registers));
16799
16800 /* LDMDB Rn!, {R-low-register-list}. */
16801 current_stub_contents =
16802 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16803 create_instruction_ldmdb
16804 (rn, /*wback=*/1, insn_low_registers));
16805
16806 /* B initial_insn_addr+4. */
16807 current_stub_contents =
16808 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16809 create_instruction_branch_absolute
16810 (initial_insn_addr - current_stub_contents));
16811 }
16812 else if (!wback && restore_pc && !restore_rn)
16813 {
16814 /* Choose a Ri in the high-register-list that will be restored. */
16815 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16816
16817 /* SUB Ri, Rn, #(4*nb_registers). */
16818 current_stub_contents =
16819 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16820 create_instruction_sub (ri, rn, (4 * nb_registers)));
16821
16822 /* LDMIA Ri!, {R-low-register-list}. */
16823 current_stub_contents =
16824 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16825 create_instruction_ldmia
16826 (ri, /*wback=*/1, insn_low_registers));
16827
16828 /* LDMIA Ri, {R-high-register-list}. */
16829 current_stub_contents =
16830 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16831 create_instruction_ldmia
16832 (ri, /*wback=*/0, insn_high_registers));
16833 }
16834 else if (wback && restore_pc && !restore_rn)
16835 {
16836 /* Choose a Ri in the high-register-list that will be restored. */
16837 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16838
16839 /* SUB Rn, Rn, #(4*nb_registers) */
16840 current_stub_contents =
16841 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16842 create_instruction_sub (rn, rn, (4 * nb_registers)));
16843
16844 /* MOV Ri, Rn. */
16845 current_stub_contents =
16846 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16847 create_instruction_mov (ri, rn));
16848
16849 /* LDMIA Ri!, {R-low-register-list}. */
16850 current_stub_contents =
16851 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16852 create_instruction_ldmia
16853 (ri, /*wback=*/1, insn_low_registers));
16854
16855 /* LDMIA Ri, {R-high-register-list}. */
16856 current_stub_contents =
16857 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16858 create_instruction_ldmia
16859 (ri, /*wback=*/0, insn_high_registers));
16860 }
16861 else if (!wback && !restore_pc && restore_rn)
16862 {
16863 ri = rn;
16864 if (!(insn_low_registers & (1 << rn)))
16865 {
16866 /* Choose a Ri in the low-register-list that will be restored. */
16867 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
16868
16869 /* MOV Ri, Rn. */
16870 current_stub_contents =
16871 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16872 create_instruction_mov (ri, rn));
16873 }
16874
16875 /* LDMDB Ri!, {R-high-register-list}. */
16876 current_stub_contents =
16877 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16878 create_instruction_ldmdb
16879 (ri, /*wback=*/1, insn_high_registers));
16880
16881 /* LDMDB Ri, {R-low-register-list}. */
16882 current_stub_contents =
16883 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16884 create_instruction_ldmdb
16885 (ri, /*wback=*/0, insn_low_registers));
16886
16887 /* B initial_insn_addr+4. */
16888 current_stub_contents =
16889 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16890 create_instruction_branch_absolute
16891 (initial_insn_addr - current_stub_contents));
16892 }
16893 else if (!wback && restore_pc && restore_rn)
16894 {
16895 ri = rn;
16896 if (!(insn_high_registers & (1 << rn)))
16897 {
16898 /* Choose a Ri in the high-register-list that will be restored. */
16899 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16900 }
16901
16902 /* SUB Ri, Rn, #(4*nb_registers). */
16903 current_stub_contents =
16904 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16905 create_instruction_sub (ri, rn, (4 * nb_registers)));
16906
16907 /* LDMIA Ri!, {R-low-register-list}. */
16908 current_stub_contents =
16909 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16910 create_instruction_ldmia
16911 (ri, /*wback=*/1, insn_low_registers));
16912
16913 /* LDMIA Ri, {R-high-register-list}. */
16914 current_stub_contents =
16915 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16916 create_instruction_ldmia
16917 (ri, /*wback=*/0, insn_high_registers));
16918 }
16919 else if (wback && restore_rn)
16920 {
16921 /* The assembler should not have accepted to encode this. */
16922 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
16923 "undefined behavior.\n");
16924 }
16925
16926 /* Fill the remaining of the stub with deterministic contents. */
16927 current_stub_contents =
16928 stm32l4xx_fill_stub_udf (htab, output_bfd,
16929 base_stub_contents, current_stub_contents,
16930 base_stub_contents +
16931 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16932
16933 }
16934
16935 static void
16936 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
16937 bfd * output_bfd,
16938 const insn32 initial_insn,
16939 const bfd_byte *const initial_insn_addr,
16940 bfd_byte *const base_stub_contents)
16941 {
16942 int num_words = ((unsigned int) initial_insn << 24) >> 24;
16943 bfd_byte *current_stub_contents = base_stub_contents;
16944
16945 BFD_ASSERT (is_thumb2_vldm (initial_insn));
16946
16947 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16948 smaller than 8 words load sequences that do not cause the
16949 hardware issue. */
16950 if (num_words <= 8)
16951 {
16952 /* Untouched instruction. */
16953 current_stub_contents =
16954 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16955 initial_insn);
16956
16957 /* B initial_insn_addr+4. */
16958 current_stub_contents =
16959 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16960 create_instruction_branch_absolute
16961 (initial_insn_addr - current_stub_contents));
16962 }
16963 else
16964 {
16965 bfd_boolean is_dp = /* DP encoding. */
16966 (initial_insn & 0xfe100f00) == 0xec100b00;
16967 bfd_boolean is_ia_nobang = /* (IA without !). */
16968 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
16969 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
16970 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
16971 bfd_boolean is_db_bang = /* (DB with !). */
16972 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
16973 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
16974 /* d = UInt (Vd:D);. */
16975 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
16976 | (((unsigned int)initial_insn << 9) >> 31);
16977
16978 /* Compute the number of 8-words chunks needed to split. */
16979 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
16980 int chunk;
16981
16982 /* The test coverage has been done assuming the following
16983 hypothesis that exactly one of the previous is_ predicates is
16984 true. */
16985 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
16986 && !(is_ia_nobang & is_ia_bang & is_db_bang));
16987
16988 /* We treat the cutting of the words in one pass for all
16989 cases, then we emit the adjustments:
16990
16991 vldm rx, {...}
16992 -> vldm rx!, {8_words_or_less} for each needed 8_word
16993 -> sub rx, rx, #size (list)
16994
16995 vldm rx!, {...}
16996 -> vldm rx!, {8_words_or_less} for each needed 8_word
16997 This also handles vpop instruction (when rx is sp)
16998
16999 vldmd rx!, {...}
17000 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
17001 for (chunk = 0; chunk < chunks; ++chunk)
17002 {
17003 bfd_vma new_insn = 0;
17004
17005 if (is_ia_nobang || is_ia_bang)
17006 {
17007 new_insn = create_instruction_vldmia
17008 (base_reg,
17009 is_dp,
17010 /*wback= . */1,
17011 chunks - (chunk + 1) ?
17012 8 : num_words - chunk * 8,
17013 first_reg + chunk * 8);
17014 }
17015 else if (is_db_bang)
17016 {
17017 new_insn = create_instruction_vldmdb
17018 (base_reg,
17019 is_dp,
17020 chunks - (chunk + 1) ?
17021 8 : num_words - chunk * 8,
17022 first_reg + chunk * 8);
17023 }
17024
17025 if (new_insn)
17026 current_stub_contents =
17027 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17028 new_insn);
17029 }
17030
17031 /* Only this case requires the base register compensation
17032 subtract. */
17033 if (is_ia_nobang)
17034 {
17035 current_stub_contents =
17036 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17037 create_instruction_sub
17038 (base_reg, base_reg, 4*num_words));
17039 }
17040
17041 /* B initial_insn_addr+4. */
17042 current_stub_contents =
17043 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17044 create_instruction_branch_absolute
17045 (initial_insn_addr - current_stub_contents));
17046 }
17047
17048 /* Fill the remaining of the stub with deterministic contents. */
17049 current_stub_contents =
17050 stm32l4xx_fill_stub_udf (htab, output_bfd,
17051 base_stub_contents, current_stub_contents,
17052 base_stub_contents +
17053 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
17054 }
17055
17056 static void
17057 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
17058 bfd * output_bfd,
17059 const insn32 wrong_insn,
17060 const bfd_byte *const wrong_insn_addr,
17061 bfd_byte *const stub_contents)
17062 {
17063 if (is_thumb2_ldmia (wrong_insn))
17064 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
17065 wrong_insn, wrong_insn_addr,
17066 stub_contents);
17067 else if (is_thumb2_ldmdb (wrong_insn))
17068 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
17069 wrong_insn, wrong_insn_addr,
17070 stub_contents);
17071 else if (is_thumb2_vldm (wrong_insn))
17072 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
17073 wrong_insn, wrong_insn_addr,
17074 stub_contents);
17075 }
17076
17077 /* End of stm32l4xx work-around. */
17078
17079
17080 static void
17081 elf32_arm_add_relocation (bfd *output_bfd, struct bfd_link_info *info,
17082 asection *output_sec, Elf_Internal_Rela *rel)
17083 {
17084 BFD_ASSERT (output_sec && rel);
17085 struct bfd_elf_section_reloc_data *output_reldata;
17086 struct elf32_arm_link_hash_table *htab;
17087 struct bfd_elf_section_data *oesd = elf_section_data (output_sec);
17088 Elf_Internal_Shdr *rel_hdr;
17089
17090
17091 if (oesd->rel.hdr)
17092 {
17093 rel_hdr = oesd->rel.hdr;
17094 output_reldata = &(oesd->rel);
17095 }
17096 else if (oesd->rela.hdr)
17097 {
17098 rel_hdr = oesd->rela.hdr;
17099 output_reldata = &(oesd->rela);
17100 }
17101 else
17102 {
17103 abort ();
17104 }
17105
17106 bfd_byte *erel = rel_hdr->contents;
17107 erel += output_reldata->count * rel_hdr->sh_entsize;
17108 htab = elf32_arm_hash_table (info);
17109 SWAP_RELOC_OUT (htab) (output_bfd, rel, erel);
17110 output_reldata->count++;
17111 }
17112
17113 /* Do code byteswapping. Return FALSE afterwards so that the section is
17114 written out as normal. */
17115
17116 static bfd_boolean
17117 elf32_arm_write_section (bfd *output_bfd,
17118 struct bfd_link_info *link_info,
17119 asection *sec,
17120 bfd_byte *contents)
17121 {
17122 unsigned int mapcount, errcount;
17123 _arm_elf_section_data *arm_data;
17124 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
17125 elf32_arm_section_map *map;
17126 elf32_vfp11_erratum_list *errnode;
17127 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
17128 bfd_vma ptr;
17129 bfd_vma end;
17130 bfd_vma offset = sec->output_section->vma + sec->output_offset;
17131 bfd_byte tmp;
17132 unsigned int i;
17133
17134 if (globals == NULL)
17135 return FALSE;
17136
17137 /* If this section has not been allocated an _arm_elf_section_data
17138 structure then we cannot record anything. */
17139 arm_data = get_arm_elf_section_data (sec);
17140 if (arm_data == NULL)
17141 return FALSE;
17142
17143 mapcount = arm_data->mapcount;
17144 map = arm_data->map;
17145 errcount = arm_data->erratumcount;
17146
17147 if (errcount != 0)
17148 {
17149 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
17150
17151 for (errnode = arm_data->erratumlist; errnode != 0;
17152 errnode = errnode->next)
17153 {
17154 bfd_vma target = errnode->vma - offset;
17155
17156 switch (errnode->type)
17157 {
17158 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
17159 {
17160 bfd_vma branch_to_veneer;
17161 /* Original condition code of instruction, plus bit mask for
17162 ARM B instruction. */
17163 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
17164 | 0x0a000000;
17165
17166 /* The instruction is before the label. */
17167 target -= 4;
17168
17169 /* Above offset included in -4 below. */
17170 branch_to_veneer = errnode->u.b.veneer->vma
17171 - errnode->vma - 4;
17172
17173 if ((signed) branch_to_veneer < -(1 << 25)
17174 || (signed) branch_to_veneer >= (1 << 25))
17175 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
17176 "range"), output_bfd);
17177
17178 insn |= (branch_to_veneer >> 2) & 0xffffff;
17179 contents[endianflip ^ target] = insn & 0xff;
17180 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
17181 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
17182 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
17183 }
17184 break;
17185
17186 case VFP11_ERRATUM_ARM_VENEER:
17187 {
17188 bfd_vma branch_from_veneer;
17189 unsigned int insn;
17190
17191 /* Take size of veneer into account. */
17192 branch_from_veneer = errnode->u.v.branch->vma
17193 - errnode->vma - 12;
17194
17195 if ((signed) branch_from_veneer < -(1 << 25)
17196 || (signed) branch_from_veneer >= (1 << 25))
17197 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
17198 "range"), output_bfd);
17199
17200 /* Original instruction. */
17201 insn = errnode->u.v.branch->u.b.vfp_insn;
17202 contents[endianflip ^ target] = insn & 0xff;
17203 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
17204 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
17205 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
17206
17207 /* Branch back to insn after original insn. */
17208 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
17209 contents[endianflip ^ (target + 4)] = insn & 0xff;
17210 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
17211 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
17212 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
17213 }
17214 break;
17215
17216 default:
17217 abort ();
17218 }
17219 }
17220 }
17221
17222 if (arm_data->stm32l4xx_erratumcount != 0)
17223 {
17224 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
17225 stm32l4xx_errnode != 0;
17226 stm32l4xx_errnode = stm32l4xx_errnode->next)
17227 {
17228 bfd_vma target = stm32l4xx_errnode->vma - offset;
17229
17230 switch (stm32l4xx_errnode->type)
17231 {
17232 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
17233 {
17234 unsigned int insn;
17235 bfd_vma branch_to_veneer =
17236 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
17237
17238 if ((signed) branch_to_veneer < -(1 << 24)
17239 || (signed) branch_to_veneer >= (1 << 24))
17240 {
17241 bfd_vma out_of_range =
17242 ((signed) branch_to_veneer < -(1 << 24)) ?
17243 - branch_to_veneer - (1 << 24) :
17244 ((signed) branch_to_veneer >= (1 << 24)) ?
17245 branch_to_veneer - (1 << 24) : 0;
17246
17247 (*_bfd_error_handler)
17248 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
17249 "Jump out of range by %ld bytes. "
17250 "Cannot encode branch instruction. "),
17251 output_bfd,
17252 (long) (stm32l4xx_errnode->vma - 4),
17253 out_of_range);
17254 continue;
17255 }
17256
17257 insn = create_instruction_branch_absolute
17258 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
17259
17260 /* The instruction is before the label. */
17261 target -= 4;
17262
17263 put_thumb2_insn (globals, output_bfd,
17264 (bfd_vma) insn, contents + target);
17265 }
17266 break;
17267
17268 case STM32L4XX_ERRATUM_VENEER:
17269 {
17270 bfd_byte * veneer;
17271 bfd_byte * veneer_r;
17272 unsigned int insn;
17273
17274 veneer = contents + target;
17275 veneer_r = veneer
17276 + stm32l4xx_errnode->u.b.veneer->vma
17277 - stm32l4xx_errnode->vma - 4;
17278
17279 if ((signed) (veneer_r - veneer -
17280 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
17281 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
17282 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
17283 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
17284 || (signed) (veneer_r - veneer) >= (1 << 24))
17285 {
17286 (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX "
17287 "veneer."), output_bfd);
17288 continue;
17289 }
17290
17291 /* Original instruction. */
17292 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
17293
17294 stm32l4xx_create_replacing_stub
17295 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
17296 }
17297 break;
17298
17299 default:
17300 abort ();
17301 }
17302 }
17303 }
17304
17305 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
17306 {
17307 arm_unwind_table_edit *edit_node
17308 = arm_data->u.exidx.unwind_edit_list;
17309 /* Now, sec->size is the size of the section we will write. The original
17310 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
17311 markers) was sec->rawsize. (This isn't the case if we perform no
17312 edits, then rawsize will be zero and we should use size). */
17313 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
17314 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
17315 unsigned int in_index, out_index;
17316 bfd_vma add_to_offsets = 0;
17317
17318 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
17319 {
17320 if (edit_node)
17321 {
17322 unsigned int edit_index = edit_node->index;
17323
17324 if (in_index < edit_index && in_index * 8 < input_size)
17325 {
17326 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
17327 contents + in_index * 8, add_to_offsets);
17328 out_index++;
17329 in_index++;
17330 }
17331 else if (in_index == edit_index
17332 || (in_index * 8 >= input_size
17333 && edit_index == UINT_MAX))
17334 {
17335 switch (edit_node->type)
17336 {
17337 case DELETE_EXIDX_ENTRY:
17338 in_index++;
17339 add_to_offsets += 8;
17340 break;
17341
17342 case INSERT_EXIDX_CANTUNWIND_AT_END:
17343 {
17344 asection *text_sec = edit_node->linked_section;
17345 bfd_vma text_offset = text_sec->output_section->vma
17346 + text_sec->output_offset
17347 + text_sec->size;
17348 bfd_vma exidx_offset = offset + out_index * 8;
17349 unsigned long prel31_offset;
17350
17351 /* Note: this is meant to be equivalent to an
17352 R_ARM_PREL31 relocation. These synthetic
17353 EXIDX_CANTUNWIND markers are not relocated by the
17354 usual BFD method. */
17355 prel31_offset = (text_offset - exidx_offset)
17356 & 0x7ffffffful;
17357 if (bfd_link_relocatable (link_info))
17358 {
17359 /* Here relocation for new EXIDX_CANTUNWIND is
17360 created, so there is no need to
17361 adjust offset by hand. */
17362 prel31_offset = text_sec->output_offset
17363 + text_sec->size;
17364
17365 /* New relocation entity. */
17366 asection *text_out = text_sec->output_section;
17367 Elf_Internal_Rela rel;
17368 rel.r_addend = 0;
17369 rel.r_offset = exidx_offset;
17370 rel.r_info = ELF32_R_INFO (text_out->target_index,
17371 R_ARM_PREL31);
17372
17373 elf32_arm_add_relocation (output_bfd, link_info,
17374 sec->output_section,
17375 &rel);
17376 }
17377
17378 /* First address we can't unwind. */
17379 bfd_put_32 (output_bfd, prel31_offset,
17380 &edited_contents[out_index * 8]);
17381
17382 /* Code for EXIDX_CANTUNWIND. */
17383 bfd_put_32 (output_bfd, 0x1,
17384 &edited_contents[out_index * 8 + 4]);
17385
17386 out_index++;
17387 add_to_offsets -= 8;
17388 }
17389 break;
17390 }
17391
17392 edit_node = edit_node->next;
17393 }
17394 }
17395 else
17396 {
17397 /* No more edits, copy remaining entries verbatim. */
17398 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
17399 contents + in_index * 8, add_to_offsets);
17400 out_index++;
17401 in_index++;
17402 }
17403 }
17404
17405 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
17406 bfd_set_section_contents (output_bfd, sec->output_section,
17407 edited_contents,
17408 (file_ptr) sec->output_offset, sec->size);
17409
17410 return TRUE;
17411 }
17412
17413 /* Fix code to point to Cortex-A8 erratum stubs. */
17414 if (globals->fix_cortex_a8)
17415 {
17416 struct a8_branch_to_stub_data data;
17417
17418 data.writing_section = sec;
17419 data.contents = contents;
17420
17421 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
17422 & data);
17423 }
17424
17425 if (mapcount == 0)
17426 return FALSE;
17427
17428 if (globals->byteswap_code)
17429 {
17430 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
17431
17432 ptr = map[0].vma;
17433 for (i = 0; i < mapcount; i++)
17434 {
17435 if (i == mapcount - 1)
17436 end = sec->size;
17437 else
17438 end = map[i + 1].vma;
17439
17440 switch (map[i].type)
17441 {
17442 case 'a':
17443 /* Byte swap code words. */
17444 while (ptr + 3 < end)
17445 {
17446 tmp = contents[ptr];
17447 contents[ptr] = contents[ptr + 3];
17448 contents[ptr + 3] = tmp;
17449 tmp = contents[ptr + 1];
17450 contents[ptr + 1] = contents[ptr + 2];
17451 contents[ptr + 2] = tmp;
17452 ptr += 4;
17453 }
17454 break;
17455
17456 case 't':
17457 /* Byte swap code halfwords. */
17458 while (ptr + 1 < end)
17459 {
17460 tmp = contents[ptr];
17461 contents[ptr] = contents[ptr + 1];
17462 contents[ptr + 1] = tmp;
17463 ptr += 2;
17464 }
17465 break;
17466
17467 case 'd':
17468 /* Leave data alone. */
17469 break;
17470 }
17471 ptr = end;
17472 }
17473 }
17474
17475 free (map);
17476 arm_data->mapcount = -1;
17477 arm_data->mapsize = 0;
17478 arm_data->map = NULL;
17479
17480 return FALSE;
17481 }
17482
17483 /* Mangle thumb function symbols as we read them in. */
17484
17485 static bfd_boolean
17486 elf32_arm_swap_symbol_in (bfd * abfd,
17487 const void *psrc,
17488 const void *pshn,
17489 Elf_Internal_Sym *dst)
17490 {
17491 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
17492 return FALSE;
17493
17494 /* New EABI objects mark thumb function symbols by setting the low bit of
17495 the address. */
17496 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
17497 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
17498 {
17499 if (dst->st_value & 1)
17500 {
17501 dst->st_value &= ~(bfd_vma) 1;
17502 dst->st_target_internal = ST_BRANCH_TO_THUMB;
17503 }
17504 else
17505 dst->st_target_internal = ST_BRANCH_TO_ARM;
17506 }
17507 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
17508 {
17509 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
17510 dst->st_target_internal = ST_BRANCH_TO_THUMB;
17511 }
17512 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
17513 dst->st_target_internal = ST_BRANCH_LONG;
17514 else
17515 dst->st_target_internal = ST_BRANCH_UNKNOWN;
17516
17517 return TRUE;
17518 }
17519
17520
17521 /* Mangle thumb function symbols as we write them out. */
17522
17523 static void
17524 elf32_arm_swap_symbol_out (bfd *abfd,
17525 const Elf_Internal_Sym *src,
17526 void *cdst,
17527 void *shndx)
17528 {
17529 Elf_Internal_Sym newsym;
17530
17531 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
17532 of the address set, as per the new EABI. We do this unconditionally
17533 because objcopy does not set the elf header flags until after
17534 it writes out the symbol table. */
17535 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
17536 {
17537 newsym = *src;
17538 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
17539 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
17540 if (newsym.st_shndx != SHN_UNDEF)
17541 {
17542 /* Do this only for defined symbols. At link type, the static
17543 linker will simulate the work of dynamic linker of resolving
17544 symbols and will carry over the thumbness of found symbols to
17545 the output symbol table. It's not clear how it happens, but
17546 the thumbness of undefined symbols can well be different at
17547 runtime, and writing '1' for them will be confusing for users
17548 and possibly for dynamic linker itself.
17549 */
17550 newsym.st_value |= 1;
17551 }
17552
17553 src = &newsym;
17554 }
17555 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
17556 }
17557
17558 /* Add the PT_ARM_EXIDX program header. */
17559
17560 static bfd_boolean
17561 elf32_arm_modify_segment_map (bfd *abfd,
17562 struct bfd_link_info *info ATTRIBUTE_UNUSED)
17563 {
17564 struct elf_segment_map *m;
17565 asection *sec;
17566
17567 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
17568 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
17569 {
17570 /* If there is already a PT_ARM_EXIDX header, then we do not
17571 want to add another one. This situation arises when running
17572 "strip"; the input binary already has the header. */
17573 m = elf_seg_map (abfd);
17574 while (m && m->p_type != PT_ARM_EXIDX)
17575 m = m->next;
17576 if (!m)
17577 {
17578 m = (struct elf_segment_map *)
17579 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
17580 if (m == NULL)
17581 return FALSE;
17582 m->p_type = PT_ARM_EXIDX;
17583 m->count = 1;
17584 m->sections[0] = sec;
17585
17586 m->next = elf_seg_map (abfd);
17587 elf_seg_map (abfd) = m;
17588 }
17589 }
17590
17591 return TRUE;
17592 }
17593
17594 /* We may add a PT_ARM_EXIDX program header. */
17595
17596 static int
17597 elf32_arm_additional_program_headers (bfd *abfd,
17598 struct bfd_link_info *info ATTRIBUTE_UNUSED)
17599 {
17600 asection *sec;
17601
17602 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
17603 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
17604 return 1;
17605 else
17606 return 0;
17607 }
17608
17609 /* Hook called by the linker routine which adds symbols from an object
17610 file. */
17611
17612 static bfd_boolean
17613 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
17614 Elf_Internal_Sym *sym, const char **namep,
17615 flagword *flagsp, asection **secp, bfd_vma *valp)
17616 {
17617 if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
17618 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)
17619 && (abfd->flags & DYNAMIC) == 0
17620 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
17621 elf_tdata (info->output_bfd)->has_gnu_symbols = elf_gnu_symbol_any;
17622
17623 if (elf32_arm_hash_table (info) == NULL)
17624 return FALSE;
17625
17626 if (elf32_arm_hash_table (info)->vxworks_p
17627 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
17628 flagsp, secp, valp))
17629 return FALSE;
17630
17631 return TRUE;
17632 }
17633
17634 /* We use this to override swap_symbol_in and swap_symbol_out. */
17635 const struct elf_size_info elf32_arm_size_info =
17636 {
17637 sizeof (Elf32_External_Ehdr),
17638 sizeof (Elf32_External_Phdr),
17639 sizeof (Elf32_External_Shdr),
17640 sizeof (Elf32_External_Rel),
17641 sizeof (Elf32_External_Rela),
17642 sizeof (Elf32_External_Sym),
17643 sizeof (Elf32_External_Dyn),
17644 sizeof (Elf_External_Note),
17645 4,
17646 1,
17647 32, 2,
17648 ELFCLASS32, EV_CURRENT,
17649 bfd_elf32_write_out_phdrs,
17650 bfd_elf32_write_shdrs_and_ehdr,
17651 bfd_elf32_checksum_contents,
17652 bfd_elf32_write_relocs,
17653 elf32_arm_swap_symbol_in,
17654 elf32_arm_swap_symbol_out,
17655 bfd_elf32_slurp_reloc_table,
17656 bfd_elf32_slurp_symbol_table,
17657 bfd_elf32_swap_dyn_in,
17658 bfd_elf32_swap_dyn_out,
17659 bfd_elf32_swap_reloc_in,
17660 bfd_elf32_swap_reloc_out,
17661 bfd_elf32_swap_reloca_in,
17662 bfd_elf32_swap_reloca_out
17663 };
17664
17665 static bfd_vma
17666 read_code32 (const bfd *abfd, const bfd_byte *addr)
17667 {
17668 /* V7 BE8 code is always little endian. */
17669 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
17670 return bfd_getl32 (addr);
17671
17672 return bfd_get_32 (abfd, addr);
17673 }
17674
17675 static bfd_vma
17676 read_code16 (const bfd *abfd, const bfd_byte *addr)
17677 {
17678 /* V7 BE8 code is always little endian. */
17679 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
17680 return bfd_getl16 (addr);
17681
17682 return bfd_get_16 (abfd, addr);
17683 }
17684
17685 /* Return size of plt0 entry starting at ADDR
17686 or (bfd_vma) -1 if size can not be determined. */
17687
17688 static bfd_vma
17689 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
17690 {
17691 bfd_vma first_word;
17692 bfd_vma plt0_size;
17693
17694 first_word = read_code32 (abfd, addr);
17695
17696 if (first_word == elf32_arm_plt0_entry[0])
17697 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
17698 else if (first_word == elf32_thumb2_plt0_entry[0])
17699 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
17700 else
17701 /* We don't yet handle this PLT format. */
17702 return (bfd_vma) -1;
17703
17704 return plt0_size;
17705 }
17706
17707 /* Return size of plt entry starting at offset OFFSET
17708 of plt section located at address START
17709 or (bfd_vma) -1 if size can not be determined. */
17710
17711 static bfd_vma
17712 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
17713 {
17714 bfd_vma first_insn;
17715 bfd_vma plt_size = 0;
17716 const bfd_byte *addr = start + offset;
17717
17718 /* PLT entry size if fixed on Thumb-only platforms. */
17719 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
17720 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
17721
17722 /* Respect Thumb stub if necessary. */
17723 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
17724 {
17725 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
17726 }
17727
17728 /* Strip immediate from first add. */
17729 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
17730
17731 #ifdef FOUR_WORD_PLT
17732 if (first_insn == elf32_arm_plt_entry[0])
17733 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
17734 #else
17735 if (first_insn == elf32_arm_plt_entry_long[0])
17736 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
17737 else if (first_insn == elf32_arm_plt_entry_short[0])
17738 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
17739 #endif
17740 else
17741 /* We don't yet handle this PLT format. */
17742 return (bfd_vma) -1;
17743
17744 return plt_size;
17745 }
17746
17747 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
17748
17749 static long
17750 elf32_arm_get_synthetic_symtab (bfd *abfd,
17751 long symcount ATTRIBUTE_UNUSED,
17752 asymbol **syms ATTRIBUTE_UNUSED,
17753 long dynsymcount,
17754 asymbol **dynsyms,
17755 asymbol **ret)
17756 {
17757 asection *relplt;
17758 asymbol *s;
17759 arelent *p;
17760 long count, i, n;
17761 size_t size;
17762 Elf_Internal_Shdr *hdr;
17763 char *names;
17764 asection *plt;
17765 bfd_vma offset;
17766 bfd_byte *data;
17767
17768 *ret = NULL;
17769
17770 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
17771 return 0;
17772
17773 if (dynsymcount <= 0)
17774 return 0;
17775
17776 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
17777 if (relplt == NULL)
17778 return 0;
17779
17780 hdr = &elf_section_data (relplt)->this_hdr;
17781 if (hdr->sh_link != elf_dynsymtab (abfd)
17782 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
17783 return 0;
17784
17785 plt = bfd_get_section_by_name (abfd, ".plt");
17786 if (plt == NULL)
17787 return 0;
17788
17789 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
17790 return -1;
17791
17792 data = plt->contents;
17793 if (data == NULL)
17794 {
17795 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
17796 return -1;
17797 bfd_cache_section_contents((asection *) plt, data);
17798 }
17799
17800 count = relplt->size / hdr->sh_entsize;
17801 size = count * sizeof (asymbol);
17802 p = relplt->relocation;
17803 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
17804 {
17805 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
17806 if (p->addend != 0)
17807 size += sizeof ("+0x") - 1 + 8;
17808 }
17809
17810 s = *ret = (asymbol *) bfd_malloc (size);
17811 if (s == NULL)
17812 return -1;
17813
17814 offset = elf32_arm_plt0_size (abfd, data);
17815 if (offset == (bfd_vma) -1)
17816 return -1;
17817
17818 names = (char *) (s + count);
17819 p = relplt->relocation;
17820 n = 0;
17821 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
17822 {
17823 size_t len;
17824
17825 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
17826 if (plt_size == (bfd_vma) -1)
17827 break;
17828
17829 *s = **p->sym_ptr_ptr;
17830 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
17831 we are defining a symbol, ensure one of them is set. */
17832 if ((s->flags & BSF_LOCAL) == 0)
17833 s->flags |= BSF_GLOBAL;
17834 s->flags |= BSF_SYNTHETIC;
17835 s->section = plt;
17836 s->value = offset;
17837 s->name = names;
17838 s->udata.p = NULL;
17839 len = strlen ((*p->sym_ptr_ptr)->name);
17840 memcpy (names, (*p->sym_ptr_ptr)->name, len);
17841 names += len;
17842 if (p->addend != 0)
17843 {
17844 char buf[30], *a;
17845
17846 memcpy (names, "+0x", sizeof ("+0x") - 1);
17847 names += sizeof ("+0x") - 1;
17848 bfd_sprintf_vma (abfd, buf, p->addend);
17849 for (a = buf; *a == '0'; ++a)
17850 ;
17851 len = strlen (a);
17852 memcpy (names, a, len);
17853 names += len;
17854 }
17855 memcpy (names, "@plt", sizeof ("@plt"));
17856 names += sizeof ("@plt");
17857 ++s, ++n;
17858 offset += plt_size;
17859 }
17860
17861 return n;
17862 }
17863
17864 static bfd_boolean
17865 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
17866 {
17867 if (hdr->sh_flags & SHF_ARM_NOREAD)
17868 *flags |= SEC_ELF_NOREAD;
17869 return TRUE;
17870 }
17871
17872 static flagword
17873 elf32_arm_lookup_section_flags (char *flag_name)
17874 {
17875 if (!strcmp (flag_name, "SHF_ARM_NOREAD"))
17876 return SHF_ARM_NOREAD;
17877
17878 return SEC_NO_FLAGS;
17879 }
17880
17881 static unsigned int
17882 elf32_arm_count_additional_relocs (asection *sec)
17883 {
17884 struct _arm_elf_section_data *arm_data;
17885 arm_data = get_arm_elf_section_data (sec);
17886 return arm_data->additional_reloc_count;
17887 }
17888
17889 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
17890 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
17891 FALSE otherwise. ISECTION is the best guess matching section from the
17892 input bfd IBFD, but it might be NULL. */
17893
17894 static bfd_boolean
17895 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
17896 bfd *obfd ATTRIBUTE_UNUSED,
17897 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
17898 Elf_Internal_Shdr *osection)
17899 {
17900 switch (osection->sh_type)
17901 {
17902 case SHT_ARM_EXIDX:
17903 {
17904 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
17905 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
17906 unsigned i = 0;
17907
17908 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
17909 osection->sh_info = 0;
17910
17911 /* The sh_link field must be set to the text section associated with
17912 this index section. Unfortunately the ARM EHABI does not specify
17913 exactly how to determine this association. Our caller does try
17914 to match up OSECTION with its corresponding input section however
17915 so that is a good first guess. */
17916 if (isection != NULL
17917 && osection->bfd_section != NULL
17918 && isection->bfd_section != NULL
17919 && isection->bfd_section->output_section != NULL
17920 && isection->bfd_section->output_section == osection->bfd_section
17921 && iheaders != NULL
17922 && isection->sh_link > 0
17923 && isection->sh_link < elf_numsections (ibfd)
17924 && iheaders[isection->sh_link]->bfd_section != NULL
17925 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
17926 )
17927 {
17928 for (i = elf_numsections (obfd); i-- > 0;)
17929 if (oheaders[i]->bfd_section
17930 == iheaders[isection->sh_link]->bfd_section->output_section)
17931 break;
17932 }
17933
17934 if (i == 0)
17935 {
17936 /* Failing that we have to find a matching section ourselves. If
17937 we had the output section name available we could compare that
17938 with input section names. Unfortunately we don't. So instead
17939 we use a simple heuristic and look for the nearest executable
17940 section before this one. */
17941 for (i = elf_numsections (obfd); i-- > 0;)
17942 if (oheaders[i] == osection)
17943 break;
17944 if (i == 0)
17945 break;
17946
17947 while (i-- > 0)
17948 if (oheaders[i]->sh_type == SHT_PROGBITS
17949 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
17950 == (SHF_ALLOC | SHF_EXECINSTR))
17951 break;
17952 }
17953
17954 if (i)
17955 {
17956 osection->sh_link = i;
17957 /* If the text section was part of a group
17958 then the index section should be too. */
17959 if (oheaders[i]->sh_flags & SHF_GROUP)
17960 osection->sh_flags |= SHF_GROUP;
17961 return TRUE;
17962 }
17963 }
17964 break;
17965
17966 case SHT_ARM_PREEMPTMAP:
17967 osection->sh_flags = SHF_ALLOC;
17968 break;
17969
17970 case SHT_ARM_ATTRIBUTES:
17971 case SHT_ARM_DEBUGOVERLAY:
17972 case SHT_ARM_OVERLAYSECTION:
17973 default:
17974 break;
17975 }
17976
17977 return FALSE;
17978 }
17979
17980 #undef elf_backend_copy_special_section_fields
17981 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
17982
17983 #define ELF_ARCH bfd_arch_arm
17984 #define ELF_TARGET_ID ARM_ELF_DATA
17985 #define ELF_MACHINE_CODE EM_ARM
17986 #ifdef __QNXTARGET__
17987 #define ELF_MAXPAGESIZE 0x1000
17988 #else
17989 #define ELF_MAXPAGESIZE 0x10000
17990 #endif
17991 #define ELF_MINPAGESIZE 0x1000
17992 #define ELF_COMMONPAGESIZE 0x1000
17993
17994 #define bfd_elf32_mkobject elf32_arm_mkobject
17995
17996 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
17997 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
17998 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
17999 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
18000 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
18001 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
18002 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
18003 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
18004 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
18005 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
18006 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
18007 #define bfd_elf32_bfd_final_link elf32_arm_final_link
18008 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
18009
18010 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
18011 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
18012 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
18013 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
18014 #define elf_backend_check_relocs elf32_arm_check_relocs
18015 #define elf_backend_relocate_section elf32_arm_relocate_section
18016 #define elf_backend_write_section elf32_arm_write_section
18017 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
18018 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
18019 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
18020 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
18021 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
18022 #define elf_backend_always_size_sections elf32_arm_always_size_sections
18023 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
18024 #define elf_backend_post_process_headers elf32_arm_post_process_headers
18025 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
18026 #define elf_backend_object_p elf32_arm_object_p
18027 #define elf_backend_fake_sections elf32_arm_fake_sections
18028 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
18029 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18030 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
18031 #define elf_backend_size_info elf32_arm_size_info
18032 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18033 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
18034 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
18035 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
18036 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
18037 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
18038
18039 #define elf_backend_can_refcount 1
18040 #define elf_backend_can_gc_sections 1
18041 #define elf_backend_plt_readonly 1
18042 #define elf_backend_want_got_plt 1
18043 #define elf_backend_want_plt_sym 0
18044 #define elf_backend_may_use_rel_p 1
18045 #define elf_backend_may_use_rela_p 0
18046 #define elf_backend_default_use_rela_p 0
18047
18048 #define elf_backend_got_header_size 12
18049 #define elf_backend_extern_protected_data 1
18050
18051 #undef elf_backend_obj_attrs_vendor
18052 #define elf_backend_obj_attrs_vendor "aeabi"
18053 #undef elf_backend_obj_attrs_section
18054 #define elf_backend_obj_attrs_section ".ARM.attributes"
18055 #undef elf_backend_obj_attrs_arg_type
18056 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
18057 #undef elf_backend_obj_attrs_section_type
18058 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
18059 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
18060 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
18061
18062 #undef elf_backend_section_flags
18063 #define elf_backend_section_flags elf32_arm_section_flags
18064 #undef elf_backend_lookup_section_flags_hook
18065 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
18066
18067 #include "elf32-target.h"
18068
18069 /* Native Client targets. */
18070
18071 #undef TARGET_LITTLE_SYM
18072 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
18073 #undef TARGET_LITTLE_NAME
18074 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
18075 #undef TARGET_BIG_SYM
18076 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
18077 #undef TARGET_BIG_NAME
18078 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
18079
18080 /* Like elf32_arm_link_hash_table_create -- but overrides
18081 appropriately for NaCl. */
18082
18083 static struct bfd_link_hash_table *
18084 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
18085 {
18086 struct bfd_link_hash_table *ret;
18087
18088 ret = elf32_arm_link_hash_table_create (abfd);
18089 if (ret)
18090 {
18091 struct elf32_arm_link_hash_table *htab
18092 = (struct elf32_arm_link_hash_table *) ret;
18093
18094 htab->nacl_p = 1;
18095
18096 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
18097 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
18098 }
18099 return ret;
18100 }
18101
18102 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
18103 really need to use elf32_arm_modify_segment_map. But we do it
18104 anyway just to reduce gratuitous differences with the stock ARM backend. */
18105
18106 static bfd_boolean
18107 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
18108 {
18109 return (elf32_arm_modify_segment_map (abfd, info)
18110 && nacl_modify_segment_map (abfd, info));
18111 }
18112
18113 static void
18114 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
18115 {
18116 elf32_arm_final_write_processing (abfd, linker);
18117 nacl_final_write_processing (abfd, linker);
18118 }
18119
18120 static bfd_vma
18121 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
18122 const arelent *rel ATTRIBUTE_UNUSED)
18123 {
18124 return plt->vma
18125 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
18126 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
18127 }
18128
18129 #undef elf32_bed
18130 #define elf32_bed elf32_arm_nacl_bed
18131 #undef bfd_elf32_bfd_link_hash_table_create
18132 #define bfd_elf32_bfd_link_hash_table_create \
18133 elf32_arm_nacl_link_hash_table_create
18134 #undef elf_backend_plt_alignment
18135 #define elf_backend_plt_alignment 4
18136 #undef elf_backend_modify_segment_map
18137 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
18138 #undef elf_backend_modify_program_headers
18139 #define elf_backend_modify_program_headers nacl_modify_program_headers
18140 #undef elf_backend_final_write_processing
18141 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
18142 #undef bfd_elf32_get_synthetic_symtab
18143 #undef elf_backend_plt_sym_val
18144 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
18145 #undef elf_backend_copy_special_section_fields
18146
18147 #undef ELF_MINPAGESIZE
18148 #undef ELF_COMMONPAGESIZE
18149
18150
18151 #include "elf32-target.h"
18152
18153 /* Reset to defaults. */
18154 #undef elf_backend_plt_alignment
18155 #undef elf_backend_modify_segment_map
18156 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18157 #undef elf_backend_modify_program_headers
18158 #undef elf_backend_final_write_processing
18159 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18160 #undef ELF_MINPAGESIZE
18161 #define ELF_MINPAGESIZE 0x1000
18162 #undef ELF_COMMONPAGESIZE
18163 #define ELF_COMMONPAGESIZE 0x1000
18164
18165
18166 /* VxWorks Targets. */
18167
18168 #undef TARGET_LITTLE_SYM
18169 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
18170 #undef TARGET_LITTLE_NAME
18171 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
18172 #undef TARGET_BIG_SYM
18173 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
18174 #undef TARGET_BIG_NAME
18175 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
18176
18177 /* Like elf32_arm_link_hash_table_create -- but overrides
18178 appropriately for VxWorks. */
18179
18180 static struct bfd_link_hash_table *
18181 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
18182 {
18183 struct bfd_link_hash_table *ret;
18184
18185 ret = elf32_arm_link_hash_table_create (abfd);
18186 if (ret)
18187 {
18188 struct elf32_arm_link_hash_table *htab
18189 = (struct elf32_arm_link_hash_table *) ret;
18190 htab->use_rel = 0;
18191 htab->vxworks_p = 1;
18192 }
18193 return ret;
18194 }
18195
18196 static void
18197 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
18198 {
18199 elf32_arm_final_write_processing (abfd, linker);
18200 elf_vxworks_final_write_processing (abfd, linker);
18201 }
18202
18203 #undef elf32_bed
18204 #define elf32_bed elf32_arm_vxworks_bed
18205
18206 #undef bfd_elf32_bfd_link_hash_table_create
18207 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
18208 #undef elf_backend_final_write_processing
18209 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
18210 #undef elf_backend_emit_relocs
18211 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
18212
18213 #undef elf_backend_may_use_rel_p
18214 #define elf_backend_may_use_rel_p 0
18215 #undef elf_backend_may_use_rela_p
18216 #define elf_backend_may_use_rela_p 1
18217 #undef elf_backend_default_use_rela_p
18218 #define elf_backend_default_use_rela_p 1
18219 #undef elf_backend_want_plt_sym
18220 #define elf_backend_want_plt_sym 1
18221 #undef ELF_MAXPAGESIZE
18222 #define ELF_MAXPAGESIZE 0x1000
18223
18224 #include "elf32-target.h"
18225
18226
18227 /* Merge backend specific data from an object file to the output
18228 object file when linking. */
18229
18230 static bfd_boolean
18231 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
18232 {
18233 flagword out_flags;
18234 flagword in_flags;
18235 bfd_boolean flags_compatible = TRUE;
18236 asection *sec;
18237
18238 /* Check if we have the same endianness. */
18239 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
18240 return FALSE;
18241
18242 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
18243 return TRUE;
18244
18245 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
18246 return FALSE;
18247
18248 /* The input BFD must have had its flags initialised. */
18249 /* The following seems bogus to me -- The flags are initialized in
18250 the assembler but I don't think an elf_flags_init field is
18251 written into the object. */
18252 /* BFD_ASSERT (elf_flags_init (ibfd)); */
18253
18254 in_flags = elf_elfheader (ibfd)->e_flags;
18255 out_flags = elf_elfheader (obfd)->e_flags;
18256
18257 /* In theory there is no reason why we couldn't handle this. However
18258 in practice it isn't even close to working and there is no real
18259 reason to want it. */
18260 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
18261 && !(ibfd->flags & DYNAMIC)
18262 && (in_flags & EF_ARM_BE8))
18263 {
18264 _bfd_error_handler (_("error: %B is already in final BE8 format"),
18265 ibfd);
18266 return FALSE;
18267 }
18268
18269 if (!elf_flags_init (obfd))
18270 {
18271 /* If the input is the default architecture and had the default
18272 flags then do not bother setting the flags for the output
18273 architecture, instead allow future merges to do this. If no
18274 future merges ever set these flags then they will retain their
18275 uninitialised values, which surprise surprise, correspond
18276 to the default values. */
18277 if (bfd_get_arch_info (ibfd)->the_default
18278 && elf_elfheader (ibfd)->e_flags == 0)
18279 return TRUE;
18280
18281 elf_flags_init (obfd) = TRUE;
18282 elf_elfheader (obfd)->e_flags = in_flags;
18283
18284 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
18285 && bfd_get_arch_info (obfd)->the_default)
18286 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
18287
18288 return TRUE;
18289 }
18290
18291 /* Determine what should happen if the input ARM architecture
18292 does not match the output ARM architecture. */
18293 if (! bfd_arm_merge_machines (ibfd, obfd))
18294 return FALSE;
18295
18296 /* Identical flags must be compatible. */
18297 if (in_flags == out_flags)
18298 return TRUE;
18299
18300 /* Check to see if the input BFD actually contains any sections. If
18301 not, its flags may not have been initialised either, but it
18302 cannot actually cause any incompatiblity. Do not short-circuit
18303 dynamic objects; their section list may be emptied by
18304 elf_link_add_object_symbols.
18305
18306 Also check to see if there are no code sections in the input.
18307 In this case there is no need to check for code specific flags.
18308 XXX - do we need to worry about floating-point format compatability
18309 in data sections ? */
18310 if (!(ibfd->flags & DYNAMIC))
18311 {
18312 bfd_boolean null_input_bfd = TRUE;
18313 bfd_boolean only_data_sections = TRUE;
18314
18315 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
18316 {
18317 /* Ignore synthetic glue sections. */
18318 if (strcmp (sec->name, ".glue_7")
18319 && strcmp (sec->name, ".glue_7t"))
18320 {
18321 if ((bfd_get_section_flags (ibfd, sec)
18322 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
18323 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
18324 only_data_sections = FALSE;
18325
18326 null_input_bfd = FALSE;
18327 break;
18328 }
18329 }
18330
18331 if (null_input_bfd || only_data_sections)
18332 return TRUE;
18333 }
18334
18335 /* Complain about various flag mismatches. */
18336 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
18337 EF_ARM_EABI_VERSION (out_flags)))
18338 {
18339 _bfd_error_handler
18340 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
18341 ibfd, obfd,
18342 (in_flags & EF_ARM_EABIMASK) >> 24,
18343 (out_flags & EF_ARM_EABIMASK) >> 24);
18344 return FALSE;
18345 }
18346
18347 /* Not sure what needs to be checked for EABI versions >= 1. */
18348 /* VxWorks libraries do not use these flags. */
18349 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
18350 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
18351 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
18352 {
18353 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
18354 {
18355 _bfd_error_handler
18356 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
18357 ibfd, obfd,
18358 in_flags & EF_ARM_APCS_26 ? 26 : 32,
18359 out_flags & EF_ARM_APCS_26 ? 26 : 32);
18360 flags_compatible = FALSE;
18361 }
18362
18363 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
18364 {
18365 if (in_flags & EF_ARM_APCS_FLOAT)
18366 _bfd_error_handler
18367 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
18368 ibfd, obfd);
18369 else
18370 _bfd_error_handler
18371 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
18372 ibfd, obfd);
18373
18374 flags_compatible = FALSE;
18375 }
18376
18377 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
18378 {
18379 if (in_flags & EF_ARM_VFP_FLOAT)
18380 _bfd_error_handler
18381 (_("error: %B uses VFP instructions, whereas %B does not"),
18382 ibfd, obfd);
18383 else
18384 _bfd_error_handler
18385 (_("error: %B uses FPA instructions, whereas %B does not"),
18386 ibfd, obfd);
18387
18388 flags_compatible = FALSE;
18389 }
18390
18391 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
18392 {
18393 if (in_flags & EF_ARM_MAVERICK_FLOAT)
18394 _bfd_error_handler
18395 (_("error: %B uses Maverick instructions, whereas %B does not"),
18396 ibfd, obfd);
18397 else
18398 _bfd_error_handler
18399 (_("error: %B does not use Maverick instructions, whereas %B does"),
18400 ibfd, obfd);
18401
18402 flags_compatible = FALSE;
18403 }
18404
18405 #ifdef EF_ARM_SOFT_FLOAT
18406 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
18407 {
18408 /* We can allow interworking between code that is VFP format
18409 layout, and uses either soft float or integer regs for
18410 passing floating point arguments and results. We already
18411 know that the APCS_FLOAT flags match; similarly for VFP
18412 flags. */
18413 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
18414 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
18415 {
18416 if (in_flags & EF_ARM_SOFT_FLOAT)
18417 _bfd_error_handler
18418 (_("error: %B uses software FP, whereas %B uses hardware FP"),
18419 ibfd, obfd);
18420 else
18421 _bfd_error_handler
18422 (_("error: %B uses hardware FP, whereas %B uses software FP"),
18423 ibfd, obfd);
18424
18425 flags_compatible = FALSE;
18426 }
18427 }
18428 #endif
18429
18430 /* Interworking mismatch is only a warning. */
18431 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
18432 {
18433 if (in_flags & EF_ARM_INTERWORK)
18434 {
18435 _bfd_error_handler
18436 (_("Warning: %B supports interworking, whereas %B does not"),
18437 ibfd, obfd);
18438 }
18439 else
18440 {
18441 _bfd_error_handler
18442 (_("Warning: %B does not support interworking, whereas %B does"),
18443 ibfd, obfd);
18444 }
18445 }
18446 }
18447
18448 return flags_compatible;
18449 }
18450
18451
18452 /* Symbian OS Targets. */
18453
18454 #undef TARGET_LITTLE_SYM
18455 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
18456 #undef TARGET_LITTLE_NAME
18457 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
18458 #undef TARGET_BIG_SYM
18459 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
18460 #undef TARGET_BIG_NAME
18461 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
18462
18463 /* Like elf32_arm_link_hash_table_create -- but overrides
18464 appropriately for Symbian OS. */
18465
18466 static struct bfd_link_hash_table *
18467 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
18468 {
18469 struct bfd_link_hash_table *ret;
18470
18471 ret = elf32_arm_link_hash_table_create (abfd);
18472 if (ret)
18473 {
18474 struct elf32_arm_link_hash_table *htab
18475 = (struct elf32_arm_link_hash_table *)ret;
18476 /* There is no PLT header for Symbian OS. */
18477 htab->plt_header_size = 0;
18478 /* The PLT entries are each one instruction and one word. */
18479 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
18480 htab->symbian_p = 1;
18481 /* Symbian uses armv5t or above, so use_blx is always true. */
18482 htab->use_blx = 1;
18483 htab->root.is_relocatable_executable = 1;
18484 }
18485 return ret;
18486 }
18487
18488 static const struct bfd_elf_special_section
18489 elf32_arm_symbian_special_sections[] =
18490 {
18491 /* In a BPABI executable, the dynamic linking sections do not go in
18492 the loadable read-only segment. The post-linker may wish to
18493 refer to these sections, but they are not part of the final
18494 program image. */
18495 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
18496 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
18497 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
18498 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
18499 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
18500 /* These sections do not need to be writable as the SymbianOS
18501 postlinker will arrange things so that no dynamic relocation is
18502 required. */
18503 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
18504 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
18505 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
18506 { NULL, 0, 0, 0, 0 }
18507 };
18508
18509 static void
18510 elf32_arm_symbian_begin_write_processing (bfd *abfd,
18511 struct bfd_link_info *link_info)
18512 {
18513 /* BPABI objects are never loaded directly by an OS kernel; they are
18514 processed by a postlinker first, into an OS-specific format. If
18515 the D_PAGED bit is set on the file, BFD will align segments on
18516 page boundaries, so that an OS can directly map the file. With
18517 BPABI objects, that just results in wasted space. In addition,
18518 because we clear the D_PAGED bit, map_sections_to_segments will
18519 recognize that the program headers should not be mapped into any
18520 loadable segment. */
18521 abfd->flags &= ~D_PAGED;
18522 elf32_arm_begin_write_processing (abfd, link_info);
18523 }
18524
18525 static bfd_boolean
18526 elf32_arm_symbian_modify_segment_map (bfd *abfd,
18527 struct bfd_link_info *info)
18528 {
18529 struct elf_segment_map *m;
18530 asection *dynsec;
18531
18532 /* BPABI shared libraries and executables should have a PT_DYNAMIC
18533 segment. However, because the .dynamic section is not marked
18534 with SEC_LOAD, the generic ELF code will not create such a
18535 segment. */
18536 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
18537 if (dynsec)
18538 {
18539 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
18540 if (m->p_type == PT_DYNAMIC)
18541 break;
18542
18543 if (m == NULL)
18544 {
18545 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
18546 m->next = elf_seg_map (abfd);
18547 elf_seg_map (abfd) = m;
18548 }
18549 }
18550
18551 /* Also call the generic arm routine. */
18552 return elf32_arm_modify_segment_map (abfd, info);
18553 }
18554
18555 /* Return address for Ith PLT stub in section PLT, for relocation REL
18556 or (bfd_vma) -1 if it should not be included. */
18557
18558 static bfd_vma
18559 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
18560 const arelent *rel ATTRIBUTE_UNUSED)
18561 {
18562 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
18563 }
18564
18565 #undef elf32_bed
18566 #define elf32_bed elf32_arm_symbian_bed
18567
18568 /* The dynamic sections are not allocated on SymbianOS; the postlinker
18569 will process them and then discard them. */
18570 #undef ELF_DYNAMIC_SEC_FLAGS
18571 #define ELF_DYNAMIC_SEC_FLAGS \
18572 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
18573
18574 #undef elf_backend_emit_relocs
18575
18576 #undef bfd_elf32_bfd_link_hash_table_create
18577 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
18578 #undef elf_backend_special_sections
18579 #define elf_backend_special_sections elf32_arm_symbian_special_sections
18580 #undef elf_backend_begin_write_processing
18581 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
18582 #undef elf_backend_final_write_processing
18583 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18584
18585 #undef elf_backend_modify_segment_map
18586 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
18587
18588 /* There is no .got section for BPABI objects, and hence no header. */
18589 #undef elf_backend_got_header_size
18590 #define elf_backend_got_header_size 0
18591
18592 /* Similarly, there is no .got.plt section. */
18593 #undef elf_backend_want_got_plt
18594 #define elf_backend_want_got_plt 0
18595
18596 #undef elf_backend_plt_sym_val
18597 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
18598
18599 #undef elf_backend_may_use_rel_p
18600 #define elf_backend_may_use_rel_p 1
18601 #undef elf_backend_may_use_rela_p
18602 #define elf_backend_may_use_rela_p 0
18603 #undef elf_backend_default_use_rela_p
18604 #define elf_backend_default_use_rela_p 0
18605 #undef elf_backend_want_plt_sym
18606 #define elf_backend_want_plt_sym 0
18607 #undef ELF_MAXPAGESIZE
18608 #define ELF_MAXPAGESIZE 0x8000
18609
18610 #include "elf32-target.h"
GDB Binutils - Deliverables
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