1 /* M32R-specific support for 32-bit ELF.
2 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
26 static bfd_reloc_status_type m32r_elf_10_pcrel_reloc
27 PARAMS ((bfd
*, arelent
*, asymbol
*, PTR
, asection
*, bfd
*, char **));
28 static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc
29 PARAMS ((bfd
*, reloc_howto_type
*, asection
*,
30 bfd_byte
*, bfd_vma
, asection
*, bfd_vma
, bfd_vma
));
31 static bfd_reloc_status_type m32r_elf_hi16_reloc
32 PARAMS ((bfd
*, arelent
*, asymbol
*, PTR
, asection
*, bfd
*, char **));
33 static void m32r_elf_relocate_hi16
34 PARAMS ((bfd
*, int, Elf_Internal_Rela
*, Elf_Internal_Rela
*,
35 bfd_byte
*, bfd_vma
));
36 bfd_reloc_status_type m32r_elf_lo16_reloc
37 PARAMS ((bfd
*, arelent
*, asymbol
*, PTR
, asection
*, bfd
*, char **));
38 static bfd_reloc_status_type m32r_elf_sda16_reloc
39 PARAMS ((bfd
*, arelent
*, asymbol
*, PTR
, asection
*, bfd
*, char **));
40 static reloc_howto_type
*bfd_elf32_bfd_reloc_type_lookup
41 PARAMS ((bfd
*abfd
, bfd_reloc_code_real_type code
));
42 static void m32r_info_to_howto_rel
43 PARAMS ((bfd
*, arelent
*, Elf32_Internal_Rel
*));
44 boolean _bfd_m32r_elf_section_from_bfd_section
45 PARAMS ((bfd
*, Elf32_Internal_Shdr
*, asection
*, int *));
46 void _bfd_m32r_elf_symbol_processing
47 PARAMS ((bfd
*, asymbol
*));
48 static boolean m32r_elf_add_symbol_hook
49 PARAMS ((bfd
*, struct bfd_link_info
*, const Elf_Internal_Sym
*,
50 const char **, flagword
*, asection
**, bfd_vma
*));
51 static boolean m32r_elf_relocate_section
52 PARAMS ((bfd
*, struct bfd_link_info
*, bfd
*, asection
*, bfd_byte
*,
53 Elf_Internal_Rela
*, Elf_Internal_Sym
*, asection
**));
55 static boolean m32r_elf_relax_delete_bytes
56 PARAMS ((bfd
*, asection
*, bfd_vma
, int));
59 #define NOP_INSN 0x7000
60 #define MAKE_PARALLEL(insn) ((insn) | 0x8000)
62 /* Use REL instead of RELA to save space.
63 This only saves space in libraries and object files, but perhaps
64 relocs will be put in ROM? All in all though, REL relocs are a pain
68 static reloc_howto_type m32r_elf_howto_table
[] =
70 /* This reloc does nothing. */
71 HOWTO (R_M32R_NONE
, /* type */
73 2, /* size (0 = byte, 1 = short, 2 = long) */
75 false, /* pc_relative */
77 complain_overflow_bitfield
, /* complain_on_overflow */
78 bfd_elf_generic_reloc
, /* special_function */
79 "R_M32R_NONE", /* name */
80 false, /* partial_inplace */
83 false), /* pcrel_offset */
85 /* A 16 bit absolute relocation. */
86 HOWTO (R_M32R_16
, /* type */
88 1, /* size (0 = byte, 1 = short, 2 = long) */
90 false, /* pc_relative */
92 complain_overflow_bitfield
, /* complain_on_overflow */
93 bfd_elf_generic_reloc
, /* special_function */
94 "R_M32R_16", /* name */
95 true, /* partial_inplace */
96 0xffff, /* src_mask */
97 0xffff, /* dst_mask */
98 false), /* pcrel_offset */
100 /* A 32 bit absolute relocation. */
101 HOWTO (R_M32R_32
, /* type */
103 2, /* size (0 = byte, 1 = short, 2 = long) */
105 false, /* pc_relative */
107 complain_overflow_bitfield
, /* complain_on_overflow */
108 bfd_elf_generic_reloc
, /* special_function */
109 "R_M32R_32", /* name */
110 true, /* partial_inplace */
111 0xffffffff, /* src_mask */
112 0xffffffff, /* dst_mask */
113 false), /* pcrel_offset */
115 /* A 24 bit address. */
116 HOWTO (R_M32R_24
, /* type */
118 2, /* size (0 = byte, 1 = short, 2 = long) */
120 false, /* pc_relative */
122 complain_overflow_unsigned
, /* complain_on_overflow */
123 bfd_elf_generic_reloc
, /* special_function */
124 "R_M32R_24", /* name */
125 true, /* partial_inplace */
126 0xffffff, /* src_mask */
127 0xffffff, /* dst_mask */
128 false), /* pcrel_offset */
130 /* An PC Relative 10-bit relocation, shifted by 2.
131 This reloc is complicated because relocations are relative to pc & -4.
132 i.e. branches in the right insn slot use the address of the left insn
134 /* ??? It's not clear whether this should have partial_inplace set or not.
135 Branch relaxing in the assembler can store the addend in the insn,
136 and if bfd_install_relocation gets called the addend may get added
138 HOWTO (R_M32R_10_PCREL
, /* type */
140 1, /* size (0 = byte, 1 = short, 2 = long) */
142 true, /* pc_relative */
144 complain_overflow_signed
, /* complain_on_overflow */
145 m32r_elf_10_pcrel_reloc
, /* special_function */
146 "R_M32R_10_PCREL", /* name */
147 false, /* partial_inplace */
150 true), /* pcrel_offset */
152 /* A relative 18 bit relocation, right shifted by 2. */
153 HOWTO (R_M32R_18_PCREL
, /* type */
155 2, /* size (0 = byte, 1 = short, 2 = long) */
157 true, /* pc_relative */
159 complain_overflow_signed
, /* complain_on_overflow */
160 bfd_elf_generic_reloc
, /* special_function */
161 "R_M32R_18_PCREL", /* name */
162 false, /* partial_inplace */
163 0xffff, /* src_mask */
164 0xffff, /* dst_mask */
165 true), /* pcrel_offset */
167 /* A relative 26 bit relocation, right shifted by 2. */
168 /* ??? It's not clear whether this should have partial_inplace set or not.
169 Branch relaxing in the assembler can store the addend in the insn,
170 and if bfd_install_relocation gets called the addend may get added
172 HOWTO (R_M32R_26_PCREL
, /* type */
174 2, /* size (0 = byte, 1 = short, 2 = long) */
176 true, /* pc_relative */
178 complain_overflow_signed
, /* complain_on_overflow */
179 bfd_elf_generic_reloc
, /* special_function */
180 "R_M32R_26_PCREL", /* name */
181 false, /* partial_inplace */
182 0xffffff, /* src_mask */
183 0xffffff, /* dst_mask */
184 true), /* pcrel_offset */
186 /* High 16 bits of address when lower 16 is or'd in. */
187 HOWTO (R_M32R_HI16_ULO
, /* type */
189 2, /* size (0 = byte, 1 = short, 2 = long) */
191 false, /* pc_relative */
193 complain_overflow_dont
, /* complain_on_overflow */
194 m32r_elf_hi16_reloc
, /* special_function */
195 "R_M32R_HI16_ULO", /* name */
196 true, /* partial_inplace */
197 0x0000ffff, /* src_mask */
198 0x0000ffff, /* dst_mask */
199 false), /* pcrel_offset */
201 /* High 16 bits of address when lower 16 is added in. */
202 HOWTO (R_M32R_HI16_SLO
, /* type */
204 2, /* size (0 = byte, 1 = short, 2 = long) */
206 false, /* pc_relative */
208 complain_overflow_dont
, /* complain_on_overflow */
209 m32r_elf_hi16_reloc
, /* special_function */
210 "R_M32R_HI16_SLO", /* name */
211 true, /* partial_inplace */
212 0x0000ffff, /* src_mask */
213 0x0000ffff, /* dst_mask */
214 false), /* pcrel_offset */
216 /* Lower 16 bits of address. */
217 HOWTO (R_M32R_LO16
, /* type */
219 2, /* size (0 = byte, 1 = short, 2 = long) */
221 false, /* pc_relative */
223 complain_overflow_dont
, /* complain_on_overflow */
224 m32r_elf_lo16_reloc
, /* special_function */
225 "R_M32R_LO16", /* name */
226 true, /* partial_inplace */
227 0x0000ffff, /* src_mask */
228 0x0000ffff, /* dst_mask */
229 false), /* pcrel_offset */
231 /* Small data area 16 bits offset. */
232 HOWTO (R_M32R_SDA16
, /* type */
234 2, /* size (0 = byte, 1 = short, 2 = long) */
236 false, /* pc_relative */
238 complain_overflow_signed
, /* complain_on_overflow */
239 m32r_elf_sda16_reloc
, /* special_function */
240 "R_M32R_SDA16", /* name */
241 true, /* partial_inplace */ /* FIXME: correct? */
242 0x0000ffff, /* src_mask */
243 0x0000ffff, /* dst_mask */
244 false), /* pcrel_offset */
247 /* Handle the R_M32R_10_PCREL reloc. */
249 static bfd_reloc_status_type
250 m32r_elf_10_pcrel_reloc (abfd
, reloc_entry
, symbol
, data
,
251 input_section
, output_bfd
, error_message
)
253 arelent
* reloc_entry
;
256 asection
* input_section
;
258 char ** error_message
;
260 /* This part is from bfd_elf_generic_reloc. */
261 if (output_bfd
!= (bfd
*) NULL
262 && (symbol
->flags
& BSF_SECTION_SYM
) == 0
263 && (! reloc_entry
->howto
->partial_inplace
264 || reloc_entry
->addend
== 0))
266 reloc_entry
->address
+= input_section
->output_offset
;
270 if (output_bfd
!= NULL
)
272 /* FIXME: See bfd_perform_relocation. Is this right? */
273 return bfd_reloc_continue
;
276 return m32r_elf_do_10_pcrel_reloc (abfd
, reloc_entry
->howto
,
278 data
, reloc_entry
->address
,
281 + symbol
->section
->output_section
->vma
282 + symbol
->section
->output_offset
),
283 reloc_entry
->addend
);
286 /* Utility to actually perform an R_M32R_10_PCREL reloc. */
288 static bfd_reloc_status_type
289 m32r_elf_do_10_pcrel_reloc (abfd
, howto
, input_section
, data
, offset
,
290 symbol_section
, symbol_value
, addend
)
292 reloc_howto_type
*howto
;
293 asection
*input_section
;
296 asection
*symbol_section
;
297 bfd_vma symbol_value
;
300 bfd_signed_vma relocation
;
302 bfd_reloc_status_type status
;
304 /* Sanity check the address (offset in section). */
305 if (offset
> input_section
->_cooked_size
)
306 return bfd_reloc_outofrange
;
308 relocation
= symbol_value
+ addend
;
309 /* Make it pc relative. */
310 relocation
-= (input_section
->output_section
->vma
311 + input_section
->output_offset
);
312 /* These jumps mask off the lower two bits of the current address
313 before doing pcrel calculations. */
314 relocation
-= (offset
& -4L);
316 if (relocation
< -0x200 || relocation
> 0x1ff)
317 status
= bfd_reloc_overflow
;
319 status
= bfd_reloc_ok
;
321 x
= bfd_get_16 (abfd
, data
+ offset
);
322 relocation
>>= howto
->rightshift
;
323 relocation
<<= howto
->bitpos
;
324 x
= (x
& ~howto
->dst_mask
) | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
);
325 bfd_put_16 (abfd
, x
, data
+ offset
);
330 /* Handle the R_M32R_HI16_[SU]LO relocs.
331 HI16_SLO is for the add3 and load/store with displacement instructions.
332 HI16_ULO is for the or3 instruction.
333 For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to
334 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
335 we must add one to the high 16 bytes (which will get subtracted off when
336 the low 16 bits are added).
337 These relocs have to be done in combination with an R_M32R_LO16 reloc
338 because there is a carry from the LO16 to the HI16. Here we just save
339 the information we need; we do the actual relocation when we see the LO16.
340 This code is copied from the elf32-mips.c. We also support an arbitrary
341 number of HI16 relocs to be associated with a single LO16 reloc. The
342 assembler sorts the relocs to ensure each HI16 immediately precedes its
343 LO16. However if there are multiple copies, the assembler may not find
344 the real LO16 so it picks the first one it finds. */
348 struct m32r_hi16
*next
;
353 /* FIXME: This should not be a static variable. */
355 static struct m32r_hi16
*m32r_hi16_list
;
357 static bfd_reloc_status_type
358 m32r_elf_hi16_reloc (abfd
, reloc_entry
, symbol
, data
,
359 input_section
, output_bfd
, error_message
)
361 arelent
*reloc_entry
;
364 asection
*input_section
;
366 char **error_message
;
368 bfd_reloc_status_type ret
;
372 /* This part is from bfd_elf_generic_reloc.
373 If we're relocating, and this an external symbol, we don't want
374 to change anything. */
375 if (output_bfd
!= (bfd
*) NULL
376 && (symbol
->flags
& BSF_SECTION_SYM
) == 0
377 && reloc_entry
->addend
== 0)
379 reloc_entry
->address
+= input_section
->output_offset
;
383 /* Sanity check the address (offset in section). */
384 if (reloc_entry
->address
> input_section
->_cooked_size
)
385 return bfd_reloc_outofrange
;
388 if (bfd_is_und_section (symbol
->section
)
389 && output_bfd
== (bfd
*) NULL
)
390 ret
= bfd_reloc_undefined
;
392 if (bfd_is_com_section (symbol
->section
))
395 relocation
= symbol
->value
;
397 relocation
+= symbol
->section
->output_section
->vma
;
398 relocation
+= symbol
->section
->output_offset
;
399 relocation
+= reloc_entry
->addend
;
401 /* Save the information, and let LO16 do the actual relocation. */
402 n
= (struct m32r_hi16
*) bfd_malloc (sizeof *n
);
404 return bfd_reloc_outofrange
;
405 n
->addr
= (bfd_byte
*) data
+ reloc_entry
->address
;
406 n
->addend
= relocation
;
407 n
->next
= m32r_hi16_list
;
410 if (output_bfd
!= (bfd
*) NULL
)
411 reloc_entry
->address
+= input_section
->output_offset
;
416 /* Handle an M32R ELF HI16 reloc. */
419 m32r_elf_relocate_hi16 (input_bfd
, type
, relhi
, rello
, contents
, addend
)
422 Elf_Internal_Rela
*relhi
;
423 Elf_Internal_Rela
*rello
;
430 insn
= bfd_get_32 (input_bfd
, contents
+ relhi
->r_offset
);
432 addlo
= bfd_get_32 (input_bfd
, contents
+ rello
->r_offset
);
433 if (type
== R_M32R_HI16_SLO
)
434 addlo
= ((addlo
& 0xffff) ^ 0x8000) - 0x8000;
438 addend
+= ((insn
& 0xffff) << 16) + addlo
;
440 /* Reaccount for sign extension of low part. */
441 if (type
== R_M32R_HI16_SLO
442 && (addend
& 0x8000) != 0)
445 bfd_put_32 (input_bfd
,
446 (insn
& 0xffff0000) | ((addend
>> 16) & 0xffff),
447 contents
+ relhi
->r_offset
);
450 /* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit
451 inplace relocation; this function exists in order to do the
452 R_M32R_HI16_[SU]LO relocation described above. */
454 bfd_reloc_status_type
455 m32r_elf_lo16_reloc (abfd
, reloc_entry
, symbol
, data
,
456 input_section
, output_bfd
, error_message
)
458 arelent
*reloc_entry
;
461 asection
*input_section
;
463 char **error_message
;
465 if (m32r_hi16_list
!= NULL
)
475 struct m32r_hi16
*next
;
477 /* Do the HI16 relocation. Note that we actually don't need
478 to know anything about the LO16 itself, except where to
479 find the low 16 bits of the addend needed by the LO16. */
480 insn
= bfd_get_32 (abfd
, l
->addr
);
481 vallo
= ((bfd_get_32 (abfd
, (bfd_byte
*) data
+ reloc_entry
->address
)
482 & 0xffff) ^ 0x8000) - 0x8000;
483 val
= ((insn
& 0xffff) << 16) + vallo
;
486 /* Reaccount for sign extension of low part. */
487 if ((val
& 0x8000) != 0)
490 insn
= (insn
&~ 0xffff) | ((val
>> 16) & 0xffff);
491 bfd_put_32 (abfd
, insn
, l
->addr
);
498 m32r_hi16_list
= NULL
;
501 /* Now do the LO16 reloc in the usual way. */
502 return bfd_elf_generic_reloc (abfd
, reloc_entry
, symbol
, data
,
503 input_section
, output_bfd
, error_message
);
506 /* Handle the R_M32R_SDA16 reloc.
507 This reloc is used to compute the address of objects in the small data area
508 and to perform loads and stores from that area.
509 The lower 16 bits are sign extended and added to the register specified
510 in the instruction, which is assumed to point to _SDA_BASE_. */
512 static bfd_reloc_status_type
513 m32r_elf_sda16_reloc (abfd
, reloc_entry
, symbol
, data
,
514 input_section
, output_bfd
, error_message
)
516 arelent
*reloc_entry
;
519 asection
*input_section
;
521 char **error_message
;
523 /* This part is from bfd_elf_generic_reloc. */
524 if (output_bfd
!= (bfd
*) NULL
525 && (symbol
->flags
& BSF_SECTION_SYM
) == 0
526 && (! reloc_entry
->howto
->partial_inplace
527 || reloc_entry
->addend
== 0))
529 reloc_entry
->address
+= input_section
->output_offset
;
533 if (output_bfd
!= NULL
)
535 /* FIXME: See bfd_perform_relocation. Is this right? */
536 return bfd_reloc_continue
;
539 /* FIXME: not sure what to do here yet. But then again, the linker
540 may never call us. */
544 /* Map BFD reloc types to M32R ELF reloc types. */
546 struct m32r_reloc_map
548 unsigned char bfd_reloc_val
;
549 unsigned char elf_reloc_val
;
552 static const struct m32r_reloc_map m32r_reloc_map
[] =
554 { BFD_RELOC_NONE
, R_M32R_NONE
},
555 { BFD_RELOC_16
, R_M32R_16
},
556 { BFD_RELOC_32
, R_M32R_32
},
557 { BFD_RELOC_M32R_24
, R_M32R_24
},
558 { BFD_RELOC_M32R_10_PCREL
, R_M32R_10_PCREL
},
559 { BFD_RELOC_M32R_18_PCREL
, R_M32R_18_PCREL
},
560 { BFD_RELOC_M32R_26_PCREL
, R_M32R_26_PCREL
},
561 { BFD_RELOC_M32R_HI16_ULO
, R_M32R_HI16_ULO
},
562 { BFD_RELOC_M32R_HI16_SLO
, R_M32R_HI16_SLO
},
563 { BFD_RELOC_M32R_LO16
, R_M32R_LO16
},
564 { BFD_RELOC_M32R_SDA16
, R_M32R_SDA16
},
567 static reloc_howto_type
*
568 bfd_elf32_bfd_reloc_type_lookup (abfd
, code
)
570 bfd_reloc_code_real_type code
;
575 i
< sizeof (m32r_reloc_map
) / sizeof (struct m32r_reloc_map
);
578 if (m32r_reloc_map
[i
].bfd_reloc_val
== code
)
579 return &m32r_elf_howto_table
[m32r_reloc_map
[i
].elf_reloc_val
];
585 /* Set the howto pointer for an M32R ELF reloc. */
588 m32r_info_to_howto_rel (abfd
, cache_ptr
, dst
)
591 Elf32_Internal_Rel
*dst
;
595 r_type
= ELF32_R_TYPE (dst
->r_info
);
596 BFD_ASSERT (r_type
< (unsigned int) R_M32R_max
);
597 cache_ptr
->howto
= &m32r_elf_howto_table
[r_type
];
600 /* Given a BFD section, try to locate the corresponding ELF section
604 _bfd_m32r_elf_section_from_bfd_section (abfd
, hdr
, sec
, retval
)
606 Elf32_Internal_Shdr
*hdr
;
610 if (strcmp (bfd_get_section_name (abfd
, sec
), ".scommon") == 0)
612 *retval
= SHN_M32R_SCOMMON
;
618 /* M32R ELF uses two common sections. One is the usual one, and the other
619 is for small objects. All the small objects are kept together, and then
620 referenced via one register, which yields faster assembler code. It is
621 up to the compiler to emit an instruction to load the register with
622 _SDA_BASE. This is what we use for the small common section. This
623 approach is copied from elf32-mips.c. */
624 static asection m32r_elf_scom_section
;
625 static asymbol m32r_elf_scom_symbol
;
626 static asymbol
*m32r_elf_scom_symbol_ptr
;
628 /* Handle the special M32R section numbers that a symbol may use. */
631 _bfd_m32r_elf_symbol_processing (abfd
, asym
)
635 elf_symbol_type
*elfsym
;
637 elfsym
= (elf_symbol_type
*) asym
;
639 switch (elfsym
->internal_elf_sym
.st_shndx
)
641 case SHN_M32R_SCOMMON
:
642 if (m32r_elf_scom_section
.name
== NULL
)
644 /* Initialize the small common section. */
645 m32r_elf_scom_section
.name
= ".scommon";
646 m32r_elf_scom_section
.flags
= SEC_IS_COMMON
;
647 m32r_elf_scom_section
.output_section
= &m32r_elf_scom_section
;
648 m32r_elf_scom_section
.symbol
= &m32r_elf_scom_symbol
;
649 m32r_elf_scom_section
.symbol_ptr_ptr
= &m32r_elf_scom_symbol_ptr
;
650 m32r_elf_scom_symbol
.name
= ".scommon";
651 m32r_elf_scom_symbol
.flags
= BSF_SECTION_SYM
;
652 m32r_elf_scom_symbol
.section
= &m32r_elf_scom_section
;
653 m32r_elf_scom_symbol_ptr
= &m32r_elf_scom_symbol
;
655 asym
->section
= &m32r_elf_scom_section
;
656 asym
->value
= elfsym
->internal_elf_sym
.st_size
;
661 /* Hook called by the linker routine which adds symbols from an object
662 file. We must handle the special M32R section numbers here.
663 We also keep watching for whether we need to create the sdata special
667 m32r_elf_add_symbol_hook (abfd
, info
, sym
, namep
, flagsp
, secp
, valp
)
669 struct bfd_link_info
*info
;
670 const Elf_Internal_Sym
*sym
;
676 if (! info
->relocateable
677 && (*namep
)[0] == '_' && (*namep
)[1] == 'S'
678 && strcmp (*namep
, "_SDA_BASE_") == 0)
680 /* This is simpler than using _bfd_elf_create_linker_section
681 (our needs are simpler than ppc's needs). Also
682 _bfd_elf_create_linker_section currently has a bug where if a .sdata
683 section already exists a new one is created that follows it which
684 screws of _SDA_BASE_ address calcs because output_offset != 0. */
685 struct elf_link_hash_entry
*h
;
686 asection
*s
= bfd_get_section_by_name (abfd
, ".sdata");
688 /* The following code was cobbled from elf32-ppc.c and elflink.c. */
692 int flags
= (SEC_ALLOC
| SEC_LOAD
| SEC_HAS_CONTENTS
693 | SEC_IN_MEMORY
| SEC_LINKER_CREATED
);
695 s
= bfd_make_section_anyway (abfd
, ".sdata");
698 bfd_set_section_flags (abfd
, s
, flags
);
699 bfd_set_section_alignment (abfd
, s
, 2);
702 h
= (struct elf_link_hash_entry
*)
703 bfd_link_hash_lookup (info
->hash
, "_SDA_BASE_", false, false, false);
705 if ((h
== NULL
|| h
->root
.type
== bfd_link_hash_undefined
)
706 && !(_bfd_generic_link_add_one_symbol (info
,
714 get_elf_backend_data (abfd
)->collect
,
715 (struct bfd_link_hash_entry
**) &h
)))
717 h
->type
= STT_OBJECT
;
720 switch (sym
->st_shndx
)
722 case SHN_M32R_SCOMMON
:
723 *secp
= bfd_make_section_old_way (abfd
, ".scommon");
724 (*secp
)->flags
|= SEC_IS_COMMON
;
725 *valp
= sym
->st_size
;
732 /* We have to figure out the SDA_BASE value, so that we can adjust the
733 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
734 BFD. If we can't find it, we're stuck. We cache it in the ELF
735 target data. We don't need to adjust the symbol value for an
736 external symbol if we are producing relocateable output. */
738 static bfd_reloc_status_type
739 m32r_elf_final_sda_base (output_bfd
, info
, error_message
, psb
)
741 struct bfd_link_info
*info
;
742 const char **error_message
;
745 if (elf_gp (output_bfd
) == 0)
747 struct bfd_link_hash_entry
*h
;
749 h
= bfd_link_hash_lookup (info
->hash
, "_SDA_BASE_", false, false, true);
750 if (h
!= (struct bfd_link_hash_entry
*) NULL
751 && h
->type
== bfd_link_hash_defined
)
752 elf_gp (output_bfd
) = (h
->u
.def
.value
753 + h
->u
.def
.section
->output_section
->vma
754 + h
->u
.def
.section
->output_offset
);
757 /* Only get the error once. */
758 *psb
= elf_gp (output_bfd
) = 4;
760 (const char *) _("SDA relocation when _SDA_BASE_ not defined");
761 return bfd_reloc_dangerous
;
764 *psb
= elf_gp (output_bfd
);
768 /* Relocate an M32R/D ELF section.
769 There is some attempt to make this function usable for many architectures,
770 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
771 if only to serve as a learning tool.
773 The RELOCATE_SECTION function is called by the new ELF backend linker
774 to handle the relocations for a section.
776 The relocs are always passed as Rela structures; if the section
777 actually uses Rel structures, the r_addend field will always be
780 This function is responsible for adjust the section contents as
781 necessary, and (if using Rela relocs and generating a
782 relocateable output file) adjusting the reloc addend as
785 This function does not have to worry about setting the reloc
786 address or the reloc symbol index.
788 LOCAL_SYMS is a pointer to the swapped in local symbols.
790 LOCAL_SECTIONS is an array giving the section in the input file
791 corresponding to the st_shndx field of each local symbol.
793 The global hash table entry for the global symbols can be found
794 via elf_sym_hashes (input_bfd).
796 When generating relocateable output, this function must handle
797 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
798 going to be the section symbol corresponding to the output
799 section, which means that the addend must be adjusted
803 m32r_elf_relocate_section (output_bfd
, info
, input_bfd
, input_section
,
804 contents
, relocs
, local_syms
, local_sections
)
806 struct bfd_link_info
*info
;
808 asection
*input_section
;
810 Elf_Internal_Rela
*relocs
;
811 Elf_Internal_Sym
*local_syms
;
812 asection
**local_sections
;
814 Elf_Internal_Shdr
*symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
815 struct elf_link_hash_entry
**sym_hashes
= elf_sym_hashes (input_bfd
);
816 Elf_Internal_Rela
*rel
, *relend
;
817 /* Assume success. */
821 relend
= relocs
+ input_section
->reloc_count
;
822 for (; rel
< relend
; rel
++)
825 reloc_howto_type
*howto
;
826 unsigned long r_symndx
;
827 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
828 ensure it's zero (we use REL relocs, not RELA). Therefore this
829 should be assigning zero to `addend', but for clarity we use
831 bfd_vma addend
= rel
->r_addend
;
832 bfd_vma offset
= rel
->r_offset
;
833 struct elf_link_hash_entry
*h
;
834 Elf_Internal_Sym
*sym
;
836 const char *sym_name
;
837 bfd_reloc_status_type r
;
838 const char *errmsg
= NULL
;
841 r_type
= ELF32_R_TYPE (rel
->r_info
);
842 if (r_type
< 0 || r_type
>= (int) R_M32R_max
)
844 (*_bfd_error_handler
) (_("%s: unknown relocation type %d"),
845 bfd_get_filename (input_bfd
),
847 bfd_set_error (bfd_error_bad_value
);
852 howto
= m32r_elf_howto_table
+ r_type
;
853 r_symndx
= ELF32_R_SYM (rel
->r_info
);
855 if (info
->relocateable
)
857 /* This is a relocateable link. We don't have to change
858 anything, unless the reloc is against a section symbol,
859 in which case we have to adjust according to where the
860 section symbol winds up in the output section. */
862 if (r_symndx
>= symtab_hdr
->sh_info
)
864 /* External symbol. */
869 sym
= local_syms
+ r_symndx
;
870 sym_name
= "<local symbol>";
871 /* STT_SECTION: symbol is associated with a section. */
872 if (ELF_ST_TYPE (sym
->st_info
) != STT_SECTION
)
874 /* Symbol isn't associated with a section. Nothing to do. */
878 sec
= local_sections
[r_symndx
];
879 addend
+= sec
->output_offset
+ sym
->st_value
;
881 /* This can't be done for USE_REL because it doesn't mean anything
882 and elf_link_input_bfd asserts this stays zero. */
883 rel
->r_addend
= addend
;
887 /* Addends are stored with relocs. We're done. */
890 /* If partial_inplace, we need to store any additional addend
891 back in the section. */
892 if (! howto
->partial_inplace
)
894 /* ??? Here is a nice place to call a special_function
896 if (r_type
!= R_M32R_HI16_SLO
&& r_type
!= R_M32R_HI16_ULO
)
897 r
= _bfd_relocate_contents (howto
, input_bfd
,
898 addend
, contents
+ offset
);
901 Elf_Internal_Rela
*lorel
;
903 /* We allow an arbitrary number of HI16 relocs before the
904 LO16 reloc. This permits gcc to emit the HI and LO relocs
906 for (lorel
= rel
+ 1;
908 && (ELF32_R_TYPE (lorel
->r_info
) == R_M32R_HI16_SLO
909 || ELF32_R_TYPE (lorel
->r_info
) == R_M32R_HI16_ULO
));
913 && ELF32_R_TYPE (lorel
->r_info
) == R_M32R_LO16
)
915 m32r_elf_relocate_hi16 (input_bfd
, r_type
, rel
, lorel
,
920 r
= _bfd_relocate_contents (howto
, input_bfd
,
921 addend
, contents
+ offset
);
929 /* This is a final link. */
933 if (r_symndx
< symtab_hdr
->sh_info
)
936 sym
= local_syms
+ r_symndx
;
937 sec
= local_sections
[r_symndx
];
938 sym_name
= "<local symbol>";
939 relocation
= (sec
->output_section
->vma
945 /* External symbol. */
946 h
= sym_hashes
[r_symndx
- symtab_hdr
->sh_info
];
947 while (h
->root
.type
== bfd_link_hash_indirect
948 || h
->root
.type
== bfd_link_hash_warning
)
949 h
= (struct elf_link_hash_entry
*) h
->root
.u
.i
.link
;
950 sym_name
= h
->root
.root
.string
;
952 if (h
->root
.type
== bfd_link_hash_defined
953 || h
->root
.type
== bfd_link_hash_defweak
)
955 sec
= h
->root
.u
.def
.section
;
956 if (sec
->output_section
== NULL
)
959 relocation
= (h
->root
.u
.def
.value
960 + sec
->output_section
->vma
961 + sec
->output_offset
);
963 else if (h
->root
.type
== bfd_link_hash_undefweak
)
967 if (! ((*info
->callbacks
->undefined_symbol
)
968 (info
, h
->root
.root
.string
, input_bfd
,
969 input_section
, offset
)))
975 /* Sanity check the address. */
976 if (offset
> input_section
->_raw_size
)
978 r
= bfd_reloc_outofrange
;
982 switch ((int) r_type
)
984 case (int) R_M32R_10_PCREL
:
985 r
= m32r_elf_do_10_pcrel_reloc (input_bfd
, howto
, input_section
,
987 sec
, relocation
, addend
);
990 case (int) R_M32R_HI16_SLO
:
991 case (int) R_M32R_HI16_ULO
:
993 Elf_Internal_Rela
*lorel
;
995 /* We allow an arbitrary number of HI16 relocs before the
996 LO16 reloc. This permits gcc to emit the HI and LO relocs
998 for (lorel
= rel
+ 1;
1000 && (ELF32_R_TYPE (lorel
->r_info
) == R_M32R_HI16_SLO
1001 || ELF32_R_TYPE (lorel
->r_info
) == R_M32R_HI16_ULO
));
1005 && ELF32_R_TYPE (lorel
->r_info
) == R_M32R_LO16
)
1007 m32r_elf_relocate_hi16 (input_bfd
, r_type
, rel
, lorel
,
1008 contents
, relocation
+ addend
);
1012 r
= _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
1014 relocation
, addend
);
1018 case (int) R_M32R_SDA16
:
1022 BFD_ASSERT (sec
!= NULL
);
1023 name
= bfd_get_section_name (abfd
, sec
);
1025 if (strcmp (name
, ".sdata") == 0
1026 || strcmp (name
, ".sbss") == 0
1027 || strcmp (name
, ".scommon") == 0)
1030 bfd
*out_bfd
= sec
->output_section
->owner
;
1032 r
= m32r_elf_final_sda_base (out_bfd
, info
,
1035 if (r
!= bfd_reloc_ok
)
1041 /* At this point `relocation' contains the object's
1043 relocation
-= sda_base
;
1044 /* Now it contains the offset from _SDA_BASE_. */
1048 (*_bfd_error_handler
) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
1049 bfd_get_filename (input_bfd
),
1051 m32r_elf_howto_table
[(int) r_type
].name
,
1052 bfd_get_section_name (abfd
, sec
));
1053 /*bfd_set_error (bfd_error_bad_value); ??? why? */
1061 r
= _bfd_final_link_relocate (howto
, input_bfd
, input_section
,
1063 relocation
, addend
);
1070 if (r
!= bfd_reloc_ok
)
1072 /* FIXME: This should be generic enough to go in a utility. */
1076 name
= h
->root
.root
.string
;
1079 name
= (bfd_elf_string_from_elf_section
1080 (input_bfd
, symtab_hdr
->sh_link
, sym
->st_name
));
1081 if (name
== NULL
|| *name
== '\0')
1082 name
= bfd_section_name (input_bfd
, sec
);
1090 case bfd_reloc_overflow
:
1091 if (! ((*info
->callbacks
->reloc_overflow
)
1092 (info
, name
, howto
->name
, (bfd_vma
) 0,
1093 input_bfd
, input_section
, offset
)))
1097 case bfd_reloc_undefined
:
1098 if (! ((*info
->callbacks
->undefined_symbol
)
1099 (info
, name
, input_bfd
, input_section
,
1104 case bfd_reloc_outofrange
:
1105 errmsg
= _("internal error: out of range error");
1108 case bfd_reloc_notsupported
:
1109 errmsg
= _("internal error: unsupported relocation error");
1112 case bfd_reloc_dangerous
:
1113 errmsg
= _("internal error: dangerous error");
1117 errmsg
= _("internal error: unknown error");
1121 if (!((*info
->callbacks
->warning
)
1122 (info
, errmsg
, name
, input_bfd
, input_section
,
1133 #if 0 /* relaxing not supported yet */
1135 /* This function handles relaxing for the m32r.
1136 Relaxing on the m32r is tricky because of instruction alignment
1137 requirements (4 byte instructions must be aligned on 4 byte boundaries).
1139 The following relaxing opportunities are handled:
1141 seth/add3/jl -> bl24 or bl8
1144 It would be nice to handle bl24 -> bl8 but given:
1146 - 4 byte insns must be on 4 byte boundaries
1147 - branch instructions only branch to insns on 4 byte boundaries
1149 this isn't much of a win because the insn in the 2 "deleted" bytes
1150 must become a nop. With some complexity some real relaxation could be
1151 done but the frequency just wouldn't make it worth it; it's better to
1152 try to do all the code compaction one can elsewhere.
1153 When the chip supports parallel 16 bit insns, things may change.
1157 m32r_elf_relax_section (abfd
, sec
, link_info
, again
)
1160 struct bfd_link_info
*link_info
;
1163 Elf_Internal_Shdr
*symtab_hdr
;
1164 /* The Rela structures are used here because that's what
1165 _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend
1167 Elf_Internal_Rela
*internal_relocs
;
1168 Elf_Internal_Rela
*free_relocs
= NULL
;
1169 Elf_Internal_Rela
*irel
, *irelend
;
1170 bfd_byte
*contents
= NULL
;
1171 bfd_byte
*free_contents
= NULL
;
1172 Elf32_External_Sym
*extsyms
= NULL
;
1173 Elf32_External_Sym
*free_extsyms
= NULL
;
1175 /* Assume nothing changes. */
1178 /* We don't have to do anything for a relocateable link, if
1179 this section does not have relocs, or if this is not a
1181 if (link_info
->relocateable
1182 || (sec
->flags
& SEC_RELOC
) == 0
1183 || sec
->reloc_count
== 0
1184 || (sec
->flags
& SEC_CODE
) == 0
1185 || 0 /* FIXME: check SHF_M32R_CAN_RELAX */)
1188 /* If this is the first time we have been called for this section,
1189 initialize the cooked size. */
1190 if (sec
->_cooked_size
== 0)
1191 sec
->_cooked_size
= sec
->_raw_size
;
1193 symtab_hdr
= &elf_tdata (abfd
)->symtab_hdr
;
1195 /* Get a copy of the native relocations. */
1196 internal_relocs
= (_bfd_elf32_link_read_relocs
1197 (abfd
, sec
, (PTR
) NULL
, (Elf_Internal_Rela
*) NULL
,
1198 link_info
->keep_memory
));
1199 if (internal_relocs
== NULL
)
1201 if (! link_info
->keep_memory
)
1202 free_relocs
= internal_relocs
;
1204 /* Walk through them looking for relaxing opportunities. */
1205 irelend
= internal_relocs
+ sec
->reloc_count
;
1206 for (irel
= internal_relocs
; irel
< irelend
; irel
++)
1210 /* If this isn't something that can be relaxed, then ignore
1212 if (ELF32_R_TYPE (irel
->r_info
) != (int) R_M32R_HI16_SLO
)
1215 /* Get the section contents if we haven't done so already. */
1216 if (contents
== NULL
)
1218 /* Get cached copy if it exists. */
1219 if (elf_section_data (sec
)->this_hdr
.contents
!= NULL
)
1220 contents
= elf_section_data (sec
)->this_hdr
.contents
;
1223 /* Go get them off disk. */
1224 contents
= (bfd_byte
*) bfd_malloc (sec
->_raw_size
);
1225 if (contents
== NULL
)
1227 free_contents
= contents
;
1229 if (! bfd_get_section_contents (abfd
, sec
, contents
,
1230 (file_ptr
) 0, sec
->_raw_size
))
1235 /* Read this BFD's symbols if we haven't done so already. */
1236 if (extsyms
== NULL
)
1238 /* Get cached copy if it exists. */
1239 if (symtab_hdr
->contents
!= NULL
)
1240 extsyms
= (Elf32_External_Sym
*) symtab_hdr
->contents
;
1243 /* Go get them off disk. */
1244 extsyms
= ((Elf32_External_Sym
*)
1245 bfd_malloc (symtab_hdr
->sh_size
));
1246 if (extsyms
== NULL
)
1248 free_extsyms
= extsyms
;
1249 if (bfd_seek (abfd
, symtab_hdr
->sh_offset
, SEEK_SET
) != 0
1250 || (bfd_read (extsyms
, 1, symtab_hdr
->sh_size
, abfd
)
1251 != symtab_hdr
->sh_size
))
1256 /* Get the value of the symbol referred to by the reloc. */
1257 if (ELF32_R_SYM (irel
->r_info
) < symtab_hdr
->sh_info
)
1259 Elf_Internal_Sym isym
;
1262 /* A local symbol. */
1263 bfd_elf32_swap_symbol_in (abfd
,
1264 extsyms
+ ELF32_R_SYM (irel
->r_info
),
1267 sym_sec
= bfd_section_from_elf_index (abfd
, isym
.st_shndx
);
1268 symval
= (isym
.st_value
1269 + sym_sec
->output_section
->vma
1270 + sym_sec
->output_offset
);
1275 struct elf_link_hash_entry
*h
;
1277 /* An external symbol. */
1278 indx
= ELF32_R_SYM (irel
->r_info
) - symtab_hdr
->sh_info
;
1279 h
= elf_sym_hashes (abfd
)[indx
];
1280 BFD_ASSERT (h
!= NULL
);
1281 if (h
->root
.type
!= bfd_link_hash_defined
1282 && h
->root
.type
!= bfd_link_hash_defweak
)
1284 /* This appears to be a reference to an undefined
1285 symbol. Just ignore it--it will be caught by the
1286 regular reloc processing. */
1290 symval
= (h
->root
.u
.def
.value
1291 + h
->root
.u
.def
.section
->output_section
->vma
1292 + h
->root
.u
.def
.section
->output_offset
);
1295 /* For simplicity of coding, we are going to modify the section
1296 contents, the section relocs, and the BFD symbol table. We
1297 must tell the rest of the code not to free up this
1298 information. It would be possible to instead create a table
1299 of changes which have to be made, as is done in coff-mips.c;
1300 that would be more work, but would require less memory when
1301 the linker is run. */
1303 /* Try to change a seth/add3/jl subroutine call to bl24 or bl8.
1304 This sequence is generated by the compiler when compiling in
1305 32 bit mode. Also look for seth/add3 -> ld24. */
1307 if (ELF32_R_TYPE (irel
->r_info
) == (int) R_M32R_HI16_SLO
)
1309 Elf_Internal_Rela
*nrel
;
1310 bfd_vma pc
= (sec
->output_section
->vma
+ sec
->output_offset
1312 bfd_signed_vma pcrel_value
= symval
- pc
;
1313 unsigned int code
,reg
;
1314 int addend
,nop_p
,bl8_p
,to_delete
;
1316 /* The tests are ordered so that we get out as quickly as possible
1317 if this isn't something we can relax, taking into account that
1318 we are looking for two separate possibilities (jl/ld24). */
1320 /* Do nothing if no room in the section for this to be what we're
1322 if (irel
->r_offset
> sec
->_cooked_size
- 8)
1325 /* Make sure the next relocation applies to the next
1326 instruction and that it's the add3's reloc. */
1329 || irel
->r_offset
+ 4 != nrel
->r_offset
1330 || ELF32_R_TYPE (nrel
->r_info
) != (int) R_M32R_LO16
)
1333 /* See if the instructions are seth/add3. */
1334 /* FIXME: This is where macros from cgen can come in. */
1335 code
= bfd_get_16 (abfd
, contents
+ irel
->r_offset
+ 0);
1336 if ((code
& 0xf0ff) != 0xd0c0)
1337 continue; /* not seth rN,foo */
1338 reg
= (code
& 0x0f00) >> 8;
1339 code
= bfd_get_16 (abfd
, contents
+ irel
->r_offset
+ 4);
1340 if (code
!= (0x80a0 | reg
| (reg
<< 8)))
1341 continue; /* not add3 rN,rN,foo */
1343 /* At this point we've confirmed we have seth/add3. Now check
1344 whether the next insn is a jl, in which case try to change this
1347 /* Ensure the branch target is in range.
1348 The bl24 instruction has a 24 bit operand which is the target
1349 address right shifted by 2, giving a signed range of 26 bits.
1350 Note that 4 bytes are added to the high value because the target
1351 will be at least 4 bytes closer if we can relax. It'll actually
1352 be 4 or 8 bytes closer, but we don't know which just yet and
1353 the difference isn't significant enough to worry about. */
1354 #ifndef USE_REL /* put in for learning purposes */
1355 pcrel_value
+= irel
->r_addend
;
1357 addend
= bfd_get_signed_16 (abfd
, contents
+ irel
->r_offset
+ 2);
1358 pcrel_value
+= addend
;
1361 if (pcrel_value
>= -(1 << 25) && pcrel_value
< (1 << 25) + 4
1362 /* Do nothing if no room in the section for this to be what we're
1364 && (irel
->r_offset
<= sec
->_cooked_size
- 12)
1365 /* Ensure the next insn is "jl rN". */
1366 && ((code
= bfd_get_16 (abfd
, contents
+ irel
->r_offset
+ 8)),
1367 code
!= (0x1ec0 | reg
)))
1369 /* We can relax to bl24/bl8. */
1371 /* See if there's a nop following the jl.
1372 Also see if we can use a bl8 insn. */
1373 code
= bfd_get_16 (abfd
, contents
+ irel
->r_offset
+ 10);
1374 nop_p
= (code
& 0x7fff) == NOP_INSN
;
1375 bl8_p
= pcrel_value
>= -0x200 && pcrel_value
< 0x200;
1379 /* Change "seth rN,foo" to "bl8 foo || nop".
1380 We OR in CODE just in case it's not a nop (technically,
1381 CODE currently must be a nop, but for cleanness we
1382 allow it to be anything). */
1383 #ifndef USE_REL /* put in for learning purposes */
1384 code
= 0x7e000000 | MAKE_PARALLEL (code
);
1386 code
= (0x7e000000 + (((addend
>> 2) & 0xff) << 16)) | MAKE_PARALLEL (code
);
1392 /* Change the seth rN,foo to a bl24 foo. */
1393 #ifndef USE_REL /* put in for learning purposes */
1396 code
= 0xfe000000 + ((addend
>> 2) & 0xffffff);
1398 to_delete
= nop_p
? 8 : 4;
1401 bfd_put_32 (abfd
, code
, contents
+ irel
->r_offset
);
1403 /* Set the new reloc type. */
1404 irel
->r_info
= ELF32_R_INFO (ELF32_R_SYM (nrel
->r_info
),
1405 bl8_p
? R_M32R_10_PCREL
: R_M32R_26_PCREL
);
1407 /* Delete the add3 reloc by making it a null reloc. */
1408 nrel
->r_info
= ELF32_R_INFO (ELF32_R_SYM (nrel
->r_info
),
1411 else if (addend
>= 0
1412 && symval
+ addend
<= 0xffffff)
1414 /* We can relax to ld24. */
1416 code
= 0xe0000000 | (reg
<< 24) | (addend
& 0xffffff);
1417 bfd_put_32 (abfd
, code
, contents
+ irel
->r_offset
);
1419 /* Tell the following code a nop filler isn't needed. */
1424 /* Can't do anything here. */
1428 /* Note that we've changed the relocs, section contents, etc. */
1429 elf_section_data (sec
)->relocs
= internal_relocs
;
1432 elf_section_data (sec
)->this_hdr
.contents
= contents
;
1433 free_contents
= NULL
;
1435 symtab_hdr
->contents
= (bfd_byte
*) extsyms
;
1436 free_extsyms
= NULL
;
1438 /* Delete TO_DELETE bytes of data. */
1439 if (!m32r_elf_relax_delete_bytes (abfd
, sec
,
1440 irel
->r_offset
+ 4, to_delete
))
1443 /* Now that the following bytes have been moved into place, see if
1444 we need to replace the jl with a nop. This happens when we had
1445 to use a bl24 insn and the insn following the jl isn't a nop.
1446 Technically, this situation can't happen (since the insn can
1447 never be executed) but to be clean we do this. When the chip
1448 supports parallel 16 bit insns things may change.
1449 We don't need to do this in the case of relaxing to ld24,
1450 and the above code sets nop_p so this isn't done. */
1451 if (! nop_p
&& to_delete
== 4)
1452 bfd_put_16 (abfd
, NOP_INSN
, contents
+ irel
->r_offset
+ 4);
1454 /* That will change things, so we should relax again.
1455 Note that this is not required, and it may be slow. */
1461 /* loop to try the next reloc */
1464 if (free_relocs
!= NULL
)
1470 if (free_contents
!= NULL
)
1472 if (! link_info
->keep_memory
)
1473 free (free_contents
);
1476 /* Cache the section contents for elf_link_input_bfd. */
1477 elf_section_data (sec
)->this_hdr
.contents
= contents
;
1479 free_contents
= NULL
;
1482 if (free_extsyms
!= NULL
)
1484 if (! link_info
->keep_memory
)
1485 free (free_extsyms
);
1488 /* Cache the symbols for elf_link_input_bfd. */
1489 symtab_hdr
->contents
= extsyms
;
1491 free_extsyms
= NULL
;
1497 if (free_relocs
!= NULL
)
1499 if (free_contents
!= NULL
)
1500 free (free_contents
);
1501 if (free_extsyms
!= NULL
)
1502 free (free_extsyms
);
1506 /* Delete some bytes from a section while relaxing. */
1509 m32r_elf_relax_delete_bytes (abfd
, sec
, addr
, count
)
1515 Elf_Internal_Shdr
*symtab_hdr
;
1516 Elf32_External_Sym
*extsyms
;
1519 Elf_Internal_Rela
*irel
, *irelend
;
1520 Elf_Internal_Rela
*irelalign
;
1522 Elf32_External_Sym
*esym
, *esymend
;
1523 struct elf_link_hash_entry
*sym_hash
;
1525 symtab_hdr
= &elf_tdata (abfd
)->symtab_hdr
;
1526 extsyms
= (Elf32_External_Sym
*) symtab_hdr
->contents
;
1528 shndx
= _bfd_elf_section_from_bfd_section (abfd
, sec
);
1530 contents
= elf_section_data (sec
)->this_hdr
.contents
;
1532 /* The deletion must stop at the next ALIGN reloc for an aligment
1533 power larger than the number of bytes we are deleting. */
1536 toaddr
= sec
->_cooked_size
;
1538 irel
= elf_section_data (sec
)->relocs
;
1539 irelend
= irel
+ sec
->reloc_count
;
1541 /* Actually delete the bytes. */
1542 memmove (contents
+ addr
, contents
+ addr
+ count
, toaddr
- addr
- count
);
1543 sec
->_cooked_size
-= count
;
1545 /* Adjust all the relocs. */
1546 for (irel
= elf_section_data (sec
)->relocs
; irel
< irelend
; irel
++)
1548 /* Get the new reloc address. */
1549 if ((irel
->r_offset
> addr
1550 && irel
->r_offset
< toaddr
))
1551 irel
->r_offset
-= count
;
1554 /* Adjust the local symbols defined in this section. */
1556 esymend
= esym
+ symtab_hdr
->sh_info
;
1557 for (; esym
< esymend
; esym
++)
1559 Elf_Internal_Sym isym
;
1561 bfd_elf32_swap_symbol_in (abfd
, esym
, &isym
);
1563 if (isym
.st_shndx
== shndx
1564 && isym
.st_value
> addr
1565 && isym
.st_value
< toaddr
)
1567 isym
.st_value
-= count
;
1568 bfd_elf32_swap_symbol_out (abfd
, &isym
, esym
);
1572 /* Now adjust the global symbols defined in this section. */
1573 esym
= extsyms
+ symtab_hdr
->sh_info
;
1574 esymend
= extsyms
+ (symtab_hdr
->sh_size
/ sizeof (Elf32_External_Sym
));
1575 for (index
= 0; esym
< esymend
; esym
++, index
++)
1577 Elf_Internal_Sym isym
;
1579 bfd_elf32_swap_symbol_in (abfd
, esym
, &isym
);
1580 sym_hash
= elf_sym_hashes (abfd
)[index
];
1581 if (isym
.st_shndx
== shndx
1582 && ((sym_hash
)->root
.type
== bfd_link_hash_defined
1583 || (sym_hash
)->root
.type
== bfd_link_hash_defweak
)
1584 && (sym_hash
)->root
.u
.def
.section
== sec
1585 && (sym_hash
)->root
.u
.def
.value
> addr
1586 && (sym_hash
)->root
.u
.def
.value
< toaddr
)
1588 (sym_hash
)->root
.u
.def
.value
-= count
;
1595 /* This is a version of bfd_generic_get_relocated_section_contents
1596 which uses m32r_elf_relocate_section. */
1599 m32r_elf_get_relocated_section_contents (output_bfd
, link_info
, link_order
,
1600 data
, relocateable
, symbols
)
1602 struct bfd_link_info
*link_info
;
1603 struct bfd_link_order
*link_order
;
1605 boolean relocateable
;
1608 Elf_Internal_Shdr
*symtab_hdr
;
1609 asection
*input_section
= link_order
->u
.indirect
.section
;
1610 bfd
*input_bfd
= input_section
->owner
;
1611 asection
**sections
= NULL
;
1612 Elf_Internal_Rela
*internal_relocs
= NULL
;
1613 Elf32_External_Sym
*external_syms
= NULL
;
1614 Elf_Internal_Sym
*internal_syms
= NULL
;
1616 /* We only need to handle the case of relaxing, or of having a
1617 particular set of section contents, specially. */
1619 || elf_section_data (input_section
)->this_hdr
.contents
== NULL
)
1620 return bfd_generic_get_relocated_section_contents (output_bfd
, link_info
,
1625 symtab_hdr
= &elf_tdata (input_bfd
)->symtab_hdr
;
1627 memcpy (data
, elf_section_data (input_section
)->this_hdr
.contents
,
1628 input_section
->_raw_size
);
1630 if ((input_section
->flags
& SEC_RELOC
) != 0
1631 && input_section
->reloc_count
> 0)
1633 Elf_Internal_Sym
*isymp
;
1635 Elf32_External_Sym
*esym
, *esymend
;
1637 if (symtab_hdr
->contents
!= NULL
)
1638 external_syms
= (Elf32_External_Sym
*) symtab_hdr
->contents
;
1641 external_syms
= ((Elf32_External_Sym
*)
1642 bfd_malloc (symtab_hdr
->sh_info
1643 * sizeof (Elf32_External_Sym
)));
1644 if (external_syms
== NULL
&& symtab_hdr
->sh_info
> 0)
1646 if (bfd_seek (input_bfd
, symtab_hdr
->sh_offset
, SEEK_SET
) != 0
1647 || (bfd_read (external_syms
, sizeof (Elf32_External_Sym
),
1648 symtab_hdr
->sh_info
, input_bfd
)
1649 != (symtab_hdr
->sh_info
* sizeof (Elf32_External_Sym
))))
1653 internal_relocs
= (_bfd_elf32_link_read_relocs
1654 (input_bfd
, input_section
, (PTR
) NULL
,
1655 (Elf_Internal_Rela
*) NULL
, false));
1656 if (internal_relocs
== NULL
)
1659 internal_syms
= ((Elf_Internal_Sym
*)
1660 bfd_malloc (symtab_hdr
->sh_info
1661 * sizeof (Elf_Internal_Sym
)));
1662 if (internal_syms
== NULL
&& symtab_hdr
->sh_info
> 0)
1665 sections
= (asection
**) bfd_malloc (symtab_hdr
->sh_info
1666 * sizeof (asection
*));
1667 if (sections
== NULL
&& symtab_hdr
->sh_info
> 0)
1670 isymp
= internal_syms
;
1672 esym
= external_syms
;
1673 esymend
= esym
+ symtab_hdr
->sh_info
;
1674 for (; esym
< esymend
; ++esym
, ++isymp
, ++secpp
)
1678 bfd_elf32_swap_symbol_in (input_bfd
, esym
, isymp
);
1680 if (isymp
->st_shndx
== SHN_UNDEF
)
1681 isec
= bfd_und_section_ptr
;
1682 else if (isymp
->st_shndx
> 0 && isymp
->st_shndx
< SHN_LORESERVE
)
1683 isec
= bfd_section_from_elf_index (input_bfd
, isymp
->st_shndx
);
1684 else if (isymp
->st_shndx
== SHN_ABS
)
1685 isec
= bfd_abs_section_ptr
;
1686 else if (isymp
->st_shndx
== SHN_COMMON
)
1687 isec
= bfd_com_section_ptr
;
1688 else if (isymp
->st_shndx
== SHN_M32R_SCOMMON
)
1689 isec
= &m32r_elf_scom_section
;
1699 if (! m32r_elf_relocate_section (output_bfd
, link_info
, input_bfd
,
1700 input_section
, data
, internal_relocs
,
1701 internal_syms
, sections
))
1704 if (sections
!= NULL
)
1707 if (internal_syms
!= NULL
)
1708 free (internal_syms
);
1709 internal_syms
= NULL
;
1710 if (external_syms
!= NULL
&& symtab_hdr
->contents
== NULL
)
1711 free (external_syms
);
1712 external_syms
= NULL
;
1713 if (internal_relocs
!= elf_section_data (input_section
)->relocs
)
1714 free (internal_relocs
);
1715 internal_relocs
= NULL
;
1721 if (internal_relocs
!= NULL
1722 && internal_relocs
!= elf_section_data (input_section
)->relocs
)
1723 free (internal_relocs
);
1724 if (external_syms
!= NULL
&& symtab_hdr
->contents
== NULL
)
1725 free (external_syms
);
1726 if (internal_syms
!= NULL
)
1727 free (internal_syms
);
1728 if (sections
!= NULL
)
1735 /* Set the right machine number. */
1737 m32r_elf_object_p (abfd
)
1740 switch (elf_elfheader (abfd
)->e_flags
& EF_M32R_ARCH
)
1743 case E_M32R_ARCH
: (void) bfd_default_set_arch_mach (abfd
, bfd_arch_m32r
, bfd_mach_m32r
); break;
1744 /* start-sanitize-m32rx */
1745 case E_M32RX_ARCH
: (void) bfd_default_set_arch_mach (abfd
, bfd_arch_m32r
, bfd_mach_m32rx
); break;
1746 /* end-sanitize-m32rx */
1751 /* Store the machine number in the flags field. */
1753 m32r_elf_final_write_processing (abfd
, linker
)
1759 switch (bfd_get_mach (abfd
))
1762 case bfd_mach_m32r
: val
= E_M32R_ARCH
; break;
1763 /* start-sanitize-m32rx */
1764 case bfd_mach_m32rx
: val
= E_M32RX_ARCH
; break;
1765 /* end-sanitize-m32rx */
1768 elf_elfheader (abfd
)->e_flags
&=~ EF_M32R_ARCH
;
1769 elf_elfheader (abfd
)->e_flags
|= val
;
1772 /* Function to keep M32R specific file flags. */
1774 m32r_elf_set_private_flags (abfd
, flags
)
1778 BFD_ASSERT (!elf_flags_init (abfd
)
1779 || elf_elfheader (abfd
)->e_flags
== flags
);
1781 elf_elfheader (abfd
)->e_flags
= flags
;
1782 elf_flags_init (abfd
) = true;
1786 /* Copy backend specific data from one object module to another */
1788 m32r_elf_copy_private_bfd_data (ibfd
, obfd
)
1792 if ( bfd_get_flavour (ibfd
) != bfd_target_elf_flavour
1793 || bfd_get_flavour (obfd
) != bfd_target_elf_flavour
)
1796 BFD_ASSERT (!elf_flags_init (obfd
)
1797 || (elf_elfheader (obfd
)->e_flags
1798 == elf_elfheader (ibfd
)->e_flags
));
1800 elf_gp (obfd
) = elf_gp (ibfd
);
1801 elf_elfheader (obfd
)->e_flags
= elf_elfheader (ibfd
)->e_flags
;
1802 elf_flags_init (obfd
) = true;
1806 /* Merge backend specific data from an object file to the output
1807 object file when linking. */
1809 m32r_elf_merge_private_bfd_data (ibfd
, obfd
)
1816 if ( bfd_get_flavour (ibfd
) != bfd_target_elf_flavour
1817 || bfd_get_flavour (obfd
) != bfd_target_elf_flavour
)
1820 in_flags
= elf_elfheader (ibfd
)->e_flags
;
1821 out_flags
= elf_elfheader (obfd
)->e_flags
;
1823 if (! elf_flags_init (obfd
))
1825 /* If the input is the default architecture then do not
1826 bother setting the flags for the output architecture,
1827 instead allow future merges to do this. If no future
1828 merges ever set these flags then they will retain their
1829 unitialised values, which surprise surprise, correspond
1830 to the default values. */
1831 if (bfd_get_arch_info (ibfd
)->the_default
)
1834 elf_flags_init (obfd
) = true;
1835 elf_elfheader (obfd
)->e_flags
= in_flags
;
1837 if (bfd_get_arch (obfd
) == bfd_get_arch (ibfd
)
1838 && bfd_get_arch_info (obfd
)->the_default
)
1840 return bfd_set_arch_mach (obfd
, bfd_get_arch (ibfd
), bfd_get_mach (ibfd
));
1846 /* Check flag compatibility. */
1847 if (in_flags
== out_flags
)
1850 if ((in_flags
& EF_M32R_ARCH
) != (out_flags
& EF_M32R_ARCH
))
1852 if ((in_flags
& EF_M32R_ARCH
) != E_M32R_ARCH
)
1854 _bfd_error_handler (_("%s: Instruction set mismatch with previous modules"),
1855 bfd_get_filename (ibfd
));
1857 bfd_set_error (bfd_error_bad_value
);
1865 /* Display the flags field */
1867 m32r_elf_print_private_bfd_data (abfd
, ptr
)
1871 FILE * file
= (FILE *) ptr
;
1873 BFD_ASSERT (abfd
!= NULL
&& ptr
!= NULL
)
1875 _bfd_elf_print_private_bfd_data (abfd
, ptr
);
1877 fprintf (file
, _("private flags = %lx"), elf_elfheader (abfd
)->e_flags
);
1879 switch (elf_elfheader (abfd
)->e_flags
& EF_M32R_ARCH
)
1882 case E_M32R_ARCH
: fprintf (file
, _(": m32r instructions")); break;
1883 /* start-sanitize-m32rx */
1884 case E_M32RX_ARCH
: fprintf (file
, _(": m32rx instructions")); break;
1885 /* end-sanitize-m32rx */
1895 #define ELF_ARCH bfd_arch_m32r
1896 #define ELF_MACHINE_CODE EM_CYGNUS_M32R
1897 #define ELF_MAXPAGESIZE 0x1000
1899 #define TARGET_BIG_SYM bfd_elf32_m32r_vec
1900 #define TARGET_BIG_NAME "elf32-m32r"
1902 #define elf_info_to_howto 0
1903 #define elf_info_to_howto_rel m32r_info_to_howto_rel
1904 #define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section
1905 #define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing
1906 #define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook
1907 #define elf_backend_relocate_section m32r_elf_relocate_section
1911 #define bfd_elf32_bfd_relax_section m32r_elf_relax_section
1912 #define bfd_elf32_bfd_get_relocated_section_contents \
1913 m32r_elf_get_relocated_section_contents
1916 #define elf_backend_object_p m32r_elf_object_p
1917 #define elf_backend_final_write_processing m32r_elf_final_write_processing
1918 #define bfd_elf32_bfd_copy_private_bfd_data m32r_elf_copy_private_bfd_data
1919 #define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data
1920 #define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags
1921 #define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data
1923 #include "elf32-target.h"