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ubsan: wasm: shift is too large for 64-bit type 'bfd_vma'
[deliverable/binutils-gdb.git] / bfd / elf32-rx.c
1 /* Renesas RX specific support for 32-bit ELF.
2 Copyright (C) 2008-2019 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "bfd.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/rx.h"
26 #include "libiberty.h"
27 #include "elf32-rx.h"
28
29 #define RX_OPCODE_BIG_ENDIAN 0
30
31 /* This is a meta-target that's used only with objcopy, to avoid the
32 endian-swap we would otherwise get. We check for this in
33 rx_elf_object_p(). */
34 const bfd_target rx_elf32_be_ns_vec;
35 const bfd_target rx_elf32_be_vec;
36
37 #ifdef DEBUG
38 char * rx_get_reloc (long);
39 void rx_dump_symtab (bfd *, void *, void *);
40 #endif
41
42 #define RXREL(n,sz,bit,shift,complain,pcrel) \
43 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
44 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
45
46 /* Note that the relocations around 0x7f are internal to this file;
47 feel free to move them as needed to avoid conflicts with published
48 relocation numbers. */
49
50 static reloc_howto_type rx_elf_howto_table [] =
51 {
52 RXREL (NONE, 3, 0, 0, dont, FALSE),
53 RXREL (DIR32, 2, 32, 0, signed, FALSE),
54 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
55 RXREL (DIR16, 1, 16, 0, dont, FALSE),
56 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
57 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
58 RXREL (DIR8, 0, 8, 0, dont, FALSE),
59 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
60 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
61 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
62 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
63 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
64 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
65 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
66 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
67 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
68 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
69 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
70 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
71
72 EMPTY_HOWTO (0x13),
73 EMPTY_HOWTO (0x14),
74 EMPTY_HOWTO (0x15),
75 EMPTY_HOWTO (0x16),
76 EMPTY_HOWTO (0x17),
77 EMPTY_HOWTO (0x18),
78 EMPTY_HOWTO (0x19),
79 EMPTY_HOWTO (0x1a),
80 EMPTY_HOWTO (0x1b),
81 EMPTY_HOWTO (0x1c),
82 EMPTY_HOWTO (0x1d),
83 EMPTY_HOWTO (0x1e),
84 EMPTY_HOWTO (0x1f),
85
86 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
87 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
88 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
89 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
90 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
91 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
92 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
93 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
94 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
95 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
96 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
97 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
98 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
99 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
100
101 EMPTY_HOWTO (0x2e),
102 EMPTY_HOWTO (0x2f),
103 EMPTY_HOWTO (0x30),
104 EMPTY_HOWTO (0x31),
105 EMPTY_HOWTO (0x32),
106 EMPTY_HOWTO (0x33),
107 EMPTY_HOWTO (0x34),
108 EMPTY_HOWTO (0x35),
109 EMPTY_HOWTO (0x36),
110 EMPTY_HOWTO (0x37),
111 EMPTY_HOWTO (0x38),
112 EMPTY_HOWTO (0x39),
113 EMPTY_HOWTO (0x3a),
114 EMPTY_HOWTO (0x3b),
115 EMPTY_HOWTO (0x3c),
116 EMPTY_HOWTO (0x3d),
117 EMPTY_HOWTO (0x3e),
118 EMPTY_HOWTO (0x3f),
119 EMPTY_HOWTO (0x40),
120
121 RXREL (ABS32, 2, 32, 0, dont, FALSE),
122 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
123 RXREL (ABS16, 1, 16, 0, dont, FALSE),
124 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
125 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
126 RXREL (ABS8, 0, 8, 0, dont, FALSE),
127 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
128 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
129 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
130 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
131 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
132 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
133 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
134 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
135 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
136 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
137 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
138
139 #define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
140
141 EMPTY_HOWTO (0x52),
142 EMPTY_HOWTO (0x53),
143 EMPTY_HOWTO (0x54),
144 EMPTY_HOWTO (0x55),
145 EMPTY_HOWTO (0x56),
146 EMPTY_HOWTO (0x57),
147 EMPTY_HOWTO (0x58),
148 EMPTY_HOWTO (0x59),
149 EMPTY_HOWTO (0x5a),
150 EMPTY_HOWTO (0x5b),
151 EMPTY_HOWTO (0x5c),
152 EMPTY_HOWTO (0x5d),
153 EMPTY_HOWTO (0x5e),
154 EMPTY_HOWTO (0x5f),
155 EMPTY_HOWTO (0x60),
156 EMPTY_HOWTO (0x61),
157 EMPTY_HOWTO (0x62),
158 EMPTY_HOWTO (0x63),
159 EMPTY_HOWTO (0x64),
160 EMPTY_HOWTO (0x65),
161 EMPTY_HOWTO (0x66),
162 EMPTY_HOWTO (0x67),
163 EMPTY_HOWTO (0x68),
164 EMPTY_HOWTO (0x69),
165 EMPTY_HOWTO (0x6a),
166 EMPTY_HOWTO (0x6b),
167 EMPTY_HOWTO (0x6c),
168 EMPTY_HOWTO (0x6d),
169 EMPTY_HOWTO (0x6e),
170 EMPTY_HOWTO (0x6f),
171 EMPTY_HOWTO (0x70),
172 EMPTY_HOWTO (0x71),
173 EMPTY_HOWTO (0x72),
174 EMPTY_HOWTO (0x73),
175 EMPTY_HOWTO (0x74),
176 EMPTY_HOWTO (0x75),
177 EMPTY_HOWTO (0x76),
178 EMPTY_HOWTO (0x77),
179
180 /* These are internal. */
181 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
182 /* ---- ---- 4--- 3210. */
183 #define R_RX_RH_ABS5p8B 0x78
184 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
185 #define R_RX_RH_ABS5p8W 0x79
186 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
187 #define R_RX_RH_ABS5p8L 0x7a
188 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
189 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
190 /* ---- -432 1--- 0---. */
191 #define R_RX_RH_ABS5p5B 0x7b
192 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
193 #define R_RX_RH_ABS5p5W 0x7c
194 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
195 #define R_RX_RH_ABS5p5L 0x7d
196 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
197 /* A 4-bit unsigned immediate at bit position 8. */
198 #define R_RX_RH_UIMM4p8 0x7e
199 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
200 /* A 4-bit negative unsigned immediate at bit position 8. */
201 #define R_RX_RH_UNEG4p8 0x7f
202 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
203 /* End of internal relocs. */
204
205 RXREL (SYM, 2, 32, 0, dont, FALSE),
206 RXREL (OPneg, 2, 32, 0, dont, FALSE),
207 RXREL (OPadd, 2, 32, 0, dont, FALSE),
208 RXREL (OPsub, 2, 32, 0, dont, FALSE),
209 RXREL (OPmul, 2, 32, 0, dont, FALSE),
210 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
211 RXREL (OPshla, 2, 32, 0, dont, FALSE),
212 RXREL (OPshra, 2, 32, 0, dont, FALSE),
213 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
214 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
215 RXREL (OPand, 2, 32, 0, dont, FALSE),
216 RXREL (OPor, 2, 32, 0, dont, FALSE),
217 RXREL (OPxor, 2, 32, 0, dont, FALSE),
218 RXREL (OPnot, 2, 32, 0, dont, FALSE),
219 RXREL (OPmod, 2, 32, 0, dont, FALSE),
220 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
221 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
222 };
223 \f
224 /* Map BFD reloc types to RX ELF reloc types. */
225
226 struct rx_reloc_map
227 {
228 bfd_reloc_code_real_type bfd_reloc_val;
229 unsigned int rx_reloc_val;
230 };
231
232 static const struct rx_reloc_map rx_reloc_map [] =
233 {
234 { BFD_RELOC_NONE, R_RX_NONE },
235 { BFD_RELOC_8, R_RX_DIR8S },
236 { BFD_RELOC_16, R_RX_DIR16S },
237 { BFD_RELOC_24, R_RX_DIR24S },
238 { BFD_RELOC_32, R_RX_DIR32 },
239 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
240 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
241 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
242 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
243 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
244 { BFD_RELOC_RX_8U, R_RX_DIR8U },
245 { BFD_RELOC_RX_16U, R_RX_DIR16U },
246 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
247 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
248 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
249 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
250 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
251 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
252 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
253 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
254 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
255 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
256 { BFD_RELOC_RX_SYM, R_RX_SYM },
257 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
258 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
259 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
260 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
261 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
262 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
263 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
264 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
265 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
266 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
267 };
268
269 #define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
270
271 static reloc_howto_type *
272 rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
273 bfd_reloc_code_real_type code)
274 {
275 unsigned int i;
276
277 if (code == BFD_RELOC_RX_32_OP)
278 return rx_elf_howto_table + R_RX_DIR32;
279
280 for (i = ARRAY_SIZE (rx_reloc_map); i--;)
281 if (rx_reloc_map [i].bfd_reloc_val == code)
282 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
283
284 return NULL;
285 }
286
287 static reloc_howto_type *
288 rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
289 {
290 unsigned int i;
291
292 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
293 if (rx_elf_howto_table[i].name != NULL
294 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
295 return rx_elf_howto_table + i;
296
297 return NULL;
298 }
299
300 /* Set the howto pointer for an RX ELF reloc. */
301
302 static bfd_boolean
303 rx_info_to_howto_rela (bfd * abfd,
304 arelent * cache_ptr,
305 Elf_Internal_Rela * dst)
306 {
307 unsigned int r_type;
308
309 r_type = ELF32_R_TYPE (dst->r_info);
310 if (r_type >= (unsigned int) R_RX_max)
311 {
312 /* xgettext:c-format */
313 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
314 abfd, r_type);
315 bfd_set_error (bfd_error_bad_value);
316 return FALSE;
317 }
318 cache_ptr->howto = rx_elf_howto_table + r_type;
319 if (cache_ptr->howto->name == NULL)
320 {
321 /* xgettext:c-format */
322 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
323 abfd, r_type);
324 bfd_set_error (bfd_error_bad_value);
325 return FALSE;
326 }
327 return TRUE;
328 }
329 \f
330 static bfd_vma
331 get_symbol_value (const char * name,
332 struct bfd_link_info * info,
333 bfd * input_bfd,
334 asection * input_section,
335 int offset)
336 {
337 bfd_vma value = 0;
338 struct bfd_link_hash_entry * h;
339
340 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
341
342 if (h == NULL
343 || (h->type != bfd_link_hash_defined
344 && h->type != bfd_link_hash_defweak))
345 (*info->callbacks->undefined_symbol)
346 (info, name, input_bfd, input_section, offset, TRUE);
347 else
348 value = (h->u.def.value
349 + h->u.def.section->output_section->vma
350 + h->u.def.section->output_offset);
351
352 return value;
353 }
354
355 static bfd_vma
356 get_symbol_value_maybe (const char * name,
357 struct bfd_link_info * info)
358 {
359 bfd_vma value = 0;
360 struct bfd_link_hash_entry * h;
361
362 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
363
364 if (h == NULL
365 || (h->type != bfd_link_hash_defined
366 && h->type != bfd_link_hash_defweak))
367 return 0;
368 else
369 value = (h->u.def.value
370 + h->u.def.section->output_section->vma
371 + h->u.def.section->output_offset);
372
373 return value;
374 }
375
376 static bfd_vma
377 get_gp (struct bfd_link_info * info,
378 bfd * abfd,
379 asection * sec,
380 int offset)
381 {
382 static bfd_boolean cached = FALSE;
383 static bfd_vma cached_value = 0;
384
385 if (!cached)
386 {
387 cached_value = get_symbol_value ("__gp", info, abfd, sec, offset);
388 cached = TRUE;
389 }
390 return cached_value;
391 }
392
393 static bfd_vma
394 get_romstart (struct bfd_link_info * info,
395 bfd * abfd,
396 asection * sec,
397 int offset)
398 {
399 static bfd_boolean cached = FALSE;
400 static bfd_vma cached_value = 0;
401
402 if (!cached)
403 {
404 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
405 cached = TRUE;
406 }
407 return cached_value;
408 }
409
410 static bfd_vma
411 get_ramstart (struct bfd_link_info * info,
412 bfd * abfd,
413 asection * sec,
414 int offset)
415 {
416 static bfd_boolean cached = FALSE;
417 static bfd_vma cached_value = 0;
418
419 if (!cached)
420 {
421 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
422 cached = TRUE;
423 }
424 return cached_value;
425 }
426
427 #define NUM_STACK_ENTRIES 16
428 static int32_t rx_stack [ NUM_STACK_ENTRIES ];
429 static unsigned int rx_stack_top;
430
431 #define RX_STACK_PUSH(val) \
432 do \
433 { \
434 if (rx_stack_top < NUM_STACK_ENTRIES) \
435 rx_stack [rx_stack_top ++] = (val); \
436 else \
437 r = bfd_reloc_dangerous; \
438 } \
439 while (0)
440
441 #define RX_STACK_POP(dest) \
442 do \
443 { \
444 if (rx_stack_top > 0) \
445 (dest) = rx_stack [-- rx_stack_top]; \
446 else \
447 (dest) = 0, r = bfd_reloc_dangerous; \
448 } \
449 while (0)
450
451 /* Relocate an RX ELF section.
452 There is some attempt to make this function usable for many architectures,
453 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
454 if only to serve as a learning tool.
455
456 The RELOCATE_SECTION function is called by the new ELF backend linker
457 to handle the relocations for a section.
458
459 The relocs are always passed as Rela structures; if the section
460 actually uses Rel structures, the r_addend field will always be
461 zero.
462
463 This function is responsible for adjusting the section contents as
464 necessary, and (if using Rela relocs and generating a relocatable
465 output file) adjusting the reloc addend as necessary.
466
467 This function does not have to worry about setting the reloc
468 address or the reloc symbol index.
469
470 LOCAL_SYMS is a pointer to the swapped in local symbols.
471
472 LOCAL_SECTIONS is an array giving the section in the input file
473 corresponding to the st_shndx field of each local symbol.
474
475 The global hash table entry for the global symbols can be found
476 via elf_sym_hashes (input_bfd).
477
478 When generating relocatable output, this function must handle
479 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
480 going to be the section symbol corresponding to the output
481 section, which means that the addend must be adjusted
482 accordingly. */
483
484 static bfd_boolean
485 rx_elf_relocate_section
486 (bfd * output_bfd,
487 struct bfd_link_info * info,
488 bfd * input_bfd,
489 asection * input_section,
490 bfd_byte * contents,
491 Elf_Internal_Rela * relocs,
492 Elf_Internal_Sym * local_syms,
493 asection ** local_sections)
494 {
495 Elf_Internal_Shdr * symtab_hdr;
496 struct elf_link_hash_entry ** sym_hashes;
497 Elf_Internal_Rela * rel;
498 Elf_Internal_Rela * relend;
499 bfd_boolean pid_mode;
500 bfd_boolean saw_subtract = FALSE;
501 const char * table_default_cache = NULL;
502 bfd_vma table_start_cache = 0;
503 bfd_vma table_end_cache = 0;
504
505 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID)
506 pid_mode = TRUE;
507 else
508 pid_mode = FALSE;
509
510 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
511 sym_hashes = elf_sym_hashes (input_bfd);
512 relend = relocs + input_section->reloc_count;
513 for (rel = relocs; rel < relend; rel ++)
514 {
515 reloc_howto_type * howto;
516 unsigned long r_symndx;
517 Elf_Internal_Sym * sym;
518 asection * sec;
519 struct elf_link_hash_entry * h;
520 bfd_vma relocation;
521 bfd_reloc_status_type r;
522 const char * name = NULL;
523 bfd_boolean unresolved_reloc = TRUE;
524 int r_type;
525
526 r_type = ELF32_R_TYPE (rel->r_info);
527 r_symndx = ELF32_R_SYM (rel->r_info);
528
529 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
530 h = NULL;
531 sym = NULL;
532 sec = NULL;
533 relocation = 0;
534
535 if (rx_stack_top == 0)
536 saw_subtract = FALSE;
537
538 if (r_symndx < symtab_hdr->sh_info)
539 {
540 sym = local_syms + r_symndx;
541 sec = local_sections [r_symndx];
542 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
543
544 name = bfd_elf_string_from_elf_section
545 (input_bfd, symtab_hdr->sh_link, sym->st_name);
546 name = sym->st_name == 0 ? bfd_section_name (sec) : name;
547 }
548 else
549 {
550 bfd_boolean warned, ignored;
551
552 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
553 r_symndx, symtab_hdr, sym_hashes, h,
554 sec, relocation, unresolved_reloc,
555 warned, ignored);
556
557 name = h->root.root.string;
558 }
559
560 if (strncmp (name, "$tableentry$default$", 20) == 0)
561 {
562 bfd_vma entry_vma;
563 int idx;
564 char *buf;
565
566 if (table_default_cache != name)
567 {
568
569 /* All relocs for a given table should be to the same
570 (weak) default symbol) so we can use it to detect a
571 cache miss. We use the offset into the table to find
572 the "real" symbol. Calculate and store the table's
573 offset here. */
574
575 table_default_cache = name;
576
577 /* We have already done error checking in rx_table_find(). */
578
579 buf = (char *) malloc (13 + strlen (name + 20));
580
581 sprintf (buf, "$tablestart$%s", name + 20);
582 table_start_cache = get_symbol_value (buf,
583 info,
584 input_bfd,
585 input_section,
586 rel->r_offset);
587
588 sprintf (buf, "$tableend$%s", name + 20);
589 table_end_cache = get_symbol_value (buf,
590 info,
591 input_bfd,
592 input_section,
593 rel->r_offset);
594
595 free (buf);
596 }
597
598 entry_vma = (input_section->output_section->vma
599 + input_section->output_offset
600 + rel->r_offset);
601
602 if (table_end_cache <= entry_vma || entry_vma < table_start_cache)
603 {
604 /* xgettext:c-format */
605 _bfd_error_handler (_("%pB:%pA: table entry %s outside table"),
606 input_bfd, input_section,
607 name);
608 }
609 else if ((int) (entry_vma - table_start_cache) % 4)
610 {
611 /* xgettext:c-format */
612 _bfd_error_handler (_("%pB:%pA: table entry %s not word-aligned within table"),
613 input_bfd, input_section,
614 name);
615 }
616 else
617 {
618 idx = (int) (entry_vma - table_start_cache) / 4;
619
620 /* This will look like $tableentry$<N>$<name> */
621 buf = (char *) malloc (12 + 20 + strlen (name + 20));
622 sprintf (buf, "$tableentry$%d$%s", idx, name + 20);
623
624 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, FALSE, FALSE, TRUE);
625
626 if (h)
627 {
628 relocation = (h->root.u.def.value
629 + h->root.u.def.section->output_section->vma
630 + h->root.u.def.section->output_offset);;
631 }
632
633 free (buf);
634 }
635 }
636
637 if (sec != NULL && discarded_section (sec))
638 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
639 rel, 1, relend, howto, 0, contents);
640
641 if (bfd_link_relocatable (info))
642 {
643 /* This is a relocatable link. We don't have to change
644 anything, unless the reloc is against a section symbol,
645 in which case we have to adjust according to where the
646 section symbol winds up in the output section. */
647 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
648 rel->r_addend += sec->output_offset;
649 continue;
650 }
651
652 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
653 /* If the symbol is undefined and weak
654 then the relocation resolves to zero. */
655 relocation = 0;
656 else
657 {
658 if (howto->pc_relative)
659 {
660 relocation -= (input_section->output_section->vma
661 + input_section->output_offset
662 + rel->r_offset);
663 if (r_type != R_RX_RH_3_PCREL
664 && r_type != R_RX_DIR3U_PCREL)
665 relocation ++;
666 }
667
668 relocation += rel->r_addend;
669 }
670
671 r = bfd_reloc_ok;
672
673 #define RANGE(a,b) \
674 if (a > (long) relocation || (long) relocation > b) \
675 r = bfd_reloc_overflow
676 #define ALIGN(m) \
677 if (relocation & m) \
678 r = bfd_reloc_other
679 #define OP(i) \
680 (contents[rel->r_offset + (i)])
681 #define WARN_REDHAT(type) \
682 /* xgettext:c-format */ \
683 _bfd_error_handler \
684 (_("%pB:%pA: warning: deprecated Red Hat reloc " \
685 "%s detected against: %s"), \
686 input_bfd, input_section, #type, name)
687
688 /* Check for unsafe relocs in PID mode. These are any relocs where
689 an absolute address is being computed. There are special cases
690 for relocs against symbols that are known to be referenced in
691 crt0.o before the PID base address register has been initialised. */
692 #define UNSAFE_FOR_PID \
693 do \
694 { \
695 if (pid_mode \
696 && sec != NULL \
697 && sec->flags & SEC_READONLY \
698 && !(input_section->flags & SEC_DEBUGGING) \
699 && strcmp (name, "__pid_base") != 0 \
700 && strcmp (name, "__gp") != 0 \
701 && strcmp (name, "__romdatastart") != 0 \
702 && !saw_subtract) \
703 /* xgettext:c-format */ \
704 _bfd_error_handler (_("%pB(%pA): unsafe PID relocation %s " \
705 "at %#" PRIx64 " (against %s in %s)"), \
706 input_bfd, input_section, howto->name, \
707 (uint64_t) (input_section->output_section->vma \
708 + input_section->output_offset \
709 + rel->r_offset), \
710 name, sec->name); \
711 } \
712 while (0)
713
714 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
715 switch (r_type)
716 {
717 case R_RX_NONE:
718 break;
719
720 case R_RX_RH_RELAX:
721 break;
722
723 case R_RX_RH_3_PCREL:
724 WARN_REDHAT ("RX_RH_3_PCREL");
725 RANGE (3, 10);
726 OP (0) &= 0xf8;
727 OP (0) |= relocation & 0x07;
728 break;
729
730 case R_RX_RH_8_NEG:
731 WARN_REDHAT ("RX_RH_8_NEG");
732 relocation = - relocation;
733 /* Fall through. */
734 case R_RX_DIR8S_PCREL:
735 UNSAFE_FOR_PID;
736 RANGE (-128, 127);
737 OP (0) = relocation;
738 break;
739
740 case R_RX_DIR8S:
741 UNSAFE_FOR_PID;
742 RANGE (-128, 255);
743 OP (0) = relocation;
744 break;
745
746 case R_RX_DIR8U:
747 UNSAFE_FOR_PID;
748 RANGE (0, 255);
749 OP (0) = relocation;
750 break;
751
752 case R_RX_RH_16_NEG:
753 WARN_REDHAT ("RX_RH_16_NEG");
754 relocation = - relocation;
755 /* Fall through. */
756 case R_RX_DIR16S_PCREL:
757 UNSAFE_FOR_PID;
758 RANGE (-32768, 32767);
759 #if RX_OPCODE_BIG_ENDIAN
760 #else
761 OP (0) = relocation;
762 OP (1) = relocation >> 8;
763 #endif
764 break;
765
766 case R_RX_RH_16_OP:
767 WARN_REDHAT ("RX_RH_16_OP");
768 UNSAFE_FOR_PID;
769 RANGE (-32768, 32767);
770 #if RX_OPCODE_BIG_ENDIAN
771 OP (1) = relocation;
772 OP (0) = relocation >> 8;
773 #else
774 OP (0) = relocation;
775 OP (1) = relocation >> 8;
776 #endif
777 break;
778
779 case R_RX_DIR16S:
780 UNSAFE_FOR_PID;
781 RANGE (-32768, 65535);
782 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
783 {
784 OP (1) = relocation;
785 OP (0) = relocation >> 8;
786 }
787 else
788 {
789 OP (0) = relocation;
790 OP (1) = relocation >> 8;
791 }
792 break;
793
794 case R_RX_DIR16U:
795 UNSAFE_FOR_PID;
796 RANGE (0, 65536);
797 #if RX_OPCODE_BIG_ENDIAN
798 OP (1) = relocation;
799 OP (0) = relocation >> 8;
800 #else
801 OP (0) = relocation;
802 OP (1) = relocation >> 8;
803 #endif
804 break;
805
806 case R_RX_DIR16:
807 UNSAFE_FOR_PID;
808 RANGE (-32768, 65536);
809 #if RX_OPCODE_BIG_ENDIAN
810 OP (1) = relocation;
811 OP (0) = relocation >> 8;
812 #else
813 OP (0) = relocation;
814 OP (1) = relocation >> 8;
815 #endif
816 break;
817
818 case R_RX_DIR16_REV:
819 UNSAFE_FOR_PID;
820 RANGE (-32768, 65536);
821 #if RX_OPCODE_BIG_ENDIAN
822 OP (0) = relocation;
823 OP (1) = relocation >> 8;
824 #else
825 OP (1) = relocation;
826 OP (0) = relocation >> 8;
827 #endif
828 break;
829
830 case R_RX_DIR3U_PCREL:
831 RANGE (3, 10);
832 OP (0) &= 0xf8;
833 OP (0) |= relocation & 0x07;
834 break;
835
836 case R_RX_RH_24_NEG:
837 UNSAFE_FOR_PID;
838 WARN_REDHAT ("RX_RH_24_NEG");
839 relocation = - relocation;
840 /* Fall through. */
841 case R_RX_DIR24S_PCREL:
842 RANGE (-0x800000, 0x7fffff);
843 #if RX_OPCODE_BIG_ENDIAN
844 OP (2) = relocation;
845 OP (1) = relocation >> 8;
846 OP (0) = relocation >> 16;
847 #else
848 OP (0) = relocation;
849 OP (1) = relocation >> 8;
850 OP (2) = relocation >> 16;
851 #endif
852 break;
853
854 case R_RX_RH_24_OP:
855 UNSAFE_FOR_PID;
856 WARN_REDHAT ("RX_RH_24_OP");
857 RANGE (-0x800000, 0x7fffff);
858 #if RX_OPCODE_BIG_ENDIAN
859 OP (2) = relocation;
860 OP (1) = relocation >> 8;
861 OP (0) = relocation >> 16;
862 #else
863 OP (0) = relocation;
864 OP (1) = relocation >> 8;
865 OP (2) = relocation >> 16;
866 #endif
867 break;
868
869 case R_RX_DIR24S:
870 UNSAFE_FOR_PID;
871 RANGE (-0x800000, 0x7fffff);
872 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
873 {
874 OP (2) = relocation;
875 OP (1) = relocation >> 8;
876 OP (0) = relocation >> 16;
877 }
878 else
879 {
880 OP (0) = relocation;
881 OP (1) = relocation >> 8;
882 OP (2) = relocation >> 16;
883 }
884 break;
885
886 case R_RX_RH_24_UNS:
887 UNSAFE_FOR_PID;
888 WARN_REDHAT ("RX_RH_24_UNS");
889 RANGE (0, 0xffffff);
890 #if RX_OPCODE_BIG_ENDIAN
891 OP (2) = relocation;
892 OP (1) = relocation >> 8;
893 OP (0) = relocation >> 16;
894 #else
895 OP (0) = relocation;
896 OP (1) = relocation >> 8;
897 OP (2) = relocation >> 16;
898 #endif
899 break;
900
901 case R_RX_RH_32_NEG:
902 UNSAFE_FOR_PID;
903 WARN_REDHAT ("RX_RH_32_NEG");
904 relocation = - relocation;
905 #if RX_OPCODE_BIG_ENDIAN
906 OP (3) = relocation;
907 OP (2) = relocation >> 8;
908 OP (1) = relocation >> 16;
909 OP (0) = relocation >> 24;
910 #else
911 OP (0) = relocation;
912 OP (1) = relocation >> 8;
913 OP (2) = relocation >> 16;
914 OP (3) = relocation >> 24;
915 #endif
916 break;
917
918 case R_RX_RH_32_OP:
919 UNSAFE_FOR_PID;
920 WARN_REDHAT ("RX_RH_32_OP");
921 #if RX_OPCODE_BIG_ENDIAN
922 OP (3) = relocation;
923 OP (2) = relocation >> 8;
924 OP (1) = relocation >> 16;
925 OP (0) = relocation >> 24;
926 #else
927 OP (0) = relocation;
928 OP (1) = relocation >> 8;
929 OP (2) = relocation >> 16;
930 OP (3) = relocation >> 24;
931 #endif
932 break;
933
934 case R_RX_DIR32:
935 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
936 {
937 OP (3) = relocation;
938 OP (2) = relocation >> 8;
939 OP (1) = relocation >> 16;
940 OP (0) = relocation >> 24;
941 }
942 else
943 {
944 OP (0) = relocation;
945 OP (1) = relocation >> 8;
946 OP (2) = relocation >> 16;
947 OP (3) = relocation >> 24;
948 }
949 break;
950
951 case R_RX_DIR32_REV:
952 if (BIGE (output_bfd))
953 {
954 OP (0) = relocation;
955 OP (1) = relocation >> 8;
956 OP (2) = relocation >> 16;
957 OP (3) = relocation >> 24;
958 }
959 else
960 {
961 OP (3) = relocation;
962 OP (2) = relocation >> 8;
963 OP (1) = relocation >> 16;
964 OP (0) = relocation >> 24;
965 }
966 break;
967
968 case R_RX_RH_DIFF:
969 {
970 bfd_vma val;
971 WARN_REDHAT ("RX_RH_DIFF");
972 val = bfd_get_32 (output_bfd, & OP (0));
973 val -= relocation;
974 bfd_put_32 (output_bfd, val, & OP (0));
975 }
976 break;
977
978 case R_RX_RH_GPRELB:
979 WARN_REDHAT ("RX_RH_GPRELB");
980 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
981 RANGE (0, 65535);
982 #if RX_OPCODE_BIG_ENDIAN
983 OP (1) = relocation;
984 OP (0) = relocation >> 8;
985 #else
986 OP (0) = relocation;
987 OP (1) = relocation >> 8;
988 #endif
989 break;
990
991 case R_RX_RH_GPRELW:
992 WARN_REDHAT ("RX_RH_GPRELW");
993 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
994 ALIGN (1);
995 relocation >>= 1;
996 RANGE (0, 65535);
997 #if RX_OPCODE_BIG_ENDIAN
998 OP (1) = relocation;
999 OP (0) = relocation >> 8;
1000 #else
1001 OP (0) = relocation;
1002 OP (1) = relocation >> 8;
1003 #endif
1004 break;
1005
1006 case R_RX_RH_GPRELL:
1007 WARN_REDHAT ("RX_RH_GPRELL");
1008 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
1009 ALIGN (3);
1010 relocation >>= 2;
1011 RANGE (0, 65535);
1012 #if RX_OPCODE_BIG_ENDIAN
1013 OP (1) = relocation;
1014 OP (0) = relocation >> 8;
1015 #else
1016 OP (0) = relocation;
1017 OP (1) = relocation >> 8;
1018 #endif
1019 break;
1020
1021 /* Internal relocations just for relaxation: */
1022 case R_RX_RH_ABS5p5B:
1023 RX_STACK_POP (relocation);
1024 RANGE (0, 31);
1025 OP (0) &= 0xf8;
1026 OP (0) |= relocation >> 2;
1027 OP (1) &= 0x77;
1028 OP (1) |= (relocation << 6) & 0x80;
1029 OP (1) |= (relocation << 3) & 0x08;
1030 break;
1031
1032 case R_RX_RH_ABS5p5W:
1033 RX_STACK_POP (relocation);
1034 RANGE (0, 62);
1035 ALIGN (1);
1036 relocation >>= 1;
1037 OP (0) &= 0xf8;
1038 OP (0) |= relocation >> 2;
1039 OP (1) &= 0x77;
1040 OP (1) |= (relocation << 6) & 0x80;
1041 OP (1) |= (relocation << 3) & 0x08;
1042 break;
1043
1044 case R_RX_RH_ABS5p5L:
1045 RX_STACK_POP (relocation);
1046 RANGE (0, 124);
1047 ALIGN (3);
1048 relocation >>= 2;
1049 OP (0) &= 0xf8;
1050 OP (0) |= relocation >> 2;
1051 OP (1) &= 0x77;
1052 OP (1) |= (relocation << 6) & 0x80;
1053 OP (1) |= (relocation << 3) & 0x08;
1054 break;
1055
1056 case R_RX_RH_ABS5p8B:
1057 RX_STACK_POP (relocation);
1058 RANGE (0, 31);
1059 OP (0) &= 0x70;
1060 OP (0) |= (relocation << 3) & 0x80;
1061 OP (0) |= relocation & 0x0f;
1062 break;
1063
1064 case R_RX_RH_ABS5p8W:
1065 RX_STACK_POP (relocation);
1066 RANGE (0, 62);
1067 ALIGN (1);
1068 relocation >>= 1;
1069 OP (0) &= 0x70;
1070 OP (0) |= (relocation << 3) & 0x80;
1071 OP (0) |= relocation & 0x0f;
1072 break;
1073
1074 case R_RX_RH_ABS5p8L:
1075 RX_STACK_POP (relocation);
1076 RANGE (0, 124);
1077 ALIGN (3);
1078 relocation >>= 2;
1079 OP (0) &= 0x70;
1080 OP (0) |= (relocation << 3) & 0x80;
1081 OP (0) |= relocation & 0x0f;
1082 break;
1083
1084 case R_RX_RH_UIMM4p8:
1085 RANGE (0, 15);
1086 OP (0) &= 0x0f;
1087 OP (0) |= relocation << 4;
1088 break;
1089
1090 case R_RX_RH_UNEG4p8:
1091 RANGE (-15, 0);
1092 OP (0) &= 0x0f;
1093 OP (0) |= (-relocation) << 4;
1094 break;
1095
1096 /* Complex reloc handling: */
1097
1098 case R_RX_ABS32:
1099 UNSAFE_FOR_PID;
1100 RX_STACK_POP (relocation);
1101 #if RX_OPCODE_BIG_ENDIAN
1102 OP (3) = relocation;
1103 OP (2) = relocation >> 8;
1104 OP (1) = relocation >> 16;
1105 OP (0) = relocation >> 24;
1106 #else
1107 OP (0) = relocation;
1108 OP (1) = relocation >> 8;
1109 OP (2) = relocation >> 16;
1110 OP (3) = relocation >> 24;
1111 #endif
1112 break;
1113
1114 case R_RX_ABS32_REV:
1115 UNSAFE_FOR_PID;
1116 RX_STACK_POP (relocation);
1117 #if RX_OPCODE_BIG_ENDIAN
1118 OP (0) = relocation;
1119 OP (1) = relocation >> 8;
1120 OP (2) = relocation >> 16;
1121 OP (3) = relocation >> 24;
1122 #else
1123 OP (3) = relocation;
1124 OP (2) = relocation >> 8;
1125 OP (1) = relocation >> 16;
1126 OP (0) = relocation >> 24;
1127 #endif
1128 break;
1129
1130 case R_RX_ABS24S_PCREL:
1131 case R_RX_ABS24S:
1132 UNSAFE_FOR_PID;
1133 RX_STACK_POP (relocation);
1134 RANGE (-0x800000, 0x7fffff);
1135 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1136 {
1137 OP (2) = relocation;
1138 OP (1) = relocation >> 8;
1139 OP (0) = relocation >> 16;
1140 }
1141 else
1142 {
1143 OP (0) = relocation;
1144 OP (1) = relocation >> 8;
1145 OP (2) = relocation >> 16;
1146 }
1147 break;
1148
1149 case R_RX_ABS16:
1150 UNSAFE_FOR_PID;
1151 RX_STACK_POP (relocation);
1152 RANGE (-32768, 65535);
1153 #if RX_OPCODE_BIG_ENDIAN
1154 OP (1) = relocation;
1155 OP (0) = relocation >> 8;
1156 #else
1157 OP (0) = relocation;
1158 OP (1) = relocation >> 8;
1159 #endif
1160 break;
1161
1162 case R_RX_ABS16_REV:
1163 UNSAFE_FOR_PID;
1164 RX_STACK_POP (relocation);
1165 RANGE (-32768, 65535);
1166 #if RX_OPCODE_BIG_ENDIAN
1167 OP (0) = relocation;
1168 OP (1) = relocation >> 8;
1169 #else
1170 OP (1) = relocation;
1171 OP (0) = relocation >> 8;
1172 #endif
1173 break;
1174
1175 case R_RX_ABS16S_PCREL:
1176 case R_RX_ABS16S:
1177 RX_STACK_POP (relocation);
1178 RANGE (-32768, 32767);
1179 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1180 {
1181 OP (1) = relocation;
1182 OP (0) = relocation >> 8;
1183 }
1184 else
1185 {
1186 OP (0) = relocation;
1187 OP (1) = relocation >> 8;
1188 }
1189 break;
1190
1191 case R_RX_ABS16U:
1192 UNSAFE_FOR_PID;
1193 RX_STACK_POP (relocation);
1194 RANGE (0, 65536);
1195 #if RX_OPCODE_BIG_ENDIAN
1196 OP (1) = relocation;
1197 OP (0) = relocation >> 8;
1198 #else
1199 OP (0) = relocation;
1200 OP (1) = relocation >> 8;
1201 #endif
1202 break;
1203
1204 case R_RX_ABS16UL:
1205 UNSAFE_FOR_PID;
1206 RX_STACK_POP (relocation);
1207 relocation >>= 2;
1208 RANGE (0, 65536);
1209 #if RX_OPCODE_BIG_ENDIAN
1210 OP (1) = relocation;
1211 OP (0) = relocation >> 8;
1212 #else
1213 OP (0) = relocation;
1214 OP (1) = relocation >> 8;
1215 #endif
1216 break;
1217
1218 case R_RX_ABS16UW:
1219 UNSAFE_FOR_PID;
1220 RX_STACK_POP (relocation);
1221 relocation >>= 1;
1222 RANGE (0, 65536);
1223 #if RX_OPCODE_BIG_ENDIAN
1224 OP (1) = relocation;
1225 OP (0) = relocation >> 8;
1226 #else
1227 OP (0) = relocation;
1228 OP (1) = relocation >> 8;
1229 #endif
1230 break;
1231
1232 case R_RX_ABS8:
1233 UNSAFE_FOR_PID;
1234 RX_STACK_POP (relocation);
1235 RANGE (-128, 255);
1236 OP (0) = relocation;
1237 break;
1238
1239 case R_RX_ABS8U:
1240 UNSAFE_FOR_PID;
1241 RX_STACK_POP (relocation);
1242 RANGE (0, 255);
1243 OP (0) = relocation;
1244 break;
1245
1246 case R_RX_ABS8UL:
1247 UNSAFE_FOR_PID;
1248 RX_STACK_POP (relocation);
1249 relocation >>= 2;
1250 RANGE (0, 255);
1251 OP (0) = relocation;
1252 break;
1253
1254 case R_RX_ABS8UW:
1255 UNSAFE_FOR_PID;
1256 RX_STACK_POP (relocation);
1257 relocation >>= 1;
1258 RANGE (0, 255);
1259 OP (0) = relocation;
1260 break;
1261
1262 case R_RX_ABS8S:
1263 UNSAFE_FOR_PID;
1264 /* Fall through. */
1265 case R_RX_ABS8S_PCREL:
1266 RX_STACK_POP (relocation);
1267 RANGE (-128, 127);
1268 OP (0) = relocation;
1269 break;
1270
1271 case R_RX_SYM:
1272 if (r_symndx < symtab_hdr->sh_info)
1273 RX_STACK_PUSH (sec->output_section->vma
1274 + sec->output_offset
1275 + sym->st_value
1276 + rel->r_addend);
1277 else
1278 {
1279 if (h != NULL
1280 && (h->root.type == bfd_link_hash_defined
1281 || h->root.type == bfd_link_hash_defweak))
1282 RX_STACK_PUSH (h->root.u.def.value
1283 + sec->output_section->vma
1284 + sec->output_offset
1285 + rel->r_addend);
1286 else
1287 _bfd_error_handler
1288 (_("warning: RX_SYM reloc with an unknown symbol"));
1289 }
1290 break;
1291
1292 case R_RX_OPneg:
1293 {
1294 int32_t tmp;
1295
1296 saw_subtract = TRUE;
1297 RX_STACK_POP (tmp);
1298 tmp = - tmp;
1299 RX_STACK_PUSH (tmp);
1300 }
1301 break;
1302
1303 case R_RX_OPadd:
1304 {
1305 int32_t tmp1, tmp2;
1306
1307 RX_STACK_POP (tmp1);
1308 RX_STACK_POP (tmp2);
1309 tmp1 += tmp2;
1310 RX_STACK_PUSH (tmp1);
1311 }
1312 break;
1313
1314 case R_RX_OPsub:
1315 {
1316 int32_t tmp1, tmp2;
1317
1318 saw_subtract = TRUE;
1319 RX_STACK_POP (tmp1);
1320 RX_STACK_POP (tmp2);
1321 tmp2 -= tmp1;
1322 RX_STACK_PUSH (tmp2);
1323 }
1324 break;
1325
1326 case R_RX_OPmul:
1327 {
1328 int32_t tmp1, tmp2;
1329
1330 RX_STACK_POP (tmp1);
1331 RX_STACK_POP (tmp2);
1332 tmp1 *= tmp2;
1333 RX_STACK_PUSH (tmp1);
1334 }
1335 break;
1336
1337 case R_RX_OPdiv:
1338 {
1339 int32_t tmp1, tmp2;
1340
1341 RX_STACK_POP (tmp1);
1342 RX_STACK_POP (tmp2);
1343 tmp1 /= tmp2;
1344 RX_STACK_PUSH (tmp1);
1345 }
1346 break;
1347
1348 case R_RX_OPshla:
1349 {
1350 int32_t tmp1, tmp2;
1351
1352 RX_STACK_POP (tmp1);
1353 RX_STACK_POP (tmp2);
1354 tmp1 <<= tmp2;
1355 RX_STACK_PUSH (tmp1);
1356 }
1357 break;
1358
1359 case R_RX_OPshra:
1360 {
1361 int32_t tmp1, tmp2;
1362
1363 RX_STACK_POP (tmp1);
1364 RX_STACK_POP (tmp2);
1365 tmp1 >>= tmp2;
1366 RX_STACK_PUSH (tmp1);
1367 }
1368 break;
1369
1370 case R_RX_OPsctsize:
1371 RX_STACK_PUSH (input_section->size);
1372 break;
1373
1374 case R_RX_OPscttop:
1375 RX_STACK_PUSH (input_section->output_section->vma);
1376 break;
1377
1378 case R_RX_OPand:
1379 {
1380 int32_t tmp1, tmp2;
1381
1382 RX_STACK_POP (tmp1);
1383 RX_STACK_POP (tmp2);
1384 tmp1 &= tmp2;
1385 RX_STACK_PUSH (tmp1);
1386 }
1387 break;
1388
1389 case R_RX_OPor:
1390 {
1391 int32_t tmp1, tmp2;
1392
1393 RX_STACK_POP (tmp1);
1394 RX_STACK_POP (tmp2);
1395 tmp1 |= tmp2;
1396 RX_STACK_PUSH (tmp1);
1397 }
1398 break;
1399
1400 case R_RX_OPxor:
1401 {
1402 int32_t tmp1, tmp2;
1403
1404 RX_STACK_POP (tmp1);
1405 RX_STACK_POP (tmp2);
1406 tmp1 ^= tmp2;
1407 RX_STACK_PUSH (tmp1);
1408 }
1409 break;
1410
1411 case R_RX_OPnot:
1412 {
1413 int32_t tmp;
1414
1415 RX_STACK_POP (tmp);
1416 tmp = ~ tmp;
1417 RX_STACK_PUSH (tmp);
1418 }
1419 break;
1420
1421 case R_RX_OPmod:
1422 {
1423 int32_t tmp1, tmp2;
1424
1425 RX_STACK_POP (tmp1);
1426 RX_STACK_POP (tmp2);
1427 tmp1 %= tmp2;
1428 RX_STACK_PUSH (tmp1);
1429 }
1430 break;
1431
1432 case R_RX_OPromtop:
1433 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
1434 break;
1435
1436 case R_RX_OPramtop:
1437 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
1438 break;
1439
1440 default:
1441 r = bfd_reloc_notsupported;
1442 break;
1443 }
1444
1445 if (r != bfd_reloc_ok)
1446 {
1447 const char * msg = NULL;
1448
1449 switch (r)
1450 {
1451 case bfd_reloc_overflow:
1452 /* Catch the case of a missing function declaration
1453 and emit a more helpful error message. */
1454 if (r_type == R_RX_DIR24S_PCREL)
1455 /* xgettext:c-format */
1456 msg = _("%pB(%pA): error: call to undefined function '%s'");
1457 else
1458 (*info->callbacks->reloc_overflow)
1459 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1460 input_bfd, input_section, rel->r_offset);
1461 break;
1462
1463 case bfd_reloc_undefined:
1464 (*info->callbacks->undefined_symbol)
1465 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
1466 break;
1467
1468 case bfd_reloc_other:
1469 /* xgettext:c-format */
1470 msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area");
1471 break;
1472
1473 case bfd_reloc_outofrange:
1474 /* xgettext:c-format */
1475 msg = _("%pB(%pA): internal error: out of range error");
1476 break;
1477
1478 case bfd_reloc_notsupported:
1479 /* xgettext:c-format */
1480 msg = _("%pB(%pA): internal error: unsupported relocation error");
1481 break;
1482
1483 case bfd_reloc_dangerous:
1484 /* xgettext:c-format */
1485 msg = _("%pB(%pA): internal error: dangerous relocation");
1486 break;
1487
1488 default:
1489 /* xgettext:c-format */
1490 msg = _("%pB(%pA): internal error: unknown error");
1491 break;
1492 }
1493
1494 if (msg)
1495 _bfd_error_handler (msg, input_bfd, input_section, name);
1496 }
1497 }
1498
1499 return TRUE;
1500 }
1501 \f
1502 /* Relaxation Support. */
1503
1504 /* Progression of relocations from largest operand size to smallest
1505 operand size. */
1506
1507 static int
1508 next_smaller_reloc (int r)
1509 {
1510 switch (r)
1511 {
1512 case R_RX_DIR32: return R_RX_DIR24S;
1513 case R_RX_DIR24S: return R_RX_DIR16S;
1514 case R_RX_DIR16S: return R_RX_DIR8S;
1515 case R_RX_DIR8S: return R_RX_NONE;
1516
1517 case R_RX_DIR16: return R_RX_DIR8;
1518 case R_RX_DIR8: return R_RX_NONE;
1519
1520 case R_RX_DIR16U: return R_RX_DIR8U;
1521 case R_RX_DIR8U: return R_RX_NONE;
1522
1523 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1524 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1525 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1526
1527 case R_RX_DIR16UL: return R_RX_DIR8UL;
1528 case R_RX_DIR8UL: return R_RX_NONE;
1529 case R_RX_DIR16UW: return R_RX_DIR8UW;
1530 case R_RX_DIR8UW: return R_RX_NONE;
1531
1532 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1533 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1534 case R_RX_RH_16_OP: return R_RX_DIR8;
1535
1536 case R_RX_ABS32: return R_RX_ABS24S;
1537 case R_RX_ABS24S: return R_RX_ABS16S;
1538 case R_RX_ABS16: return R_RX_ABS8;
1539 case R_RX_ABS16U: return R_RX_ABS8U;
1540 case R_RX_ABS16S: return R_RX_ABS8S;
1541 case R_RX_ABS8: return R_RX_NONE;
1542 case R_RX_ABS8U: return R_RX_NONE;
1543 case R_RX_ABS8S: return R_RX_NONE;
1544 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1545 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1546 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1547 case R_RX_ABS16UL: return R_RX_ABS8UL;
1548 case R_RX_ABS16UW: return R_RX_ABS8UW;
1549 case R_RX_ABS8UL: return R_RX_NONE;
1550 case R_RX_ABS8UW: return R_RX_NONE;
1551 }
1552 return r;
1553 };
1554
1555 /* Delete some bytes from a section while relaxing. */
1556
1557 static bfd_boolean
1558 elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1559 Elf_Internal_Rela *alignment_rel, int force_snip,
1560 Elf_Internal_Rela *irelstart)
1561 {
1562 Elf_Internal_Shdr * symtab_hdr;
1563 unsigned int sec_shndx;
1564 bfd_byte * contents;
1565 Elf_Internal_Rela * irel;
1566 Elf_Internal_Rela * irelend;
1567 Elf_Internal_Sym * isym;
1568 Elf_Internal_Sym * isymend;
1569 bfd_vma toaddr;
1570 unsigned int symcount;
1571 struct elf_link_hash_entry ** sym_hashes;
1572 struct elf_link_hash_entry ** end_hashes;
1573
1574 if (!alignment_rel)
1575 force_snip = 1;
1576
1577 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1578
1579 contents = elf_section_data (sec)->this_hdr.contents;
1580
1581 /* The deletion must stop at the next alignment boundary, if
1582 ALIGNMENT_REL is non-NULL. */
1583 toaddr = sec->size;
1584 if (alignment_rel)
1585 toaddr = alignment_rel->r_offset;
1586
1587 BFD_ASSERT (toaddr > addr);
1588
1589 /* Actually delete the bytes. */
1590 memmove (contents + addr, contents + addr + count,
1591 (size_t) (toaddr - addr - count));
1592
1593 /* If we don't have an alignment marker to worry about, we can just
1594 shrink the section. Otherwise, we have to fill in the newly
1595 created gap with NOP insns (0x03). */
1596 if (force_snip)
1597 sec->size -= count;
1598 else
1599 memset (contents + toaddr - count, 0x03, count);
1600
1601 irel = irelstart;
1602 BFD_ASSERT (irel != NULL || sec->reloc_count == 0);
1603 irelend = irel + sec->reloc_count;
1604
1605 /* Adjust all the relocs. */
1606 for (; irel < irelend; irel++)
1607 {
1608 /* Get the new reloc address. */
1609 if (irel->r_offset > addr
1610 && (irel->r_offset < toaddr
1611 || (force_snip && irel->r_offset == toaddr)))
1612 irel->r_offset -= count;
1613
1614 /* If we see an ALIGN marker at the end of the gap, we move it
1615 to the beginning of the gap, since marking these gaps is what
1616 they're for. */
1617 if (irel->r_offset == toaddr
1618 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1619 && irel->r_addend & RX_RELAXA_ALIGN)
1620 irel->r_offset -= count;
1621 }
1622
1623 /* Adjust the local symbols defined in this section. */
1624 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1625 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1626 isymend = isym + symtab_hdr->sh_info;
1627
1628 for (; isym < isymend; isym++)
1629 {
1630 /* If the symbol is in the range of memory we just moved, we
1631 have to adjust its value. */
1632 if (isym->st_shndx == sec_shndx
1633 && isym->st_value > addr
1634 && isym->st_value < toaddr)
1635 isym->st_value -= count;
1636
1637 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1638 *end* is in the moved bytes but it's *start* isn't), then we
1639 must adjust its size. */
1640 if (isym->st_shndx == sec_shndx
1641 && isym->st_value < addr
1642 && isym->st_value + isym->st_size > addr
1643 && isym->st_value + isym->st_size < toaddr)
1644 isym->st_size -= count;
1645 }
1646
1647 /* Now adjust the global symbols defined in this section. */
1648 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1649 - symtab_hdr->sh_info);
1650 sym_hashes = elf_sym_hashes (abfd);
1651 end_hashes = sym_hashes + symcount;
1652
1653 for (; sym_hashes < end_hashes; sym_hashes++)
1654 {
1655 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1656
1657 if ((sym_hash->root.type == bfd_link_hash_defined
1658 || sym_hash->root.type == bfd_link_hash_defweak)
1659 && sym_hash->root.u.def.section == sec)
1660 {
1661 /* As above, adjust the value if needed. */
1662 if (sym_hash->root.u.def.value > addr
1663 && sym_hash->root.u.def.value < toaddr)
1664 sym_hash->root.u.def.value -= count;
1665
1666 /* As above, adjust the size if needed. */
1667 if (sym_hash->root.u.def.value < addr
1668 && sym_hash->root.u.def.value + sym_hash->size > addr
1669 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1670 sym_hash->size -= count;
1671 }
1672 }
1673
1674 return TRUE;
1675 }
1676
1677 /* Used to sort relocs by address. If relocs have the same address,
1678 we maintain their relative order, except that R_RX_RH_RELAX
1679 alignment relocs must be the first reloc for any given address. */
1680
1681 static void
1682 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1683 {
1684 int i;
1685 bfd_boolean again;
1686 bfd_boolean swappit;
1687
1688 /* This is almost a classic bubblesort. It's the slowest sort, but
1689 we're taking advantage of the fact that the relocations are
1690 mostly in order already (the assembler emits them that way) and
1691 we need relocs with the same address to remain in the same
1692 relative order. */
1693 again = TRUE;
1694 while (again)
1695 {
1696 again = FALSE;
1697 for (i = 0; i < count - 1; i ++)
1698 {
1699 if (r[i].r_offset > r[i + 1].r_offset)
1700 swappit = TRUE;
1701 else if (r[i].r_offset < r[i + 1].r_offset)
1702 swappit = FALSE;
1703 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1704 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1705 swappit = TRUE;
1706 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1707 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1708 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1709 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1710 swappit = TRUE;
1711 else
1712 swappit = FALSE;
1713
1714 if (swappit)
1715 {
1716 Elf_Internal_Rela tmp;
1717
1718 tmp = r[i];
1719 r[i] = r[i + 1];
1720 r[i + 1] = tmp;
1721 /* If we do move a reloc back, re-scan to see if it
1722 needs to be moved even further back. This avoids
1723 most of the O(n^2) behavior for our cases. */
1724 if (i > 0)
1725 i -= 2;
1726 again = TRUE;
1727 }
1728 }
1729 }
1730 }
1731
1732
1733 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1734 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1735 lrel, abfd, sec, link_info, scale)
1736
1737 static bfd_vma
1738 rx_offset_for_reloc (bfd * abfd,
1739 Elf_Internal_Rela * rel,
1740 Elf_Internal_Shdr * symtab_hdr,
1741 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1742 Elf_Internal_Sym * intsyms,
1743 Elf_Internal_Rela ** lrel,
1744 bfd * input_bfd,
1745 asection * input_section,
1746 struct bfd_link_info * info,
1747 int * scale)
1748 {
1749 bfd_vma symval;
1750 bfd_reloc_status_type r;
1751
1752 *scale = 1;
1753
1754 /* REL is the first of 1..N relocations. We compute the symbol
1755 value for each relocation, then combine them if needed. LREL
1756 gets a pointer to the last relocation used. */
1757 while (1)
1758 {
1759 int32_t tmp1, tmp2;
1760
1761 /* Get the value of the symbol referred to by the reloc. */
1762 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1763 {
1764 /* A local symbol. */
1765 Elf_Internal_Sym *isym;
1766 asection *ssec;
1767
1768 isym = intsyms + ELF32_R_SYM (rel->r_info);
1769
1770 if (isym->st_shndx == SHN_UNDEF)
1771 ssec = bfd_und_section_ptr;
1772 else if (isym->st_shndx == SHN_ABS)
1773 ssec = bfd_abs_section_ptr;
1774 else if (isym->st_shndx == SHN_COMMON)
1775 ssec = bfd_com_section_ptr;
1776 else
1777 ssec = bfd_section_from_elf_index (abfd,
1778 isym->st_shndx);
1779
1780 /* Initial symbol value. */
1781 symval = isym->st_value;
1782
1783 /* GAS may have made this symbol relative to a section, in
1784 which case, we have to add the addend to find the
1785 symbol. */
1786 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1787 symval += rel->r_addend;
1788
1789 if (ssec)
1790 {
1791 if ((ssec->flags & SEC_MERGE)
1792 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
1793 symval = _bfd_merged_section_offset (abfd, & ssec,
1794 elf_section_data (ssec)->sec_info,
1795 symval);
1796 }
1797
1798 /* Now make the offset relative to where the linker is putting it. */
1799 if (ssec)
1800 symval +=
1801 ssec->output_section->vma + ssec->output_offset;
1802
1803 symval += rel->r_addend;
1804 }
1805 else
1806 {
1807 unsigned long indx;
1808 struct elf_link_hash_entry * h;
1809
1810 /* An external symbol. */
1811 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1812 h = elf_sym_hashes (abfd)[indx];
1813 BFD_ASSERT (h != NULL);
1814
1815 if (h->root.type != bfd_link_hash_defined
1816 && h->root.type != bfd_link_hash_defweak)
1817 {
1818 /* This appears to be a reference to an undefined
1819 symbol. Just ignore it--it will be caught by the
1820 regular reloc processing. */
1821 if (lrel)
1822 *lrel = rel;
1823 return 0;
1824 }
1825
1826 symval = (h->root.u.def.value
1827 + h->root.u.def.section->output_section->vma
1828 + h->root.u.def.section->output_offset);
1829
1830 symval += rel->r_addend;
1831 }
1832
1833 switch (ELF32_R_TYPE (rel->r_info))
1834 {
1835 case R_RX_SYM:
1836 RX_STACK_PUSH (symval);
1837 break;
1838
1839 case R_RX_OPneg:
1840 RX_STACK_POP (tmp1);
1841 tmp1 = - tmp1;
1842 RX_STACK_PUSH (tmp1);
1843 break;
1844
1845 case R_RX_OPadd:
1846 RX_STACK_POP (tmp1);
1847 RX_STACK_POP (tmp2);
1848 tmp1 += tmp2;
1849 RX_STACK_PUSH (tmp1);
1850 break;
1851
1852 case R_RX_OPsub:
1853 RX_STACK_POP (tmp1);
1854 RX_STACK_POP (tmp2);
1855 tmp2 -= tmp1;
1856 RX_STACK_PUSH (tmp2);
1857 break;
1858
1859 case R_RX_OPmul:
1860 RX_STACK_POP (tmp1);
1861 RX_STACK_POP (tmp2);
1862 tmp1 *= tmp2;
1863 RX_STACK_PUSH (tmp1);
1864 break;
1865
1866 case R_RX_OPdiv:
1867 RX_STACK_POP (tmp1);
1868 RX_STACK_POP (tmp2);
1869 tmp1 /= tmp2;
1870 RX_STACK_PUSH (tmp1);
1871 break;
1872
1873 case R_RX_OPshla:
1874 RX_STACK_POP (tmp1);
1875 RX_STACK_POP (tmp2);
1876 tmp1 <<= tmp2;
1877 RX_STACK_PUSH (tmp1);
1878 break;
1879
1880 case R_RX_OPshra:
1881 RX_STACK_POP (tmp1);
1882 RX_STACK_POP (tmp2);
1883 tmp1 >>= tmp2;
1884 RX_STACK_PUSH (tmp1);
1885 break;
1886
1887 case R_RX_OPsctsize:
1888 RX_STACK_PUSH (input_section->size);
1889 break;
1890
1891 case R_RX_OPscttop:
1892 RX_STACK_PUSH (input_section->output_section->vma);
1893 break;
1894
1895 case R_RX_OPand:
1896 RX_STACK_POP (tmp1);
1897 RX_STACK_POP (tmp2);
1898 tmp1 &= tmp2;
1899 RX_STACK_PUSH (tmp1);
1900 break;
1901
1902 case R_RX_OPor:
1903 RX_STACK_POP (tmp1);
1904 RX_STACK_POP (tmp2);
1905 tmp1 |= tmp2;
1906 RX_STACK_PUSH (tmp1);
1907 break;
1908
1909 case R_RX_OPxor:
1910 RX_STACK_POP (tmp1);
1911 RX_STACK_POP (tmp2);
1912 tmp1 ^= tmp2;
1913 RX_STACK_PUSH (tmp1);
1914 break;
1915
1916 case R_RX_OPnot:
1917 RX_STACK_POP (tmp1);
1918 tmp1 = ~ tmp1;
1919 RX_STACK_PUSH (tmp1);
1920 break;
1921
1922 case R_RX_OPmod:
1923 RX_STACK_POP (tmp1);
1924 RX_STACK_POP (tmp2);
1925 tmp1 %= tmp2;
1926 RX_STACK_PUSH (tmp1);
1927 break;
1928
1929 case R_RX_OPromtop:
1930 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
1931 break;
1932
1933 case R_RX_OPramtop:
1934 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
1935 break;
1936
1937 case R_RX_DIR16UL:
1938 case R_RX_DIR8UL:
1939 case R_RX_ABS16UL:
1940 case R_RX_ABS8UL:
1941 if (rx_stack_top)
1942 RX_STACK_POP (symval);
1943 if (lrel)
1944 *lrel = rel;
1945 *scale = 4;
1946 return symval;
1947
1948 case R_RX_DIR16UW:
1949 case R_RX_DIR8UW:
1950 case R_RX_ABS16UW:
1951 case R_RX_ABS8UW:
1952 if (rx_stack_top)
1953 RX_STACK_POP (symval);
1954 if (lrel)
1955 *lrel = rel;
1956 *scale = 2;
1957 return symval;
1958
1959 default:
1960 if (rx_stack_top)
1961 RX_STACK_POP (symval);
1962 if (lrel)
1963 *lrel = rel;
1964 return symval;
1965 }
1966
1967 rel ++;
1968 }
1969 /* FIXME. */
1970 (void) r;
1971 }
1972
1973 static void
1974 move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1975 {
1976 bfd_vma old_offset = srel->r_offset;
1977
1978 irel ++;
1979 while (irel <= srel)
1980 {
1981 if (irel->r_offset == old_offset)
1982 irel->r_offset += delta;
1983 irel ++;
1984 }
1985 }
1986
1987 /* Relax one section. */
1988
1989 static bfd_boolean
1990 elf32_rx_relax_section (bfd * abfd,
1991 asection * sec,
1992 struct bfd_link_info * link_info,
1993 bfd_boolean * again,
1994 bfd_boolean allow_pcrel3)
1995 {
1996 Elf_Internal_Shdr * symtab_hdr;
1997 Elf_Internal_Shdr * shndx_hdr;
1998 Elf_Internal_Rela * internal_relocs;
1999 Elf_Internal_Rela * irel;
2000 Elf_Internal_Rela * srel;
2001 Elf_Internal_Rela * irelend;
2002 Elf_Internal_Rela * next_alignment;
2003 Elf_Internal_Rela * prev_alignment;
2004 bfd_byte * contents = NULL;
2005 bfd_byte * free_contents = NULL;
2006 Elf_Internal_Sym * intsyms = NULL;
2007 Elf_Internal_Sym * free_intsyms = NULL;
2008 Elf_External_Sym_Shndx * shndx_buf = NULL;
2009 bfd_vma pc;
2010 bfd_vma sec_start;
2011 bfd_vma symval = 0;
2012 int pcrel = 0;
2013 int code = 0;
2014 int section_alignment_glue;
2015 /* how much to scale the relocation by - 1, 2, or 4. */
2016 int scale;
2017
2018 /* Assume nothing changes. */
2019 *again = FALSE;
2020
2021 /* We don't have to do anything for a relocatable link, if
2022 this section does not have relocs, or if this is not a
2023 code section. */
2024 if (bfd_link_relocatable (link_info)
2025 || (sec->flags & SEC_RELOC) == 0
2026 || sec->reloc_count == 0
2027 || (sec->flags & SEC_CODE) == 0)
2028 return TRUE;
2029
2030 symtab_hdr = & elf_symtab_hdr (abfd);
2031 if (elf_symtab_shndx_list (abfd))
2032 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2033 else
2034 shndx_hdr = NULL;
2035
2036 sec_start = sec->output_section->vma + sec->output_offset;
2037
2038 /* Get the section contents. */
2039 if (elf_section_data (sec)->this_hdr.contents != NULL)
2040 contents = elf_section_data (sec)->this_hdr.contents;
2041 /* Go get them off disk. */
2042 else
2043 {
2044 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2045 goto error_return;
2046 elf_section_data (sec)->this_hdr.contents = contents;
2047 }
2048
2049 /* Read this BFD's symbols. */
2050 /* Get cached copy if it exists. */
2051 if (symtab_hdr->contents != NULL)
2052 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2053 else
2054 {
2055 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2056 symtab_hdr->contents = (bfd_byte *) intsyms;
2057 }
2058
2059 if (shndx_hdr && shndx_hdr->sh_size != 0)
2060 {
2061 bfd_size_type amt;
2062
2063 amt = symtab_hdr->sh_info;
2064 amt *= sizeof (Elf_External_Sym_Shndx);
2065 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2066 if (shndx_buf == NULL)
2067 goto error_return;
2068 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2069 || bfd_bread (shndx_buf, amt, abfd) != amt)
2070 goto error_return;
2071 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2072 }
2073
2074 /* Get a copy of the native relocations. */
2075 /* Note - we ignore the setting of link_info->keep_memory when reading
2076 in these relocs. We have to maintain a permanent copy of the relocs
2077 because we are going to walk over them multiple times, adjusting them
2078 as bytes are deleted from the section, and with this relaxation
2079 function itself being called multiple times on the same section... */
2080 internal_relocs = _bfd_elf_link_read_relocs
2081 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, TRUE);
2082 if (internal_relocs == NULL)
2083 goto error_return;
2084
2085 /* The RL_ relocs must be just before the operand relocs they go
2086 with, so we must sort them to guarantee this. We use bubblesort
2087 instead of qsort so we can guarantee that relocs with the same
2088 address remain in the same relative order. */
2089 reloc_bubblesort (internal_relocs, sec->reloc_count);
2090
2091 /* Walk through them looking for relaxing opportunities. */
2092 irelend = internal_relocs + sec->reloc_count;
2093
2094 /* This will either be NULL or a pointer to the next alignment
2095 relocation. */
2096 next_alignment = internal_relocs;
2097 /* This will be the previous alignment, although at first it points
2098 to the first real relocation. */
2099 prev_alignment = internal_relocs;
2100
2101 /* We calculate worst case shrinkage caused by alignment directives.
2102 No fool-proof, but better than either ignoring the problem or
2103 doing heavy duty analysis of all the alignment markers in all
2104 input sections. */
2105 section_alignment_glue = 0;
2106 for (irel = internal_relocs; irel < irelend; irel++)
2107 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
2108 && irel->r_addend & RX_RELAXA_ALIGN)
2109 {
2110 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2111
2112 if (section_alignment_glue < this_glue)
2113 section_alignment_glue = this_glue;
2114 }
2115 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2116 shrinkage. */
2117 section_alignment_glue *= 2;
2118
2119 for (irel = internal_relocs; irel < irelend; irel++)
2120 {
2121 unsigned char *insn;
2122 int nrelocs;
2123
2124 /* The insns we care about are all marked with one of these. */
2125 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
2126 continue;
2127
2128 if (irel->r_addend & RX_RELAXA_ALIGN
2129 || next_alignment == internal_relocs)
2130 {
2131 /* When we delete bytes, we need to maintain all the alignments
2132 indicated. In addition, we need to be careful about relaxing
2133 jumps across alignment boundaries - these displacements
2134 *grow* when we delete bytes. For now, don't shrink
2135 displacements across an alignment boundary, just in case.
2136 Note that this only affects relocations to the same
2137 section. */
2138 prev_alignment = next_alignment;
2139 next_alignment += 2;
2140 while (next_alignment < irelend
2141 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
2142 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
2143 next_alignment ++;
2144 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2145 next_alignment = NULL;
2146 }
2147
2148 /* When we hit alignment markers, see if we've shrunk enough
2149 before them to reduce the gap without violating the alignment
2150 requirements. */
2151 if (irel->r_addend & RX_RELAXA_ALIGN)
2152 {
2153 /* At this point, the next relocation *should* be the ELIGN
2154 end marker. */
2155 Elf_Internal_Rela *erel = irel + 1;
2156 unsigned int alignment, nbytes;
2157
2158 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
2159 continue;
2160 if (!(erel->r_addend & RX_RELAXA_ELIGN))
2161 continue;
2162
2163 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2164
2165 if (erel->r_offset - irel->r_offset < alignment)
2166 continue;
2167
2168 nbytes = erel->r_offset - irel->r_offset;
2169 nbytes /= alignment;
2170 nbytes *= alignment;
2171
2172 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2173 erel->r_offset == sec->size, internal_relocs);
2174 *again = TRUE;
2175
2176 continue;
2177 }
2178
2179 if (irel->r_addend & RX_RELAXA_ELIGN)
2180 continue;
2181
2182 insn = contents + irel->r_offset;
2183
2184 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
2185
2186 /* At this point, we have an insn that is a candidate for linker
2187 relaxation. There are NRELOCS relocs following that may be
2188 relaxed, although each reloc may be made of more than one
2189 reloc entry (such as gp-rel symbols). */
2190
2191 /* Get the value of the symbol referred to by the reloc. Just
2192 in case this is the last reloc in the list, use the RL's
2193 addend to choose between this reloc (no addend) or the next
2194 (yes addend, which means at least one following reloc). */
2195
2196 /* srel points to the "current" reloction for this insn -
2197 actually the last reloc for a given operand, which is the one
2198 we need to update. We check the relaxations in the same
2199 order that the relocations happen, so we'll just push it
2200 along as we go. */
2201 srel = irel;
2202
2203 pc = sec->output_section->vma + sec->output_offset
2204 + srel->r_offset;
2205
2206 #define GET_RELOC \
2207 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2208 pcrel = symval - pc + srel->r_addend; \
2209 nrelocs --;
2210
2211 #define SNIPNR(offset, nbytes) \
2212 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0, internal_relocs);
2213 #define SNIP(offset, nbytes, newtype) \
2214 SNIPNR (offset, nbytes); \
2215 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2216
2217 /* The order of these bit tests must match the order that the
2218 relocs appear in. Since we sorted those by offset, we can
2219 predict them. */
2220
2221 /* Note that the numbers in, say, DSP6 are the bit offsets of
2222 the code fields that describe the operand. Bits number 0 for
2223 the MSB of insn[0]. */
2224
2225 /* DSP* codes:
2226 0 00 [reg]
2227 1 01 dsp:8[reg]
2228 2 10 dsp:16[reg]
2229 3 11 reg */
2230 if (irel->r_addend & RX_RELAXA_DSP6)
2231 {
2232 GET_RELOC;
2233
2234 code = insn[0] & 3;
2235 if (code == 2 && symval/scale <= 255)
2236 {
2237 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2238 insn[0] &= 0xfc;
2239 insn[0] |= 0x01;
2240 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2241 if (newrel != ELF32_R_TYPE (srel->r_info))
2242 {
2243 SNIP (3, 1, newrel);
2244 *again = TRUE;
2245 }
2246 }
2247
2248 else if (code == 1 && symval == 0)
2249 {
2250 insn[0] &= 0xfc;
2251 SNIP (2, 1, R_RX_NONE);
2252 *again = TRUE;
2253 }
2254
2255 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2256 else if (code == 1 && symval/scale <= 31
2257 /* Decodable bits. */
2258 && (insn[0] & 0xcc) == 0xcc
2259 /* Width. */
2260 && (insn[0] & 0x30) != 0x30
2261 /* Register MSBs. */
2262 && (insn[1] & 0x88) == 0x00)
2263 {
2264 int newrel = 0;
2265
2266 insn[0] = 0x88 | (insn[0] & 0x30);
2267 /* The register fields are in the right place already. */
2268
2269 /* We can't relax this new opcode. */
2270 irel->r_addend = 0;
2271
2272 switch ((insn[0] & 0x30) >> 4)
2273 {
2274 case 0:
2275 newrel = R_RX_RH_ABS5p5B;
2276 break;
2277 case 1:
2278 newrel = R_RX_RH_ABS5p5W;
2279 break;
2280 case 2:
2281 newrel = R_RX_RH_ABS5p5L;
2282 break;
2283 }
2284
2285 move_reloc (irel, srel, -2);
2286 SNIP (2, 1, newrel);
2287 }
2288
2289 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2290 else if (code == 1 && symval/scale <= 31
2291 /* Decodable bits. */
2292 && (insn[0] & 0xf8) == 0x58
2293 /* Register MSBs. */
2294 && (insn[1] & 0x88) == 0x00)
2295 {
2296 int newrel = 0;
2297
2298 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2299 /* The register fields are in the right place already. */
2300
2301 /* We can't relax this new opcode. */
2302 irel->r_addend = 0;
2303
2304 switch ((insn[0] & 0x08) >> 3)
2305 {
2306 case 0:
2307 newrel = R_RX_RH_ABS5p5B;
2308 break;
2309 case 1:
2310 newrel = R_RX_RH_ABS5p5W;
2311 break;
2312 }
2313
2314 move_reloc (irel, srel, -2);
2315 SNIP (2, 1, newrel);
2316 }
2317 }
2318
2319 /* A DSP4 operand always follows a DSP6 operand, even if there's
2320 no relocation for it. We have to read the code out of the
2321 opcode to calculate the offset of the operand. */
2322 if (irel->r_addend & RX_RELAXA_DSP4)
2323 {
2324 int code6, offset = 0;
2325
2326 GET_RELOC;
2327
2328 code6 = insn[0] & 0x03;
2329 switch (code6)
2330 {
2331 case 0: offset = 2; break;
2332 case 1: offset = 3; break;
2333 case 2: offset = 4; break;
2334 case 3: offset = 2; break;
2335 }
2336
2337 code = (insn[0] & 0x0c) >> 2;
2338
2339 if (code == 2 && symval / scale <= 255)
2340 {
2341 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2342
2343 insn[0] &= 0xf3;
2344 insn[0] |= 0x04;
2345 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2346 if (newrel != ELF32_R_TYPE (srel->r_info))
2347 {
2348 SNIP (offset+1, 1, newrel);
2349 *again = TRUE;
2350 }
2351 }
2352
2353 else if (code == 1 && symval == 0)
2354 {
2355 insn[0] &= 0xf3;
2356 SNIP (offset, 1, R_RX_NONE);
2357 *again = TRUE;
2358 }
2359 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2360 else if (code == 1 && symval/scale <= 31
2361 /* Decodable bits. */
2362 && (insn[0] & 0xc3) == 0xc3
2363 /* Width. */
2364 && (insn[0] & 0x30) != 0x30
2365 /* Register MSBs. */
2366 && (insn[1] & 0x88) == 0x00)
2367 {
2368 int newrel = 0;
2369
2370 insn[0] = 0x80 | (insn[0] & 0x30);
2371 /* The register fields are in the right place already. */
2372
2373 /* We can't relax this new opcode. */
2374 irel->r_addend = 0;
2375
2376 switch ((insn[0] & 0x30) >> 4)
2377 {
2378 case 0:
2379 newrel = R_RX_RH_ABS5p5B;
2380 break;
2381 case 1:
2382 newrel = R_RX_RH_ABS5p5W;
2383 break;
2384 case 2:
2385 newrel = R_RX_RH_ABS5p5L;
2386 break;
2387 }
2388
2389 move_reloc (irel, srel, -2);
2390 SNIP (2, 1, newrel);
2391 }
2392 }
2393
2394 /* These always occur alone, but the offset depends on whether
2395 it's a MEMEX opcode (0x06) or not. */
2396 if (irel->r_addend & RX_RELAXA_DSP14)
2397 {
2398 int offset;
2399 GET_RELOC;
2400
2401 if (insn[0] == 0x06)
2402 offset = 3;
2403 else
2404 offset = 4;
2405
2406 code = insn[1] & 3;
2407
2408 if (code == 2 && symval / scale <= 255)
2409 {
2410 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2411
2412 insn[1] &= 0xfc;
2413 insn[1] |= 0x01;
2414 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2415 if (newrel != ELF32_R_TYPE (srel->r_info))
2416 {
2417 SNIP (offset, 1, newrel);
2418 *again = TRUE;
2419 }
2420 }
2421 else if (code == 1 && symval == 0)
2422 {
2423 insn[1] &= 0xfc;
2424 SNIP (offset, 1, R_RX_NONE);
2425 *again = TRUE;
2426 }
2427 }
2428
2429 /* IMM* codes:
2430 0 00 imm:32
2431 1 01 simm:8
2432 2 10 simm:16
2433 3 11 simm:24. */
2434
2435 /* These always occur alone. */
2436 if (irel->r_addend & RX_RELAXA_IMM6)
2437 {
2438 long ssymval;
2439
2440 GET_RELOC;
2441
2442 /* These relocations sign-extend, so we must do signed compares. */
2443 ssymval = (long) symval;
2444
2445 code = insn[0] & 0x03;
2446
2447 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2448 {
2449 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2450
2451 insn[0] &= 0xfc;
2452 insn[0] |= 0x03;
2453 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2454 if (newrel != ELF32_R_TYPE (srel->r_info))
2455 {
2456 SNIP (2, 1, newrel);
2457 *again = TRUE;
2458 }
2459 }
2460
2461 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2462 {
2463 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2464
2465 insn[0] &= 0xfc;
2466 insn[0] |= 0x02;
2467 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2468 if (newrel != ELF32_R_TYPE (srel->r_info))
2469 {
2470 SNIP (2, 1, newrel);
2471 *again = TRUE;
2472 }
2473 }
2474
2475 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2476 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2477 /* Decodable bits. */
2478 && (insn[0] & 0xfc) == 0x74
2479 /* Decodable bits. */
2480 && ((insn[1] & 0xf0) == 0x00))
2481 {
2482 int newrel;
2483
2484 insn[0] = 0x75;
2485 insn[1] = 0x50 | (insn[1] & 0x0f);
2486
2487 /* We can't relax this new opcode. */
2488 irel->r_addend = 0;
2489
2490 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2491 newrel = R_RX_ABS8U;
2492 else
2493 newrel = R_RX_DIR8U;
2494
2495 SNIP (2, 1, newrel);
2496 *again = TRUE;
2497 }
2498
2499 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2500 {
2501 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2502
2503 insn[0] &= 0xfc;
2504 insn[0] |= 0x01;
2505 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2506 if (newrel != ELF32_R_TYPE (srel->r_info))
2507 {
2508 SNIP (2, 1, newrel);
2509 *again = TRUE;
2510 }
2511 }
2512
2513 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2514 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2515 /* Decodable bits and immediate type. */
2516 && insn[0] == 0x75
2517 /* Decodable bits. */
2518 && (insn[1] & 0xc0) == 0x00)
2519 {
2520 static const int newop[4] = { 1, 3, 4, 5 };
2521
2522 insn[0] = 0x60 | newop[insn[1] >> 4];
2523 /* The register number doesn't move. */
2524
2525 /* We can't relax this new opcode. */
2526 irel->r_addend = 0;
2527
2528 move_reloc (irel, srel, -1);
2529
2530 SNIP (2, 1, R_RX_RH_UIMM4p8);
2531 *again = TRUE;
2532 }
2533
2534 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2535 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2536 /* Decodable bits and immediate type. */
2537 && insn[0] == 0x71
2538 /* Same register for source and destination. */
2539 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2540 {
2541 int newrel;
2542
2543 /* Note that we can't turn "add $0,Rs" into a NOP
2544 because the flags need to be set right. */
2545
2546 if (ssymval < 0)
2547 {
2548 insn[0] = 0x60; /* Subtract. */
2549 newrel = R_RX_RH_UNEG4p8;
2550 }
2551 else
2552 {
2553 insn[0] = 0x62; /* Add. */
2554 newrel = R_RX_RH_UIMM4p8;
2555 }
2556
2557 /* The register number is in the right place. */
2558
2559 /* We can't relax this new opcode. */
2560 irel->r_addend = 0;
2561
2562 move_reloc (irel, srel, -1);
2563
2564 SNIP (2, 1, newrel);
2565 *again = TRUE;
2566 }
2567 }
2568
2569 /* These are either matched with a DSP6 (2-byte base) or an id24
2570 (3-byte base). */
2571 if (irel->r_addend & RX_RELAXA_IMM12)
2572 {
2573 int dspcode, offset = 0;
2574 long ssymval;
2575
2576 GET_RELOC;
2577
2578 if ((insn[0] & 0xfc) == 0xfc)
2579 dspcode = 1; /* Just something with one byte operand. */
2580 else
2581 dspcode = insn[0] & 3;
2582 switch (dspcode)
2583 {
2584 case 0: offset = 2; break;
2585 case 1: offset = 3; break;
2586 case 2: offset = 4; break;
2587 case 3: offset = 2; break;
2588 }
2589
2590 /* These relocations sign-extend, so we must do signed compares. */
2591 ssymval = (long) symval;
2592
2593 code = (insn[1] >> 2) & 3;
2594 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2595 {
2596 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2597
2598 insn[1] &= 0xf3;
2599 insn[1] |= 0x0c;
2600 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2601 if (newrel != ELF32_R_TYPE (srel->r_info))
2602 {
2603 SNIP (offset, 1, newrel);
2604 *again = TRUE;
2605 }
2606 }
2607
2608 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2609 {
2610 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2611
2612 insn[1] &= 0xf3;
2613 insn[1] |= 0x08;
2614 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2615 if (newrel != ELF32_R_TYPE (srel->r_info))
2616 {
2617 SNIP (offset, 1, newrel);
2618 *again = TRUE;
2619 }
2620 }
2621
2622 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2623 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2624 /* Decodable bits. */
2625 && insn[0] == 0xfb
2626 /* Decodable bits. */
2627 && ((insn[1] & 0x03) == 0x02))
2628 {
2629 int newrel;
2630
2631 insn[0] = 0x75;
2632 insn[1] = 0x40 | (insn[1] >> 4);
2633
2634 /* We can't relax this new opcode. */
2635 irel->r_addend = 0;
2636
2637 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2638 newrel = R_RX_ABS8U;
2639 else
2640 newrel = R_RX_DIR8U;
2641
2642 SNIP (2, 1, newrel);
2643 *again = TRUE;
2644 }
2645
2646 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2647 {
2648 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2649
2650 insn[1] &= 0xf3;
2651 insn[1] |= 0x04;
2652 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2653 if (newrel != ELF32_R_TYPE(srel->r_info))
2654 {
2655 SNIP (offset, 1, newrel);
2656 *again = TRUE;
2657 }
2658 }
2659
2660 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2661 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2662 /* Decodable bits. */
2663 && insn[0] == 0xfb
2664 /* Decodable bits. */
2665 && ((insn[1] & 0x03) == 0x02))
2666 {
2667 insn[0] = 0x66;
2668 insn[1] = insn[1] >> 4;
2669
2670 /* We can't relax this new opcode. */
2671 irel->r_addend = 0;
2672
2673 move_reloc (irel, srel, -1);
2674
2675 SNIP (2, 1, R_RX_RH_UIMM4p8);
2676 *again = TRUE;
2677 }
2678 }
2679
2680 if (irel->r_addend & RX_RELAXA_BRA)
2681 {
2682 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2683 int max_pcrel3 = 4;
2684 int alignment_glue = 0;
2685
2686 GET_RELOC;
2687
2688 /* Branches over alignment chunks are problematic, as
2689 deleting bytes here makes the branch *further* away. We
2690 can be agressive with branches within this alignment
2691 block, but not branches outside it. */
2692 if ((prev_alignment == NULL
2693 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2694 && (next_alignment == NULL
2695 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2696 alignment_glue = section_alignment_glue;
2697
2698 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2699 && srel[1].r_addend & RX_RELAXA_BRA
2700 && srel[1].r_offset < irel->r_offset + pcrel)
2701 max_pcrel3 ++;
2702
2703 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2704
2705 /* The values we compare PCREL with are not what you'd
2706 expect; they're off by a little to compensate for (1)
2707 where the reloc is relative to the insn, and (2) how much
2708 the insn is going to change when we relax it. */
2709
2710 /* These we have to decode. */
2711 switch (insn[0])
2712 {
2713 case 0x04: /* BRA pcdsp:24 */
2714 if (-32768 + alignment_glue <= pcrel
2715 && pcrel <= 32765 - alignment_glue)
2716 {
2717 insn[0] = 0x38;
2718 SNIP (3, 1, newrel);
2719 *again = TRUE;
2720 }
2721 break;
2722
2723 case 0x38: /* BRA pcdsp:16 */
2724 if (-128 + alignment_glue <= pcrel
2725 && pcrel <= 127 - alignment_glue)
2726 {
2727 insn[0] = 0x2e;
2728 SNIP (2, 1, newrel);
2729 *again = TRUE;
2730 }
2731 break;
2732
2733 case 0x2e: /* BRA pcdsp:8 */
2734 /* Note that there's a risk here of shortening things so
2735 much that we no longer fit this reloc; it *should*
2736 only happen when you branch across a branch, and that
2737 branch also devolves into BRA.S. "Real" code should
2738 be OK. */
2739 if (max_pcrel3 + alignment_glue <= pcrel
2740 && pcrel <= 10 - alignment_glue
2741 && allow_pcrel3)
2742 {
2743 insn[0] = 0x08;
2744 SNIP (1, 1, newrel);
2745 move_reloc (irel, srel, -1);
2746 *again = TRUE;
2747 }
2748 break;
2749
2750 case 0x05: /* BSR pcdsp:24 */
2751 if (-32768 + alignment_glue <= pcrel
2752 && pcrel <= 32765 - alignment_glue)
2753 {
2754 insn[0] = 0x39;
2755 SNIP (1, 1, newrel);
2756 *again = TRUE;
2757 }
2758 break;
2759
2760 case 0x3a: /* BEQ.W pcdsp:16 */
2761 case 0x3b: /* BNE.W pcdsp:16 */
2762 if (-128 + alignment_glue <= pcrel
2763 && pcrel <= 127 - alignment_glue)
2764 {
2765 insn[0] = 0x20 | (insn[0] & 1);
2766 SNIP (1, 1, newrel);
2767 *again = TRUE;
2768 }
2769 break;
2770
2771 case 0x20: /* BEQ.B pcdsp:8 */
2772 case 0x21: /* BNE.B pcdsp:8 */
2773 if (max_pcrel3 + alignment_glue <= pcrel
2774 && pcrel - alignment_glue <= 10
2775 && allow_pcrel3)
2776 {
2777 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2778 SNIP (1, 1, newrel);
2779 move_reloc (irel, srel, -1);
2780 *again = TRUE;
2781 }
2782 break;
2783
2784 case 0x16: /* synthetic BNE dsp24 */
2785 case 0x1e: /* synthetic BEQ dsp24 */
2786 if (-32767 + alignment_glue <= pcrel
2787 && pcrel <= 32766 - alignment_glue
2788 && insn[1] == 0x04)
2789 {
2790 if (insn[0] == 0x16)
2791 insn[0] = 0x3b;
2792 else
2793 insn[0] = 0x3a;
2794 /* We snip out the bytes at the end else the reloc
2795 will get moved too, and too much. */
2796 SNIP (3, 2, newrel);
2797 move_reloc (irel, srel, -1);
2798 *again = TRUE;
2799 }
2800 break;
2801 }
2802
2803 /* Special case - synthetic conditional branches, pcrel24.
2804 Note that EQ and NE have been handled above. */
2805 if ((insn[0] & 0xf0) == 0x20
2806 && insn[1] == 0x06
2807 && insn[2] == 0x04
2808 && srel->r_offset != irel->r_offset + 1
2809 && -32767 + alignment_glue <= pcrel
2810 && pcrel <= 32766 - alignment_glue)
2811 {
2812 insn[1] = 0x05;
2813 insn[2] = 0x38;
2814 SNIP (5, 1, newrel);
2815 *again = TRUE;
2816 }
2817
2818 /* Special case - synthetic conditional branches, pcrel16 */
2819 if ((insn[0] & 0xf0) == 0x20
2820 && insn[1] == 0x05
2821 && insn[2] == 0x38
2822 && srel->r_offset != irel->r_offset + 1
2823 && -127 + alignment_glue <= pcrel
2824 && pcrel <= 126 - alignment_glue)
2825 {
2826 int cond = (insn[0] & 0x0f) ^ 0x01;
2827
2828 insn[0] = 0x20 | cond;
2829 /* By moving the reloc first, we avoid having
2830 delete_bytes move it also. */
2831 move_reloc (irel, srel, -2);
2832 SNIP (2, 3, newrel);
2833 *again = TRUE;
2834 }
2835 }
2836
2837 BFD_ASSERT (nrelocs == 0);
2838
2839 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2840 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2841 because it may have one or two relocations. */
2842 if ((insn[0] & 0xfc) == 0xf8
2843 && (insn[1] & 0x80) == 0x00
2844 && (insn[0] & 0x03) != 0x03)
2845 {
2846 int dcode, icode, reg, ioff, dscale, ilen;
2847 bfd_vma disp_val = 0;
2848 long imm_val = 0;
2849 Elf_Internal_Rela * disp_rel = 0;
2850 Elf_Internal_Rela * imm_rel = 0;
2851
2852 /* Reset this. */
2853 srel = irel;
2854
2855 dcode = insn[0] & 0x03;
2856 icode = (insn[1] >> 2) & 0x03;
2857 reg = (insn[1] >> 4) & 0x0f;
2858
2859 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2860
2861 /* Figure out what the dispacement is. */
2862 if (dcode == 1 || dcode == 2)
2863 {
2864 /* There's a displacement. See if there's a reloc for it. */
2865 if (srel[1].r_offset == irel->r_offset + 2)
2866 {
2867 GET_RELOC;
2868 disp_val = symval;
2869 disp_rel = srel;
2870 }
2871 else
2872 {
2873 if (dcode == 1)
2874 disp_val = insn[2];
2875 else
2876 {
2877 #if RX_OPCODE_BIG_ENDIAN
2878 disp_val = insn[2] * 256 + insn[3];
2879 #else
2880 disp_val = insn[2] + insn[3] * 256;
2881 #endif
2882 }
2883 switch (insn[1] & 3)
2884 {
2885 case 1:
2886 disp_val *= 2;
2887 scale = 2;
2888 break;
2889 case 2:
2890 disp_val *= 4;
2891 scale = 4;
2892 break;
2893 }
2894 }
2895 }
2896
2897 dscale = scale;
2898
2899 /* Figure out what the immediate is. */
2900 if (srel[1].r_offset == irel->r_offset + ioff)
2901 {
2902 GET_RELOC;
2903 imm_val = (long) symval;
2904 imm_rel = srel;
2905 }
2906 else
2907 {
2908 unsigned char * ip = insn + ioff;
2909
2910 switch (icode)
2911 {
2912 case 1:
2913 /* For byte writes, we don't sign extend. Makes the math easier later. */
2914 if (scale == 1)
2915 imm_val = ip[0];
2916 else
2917 imm_val = (char) ip[0];
2918 break;
2919 case 2:
2920 #if RX_OPCODE_BIG_ENDIAN
2921 imm_val = ((char) ip[0] << 8) | ip[1];
2922 #else
2923 imm_val = ((char) ip[1] << 8) | ip[0];
2924 #endif
2925 break;
2926 case 3:
2927 #if RX_OPCODE_BIG_ENDIAN
2928 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2929 #else
2930 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2931 #endif
2932 break;
2933 case 0:
2934 #if RX_OPCODE_BIG_ENDIAN
2935 imm_val = ((unsigned) ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2936 #else
2937 imm_val = ((unsigned) ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2938 #endif
2939 break;
2940 }
2941 }
2942
2943 ilen = 2;
2944
2945 switch (dcode)
2946 {
2947 case 1:
2948 ilen += 1;
2949 break;
2950 case 2:
2951 ilen += 2;
2952 break;
2953 }
2954
2955 switch (icode)
2956 {
2957 case 1:
2958 ilen += 1;
2959 break;
2960 case 2:
2961 ilen += 2;
2962 break;
2963 case 3:
2964 ilen += 3;
2965 break;
2966 case 4:
2967 ilen += 4;
2968 break;
2969 }
2970
2971 /* The shortcut happens when the immediate is 0..255,
2972 register r0 to r7, and displacement (scaled) 0..31. */
2973
2974 if (0 <= imm_val && imm_val <= 255
2975 && 0 <= reg && reg <= 7
2976 && disp_val / dscale <= 31)
2977 {
2978 insn[0] = 0x3c | (insn[1] & 0x03);
2979 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2980 insn[2] = imm_val;
2981
2982 if (disp_rel)
2983 {
2984 int newrel = R_RX_NONE;
2985
2986 switch (dscale)
2987 {
2988 case 1:
2989 newrel = R_RX_RH_ABS5p8B;
2990 break;
2991 case 2:
2992 newrel = R_RX_RH_ABS5p8W;
2993 break;
2994 case 4:
2995 newrel = R_RX_RH_ABS5p8L;
2996 break;
2997 }
2998 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2999 move_reloc (irel, disp_rel, -1);
3000 }
3001 if (imm_rel)
3002 {
3003 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
3004 move_reloc (disp_rel ? disp_rel : irel,
3005 imm_rel,
3006 irel->r_offset - imm_rel->r_offset + 2);
3007 }
3008
3009 SNIPNR (3, ilen - 3);
3010 *again = TRUE;
3011
3012 /* We can't relax this new opcode. */
3013 irel->r_addend = 0;
3014 }
3015 }
3016 }
3017
3018 /* We can't reliably relax branches to DIR3U_PCREL unless we know
3019 whatever they're branching over won't shrink any more. If we're
3020 basically done here, do one more pass just for branches - but
3021 don't request a pass after that one! */
3022 if (!*again && !allow_pcrel3)
3023 {
3024 bfd_boolean ignored;
3025
3026 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
3027 }
3028
3029 return TRUE;
3030
3031 error_return:
3032 if (free_contents != NULL)
3033 free (free_contents);
3034
3035 if (shndx_buf != NULL)
3036 {
3037 shndx_hdr->contents = NULL;
3038 free (shndx_buf);
3039 }
3040
3041 if (free_intsyms != NULL)
3042 free (free_intsyms);
3043
3044 return FALSE;
3045 }
3046
3047 static bfd_boolean
3048 elf32_rx_relax_section_wrapper (bfd * abfd,
3049 asection * sec,
3050 struct bfd_link_info * link_info,
3051 bfd_boolean * again)
3052 {
3053 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
3054 }
3055 \f
3056 /* Function to set the ELF flag bits. */
3057
3058 static bfd_boolean
3059 rx_elf_set_private_flags (bfd * abfd, flagword flags)
3060 {
3061 elf_elfheader (abfd)->e_flags = flags;
3062 elf_flags_init (abfd) = TRUE;
3063 return TRUE;
3064 }
3065
3066 static bfd_boolean no_warn_mismatch = FALSE;
3067 static bfd_boolean ignore_lma = TRUE;
3068
3069 void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean);
3070
3071 void
3072 bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch,
3073 bfd_boolean user_ignore_lma)
3074 {
3075 no_warn_mismatch = user_no_warn_mismatch;
3076 ignore_lma = user_ignore_lma;
3077 }
3078
3079 /* Converts FLAGS into a descriptive string.
3080 Returns a static pointer. */
3081
3082 static const char *
3083 describe_flags (flagword flags)
3084 {
3085 static char buf [128];
3086
3087 buf[0] = 0;
3088
3089 if (flags & E_FLAG_RX_64BIT_DOUBLES)
3090 strcat (buf, "64-bit doubles");
3091 else
3092 strcat (buf, "32-bit doubles");
3093
3094 if (flags & E_FLAG_RX_DSP)
3095 strcat (buf, ", dsp");
3096 else
3097 strcat (buf, ", no dsp");
3098
3099 if (flags & E_FLAG_RX_PID)
3100 strcat (buf, ", pid");
3101 else
3102 strcat (buf, ", no pid");
3103
3104 if (flags & E_FLAG_RX_ABI)
3105 strcat (buf, ", RX ABI");
3106 else
3107 strcat (buf, ", GCC ABI");
3108
3109 if (flags & E_FLAG_RX_SINSNS_SET)
3110 strcat (buf, flags & E_FLAG_RX_SINSNS_YES ? ", uses String instructions" : ", bans String instructions");
3111
3112 return buf;
3113 }
3114
3115 /* Merge backend specific data from an object file to the output
3116 object file when linking. */
3117
3118 static bfd_boolean
3119 rx_elf_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info)
3120 {
3121 bfd *obfd = info->output_bfd;
3122 flagword old_flags;
3123 flagword new_flags;
3124 bfd_boolean error = FALSE;
3125
3126 new_flags = elf_elfheader (ibfd)->e_flags;
3127 old_flags = elf_elfheader (obfd)->e_flags;
3128
3129 if (!elf_flags_init (obfd))
3130 {
3131 /* First call, no flags set. */
3132 elf_flags_init (obfd) = TRUE;
3133 elf_elfheader (obfd)->e_flags = new_flags;
3134 }
3135 else if (old_flags != new_flags)
3136 {
3137 flagword known_flags;
3138
3139 if (old_flags & E_FLAG_RX_SINSNS_SET)
3140 {
3141 if ((new_flags & E_FLAG_RX_SINSNS_SET) == 0)
3142 {
3143 new_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3144 new_flags |= (old_flags & E_FLAG_RX_SINSNS_MASK);
3145 }
3146 }
3147 else if (new_flags & E_FLAG_RX_SINSNS_SET)
3148 {
3149 old_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3150 old_flags |= (new_flags & E_FLAG_RX_SINSNS_MASK);
3151 }
3152
3153 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
3154 | E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK;
3155
3156 if ((old_flags ^ new_flags) & known_flags)
3157 {
3158 /* Only complain if flag bits we care about do not match.
3159 Other bits may be set, since older binaries did use some
3160 deprecated flags. */
3161 if (no_warn_mismatch)
3162 {
3163 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
3164 }
3165 else
3166 {
3167 _bfd_error_handler (_("there is a conflict merging the"
3168 " ELF header flags from %pB"),
3169 ibfd);
3170 _bfd_error_handler (_(" the input file's flags: %s"),
3171 describe_flags (new_flags));
3172 _bfd_error_handler (_(" the output file's flags: %s"),
3173 describe_flags (old_flags));
3174 error = TRUE;
3175 }
3176 }
3177 else
3178 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
3179 }
3180
3181 if (error)
3182 bfd_set_error (bfd_error_bad_value);
3183
3184 return !error;
3185 }
3186 \f
3187 static bfd_boolean
3188 rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
3189 {
3190 FILE * file = (FILE *) ptr;
3191 flagword flags;
3192
3193 BFD_ASSERT (abfd != NULL && ptr != NULL);
3194
3195 /* Print normal ELF private data. */
3196 _bfd_elf_print_private_bfd_data (abfd, ptr);
3197
3198 flags = elf_elfheader (abfd)->e_flags;
3199 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
3200
3201 fprintf (file, "%s", describe_flags (flags));
3202 return TRUE;
3203 }
3204
3205 /* Return the MACH for an e_flags value. */
3206
3207 static int
3208 elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
3209 {
3210 #if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
3211 Need to sort out how these flag bits are used.
3212 For now we assume that the flags are OK. */
3213 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
3214 #endif
3215 if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V2))
3216 return bfd_mach_rx_v2;
3217 else if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V3))
3218 return bfd_mach_rx_v3;
3219 else
3220 return bfd_mach_rx;
3221
3222 return 0;
3223 }
3224
3225 static bfd_boolean
3226 rx_elf_object_p (bfd * abfd)
3227 {
3228 int i;
3229 unsigned int u;
3230 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr;
3231 Elf_Internal_Ehdr *ehdr = elf_elfheader (abfd);
3232 int nphdrs = ehdr->e_phnum;
3233 sec_ptr bsec;
3234 static int saw_be = FALSE;
3235 bfd_vma end_phdroff;
3236
3237 /* We never want to automatically choose the non-swapping big-endian
3238 target. The user can only get that explicitly, such as with -I
3239 and objcopy. */
3240 if (abfd->xvec == &rx_elf32_be_ns_vec
3241 && abfd->target_defaulted)
3242 return FALSE;
3243
3244 /* BFD->target_defaulted is not set to TRUE when a target is chosen
3245 as a fallback, so we check for "scanning" to know when to stop
3246 using the non-swapping target. */
3247 if (abfd->xvec == &rx_elf32_be_ns_vec
3248 && saw_be)
3249 return FALSE;
3250 if (abfd->xvec == &rx_elf32_be_vec)
3251 saw_be = TRUE;
3252
3253 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
3254 elf32_rx_machine (abfd));
3255
3256 /* For each PHDR in the object, we must find some section that
3257 corresponds (based on matching file offsets) and use its VMA
3258 information to reconstruct the p_vaddr field we clobbered when we
3259 wrote it out. */
3260 /* If PT_LOAD headers include the ELF file header or program headers
3261 then the PT_LOAD header does not start with some section contents.
3262 Making adjustments based on the difference between sh_offset and
3263 p_offset is nonsense in such cases. Exclude them. Note that
3264 since standard linker scripts for RX do not use SIZEOF_HEADERS,
3265 the linker won't normally create PT_LOAD segments covering the
3266 headers so this is mainly for passing the ld testsuite.
3267 FIXME. Why are we looking at non-PT_LOAD headers here? */
3268 end_phdroff = ehdr->e_ehsize;
3269 if (ehdr->e_phoff != 0)
3270 end_phdroff = ehdr->e_phoff + nphdrs * ehdr->e_phentsize;
3271 for (i=0; i<nphdrs; i++)
3272 {
3273 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++)
3274 {
3275 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
3276
3277 if (phdr[i].p_filesz
3278 && phdr[i].p_offset >= end_phdroff
3279 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset
3280 && sec->sh_size > 0
3281 && sec->sh_type != SHT_NOBITS
3282 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
3283 {
3284 /* Found one! The difference between the two addresses,
3285 plus the difference between the two file offsets, is
3286 enough information to reconstruct the lma. */
3287
3288 /* Example where they aren't:
3289 PHDR[1] = lma fffc0100 offset 00002010 size 00000100
3290 SEC[6] = vma 00000050 offset 00002050 size 00000040
3291
3292 The correct LMA for the section is fffc0140 + (2050-2010).
3293 */
3294
3295 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
3296 break;
3297 }
3298 }
3299
3300 /* We must update the bfd sections as well, so we don't stop
3301 with one match. */
3302 bsec = abfd->sections;
3303 while (bsec)
3304 {
3305 if (phdr[i].p_filesz
3306 && phdr[i].p_vaddr <= bsec->vma
3307 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
3308 {
3309 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
3310 }
3311 bsec = bsec->next;
3312 }
3313 }
3314
3315 return TRUE;
3316 }
3317
3318 static bfd_boolean
3319 rx_linux_object_p (bfd * abfd)
3320 {
3321 bfd_default_set_arch_mach (abfd, bfd_arch_rx, elf32_rx_machine (abfd));
3322 return TRUE;
3323 }
3324 \f
3325
3326 #ifdef DEBUG
3327 void
3328 rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
3329 {
3330 size_t locsymcount;
3331 Elf_Internal_Sym * isymbuf;
3332 Elf_Internal_Sym * isymend;
3333 Elf_Internal_Sym * isym;
3334 Elf_Internal_Shdr * symtab_hdr;
3335 bfd_boolean free_internal = FALSE, free_external = FALSE;
3336 char * st_info_str;
3337 char * st_info_stb_str;
3338 char * st_other_str;
3339 char * st_shndx_str;
3340
3341 if (! internal_syms)
3342 {
3343 internal_syms = bfd_malloc (1000);
3344 free_internal = 1;
3345 }
3346 if (! external_syms)
3347 {
3348 external_syms = bfd_malloc (1000);
3349 free_external = 1;
3350 }
3351
3352 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3353 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
3354 if (free_internal)
3355 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3356 symtab_hdr->sh_info, 0,
3357 internal_syms, external_syms, NULL);
3358 else
3359 isymbuf = internal_syms;
3360 isymend = isymbuf + locsymcount;
3361
3362 for (isym = isymbuf ; isym < isymend ; isym++)
3363 {
3364 switch (ELF_ST_TYPE (isym->st_info))
3365 {
3366 case STT_FUNC: st_info_str = "STT_FUNC"; break;
3367 case STT_SECTION: st_info_str = "STT_SECTION"; break;
3368 case STT_FILE: st_info_str = "STT_FILE"; break;
3369 case STT_OBJECT: st_info_str = "STT_OBJECT"; break;
3370 case STT_TLS: st_info_str = "STT_TLS"; break;
3371 default: st_info_str = "";
3372 }
3373 switch (ELF_ST_BIND (isym->st_info))
3374 {
3375 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break;
3376 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break;
3377 default: st_info_stb_str = "";
3378 }
3379 switch (ELF_ST_VISIBILITY (isym->st_other))
3380 {
3381 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break;
3382 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break;
3383 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break;
3384 default: st_other_str = "";
3385 }
3386 switch (isym->st_shndx)
3387 {
3388 case SHN_ABS: st_shndx_str = "SHN_ABS"; break;
3389 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break;
3390 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break;
3391 default: st_shndx_str = "";
3392 }
3393
3394 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3395 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3396 isym,
3397 (unsigned long) isym->st_value,
3398 (unsigned long) isym->st_size,
3399 isym->st_name,
3400 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3401 isym->st_name),
3402 isym->st_info, st_info_str, st_info_stb_str,
3403 isym->st_other, st_other_str,
3404 isym->st_shndx, st_shndx_str);
3405 }
3406 if (free_internal)
3407 free (internal_syms);
3408 if (free_external)
3409 free (external_syms);
3410 }
3411
3412 char *
3413 rx_get_reloc (long reloc)
3414 {
3415 if (0 <= reloc && reloc < R_RX_max)
3416 return rx_elf_howto_table[reloc].name;
3417 return "";
3418 }
3419 #endif /* DEBUG */
3420
3421 \f
3422 /* We must take care to keep the on-disk copy of any code sections
3423 that are fully linked swapped if the target is big endian, to match
3424 the Renesas tools. */
3425
3426 /* The rule is: big endian object that are final-link executables,
3427 have code sections stored with 32-bit words swapped relative to
3428 what you'd get by default. */
3429
3430 static bfd_boolean
3431 rx_get_section_contents (bfd * abfd,
3432 sec_ptr section,
3433 void * location,
3434 file_ptr offset,
3435 bfd_size_type count)
3436 {
3437 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3438 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3439 bfd_boolean rv;
3440
3441 #ifdef DJDEBUG
3442 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3443 (long) offset, (long) count, section->name,
3444 bfd_big_endian(abfd) ? "be" : "le",
3445 exec, s_code, (long unsigned) section->filepos,
3446 (long unsigned) offset);
3447 #endif
3448
3449 if (exec && s_code && bfd_big_endian (abfd))
3450 {
3451 char * cloc = (char *) location;
3452 bfd_size_type cnt, end_cnt;
3453
3454 rv = TRUE;
3455
3456 /* Fetch and swap unaligned bytes at the beginning. */
3457 if (offset % 4)
3458 {
3459 char buf[4];
3460
3461 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3462 (offset & -4), 4);
3463 if (!rv)
3464 return FALSE;
3465
3466 bfd_putb32 (bfd_getl32 (buf), buf);
3467
3468 cnt = 4 - (offset % 4);
3469 if (cnt > count)
3470 cnt = count;
3471
3472 memcpy (location, buf + (offset % 4), cnt);
3473
3474 count -= cnt;
3475 offset += cnt;
3476 cloc += count;
3477 }
3478
3479 end_cnt = count % 4;
3480
3481 /* Fetch and swap the middle bytes. */
3482 if (count >= 4)
3483 {
3484 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3485 count - end_cnt);
3486 if (!rv)
3487 return FALSE;
3488
3489 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3490 bfd_putb32 (bfd_getl32 (cloc), cloc);
3491 }
3492
3493 /* Fetch and swap the end bytes. */
3494 if (end_cnt > 0)
3495 {
3496 char buf[4];
3497
3498 /* Fetch the end bytes. */
3499 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3500 offset + count - end_cnt, 4);
3501 if (!rv)
3502 return FALSE;
3503
3504 bfd_putb32 (bfd_getl32 (buf), buf);
3505 memcpy (cloc, buf, end_cnt);
3506 }
3507 }
3508 else
3509 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3510
3511 return rv;
3512 }
3513
3514 #ifdef DJDEBUG
3515 static bfd_boolean
3516 rx2_set_section_contents (bfd * abfd,
3517 sec_ptr section,
3518 const void * location,
3519 file_ptr offset,
3520 bfd_size_type count)
3521 {
3522 bfd_size_type i;
3523
3524 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3525 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3526 for (i = 0; i < count; i++)
3527 {
3528 if (i % 16 == 0 && i > 0)
3529 fprintf (stderr, "\n");
3530
3531 if (i % 16 && i % 4 == 0)
3532 fprintf (stderr, " ");
3533
3534 if (i % 16 == 0)
3535 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3536
3537 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3538 }
3539 fprintf (stderr, "\n");
3540
3541 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3542 }
3543 #define _bfd_elf_set_section_contents rx2_set_section_contents
3544 #endif
3545
3546 static bfd_boolean
3547 rx_set_section_contents (bfd * abfd,
3548 sec_ptr section,
3549 const void * location,
3550 file_ptr offset,
3551 bfd_size_type count)
3552 {
3553 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3554 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3555 bfd_boolean rv;
3556 char * swapped_data = NULL;
3557 bfd_size_type i;
3558 bfd_vma caddr = section->vma + offset;
3559 file_ptr faddr = 0;
3560 bfd_size_type scount;
3561
3562 #ifdef DJDEBUG
3563 bfd_size_type i;
3564
3565 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3566 (long) offset, (long) count, section->name,
3567 bfd_big_endian (abfd) ? "be" : "le",
3568 exec, s_code);
3569
3570 for (i = 0; i < count; i++)
3571 {
3572 int a = section->vma + offset + i;
3573
3574 if (a % 16 == 0 && a > 0)
3575 fprintf (stderr, "\n");
3576
3577 if (a % 16 && a % 4 == 0)
3578 fprintf (stderr, " ");
3579
3580 if (a % 16 == 0 || i == 0)
3581 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3582
3583 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3584 }
3585
3586 fprintf (stderr, "\n");
3587 #endif
3588
3589 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3590 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3591
3592 while (count > 0 && caddr > 0 && caddr % 4)
3593 {
3594 switch (caddr % 4)
3595 {
3596 case 0: faddr = offset + 3; break;
3597 case 1: faddr = offset + 1; break;
3598 case 2: faddr = offset - 1; break;
3599 case 3: faddr = offset - 3; break;
3600 }
3601
3602 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3603 if (! rv)
3604 return rv;
3605
3606 location = (bfd_byte *) location + 1;
3607 offset ++;
3608 count --;
3609 caddr ++;
3610 }
3611
3612 scount = (int)(count / 4) * 4;
3613 if (scount > 0)
3614 {
3615 char * cloc = (char *) location;
3616
3617 swapped_data = (char *) bfd_alloc (abfd, count);
3618
3619 for (i = 0; i < count; i += 4)
3620 {
3621 bfd_vma v = bfd_getl32 (cloc + i);
3622 bfd_putb32 (v, swapped_data + i);
3623 }
3624
3625 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3626
3627 if (!rv)
3628 return rv;
3629 }
3630
3631 count -= scount;
3632 location = (bfd_byte *) location + scount;
3633 offset += scount;
3634
3635 if (count > 0)
3636 {
3637 caddr = section->vma + offset;
3638 while (count > 0)
3639 {
3640 switch (caddr % 4)
3641 {
3642 case 0: faddr = offset + 3; break;
3643 case 1: faddr = offset + 1; break;
3644 case 2: faddr = offset - 1; break;
3645 case 3: faddr = offset - 3; break;
3646 }
3647 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3648 if (! rv)
3649 return rv;
3650
3651 location = (bfd_byte *) location + 1;
3652 offset ++;
3653 count --;
3654 caddr ++;
3655 }
3656 }
3657
3658 return TRUE;
3659 }
3660
3661 static bfd_boolean
3662 rx_final_link (bfd * abfd, struct bfd_link_info * info)
3663 {
3664 asection * o;
3665
3666 for (o = abfd->sections; o != NULL; o = o->next)
3667 {
3668 #ifdef DJDEBUG
3669 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3670 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3671 #endif
3672 if (o->flags & SEC_CODE
3673 && bfd_big_endian (abfd)
3674 && o->size % 4)
3675 {
3676 #ifdef DJDEBUG
3677 fprintf (stderr, "adjusting...\n");
3678 #endif
3679 o->size += 4 - (o->size % 4);
3680 }
3681 }
3682
3683 return bfd_elf_final_link (abfd, info);
3684 }
3685
3686 static bfd_boolean
3687 elf32_rx_modify_headers (bfd *abfd, struct bfd_link_info *info)
3688 {
3689 const struct elf_backend_data * bed;
3690 struct elf_obj_tdata * tdata;
3691 Elf_Internal_Phdr * phdr;
3692 unsigned int count;
3693 unsigned int i;
3694
3695 bed = get_elf_backend_data (abfd);
3696 tdata = elf_tdata (abfd);
3697 phdr = tdata->phdr;
3698 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr;
3699
3700 if (ignore_lma)
3701 for (i = count; i-- != 0;)
3702 if (phdr[i].p_type == PT_LOAD)
3703 {
3704 /* The Renesas tools expect p_paddr to be zero. However,
3705 there is no other way to store the writable data in ROM for
3706 startup initialization. So, we let the linker *think*
3707 we're using paddr and vaddr the "usual" way, but at the
3708 last minute we move the paddr into the vaddr (which is what
3709 the simulator uses) and zero out paddr. Note that this
3710 does not affect the section headers, just the program
3711 headers. We hope. */
3712 phdr[i].p_vaddr = phdr[i].p_paddr;
3713 #if 0 /* If we zero out p_paddr, then the LMA in the section table
3714 becomes wrong. */
3715 phdr[i].p_paddr = 0;
3716 #endif
3717 }
3718
3719 return _bfd_elf_modify_headers (abfd, info);
3720 }
3721
3722 /* The default literal sections should always be marked as "code" (i.e.,
3723 SHF_EXECINSTR). This is particularly important for big-endian mode
3724 when we do not want their contents byte reversed. */
3725 static const struct bfd_elf_special_section elf32_rx_special_sections[] =
3726 {
3727 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3728 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3729 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3730 { NULL, 0, 0, 0, 0 }
3731 };
3732 \f
3733 typedef struct {
3734 bfd *abfd;
3735 struct bfd_link_info *info;
3736 bfd_vma table_start;
3737 int table_size;
3738 bfd_vma *table_handlers;
3739 bfd_vma table_default_handler;
3740 struct bfd_link_hash_entry **table_entries;
3741 struct bfd_link_hash_entry *table_default_entry;
3742 FILE *mapfile;
3743 } RX_Table_Info;
3744
3745 static bfd_boolean
3746 rx_table_find (struct bfd_hash_entry *vent, void *vinfo)
3747 {
3748 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3749 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3750 const char *name; /* of the symbol we've found */
3751 asection *sec;
3752 struct bfd *abfd;
3753 int idx;
3754 const char *tname; /* name of the table */
3755 bfd_vma start_addr, end_addr;
3756 char *buf;
3757 struct bfd_link_hash_entry * h;
3758
3759 /* We're looking for globally defined symbols of the form
3760 $tablestart$<NAME>. */
3761 if (ent->type != bfd_link_hash_defined
3762 && ent->type != bfd_link_hash_defweak)
3763 return TRUE;
3764
3765 name = ent->root.string;
3766 sec = ent->u.def.section;
3767 abfd = sec->owner;
3768
3769 if (strncmp (name, "$tablestart$", 12))
3770 return TRUE;
3771
3772 sec->flags |= SEC_KEEP;
3773
3774 tname = name + 12;
3775
3776 start_addr = ent->u.def.value;
3777
3778 /* At this point, we can't build the table but we can (and must)
3779 find all the related symbols and mark their sections as SEC_KEEP
3780 so we don't garbage collect them. */
3781
3782 buf = (char *) malloc (12 + 10 + strlen (tname));
3783
3784 sprintf (buf, "$tableend$%s", tname);
3785 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3786 if (!h || (h->type != bfd_link_hash_defined
3787 && h->type != bfd_link_hash_defweak))
3788 {
3789 /* xgettext:c-format */
3790 _bfd_error_handler (_("%pB:%pA: table %s missing corresponding %s"),
3791 abfd, sec, name, buf);
3792 return TRUE;
3793 }
3794
3795 if (h->u.def.section != ent->u.def.section)
3796 {
3797 /* xgettext:c-format */
3798 _bfd_error_handler (_("%pB:%pA: %s and %s must be in the same input section"),
3799 h->u.def.section->owner, h->u.def.section,
3800 name, buf);
3801 return TRUE;
3802 }
3803
3804 end_addr = h->u.def.value;
3805
3806 sprintf (buf, "$tableentry$default$%s", tname);
3807 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3808 if (h && (h->type == bfd_link_hash_defined
3809 || h->type == bfd_link_hash_defweak))
3810 {
3811 h->u.def.section->flags |= SEC_KEEP;
3812 }
3813
3814 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3815 {
3816 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3817 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3818 if (h && (h->type == bfd_link_hash_defined
3819 || h->type == bfd_link_hash_defweak))
3820 {
3821 h->u.def.section->flags |= SEC_KEEP;
3822 }
3823 }
3824
3825 /* Return TRUE to keep scanning, FALSE to end the traversal. */
3826 return TRUE;
3827 }
3828
3829 /* We need to check for table entry symbols and build the tables, and
3830 we need to do it before the linker does garbage collection. This function is
3831 called once per input object file. */
3832 static bfd_boolean
3833 rx_check_directives
3834 (bfd * abfd ATTRIBUTE_UNUSED,
3835 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3836 {
3837 RX_Table_Info stuff;
3838
3839 stuff.abfd = abfd;
3840 stuff.info = info;
3841 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff);
3842
3843 return TRUE;
3844 }
3845
3846 \f
3847 static bfd_boolean
3848 rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo)
3849 {
3850 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3851 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3852 int idx;
3853 const char *name;
3854 bfd_vma addr;
3855
3856 /* See if the symbol ENT has an address listed in the table, and
3857 isn't a debug/special symbol. If so, put it in the table. */
3858
3859 if (ent->type != bfd_link_hash_defined
3860 && ent->type != bfd_link_hash_defweak)
3861 return TRUE;
3862
3863 name = ent->root.string;
3864
3865 if (name[0] == '$' || name[0] == '.' || name[0] < ' ')
3866 return TRUE;
3867
3868 addr = (ent->u.def.value
3869 + ent->u.def.section->output_section->vma
3870 + ent->u.def.section->output_offset);
3871
3872 for (idx = 0; idx < info->table_size; idx ++)
3873 if (addr == info->table_handlers[idx])
3874 info->table_entries[idx] = ent;
3875
3876 if (addr == info->table_default_handler)
3877 info->table_default_entry = ent;
3878
3879 return TRUE;
3880 }
3881
3882 static bfd_boolean
3883 rx_table_map (struct bfd_hash_entry *vent, void *vinfo)
3884 {
3885 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3886 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3887 const char *name; /* of the symbol we've found */
3888 int idx;
3889 const char *tname; /* name of the table */
3890 bfd_vma start_addr, end_addr;
3891 char *buf;
3892 struct bfd_link_hash_entry * h;
3893 int need_elipses;
3894
3895 /* We're looking for globally defined symbols of the form
3896 $tablestart$<NAME>. */
3897 if (ent->type != bfd_link_hash_defined
3898 && ent->type != bfd_link_hash_defweak)
3899 return TRUE;
3900
3901 name = ent->root.string;
3902
3903 if (strncmp (name, "$tablestart$", 12))
3904 return TRUE;
3905
3906 tname = name + 12;
3907 start_addr = (ent->u.def.value
3908 + ent->u.def.section->output_section->vma
3909 + ent->u.def.section->output_offset);
3910
3911 buf = (char *) malloc (12 + 10 + strlen (tname));
3912
3913 sprintf (buf, "$tableend$%s", tname);
3914 end_addr = get_symbol_value_maybe (buf, info->info);
3915
3916 sprintf (buf, "$tableentry$default$%s", tname);
3917 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3918 if (h)
3919 {
3920 info->table_default_handler = (h->u.def.value
3921 + h->u.def.section->output_section->vma
3922 + h->u.def.section->output_offset);
3923 }
3924 else
3925 /* Zero is a valid handler address! */
3926 info->table_default_handler = (bfd_vma) (-1);
3927 info->table_default_entry = NULL;
3928
3929 info->table_start = start_addr;
3930 info->table_size = (int) (end_addr - start_addr) / 4;
3931 info->table_handlers = (bfd_vma *) malloc (info->table_size * sizeof (bfd_vma));
3932 info->table_entries = (struct bfd_link_hash_entry **) malloc (info->table_size * sizeof (struct bfd_link_hash_entry));
3933
3934 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3935 {
3936 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3937 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3938 if (h && (h->type == bfd_link_hash_defined
3939 || h->type == bfd_link_hash_defweak))
3940 {
3941 info->table_handlers[idx] = (h->u.def.value
3942 + h->u.def.section->output_section->vma
3943 + h->u.def.section->output_offset);
3944 }
3945 else
3946 info->table_handlers[idx] = info->table_default_handler;
3947 info->table_entries[idx] = NULL;
3948 }
3949
3950 free (buf);
3951
3952 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info);
3953
3954 fprintf (info->mapfile, "\nRX Vector Table: %s has %d entries at 0x%08" BFD_VMA_FMT "x\n\n",
3955 tname, info->table_size, start_addr);
3956
3957 if (info->table_default_entry)
3958 fprintf (info->mapfile, " default handler is: %s at 0x%08" BFD_VMA_FMT "x\n",
3959 info->table_default_entry->root.string,
3960 info->table_default_handler);
3961 else if (info->table_default_handler != (bfd_vma)(-1))
3962 fprintf (info->mapfile, " default handler is at 0x%08" BFD_VMA_FMT "x\n",
3963 info->table_default_handler);
3964 else
3965 fprintf (info->mapfile, " no default handler\n");
3966
3967 need_elipses = 1;
3968 for (idx = 0; idx < info->table_size; idx ++)
3969 {
3970 if (info->table_handlers[idx] == info->table_default_handler)
3971 {
3972 if (need_elipses)
3973 fprintf (info->mapfile, " . . .\n");
3974 need_elipses = 0;
3975 continue;
3976 }
3977 need_elipses = 1;
3978
3979 fprintf (info->mapfile, " 0x%08" BFD_VMA_FMT "x [%3d] ", start_addr + 4 * idx, idx);
3980
3981 if (info->table_handlers[idx] == (bfd_vma) (-1))
3982 fprintf (info->mapfile, "(no handler found)\n");
3983
3984 else if (info->table_handlers[idx] == info->table_default_handler)
3985 {
3986 if (info->table_default_entry)
3987 fprintf (info->mapfile, "(default)\n");
3988 else
3989 fprintf (info->mapfile, "(default)\n");
3990 }
3991
3992 else if (info->table_entries[idx])
3993 {
3994 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x %s\n", info->table_handlers[idx], info->table_entries[idx]->root.string);
3995 }
3996
3997 else
3998 {
3999 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x ???\n", info->table_handlers[idx]);
4000 }
4001 }
4002 if (need_elipses)
4003 fprintf (info->mapfile, " . . .\n");
4004
4005 return TRUE;
4006 }
4007
4008 void
4009 rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile)
4010 {
4011 /* We scan the symbol table looking for $tableentry$'s, and for
4012 each, try to deduce which handlers go with which entries. */
4013
4014 RX_Table_Info stuff;
4015
4016 stuff.abfd = obfd;
4017 stuff.info = info;
4018 stuff.mapfile = mapfile;
4019 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff);
4020 }
4021
4022 \f
4023 #define ELF_ARCH bfd_arch_rx
4024 #define ELF_MACHINE_CODE EM_RX
4025 #define ELF_MAXPAGESIZE 0x1000
4026
4027 #define TARGET_BIG_SYM rx_elf32_be_vec
4028 #define TARGET_BIG_NAME "elf32-rx-be"
4029
4030 #define TARGET_LITTLE_SYM rx_elf32_le_vec
4031 #define TARGET_LITTLE_NAME "elf32-rx-le"
4032
4033 #define elf_info_to_howto_rel NULL
4034 #define elf_info_to_howto rx_info_to_howto_rela
4035 #define elf_backend_object_p rx_elf_object_p
4036 #define elf_backend_relocate_section rx_elf_relocate_section
4037 #define elf_symbol_leading_char ('_')
4038 #define elf_backend_can_gc_sections 1
4039 #define elf_backend_modify_headers elf32_rx_modify_headers
4040
4041 #define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
4042 #define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
4043 #define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
4044 #define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
4045 #define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
4046 #define bfd_elf32_get_section_contents rx_get_section_contents
4047 #define bfd_elf32_set_section_contents rx_set_section_contents
4048 #define bfd_elf32_bfd_final_link rx_final_link
4049 #define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
4050 #define elf_backend_special_sections elf32_rx_special_sections
4051 #define elf_backend_check_directives rx_check_directives
4052
4053 #include "elf32-target.h"
4054
4055 /* We define a second big-endian target that doesn't have the custom
4056 section get/set hooks, for times when we want to preserve the
4057 pre-swapped .text sections (like objcopy). */
4058
4059 #undef TARGET_BIG_SYM
4060 #define TARGET_BIG_SYM rx_elf32_be_ns_vec
4061 #undef TARGET_BIG_NAME
4062 #define TARGET_BIG_NAME "elf32-rx-be-ns"
4063 #undef TARGET_LITTLE_SYM
4064
4065 #undef bfd_elf32_get_section_contents
4066 #undef bfd_elf32_set_section_contents
4067
4068 #undef elf32_bed
4069 #define elf32_bed elf32_rx_be_ns_bed
4070
4071 #include "elf32-target.h"
4072
4073 #undef TARGET_LITTLE_SYM
4074 #define TARGET_LITTLE_SYM rx_elf32_linux_le_vec
4075 #undef TARGET_LITTLE_NAME
4076 #define TARGET_LITTLE_NAME "elf32-rx-linux"
4077 #undef TARGET_BIG_SYM
4078 #undef TARGET_BIG_NAME
4079
4080 #undef elf_backend_object_p
4081 #define elf_backend_object_p rx_linux_object_p
4082 #undef elf_symbol_leading_char
4083 #undef elf32_bed
4084 #define elf32_bed elf32_rx_le_linux_bed
4085
4086 #include "elf32-target.h"
GDB Binutils - Deliverables
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