bfd/elfxx-aarch64.c

   1 /* AArch64-specific support for ELF.
   2    Copyright (C) 2009-2015 Free Software Foundation, Inc.
   3    Contributed by ARM Ltd.
   4
   5    This file is part of BFD, the Binary File Descriptor library.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; see the file COPYING3. If not,
  19    see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "sysdep.h"
  22 #include "elfxx-aarch64.h"
  23 #include <stdarg.h>
  24 #include <string.h>
  25
  26 #define MASK(n) ((1u << (n)) - 1)
  27
  28 /* Decode the 26-bit offset of unconditional branch.  */
  29 static inline uint32_t
  30 decode_branch_ofs_26 (uint32_t insn)
  31 {
  32   return insn & MASK (26);
  33 }
  34
  35 /* Decode the 19-bit offset of conditional branch and compare & branch.  */
  36 static inline uint32_t
  37 decode_cond_branch_ofs_19 (uint32_t insn)
  38 {
  39   return (insn >> 5) & MASK (19);
  40 }
  41
  42 /* Decode the 19-bit offset of load literal.  */
  43 static inline uint32_t
  44 decode_ld_lit_ofs_19 (uint32_t insn)
  45 {
  46   return (insn >> 5) & MASK (19);
  47 }
  48
  49 /* Decode the 14-bit offset of test & branch.  */
  50 static inline uint32_t
  51 decode_tst_branch_ofs_14 (uint32_t insn)
  52 {
  53   return (insn >> 5) & MASK (14);
  54 }
  55
  56 /* Decode the 16-bit imm of move wide.  */
  57 static inline uint32_t
  58 decode_movw_imm (uint32_t insn)
  59 {
  60   return (insn >> 5) & MASK (16);
  61 }
  62
  63 /* Decode the 12-bit imm of add immediate.  */
  64 static inline uint32_t
  65 decode_add_imm (uint32_t insn)
  66 {
  67   return (insn >> 10) & MASK (12);
  68 }
  69
  70 /* Reencode the imm field of add immediate.  */
  71 static inline uint32_t
  72 reencode_add_imm (uint32_t insn, uint32_t imm)
  73 {
  74   return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
  75 }
  76
  77 /* Reencode the imm field of adr.  */
  78 static inline uint32_t
  79 reencode_adr_imm (uint32_t insn, uint32_t imm)
  80 {
  81   return (insn & ~((MASK (2) << 29) | (MASK (19) << 5)))
  82     | ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3);
  83 }
  84
  85 /* Reencode the imm field of ld/st pos immediate.  */
  86 static inline uint32_t
  87 reencode_ldst_pos_imm (uint32_t insn, uint32_t imm)
  88 {
  89   return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
  90 }
  91
  92 /* Encode the 26-bit offset of unconditional branch.  */
  93 static inline uint32_t
  94 reencode_branch_ofs_26 (uint32_t insn, uint32_t ofs)
  95 {
  96   return (insn & ~MASK (26)) | (ofs & MASK (26));
  97 }
  98
  99 /* Encode the 19-bit offset of conditional branch and compare & branch.  */
 100 static inline uint32_t
 101 reencode_cond_branch_ofs_19 (uint32_t insn, uint32_t ofs)
 102 {
 103   return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
 104 }
 105
 106 /* Decode the 19-bit offset of load literal.  */
 107 static inline uint32_t
 108 reencode_ld_lit_ofs_19 (uint32_t insn, uint32_t ofs)
 109 {
 110   return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
 111 }
 112
 113 /* Encode the 14-bit offset of test & branch.  */
 114 static inline uint32_t
 115 reencode_tst_branch_ofs_14 (uint32_t insn, uint32_t ofs)
 116 {
 117   return (insn & ~(MASK (14) << 5)) | ((ofs & MASK (14)) << 5);
 118 }
 119
 120 /* Reencode the imm field of move wide.  */
 121 static inline uint32_t
 122 reencode_movw_imm (uint32_t insn, uint32_t imm)
 123 {
 124   return (insn & ~(MASK (16) << 5)) | ((imm & MASK (16)) << 5);
 125 }
 126
 127 /* Reencode mov[zn] to movz.  */
 128 static inline uint32_t
 129 reencode_movzn_to_movz (uint32_t opcode)
 130 {
 131   return opcode | (1 << 30);
 132 }
 133
 134 /* Reencode mov[zn] to movn.  */
 135 static inline uint32_t
 136 reencode_movzn_to_movn (uint32_t opcode)
 137 {
 138   return opcode & ~(1 << 30);
 139 }
 140
 141 /* Return non-zero if the indicated VALUE has overflowed the maximum
 142    range expressible by a unsigned number with the indicated number of
 143    BITS.  */
 144
 145 static bfd_reloc_status_type
 146 aarch64_unsigned_overflow (bfd_vma value, unsigned int bits)
 147 {
 148   bfd_vma lim;
 149   if (bits >= sizeof (bfd_vma) * 8)
 150     return bfd_reloc_ok;
 151   lim = (bfd_vma) 1 << bits;
 152   if (value >= lim)
 153     return bfd_reloc_overflow;
 154   return bfd_reloc_ok;
 155 }
 156
 157 /* Return non-zero if the indicated VALUE has overflowed the maximum
 158    range expressible by an signed number with the indicated number of
 159    BITS.  */
 160
 161 static bfd_reloc_status_type
 162 aarch64_signed_overflow (bfd_vma value, unsigned int bits)
 163 {
 164   bfd_signed_vma svalue = (bfd_signed_vma) value;
 165   bfd_signed_vma lim;
 166
 167   if (bits >= sizeof (bfd_vma) * 8)
 168     return bfd_reloc_ok;
 169   lim = (bfd_signed_vma) 1 << (bits - 1);
 170   if (svalue < -lim || svalue >= lim)
 171     return bfd_reloc_overflow;
 172   return bfd_reloc_ok;
 173 }
 174
 175 /* Insert the addend/value into the instruction or data object being
 176    relocated.  */
 177 bfd_reloc_status_type
 178 _bfd_aarch64_elf_put_addend (bfd *abfd,
 179                              bfd_byte *address, bfd_reloc_code_real_type r_type,
 180                              reloc_howto_type *howto, bfd_signed_vma addend)
 181 {
 182   bfd_reloc_status_type status = bfd_reloc_ok;
 183   bfd_signed_vma old_addend = addend;
 184   bfd_vma contents;
 185   int size;
 186
 187   size = bfd_get_reloc_size (howto);
 188   switch (size)
 189     {
 190     case 0:
 191       return status;
 192     case 2:
 193       contents = bfd_get_16 (abfd, address);
 194       break;
 195     case 4:
 196       if (howto->src_mask != 0xffffffff)
 197         /* Must be 32-bit instruction, always little-endian.  */
 198         contents = bfd_getl32 (address);
 199       else
 200         /* Must be 32-bit data (endianness dependent).  */
 201         contents = bfd_get_32 (abfd, address);
 202       break;
 203     case 8:
 204       contents = bfd_get_64 (abfd, address);
 205       break;
 206     default:
 207       abort ();
 208     }
 209
 210   switch (howto->complain_on_overflow)
 211     {
 212     case complain_overflow_dont:
 213       break;
 214     case complain_overflow_signed:
 215       status = aarch64_signed_overflow (addend,
 216                                         howto->bitsize + howto->rightshift);
 217       break;
 218     case complain_overflow_unsigned:
 219       status = aarch64_unsigned_overflow (addend,
 220                                           howto->bitsize + howto->rightshift);
 221       break;
 222     case complain_overflow_bitfield:
 223     default:
 224       abort ();
 225     }
 226
 227   addend >>= howto->rightshift;
 228
 229   switch (r_type)
 230     {
 231     case BFD_RELOC_AARCH64_JUMP26:
 232     case BFD_RELOC_AARCH64_CALL26:
 233       contents = reencode_branch_ofs_26 (contents, addend);
 234       break;
 235
 236     case BFD_RELOC_AARCH64_BRANCH19:
 237       contents = reencode_cond_branch_ofs_19 (contents, addend);
 238       break;
 239
 240     case BFD_RELOC_AARCH64_TSTBR14:
 241       contents = reencode_tst_branch_ofs_14 (contents, addend);
 242       break;
 243
 244     case BFD_RELOC_AARCH64_LD_LO19_PCREL:
 245     case BFD_RELOC_AARCH64_GOT_LD_PREL19:
 246       if (old_addend & ((1 << howto->rightshift) - 1))
 247         return bfd_reloc_overflow;
 248       contents = reencode_ld_lit_ofs_19 (contents, addend);
 249       break;
 250
 251     case BFD_RELOC_AARCH64_TLSDESC_CALL:
 252       break;
 253
 254     case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
 255     case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
 256     case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
 257     case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
 258     case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
 259     case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
 260     case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
 261       contents = reencode_adr_imm (contents, addend);
 262       break;
 263
 264     case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
 265     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
 266     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
 267     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
 268     case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
 269     case BFD_RELOC_AARCH64_ADD_LO12:
 270       /* Corresponds to: add rd, rn, #uimm12 to provide the low order
 271          12 bits of the page offset following
 272          BFD_RELOC_AARCH64_ADR_HI21_PCREL which computes the
 273          (pc-relative) page base.  */
 274       contents = reencode_add_imm (contents, addend);
 275       break;
 276
 277     case BFD_RELOC_AARCH64_LDST8_LO12:
 278     case BFD_RELOC_AARCH64_LDST16_LO12:
 279     case BFD_RELOC_AARCH64_LDST32_LO12:
 280     case BFD_RELOC_AARCH64_LDST64_LO12:
 281     case BFD_RELOC_AARCH64_LDST128_LO12:
 282     case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
 283     case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
 284     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
 285     case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
 286     case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
 287     case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
 288       if (old_addend & ((1 << howto->rightshift) - 1))
 289         return bfd_reloc_overflow;
 290       /* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order
 291          12 bits of the page offset following BFD_RELOC_AARCH64_ADR_HI21_PCREL
 292          which computes the (pc-relative) page base.  */
 293       contents = reencode_ldst_pos_imm (contents, addend);
 294       break;
 295
 296       /* Group relocations to create high bits of a 16, 32, 48 or 64
 297          bit signed data or abs address inline. Will change
 298          instruction to MOVN or MOVZ depending on sign of calculated
 299          value.  */
 300
 301     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
 302     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
 303     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
 304     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
 305     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
 306     case BFD_RELOC_AARCH64_MOVW_G0_S:
 307     case BFD_RELOC_AARCH64_MOVW_G1_S:
 308     case BFD_RELOC_AARCH64_MOVW_G2_S:
 309       /* NOTE: We can only come here with movz or movn.  */
 310       if (addend < 0)
 311         {
 312           /* Force use of MOVN.  */
 313           addend = ~addend;
 314           contents = reencode_movzn_to_movn (contents);
 315         }
 316       else
 317         {
 318           /* Force use of MOVZ.  */
 319           contents = reencode_movzn_to_movz (contents);
 320         }
 321       /* fall through */
 322
 323       /* Group relocations to create a 16, 32, 48 or 64 bit unsigned
 324          data or abs address inline.  */
 325
 326     case BFD_RELOC_AARCH64_MOVW_G0:
 327     case BFD_RELOC_AARCH64_MOVW_G0_NC:
 328     case BFD_RELOC_AARCH64_MOVW_G1:
 329     case BFD_RELOC_AARCH64_MOVW_G1_NC:
 330     case BFD_RELOC_AARCH64_MOVW_G2:
 331     case BFD_RELOC_AARCH64_MOVW_G2_NC:
 332     case BFD_RELOC_AARCH64_MOVW_G3:
 333       contents = reencode_movw_imm (contents, addend);
 334       break;
 335
 336     default:
 337       /* Repack simple data */
 338       if (howto->dst_mask & (howto->dst_mask + 1))
 339         return bfd_reloc_notsupported;
 340
 341       contents = ((contents & ~howto->dst_mask) | (addend & howto->dst_mask));
 342       break;
 343     }
 344
 345   switch (size)
 346     {
 347     case 2:
 348       bfd_put_16 (abfd, contents, address);
 349       break;
 350     case 4:
 351       if (howto->dst_mask != 0xffffffff)
 352         /* must be 32-bit instruction, always little-endian */
 353         bfd_putl32 (contents, address);
 354       else
 355         /* must be 32-bit data (endianness dependent) */
 356         bfd_put_32 (abfd, contents, address);
 357       break;
 358     case 8:
 359       bfd_put_64 (abfd, contents, address);
 360       break;
 361     default:
 362       abort ();
 363     }
 364
 365   return status;
 366 }
 367
 368 bfd_vma
 369 _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
 370                                      bfd_vma place, bfd_vma value,
 371                                      bfd_vma addend, bfd_boolean weak_undef_p)
 372 {
 373   switch (r_type)
 374     {
 375     case BFD_RELOC_AARCH64_TLSDESC_CALL:
 376     case BFD_RELOC_AARCH64_NONE:
 377       break;
 378
 379     case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
 380     case BFD_RELOC_AARCH64_BRANCH19:
 381     case BFD_RELOC_AARCH64_LD_LO19_PCREL:
 382     case BFD_RELOC_AARCH64_16_PCREL:
 383     case BFD_RELOC_AARCH64_32_PCREL:
 384     case BFD_RELOC_AARCH64_64_PCREL:
 385     case BFD_RELOC_AARCH64_TSTBR14:
 386       if (weak_undef_p)
 387         value = place;
 388       value = value + addend - place;
 389       break;
 390
 391     case BFD_RELOC_AARCH64_CALL26:
 392     case BFD_RELOC_AARCH64_JUMP26:
 393       value = value + addend - place;
 394       break;
 395
 396     case BFD_RELOC_AARCH64_16:
 397     case BFD_RELOC_AARCH64_32:
 398     case BFD_RELOC_AARCH64_MOVW_G0_S:
 399     case BFD_RELOC_AARCH64_MOVW_G1_S:
 400     case BFD_RELOC_AARCH64_MOVW_G2_S:
 401     case BFD_RELOC_AARCH64_MOVW_G0:
 402     case BFD_RELOC_AARCH64_MOVW_G0_NC:
 403     case BFD_RELOC_AARCH64_MOVW_G1:
 404     case BFD_RELOC_AARCH64_MOVW_G1_NC:
 405     case BFD_RELOC_AARCH64_MOVW_G2:
 406     case BFD_RELOC_AARCH64_MOVW_G2_NC:
 407     case BFD_RELOC_AARCH64_MOVW_G3:
 408       value = value + addend;
 409       break;
 410
 411     case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
 412     case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
 413       if (weak_undef_p)
 414         value = PG (place);
 415       value = PG (value + addend) - PG (place);
 416       break;
 417
 418     case BFD_RELOC_AARCH64_GOT_LD_PREL19:
 419       value = value + addend - place;
 420       break;
 421
 422     case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
 423     case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
 424     case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
 425     case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
 426       value = PG (value + addend) - PG (place);
 427       break;
 428
 429     case BFD_RELOC_AARCH64_ADD_LO12:
 430     case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
 431     case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
 432     case BFD_RELOC_AARCH64_LDST8_LO12:
 433     case BFD_RELOC_AARCH64_LDST16_LO12:
 434     case BFD_RELOC_AARCH64_LDST32_LO12:
 435     case BFD_RELOC_AARCH64_LDST64_LO12:
 436     case BFD_RELOC_AARCH64_LDST128_LO12:
 437     case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
 438     case BFD_RELOC_AARCH64_TLSDESC_ADD:
 439     case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
 440     case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
 441     case BFD_RELOC_AARCH64_TLSDESC_LDR:
 442     case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
 443     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
 444     case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
 445     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
 446     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
 447       value = PG_OFFSET (value + addend);
 448       break;
 449
 450     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
 451     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
 452       value = (value + addend) & (bfd_vma) 0xffff0000;
 453       break;
 454     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
 455       /* Mask off low 12bits, keep all other high bits, so that the later
 456          generic code could check whehter there is overflow.  */
 457       value = (value + addend) & ~(bfd_vma) 0xfff;
 458       break;
 459
 460     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
 461     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
 462       value = (value + addend) & (bfd_vma) 0xffff;
 463       break;
 464
 465     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
 466       value = (value + addend) & ~(bfd_vma) 0xffffffff;
 467       value -= place & ~(bfd_vma) 0xffffffff;
 468       break;
 469
 470     default:
 471       break;
 472     }
 473
 474   return value;
 475 }
 476
 477 /* Hook called by the linker routine which adds symbols from an object
 478    file.  */
 479
 480 bfd_boolean
 481 _bfd_aarch64_elf_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
 482                                   Elf_Internal_Sym *sym,
 483                                   const char **namep ATTRIBUTE_UNUSED,
 484                                   flagword *flagsp ATTRIBUTE_UNUSED,
 485                                   asection **secp ATTRIBUTE_UNUSED,
 486                                   bfd_vma *valp ATTRIBUTE_UNUSED)
 487 {
 488   if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
 489        || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)
 490       && (abfd->flags & DYNAMIC) == 0
 491       && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
 492     elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
 493
 494   return TRUE;
 495 }
 496
 497 /* Support for core dump NOTE sections.  */
 498
 499 bfd_boolean
 500 _bfd_aarch64_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
 501 {
 502   int offset;
 503   size_t size;
 504
 505   switch (note->descsz)
 506     {
 507       default:
 508         return FALSE;
 509
 510       case 392:         /* sizeof(struct elf_prstatus) on Linux/arm64.  */
 511         /* pr_cursig */
 512         elf_tdata (abfd)->core->signal
 513           = bfd_get_16 (abfd, note->descdata + 12);
 514
 515         /* pr_pid */
 516         elf_tdata (abfd)->core->lwpid
 517           = bfd_get_32 (abfd, note->descdata + 32);
 518
 519         /* pr_reg */
 520         offset = 112;
 521         size = 272;
 522
 523         break;
 524     }
 525
 526   /* Make a ".reg/999" section.  */
 527   return _bfd_elfcore_make_pseudosection (abfd, ".reg",
 528                                           size, note->descpos + offset);
 529 }
 530
 531 bfd_boolean
 532 _bfd_aarch64_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
 533 {
 534   switch (note->descsz)
 535     {
 536     default:
 537       return FALSE;
 538
 539     case 136:        /* This is sizeof(struct elf_prpsinfo) on Linux/aarch64.  */
 540       elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
 541       elf_tdata (abfd)->core->program
 542         = _bfd_elfcore_strndup (abfd, note->descdata + 40, 16);
 543       elf_tdata (abfd)->core->command
 544         = _bfd_elfcore_strndup (abfd, note->descdata + 56, 80);
 545     }
 546
 547   /* Note that for some reason, a spurious space is tacked
 548      onto the end of the args in some (at least one anyway)
 549      implementations, so strip it off if it exists.  */
 550
 551   {
 552     char *command = elf_tdata (abfd)->core->command;
 553     int n = strlen (command);
 554
 555     if (0 < n && command[n - 1] == ' ')
 556       command[n - 1] = '\0';
 557   }
 558
 559   return TRUE;
 560 }
 561
 562 char *
 563 _bfd_aarch64_elf_write_core_note (bfd *abfd, char *buf, int *bufsiz, int note_type,
 564                                   ...)
 565 {
 566   switch (note_type)
 567     {
 568     default:
 569       return NULL;
 570
 571     case NT_PRPSINFO:
 572       {
 573         char data[136];
 574         va_list ap;
 575
 576         va_start (ap, note_type);
 577         memset (data, 0, sizeof (data));
 578         strncpy (data + 40, va_arg (ap, const char *), 16);
 579         strncpy (data + 56, va_arg (ap, const char *), 80);
 580         va_end (ap);
 581
 582         return elfcore_write_note (abfd, buf, bufsiz, "CORE",
 583                                    note_type, data, sizeof (data));
 584       }
 585
 586     case NT_PRSTATUS:
 587       {
 588         char data[392];
 589         va_list ap;
 590         long pid;
 591         int cursig;
 592         const void *greg;
 593
 594         va_start (ap, note_type);
 595         memset (data, 0, sizeof (data));
 596         pid = va_arg (ap, long);
 597         bfd_put_32 (abfd, pid, data + 32);
 598         cursig = va_arg (ap, int);
 599         bfd_put_16 (abfd, cursig, data + 12);
 600         greg = va_arg (ap, const void *);
 601         memcpy (data + 112, greg, 272);
 602         va_end (ap);
 603
 604         return elfcore_write_note (abfd, buf, bufsiz, "CORE",
 605                                    note_type, data, sizeof (data));
 606       }
 607     }
 608 }