1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 MA 02110-1301, USA. */
28 BFD maintains relocations in much the same way it maintains
29 symbols: they are left alone until required, then read in
30 en-masse and translated into an internal form. A common
31 routine <<bfd_perform_relocation>> acts upon the
32 canonical form to do the fixup.
34 Relocations are maintained on a per section basis,
35 while symbols are maintained on a per BFD basis.
37 All that a back end has to do to fit the BFD interface is to create
38 a <<struct reloc_cache_entry>> for each relocation
39 in a particular section, and fill in the right bits of the structures.
48 /* DO compile in the reloc_code name table from libbfd.h. */
49 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
58 typedef arelent, howto manager, Relocations, Relocations
63 This is the structure of a relocation entry:
67 .typedef enum bfd_reloc_status
69 . {* No errors detected. *}
72 . {* The relocation was performed, but there was an overflow. *}
75 . {* The address to relocate was not within the section supplied. *}
76 . bfd_reloc_outofrange,
78 . {* Used by special functions. *}
81 . {* Unsupported relocation size requested. *}
82 . bfd_reloc_notsupported,
87 . {* The symbol to relocate against was undefined. *}
88 . bfd_reloc_undefined,
90 . {* The relocation was performed, but may not be ok - presently
91 . generated only when linking i960 coff files with i960 b.out
92 . symbols. If this type is returned, the error_message argument
93 . to bfd_perform_relocation will be set. *}
96 . bfd_reloc_status_type;
99 .typedef struct reloc_cache_entry
101 . {* A pointer into the canonical table of pointers. *}
102 . struct bfd_symbol **sym_ptr_ptr;
104 . {* offset in section. *}
105 . bfd_size_type address;
107 . {* addend for relocation value. *}
110 . {* Pointer to how to perform the required relocation. *}
111 . reloc_howto_type *howto;
121 Here is a description of each of the fields within an <<arelent>>:
125 The symbol table pointer points to a pointer to the symbol
126 associated with the relocation request. It is the pointer
127 into the table returned by the back end's
128 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
129 referenced through a pointer to a pointer so that tools like
130 the linker can fix up all the symbols of the same name by
131 modifying only one pointer. The relocation routine looks in
132 the symbol and uses the base of the section the symbol is
133 attached to and the value of the symbol as the initial
134 relocation offset. If the symbol pointer is zero, then the
135 section provided is looked up.
139 The <<address>> field gives the offset in bytes from the base of
140 the section data which owns the relocation record to the first
141 byte of relocatable information. The actual data relocated
142 will be relative to this point; for example, a relocation
143 type which modifies the bottom two bytes of a four byte word
144 would not touch the first byte pointed to in a big endian
149 The <<addend>> is a value provided by the back end to be added (!)
150 to the relocation offset. Its interpretation is dependent upon
151 the howto. For example, on the 68k the code:
156 | return foo[0x12345678];
159 Could be compiled into:
162 | moveb @@#12345678,d0
167 This could create a reloc pointing to <<foo>>, but leave the
168 offset in the data, something like:
170 |RELOCATION RECORDS FOR [.text]:
174 |00000000 4e56 fffc ; linkw fp,#-4
175 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
176 |0000000a 49c0 ; extbl d0
177 |0000000c 4e5e ; unlk fp
180 Using coff and an 88k, some instructions don't have enough
181 space in them to represent the full address range, and
182 pointers have to be loaded in two parts. So you'd get something like:
184 | or.u r13,r0,hi16(_foo+0x12345678)
185 | ld.b r2,r13,lo16(_foo+0x12345678)
188 This should create two relocs, both pointing to <<_foo>>, and with
189 0x12340000 in their addend field. The data would consist of:
191 |RELOCATION RECORDS FOR [.text]:
193 |00000002 HVRT16 _foo+0x12340000
194 |00000006 LVRT16 _foo+0x12340000
196 |00000000 5da05678 ; or.u r13,r0,0x5678
197 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
198 |00000008 f400c001 ; jmp r1
200 The relocation routine digs out the value from the data, adds
201 it to the addend to get the original offset, and then adds the
202 value of <<_foo>>. Note that all 32 bits have to be kept around
203 somewhere, to cope with carry from bit 15 to bit 16.
205 One further example is the sparc and the a.out format. The
206 sparc has a similar problem to the 88k, in that some
207 instructions don't have room for an entire offset, but on the
208 sparc the parts are created in odd sized lumps. The designers of
209 the a.out format chose to not use the data within the section
210 for storing part of the offset; all the offset is kept within
211 the reloc. Anything in the data should be ignored.
214 | sethi %hi(_foo+0x12345678),%g2
215 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
219 Both relocs contain a pointer to <<foo>>, and the offsets
222 |RELOCATION RECORDS FOR [.text]:
224 |00000004 HI22 _foo+0x12345678
225 |00000008 LO10 _foo+0x12345678
227 |00000000 9de3bf90 ; save %sp,-112,%sp
228 |00000004 05000000 ; sethi %hi(_foo+0),%g2
229 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
230 |0000000c 81c7e008 ; ret
231 |00000010 81e80000 ; restore
235 The <<howto>> field can be imagined as a
236 relocation instruction. It is a pointer to a structure which
237 contains information on what to do with all of the other
238 information in the reloc record and data section. A back end
239 would normally have a relocation instruction set and turn
240 relocations into pointers to the correct structure on input -
241 but it would be possible to create each howto field on demand.
247 <<enum complain_overflow>>
249 Indicates what sort of overflow checking should be done when
250 performing a relocation.
254 .enum complain_overflow
256 . {* Do not complain on overflow. *}
257 . complain_overflow_dont,
259 . {* Complain if the value overflows when considered as a signed
260 . number one bit larger than the field. ie. A bitfield of N bits
261 . is allowed to represent -2**n to 2**n-1. *}
262 . complain_overflow_bitfield,
264 . {* Complain if the value overflows when considered as a signed
266 . complain_overflow_signed,
268 . {* Complain if the value overflows when considered as an
269 . unsigned number. *}
270 . complain_overflow_unsigned
279 The <<reloc_howto_type>> is a structure which contains all the
280 information that libbfd needs to know to tie up a back end's data.
283 .struct bfd_symbol; {* Forward declaration. *}
285 .struct reloc_howto_struct
287 . {* The type field has mainly a documentary use - the back end can
288 . do what it wants with it, though normally the back end's
289 . external idea of what a reloc number is stored
290 . in this field. For example, a PC relative word relocation
291 . in a coff environment has the type 023 - because that's
292 . what the outside world calls a R_PCRWORD reloc. *}
295 . {* The value the final relocation is shifted right by. This drops
296 . unwanted data from the relocation. *}
297 . unsigned int rightshift;
299 . {* The size of the item to be relocated. This is *not* a
300 . power-of-two measure. To get the number of bytes operated
301 . on by a type of relocation, use bfd_get_reloc_size. *}
304 . {* The number of bits in the item to be relocated. This is used
305 . when doing overflow checking. *}
306 . unsigned int bitsize;
308 . {* Notes that the relocation is relative to the location in the
309 . data section of the addend. The relocation function will
310 . subtract from the relocation value the address of the location
311 . being relocated. *}
312 . bfd_boolean pc_relative;
314 . {* The bit position of the reloc value in the destination.
315 . The relocated value is left shifted by this amount. *}
316 . unsigned int bitpos;
318 . {* What type of overflow error should be checked for when
320 . enum complain_overflow complain_on_overflow;
322 . {* If this field is non null, then the supplied function is
323 . called rather than the normal function. This allows really
324 . strange relocation methods to be accommodated (e.g., i960 callj
326 . bfd_reloc_status_type (*special_function)
327 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
330 . {* The textual name of the relocation type. *}
333 . {* Some formats record a relocation addend in the section contents
334 . rather than with the relocation. For ELF formats this is the
335 . distinction between USE_REL and USE_RELA (though the code checks
336 . for USE_REL == 1/0). The value of this field is TRUE if the
337 . addend is recorded with the section contents; when performing a
338 . partial link (ld -r) the section contents (the data) will be
339 . modified. The value of this field is FALSE if addends are
340 . recorded with the relocation (in arelent.addend); when performing
341 . a partial link the relocation will be modified.
342 . All relocations for all ELF USE_RELA targets should set this field
343 . to FALSE (values of TRUE should be looked on with suspicion).
344 . However, the converse is not true: not all relocations of all ELF
345 . USE_REL targets set this field to TRUE. Why this is so is peculiar
346 . to each particular target. For relocs that aren't used in partial
347 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
348 . bfd_boolean partial_inplace;
350 . {* src_mask selects the part of the instruction (or data) to be used
351 . in the relocation sum. If the target relocations don't have an
352 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
353 . dst_mask to extract the addend from the section contents. If
354 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
355 . field should be zero. Non-zero values for ELF USE_RELA targets are
356 . bogus as in those cases the value in the dst_mask part of the
357 . section contents should be treated as garbage. *}
360 . {* dst_mask selects which parts of the instruction (or data) are
361 . replaced with a relocated value. *}
364 . {* When some formats create PC relative instructions, they leave
365 . the value of the pc of the place being relocated in the offset
366 . slot of the instruction, so that a PC relative relocation can
367 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
368 . Some formats leave the displacement part of an instruction
369 . empty (e.g., m88k bcs); this flag signals the fact. *}
370 . bfd_boolean pcrel_offset;
380 The HOWTO define is horrible and will go away.
382 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
383 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
386 And will be replaced with the totally magic way. But for the
387 moment, we are compatible, so do it this way.
389 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
390 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
391 . NAME, FALSE, 0, 0, IN)
395 This is used to fill in an empty howto entry in an array.
397 .#define EMPTY_HOWTO(C) \
398 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
399 . NULL, FALSE, 0, 0, FALSE)
403 Helper routine to turn a symbol into a relocation value.
405 .#define HOWTO_PREPARE(relocation, symbol) \
407 . if (symbol != NULL) \
409 . if (bfd_is_com_section (symbol->section)) \
415 . relocation = symbol->value; \
427 unsigned int bfd_get_reloc_size (reloc_howto_type *);
430 For a reloc_howto_type that operates on a fixed number of bytes,
431 this returns the number of bytes operated on.
435 bfd_get_reloc_size (reloc_howto_type
*howto
)
456 How relocs are tied together in an <<asection>>:
458 .typedef struct relent_chain
461 . struct relent_chain *next;
467 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
468 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
475 bfd_reloc_status_type bfd_check_overflow
476 (enum complain_overflow how,
477 unsigned int bitsize,
478 unsigned int rightshift,
479 unsigned int addrsize,
483 Perform overflow checking on @var{relocation} which has
484 @var{bitsize} significant bits and will be shifted right by
485 @var{rightshift} bits, on a machine with addresses containing
486 @var{addrsize} significant bits. The result is either of
487 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
491 bfd_reloc_status_type
492 bfd_check_overflow (enum complain_overflow how
,
493 unsigned int bitsize
,
494 unsigned int rightshift
,
495 unsigned int addrsize
,
498 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
499 bfd_reloc_status_type flag
= bfd_reloc_ok
;
501 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
502 we'll be permissive: extra bits in the field mask will
503 automatically extend the address mask for purposes of the
505 fieldmask
= N_ONES (bitsize
);
506 signmask
= ~fieldmask
;
507 addrmask
= N_ONES (addrsize
) | (fieldmask
<< rightshift
);
508 a
= (relocation
& addrmask
) >> rightshift
;;
512 case complain_overflow_dont
:
515 case complain_overflow_signed
:
516 /* If any sign bits are set, all sign bits must be set. That
517 is, A must be a valid negative address after shifting. */
518 signmask
= ~ (fieldmask
>> 1);
521 case complain_overflow_bitfield
:
522 /* Bitfields are sometimes signed, sometimes unsigned. We
523 explicitly allow an address wrap too, which means a bitfield
524 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
525 if the value has some, but not all, bits set outside the
528 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
529 flag
= bfd_reloc_overflow
;
532 case complain_overflow_unsigned
:
533 /* We have an overflow if the address does not fit in the field. */
534 if ((a
& signmask
) != 0)
535 flag
= bfd_reloc_overflow
;
547 bfd_perform_relocation
550 bfd_reloc_status_type bfd_perform_relocation
552 arelent *reloc_entry,
554 asection *input_section,
556 char **error_message);
559 If @var{output_bfd} is supplied to this function, the
560 generated image will be relocatable; the relocations are
561 copied to the output file after they have been changed to
562 reflect the new state of the world. There are two ways of
563 reflecting the results of partial linkage in an output file:
564 by modifying the output data in place, and by modifying the
565 relocation record. Some native formats (e.g., basic a.out and
566 basic coff) have no way of specifying an addend in the
567 relocation type, so the addend has to go in the output data.
568 This is no big deal since in these formats the output data
569 slot will always be big enough for the addend. Complex reloc
570 types with addends were invented to solve just this problem.
571 The @var{error_message} argument is set to an error message if
572 this return @code{bfd_reloc_dangerous}.
576 bfd_reloc_status_type
577 bfd_perform_relocation (bfd
*abfd
,
578 arelent
*reloc_entry
,
580 asection
*input_section
,
582 char **error_message
)
585 bfd_reloc_status_type flag
= bfd_reloc_ok
;
586 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
587 bfd_vma output_base
= 0;
588 reloc_howto_type
*howto
= reloc_entry
->howto
;
589 asection
*reloc_target_output_section
;
592 symbol
= *(reloc_entry
->sym_ptr_ptr
);
593 if (bfd_is_abs_section (symbol
->section
)
594 && output_bfd
!= NULL
)
596 reloc_entry
->address
+= input_section
->output_offset
;
600 /* If we are not producing relocatable output, return an error if
601 the symbol is not defined. An undefined weak symbol is
602 considered to have a value of zero (SVR4 ABI, p. 4-27). */
603 if (bfd_is_und_section (symbol
->section
)
604 && (symbol
->flags
& BSF_WEAK
) == 0
605 && output_bfd
== NULL
)
606 flag
= bfd_reloc_undefined
;
608 /* If there is a function supplied to handle this relocation type,
609 call it. It'll return `bfd_reloc_continue' if further processing
611 if (howto
->special_function
)
613 bfd_reloc_status_type cont
;
614 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
615 input_section
, output_bfd
,
617 if (cont
!= bfd_reloc_continue
)
621 /* Is the address of the relocation really within the section? */
622 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
623 return bfd_reloc_outofrange
;
625 /* Work out which section the relocation is targeted at and the
626 initial relocation command value. */
628 /* Get symbol value. (Common symbols are special.) */
629 if (bfd_is_com_section (symbol
->section
))
632 relocation
= symbol
->value
;
634 reloc_target_output_section
= symbol
->section
->output_section
;
636 /* Convert input-section-relative symbol value to absolute. */
637 if ((output_bfd
&& ! howto
->partial_inplace
)
638 || reloc_target_output_section
== NULL
)
641 output_base
= reloc_target_output_section
->vma
;
643 relocation
+= output_base
+ symbol
->section
->output_offset
;
645 /* Add in supplied addend. */
646 relocation
+= reloc_entry
->addend
;
648 /* Here the variable relocation holds the final address of the
649 symbol we are relocating against, plus any addend. */
651 if (howto
->pc_relative
)
653 /* This is a PC relative relocation. We want to set RELOCATION
654 to the distance between the address of the symbol and the
655 location. RELOCATION is already the address of the symbol.
657 We start by subtracting the address of the section containing
660 If pcrel_offset is set, we must further subtract the position
661 of the location within the section. Some targets arrange for
662 the addend to be the negative of the position of the location
663 within the section; for example, i386-aout does this. For
664 i386-aout, pcrel_offset is FALSE. Some other targets do not
665 include the position of the location; for example, m88kbcs,
666 or ELF. For those targets, pcrel_offset is TRUE.
668 If we are producing relocatable output, then we must ensure
669 that this reloc will be correctly computed when the final
670 relocation is done. If pcrel_offset is FALSE we want to wind
671 up with the negative of the location within the section,
672 which means we must adjust the existing addend by the change
673 in the location within the section. If pcrel_offset is TRUE
674 we do not want to adjust the existing addend at all.
676 FIXME: This seems logical to me, but for the case of
677 producing relocatable output it is not what the code
678 actually does. I don't want to change it, because it seems
679 far too likely that something will break. */
682 input_section
->output_section
->vma
+ input_section
->output_offset
;
684 if (howto
->pcrel_offset
)
685 relocation
-= reloc_entry
->address
;
688 if (output_bfd
!= NULL
)
690 if (! howto
->partial_inplace
)
692 /* This is a partial relocation, and we want to apply the relocation
693 to the reloc entry rather than the raw data. Modify the reloc
694 inplace to reflect what we now know. */
695 reloc_entry
->addend
= relocation
;
696 reloc_entry
->address
+= input_section
->output_offset
;
701 /* This is a partial relocation, but inplace, so modify the
704 If we've relocated with a symbol with a section, change
705 into a ref to the section belonging to the symbol. */
707 reloc_entry
->address
+= input_section
->output_offset
;
710 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
711 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
712 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
714 /* For m68k-coff, the addend was being subtracted twice during
715 relocation with -r. Removing the line below this comment
716 fixes that problem; see PR 2953.
718 However, Ian wrote the following, regarding removing the line below,
719 which explains why it is still enabled: --djm
721 If you put a patch like that into BFD you need to check all the COFF
722 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
723 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
724 problem in a different way. There may very well be a reason that the
725 code works as it does.
727 Hmmm. The first obvious point is that bfd_perform_relocation should
728 not have any tests that depend upon the flavour. It's seem like
729 entirely the wrong place for such a thing. The second obvious point
730 is that the current code ignores the reloc addend when producing
731 relocatable output for COFF. That's peculiar. In fact, I really
732 have no idea what the point of the line you want to remove is.
734 A typical COFF reloc subtracts the old value of the symbol and adds in
735 the new value to the location in the object file (if it's a pc
736 relative reloc it adds the difference between the symbol value and the
737 location). When relocating we need to preserve that property.
739 BFD handles this by setting the addend to the negative of the old
740 value of the symbol. Unfortunately it handles common symbols in a
741 non-standard way (it doesn't subtract the old value) but that's a
742 different story (we can't change it without losing backward
743 compatibility with old object files) (coff-i386 does subtract the old
744 value, to be compatible with existing coff-i386 targets, like SCO).
746 So everything works fine when not producing relocatable output. When
747 we are producing relocatable output, logically we should do exactly
748 what we do when not producing relocatable output. Therefore, your
749 patch is correct. In fact, it should probably always just set
750 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
751 add the value into the object file. This won't hurt the COFF code,
752 which doesn't use the addend; I'm not sure what it will do to other
753 formats (the thing to check for would be whether any formats both use
754 the addend and set partial_inplace).
756 When I wanted to make coff-i386 produce relocatable output, I ran
757 into the problem that you are running into: I wanted to remove that
758 line. Rather than risk it, I made the coff-i386 relocs use a special
759 function; it's coff_i386_reloc in coff-i386.c. The function
760 specifically adds the addend field into the object file, knowing that
761 bfd_perform_relocation is not going to. If you remove that line, then
762 coff-i386.c will wind up adding the addend field in twice. It's
763 trivial to fix; it just needs to be done.
765 The problem with removing the line is just that it may break some
766 working code. With BFD it's hard to be sure of anything. The right
767 way to deal with this is simply to build and test at least all the
768 supported COFF targets. It should be straightforward if time and disk
769 space consuming. For each target:
771 2) generate some executable, and link it using -r (I would
772 probably use paranoia.o and link against newlib/libc.a, which
773 for all the supported targets would be available in
774 /usr/cygnus/progressive/H-host/target/lib/libc.a).
775 3) make the change to reloc.c
776 4) rebuild the linker
778 6) if the resulting object files are the same, you have at least
780 7) if they are different you have to figure out which version is
783 relocation
-= reloc_entry
->addend
;
784 reloc_entry
->addend
= 0;
788 reloc_entry
->addend
= relocation
;
794 reloc_entry
->addend
= 0;
797 /* FIXME: This overflow checking is incomplete, because the value
798 might have overflowed before we get here. For a correct check we
799 need to compute the value in a size larger than bitsize, but we
800 can't reasonably do that for a reloc the same size as a host
802 FIXME: We should also do overflow checking on the result after
803 adding in the value contained in the object file. */
804 if (howto
->complain_on_overflow
!= complain_overflow_dont
805 && flag
== bfd_reloc_ok
)
806 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
809 bfd_arch_bits_per_address (abfd
),
812 /* Either we are relocating all the way, or we don't want to apply
813 the relocation to the reloc entry (probably because there isn't
814 any room in the output format to describe addends to relocs). */
816 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
817 (OSF version 1.3, compiler version 3.11). It miscompiles the
831 x <<= (unsigned long) s.i0;
835 printf ("succeeded (%lx)\n", x);
839 relocation
>>= (bfd_vma
) howto
->rightshift
;
841 /* Shift everything up to where it's going to be used. */
842 relocation
<<= (bfd_vma
) howto
->bitpos
;
844 /* Wait for the day when all have the mask in them. */
847 i instruction to be left alone
848 o offset within instruction
849 r relocation offset to apply
858 (( i i i i i o o o o o from bfd_get<size>
859 and S S S S S) to get the size offset we want
860 + r r r r r r r r r r) to get the final value to place
861 and D D D D D to chop to right size
862 -----------------------
865 ( i i i i i o o o o o from bfd_get<size>
866 and N N N N N ) get instruction
867 -----------------------
873 -----------------------
874 = R R R R R R R R R R put into bfd_put<size>
878 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
884 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
886 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
892 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
894 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
899 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
901 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
906 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
907 relocation
= -relocation
;
909 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
915 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
916 relocation
= -relocation
;
918 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
929 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
931 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
938 return bfd_reloc_other
;
946 bfd_install_relocation
949 bfd_reloc_status_type bfd_install_relocation
951 arelent *reloc_entry,
952 void *data, bfd_vma data_start,
953 asection *input_section,
954 char **error_message);
957 This looks remarkably like <<bfd_perform_relocation>>, except it
958 does not expect that the section contents have been filled in.
959 I.e., it's suitable for use when creating, rather than applying
962 For now, this function should be considered reserved for the
966 bfd_reloc_status_type
967 bfd_install_relocation (bfd
*abfd
,
968 arelent
*reloc_entry
,
970 bfd_vma data_start_offset
,
971 asection
*input_section
,
972 char **error_message
)
975 bfd_reloc_status_type flag
= bfd_reloc_ok
;
976 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
977 bfd_vma output_base
= 0;
978 reloc_howto_type
*howto
= reloc_entry
->howto
;
979 asection
*reloc_target_output_section
;
983 symbol
= *(reloc_entry
->sym_ptr_ptr
);
984 if (bfd_is_abs_section (symbol
->section
))
986 reloc_entry
->address
+= input_section
->output_offset
;
990 /* If there is a function supplied to handle this relocation type,
991 call it. It'll return `bfd_reloc_continue' if further processing
993 if (howto
->special_function
)
995 bfd_reloc_status_type cont
;
997 /* XXX - The special_function calls haven't been fixed up to deal
998 with creating new relocations and section contents. */
999 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
1000 /* XXX - Non-portable! */
1001 ((bfd_byte
*) data_start
1002 - data_start_offset
),
1003 input_section
, abfd
, error_message
);
1004 if (cont
!= bfd_reloc_continue
)
1008 /* Is the address of the relocation really within the section? */
1009 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
1010 return bfd_reloc_outofrange
;
1012 /* Work out which section the relocation is targeted at and the
1013 initial relocation command value. */
1015 /* Get symbol value. (Common symbols are special.) */
1016 if (bfd_is_com_section (symbol
->section
))
1019 relocation
= symbol
->value
;
1021 reloc_target_output_section
= symbol
->section
->output_section
;
1023 /* Convert input-section-relative symbol value to absolute. */
1024 if (! howto
->partial_inplace
)
1027 output_base
= reloc_target_output_section
->vma
;
1029 relocation
+= output_base
+ symbol
->section
->output_offset
;
1031 /* Add in supplied addend. */
1032 relocation
+= reloc_entry
->addend
;
1034 /* Here the variable relocation holds the final address of the
1035 symbol we are relocating against, plus any addend. */
1037 if (howto
->pc_relative
)
1039 /* This is a PC relative relocation. We want to set RELOCATION
1040 to the distance between the address of the symbol and the
1041 location. RELOCATION is already the address of the symbol.
1043 We start by subtracting the address of the section containing
1046 If pcrel_offset is set, we must further subtract the position
1047 of the location within the section. Some targets arrange for
1048 the addend to be the negative of the position of the location
1049 within the section; for example, i386-aout does this. For
1050 i386-aout, pcrel_offset is FALSE. Some other targets do not
1051 include the position of the location; for example, m88kbcs,
1052 or ELF. For those targets, pcrel_offset is TRUE.
1054 If we are producing relocatable output, then we must ensure
1055 that this reloc will be correctly computed when the final
1056 relocation is done. If pcrel_offset is FALSE we want to wind
1057 up with the negative of the location within the section,
1058 which means we must adjust the existing addend by the change
1059 in the location within the section. If pcrel_offset is TRUE
1060 we do not want to adjust the existing addend at all.
1062 FIXME: This seems logical to me, but for the case of
1063 producing relocatable output it is not what the code
1064 actually does. I don't want to change it, because it seems
1065 far too likely that something will break. */
1068 input_section
->output_section
->vma
+ input_section
->output_offset
;
1070 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1071 relocation
-= reloc_entry
->address
;
1074 if (! howto
->partial_inplace
)
1076 /* This is a partial relocation, and we want to apply the relocation
1077 to the reloc entry rather than the raw data. Modify the reloc
1078 inplace to reflect what we now know. */
1079 reloc_entry
->addend
= relocation
;
1080 reloc_entry
->address
+= input_section
->output_offset
;
1085 /* This is a partial relocation, but inplace, so modify the
1088 If we've relocated with a symbol with a section, change
1089 into a ref to the section belonging to the symbol. */
1090 reloc_entry
->address
+= input_section
->output_offset
;
1093 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1094 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1095 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1098 /* For m68k-coff, the addend was being subtracted twice during
1099 relocation with -r. Removing the line below this comment
1100 fixes that problem; see PR 2953.
1102 However, Ian wrote the following, regarding removing the line below,
1103 which explains why it is still enabled: --djm
1105 If you put a patch like that into BFD you need to check all the COFF
1106 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1107 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1108 problem in a different way. There may very well be a reason that the
1109 code works as it does.
1111 Hmmm. The first obvious point is that bfd_install_relocation should
1112 not have any tests that depend upon the flavour. It's seem like
1113 entirely the wrong place for such a thing. The second obvious point
1114 is that the current code ignores the reloc addend when producing
1115 relocatable output for COFF. That's peculiar. In fact, I really
1116 have no idea what the point of the line you want to remove is.
1118 A typical COFF reloc subtracts the old value of the symbol and adds in
1119 the new value to the location in the object file (if it's a pc
1120 relative reloc it adds the difference between the symbol value and the
1121 location). When relocating we need to preserve that property.
1123 BFD handles this by setting the addend to the negative of the old
1124 value of the symbol. Unfortunately it handles common symbols in a
1125 non-standard way (it doesn't subtract the old value) but that's a
1126 different story (we can't change it without losing backward
1127 compatibility with old object files) (coff-i386 does subtract the old
1128 value, to be compatible with existing coff-i386 targets, like SCO).
1130 So everything works fine when not producing relocatable output. When
1131 we are producing relocatable output, logically we should do exactly
1132 what we do when not producing relocatable output. Therefore, your
1133 patch is correct. In fact, it should probably always just set
1134 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1135 add the value into the object file. This won't hurt the COFF code,
1136 which doesn't use the addend; I'm not sure what it will do to other
1137 formats (the thing to check for would be whether any formats both use
1138 the addend and set partial_inplace).
1140 When I wanted to make coff-i386 produce relocatable output, I ran
1141 into the problem that you are running into: I wanted to remove that
1142 line. Rather than risk it, I made the coff-i386 relocs use a special
1143 function; it's coff_i386_reloc in coff-i386.c. The function
1144 specifically adds the addend field into the object file, knowing that
1145 bfd_install_relocation is not going to. If you remove that line, then
1146 coff-i386.c will wind up adding the addend field in twice. It's
1147 trivial to fix; it just needs to be done.
1149 The problem with removing the line is just that it may break some
1150 working code. With BFD it's hard to be sure of anything. The right
1151 way to deal with this is simply to build and test at least all the
1152 supported COFF targets. It should be straightforward if time and disk
1153 space consuming. For each target:
1155 2) generate some executable, and link it using -r (I would
1156 probably use paranoia.o and link against newlib/libc.a, which
1157 for all the supported targets would be available in
1158 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1159 3) make the change to reloc.c
1160 4) rebuild the linker
1162 6) if the resulting object files are the same, you have at least
1164 7) if they are different you have to figure out which version is
1166 relocation
-= reloc_entry
->addend
;
1167 /* FIXME: There should be no target specific code here... */
1168 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1169 reloc_entry
->addend
= 0;
1173 reloc_entry
->addend
= relocation
;
1177 /* FIXME: This overflow checking is incomplete, because the value
1178 might have overflowed before we get here. For a correct check we
1179 need to compute the value in a size larger than bitsize, but we
1180 can't reasonably do that for a reloc the same size as a host
1182 FIXME: We should also do overflow checking on the result after
1183 adding in the value contained in the object file. */
1184 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1185 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1188 bfd_arch_bits_per_address (abfd
),
1191 /* Either we are relocating all the way, or we don't want to apply
1192 the relocation to the reloc entry (probably because there isn't
1193 any room in the output format to describe addends to relocs). */
1195 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1196 (OSF version 1.3, compiler version 3.11). It miscompiles the
1210 x <<= (unsigned long) s.i0;
1212 printf ("failed\n");
1214 printf ("succeeded (%lx)\n", x);
1218 relocation
>>= (bfd_vma
) howto
->rightshift
;
1220 /* Shift everything up to where it's going to be used. */
1221 relocation
<<= (bfd_vma
) howto
->bitpos
;
1223 /* Wait for the day when all have the mask in them. */
1226 i instruction to be left alone
1227 o offset within instruction
1228 r relocation offset to apply
1237 (( i i i i i o o o o o from bfd_get<size>
1238 and S S S S S) to get the size offset we want
1239 + r r r r r r r r r r) to get the final value to place
1240 and D D D D D to chop to right size
1241 -----------------------
1244 ( i i i i i o o o o o from bfd_get<size>
1245 and N N N N N ) get instruction
1246 -----------------------
1252 -----------------------
1253 = R R R R R R R R R R put into bfd_put<size>
1257 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1259 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1261 switch (howto
->size
)
1265 char x
= bfd_get_8 (abfd
, data
);
1267 bfd_put_8 (abfd
, x
, data
);
1273 short x
= bfd_get_16 (abfd
, data
);
1275 bfd_put_16 (abfd
, (bfd_vma
) x
, data
);
1280 long x
= bfd_get_32 (abfd
, data
);
1282 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1287 long x
= bfd_get_32 (abfd
, data
);
1288 relocation
= -relocation
;
1290 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1300 bfd_vma x
= bfd_get_64 (abfd
, data
);
1302 bfd_put_64 (abfd
, x
, data
);
1306 return bfd_reloc_other
;
1312 /* This relocation routine is used by some of the backend linkers.
1313 They do not construct asymbol or arelent structures, so there is no
1314 reason for them to use bfd_perform_relocation. Also,
1315 bfd_perform_relocation is so hacked up it is easier to write a new
1316 function than to try to deal with it.
1318 This routine does a final relocation. Whether it is useful for a
1319 relocatable link depends upon how the object format defines
1322 FIXME: This routine ignores any special_function in the HOWTO,
1323 since the existing special_function values have been written for
1324 bfd_perform_relocation.
1326 HOWTO is the reloc howto information.
1327 INPUT_BFD is the BFD which the reloc applies to.
1328 INPUT_SECTION is the section which the reloc applies to.
1329 CONTENTS is the contents of the section.
1330 ADDRESS is the address of the reloc within INPUT_SECTION.
1331 VALUE is the value of the symbol the reloc refers to.
1332 ADDEND is the addend of the reloc. */
1334 bfd_reloc_status_type
1335 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1337 asection
*input_section
,
1345 /* Sanity check the address. */
1346 if (address
> bfd_get_section_limit (input_bfd
, input_section
))
1347 return bfd_reloc_outofrange
;
1349 /* This function assumes that we are dealing with a basic relocation
1350 against a symbol. We want to compute the value of the symbol to
1351 relocate to. This is just VALUE, the value of the symbol, plus
1352 ADDEND, any addend associated with the reloc. */
1353 relocation
= value
+ addend
;
1355 /* If the relocation is PC relative, we want to set RELOCATION to
1356 the distance between the symbol (currently in RELOCATION) and the
1357 location we are relocating. Some targets (e.g., i386-aout)
1358 arrange for the contents of the section to be the negative of the
1359 offset of the location within the section; for such targets
1360 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1361 simply leave the contents of the section as zero; for such
1362 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1363 need to subtract out the offset of the location within the
1364 section (which is just ADDRESS). */
1365 if (howto
->pc_relative
)
1367 relocation
-= (input_section
->output_section
->vma
1368 + input_section
->output_offset
);
1369 if (howto
->pcrel_offset
)
1370 relocation
-= address
;
1373 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1374 contents
+ address
);
1377 /* Relocate a given location using a given value and howto. */
1379 bfd_reloc_status_type
1380 _bfd_relocate_contents (reloc_howto_type
*howto
,
1387 bfd_reloc_status_type flag
;
1388 unsigned int rightshift
= howto
->rightshift
;
1389 unsigned int bitpos
= howto
->bitpos
;
1391 /* If the size is negative, negate RELOCATION. This isn't very
1393 if (howto
->size
< 0)
1394 relocation
= -relocation
;
1396 /* Get the value we are going to relocate. */
1397 size
= bfd_get_reloc_size (howto
);
1404 x
= bfd_get_8 (input_bfd
, location
);
1407 x
= bfd_get_16 (input_bfd
, location
);
1410 x
= bfd_get_32 (input_bfd
, location
);
1414 x
= bfd_get_64 (input_bfd
, location
);
1421 /* Check for overflow. FIXME: We may drop bits during the addition
1422 which we don't check for. We must either check at every single
1423 operation, which would be tedious, or we must do the computations
1424 in a type larger than bfd_vma, which would be inefficient. */
1425 flag
= bfd_reloc_ok
;
1426 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1428 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1431 /* Get the values to be added together. For signed and unsigned
1432 relocations, we assume that all values should be truncated to
1433 the size of an address. For bitfields, all the bits matter.
1434 See also bfd_check_overflow. */
1435 fieldmask
= N_ONES (howto
->bitsize
);
1436 signmask
= ~fieldmask
;
1437 addrmask
= (N_ONES (bfd_arch_bits_per_address (input_bfd
))
1438 | (fieldmask
<< rightshift
));
1439 a
= (relocation
& addrmask
) >> rightshift
;
1440 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1441 addrmask
>>= rightshift
;
1443 switch (howto
->complain_on_overflow
)
1445 case complain_overflow_signed
:
1446 /* If any sign bits are set, all sign bits must be set.
1447 That is, A must be a valid negative address after
1449 signmask
= ~(fieldmask
>> 1);
1452 case complain_overflow_bitfield
:
1453 /* Much like the signed check, but for a field one bit
1454 wider. We allow a bitfield to represent numbers in the
1455 range -2**n to 2**n-1, where n is the number of bits in the
1456 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1457 can't overflow, which is exactly what we want. */
1459 if (ss
!= 0 && ss
!= (addrmask
& signmask
))
1460 flag
= bfd_reloc_overflow
;
1462 /* We only need this next bit of code if the sign bit of B
1463 is below the sign bit of A. This would only happen if
1464 SRC_MASK had fewer bits than BITSIZE. Note that if
1465 SRC_MASK has more bits than BITSIZE, we can get into
1466 trouble; we would need to verify that B is in range, as
1467 we do for A above. */
1468 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1471 /* Set all the bits above the sign bit. */
1474 /* Now we can do the addition. */
1477 /* See if the result has the correct sign. Bits above the
1478 sign bit are junk now; ignore them. If the sum is
1479 positive, make sure we did not have all negative inputs;
1480 if the sum is negative, make sure we did not have all
1481 positive inputs. The test below looks only at the sign
1482 bits, and it really just
1483 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1485 We mask with addrmask here to explicitly allow an address
1486 wrap-around. The Linux kernel relies on it, and it is
1487 the only way to write assembler code which can run when
1488 loaded at a location 0x80000000 away from the location at
1489 which it is linked. */
1490 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1491 flag
= bfd_reloc_overflow
;
1494 case complain_overflow_unsigned
:
1495 /* Checking for an unsigned overflow is relatively easy:
1496 trim the addresses and add, and trim the result as well.
1497 Overflow is normally indicated when the result does not
1498 fit in the field. However, we also need to consider the
1499 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1500 input is 0x80000000, and bfd_vma is only 32 bits; then we
1501 will get sum == 0, but there is an overflow, since the
1502 inputs did not fit in the field. Instead of doing a
1503 separate test, we can check for this by or-ing in the
1504 operands when testing for the sum overflowing its final
1506 sum
= (a
+ b
) & addrmask
;
1507 if ((a
| b
| sum
) & signmask
)
1508 flag
= bfd_reloc_overflow
;
1516 /* Put RELOCATION in the right bits. */
1517 relocation
>>= (bfd_vma
) rightshift
;
1518 relocation
<<= (bfd_vma
) bitpos
;
1520 /* Add RELOCATION to the right bits of X. */
1521 x
= ((x
& ~howto
->dst_mask
)
1522 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1524 /* Put the relocated value back in the object file. */
1530 bfd_put_8 (input_bfd
, x
, location
);
1533 bfd_put_16 (input_bfd
, x
, location
);
1536 bfd_put_32 (input_bfd
, x
, location
);
1540 bfd_put_64 (input_bfd
, x
, location
);
1550 /* Clear a given location using a given howto, by applying a relocation value
1551 of zero and discarding any in-place addend. This is used for fixed-up
1552 relocations against discarded symbols, to make ignorable debug or unwind
1553 information more obvious. */
1556 _bfd_clear_contents (reloc_howto_type
*howto
,
1563 /* Get the value we are going to relocate. */
1564 size
= bfd_get_reloc_size (howto
);
1571 x
= bfd_get_8 (input_bfd
, location
);
1574 x
= bfd_get_16 (input_bfd
, location
);
1577 x
= bfd_get_32 (input_bfd
, location
);
1581 x
= bfd_get_64 (input_bfd
, location
);
1588 /* Zero out the unwanted bits of X. */
1589 x
&= ~howto
->dst_mask
;
1591 /* Put the relocated value back in the object file. */
1598 bfd_put_8 (input_bfd
, x
, location
);
1601 bfd_put_16 (input_bfd
, x
, location
);
1604 bfd_put_32 (input_bfd
, x
, location
);
1608 bfd_put_64 (input_bfd
, x
, location
);
1619 howto manager, , typedef arelent, Relocations
1624 When an application wants to create a relocation, but doesn't
1625 know what the target machine might call it, it can find out by
1626 using this bit of code.
1635 The insides of a reloc code. The idea is that, eventually, there
1636 will be one enumerator for every type of relocation we ever do.
1637 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1638 return a howto pointer.
1640 This does mean that the application must determine the correct
1641 enumerator value; you can't get a howto pointer from a random set
1662 Basic absolute relocations of N bits.
1677 PC-relative relocations. Sometimes these are relative to the address
1678 of the relocation itself; sometimes they are relative to the start of
1679 the section containing the relocation. It depends on the specific target.
1681 The 24-bit relocation is used in some Intel 960 configurations.
1686 Section relative relocations. Some targets need this for DWARF2.
1689 BFD_RELOC_32_GOT_PCREL
1691 BFD_RELOC_16_GOT_PCREL
1693 BFD_RELOC_8_GOT_PCREL
1699 BFD_RELOC_LO16_GOTOFF
1701 BFD_RELOC_HI16_GOTOFF
1703 BFD_RELOC_HI16_S_GOTOFF
1707 BFD_RELOC_64_PLT_PCREL
1709 BFD_RELOC_32_PLT_PCREL
1711 BFD_RELOC_24_PLT_PCREL
1713 BFD_RELOC_16_PLT_PCREL
1715 BFD_RELOC_8_PLT_PCREL
1723 BFD_RELOC_LO16_PLTOFF
1725 BFD_RELOC_HI16_PLTOFF
1727 BFD_RELOC_HI16_S_PLTOFF
1734 BFD_RELOC_68K_GLOB_DAT
1736 BFD_RELOC_68K_JMP_SLOT
1738 BFD_RELOC_68K_RELATIVE
1740 BFD_RELOC_68K_TLS_GD32
1742 BFD_RELOC_68K_TLS_GD16
1744 BFD_RELOC_68K_TLS_GD8
1746 BFD_RELOC_68K_TLS_LDM32
1748 BFD_RELOC_68K_TLS_LDM16
1750 BFD_RELOC_68K_TLS_LDM8
1752 BFD_RELOC_68K_TLS_LDO32
1754 BFD_RELOC_68K_TLS_LDO16
1756 BFD_RELOC_68K_TLS_LDO8
1758 BFD_RELOC_68K_TLS_IE32
1760 BFD_RELOC_68K_TLS_IE16
1762 BFD_RELOC_68K_TLS_IE8
1764 BFD_RELOC_68K_TLS_LE32
1766 BFD_RELOC_68K_TLS_LE16
1768 BFD_RELOC_68K_TLS_LE8
1770 Relocations used by 68K ELF.
1773 BFD_RELOC_32_BASEREL
1775 BFD_RELOC_16_BASEREL
1777 BFD_RELOC_LO16_BASEREL
1779 BFD_RELOC_HI16_BASEREL
1781 BFD_RELOC_HI16_S_BASEREL
1787 Linkage-table relative.
1792 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1795 BFD_RELOC_32_PCREL_S2
1797 BFD_RELOC_16_PCREL_S2
1799 BFD_RELOC_23_PCREL_S2
1801 These PC-relative relocations are stored as word displacements --
1802 i.e., byte displacements shifted right two bits. The 30-bit word
1803 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1804 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1805 signed 16-bit displacement is used on the MIPS, and the 23-bit
1806 displacement is used on the Alpha.
1813 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1814 the target word. These are used on the SPARC.
1821 For systems that allocate a Global Pointer register, these are
1822 displacements off that register. These relocation types are
1823 handled specially, because the value the register will have is
1824 decided relatively late.
1827 BFD_RELOC_I960_CALLJ
1829 Reloc types used for i960/b.out.
1834 BFD_RELOC_SPARC_WDISP22
1840 BFD_RELOC_SPARC_GOT10
1842 BFD_RELOC_SPARC_GOT13
1844 BFD_RELOC_SPARC_GOT22
1846 BFD_RELOC_SPARC_PC10
1848 BFD_RELOC_SPARC_PC22
1850 BFD_RELOC_SPARC_WPLT30
1852 BFD_RELOC_SPARC_COPY
1854 BFD_RELOC_SPARC_GLOB_DAT
1856 BFD_RELOC_SPARC_JMP_SLOT
1858 BFD_RELOC_SPARC_RELATIVE
1860 BFD_RELOC_SPARC_UA16
1862 BFD_RELOC_SPARC_UA32
1864 BFD_RELOC_SPARC_UA64
1866 BFD_RELOC_SPARC_GOTDATA_HIX22
1868 BFD_RELOC_SPARC_GOTDATA_LOX10
1870 BFD_RELOC_SPARC_GOTDATA_OP_HIX22
1872 BFD_RELOC_SPARC_GOTDATA_OP_LOX10
1874 BFD_RELOC_SPARC_GOTDATA_OP
1876 BFD_RELOC_SPARC_JMP_IREL
1878 BFD_RELOC_SPARC_IRELATIVE
1880 SPARC ELF relocations. There is probably some overlap with other
1881 relocation types already defined.
1884 BFD_RELOC_SPARC_BASE13
1886 BFD_RELOC_SPARC_BASE22
1888 I think these are specific to SPARC a.out (e.g., Sun 4).
1898 BFD_RELOC_SPARC_OLO10
1900 BFD_RELOC_SPARC_HH22
1902 BFD_RELOC_SPARC_HM10
1904 BFD_RELOC_SPARC_LM22
1906 BFD_RELOC_SPARC_PC_HH22
1908 BFD_RELOC_SPARC_PC_HM10
1910 BFD_RELOC_SPARC_PC_LM22
1912 BFD_RELOC_SPARC_WDISP16
1914 BFD_RELOC_SPARC_WDISP19
1922 BFD_RELOC_SPARC_DISP64
1925 BFD_RELOC_SPARC_PLT32
1927 BFD_RELOC_SPARC_PLT64
1929 BFD_RELOC_SPARC_HIX22
1931 BFD_RELOC_SPARC_LOX10
1939 BFD_RELOC_SPARC_REGISTER
1944 BFD_RELOC_SPARC_REV32
1946 SPARC little endian relocation
1948 BFD_RELOC_SPARC_TLS_GD_HI22
1950 BFD_RELOC_SPARC_TLS_GD_LO10
1952 BFD_RELOC_SPARC_TLS_GD_ADD
1954 BFD_RELOC_SPARC_TLS_GD_CALL
1956 BFD_RELOC_SPARC_TLS_LDM_HI22
1958 BFD_RELOC_SPARC_TLS_LDM_LO10
1960 BFD_RELOC_SPARC_TLS_LDM_ADD
1962 BFD_RELOC_SPARC_TLS_LDM_CALL
1964 BFD_RELOC_SPARC_TLS_LDO_HIX22
1966 BFD_RELOC_SPARC_TLS_LDO_LOX10
1968 BFD_RELOC_SPARC_TLS_LDO_ADD
1970 BFD_RELOC_SPARC_TLS_IE_HI22
1972 BFD_RELOC_SPARC_TLS_IE_LO10
1974 BFD_RELOC_SPARC_TLS_IE_LD
1976 BFD_RELOC_SPARC_TLS_IE_LDX
1978 BFD_RELOC_SPARC_TLS_IE_ADD
1980 BFD_RELOC_SPARC_TLS_LE_HIX22
1982 BFD_RELOC_SPARC_TLS_LE_LOX10
1984 BFD_RELOC_SPARC_TLS_DTPMOD32
1986 BFD_RELOC_SPARC_TLS_DTPMOD64
1988 BFD_RELOC_SPARC_TLS_DTPOFF32
1990 BFD_RELOC_SPARC_TLS_DTPOFF64
1992 BFD_RELOC_SPARC_TLS_TPOFF32
1994 BFD_RELOC_SPARC_TLS_TPOFF64
1996 SPARC TLS relocations
2005 BFD_RELOC_SPU_IMM10W
2009 BFD_RELOC_SPU_IMM16W
2013 BFD_RELOC_SPU_PCREL9a
2015 BFD_RELOC_SPU_PCREL9b
2017 BFD_RELOC_SPU_PCREL16
2027 BFD_RELOC_SPU_ADD_PIC
2036 BFD_RELOC_ALPHA_GPDISP_HI16
2038 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
2039 "addend" in some special way.
2040 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
2041 writing; when reading, it will be the absolute section symbol. The
2042 addend is the displacement in bytes of the "lda" instruction from
2043 the "ldah" instruction (which is at the address of this reloc).
2045 BFD_RELOC_ALPHA_GPDISP_LO16
2047 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
2048 with GPDISP_HI16 relocs. The addend is ignored when writing the
2049 relocations out, and is filled in with the file's GP value on
2050 reading, for convenience.
2053 BFD_RELOC_ALPHA_GPDISP
2055 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
2056 relocation except that there is no accompanying GPDISP_LO16
2060 BFD_RELOC_ALPHA_LITERAL
2062 BFD_RELOC_ALPHA_ELF_LITERAL
2064 BFD_RELOC_ALPHA_LITUSE
2066 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
2067 the assembler turns it into a LDQ instruction to load the address of
2068 the symbol, and then fills in a register in the real instruction.
2070 The LITERAL reloc, at the LDQ instruction, refers to the .lita
2071 section symbol. The addend is ignored when writing, but is filled
2072 in with the file's GP value on reading, for convenience, as with the
2075 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
2076 It should refer to the symbol to be referenced, as with 16_GOTOFF,
2077 but it generates output not based on the position within the .got
2078 section, but relative to the GP value chosen for the file during the
2081 The LITUSE reloc, on the instruction using the loaded address, gives
2082 information to the linker that it might be able to use to optimize
2083 away some literal section references. The symbol is ignored (read
2084 as the absolute section symbol), and the "addend" indicates the type
2085 of instruction using the register:
2086 1 - "memory" fmt insn
2087 2 - byte-manipulation (byte offset reg)
2088 3 - jsr (target of branch)
2091 BFD_RELOC_ALPHA_HINT
2093 The HINT relocation indicates a value that should be filled into the
2094 "hint" field of a jmp/jsr/ret instruction, for possible branch-
2095 prediction logic which may be provided on some processors.
2098 BFD_RELOC_ALPHA_LINKAGE
2100 The LINKAGE relocation outputs a linkage pair in the object file,
2101 which is filled by the linker.
2104 BFD_RELOC_ALPHA_CODEADDR
2106 The CODEADDR relocation outputs a STO_CA in the object file,
2107 which is filled by the linker.
2110 BFD_RELOC_ALPHA_GPREL_HI16
2112 BFD_RELOC_ALPHA_GPREL_LO16
2114 The GPREL_HI/LO relocations together form a 32-bit offset from the
2118 BFD_RELOC_ALPHA_BRSGP
2120 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2121 share a common GP, and the target address is adjusted for
2122 STO_ALPHA_STD_GPLOAD.
2127 The NOP relocation outputs a NOP if the longword displacement
2128 between two procedure entry points is < 2^21.
2133 The BSR relocation outputs a BSR if the longword displacement
2134 between two procedure entry points is < 2^21.
2139 The LDA relocation outputs a LDA if the longword displacement
2140 between two procedure entry points is < 2^16.
2145 The BOH relocation outputs a BSR if the longword displacement
2146 between two procedure entry points is < 2^21, or else a hint.
2149 BFD_RELOC_ALPHA_TLSGD
2151 BFD_RELOC_ALPHA_TLSLDM
2153 BFD_RELOC_ALPHA_DTPMOD64
2155 BFD_RELOC_ALPHA_GOTDTPREL16
2157 BFD_RELOC_ALPHA_DTPREL64
2159 BFD_RELOC_ALPHA_DTPREL_HI16
2161 BFD_RELOC_ALPHA_DTPREL_LO16
2163 BFD_RELOC_ALPHA_DTPREL16
2165 BFD_RELOC_ALPHA_GOTTPREL16
2167 BFD_RELOC_ALPHA_TPREL64
2169 BFD_RELOC_ALPHA_TPREL_HI16
2171 BFD_RELOC_ALPHA_TPREL_LO16
2173 BFD_RELOC_ALPHA_TPREL16
2175 Alpha thread-local storage relocations.
2180 Bits 27..2 of the relocation address shifted right 2 bits;
2181 simple reloc otherwise.
2184 BFD_RELOC_MIPS16_JMP
2186 The MIPS16 jump instruction.
2189 BFD_RELOC_MIPS16_GPREL
2191 MIPS16 GP relative reloc.
2196 High 16 bits of 32-bit value; simple reloc.
2200 High 16 bits of 32-bit value but the low 16 bits will be sign
2201 extended and added to form the final result. If the low 16
2202 bits form a negative number, we need to add one to the high value
2203 to compensate for the borrow when the low bits are added.
2210 BFD_RELOC_HI16_PCREL
2212 High 16 bits of 32-bit pc-relative value
2214 BFD_RELOC_HI16_S_PCREL
2216 High 16 bits of 32-bit pc-relative value, adjusted
2218 BFD_RELOC_LO16_PCREL
2220 Low 16 bits of pc-relative value
2223 BFD_RELOC_MIPS16_GOT16
2225 BFD_RELOC_MIPS16_CALL16
2227 Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
2228 16-bit immediate fields
2230 BFD_RELOC_MIPS16_HI16
2232 MIPS16 high 16 bits of 32-bit value.
2234 BFD_RELOC_MIPS16_HI16_S
2236 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2237 extended and added to form the final result. If the low 16
2238 bits form a negative number, we need to add one to the high value
2239 to compensate for the borrow when the low bits are added.
2241 BFD_RELOC_MIPS16_LO16
2246 BFD_RELOC_MIPS_LITERAL
2248 Relocation against a MIPS literal section.
2251 BFD_RELOC_MIPS_GOT16
2253 BFD_RELOC_MIPS_CALL16
2255 BFD_RELOC_MIPS_GOT_HI16
2257 BFD_RELOC_MIPS_GOT_LO16
2259 BFD_RELOC_MIPS_CALL_HI16
2261 BFD_RELOC_MIPS_CALL_LO16
2265 BFD_RELOC_MIPS_GOT_PAGE
2267 BFD_RELOC_MIPS_GOT_OFST
2269 BFD_RELOC_MIPS_GOT_DISP
2271 BFD_RELOC_MIPS_SHIFT5
2273 BFD_RELOC_MIPS_SHIFT6
2275 BFD_RELOC_MIPS_INSERT_A
2277 BFD_RELOC_MIPS_INSERT_B
2279 BFD_RELOC_MIPS_DELETE
2281 BFD_RELOC_MIPS_HIGHEST
2283 BFD_RELOC_MIPS_HIGHER
2285 BFD_RELOC_MIPS_SCN_DISP
2287 BFD_RELOC_MIPS_REL16
2289 BFD_RELOC_MIPS_RELGOT
2293 BFD_RELOC_MIPS_TLS_DTPMOD32
2295 BFD_RELOC_MIPS_TLS_DTPREL32
2297 BFD_RELOC_MIPS_TLS_DTPMOD64
2299 BFD_RELOC_MIPS_TLS_DTPREL64
2301 BFD_RELOC_MIPS_TLS_GD
2303 BFD_RELOC_MIPS_TLS_LDM
2305 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2307 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2309 BFD_RELOC_MIPS_TLS_GOTTPREL
2311 BFD_RELOC_MIPS_TLS_TPREL32
2313 BFD_RELOC_MIPS_TLS_TPREL64
2315 BFD_RELOC_MIPS_TLS_TPREL_HI16
2317 BFD_RELOC_MIPS_TLS_TPREL_LO16
2319 MIPS ELF relocations.
2325 BFD_RELOC_MIPS_JUMP_SLOT
2327 MIPS ELF relocations (VxWorks and PLT extensions).
2331 BFD_RELOC_MOXIE_10_PCREL
2333 Moxie ELF relocations.
2337 BFD_RELOC_FRV_LABEL16
2339 BFD_RELOC_FRV_LABEL24
2345 BFD_RELOC_FRV_GPREL12
2347 BFD_RELOC_FRV_GPRELU12
2349 BFD_RELOC_FRV_GPREL32
2351 BFD_RELOC_FRV_GPRELHI
2353 BFD_RELOC_FRV_GPRELLO
2361 BFD_RELOC_FRV_FUNCDESC
2363 BFD_RELOC_FRV_FUNCDESC_GOT12
2365 BFD_RELOC_FRV_FUNCDESC_GOTHI
2367 BFD_RELOC_FRV_FUNCDESC_GOTLO
2369 BFD_RELOC_FRV_FUNCDESC_VALUE
2371 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2373 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2375 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2377 BFD_RELOC_FRV_GOTOFF12
2379 BFD_RELOC_FRV_GOTOFFHI
2381 BFD_RELOC_FRV_GOTOFFLO
2383 BFD_RELOC_FRV_GETTLSOFF
2385 BFD_RELOC_FRV_TLSDESC_VALUE
2387 BFD_RELOC_FRV_GOTTLSDESC12
2389 BFD_RELOC_FRV_GOTTLSDESCHI
2391 BFD_RELOC_FRV_GOTTLSDESCLO
2393 BFD_RELOC_FRV_TLSMOFF12
2395 BFD_RELOC_FRV_TLSMOFFHI
2397 BFD_RELOC_FRV_TLSMOFFLO
2399 BFD_RELOC_FRV_GOTTLSOFF12
2401 BFD_RELOC_FRV_GOTTLSOFFHI
2403 BFD_RELOC_FRV_GOTTLSOFFLO
2405 BFD_RELOC_FRV_TLSOFF
2407 BFD_RELOC_FRV_TLSDESC_RELAX
2409 BFD_RELOC_FRV_GETTLSOFF_RELAX
2411 BFD_RELOC_FRV_TLSOFF_RELAX
2413 BFD_RELOC_FRV_TLSMOFF
2415 Fujitsu Frv Relocations.
2419 BFD_RELOC_MN10300_GOTOFF24
2421 This is a 24bit GOT-relative reloc for the mn10300.
2423 BFD_RELOC_MN10300_GOT32
2425 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2428 BFD_RELOC_MN10300_GOT24
2430 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2433 BFD_RELOC_MN10300_GOT16
2435 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2438 BFD_RELOC_MN10300_COPY
2440 Copy symbol at runtime.
2442 BFD_RELOC_MN10300_GLOB_DAT
2446 BFD_RELOC_MN10300_JMP_SLOT
2450 BFD_RELOC_MN10300_RELATIVE
2452 Adjust by program base.
2454 BFD_RELOC_MN10300_SYM_DIFF
2456 Together with another reloc targeted at the same location,
2457 allows for a value that is the difference of two symbols
2458 in the same section.
2460 BFD_RELOC_MN10300_ALIGN
2462 The addend of this reloc is an alignment power that must
2463 be honoured at the offset's location, regardless of linker
2474 BFD_RELOC_386_GLOB_DAT
2476 BFD_RELOC_386_JUMP_SLOT
2478 BFD_RELOC_386_RELATIVE
2480 BFD_RELOC_386_GOTOFF
2484 BFD_RELOC_386_TLS_TPOFF
2486 BFD_RELOC_386_TLS_IE
2488 BFD_RELOC_386_TLS_GOTIE
2490 BFD_RELOC_386_TLS_LE
2492 BFD_RELOC_386_TLS_GD
2494 BFD_RELOC_386_TLS_LDM
2496 BFD_RELOC_386_TLS_LDO_32
2498 BFD_RELOC_386_TLS_IE_32
2500 BFD_RELOC_386_TLS_LE_32
2502 BFD_RELOC_386_TLS_DTPMOD32
2504 BFD_RELOC_386_TLS_DTPOFF32
2506 BFD_RELOC_386_TLS_TPOFF32
2508 BFD_RELOC_386_TLS_GOTDESC
2510 BFD_RELOC_386_TLS_DESC_CALL
2512 BFD_RELOC_386_TLS_DESC
2514 BFD_RELOC_386_IRELATIVE
2516 i386/elf relocations
2519 BFD_RELOC_X86_64_GOT32
2521 BFD_RELOC_X86_64_PLT32
2523 BFD_RELOC_X86_64_COPY
2525 BFD_RELOC_X86_64_GLOB_DAT
2527 BFD_RELOC_X86_64_JUMP_SLOT
2529 BFD_RELOC_X86_64_RELATIVE
2531 BFD_RELOC_X86_64_GOTPCREL
2533 BFD_RELOC_X86_64_32S
2535 BFD_RELOC_X86_64_DTPMOD64
2537 BFD_RELOC_X86_64_DTPOFF64
2539 BFD_RELOC_X86_64_TPOFF64
2541 BFD_RELOC_X86_64_TLSGD
2543 BFD_RELOC_X86_64_TLSLD
2545 BFD_RELOC_X86_64_DTPOFF32
2547 BFD_RELOC_X86_64_GOTTPOFF
2549 BFD_RELOC_X86_64_TPOFF32
2551 BFD_RELOC_X86_64_GOTOFF64
2553 BFD_RELOC_X86_64_GOTPC32
2555 BFD_RELOC_X86_64_GOT64
2557 BFD_RELOC_X86_64_GOTPCREL64
2559 BFD_RELOC_X86_64_GOTPC64
2561 BFD_RELOC_X86_64_GOTPLT64
2563 BFD_RELOC_X86_64_PLTOFF64
2565 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2567 BFD_RELOC_X86_64_TLSDESC_CALL
2569 BFD_RELOC_X86_64_TLSDESC
2571 BFD_RELOC_X86_64_IRELATIVE
2573 x86-64/elf relocations
2576 BFD_RELOC_NS32K_IMM_8
2578 BFD_RELOC_NS32K_IMM_16
2580 BFD_RELOC_NS32K_IMM_32
2582 BFD_RELOC_NS32K_IMM_8_PCREL
2584 BFD_RELOC_NS32K_IMM_16_PCREL
2586 BFD_RELOC_NS32K_IMM_32_PCREL
2588 BFD_RELOC_NS32K_DISP_8
2590 BFD_RELOC_NS32K_DISP_16
2592 BFD_RELOC_NS32K_DISP_32
2594 BFD_RELOC_NS32K_DISP_8_PCREL
2596 BFD_RELOC_NS32K_DISP_16_PCREL
2598 BFD_RELOC_NS32K_DISP_32_PCREL
2603 BFD_RELOC_PDP11_DISP_8_PCREL
2605 BFD_RELOC_PDP11_DISP_6_PCREL
2610 BFD_RELOC_PJ_CODE_HI16
2612 BFD_RELOC_PJ_CODE_LO16
2614 BFD_RELOC_PJ_CODE_DIR16
2616 BFD_RELOC_PJ_CODE_DIR32
2618 BFD_RELOC_PJ_CODE_REL16
2620 BFD_RELOC_PJ_CODE_REL32
2622 Picojava relocs. Not all of these appear in object files.
2633 BFD_RELOC_PPC_B16_BRTAKEN
2635 BFD_RELOC_PPC_B16_BRNTAKEN
2639 BFD_RELOC_PPC_BA16_BRTAKEN
2641 BFD_RELOC_PPC_BA16_BRNTAKEN
2645 BFD_RELOC_PPC_GLOB_DAT
2647 BFD_RELOC_PPC_JMP_SLOT
2649 BFD_RELOC_PPC_RELATIVE
2651 BFD_RELOC_PPC_LOCAL24PC
2653 BFD_RELOC_PPC_EMB_NADDR32
2655 BFD_RELOC_PPC_EMB_NADDR16
2657 BFD_RELOC_PPC_EMB_NADDR16_LO
2659 BFD_RELOC_PPC_EMB_NADDR16_HI
2661 BFD_RELOC_PPC_EMB_NADDR16_HA
2663 BFD_RELOC_PPC_EMB_SDAI16
2665 BFD_RELOC_PPC_EMB_SDA2I16
2667 BFD_RELOC_PPC_EMB_SDA2REL
2669 BFD_RELOC_PPC_EMB_SDA21
2671 BFD_RELOC_PPC_EMB_MRKREF
2673 BFD_RELOC_PPC_EMB_RELSEC16
2675 BFD_RELOC_PPC_EMB_RELST_LO
2677 BFD_RELOC_PPC_EMB_RELST_HI
2679 BFD_RELOC_PPC_EMB_RELST_HA
2681 BFD_RELOC_PPC_EMB_BIT_FLD
2683 BFD_RELOC_PPC_EMB_RELSDA
2685 BFD_RELOC_PPC64_HIGHER
2687 BFD_RELOC_PPC64_HIGHER_S
2689 BFD_RELOC_PPC64_HIGHEST
2691 BFD_RELOC_PPC64_HIGHEST_S
2693 BFD_RELOC_PPC64_TOC16_LO
2695 BFD_RELOC_PPC64_TOC16_HI
2697 BFD_RELOC_PPC64_TOC16_HA
2701 BFD_RELOC_PPC64_PLTGOT16
2703 BFD_RELOC_PPC64_PLTGOT16_LO
2705 BFD_RELOC_PPC64_PLTGOT16_HI
2707 BFD_RELOC_PPC64_PLTGOT16_HA
2709 BFD_RELOC_PPC64_ADDR16_DS
2711 BFD_RELOC_PPC64_ADDR16_LO_DS
2713 BFD_RELOC_PPC64_GOT16_DS
2715 BFD_RELOC_PPC64_GOT16_LO_DS
2717 BFD_RELOC_PPC64_PLT16_LO_DS
2719 BFD_RELOC_PPC64_SECTOFF_DS
2721 BFD_RELOC_PPC64_SECTOFF_LO_DS
2723 BFD_RELOC_PPC64_TOC16_DS
2725 BFD_RELOC_PPC64_TOC16_LO_DS
2727 BFD_RELOC_PPC64_PLTGOT16_DS
2729 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2731 Power(rs6000) and PowerPC relocations.
2740 BFD_RELOC_PPC_DTPMOD
2742 BFD_RELOC_PPC_TPREL16
2744 BFD_RELOC_PPC_TPREL16_LO
2746 BFD_RELOC_PPC_TPREL16_HI
2748 BFD_RELOC_PPC_TPREL16_HA
2752 BFD_RELOC_PPC_DTPREL16
2754 BFD_RELOC_PPC_DTPREL16_LO
2756 BFD_RELOC_PPC_DTPREL16_HI
2758 BFD_RELOC_PPC_DTPREL16_HA
2760 BFD_RELOC_PPC_DTPREL
2762 BFD_RELOC_PPC_GOT_TLSGD16
2764 BFD_RELOC_PPC_GOT_TLSGD16_LO
2766 BFD_RELOC_PPC_GOT_TLSGD16_HI
2768 BFD_RELOC_PPC_GOT_TLSGD16_HA
2770 BFD_RELOC_PPC_GOT_TLSLD16
2772 BFD_RELOC_PPC_GOT_TLSLD16_LO
2774 BFD_RELOC_PPC_GOT_TLSLD16_HI
2776 BFD_RELOC_PPC_GOT_TLSLD16_HA
2778 BFD_RELOC_PPC_GOT_TPREL16
2780 BFD_RELOC_PPC_GOT_TPREL16_LO
2782 BFD_RELOC_PPC_GOT_TPREL16_HI
2784 BFD_RELOC_PPC_GOT_TPREL16_HA
2786 BFD_RELOC_PPC_GOT_DTPREL16
2788 BFD_RELOC_PPC_GOT_DTPREL16_LO
2790 BFD_RELOC_PPC_GOT_DTPREL16_HI
2792 BFD_RELOC_PPC_GOT_DTPREL16_HA
2794 BFD_RELOC_PPC64_TPREL16_DS
2796 BFD_RELOC_PPC64_TPREL16_LO_DS
2798 BFD_RELOC_PPC64_TPREL16_HIGHER
2800 BFD_RELOC_PPC64_TPREL16_HIGHERA
2802 BFD_RELOC_PPC64_TPREL16_HIGHEST
2804 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2806 BFD_RELOC_PPC64_DTPREL16_DS
2808 BFD_RELOC_PPC64_DTPREL16_LO_DS
2810 BFD_RELOC_PPC64_DTPREL16_HIGHER
2812 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2814 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2816 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2818 PowerPC and PowerPC64 thread-local storage relocations.
2823 IBM 370/390 relocations
2828 The type of reloc used to build a constructor table - at the moment
2829 probably a 32 bit wide absolute relocation, but the target can choose.
2830 It generally does map to one of the other relocation types.
2833 BFD_RELOC_ARM_PCREL_BRANCH
2835 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2836 not stored in the instruction.
2838 BFD_RELOC_ARM_PCREL_BLX
2840 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2841 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2842 field in the instruction.
2844 BFD_RELOC_THUMB_PCREL_BLX
2846 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2847 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2848 field in the instruction.
2850 BFD_RELOC_ARM_PCREL_CALL
2852 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
2854 BFD_RELOC_ARM_PCREL_JUMP
2856 ARM 26-bit pc-relative branch for B or conditional BL instruction.
2859 BFD_RELOC_THUMB_PCREL_BRANCH7
2861 BFD_RELOC_THUMB_PCREL_BRANCH9
2863 BFD_RELOC_THUMB_PCREL_BRANCH12
2865 BFD_RELOC_THUMB_PCREL_BRANCH20
2867 BFD_RELOC_THUMB_PCREL_BRANCH23
2869 BFD_RELOC_THUMB_PCREL_BRANCH25
2871 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
2872 The lowest bit must be zero and is not stored in the instruction.
2873 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
2874 "nn" one smaller in all cases. Note further that BRANCH23
2875 corresponds to R_ARM_THM_CALL.
2878 BFD_RELOC_ARM_OFFSET_IMM
2880 12-bit immediate offset, used in ARM-format ldr and str instructions.
2883 BFD_RELOC_ARM_THUMB_OFFSET
2885 5-bit immediate offset, used in Thumb-format ldr and str instructions.
2888 BFD_RELOC_ARM_TARGET1
2890 Pc-relative or absolute relocation depending on target. Used for
2891 entries in .init_array sections.
2893 BFD_RELOC_ARM_ROSEGREL32
2895 Read-only segment base relative address.
2897 BFD_RELOC_ARM_SBREL32
2899 Data segment base relative address.
2901 BFD_RELOC_ARM_TARGET2
2903 This reloc is used for references to RTTI data from exception handling
2904 tables. The actual definition depends on the target. It may be a
2905 pc-relative or some form of GOT-indirect relocation.
2907 BFD_RELOC_ARM_PREL31
2909 31-bit PC relative address.
2915 BFD_RELOC_ARM_MOVW_PCREL
2917 BFD_RELOC_ARM_MOVT_PCREL
2919 BFD_RELOC_ARM_THUMB_MOVW
2921 BFD_RELOC_ARM_THUMB_MOVT
2923 BFD_RELOC_ARM_THUMB_MOVW_PCREL
2925 BFD_RELOC_ARM_THUMB_MOVT_PCREL
2927 Low and High halfword relocations for MOVW and MOVT instructions.
2930 BFD_RELOC_ARM_JUMP_SLOT
2932 BFD_RELOC_ARM_GLOB_DAT
2938 BFD_RELOC_ARM_RELATIVE
2940 BFD_RELOC_ARM_GOTOFF
2944 Relocations for setting up GOTs and PLTs for shared libraries.
2947 BFD_RELOC_ARM_TLS_GD32
2949 BFD_RELOC_ARM_TLS_LDO32
2951 BFD_RELOC_ARM_TLS_LDM32
2953 BFD_RELOC_ARM_TLS_DTPOFF32
2955 BFD_RELOC_ARM_TLS_DTPMOD32
2957 BFD_RELOC_ARM_TLS_TPOFF32
2959 BFD_RELOC_ARM_TLS_IE32
2961 BFD_RELOC_ARM_TLS_LE32
2963 ARM thread-local storage relocations.
2966 BFD_RELOC_ARM_ALU_PC_G0_NC
2968 BFD_RELOC_ARM_ALU_PC_G0
2970 BFD_RELOC_ARM_ALU_PC_G1_NC
2972 BFD_RELOC_ARM_ALU_PC_G1
2974 BFD_RELOC_ARM_ALU_PC_G2
2976 BFD_RELOC_ARM_LDR_PC_G0
2978 BFD_RELOC_ARM_LDR_PC_G1
2980 BFD_RELOC_ARM_LDR_PC_G2
2982 BFD_RELOC_ARM_LDRS_PC_G0
2984 BFD_RELOC_ARM_LDRS_PC_G1
2986 BFD_RELOC_ARM_LDRS_PC_G2
2988 BFD_RELOC_ARM_LDC_PC_G0
2990 BFD_RELOC_ARM_LDC_PC_G1
2992 BFD_RELOC_ARM_LDC_PC_G2
2994 BFD_RELOC_ARM_ALU_SB_G0_NC
2996 BFD_RELOC_ARM_ALU_SB_G0
2998 BFD_RELOC_ARM_ALU_SB_G1_NC
3000 BFD_RELOC_ARM_ALU_SB_G1
3002 BFD_RELOC_ARM_ALU_SB_G2
3004 BFD_RELOC_ARM_LDR_SB_G0
3006 BFD_RELOC_ARM_LDR_SB_G1
3008 BFD_RELOC_ARM_LDR_SB_G2
3010 BFD_RELOC_ARM_LDRS_SB_G0
3012 BFD_RELOC_ARM_LDRS_SB_G1
3014 BFD_RELOC_ARM_LDRS_SB_G2
3016 BFD_RELOC_ARM_LDC_SB_G0
3018 BFD_RELOC_ARM_LDC_SB_G1
3020 BFD_RELOC_ARM_LDC_SB_G2
3022 ARM group relocations.
3027 Annotation of BX instructions.
3030 BFD_RELOC_ARM_IMMEDIATE
3032 BFD_RELOC_ARM_ADRL_IMMEDIATE
3034 BFD_RELOC_ARM_T32_IMMEDIATE
3036 BFD_RELOC_ARM_T32_ADD_IMM
3038 BFD_RELOC_ARM_T32_IMM12
3040 BFD_RELOC_ARM_T32_ADD_PC12
3042 BFD_RELOC_ARM_SHIFT_IMM
3050 BFD_RELOC_ARM_CP_OFF_IMM
3052 BFD_RELOC_ARM_CP_OFF_IMM_S2
3054 BFD_RELOC_ARM_T32_CP_OFF_IMM
3056 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
3058 BFD_RELOC_ARM_ADR_IMM
3060 BFD_RELOC_ARM_LDR_IMM
3062 BFD_RELOC_ARM_LITERAL
3064 BFD_RELOC_ARM_IN_POOL
3066 BFD_RELOC_ARM_OFFSET_IMM8
3068 BFD_RELOC_ARM_T32_OFFSET_U8
3070 BFD_RELOC_ARM_T32_OFFSET_IMM
3072 BFD_RELOC_ARM_HWLITERAL
3074 BFD_RELOC_ARM_THUMB_ADD
3076 BFD_RELOC_ARM_THUMB_IMM
3078 BFD_RELOC_ARM_THUMB_SHIFT
3080 These relocs are only used within the ARM assembler. They are not
3081 (at present) written to any object files.
3084 BFD_RELOC_SH_PCDISP8BY2
3086 BFD_RELOC_SH_PCDISP12BY2
3094 BFD_RELOC_SH_DISP12BY2
3096 BFD_RELOC_SH_DISP12BY4
3098 BFD_RELOC_SH_DISP12BY8
3102 BFD_RELOC_SH_DISP20BY8
3106 BFD_RELOC_SH_IMM4BY2
3108 BFD_RELOC_SH_IMM4BY4
3112 BFD_RELOC_SH_IMM8BY2
3114 BFD_RELOC_SH_IMM8BY4
3116 BFD_RELOC_SH_PCRELIMM8BY2
3118 BFD_RELOC_SH_PCRELIMM8BY4
3120 BFD_RELOC_SH_SWITCH16
3122 BFD_RELOC_SH_SWITCH32
3136 BFD_RELOC_SH_LOOP_START
3138 BFD_RELOC_SH_LOOP_END
3142 BFD_RELOC_SH_GLOB_DAT
3144 BFD_RELOC_SH_JMP_SLOT
3146 BFD_RELOC_SH_RELATIVE
3150 BFD_RELOC_SH_GOT_LOW16
3152 BFD_RELOC_SH_GOT_MEDLOW16
3154 BFD_RELOC_SH_GOT_MEDHI16
3156 BFD_RELOC_SH_GOT_HI16
3158 BFD_RELOC_SH_GOTPLT_LOW16
3160 BFD_RELOC_SH_GOTPLT_MEDLOW16
3162 BFD_RELOC_SH_GOTPLT_MEDHI16
3164 BFD_RELOC_SH_GOTPLT_HI16
3166 BFD_RELOC_SH_PLT_LOW16
3168 BFD_RELOC_SH_PLT_MEDLOW16
3170 BFD_RELOC_SH_PLT_MEDHI16
3172 BFD_RELOC_SH_PLT_HI16
3174 BFD_RELOC_SH_GOTOFF_LOW16
3176 BFD_RELOC_SH_GOTOFF_MEDLOW16
3178 BFD_RELOC_SH_GOTOFF_MEDHI16
3180 BFD_RELOC_SH_GOTOFF_HI16
3182 BFD_RELOC_SH_GOTPC_LOW16
3184 BFD_RELOC_SH_GOTPC_MEDLOW16
3186 BFD_RELOC_SH_GOTPC_MEDHI16
3188 BFD_RELOC_SH_GOTPC_HI16
3192 BFD_RELOC_SH_GLOB_DAT64
3194 BFD_RELOC_SH_JMP_SLOT64
3196 BFD_RELOC_SH_RELATIVE64
3198 BFD_RELOC_SH_GOT10BY4
3200 BFD_RELOC_SH_GOT10BY8
3202 BFD_RELOC_SH_GOTPLT10BY4
3204 BFD_RELOC_SH_GOTPLT10BY8
3206 BFD_RELOC_SH_GOTPLT32
3208 BFD_RELOC_SH_SHMEDIA_CODE
3214 BFD_RELOC_SH_IMMS6BY32
3220 BFD_RELOC_SH_IMMS10BY2
3222 BFD_RELOC_SH_IMMS10BY4
3224 BFD_RELOC_SH_IMMS10BY8
3230 BFD_RELOC_SH_IMM_LOW16
3232 BFD_RELOC_SH_IMM_LOW16_PCREL
3234 BFD_RELOC_SH_IMM_MEDLOW16
3236 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3238 BFD_RELOC_SH_IMM_MEDHI16
3240 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3242 BFD_RELOC_SH_IMM_HI16
3244 BFD_RELOC_SH_IMM_HI16_PCREL
3248 BFD_RELOC_SH_TLS_GD_32
3250 BFD_RELOC_SH_TLS_LD_32
3252 BFD_RELOC_SH_TLS_LDO_32
3254 BFD_RELOC_SH_TLS_IE_32
3256 BFD_RELOC_SH_TLS_LE_32
3258 BFD_RELOC_SH_TLS_DTPMOD32
3260 BFD_RELOC_SH_TLS_DTPOFF32
3262 BFD_RELOC_SH_TLS_TPOFF32
3264 Renesas / SuperH SH relocs. Not all of these appear in object files.
3267 BFD_RELOC_ARC_B22_PCREL
3270 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
3271 not stored in the instruction. The high 20 bits are installed in bits 26
3272 through 7 of the instruction.
3276 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
3277 stored in the instruction. The high 24 bits are installed in bits 23
3281 BFD_RELOC_BFIN_16_IMM
3283 ADI Blackfin 16 bit immediate absolute reloc.
3285 BFD_RELOC_BFIN_16_HIGH
3287 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3289 BFD_RELOC_BFIN_4_PCREL
3291 ADI Blackfin 'a' part of LSETUP.
3293 BFD_RELOC_BFIN_5_PCREL
3297 BFD_RELOC_BFIN_16_LOW
3299 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3301 BFD_RELOC_BFIN_10_PCREL
3305 BFD_RELOC_BFIN_11_PCREL
3307 ADI Blackfin 'b' part of LSETUP.
3309 BFD_RELOC_BFIN_12_PCREL_JUMP
3313 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3315 ADI Blackfin Short jump, pcrel.
3317 BFD_RELOC_BFIN_24_PCREL_CALL_X
3319 ADI Blackfin Call.x not implemented.
3321 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3323 ADI Blackfin Long Jump pcrel.
3325 BFD_RELOC_BFIN_GOT17M4
3327 BFD_RELOC_BFIN_GOTHI
3329 BFD_RELOC_BFIN_GOTLO
3331 BFD_RELOC_BFIN_FUNCDESC
3333 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3335 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3337 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3339 BFD_RELOC_BFIN_FUNCDESC_VALUE
3341 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3343 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3345 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3347 BFD_RELOC_BFIN_GOTOFF17M4
3349 BFD_RELOC_BFIN_GOTOFFHI
3351 BFD_RELOC_BFIN_GOTOFFLO
3353 ADI Blackfin FD-PIC relocations.
3357 ADI Blackfin GOT relocation.
3359 BFD_RELOC_BFIN_PLTPC
3361 ADI Blackfin PLTPC relocation.
3363 BFD_ARELOC_BFIN_PUSH
3365 ADI Blackfin arithmetic relocation.
3367 BFD_ARELOC_BFIN_CONST
3369 ADI Blackfin arithmetic relocation.
3373 ADI Blackfin arithmetic relocation.
3377 ADI Blackfin arithmetic relocation.
3379 BFD_ARELOC_BFIN_MULT
3381 ADI Blackfin arithmetic relocation.
3385 ADI Blackfin arithmetic relocation.
3389 ADI Blackfin arithmetic relocation.
3391 BFD_ARELOC_BFIN_LSHIFT
3393 ADI Blackfin arithmetic relocation.
3395 BFD_ARELOC_BFIN_RSHIFT
3397 ADI Blackfin arithmetic relocation.
3401 ADI Blackfin arithmetic relocation.
3405 ADI Blackfin arithmetic relocation.
3409 ADI Blackfin arithmetic relocation.
3411 BFD_ARELOC_BFIN_LAND
3413 ADI Blackfin arithmetic relocation.
3417 ADI Blackfin arithmetic relocation.
3421 ADI Blackfin arithmetic relocation.
3425 ADI Blackfin arithmetic relocation.
3427 BFD_ARELOC_BFIN_COMP
3429 ADI Blackfin arithmetic relocation.
3431 BFD_ARELOC_BFIN_PAGE
3433 ADI Blackfin arithmetic relocation.
3435 BFD_ARELOC_BFIN_HWPAGE
3437 ADI Blackfin arithmetic relocation.
3439 BFD_ARELOC_BFIN_ADDR
3441 ADI Blackfin arithmetic relocation.
3444 BFD_RELOC_D10V_10_PCREL_R
3446 Mitsubishi D10V relocs.
3447 This is a 10-bit reloc with the right 2 bits
3450 BFD_RELOC_D10V_10_PCREL_L
3452 Mitsubishi D10V relocs.
3453 This is a 10-bit reloc with the right 2 bits
3454 assumed to be 0. This is the same as the previous reloc
3455 except it is in the left container, i.e.,
3456 shifted left 15 bits.
3460 This is an 18-bit reloc with the right 2 bits
3463 BFD_RELOC_D10V_18_PCREL
3465 This is an 18-bit reloc with the right 2 bits
3471 Mitsubishi D30V relocs.
3472 This is a 6-bit absolute reloc.
3474 BFD_RELOC_D30V_9_PCREL
3476 This is a 6-bit pc-relative reloc with
3477 the right 3 bits assumed to be 0.
3479 BFD_RELOC_D30V_9_PCREL_R
3481 This is a 6-bit pc-relative reloc with
3482 the right 3 bits assumed to be 0. Same
3483 as the previous reloc but on the right side
3488 This is a 12-bit absolute reloc with the
3489 right 3 bitsassumed to be 0.
3491 BFD_RELOC_D30V_15_PCREL
3493 This is a 12-bit pc-relative reloc with
3494 the right 3 bits assumed to be 0.
3496 BFD_RELOC_D30V_15_PCREL_R
3498 This is a 12-bit pc-relative reloc with
3499 the right 3 bits assumed to be 0. Same
3500 as the previous reloc but on the right side
3505 This is an 18-bit absolute reloc with
3506 the right 3 bits assumed to be 0.
3508 BFD_RELOC_D30V_21_PCREL
3510 This is an 18-bit pc-relative reloc with
3511 the right 3 bits assumed to be 0.
3513 BFD_RELOC_D30V_21_PCREL_R
3515 This is an 18-bit pc-relative reloc with
3516 the right 3 bits assumed to be 0. Same
3517 as the previous reloc but on the right side
3522 This is a 32-bit absolute reloc.
3524 BFD_RELOC_D30V_32_PCREL
3526 This is a 32-bit pc-relative reloc.
3529 BFD_RELOC_DLX_HI16_S
3544 BFD_RELOC_M32C_RL_JUMP
3546 BFD_RELOC_M32C_RL_1ADDR
3548 BFD_RELOC_M32C_RL_2ADDR
3550 Renesas M16C/M32C Relocations.
3555 Renesas M32R (formerly Mitsubishi M32R) relocs.
3556 This is a 24 bit absolute address.
3558 BFD_RELOC_M32R_10_PCREL
3560 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3562 BFD_RELOC_M32R_18_PCREL
3564 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3566 BFD_RELOC_M32R_26_PCREL
3568 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3570 BFD_RELOC_M32R_HI16_ULO
3572 This is a 16-bit reloc containing the high 16 bits of an address
3573 used when the lower 16 bits are treated as unsigned.
3575 BFD_RELOC_M32R_HI16_SLO
3577 This is a 16-bit reloc containing the high 16 bits of an address
3578 used when the lower 16 bits are treated as signed.
3582 This is a 16-bit reloc containing the lower 16 bits of an address.
3584 BFD_RELOC_M32R_SDA16
3586 This is a 16-bit reloc containing the small data area offset for use in
3587 add3, load, and store instructions.
3589 BFD_RELOC_M32R_GOT24
3591 BFD_RELOC_M32R_26_PLTREL
3595 BFD_RELOC_M32R_GLOB_DAT
3597 BFD_RELOC_M32R_JMP_SLOT
3599 BFD_RELOC_M32R_RELATIVE
3601 BFD_RELOC_M32R_GOTOFF
3603 BFD_RELOC_M32R_GOTOFF_HI_ULO
3605 BFD_RELOC_M32R_GOTOFF_HI_SLO
3607 BFD_RELOC_M32R_GOTOFF_LO
3609 BFD_RELOC_M32R_GOTPC24
3611 BFD_RELOC_M32R_GOT16_HI_ULO
3613 BFD_RELOC_M32R_GOT16_HI_SLO
3615 BFD_RELOC_M32R_GOT16_LO
3617 BFD_RELOC_M32R_GOTPC_HI_ULO
3619 BFD_RELOC_M32R_GOTPC_HI_SLO
3621 BFD_RELOC_M32R_GOTPC_LO
3627 BFD_RELOC_V850_9_PCREL
3629 This is a 9-bit reloc
3631 BFD_RELOC_V850_22_PCREL
3633 This is a 22-bit reloc
3636 BFD_RELOC_V850_SDA_16_16_OFFSET
3638 This is a 16 bit offset from the short data area pointer.
3640 BFD_RELOC_V850_SDA_15_16_OFFSET
3642 This is a 16 bit offset (of which only 15 bits are used) from the
3643 short data area pointer.
3645 BFD_RELOC_V850_ZDA_16_16_OFFSET
3647 This is a 16 bit offset from the zero data area pointer.
3649 BFD_RELOC_V850_ZDA_15_16_OFFSET
3651 This is a 16 bit offset (of which only 15 bits are used) from the
3652 zero data area pointer.
3654 BFD_RELOC_V850_TDA_6_8_OFFSET
3656 This is an 8 bit offset (of which only 6 bits are used) from the
3657 tiny data area pointer.
3659 BFD_RELOC_V850_TDA_7_8_OFFSET
3661 This is an 8bit offset (of which only 7 bits are used) from the tiny
3664 BFD_RELOC_V850_TDA_7_7_OFFSET
3666 This is a 7 bit offset from the tiny data area pointer.
3668 BFD_RELOC_V850_TDA_16_16_OFFSET
3670 This is a 16 bit offset from the tiny data area pointer.
3673 BFD_RELOC_V850_TDA_4_5_OFFSET
3675 This is a 5 bit offset (of which only 4 bits are used) from the tiny
3678 BFD_RELOC_V850_TDA_4_4_OFFSET
3680 This is a 4 bit offset from the tiny data area pointer.
3682 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
3684 This is a 16 bit offset from the short data area pointer, with the
3685 bits placed non-contiguously in the instruction.
3687 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
3689 This is a 16 bit offset from the zero data area pointer, with the
3690 bits placed non-contiguously in the instruction.
3692 BFD_RELOC_V850_CALLT_6_7_OFFSET
3694 This is a 6 bit offset from the call table base pointer.
3696 BFD_RELOC_V850_CALLT_16_16_OFFSET
3698 This is a 16 bit offset from the call table base pointer.
3700 BFD_RELOC_V850_LONGCALL
3702 Used for relaxing indirect function calls.
3704 BFD_RELOC_V850_LONGJUMP
3706 Used for relaxing indirect jumps.
3708 BFD_RELOC_V850_ALIGN
3710 Used to maintain alignment whilst relaxing.
3712 BFD_RELOC_V850_LO16_SPLIT_OFFSET
3714 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
3717 BFD_RELOC_MN10300_32_PCREL
3719 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3722 BFD_RELOC_MN10300_16_PCREL
3724 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3730 This is a 8bit DP reloc for the tms320c30, where the most
3731 significant 8 bits of a 24 bit word are placed into the least
3732 significant 8 bits of the opcode.
3735 BFD_RELOC_TIC54X_PARTLS7
3737 This is a 7bit reloc for the tms320c54x, where the least
3738 significant 7 bits of a 16 bit word are placed into the least
3739 significant 7 bits of the opcode.
3742 BFD_RELOC_TIC54X_PARTMS9
3744 This is a 9bit DP reloc for the tms320c54x, where the most
3745 significant 9 bits of a 16 bit word are placed into the least
3746 significant 9 bits of the opcode.
3751 This is an extended address 23-bit reloc for the tms320c54x.
3754 BFD_RELOC_TIC54X_16_OF_23
3756 This is a 16-bit reloc for the tms320c54x, where the least
3757 significant 16 bits of a 23-bit extended address are placed into
3761 BFD_RELOC_TIC54X_MS7_OF_23
3763 This is a reloc for the tms320c54x, where the most
3764 significant 7 bits of a 23-bit extended address are placed into
3770 This is a 48 bit reloc for the FR30 that stores 32 bits.
3774 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3777 BFD_RELOC_FR30_6_IN_4
3779 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3782 BFD_RELOC_FR30_8_IN_8
3784 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3787 BFD_RELOC_FR30_9_IN_8
3789 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3792 BFD_RELOC_FR30_10_IN_8
3794 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3797 BFD_RELOC_FR30_9_PCREL
3799 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3800 short offset into 8 bits.
3802 BFD_RELOC_FR30_12_PCREL
3804 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3805 short offset into 11 bits.
3808 BFD_RELOC_MCORE_PCREL_IMM8BY4
3810 BFD_RELOC_MCORE_PCREL_IMM11BY2
3812 BFD_RELOC_MCORE_PCREL_IMM4BY2
3814 BFD_RELOC_MCORE_PCREL_32
3816 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3820 Motorola Mcore relocations.
3829 BFD_RELOC_MEP_PCREL8A2
3831 BFD_RELOC_MEP_PCREL12A2
3833 BFD_RELOC_MEP_PCREL17A2
3835 BFD_RELOC_MEP_PCREL24A2
3837 BFD_RELOC_MEP_PCABS24A2
3849 BFD_RELOC_MEP_TPREL7
3851 BFD_RELOC_MEP_TPREL7A2
3853 BFD_RELOC_MEP_TPREL7A4
3855 BFD_RELOC_MEP_UIMM24
3857 BFD_RELOC_MEP_ADDR24A4
3859 BFD_RELOC_MEP_GNU_VTINHERIT
3861 BFD_RELOC_MEP_GNU_VTENTRY
3863 Toshiba Media Processor Relocations.
3869 BFD_RELOC_MMIX_GETA_1
3871 BFD_RELOC_MMIX_GETA_2
3873 BFD_RELOC_MMIX_GETA_3
3875 These are relocations for the GETA instruction.
3877 BFD_RELOC_MMIX_CBRANCH
3879 BFD_RELOC_MMIX_CBRANCH_J
3881 BFD_RELOC_MMIX_CBRANCH_1
3883 BFD_RELOC_MMIX_CBRANCH_2
3885 BFD_RELOC_MMIX_CBRANCH_3
3887 These are relocations for a conditional branch instruction.
3889 BFD_RELOC_MMIX_PUSHJ
3891 BFD_RELOC_MMIX_PUSHJ_1
3893 BFD_RELOC_MMIX_PUSHJ_2
3895 BFD_RELOC_MMIX_PUSHJ_3
3897 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
3899 These are relocations for the PUSHJ instruction.
3903 BFD_RELOC_MMIX_JMP_1
3905 BFD_RELOC_MMIX_JMP_2
3907 BFD_RELOC_MMIX_JMP_3
3909 These are relocations for the JMP instruction.
3911 BFD_RELOC_MMIX_ADDR19
3913 This is a relocation for a relative address as in a GETA instruction or
3916 BFD_RELOC_MMIX_ADDR27
3918 This is a relocation for a relative address as in a JMP instruction.
3920 BFD_RELOC_MMIX_REG_OR_BYTE
3922 This is a relocation for an instruction field that may be a general
3923 register or a value 0..255.
3927 This is a relocation for an instruction field that may be a general
3930 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3932 This is a relocation for two instruction fields holding a register and
3933 an offset, the equivalent of the relocation.
3935 BFD_RELOC_MMIX_LOCAL
3937 This relocation is an assertion that the expression is not allocated as
3938 a global register. It does not modify contents.
3941 BFD_RELOC_AVR_7_PCREL
3943 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3944 short offset into 7 bits.
3946 BFD_RELOC_AVR_13_PCREL
3948 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3949 short offset into 12 bits.
3953 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3954 program memory address) into 16 bits.
3956 BFD_RELOC_AVR_LO8_LDI
3958 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3959 data memory address) into 8 bit immediate value of LDI insn.
3961 BFD_RELOC_AVR_HI8_LDI
3963 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3964 of data memory address) into 8 bit immediate value of LDI insn.
3966 BFD_RELOC_AVR_HH8_LDI
3968 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3969 of program memory address) into 8 bit immediate value of LDI insn.
3971 BFD_RELOC_AVR_MS8_LDI
3973 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3974 of 32 bit value) into 8 bit immediate value of LDI insn.
3976 BFD_RELOC_AVR_LO8_LDI_NEG
3978 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3979 (usually data memory address) into 8 bit immediate value of SUBI insn.
3981 BFD_RELOC_AVR_HI8_LDI_NEG
3983 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3984 (high 8 bit of data memory address) into 8 bit immediate value of
3987 BFD_RELOC_AVR_HH8_LDI_NEG
3989 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3990 (most high 8 bit of program memory address) into 8 bit immediate value
3991 of LDI or SUBI insn.
3993 BFD_RELOC_AVR_MS8_LDI_NEG
3995 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
3996 of 32 bit value) into 8 bit immediate value of LDI insn.
3998 BFD_RELOC_AVR_LO8_LDI_PM
4000 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4001 command address) into 8 bit immediate value of LDI insn.
4003 BFD_RELOC_AVR_LO8_LDI_GS
4005 This is a 16 bit reloc for the AVR that stores 8 bit value
4006 (command address) into 8 bit immediate value of LDI insn. If the address
4007 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4010 BFD_RELOC_AVR_HI8_LDI_PM
4012 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4013 of command address) into 8 bit immediate value of LDI insn.
4015 BFD_RELOC_AVR_HI8_LDI_GS
4017 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4018 of command address) into 8 bit immediate value of LDI insn. If the address
4019 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4022 BFD_RELOC_AVR_HH8_LDI_PM
4024 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4025 of command address) into 8 bit immediate value of LDI insn.
4027 BFD_RELOC_AVR_LO8_LDI_PM_NEG
4029 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4030 (usually command address) into 8 bit immediate value of SUBI insn.
4032 BFD_RELOC_AVR_HI8_LDI_PM_NEG
4034 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4035 (high 8 bit of 16 bit command address) into 8 bit immediate value
4038 BFD_RELOC_AVR_HH8_LDI_PM_NEG
4040 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4041 (high 6 bit of 22 bit command address) into 8 bit immediate
4046 This is a 32 bit reloc for the AVR that stores 23 bit value
4051 This is a 16 bit reloc for the AVR that stores all needed bits
4052 for absolute addressing with ldi with overflow check to linktime
4056 This is a 6 bit reloc for the AVR that stores offset for ldd/std
4059 BFD_RELOC_AVR_6_ADIW
4061 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
4085 BFD_RELOC_RX_DIR3U_PCREL
4097 BFD_RELOC_RX_OP_SUBTRACT
4107 BFD_RELOC_RX_ABS16UW
4109 BFD_RELOC_RX_ABS16UL
4113 Renesas RX Relocations.
4126 32 bit PC relative PLT address.
4130 Copy symbol at runtime.
4132 BFD_RELOC_390_GLOB_DAT
4136 BFD_RELOC_390_JMP_SLOT
4140 BFD_RELOC_390_RELATIVE
4142 Adjust by program base.
4146 32 bit PC relative offset to GOT.
4152 BFD_RELOC_390_PC16DBL
4154 PC relative 16 bit shifted by 1.
4156 BFD_RELOC_390_PLT16DBL
4158 16 bit PC rel. PLT shifted by 1.
4160 BFD_RELOC_390_PC32DBL
4162 PC relative 32 bit shifted by 1.
4164 BFD_RELOC_390_PLT32DBL
4166 32 bit PC rel. PLT shifted by 1.
4168 BFD_RELOC_390_GOTPCDBL
4170 32 bit PC rel. GOT shifted by 1.
4178 64 bit PC relative PLT address.
4180 BFD_RELOC_390_GOTENT
4182 32 bit rel. offset to GOT entry.
4184 BFD_RELOC_390_GOTOFF64
4186 64 bit offset to GOT.
4188 BFD_RELOC_390_GOTPLT12
4190 12-bit offset to symbol-entry within GOT, with PLT handling.
4192 BFD_RELOC_390_GOTPLT16
4194 16-bit offset to symbol-entry within GOT, with PLT handling.
4196 BFD_RELOC_390_GOTPLT32
4198 32-bit offset to symbol-entry within GOT, with PLT handling.
4200 BFD_RELOC_390_GOTPLT64
4202 64-bit offset to symbol-entry within GOT, with PLT handling.
4204 BFD_RELOC_390_GOTPLTENT
4206 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
4208 BFD_RELOC_390_PLTOFF16
4210 16-bit rel. offset from the GOT to a PLT entry.
4212 BFD_RELOC_390_PLTOFF32
4214 32-bit rel. offset from the GOT to a PLT entry.
4216 BFD_RELOC_390_PLTOFF64
4218 64-bit rel. offset from the GOT to a PLT entry.
4221 BFD_RELOC_390_TLS_LOAD
4223 BFD_RELOC_390_TLS_GDCALL
4225 BFD_RELOC_390_TLS_LDCALL
4227 BFD_RELOC_390_TLS_GD32
4229 BFD_RELOC_390_TLS_GD64
4231 BFD_RELOC_390_TLS_GOTIE12
4233 BFD_RELOC_390_TLS_GOTIE32
4235 BFD_RELOC_390_TLS_GOTIE64
4237 BFD_RELOC_390_TLS_LDM32
4239 BFD_RELOC_390_TLS_LDM64
4241 BFD_RELOC_390_TLS_IE32
4243 BFD_RELOC_390_TLS_IE64
4245 BFD_RELOC_390_TLS_IEENT
4247 BFD_RELOC_390_TLS_LE32
4249 BFD_RELOC_390_TLS_LE64
4251 BFD_RELOC_390_TLS_LDO32
4253 BFD_RELOC_390_TLS_LDO64
4255 BFD_RELOC_390_TLS_DTPMOD
4257 BFD_RELOC_390_TLS_DTPOFF
4259 BFD_RELOC_390_TLS_TPOFF
4261 s390 tls relocations.
4268 BFD_RELOC_390_GOTPLT20
4270 BFD_RELOC_390_TLS_GOTIE20
4272 Long displacement extension.
4275 BFD_RELOC_SCORE_GPREL15
4278 Low 16 bit for load/store
4280 BFD_RELOC_SCORE_DUMMY2
4284 This is a 24-bit reloc with the right 1 bit assumed to be 0
4286 BFD_RELOC_SCORE_BRANCH
4288 This is a 19-bit reloc with the right 1 bit assumed to be 0
4290 BFD_RELOC_SCORE_IMM30
4292 This is a 32-bit reloc for 48-bit instructions.
4294 BFD_RELOC_SCORE_IMM32
4296 This is a 32-bit reloc for 48-bit instructions.
4298 BFD_RELOC_SCORE16_JMP
4300 This is a 11-bit reloc with the right 1 bit assumed to be 0
4302 BFD_RELOC_SCORE16_BRANCH
4304 This is a 8-bit reloc with the right 1 bit assumed to be 0
4306 BFD_RELOC_SCORE_BCMP
4308 This is a 9-bit reloc with the right 1 bit assumed to be 0
4310 BFD_RELOC_SCORE_GOT15
4312 BFD_RELOC_SCORE_GOT_LO16
4314 BFD_RELOC_SCORE_CALL15
4316 BFD_RELOC_SCORE_DUMMY_HI16
4318 Undocumented Score relocs
4323 Scenix IP2K - 9-bit register number / data address
4327 Scenix IP2K - 4-bit register/data bank number
4329 BFD_RELOC_IP2K_ADDR16CJP
4331 Scenix IP2K - low 13 bits of instruction word address
4333 BFD_RELOC_IP2K_PAGE3
4335 Scenix IP2K - high 3 bits of instruction word address
4337 BFD_RELOC_IP2K_LO8DATA
4339 BFD_RELOC_IP2K_HI8DATA
4341 BFD_RELOC_IP2K_EX8DATA
4343 Scenix IP2K - ext/low/high 8 bits of data address
4345 BFD_RELOC_IP2K_LO8INSN
4347 BFD_RELOC_IP2K_HI8INSN
4349 Scenix IP2K - low/high 8 bits of instruction word address
4351 BFD_RELOC_IP2K_PC_SKIP
4353 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
4357 Scenix IP2K - 16 bit word address in text section.
4359 BFD_RELOC_IP2K_FR_OFFSET
4361 Scenix IP2K - 7-bit sp or dp offset
4363 BFD_RELOC_VPE4KMATH_DATA
4365 BFD_RELOC_VPE4KMATH_INSN
4367 Scenix VPE4K coprocessor - data/insn-space addressing
4370 BFD_RELOC_VTABLE_INHERIT
4372 BFD_RELOC_VTABLE_ENTRY
4374 These two relocations are used by the linker to determine which of
4375 the entries in a C++ virtual function table are actually used. When
4376 the --gc-sections option is given, the linker will zero out the entries
4377 that are not used, so that the code for those functions need not be
4378 included in the output.
4380 VTABLE_INHERIT is a zero-space relocation used to describe to the
4381 linker the inheritance tree of a C++ virtual function table. The
4382 relocation's symbol should be the parent class' vtable, and the
4383 relocation should be located at the child vtable.
4385 VTABLE_ENTRY is a zero-space relocation that describes the use of a
4386 virtual function table entry. The reloc's symbol should refer to the
4387 table of the class mentioned in the code. Off of that base, an offset
4388 describes the entry that is being used. For Rela hosts, this offset
4389 is stored in the reloc's addend. For Rel hosts, we are forced to put
4390 this offset in the reloc's section offset.
4393 BFD_RELOC_IA64_IMM14
4395 BFD_RELOC_IA64_IMM22
4397 BFD_RELOC_IA64_IMM64
4399 BFD_RELOC_IA64_DIR32MSB
4401 BFD_RELOC_IA64_DIR32LSB
4403 BFD_RELOC_IA64_DIR64MSB
4405 BFD_RELOC_IA64_DIR64LSB
4407 BFD_RELOC_IA64_GPREL22
4409 BFD_RELOC_IA64_GPREL64I
4411 BFD_RELOC_IA64_GPREL32MSB
4413 BFD_RELOC_IA64_GPREL32LSB
4415 BFD_RELOC_IA64_GPREL64MSB
4417 BFD_RELOC_IA64_GPREL64LSB
4419 BFD_RELOC_IA64_LTOFF22
4421 BFD_RELOC_IA64_LTOFF64I
4423 BFD_RELOC_IA64_PLTOFF22
4425 BFD_RELOC_IA64_PLTOFF64I
4427 BFD_RELOC_IA64_PLTOFF64MSB
4429 BFD_RELOC_IA64_PLTOFF64LSB
4431 BFD_RELOC_IA64_FPTR64I
4433 BFD_RELOC_IA64_FPTR32MSB
4435 BFD_RELOC_IA64_FPTR32LSB
4437 BFD_RELOC_IA64_FPTR64MSB
4439 BFD_RELOC_IA64_FPTR64LSB
4441 BFD_RELOC_IA64_PCREL21B
4443 BFD_RELOC_IA64_PCREL21BI
4445 BFD_RELOC_IA64_PCREL21M
4447 BFD_RELOC_IA64_PCREL21F
4449 BFD_RELOC_IA64_PCREL22
4451 BFD_RELOC_IA64_PCREL60B
4453 BFD_RELOC_IA64_PCREL64I
4455 BFD_RELOC_IA64_PCREL32MSB
4457 BFD_RELOC_IA64_PCREL32LSB
4459 BFD_RELOC_IA64_PCREL64MSB
4461 BFD_RELOC_IA64_PCREL64LSB
4463 BFD_RELOC_IA64_LTOFF_FPTR22
4465 BFD_RELOC_IA64_LTOFF_FPTR64I
4467 BFD_RELOC_IA64_LTOFF_FPTR32MSB
4469 BFD_RELOC_IA64_LTOFF_FPTR32LSB
4471 BFD_RELOC_IA64_LTOFF_FPTR64MSB
4473 BFD_RELOC_IA64_LTOFF_FPTR64LSB
4475 BFD_RELOC_IA64_SEGREL32MSB
4477 BFD_RELOC_IA64_SEGREL32LSB
4479 BFD_RELOC_IA64_SEGREL64MSB
4481 BFD_RELOC_IA64_SEGREL64LSB
4483 BFD_RELOC_IA64_SECREL32MSB
4485 BFD_RELOC_IA64_SECREL32LSB
4487 BFD_RELOC_IA64_SECREL64MSB
4489 BFD_RELOC_IA64_SECREL64LSB
4491 BFD_RELOC_IA64_REL32MSB
4493 BFD_RELOC_IA64_REL32LSB
4495 BFD_RELOC_IA64_REL64MSB
4497 BFD_RELOC_IA64_REL64LSB
4499 BFD_RELOC_IA64_LTV32MSB
4501 BFD_RELOC_IA64_LTV32LSB
4503 BFD_RELOC_IA64_LTV64MSB
4505 BFD_RELOC_IA64_LTV64LSB
4507 BFD_RELOC_IA64_IPLTMSB
4509 BFD_RELOC_IA64_IPLTLSB
4513 BFD_RELOC_IA64_LTOFF22X
4515 BFD_RELOC_IA64_LDXMOV
4517 BFD_RELOC_IA64_TPREL14
4519 BFD_RELOC_IA64_TPREL22
4521 BFD_RELOC_IA64_TPREL64I
4523 BFD_RELOC_IA64_TPREL64MSB
4525 BFD_RELOC_IA64_TPREL64LSB
4527 BFD_RELOC_IA64_LTOFF_TPREL22
4529 BFD_RELOC_IA64_DTPMOD64MSB
4531 BFD_RELOC_IA64_DTPMOD64LSB
4533 BFD_RELOC_IA64_LTOFF_DTPMOD22
4535 BFD_RELOC_IA64_DTPREL14
4537 BFD_RELOC_IA64_DTPREL22
4539 BFD_RELOC_IA64_DTPREL64I
4541 BFD_RELOC_IA64_DTPREL32MSB
4543 BFD_RELOC_IA64_DTPREL32LSB
4545 BFD_RELOC_IA64_DTPREL64MSB
4547 BFD_RELOC_IA64_DTPREL64LSB
4549 BFD_RELOC_IA64_LTOFF_DTPREL22
4551 Intel IA64 Relocations.
4554 BFD_RELOC_M68HC11_HI8
4556 Motorola 68HC11 reloc.
4557 This is the 8 bit high part of an absolute address.
4559 BFD_RELOC_M68HC11_LO8
4561 Motorola 68HC11 reloc.
4562 This is the 8 bit low part of an absolute address.
4564 BFD_RELOC_M68HC11_3B
4566 Motorola 68HC11 reloc.
4567 This is the 3 bit of a value.
4569 BFD_RELOC_M68HC11_RL_JUMP
4571 Motorola 68HC11 reloc.
4572 This reloc marks the beginning of a jump/call instruction.
4573 It is used for linker relaxation to correctly identify beginning
4574 of instruction and change some branches to use PC-relative
4577 BFD_RELOC_M68HC11_RL_GROUP
4579 Motorola 68HC11 reloc.
4580 This reloc marks a group of several instructions that gcc generates
4581 and for which the linker relaxation pass can modify and/or remove
4584 BFD_RELOC_M68HC11_LO16
4586 Motorola 68HC11 reloc.
4587 This is the 16-bit lower part of an address. It is used for 'call'
4588 instruction to specify the symbol address without any special
4589 transformation (due to memory bank window).
4591 BFD_RELOC_M68HC11_PAGE
4593 Motorola 68HC11 reloc.
4594 This is a 8-bit reloc that specifies the page number of an address.
4595 It is used by 'call' instruction to specify the page number of
4598 BFD_RELOC_M68HC11_24
4600 Motorola 68HC11 reloc.
4601 This is a 24-bit reloc that represents the address with a 16-bit
4602 value and a 8-bit page number. The symbol address is transformed
4603 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
4605 BFD_RELOC_M68HC12_5B
4607 Motorola 68HC12 reloc.
4608 This is the 5 bits of a value.
4613 BFD_RELOC_16C_NUM08_C
4617 BFD_RELOC_16C_NUM16_C
4621 BFD_RELOC_16C_NUM32_C
4623 BFD_RELOC_16C_DISP04
4625 BFD_RELOC_16C_DISP04_C
4627 BFD_RELOC_16C_DISP08
4629 BFD_RELOC_16C_DISP08_C
4631 BFD_RELOC_16C_DISP16
4633 BFD_RELOC_16C_DISP16_C
4635 BFD_RELOC_16C_DISP24
4637 BFD_RELOC_16C_DISP24_C
4639 BFD_RELOC_16C_DISP24a
4641 BFD_RELOC_16C_DISP24a_C
4645 BFD_RELOC_16C_REG04_C
4647 BFD_RELOC_16C_REG04a
4649 BFD_RELOC_16C_REG04a_C
4653 BFD_RELOC_16C_REG14_C
4657 BFD_RELOC_16C_REG16_C
4661 BFD_RELOC_16C_REG20_C
4665 BFD_RELOC_16C_ABS20_C
4669 BFD_RELOC_16C_ABS24_C
4673 BFD_RELOC_16C_IMM04_C
4677 BFD_RELOC_16C_IMM16_C
4681 BFD_RELOC_16C_IMM20_C
4685 BFD_RELOC_16C_IMM24_C
4689 BFD_RELOC_16C_IMM32_C
4691 NS CR16C Relocations.
4696 BFD_RELOC_CR16_NUM16
4698 BFD_RELOC_CR16_NUM32
4700 BFD_RELOC_CR16_NUM32a
4702 BFD_RELOC_CR16_REGREL0
4704 BFD_RELOC_CR16_REGREL4
4706 BFD_RELOC_CR16_REGREL4a
4708 BFD_RELOC_CR16_REGREL14
4710 BFD_RELOC_CR16_REGREL14a
4712 BFD_RELOC_CR16_REGREL16
4714 BFD_RELOC_CR16_REGREL20
4716 BFD_RELOC_CR16_REGREL20a
4718 BFD_RELOC_CR16_ABS20
4720 BFD_RELOC_CR16_ABS24
4726 BFD_RELOC_CR16_IMM16
4728 BFD_RELOC_CR16_IMM20
4730 BFD_RELOC_CR16_IMM24
4732 BFD_RELOC_CR16_IMM32
4734 BFD_RELOC_CR16_IMM32a
4736 BFD_RELOC_CR16_DISP4
4738 BFD_RELOC_CR16_DISP8
4740 BFD_RELOC_CR16_DISP16
4742 BFD_RELOC_CR16_DISP20
4744 BFD_RELOC_CR16_DISP24
4746 BFD_RELOC_CR16_DISP24a
4748 BFD_RELOC_CR16_SWITCH8
4750 BFD_RELOC_CR16_SWITCH16
4752 BFD_RELOC_CR16_SWITCH32
4754 BFD_RELOC_CR16_GOT_REGREL20
4756 BFD_RELOC_CR16_GOTC_REGREL20
4758 BFD_RELOC_CR16_GLOB_DAT
4760 NS CR16 Relocations.
4767 BFD_RELOC_CRX_REL8_CMP
4775 BFD_RELOC_CRX_REGREL12
4777 BFD_RELOC_CRX_REGREL22
4779 BFD_RELOC_CRX_REGREL28
4781 BFD_RELOC_CRX_REGREL32
4797 BFD_RELOC_CRX_SWITCH8
4799 BFD_RELOC_CRX_SWITCH16
4801 BFD_RELOC_CRX_SWITCH32
4806 BFD_RELOC_CRIS_BDISP8
4808 BFD_RELOC_CRIS_UNSIGNED_5
4810 BFD_RELOC_CRIS_SIGNED_6
4812 BFD_RELOC_CRIS_UNSIGNED_6
4814 BFD_RELOC_CRIS_SIGNED_8
4816 BFD_RELOC_CRIS_UNSIGNED_8
4818 BFD_RELOC_CRIS_SIGNED_16
4820 BFD_RELOC_CRIS_UNSIGNED_16
4822 BFD_RELOC_CRIS_LAPCQ_OFFSET
4824 BFD_RELOC_CRIS_UNSIGNED_4
4826 These relocs are only used within the CRIS assembler. They are not
4827 (at present) written to any object files.
4831 BFD_RELOC_CRIS_GLOB_DAT
4833 BFD_RELOC_CRIS_JUMP_SLOT
4835 BFD_RELOC_CRIS_RELATIVE
4837 Relocs used in ELF shared libraries for CRIS.
4839 BFD_RELOC_CRIS_32_GOT
4841 32-bit offset to symbol-entry within GOT.
4843 BFD_RELOC_CRIS_16_GOT
4845 16-bit offset to symbol-entry within GOT.
4847 BFD_RELOC_CRIS_32_GOTPLT
4849 32-bit offset to symbol-entry within GOT, with PLT handling.
4851 BFD_RELOC_CRIS_16_GOTPLT
4853 16-bit offset to symbol-entry within GOT, with PLT handling.
4855 BFD_RELOC_CRIS_32_GOTREL
4857 32-bit offset to symbol, relative to GOT.
4859 BFD_RELOC_CRIS_32_PLT_GOTREL
4861 32-bit offset to symbol with PLT entry, relative to GOT.
4863 BFD_RELOC_CRIS_32_PLT_PCREL
4865 32-bit offset to symbol with PLT entry, relative to this relocation.
4868 BFD_RELOC_CRIS_32_GOT_GD
4870 BFD_RELOC_CRIS_16_GOT_GD
4872 BFD_RELOC_CRIS_32_GD
4876 BFD_RELOC_CRIS_32_DTPREL
4878 BFD_RELOC_CRIS_16_DTPREL
4880 BFD_RELOC_CRIS_32_GOT_TPREL
4882 BFD_RELOC_CRIS_16_GOT_TPREL
4884 BFD_RELOC_CRIS_32_TPREL
4886 BFD_RELOC_CRIS_16_TPREL
4888 BFD_RELOC_CRIS_DTPMOD
4890 BFD_RELOC_CRIS_32_IE
4892 Relocs used in TLS code for CRIS.
4897 BFD_RELOC_860_GLOB_DAT
4899 BFD_RELOC_860_JUMP_SLOT
4901 BFD_RELOC_860_RELATIVE
4911 BFD_RELOC_860_SPLIT0
4915 BFD_RELOC_860_SPLIT1
4919 BFD_RELOC_860_SPLIT2
4923 BFD_RELOC_860_LOGOT0
4925 BFD_RELOC_860_SPGOT0
4927 BFD_RELOC_860_LOGOT1
4929 BFD_RELOC_860_SPGOT1
4931 BFD_RELOC_860_LOGOTOFF0
4933 BFD_RELOC_860_SPGOTOFF0
4935 BFD_RELOC_860_LOGOTOFF1
4937 BFD_RELOC_860_SPGOTOFF1
4939 BFD_RELOC_860_LOGOTOFF2
4941 BFD_RELOC_860_LOGOTOFF3
4945 BFD_RELOC_860_HIGHADJ
4949 BFD_RELOC_860_HAGOTOFF
4957 BFD_RELOC_860_HIGOTOFF
4959 Intel i860 Relocations.
4962 BFD_RELOC_OPENRISC_ABS_26
4964 BFD_RELOC_OPENRISC_REL_26
4966 OpenRISC Relocations.
4969 BFD_RELOC_H8_DIR16A8
4971 BFD_RELOC_H8_DIR16R8
4973 BFD_RELOC_H8_DIR24A8
4975 BFD_RELOC_H8_DIR24R8
4977 BFD_RELOC_H8_DIR32A16
4982 BFD_RELOC_XSTORMY16_REL_12
4984 BFD_RELOC_XSTORMY16_12
4986 BFD_RELOC_XSTORMY16_24
4988 BFD_RELOC_XSTORMY16_FPTR16
4990 Sony Xstormy16 Relocations.
4995 Self-describing complex relocations.
5007 Infineon Relocations.
5010 BFD_RELOC_VAX_GLOB_DAT
5012 BFD_RELOC_VAX_JMP_SLOT
5014 BFD_RELOC_VAX_RELATIVE
5016 Relocations used by VAX ELF.
5021 Morpho MT - 16 bit immediate relocation.
5025 Morpho MT - Hi 16 bits of an address.
5029 Morpho MT - Low 16 bits of an address.
5031 BFD_RELOC_MT_GNU_VTINHERIT
5033 Morpho MT - Used to tell the linker which vtable entries are used.
5035 BFD_RELOC_MT_GNU_VTENTRY
5037 Morpho MT - Used to tell the linker which vtable entries are used.
5039 BFD_RELOC_MT_PCINSN8
5041 Morpho MT - 8 bit immediate relocation.
5044 BFD_RELOC_MSP430_10_PCREL
5046 BFD_RELOC_MSP430_16_PCREL
5050 BFD_RELOC_MSP430_16_PCREL_BYTE
5052 BFD_RELOC_MSP430_16_BYTE
5054 BFD_RELOC_MSP430_2X_PCREL
5056 BFD_RELOC_MSP430_RL_PCREL
5058 msp430 specific relocation codes
5061 BFD_RELOC_IQ2000_OFFSET_16
5063 BFD_RELOC_IQ2000_OFFSET_21
5065 BFD_RELOC_IQ2000_UHI16
5070 BFD_RELOC_XTENSA_RTLD
5072 Special Xtensa relocation used only by PLT entries in ELF shared
5073 objects to indicate that the runtime linker should set the value
5074 to one of its own internal functions or data structures.
5076 BFD_RELOC_XTENSA_GLOB_DAT
5078 BFD_RELOC_XTENSA_JMP_SLOT
5080 BFD_RELOC_XTENSA_RELATIVE
5082 Xtensa relocations for ELF shared objects.
5084 BFD_RELOC_XTENSA_PLT
5086 Xtensa relocation used in ELF object files for symbols that may require
5087 PLT entries. Otherwise, this is just a generic 32-bit relocation.
5089 BFD_RELOC_XTENSA_DIFF8
5091 BFD_RELOC_XTENSA_DIFF16
5093 BFD_RELOC_XTENSA_DIFF32
5095 Xtensa relocations to mark the difference of two local symbols.
5096 These are only needed to support linker relaxation and can be ignored
5097 when not relaxing. The field is set to the value of the difference
5098 assuming no relaxation. The relocation encodes the position of the
5099 first symbol so the linker can determine whether to adjust the field
5102 BFD_RELOC_XTENSA_SLOT0_OP
5104 BFD_RELOC_XTENSA_SLOT1_OP
5106 BFD_RELOC_XTENSA_SLOT2_OP
5108 BFD_RELOC_XTENSA_SLOT3_OP
5110 BFD_RELOC_XTENSA_SLOT4_OP
5112 BFD_RELOC_XTENSA_SLOT5_OP
5114 BFD_RELOC_XTENSA_SLOT6_OP
5116 BFD_RELOC_XTENSA_SLOT7_OP
5118 BFD_RELOC_XTENSA_SLOT8_OP
5120 BFD_RELOC_XTENSA_SLOT9_OP
5122 BFD_RELOC_XTENSA_SLOT10_OP
5124 BFD_RELOC_XTENSA_SLOT11_OP
5126 BFD_RELOC_XTENSA_SLOT12_OP
5128 BFD_RELOC_XTENSA_SLOT13_OP
5130 BFD_RELOC_XTENSA_SLOT14_OP
5132 Generic Xtensa relocations for instruction operands. Only the slot
5133 number is encoded in the relocation. The relocation applies to the
5134 last PC-relative immediate operand, or if there are no PC-relative
5135 immediates, to the last immediate operand.
5137 BFD_RELOC_XTENSA_SLOT0_ALT
5139 BFD_RELOC_XTENSA_SLOT1_ALT
5141 BFD_RELOC_XTENSA_SLOT2_ALT
5143 BFD_RELOC_XTENSA_SLOT3_ALT
5145 BFD_RELOC_XTENSA_SLOT4_ALT
5147 BFD_RELOC_XTENSA_SLOT5_ALT
5149 BFD_RELOC_XTENSA_SLOT6_ALT
5151 BFD_RELOC_XTENSA_SLOT7_ALT
5153 BFD_RELOC_XTENSA_SLOT8_ALT
5155 BFD_RELOC_XTENSA_SLOT9_ALT
5157 BFD_RELOC_XTENSA_SLOT10_ALT
5159 BFD_RELOC_XTENSA_SLOT11_ALT
5161 BFD_RELOC_XTENSA_SLOT12_ALT
5163 BFD_RELOC_XTENSA_SLOT13_ALT
5165 BFD_RELOC_XTENSA_SLOT14_ALT
5167 Alternate Xtensa relocations. Only the slot is encoded in the
5168 relocation. The meaning of these relocations is opcode-specific.
5170 BFD_RELOC_XTENSA_OP0
5172 BFD_RELOC_XTENSA_OP1
5174 BFD_RELOC_XTENSA_OP2
5176 Xtensa relocations for backward compatibility. These have all been
5177 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
5179 BFD_RELOC_XTENSA_ASM_EXPAND
5181 Xtensa relocation to mark that the assembler expanded the
5182 instructions from an original target. The expansion size is
5183 encoded in the reloc size.
5185 BFD_RELOC_XTENSA_ASM_SIMPLIFY
5187 Xtensa relocation to mark that the linker should simplify
5188 assembler-expanded instructions. This is commonly used
5189 internally by the linker after analysis of a
5190 BFD_RELOC_XTENSA_ASM_EXPAND.
5192 BFD_RELOC_XTENSA_TLSDESC_FN
5194 BFD_RELOC_XTENSA_TLSDESC_ARG
5196 BFD_RELOC_XTENSA_TLS_DTPOFF
5198 BFD_RELOC_XTENSA_TLS_TPOFF
5200 BFD_RELOC_XTENSA_TLS_FUNC
5202 BFD_RELOC_XTENSA_TLS_ARG
5204 BFD_RELOC_XTENSA_TLS_CALL
5206 Xtensa TLS relocations.
5211 8 bit signed offset in (ix+d) or (iy+d).
5229 BFD_RELOC_LM32_BRANCH
5231 BFD_RELOC_LM32_16_GOT
5233 BFD_RELOC_LM32_GOTOFF_HI16
5235 BFD_RELOC_LM32_GOTOFF_LO16
5239 BFD_RELOC_LM32_GLOB_DAT
5241 BFD_RELOC_LM32_JMP_SLOT
5243 BFD_RELOC_LM32_RELATIVE
5245 Lattice Mico32 relocations.
5248 BFD_RELOC_MACH_O_SECTDIFF
5250 Difference between two section addreses. Must be followed by a
5251 BFD_RELOC_MACH_O_PAIR.
5253 BFD_RELOC_MACH_O_PAIR
5255 Pair of relocation. Contains the first symbol.
5258 BFD_RELOC_MACH_O_X86_64_BRANCH32
5260 BFD_RELOC_MACH_O_X86_64_BRANCH8
5262 PCREL relocations. They are marked as branch to create PLT entry if
5265 BFD_RELOC_MACH_O_X86_64_GOT
5267 Used when referencing a GOT entry.
5269 BFD_RELOC_MACH_O_X86_64_GOT_LOAD
5271 Used when loading a GOT entry with movq. It is specially marked so that
5272 the linker could optimize the movq to a leaq if possible.
5274 BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32
5276 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
5278 BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64
5280 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
5282 BFD_RELOC_MACH_O_X86_64_PCREL32_1
5284 Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
5286 BFD_RELOC_MACH_O_X86_64_PCREL32_2
5288 Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
5290 BFD_RELOC_MACH_O_X86_64_PCREL32_4
5292 Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
5295 BFD_RELOC_MICROBLAZE_32_LO
5297 This is a 32 bit reloc for the microblaze that stores the
5298 low 16 bits of a value
5300 BFD_RELOC_MICROBLAZE_32_LO_PCREL
5302 This is a 32 bit pc-relative reloc for the microblaze that
5303 stores the low 16 bits of a value
5305 BFD_RELOC_MICROBLAZE_32_ROSDA
5307 This is a 32 bit reloc for the microblaze that stores a
5308 value relative to the read-only small data area anchor
5310 BFD_RELOC_MICROBLAZE_32_RWSDA
5312 This is a 32 bit reloc for the microblaze that stores a
5313 value relative to the read-write small data area anchor
5315 BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
5317 This is a 32 bit reloc for the microblaze to handle
5318 expressions of the form "Symbol Op Symbol"
5320 BFD_RELOC_MICROBLAZE_64_NONE
5322 This is a 64 bit reloc that stores the 32 bit pc relative
5323 value in two words (with an imm instruction). No relocation is
5324 done here - only used for relaxing
5326 BFD_RELOC_MICROBLAZE_64_GOTPC
5328 This is a 64 bit reloc that stores the 32 bit pc relative
5329 value in two words (with an imm instruction). The relocation is
5330 PC-relative GOT offset
5332 BFD_RELOC_MICROBLAZE_64_GOT
5334 This is a 64 bit reloc that stores the 32 bit pc relative
5335 value in two words (with an imm instruction). The relocation is
5338 BFD_RELOC_MICROBLAZE_64_PLT
5340 This is a 64 bit reloc that stores the 32 bit pc relative
5341 value in two words (with an imm instruction). The relocation is
5342 PC-relative offset into PLT
5344 BFD_RELOC_MICROBLAZE_64_GOTOFF
5346 This is a 64 bit reloc that stores the 32 bit GOT relative
5347 value in two words (with an imm instruction). The relocation is
5348 relative offset from _GLOBAL_OFFSET_TABLE_
5350 BFD_RELOC_MICROBLAZE_32_GOTOFF
5352 This is a 32 bit reloc that stores the 32 bit GOT relative
5353 value in a word. The relocation is relative offset from
5354 _GLOBAL_OFFSET_TABLE_
5356 BFD_RELOC_MICROBLAZE_COPY
5358 This is used to tell the dynamic linker to copy the value out of
5359 the dynamic object into the runtime process image.
5366 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
5371 bfd_reloc_type_lookup
5372 bfd_reloc_name_lookup
5375 reloc_howto_type *bfd_reloc_type_lookup
5376 (bfd *abfd, bfd_reloc_code_real_type code);
5377 reloc_howto_type *bfd_reloc_name_lookup
5378 (bfd *abfd, const char *reloc_name);
5381 Return a pointer to a howto structure which, when
5382 invoked, will perform the relocation @var{code} on data from the
5388 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
5390 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
5394 bfd_reloc_name_lookup (bfd
*abfd
, const char *reloc_name
)
5396 return BFD_SEND (abfd
, reloc_name_lookup
, (abfd
, reloc_name
));
5399 static reloc_howto_type bfd_howto_32
=
5400 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_dont
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
5404 bfd_default_reloc_type_lookup
5407 reloc_howto_type *bfd_default_reloc_type_lookup
5408 (bfd *abfd, bfd_reloc_code_real_type code);
5411 Provides a default relocation lookup routine for any architecture.
5416 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
5420 case BFD_RELOC_CTOR
:
5421 /* The type of reloc used in a ctor, which will be as wide as the
5422 address - so either a 64, 32, or 16 bitter. */
5423 switch (bfd_get_arch_info (abfd
)->bits_per_address
)
5428 return &bfd_howto_32
;
5442 bfd_get_reloc_code_name
5445 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
5448 Provides a printable name for the supplied relocation code.
5449 Useful mainly for printing error messages.
5453 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
5455 if (code
> BFD_RELOC_UNUSED
)
5457 return bfd_reloc_code_real_names
[code
];
5462 bfd_generic_relax_section
5465 bfd_boolean bfd_generic_relax_section
5468 struct bfd_link_info *,
5472 Provides default handling for relaxing for back ends which
5477 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
5478 asection
*section ATTRIBUTE_UNUSED
,
5479 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
5482 if (link_info
->relocatable
)
5483 (*link_info
->callbacks
->einfo
)
5484 (_("%P%F: --relax and -r may not be used together\n"));
5492 bfd_generic_gc_sections
5495 bfd_boolean bfd_generic_gc_sections
5496 (bfd *, struct bfd_link_info *);
5499 Provides default handling for relaxing for back ends which
5500 don't do section gc -- i.e., does nothing.
5504 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
5505 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
5512 bfd_generic_merge_sections
5515 bfd_boolean bfd_generic_merge_sections
5516 (bfd *, struct bfd_link_info *);
5519 Provides default handling for SEC_MERGE section merging for back ends
5520 which don't have SEC_MERGE support -- i.e., does nothing.
5524 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
5525 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
5532 bfd_generic_get_relocated_section_contents
5535 bfd_byte *bfd_generic_get_relocated_section_contents
5537 struct bfd_link_info *link_info,
5538 struct bfd_link_order *link_order,
5540 bfd_boolean relocatable,
5544 Provides default handling of relocation effort for back ends
5545 which can't be bothered to do it efficiently.
5550 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
5551 struct bfd_link_info
*link_info
,
5552 struct bfd_link_order
*link_order
,
5554 bfd_boolean relocatable
,
5557 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
5558 asection
*input_section
= link_order
->u
.indirect
.section
;
5560 arelent
**reloc_vector
;
5564 reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
5568 /* Read in the section. */
5569 sz
= input_section
->rawsize
? input_section
->rawsize
: input_section
->size
;
5570 if (!bfd_get_section_contents (input_bfd
, input_section
, data
, 0, sz
))
5573 if (reloc_size
== 0)
5576 reloc_vector
= (arelent
**) bfd_malloc (reloc_size
);
5577 if (reloc_vector
== NULL
)
5580 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
5584 if (reloc_count
< 0)
5587 if (reloc_count
> 0)
5590 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
5592 char *error_message
= NULL
;
5594 bfd_reloc_status_type r
;
5596 symbol
= *(*parent
)->sym_ptr_ptr
;
5597 if (symbol
->section
&& elf_discarded_section (symbol
->section
))
5600 static reloc_howto_type none_howto
5601 = HOWTO (0, 0, 0, 0, FALSE
, 0, complain_overflow_dont
, NULL
,
5602 "unused", FALSE
, 0, 0, FALSE
);
5604 p
= data
+ (*parent
)->address
* bfd_octets_per_byte (input_bfd
);
5605 _bfd_clear_contents ((*parent
)->howto
, input_bfd
, p
);
5606 (*parent
)->sym_ptr_ptr
= bfd_abs_section
.symbol_ptr_ptr
;
5607 (*parent
)->addend
= 0;
5608 (*parent
)->howto
= &none_howto
;
5612 r
= bfd_perform_relocation (input_bfd
,
5616 relocatable
? abfd
: NULL
,
5621 asection
*os
= input_section
->output_section
;
5623 /* A partial link, so keep the relocs. */
5624 os
->orelocation
[os
->reloc_count
] = *parent
;
5628 if (r
!= bfd_reloc_ok
)
5632 case bfd_reloc_undefined
:
5633 if (!((*link_info
->callbacks
->undefined_symbol
)
5634 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
5635 input_bfd
, input_section
, (*parent
)->address
,
5639 case bfd_reloc_dangerous
:
5640 BFD_ASSERT (error_message
!= NULL
);
5641 if (!((*link_info
->callbacks
->reloc_dangerous
)
5642 (link_info
, error_message
, input_bfd
, input_section
,
5643 (*parent
)->address
)))
5646 case bfd_reloc_overflow
:
5647 if (!((*link_info
->callbacks
->reloc_overflow
)
5649 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
5650 (*parent
)->howto
->name
, (*parent
)->addend
,
5651 input_bfd
, input_section
, (*parent
)->address
)))
5654 case bfd_reloc_outofrange
:
5664 free (reloc_vector
);
5668 free (reloc_vector
);