1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
27 BFD maintains relocations in much the same way it maintains
28 symbols: they are left alone until required, then read in
29 en-masse and translated into an internal form. A common
30 routine <<bfd_perform_relocation>> acts upon the
31 canonical form to do the fixup.
33 Relocations are maintained on a per section basis,
34 while symbols are maintained on a per BFD basis.
36 All that a back end has to do to fit the BFD interface is to create
37 a <<struct reloc_cache_entry>> for each relocation
38 in a particular section, and fill in the right bits of the structures.
47 /* DO compile in the reloc_code name table from libbfd.h. */
48 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. *}
71 . {* The relocation was performed, but there was an overflow. *}
74 . {* The address to relocate was not within the section supplied. *}
75 . bfd_reloc_outofrange,
77 . {* Used by special functions. *}
80 . {* Unsupported relocation size requested. *}
81 . bfd_reloc_notsupported,
86 . {* The symbol to relocate against was undefined. *}
87 . bfd_reloc_undefined,
89 . {* The relocation was performed, but may not be ok - presently
90 . generated only when linking i960 coff files with i960 b.out
91 . symbols. If this type is returned, the error_message argument
92 . to bfd_perform_relocation will be set. *}
95 . bfd_reloc_status_type;
98 .typedef struct reloc_cache_entry
100 . {* A pointer into the canonical table of pointers. *}
101 . struct bfd_symbol **sym_ptr_ptr;
103 . {* offset in section. *}
104 . bfd_size_type address;
106 . {* addend for relocation value. *}
109 . {* Pointer to how to perform the required relocation. *}
110 . reloc_howto_type *howto;
120 Here is a description of each of the fields within an <<arelent>>:
124 The symbol table pointer points to a pointer to the symbol
125 associated with the relocation request. It is the pointer
126 into the table returned by the back end's
127 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
128 referenced through a pointer to a pointer so that tools like
129 the linker can fix up all the symbols of the same name by
130 modifying only one pointer. The relocation routine looks in
131 the symbol and uses the base of the section the symbol is
132 attached to and the value of the symbol as the initial
133 relocation offset. If the symbol pointer is zero, then the
134 section provided is looked up.
138 The <<address>> field gives the offset in bytes from the base of
139 the section data which owns the relocation record to the first
140 byte of relocatable information. The actual data relocated
141 will be relative to this point; for example, a relocation
142 type which modifies the bottom two bytes of a four byte word
143 would not touch the first byte pointed to in a big endian
148 The <<addend>> is a value provided by the back end to be added (!)
149 to the relocation offset. Its interpretation is dependent upon
150 the howto. For example, on the 68k the code:
155 | return foo[0x12345678];
158 Could be compiled into:
161 | moveb @@#12345678,d0
166 This could create a reloc pointing to <<foo>>, but leave the
167 offset in the data, something like:
169 |RELOCATION RECORDS FOR [.text]:
173 |00000000 4e56 fffc ; linkw fp,#-4
174 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
175 |0000000a 49c0 ; extbl d0
176 |0000000c 4e5e ; unlk fp
179 Using coff and an 88k, some instructions don't have enough
180 space in them to represent the full address range, and
181 pointers have to be loaded in two parts. So you'd get something like:
183 | or.u r13,r0,hi16(_foo+0x12345678)
184 | ld.b r2,r13,lo16(_foo+0x12345678)
187 This should create two relocs, both pointing to <<_foo>>, and with
188 0x12340000 in their addend field. The data would consist of:
190 |RELOCATION RECORDS FOR [.text]:
192 |00000002 HVRT16 _foo+0x12340000
193 |00000006 LVRT16 _foo+0x12340000
195 |00000000 5da05678 ; or.u r13,r0,0x5678
196 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
197 |00000008 f400c001 ; jmp r1
199 The relocation routine digs out the value from the data, adds
200 it to the addend to get the original offset, and then adds the
201 value of <<_foo>>. Note that all 32 bits have to be kept around
202 somewhere, to cope with carry from bit 15 to bit 16.
204 One further example is the sparc and the a.out format. The
205 sparc has a similar problem to the 88k, in that some
206 instructions don't have room for an entire offset, but on the
207 sparc the parts are created in odd sized lumps. The designers of
208 the a.out format chose to not use the data within the section
209 for storing part of the offset; all the offset is kept within
210 the reloc. Anything in the data should be ignored.
213 | sethi %hi(_foo+0x12345678),%g2
214 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
218 Both relocs contain a pointer to <<foo>>, and the offsets
221 |RELOCATION RECORDS FOR [.text]:
223 |00000004 HI22 _foo+0x12345678
224 |00000008 LO10 _foo+0x12345678
226 |00000000 9de3bf90 ; save %sp,-112,%sp
227 |00000004 05000000 ; sethi %hi(_foo+0),%g2
228 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
229 |0000000c 81c7e008 ; ret
230 |00000010 81e80000 ; restore
234 The <<howto>> field can be imagined as a
235 relocation instruction. It is a pointer to a structure which
236 contains information on what to do with all of the other
237 information in the reloc record and data section. A back end
238 would normally have a relocation instruction set and turn
239 relocations into pointers to the correct structure on input -
240 but it would be possible to create each howto field on demand.
246 <<enum complain_overflow>>
248 Indicates what sort of overflow checking should be done when
249 performing a relocation.
253 .enum complain_overflow
255 . {* Do not complain on overflow. *}
256 . complain_overflow_dont,
258 . {* Complain if the value overflows when considered as a signed
259 . number one bit larger than the field. ie. A bitfield of N bits
260 . is allowed to represent -2**n to 2**n-1. *}
261 . complain_overflow_bitfield,
263 . {* Complain if the value overflows when considered as a signed
265 . complain_overflow_signed,
267 . {* Complain if the value overflows when considered as an
268 . unsigned number. *}
269 . complain_overflow_unsigned
278 The <<reloc_howto_type>> is a structure which contains all the
279 information that libbfd needs to know to tie up a back end's data.
282 .struct bfd_symbol; {* Forward declaration. *}
284 .struct reloc_howto_struct
286 . {* The type field has mainly a documentary use - the back end can
287 . do what it wants with it, though normally the back end's
288 . external idea of what a reloc number is stored
289 . in this field. For example, a PC relative word relocation
290 . in a coff environment has the type 023 - because that's
291 . what the outside world calls a R_PCRWORD reloc. *}
294 . {* The value the final relocation is shifted right by. This drops
295 . unwanted data from the relocation. *}
296 . unsigned int rightshift;
298 . {* The size of the item to be relocated. This is *not* a
299 . power-of-two measure. To get the number of bytes operated
300 . on by a type of relocation, use bfd_get_reloc_size. *}
303 . {* The number of bits in the item to be relocated. This is used
304 . when doing overflow checking. *}
305 . unsigned int bitsize;
307 . {* Notes that the relocation is relative to the location in the
308 . data section of the addend. The relocation function will
309 . subtract from the relocation value the address of the location
310 . being relocated. *}
311 . bfd_boolean pc_relative;
313 . {* The bit position of the reloc value in the destination.
314 . The relocated value is left shifted by this amount. *}
315 . unsigned int bitpos;
317 . {* What type of overflow error should be checked for when
319 . enum complain_overflow complain_on_overflow;
321 . {* If this field is non null, then the supplied function is
322 . called rather than the normal function. This allows really
323 . strange relocation methods to be accommodated (e.g., i960 callj
325 . bfd_reloc_status_type (*special_function)
326 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
329 . {* The textual name of the relocation type. *}
332 . {* Some formats record a relocation addend in the section contents
333 . rather than with the relocation. For ELF formats this is the
334 . distinction between USE_REL and USE_RELA (though the code checks
335 . for USE_REL == 1/0). The value of this field is TRUE if the
336 . addend is recorded with the section contents; when performing a
337 . partial link (ld -r) the section contents (the data) will be
338 . modified. The value of this field is FALSE if addends are
339 . recorded with the relocation (in arelent.addend); when performing
340 . a partial link the relocation will be modified.
341 . All relocations for all ELF USE_RELA targets should set this field
342 . to FALSE (values of TRUE should be looked on with suspicion).
343 . However, the converse is not true: not all relocations of all ELF
344 . USE_REL targets set this field to TRUE. Why this is so is peculiar
345 . to each particular target. For relocs that aren't used in partial
346 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
347 . bfd_boolean partial_inplace;
349 . {* src_mask selects the part of the instruction (or data) to be used
350 . in the relocation sum. If the target relocations don't have an
351 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
352 . dst_mask to extract the addend from the section contents. If
353 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
354 . field should be zero. Non-zero values for ELF USE_RELA targets are
355 . bogus as in those cases the value in the dst_mask part of the
356 . section contents should be treated as garbage. *}
359 . {* dst_mask selects which parts of the instruction (or data) are
360 . replaced with a relocated value. *}
363 . {* When some formats create PC relative instructions, they leave
364 . the value of the pc of the place being relocated in the offset
365 . slot of the instruction, so that a PC relative relocation can
366 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
367 . Some formats leave the displacement part of an instruction
368 . empty (e.g., m88k bcs); this flag signals the fact. *}
369 . bfd_boolean pcrel_offset;
379 The HOWTO define is horrible and will go away.
381 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
382 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
385 And will be replaced with the totally magic way. But for the
386 moment, we are compatible, so do it this way.
388 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
389 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
390 . NAME, FALSE, 0, 0, IN)
394 This is used to fill in an empty howto entry in an array.
396 .#define EMPTY_HOWTO(C) \
397 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
398 . NULL, FALSE, 0, 0, FALSE)
402 Helper routine to turn a symbol into a relocation value.
404 .#define HOWTO_PREPARE(relocation, symbol) \
406 . if (symbol != NULL) \
408 . if (bfd_is_com_section (symbol->section)) \
414 . relocation = symbol->value; \
426 unsigned int bfd_get_reloc_size (reloc_howto_type *);
429 For a reloc_howto_type that operates on a fixed number of bytes,
430 this returns the number of bytes operated on.
434 bfd_get_reloc_size (reloc_howto_type
*howto
)
455 How relocs are tied together in an <<asection>>:
457 .typedef struct relent_chain
460 . struct relent_chain *next;
466 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
467 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
474 bfd_reloc_status_type bfd_check_overflow
475 (enum complain_overflow how,
476 unsigned int bitsize,
477 unsigned int rightshift,
478 unsigned int addrsize,
482 Perform overflow checking on @var{relocation} which has
483 @var{bitsize} significant bits and will be shifted right by
484 @var{rightshift} bits, on a machine with addresses containing
485 @var{addrsize} significant bits. The result is either of
486 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
490 bfd_reloc_status_type
491 bfd_check_overflow (enum complain_overflow how
,
492 unsigned int bitsize
,
493 unsigned int rightshift
,
494 unsigned int addrsize
,
497 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
498 bfd_reloc_status_type flag
= bfd_reloc_ok
;
500 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
501 we'll be permissive: extra bits in the field mask will
502 automatically extend the address mask for purposes of the
504 fieldmask
= N_ONES (bitsize
);
505 signmask
= ~fieldmask
;
506 addrmask
= N_ONES (addrsize
) | fieldmask
;
507 a
= (relocation
& addrmask
) >> rightshift
;;
511 case complain_overflow_dont
:
514 case complain_overflow_signed
:
515 /* If any sign bits are set, all sign bits must be set. That
516 is, A must be a valid negative address after shifting. */
517 signmask
= ~ (fieldmask
>> 1);
520 case complain_overflow_bitfield
:
521 /* Bitfields are sometimes signed, sometimes unsigned. We
522 explicitly allow an address wrap too, which means a bitfield
523 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
524 if the value has some, but not all, bits set outside the
527 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
528 flag
= bfd_reloc_overflow
;
531 case complain_overflow_unsigned
:
532 /* We have an overflow if the address does not fit in the field. */
533 if ((a
& signmask
) != 0)
534 flag
= bfd_reloc_overflow
;
546 bfd_perform_relocation
549 bfd_reloc_status_type bfd_perform_relocation
551 arelent *reloc_entry,
553 asection *input_section,
555 char **error_message);
558 If @var{output_bfd} is supplied to this function, the
559 generated image will be relocatable; the relocations are
560 copied to the output file after they have been changed to
561 reflect the new state of the world. There are two ways of
562 reflecting the results of partial linkage in an output file:
563 by modifying the output data in place, and by modifying the
564 relocation record. Some native formats (e.g., basic a.out and
565 basic coff) have no way of specifying an addend in the
566 relocation type, so the addend has to go in the output data.
567 This is no big deal since in these formats the output data
568 slot will always be big enough for the addend. Complex reloc
569 types with addends were invented to solve just this problem.
570 The @var{error_message} argument is set to an error message if
571 this return @code{bfd_reloc_dangerous}.
575 bfd_reloc_status_type
576 bfd_perform_relocation (bfd
*abfd
,
577 arelent
*reloc_entry
,
579 asection
*input_section
,
581 char **error_message
)
584 bfd_reloc_status_type flag
= bfd_reloc_ok
;
585 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
586 bfd_vma output_base
= 0;
587 reloc_howto_type
*howto
= reloc_entry
->howto
;
588 asection
*reloc_target_output_section
;
591 symbol
= *(reloc_entry
->sym_ptr_ptr
);
592 if (bfd_is_abs_section (symbol
->section
)
593 && output_bfd
!= NULL
)
595 reloc_entry
->address
+= input_section
->output_offset
;
599 /* If we are not producing relocatable output, return an error if
600 the symbol is not defined. An undefined weak symbol is
601 considered to have a value of zero (SVR4 ABI, p. 4-27). */
602 if (bfd_is_und_section (symbol
->section
)
603 && (symbol
->flags
& BSF_WEAK
) == 0
604 && output_bfd
== NULL
)
605 flag
= bfd_reloc_undefined
;
607 /* If there is a function supplied to handle this relocation type,
608 call it. It'll return `bfd_reloc_continue' if further processing
610 if (howto
->special_function
)
612 bfd_reloc_status_type cont
;
613 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
614 input_section
, output_bfd
,
616 if (cont
!= bfd_reloc_continue
)
620 /* Is the address of the relocation really within the section? */
621 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
622 return bfd_reloc_outofrange
;
624 /* Work out which section the relocation is targeted at and the
625 initial relocation command value. */
627 /* Get symbol value. (Common symbols are special.) */
628 if (bfd_is_com_section (symbol
->section
))
631 relocation
= symbol
->value
;
633 reloc_target_output_section
= symbol
->section
->output_section
;
635 /* Convert input-section-relative symbol value to absolute. */
636 if ((output_bfd
&& ! howto
->partial_inplace
)
637 || reloc_target_output_section
== NULL
)
640 output_base
= reloc_target_output_section
->vma
;
642 relocation
+= output_base
+ symbol
->section
->output_offset
;
644 /* Add in supplied addend. */
645 relocation
+= reloc_entry
->addend
;
647 /* Here the variable relocation holds the final address of the
648 symbol we are relocating against, plus any addend. */
650 if (howto
->pc_relative
)
652 /* This is a PC relative relocation. We want to set RELOCATION
653 to the distance between the address of the symbol and the
654 location. RELOCATION is already the address of the symbol.
656 We start by subtracting the address of the section containing
659 If pcrel_offset is set, we must further subtract the position
660 of the location within the section. Some targets arrange for
661 the addend to be the negative of the position of the location
662 within the section; for example, i386-aout does this. For
663 i386-aout, pcrel_offset is FALSE. Some other targets do not
664 include the position of the location; for example, m88kbcs,
665 or ELF. For those targets, pcrel_offset is TRUE.
667 If we are producing relocatable output, then we must ensure
668 that this reloc will be correctly computed when the final
669 relocation is done. If pcrel_offset is FALSE we want to wind
670 up with the negative of the location within the section,
671 which means we must adjust the existing addend by the change
672 in the location within the section. If pcrel_offset is TRUE
673 we do not want to adjust the existing addend at all.
675 FIXME: This seems logical to me, but for the case of
676 producing relocatable output it is not what the code
677 actually does. I don't want to change it, because it seems
678 far too likely that something will break. */
681 input_section
->output_section
->vma
+ input_section
->output_offset
;
683 if (howto
->pcrel_offset
)
684 relocation
-= reloc_entry
->address
;
687 if (output_bfd
!= NULL
)
689 if (! howto
->partial_inplace
)
691 /* This is a partial relocation, and we want to apply the relocation
692 to the reloc entry rather than the raw data. Modify the reloc
693 inplace to reflect what we now know. */
694 reloc_entry
->addend
= relocation
;
695 reloc_entry
->address
+= input_section
->output_offset
;
700 /* This is a partial relocation, but inplace, so modify the
703 If we've relocated with a symbol with a section, change
704 into a ref to the section belonging to the symbol. */
706 reloc_entry
->address
+= input_section
->output_offset
;
709 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
710 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
711 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
713 /* For m68k-coff, the addend was being subtracted twice during
714 relocation with -r. Removing the line below this comment
715 fixes that problem; see PR 2953.
717 However, Ian wrote the following, regarding removing the line below,
718 which explains why it is still enabled: --djm
720 If you put a patch like that into BFD you need to check all the COFF
721 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
722 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
723 problem in a different way. There may very well be a reason that the
724 code works as it does.
726 Hmmm. The first obvious point is that bfd_perform_relocation should
727 not have any tests that depend upon the flavour. It's seem like
728 entirely the wrong place for such a thing. The second obvious point
729 is that the current code ignores the reloc addend when producing
730 relocatable output for COFF. That's peculiar. In fact, I really
731 have no idea what the point of the line you want to remove is.
733 A typical COFF reloc subtracts the old value of the symbol and adds in
734 the new value to the location in the object file (if it's a pc
735 relative reloc it adds the difference between the symbol value and the
736 location). When relocating we need to preserve that property.
738 BFD handles this by setting the addend to the negative of the old
739 value of the symbol. Unfortunately it handles common symbols in a
740 non-standard way (it doesn't subtract the old value) but that's a
741 different story (we can't change it without losing backward
742 compatibility with old object files) (coff-i386 does subtract the old
743 value, to be compatible with existing coff-i386 targets, like SCO).
745 So everything works fine when not producing relocatable output. When
746 we are producing relocatable output, logically we should do exactly
747 what we do when not producing relocatable output. Therefore, your
748 patch is correct. In fact, it should probably always just set
749 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
750 add the value into the object file. This won't hurt the COFF code,
751 which doesn't use the addend; I'm not sure what it will do to other
752 formats (the thing to check for would be whether any formats both use
753 the addend and set partial_inplace).
755 When I wanted to make coff-i386 produce relocatable output, I ran
756 into the problem that you are running into: I wanted to remove that
757 line. Rather than risk it, I made the coff-i386 relocs use a special
758 function; it's coff_i386_reloc in coff-i386.c. The function
759 specifically adds the addend field into the object file, knowing that
760 bfd_perform_relocation is not going to. If you remove that line, then
761 coff-i386.c will wind up adding the addend field in twice. It's
762 trivial to fix; it just needs to be done.
764 The problem with removing the line is just that it may break some
765 working code. With BFD it's hard to be sure of anything. The right
766 way to deal with this is simply to build and test at least all the
767 supported COFF targets. It should be straightforward if time and disk
768 space consuming. For each target:
770 2) generate some executable, and link it using -r (I would
771 probably use paranoia.o and link against newlib/libc.a, which
772 for all the supported targets would be available in
773 /usr/cygnus/progressive/H-host/target/lib/libc.a).
774 3) make the change to reloc.c
775 4) rebuild the linker
777 6) if the resulting object files are the same, you have at least
779 7) if they are different you have to figure out which version is
782 relocation
-= reloc_entry
->addend
;
783 reloc_entry
->addend
= 0;
787 reloc_entry
->addend
= relocation
;
793 reloc_entry
->addend
= 0;
796 /* FIXME: This overflow checking is incomplete, because the value
797 might have overflowed before we get here. For a correct check we
798 need to compute the value in a size larger than bitsize, but we
799 can't reasonably do that for a reloc the same size as a host
801 FIXME: We should also do overflow checking on the result after
802 adding in the value contained in the object file. */
803 if (howto
->complain_on_overflow
!= complain_overflow_dont
804 && flag
== bfd_reloc_ok
)
805 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
808 bfd_arch_bits_per_address (abfd
),
811 /* Either we are relocating all the way, or we don't want to apply
812 the relocation to the reloc entry (probably because there isn't
813 any room in the output format to describe addends to relocs). */
815 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
816 (OSF version 1.3, compiler version 3.11). It miscompiles the
830 x <<= (unsigned long) s.i0;
834 printf ("succeeded (%lx)\n", x);
838 relocation
>>= (bfd_vma
) howto
->rightshift
;
840 /* Shift everything up to where it's going to be used. */
841 relocation
<<= (bfd_vma
) howto
->bitpos
;
843 /* Wait for the day when all have the mask in them. */
846 i instruction to be left alone
847 o offset within instruction
848 r relocation offset to apply
857 (( i i i i i o o o o o from bfd_get<size>
858 and S S S S S) to get the size offset we want
859 + r r r r r r r r r r) to get the final value to place
860 and D D D D D to chop to right size
861 -----------------------
864 ( i i i i i o o o o o from bfd_get<size>
865 and N N N N N ) get instruction
866 -----------------------
872 -----------------------
873 = R R R R R R R R R R put into bfd_put<size>
877 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
883 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
885 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
891 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
893 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
898 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
900 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
905 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
906 relocation
= -relocation
;
908 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
914 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
915 relocation
= -relocation
;
917 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
928 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
930 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
937 return bfd_reloc_other
;
945 bfd_install_relocation
948 bfd_reloc_status_type bfd_install_relocation
950 arelent *reloc_entry,
951 void *data, bfd_vma data_start,
952 asection *input_section,
953 char **error_message);
956 This looks remarkably like <<bfd_perform_relocation>>, except it
957 does not expect that the section contents have been filled in.
958 I.e., it's suitable for use when creating, rather than applying
961 For now, this function should be considered reserved for the
965 bfd_reloc_status_type
966 bfd_install_relocation (bfd
*abfd
,
967 arelent
*reloc_entry
,
969 bfd_vma data_start_offset
,
970 asection
*input_section
,
971 char **error_message
)
974 bfd_reloc_status_type flag
= bfd_reloc_ok
;
975 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
976 bfd_vma output_base
= 0;
977 reloc_howto_type
*howto
= reloc_entry
->howto
;
978 asection
*reloc_target_output_section
;
982 symbol
= *(reloc_entry
->sym_ptr_ptr
);
983 if (bfd_is_abs_section (symbol
->section
))
985 reloc_entry
->address
+= input_section
->output_offset
;
989 /* If there is a function supplied to handle this relocation type,
990 call it. It'll return `bfd_reloc_continue' if further processing
992 if (howto
->special_function
)
994 bfd_reloc_status_type cont
;
996 /* XXX - The special_function calls haven't been fixed up to deal
997 with creating new relocations and section contents. */
998 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
999 /* XXX - Non-portable! */
1000 ((bfd_byte
*) data_start
1001 - data_start_offset
),
1002 input_section
, abfd
, error_message
);
1003 if (cont
!= bfd_reloc_continue
)
1007 /* Is the address of the relocation really within the section? */
1008 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
1009 return bfd_reloc_outofrange
;
1011 /* Work out which section the relocation is targeted at and the
1012 initial relocation command value. */
1014 /* Get symbol value. (Common symbols are special.) */
1015 if (bfd_is_com_section (symbol
->section
))
1018 relocation
= symbol
->value
;
1020 reloc_target_output_section
= symbol
->section
->output_section
;
1022 /* Convert input-section-relative symbol value to absolute. */
1023 if (! howto
->partial_inplace
)
1026 output_base
= reloc_target_output_section
->vma
;
1028 relocation
+= output_base
+ symbol
->section
->output_offset
;
1030 /* Add in supplied addend. */
1031 relocation
+= reloc_entry
->addend
;
1033 /* Here the variable relocation holds the final address of the
1034 symbol we are relocating against, plus any addend. */
1036 if (howto
->pc_relative
)
1038 /* This is a PC relative relocation. We want to set RELOCATION
1039 to the distance between the address of the symbol and the
1040 location. RELOCATION is already the address of the symbol.
1042 We start by subtracting the address of the section containing
1045 If pcrel_offset is set, we must further subtract the position
1046 of the location within the section. Some targets arrange for
1047 the addend to be the negative of the position of the location
1048 within the section; for example, i386-aout does this. For
1049 i386-aout, pcrel_offset is FALSE. Some other targets do not
1050 include the position of the location; for example, m88kbcs,
1051 or ELF. For those targets, pcrel_offset is TRUE.
1053 If we are producing relocatable output, then we must ensure
1054 that this reloc will be correctly computed when the final
1055 relocation is done. If pcrel_offset is FALSE we want to wind
1056 up with the negative of the location within the section,
1057 which means we must adjust the existing addend by the change
1058 in the location within the section. If pcrel_offset is TRUE
1059 we do not want to adjust the existing addend at all.
1061 FIXME: This seems logical to me, but for the case of
1062 producing relocatable output it is not what the code
1063 actually does. I don't want to change it, because it seems
1064 far too likely that something will break. */
1067 input_section
->output_section
->vma
+ input_section
->output_offset
;
1069 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1070 relocation
-= reloc_entry
->address
;
1073 if (! howto
->partial_inplace
)
1075 /* This is a partial relocation, and we want to apply the relocation
1076 to the reloc entry rather than the raw data. Modify the reloc
1077 inplace to reflect what we now know. */
1078 reloc_entry
->addend
= relocation
;
1079 reloc_entry
->address
+= input_section
->output_offset
;
1084 /* This is a partial relocation, but inplace, so modify the
1087 If we've relocated with a symbol with a section, change
1088 into a ref to the section belonging to the symbol. */
1089 reloc_entry
->address
+= input_section
->output_offset
;
1092 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1093 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1094 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1097 /* For m68k-coff, the addend was being subtracted twice during
1098 relocation with -r. Removing the line below this comment
1099 fixes that problem; see PR 2953.
1101 However, Ian wrote the following, regarding removing the line below,
1102 which explains why it is still enabled: --djm
1104 If you put a patch like that into BFD you need to check all the COFF
1105 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1106 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1107 problem in a different way. There may very well be a reason that the
1108 code works as it does.
1110 Hmmm. The first obvious point is that bfd_install_relocation should
1111 not have any tests that depend upon the flavour. It's seem like
1112 entirely the wrong place for such a thing. The second obvious point
1113 is that the current code ignores the reloc addend when producing
1114 relocatable output for COFF. That's peculiar. In fact, I really
1115 have no idea what the point of the line you want to remove is.
1117 A typical COFF reloc subtracts the old value of the symbol and adds in
1118 the new value to the location in the object file (if it's a pc
1119 relative reloc it adds the difference between the symbol value and the
1120 location). When relocating we need to preserve that property.
1122 BFD handles this by setting the addend to the negative of the old
1123 value of the symbol. Unfortunately it handles common symbols in a
1124 non-standard way (it doesn't subtract the old value) but that's a
1125 different story (we can't change it without losing backward
1126 compatibility with old object files) (coff-i386 does subtract the old
1127 value, to be compatible with existing coff-i386 targets, like SCO).
1129 So everything works fine when not producing relocatable output. When
1130 we are producing relocatable output, logically we should do exactly
1131 what we do when not producing relocatable output. Therefore, your
1132 patch is correct. In fact, it should probably always just set
1133 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1134 add the value into the object file. This won't hurt the COFF code,
1135 which doesn't use the addend; I'm not sure what it will do to other
1136 formats (the thing to check for would be whether any formats both use
1137 the addend and set partial_inplace).
1139 When I wanted to make coff-i386 produce relocatable output, I ran
1140 into the problem that you are running into: I wanted to remove that
1141 line. Rather than risk it, I made the coff-i386 relocs use a special
1142 function; it's coff_i386_reloc in coff-i386.c. The function
1143 specifically adds the addend field into the object file, knowing that
1144 bfd_install_relocation is not going to. If you remove that line, then
1145 coff-i386.c will wind up adding the addend field in twice. It's
1146 trivial to fix; it just needs to be done.
1148 The problem with removing the line is just that it may break some
1149 working code. With BFD it's hard to be sure of anything. The right
1150 way to deal with this is simply to build and test at least all the
1151 supported COFF targets. It should be straightforward if time and disk
1152 space consuming. For each target:
1154 2) generate some executable, and link it using -r (I would
1155 probably use paranoia.o and link against newlib/libc.a, which
1156 for all the supported targets would be available in
1157 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1158 3) make the change to reloc.c
1159 4) rebuild the linker
1161 6) if the resulting object files are the same, you have at least
1163 7) if they are different you have to figure out which version is
1165 relocation
-= reloc_entry
->addend
;
1166 /* FIXME: There should be no target specific code here... */
1167 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1168 reloc_entry
->addend
= 0;
1172 reloc_entry
->addend
= relocation
;
1176 /* FIXME: This overflow checking is incomplete, because the value
1177 might have overflowed before we get here. For a correct check we
1178 need to compute the value in a size larger than bitsize, but we
1179 can't reasonably do that for a reloc the same size as a host
1181 FIXME: We should also do overflow checking on the result after
1182 adding in the value contained in the object file. */
1183 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1184 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1187 bfd_arch_bits_per_address (abfd
),
1190 /* Either we are relocating all the way, or we don't want to apply
1191 the relocation to the reloc entry (probably because there isn't
1192 any room in the output format to describe addends to relocs). */
1194 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1195 (OSF version 1.3, compiler version 3.11). It miscompiles the
1209 x <<= (unsigned long) s.i0;
1211 printf ("failed\n");
1213 printf ("succeeded (%lx)\n", x);
1217 relocation
>>= (bfd_vma
) howto
->rightshift
;
1219 /* Shift everything up to where it's going to be used. */
1220 relocation
<<= (bfd_vma
) howto
->bitpos
;
1222 /* Wait for the day when all have the mask in them. */
1225 i instruction to be left alone
1226 o offset within instruction
1227 r relocation offset to apply
1236 (( i i i i i o o o o o from bfd_get<size>
1237 and S S S S S) to get the size offset we want
1238 + r r r r r r r r r r) to get the final value to place
1239 and D D D D D to chop to right size
1240 -----------------------
1243 ( i i i i i o o o o o from bfd_get<size>
1244 and N N N N N ) get instruction
1245 -----------------------
1251 -----------------------
1252 = R R R R R R R R R R put into bfd_put<size>
1256 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1258 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1260 switch (howto
->size
)
1264 char x
= bfd_get_8 (abfd
, data
);
1266 bfd_put_8 (abfd
, x
, data
);
1272 short x
= bfd_get_16 (abfd
, data
);
1274 bfd_put_16 (abfd
, (bfd_vma
) x
, data
);
1279 long x
= bfd_get_32 (abfd
, data
);
1281 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1286 long x
= bfd_get_32 (abfd
, data
);
1287 relocation
= -relocation
;
1289 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1299 bfd_vma x
= bfd_get_64 (abfd
, data
);
1301 bfd_put_64 (abfd
, x
, data
);
1305 return bfd_reloc_other
;
1311 /* This relocation routine is used by some of the backend linkers.
1312 They do not construct asymbol or arelent structures, so there is no
1313 reason for them to use bfd_perform_relocation. Also,
1314 bfd_perform_relocation is so hacked up it is easier to write a new
1315 function than to try to deal with it.
1317 This routine does a final relocation. Whether it is useful for a
1318 relocatable link depends upon how the object format defines
1321 FIXME: This routine ignores any special_function in the HOWTO,
1322 since the existing special_function values have been written for
1323 bfd_perform_relocation.
1325 HOWTO is the reloc howto information.
1326 INPUT_BFD is the BFD which the reloc applies to.
1327 INPUT_SECTION is the section which the reloc applies to.
1328 CONTENTS is the contents of the section.
1329 ADDRESS is the address of the reloc within INPUT_SECTION.
1330 VALUE is the value of the symbol the reloc refers to.
1331 ADDEND is the addend of the reloc. */
1333 bfd_reloc_status_type
1334 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1336 asection
*input_section
,
1344 /* Sanity check the address. */
1345 if (address
> bfd_get_section_limit (input_bfd
, input_section
))
1346 return bfd_reloc_outofrange
;
1348 /* This function assumes that we are dealing with a basic relocation
1349 against a symbol. We want to compute the value of the symbol to
1350 relocate to. This is just VALUE, the value of the symbol, plus
1351 ADDEND, any addend associated with the reloc. */
1352 relocation
= value
+ addend
;
1354 /* If the relocation is PC relative, we want to set RELOCATION to
1355 the distance between the symbol (currently in RELOCATION) and the
1356 location we are relocating. Some targets (e.g., i386-aout)
1357 arrange for the contents of the section to be the negative of the
1358 offset of the location within the section; for such targets
1359 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1360 simply leave the contents of the section as zero; for such
1361 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1362 need to subtract out the offset of the location within the
1363 section (which is just ADDRESS). */
1364 if (howto
->pc_relative
)
1366 relocation
-= (input_section
->output_section
->vma
1367 + input_section
->output_offset
);
1368 if (howto
->pcrel_offset
)
1369 relocation
-= address
;
1372 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1373 contents
+ address
);
1376 /* Relocate a given location using a given value and howto. */
1378 bfd_reloc_status_type
1379 _bfd_relocate_contents (reloc_howto_type
*howto
,
1386 bfd_reloc_status_type flag
;
1387 unsigned int rightshift
= howto
->rightshift
;
1388 unsigned int bitpos
= howto
->bitpos
;
1390 /* If the size is negative, negate RELOCATION. This isn't very
1392 if (howto
->size
< 0)
1393 relocation
= -relocation
;
1395 /* Get the value we are going to relocate. */
1396 size
= bfd_get_reloc_size (howto
);
1403 x
= bfd_get_8 (input_bfd
, location
);
1406 x
= bfd_get_16 (input_bfd
, location
);
1409 x
= bfd_get_32 (input_bfd
, location
);
1413 x
= bfd_get_64 (input_bfd
, location
);
1420 /* Check for overflow. FIXME: We may drop bits during the addition
1421 which we don't check for. We must either check at every single
1422 operation, which would be tedious, or we must do the computations
1423 in a type larger than bfd_vma, which would be inefficient. */
1424 flag
= bfd_reloc_ok
;
1425 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1427 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1430 /* Get the values to be added together. For signed and unsigned
1431 relocations, we assume that all values should be truncated to
1432 the size of an address. For bitfields, all the bits matter.
1433 See also bfd_check_overflow. */
1434 fieldmask
= N_ONES (howto
->bitsize
);
1435 signmask
= ~fieldmask
;
1436 addrmask
= N_ONES (bfd_arch_bits_per_address (input_bfd
)) | fieldmask
;
1437 a
= (relocation
& addrmask
) >> rightshift
;
1438 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1440 switch (howto
->complain_on_overflow
)
1442 case complain_overflow_signed
:
1443 /* If any sign bits are set, all sign bits must be set.
1444 That is, A must be a valid negative address after
1446 signmask
= ~(fieldmask
>> 1);
1449 case complain_overflow_bitfield
:
1450 /* Much like the signed check, but for a field one bit
1451 wider. We allow a bitfield to represent numbers in the
1452 range -2**n to 2**n-1, where n is the number of bits in the
1453 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1454 can't overflow, which is exactly what we want. */
1456 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
1457 flag
= bfd_reloc_overflow
;
1459 /* We only need this next bit of code if the sign bit of B
1460 is below the sign bit of A. This would only happen if
1461 SRC_MASK had fewer bits than BITSIZE. Note that if
1462 SRC_MASK has more bits than BITSIZE, we can get into
1463 trouble; we would need to verify that B is in range, as
1464 we do for A above. */
1465 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1468 /* Set all the bits above the sign bit. */
1471 /* Now we can do the addition. */
1474 /* See if the result has the correct sign. Bits above the
1475 sign bit are junk now; ignore them. If the sum is
1476 positive, make sure we did not have all negative inputs;
1477 if the sum is negative, make sure we did not have all
1478 positive inputs. The test below looks only at the sign
1479 bits, and it really just
1480 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1482 We mask with addrmask here to explicitly allow an address
1483 wrap-around. The Linux kernel relies on it, and it is
1484 the only way to write assembler code which can run when
1485 loaded at a location 0x80000000 away from the location at
1486 which it is linked. */
1487 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1488 flag
= bfd_reloc_overflow
;
1491 case complain_overflow_unsigned
:
1492 /* Checking for an unsigned overflow is relatively easy:
1493 trim the addresses and add, and trim the result as well.
1494 Overflow is normally indicated when the result does not
1495 fit in the field. However, we also need to consider the
1496 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1497 input is 0x80000000, and bfd_vma is only 32 bits; then we
1498 will get sum == 0, but there is an overflow, since the
1499 inputs did not fit in the field. Instead of doing a
1500 separate test, we can check for this by or-ing in the
1501 operands when testing for the sum overflowing its final
1503 sum
= (a
+ b
) & addrmask
;
1504 if ((a
| b
| sum
) & signmask
)
1505 flag
= bfd_reloc_overflow
;
1513 /* Put RELOCATION in the right bits. */
1514 relocation
>>= (bfd_vma
) rightshift
;
1515 relocation
<<= (bfd_vma
) bitpos
;
1517 /* Add RELOCATION to the right bits of X. */
1518 x
= ((x
& ~howto
->dst_mask
)
1519 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1521 /* Put the relocated value back in the object file. */
1528 bfd_put_8 (input_bfd
, x
, location
);
1531 bfd_put_16 (input_bfd
, x
, location
);
1534 bfd_put_32 (input_bfd
, x
, location
);
1538 bfd_put_64 (input_bfd
, x
, location
);
1551 howto manager, , typedef arelent, Relocations
1556 When an application wants to create a relocation, but doesn't
1557 know what the target machine might call it, it can find out by
1558 using this bit of code.
1567 The insides of a reloc code. The idea is that, eventually, there
1568 will be one enumerator for every type of relocation we ever do.
1569 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1570 return a howto pointer.
1572 This does mean that the application must determine the correct
1573 enumerator value; you can't get a howto pointer from a random set
1594 Basic absolute relocations of N bits.
1609 PC-relative relocations. Sometimes these are relative to the address
1610 of the relocation itself; sometimes they are relative to the start of
1611 the section containing the relocation. It depends on the specific target.
1613 The 24-bit relocation is used in some Intel 960 configurations.
1618 Section relative relocations. Some targets need this for DWARF2.
1621 BFD_RELOC_32_GOT_PCREL
1623 BFD_RELOC_16_GOT_PCREL
1625 BFD_RELOC_8_GOT_PCREL
1631 BFD_RELOC_LO16_GOTOFF
1633 BFD_RELOC_HI16_GOTOFF
1635 BFD_RELOC_HI16_S_GOTOFF
1639 BFD_RELOC_64_PLT_PCREL
1641 BFD_RELOC_32_PLT_PCREL
1643 BFD_RELOC_24_PLT_PCREL
1645 BFD_RELOC_16_PLT_PCREL
1647 BFD_RELOC_8_PLT_PCREL
1655 BFD_RELOC_LO16_PLTOFF
1657 BFD_RELOC_HI16_PLTOFF
1659 BFD_RELOC_HI16_S_PLTOFF
1666 BFD_RELOC_68K_GLOB_DAT
1668 BFD_RELOC_68K_JMP_SLOT
1670 BFD_RELOC_68K_RELATIVE
1672 Relocations used by 68K ELF.
1675 BFD_RELOC_32_BASEREL
1677 BFD_RELOC_16_BASEREL
1679 BFD_RELOC_LO16_BASEREL
1681 BFD_RELOC_HI16_BASEREL
1683 BFD_RELOC_HI16_S_BASEREL
1689 Linkage-table relative.
1694 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1697 BFD_RELOC_32_PCREL_S2
1699 BFD_RELOC_16_PCREL_S2
1701 BFD_RELOC_23_PCREL_S2
1703 These PC-relative relocations are stored as word displacements --
1704 i.e., byte displacements shifted right two bits. The 30-bit word
1705 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1706 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1707 signed 16-bit displacement is used on the MIPS, and the 23-bit
1708 displacement is used on the Alpha.
1715 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1716 the target word. These are used on the SPARC.
1723 For systems that allocate a Global Pointer register, these are
1724 displacements off that register. These relocation types are
1725 handled specially, because the value the register will have is
1726 decided relatively late.
1729 BFD_RELOC_I960_CALLJ
1731 Reloc types used for i960/b.out.
1736 BFD_RELOC_SPARC_WDISP22
1742 BFD_RELOC_SPARC_GOT10
1744 BFD_RELOC_SPARC_GOT13
1746 BFD_RELOC_SPARC_GOT22
1748 BFD_RELOC_SPARC_PC10
1750 BFD_RELOC_SPARC_PC22
1752 BFD_RELOC_SPARC_WPLT30
1754 BFD_RELOC_SPARC_COPY
1756 BFD_RELOC_SPARC_GLOB_DAT
1758 BFD_RELOC_SPARC_JMP_SLOT
1760 BFD_RELOC_SPARC_RELATIVE
1762 BFD_RELOC_SPARC_UA16
1764 BFD_RELOC_SPARC_UA32
1766 BFD_RELOC_SPARC_UA64
1768 SPARC ELF relocations. There is probably some overlap with other
1769 relocation types already defined.
1772 BFD_RELOC_SPARC_BASE13
1774 BFD_RELOC_SPARC_BASE22
1776 I think these are specific to SPARC a.out (e.g., Sun 4).
1786 BFD_RELOC_SPARC_OLO10
1788 BFD_RELOC_SPARC_HH22
1790 BFD_RELOC_SPARC_HM10
1792 BFD_RELOC_SPARC_LM22
1794 BFD_RELOC_SPARC_PC_HH22
1796 BFD_RELOC_SPARC_PC_HM10
1798 BFD_RELOC_SPARC_PC_LM22
1800 BFD_RELOC_SPARC_WDISP16
1802 BFD_RELOC_SPARC_WDISP19
1810 BFD_RELOC_SPARC_DISP64
1813 BFD_RELOC_SPARC_PLT32
1815 BFD_RELOC_SPARC_PLT64
1817 BFD_RELOC_SPARC_HIX22
1819 BFD_RELOC_SPARC_LOX10
1827 BFD_RELOC_SPARC_REGISTER
1832 BFD_RELOC_SPARC_REV32
1834 SPARC little endian relocation
1836 BFD_RELOC_SPARC_TLS_GD_HI22
1838 BFD_RELOC_SPARC_TLS_GD_LO10
1840 BFD_RELOC_SPARC_TLS_GD_ADD
1842 BFD_RELOC_SPARC_TLS_GD_CALL
1844 BFD_RELOC_SPARC_TLS_LDM_HI22
1846 BFD_RELOC_SPARC_TLS_LDM_LO10
1848 BFD_RELOC_SPARC_TLS_LDM_ADD
1850 BFD_RELOC_SPARC_TLS_LDM_CALL
1852 BFD_RELOC_SPARC_TLS_LDO_HIX22
1854 BFD_RELOC_SPARC_TLS_LDO_LOX10
1856 BFD_RELOC_SPARC_TLS_LDO_ADD
1858 BFD_RELOC_SPARC_TLS_IE_HI22
1860 BFD_RELOC_SPARC_TLS_IE_LO10
1862 BFD_RELOC_SPARC_TLS_IE_LD
1864 BFD_RELOC_SPARC_TLS_IE_LDX
1866 BFD_RELOC_SPARC_TLS_IE_ADD
1868 BFD_RELOC_SPARC_TLS_LE_HIX22
1870 BFD_RELOC_SPARC_TLS_LE_LOX10
1872 BFD_RELOC_SPARC_TLS_DTPMOD32
1874 BFD_RELOC_SPARC_TLS_DTPMOD64
1876 BFD_RELOC_SPARC_TLS_DTPOFF32
1878 BFD_RELOC_SPARC_TLS_DTPOFF64
1880 BFD_RELOC_SPARC_TLS_TPOFF32
1882 BFD_RELOC_SPARC_TLS_TPOFF64
1884 SPARC TLS relocations
1893 BFD_RELOC_SPU_IMM10W
1897 BFD_RELOC_SPU_IMM16W
1901 BFD_RELOC_SPU_PCREL9a
1903 BFD_RELOC_SPU_PCREL9b
1905 BFD_RELOC_SPU_PCREL16
1914 BFD_RELOC_ALPHA_GPDISP_HI16
1916 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1917 "addend" in some special way.
1918 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1919 writing; when reading, it will be the absolute section symbol. The
1920 addend is the displacement in bytes of the "lda" instruction from
1921 the "ldah" instruction (which is at the address of this reloc).
1923 BFD_RELOC_ALPHA_GPDISP_LO16
1925 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1926 with GPDISP_HI16 relocs. The addend is ignored when writing the
1927 relocations out, and is filled in with the file's GP value on
1928 reading, for convenience.
1931 BFD_RELOC_ALPHA_GPDISP
1933 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1934 relocation except that there is no accompanying GPDISP_LO16
1938 BFD_RELOC_ALPHA_LITERAL
1940 BFD_RELOC_ALPHA_ELF_LITERAL
1942 BFD_RELOC_ALPHA_LITUSE
1944 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1945 the assembler turns it into a LDQ instruction to load the address of
1946 the symbol, and then fills in a register in the real instruction.
1948 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1949 section symbol. The addend is ignored when writing, but is filled
1950 in with the file's GP value on reading, for convenience, as with the
1953 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1954 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1955 but it generates output not based on the position within the .got
1956 section, but relative to the GP value chosen for the file during the
1959 The LITUSE reloc, on the instruction using the loaded address, gives
1960 information to the linker that it might be able to use to optimize
1961 away some literal section references. The symbol is ignored (read
1962 as the absolute section symbol), and the "addend" indicates the type
1963 of instruction using the register:
1964 1 - "memory" fmt insn
1965 2 - byte-manipulation (byte offset reg)
1966 3 - jsr (target of branch)
1969 BFD_RELOC_ALPHA_HINT
1971 The HINT relocation indicates a value that should be filled into the
1972 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1973 prediction logic which may be provided on some processors.
1976 BFD_RELOC_ALPHA_LINKAGE
1978 The LINKAGE relocation outputs a linkage pair in the object file,
1979 which is filled by the linker.
1982 BFD_RELOC_ALPHA_CODEADDR
1984 The CODEADDR relocation outputs a STO_CA in the object file,
1985 which is filled by the linker.
1988 BFD_RELOC_ALPHA_GPREL_HI16
1990 BFD_RELOC_ALPHA_GPREL_LO16
1992 The GPREL_HI/LO relocations together form a 32-bit offset from the
1996 BFD_RELOC_ALPHA_BRSGP
1998 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
1999 share a common GP, and the target address is adjusted for
2000 STO_ALPHA_STD_GPLOAD.
2003 BFD_RELOC_ALPHA_TLSGD
2005 BFD_RELOC_ALPHA_TLSLDM
2007 BFD_RELOC_ALPHA_DTPMOD64
2009 BFD_RELOC_ALPHA_GOTDTPREL16
2011 BFD_RELOC_ALPHA_DTPREL64
2013 BFD_RELOC_ALPHA_DTPREL_HI16
2015 BFD_RELOC_ALPHA_DTPREL_LO16
2017 BFD_RELOC_ALPHA_DTPREL16
2019 BFD_RELOC_ALPHA_GOTTPREL16
2021 BFD_RELOC_ALPHA_TPREL64
2023 BFD_RELOC_ALPHA_TPREL_HI16
2025 BFD_RELOC_ALPHA_TPREL_LO16
2027 BFD_RELOC_ALPHA_TPREL16
2029 Alpha thread-local storage relocations.
2034 Bits 27..2 of the relocation address shifted right 2 bits;
2035 simple reloc otherwise.
2038 BFD_RELOC_MIPS16_JMP
2040 The MIPS16 jump instruction.
2043 BFD_RELOC_MIPS16_GPREL
2045 MIPS16 GP relative reloc.
2050 High 16 bits of 32-bit value; simple reloc.
2054 High 16 bits of 32-bit value but the low 16 bits will be sign
2055 extended and added to form the final result. If the low 16
2056 bits form a negative number, we need to add one to the high value
2057 to compensate for the borrow when the low bits are added.
2064 BFD_RELOC_HI16_PCREL
2066 High 16 bits of 32-bit pc-relative value
2068 BFD_RELOC_HI16_S_PCREL
2070 High 16 bits of 32-bit pc-relative value, adjusted
2072 BFD_RELOC_LO16_PCREL
2074 Low 16 bits of pc-relative value
2077 BFD_RELOC_MIPS16_HI16
2079 MIPS16 high 16 bits of 32-bit value.
2081 BFD_RELOC_MIPS16_HI16_S
2083 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2084 extended and added to form the final result. If the low 16
2085 bits form a negative number, we need to add one to the high value
2086 to compensate for the borrow when the low bits are added.
2088 BFD_RELOC_MIPS16_LO16
2093 BFD_RELOC_MIPS_LITERAL
2095 Relocation against a MIPS literal section.
2098 BFD_RELOC_MIPS_GOT16
2100 BFD_RELOC_MIPS_CALL16
2102 BFD_RELOC_MIPS_GOT_HI16
2104 BFD_RELOC_MIPS_GOT_LO16
2106 BFD_RELOC_MIPS_CALL_HI16
2108 BFD_RELOC_MIPS_CALL_LO16
2112 BFD_RELOC_MIPS_GOT_PAGE
2114 BFD_RELOC_MIPS_GOT_OFST
2116 BFD_RELOC_MIPS_GOT_DISP
2118 BFD_RELOC_MIPS_SHIFT5
2120 BFD_RELOC_MIPS_SHIFT6
2122 BFD_RELOC_MIPS_INSERT_A
2124 BFD_RELOC_MIPS_INSERT_B
2126 BFD_RELOC_MIPS_DELETE
2128 BFD_RELOC_MIPS_HIGHEST
2130 BFD_RELOC_MIPS_HIGHER
2132 BFD_RELOC_MIPS_SCN_DISP
2134 BFD_RELOC_MIPS_REL16
2136 BFD_RELOC_MIPS_RELGOT
2140 BFD_RELOC_MIPS_TLS_DTPMOD32
2142 BFD_RELOC_MIPS_TLS_DTPREL32
2144 BFD_RELOC_MIPS_TLS_DTPMOD64
2146 BFD_RELOC_MIPS_TLS_DTPREL64
2148 BFD_RELOC_MIPS_TLS_GD
2150 BFD_RELOC_MIPS_TLS_LDM
2152 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2154 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2156 BFD_RELOC_MIPS_TLS_GOTTPREL
2158 BFD_RELOC_MIPS_TLS_TPREL32
2160 BFD_RELOC_MIPS_TLS_TPREL64
2162 BFD_RELOC_MIPS_TLS_TPREL_HI16
2164 BFD_RELOC_MIPS_TLS_TPREL_LO16
2166 MIPS ELF relocations.
2172 BFD_RELOC_MIPS_JUMP_SLOT
2174 MIPS ELF relocations (VxWorks extensions).
2178 BFD_RELOC_FRV_LABEL16
2180 BFD_RELOC_FRV_LABEL24
2186 BFD_RELOC_FRV_GPREL12
2188 BFD_RELOC_FRV_GPRELU12
2190 BFD_RELOC_FRV_GPREL32
2192 BFD_RELOC_FRV_GPRELHI
2194 BFD_RELOC_FRV_GPRELLO
2202 BFD_RELOC_FRV_FUNCDESC
2204 BFD_RELOC_FRV_FUNCDESC_GOT12
2206 BFD_RELOC_FRV_FUNCDESC_GOTHI
2208 BFD_RELOC_FRV_FUNCDESC_GOTLO
2210 BFD_RELOC_FRV_FUNCDESC_VALUE
2212 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2214 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2216 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2218 BFD_RELOC_FRV_GOTOFF12
2220 BFD_RELOC_FRV_GOTOFFHI
2222 BFD_RELOC_FRV_GOTOFFLO
2224 BFD_RELOC_FRV_GETTLSOFF
2226 BFD_RELOC_FRV_TLSDESC_VALUE
2228 BFD_RELOC_FRV_GOTTLSDESC12
2230 BFD_RELOC_FRV_GOTTLSDESCHI
2232 BFD_RELOC_FRV_GOTTLSDESCLO
2234 BFD_RELOC_FRV_TLSMOFF12
2236 BFD_RELOC_FRV_TLSMOFFHI
2238 BFD_RELOC_FRV_TLSMOFFLO
2240 BFD_RELOC_FRV_GOTTLSOFF12
2242 BFD_RELOC_FRV_GOTTLSOFFHI
2244 BFD_RELOC_FRV_GOTTLSOFFLO
2246 BFD_RELOC_FRV_TLSOFF
2248 BFD_RELOC_FRV_TLSDESC_RELAX
2250 BFD_RELOC_FRV_GETTLSOFF_RELAX
2252 BFD_RELOC_FRV_TLSOFF_RELAX
2254 BFD_RELOC_FRV_TLSMOFF
2256 Fujitsu Frv Relocations.
2260 BFD_RELOC_MN10300_GOTOFF24
2262 This is a 24bit GOT-relative reloc for the mn10300.
2264 BFD_RELOC_MN10300_GOT32
2266 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2269 BFD_RELOC_MN10300_GOT24
2271 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2274 BFD_RELOC_MN10300_GOT16
2276 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2279 BFD_RELOC_MN10300_COPY
2281 Copy symbol at runtime.
2283 BFD_RELOC_MN10300_GLOB_DAT
2287 BFD_RELOC_MN10300_JMP_SLOT
2291 BFD_RELOC_MN10300_RELATIVE
2293 Adjust by program base.
2303 BFD_RELOC_386_GLOB_DAT
2305 BFD_RELOC_386_JUMP_SLOT
2307 BFD_RELOC_386_RELATIVE
2309 BFD_RELOC_386_GOTOFF
2313 BFD_RELOC_386_TLS_TPOFF
2315 BFD_RELOC_386_TLS_IE
2317 BFD_RELOC_386_TLS_GOTIE
2319 BFD_RELOC_386_TLS_LE
2321 BFD_RELOC_386_TLS_GD
2323 BFD_RELOC_386_TLS_LDM
2325 BFD_RELOC_386_TLS_LDO_32
2327 BFD_RELOC_386_TLS_IE_32
2329 BFD_RELOC_386_TLS_LE_32
2331 BFD_RELOC_386_TLS_DTPMOD32
2333 BFD_RELOC_386_TLS_DTPOFF32
2335 BFD_RELOC_386_TLS_TPOFF32
2337 BFD_RELOC_386_TLS_GOTDESC
2339 BFD_RELOC_386_TLS_DESC_CALL
2341 BFD_RELOC_386_TLS_DESC
2343 i386/elf relocations
2346 BFD_RELOC_X86_64_GOT32
2348 BFD_RELOC_X86_64_PLT32
2350 BFD_RELOC_X86_64_COPY
2352 BFD_RELOC_X86_64_GLOB_DAT
2354 BFD_RELOC_X86_64_JUMP_SLOT
2356 BFD_RELOC_X86_64_RELATIVE
2358 BFD_RELOC_X86_64_GOTPCREL
2360 BFD_RELOC_X86_64_32S
2362 BFD_RELOC_X86_64_DTPMOD64
2364 BFD_RELOC_X86_64_DTPOFF64
2366 BFD_RELOC_X86_64_TPOFF64
2368 BFD_RELOC_X86_64_TLSGD
2370 BFD_RELOC_X86_64_TLSLD
2372 BFD_RELOC_X86_64_DTPOFF32
2374 BFD_RELOC_X86_64_GOTTPOFF
2376 BFD_RELOC_X86_64_TPOFF32
2378 BFD_RELOC_X86_64_GOTOFF64
2380 BFD_RELOC_X86_64_GOTPC32
2382 BFD_RELOC_X86_64_GOT64
2384 BFD_RELOC_X86_64_GOTPCREL64
2386 BFD_RELOC_X86_64_GOTPC64
2388 BFD_RELOC_X86_64_GOTPLT64
2390 BFD_RELOC_X86_64_PLTOFF64
2392 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2394 BFD_RELOC_X86_64_TLSDESC_CALL
2396 BFD_RELOC_X86_64_TLSDESC
2398 x86-64/elf relocations
2401 BFD_RELOC_NS32K_IMM_8
2403 BFD_RELOC_NS32K_IMM_16
2405 BFD_RELOC_NS32K_IMM_32
2407 BFD_RELOC_NS32K_IMM_8_PCREL
2409 BFD_RELOC_NS32K_IMM_16_PCREL
2411 BFD_RELOC_NS32K_IMM_32_PCREL
2413 BFD_RELOC_NS32K_DISP_8
2415 BFD_RELOC_NS32K_DISP_16
2417 BFD_RELOC_NS32K_DISP_32
2419 BFD_RELOC_NS32K_DISP_8_PCREL
2421 BFD_RELOC_NS32K_DISP_16_PCREL
2423 BFD_RELOC_NS32K_DISP_32_PCREL
2428 BFD_RELOC_PDP11_DISP_8_PCREL
2430 BFD_RELOC_PDP11_DISP_6_PCREL
2435 BFD_RELOC_PJ_CODE_HI16
2437 BFD_RELOC_PJ_CODE_LO16
2439 BFD_RELOC_PJ_CODE_DIR16
2441 BFD_RELOC_PJ_CODE_DIR32
2443 BFD_RELOC_PJ_CODE_REL16
2445 BFD_RELOC_PJ_CODE_REL32
2447 Picojava relocs. Not all of these appear in object files.
2458 BFD_RELOC_PPC_B16_BRTAKEN
2460 BFD_RELOC_PPC_B16_BRNTAKEN
2464 BFD_RELOC_PPC_BA16_BRTAKEN
2466 BFD_RELOC_PPC_BA16_BRNTAKEN
2470 BFD_RELOC_PPC_GLOB_DAT
2472 BFD_RELOC_PPC_JMP_SLOT
2474 BFD_RELOC_PPC_RELATIVE
2476 BFD_RELOC_PPC_LOCAL24PC
2478 BFD_RELOC_PPC_EMB_NADDR32
2480 BFD_RELOC_PPC_EMB_NADDR16
2482 BFD_RELOC_PPC_EMB_NADDR16_LO
2484 BFD_RELOC_PPC_EMB_NADDR16_HI
2486 BFD_RELOC_PPC_EMB_NADDR16_HA
2488 BFD_RELOC_PPC_EMB_SDAI16
2490 BFD_RELOC_PPC_EMB_SDA2I16
2492 BFD_RELOC_PPC_EMB_SDA2REL
2494 BFD_RELOC_PPC_EMB_SDA21
2496 BFD_RELOC_PPC_EMB_MRKREF
2498 BFD_RELOC_PPC_EMB_RELSEC16
2500 BFD_RELOC_PPC_EMB_RELST_LO
2502 BFD_RELOC_PPC_EMB_RELST_HI
2504 BFD_RELOC_PPC_EMB_RELST_HA
2506 BFD_RELOC_PPC_EMB_BIT_FLD
2508 BFD_RELOC_PPC_EMB_RELSDA
2510 BFD_RELOC_PPC64_HIGHER
2512 BFD_RELOC_PPC64_HIGHER_S
2514 BFD_RELOC_PPC64_HIGHEST
2516 BFD_RELOC_PPC64_HIGHEST_S
2518 BFD_RELOC_PPC64_TOC16_LO
2520 BFD_RELOC_PPC64_TOC16_HI
2522 BFD_RELOC_PPC64_TOC16_HA
2526 BFD_RELOC_PPC64_PLTGOT16
2528 BFD_RELOC_PPC64_PLTGOT16_LO
2530 BFD_RELOC_PPC64_PLTGOT16_HI
2532 BFD_RELOC_PPC64_PLTGOT16_HA
2534 BFD_RELOC_PPC64_ADDR16_DS
2536 BFD_RELOC_PPC64_ADDR16_LO_DS
2538 BFD_RELOC_PPC64_GOT16_DS
2540 BFD_RELOC_PPC64_GOT16_LO_DS
2542 BFD_RELOC_PPC64_PLT16_LO_DS
2544 BFD_RELOC_PPC64_SECTOFF_DS
2546 BFD_RELOC_PPC64_SECTOFF_LO_DS
2548 BFD_RELOC_PPC64_TOC16_DS
2550 BFD_RELOC_PPC64_TOC16_LO_DS
2552 BFD_RELOC_PPC64_PLTGOT16_DS
2554 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2556 Power(rs6000) and PowerPC relocations.
2561 BFD_RELOC_PPC_DTPMOD
2563 BFD_RELOC_PPC_TPREL16
2565 BFD_RELOC_PPC_TPREL16_LO
2567 BFD_RELOC_PPC_TPREL16_HI
2569 BFD_RELOC_PPC_TPREL16_HA
2573 BFD_RELOC_PPC_DTPREL16
2575 BFD_RELOC_PPC_DTPREL16_LO
2577 BFD_RELOC_PPC_DTPREL16_HI
2579 BFD_RELOC_PPC_DTPREL16_HA
2581 BFD_RELOC_PPC_DTPREL
2583 BFD_RELOC_PPC_GOT_TLSGD16
2585 BFD_RELOC_PPC_GOT_TLSGD16_LO
2587 BFD_RELOC_PPC_GOT_TLSGD16_HI
2589 BFD_RELOC_PPC_GOT_TLSGD16_HA
2591 BFD_RELOC_PPC_GOT_TLSLD16
2593 BFD_RELOC_PPC_GOT_TLSLD16_LO
2595 BFD_RELOC_PPC_GOT_TLSLD16_HI
2597 BFD_RELOC_PPC_GOT_TLSLD16_HA
2599 BFD_RELOC_PPC_GOT_TPREL16
2601 BFD_RELOC_PPC_GOT_TPREL16_LO
2603 BFD_RELOC_PPC_GOT_TPREL16_HI
2605 BFD_RELOC_PPC_GOT_TPREL16_HA
2607 BFD_RELOC_PPC_GOT_DTPREL16
2609 BFD_RELOC_PPC_GOT_DTPREL16_LO
2611 BFD_RELOC_PPC_GOT_DTPREL16_HI
2613 BFD_RELOC_PPC_GOT_DTPREL16_HA
2615 BFD_RELOC_PPC64_TPREL16_DS
2617 BFD_RELOC_PPC64_TPREL16_LO_DS
2619 BFD_RELOC_PPC64_TPREL16_HIGHER
2621 BFD_RELOC_PPC64_TPREL16_HIGHERA
2623 BFD_RELOC_PPC64_TPREL16_HIGHEST
2625 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2627 BFD_RELOC_PPC64_DTPREL16_DS
2629 BFD_RELOC_PPC64_DTPREL16_LO_DS
2631 BFD_RELOC_PPC64_DTPREL16_HIGHER
2633 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2635 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2637 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2639 PowerPC and PowerPC64 thread-local storage relocations.
2644 IBM 370/390 relocations
2649 The type of reloc used to build a constructor table - at the moment
2650 probably a 32 bit wide absolute relocation, but the target can choose.
2651 It generally does map to one of the other relocation types.
2654 BFD_RELOC_ARM_PCREL_BRANCH
2656 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2657 not stored in the instruction.
2659 BFD_RELOC_ARM_PCREL_BLX
2661 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2662 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2663 field in the instruction.
2665 BFD_RELOC_THUMB_PCREL_BLX
2667 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2668 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2669 field in the instruction.
2671 BFD_RELOC_ARM_PCREL_CALL
2673 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
2675 BFD_RELOC_ARM_PCREL_JUMP
2677 ARM 26-bit pc-relative branch for B or conditional BL instruction.
2680 BFD_RELOC_THUMB_PCREL_BRANCH7
2682 BFD_RELOC_THUMB_PCREL_BRANCH9
2684 BFD_RELOC_THUMB_PCREL_BRANCH12
2686 BFD_RELOC_THUMB_PCREL_BRANCH20
2688 BFD_RELOC_THUMB_PCREL_BRANCH23
2690 BFD_RELOC_THUMB_PCREL_BRANCH25
2692 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
2693 The lowest bit must be zero and is not stored in the instruction.
2694 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
2695 "nn" one smaller in all cases. Note further that BRANCH23
2696 corresponds to R_ARM_THM_CALL.
2699 BFD_RELOC_ARM_OFFSET_IMM
2701 12-bit immediate offset, used in ARM-format ldr and str instructions.
2704 BFD_RELOC_ARM_THUMB_OFFSET
2706 5-bit immediate offset, used in Thumb-format ldr and str instructions.
2709 BFD_RELOC_ARM_TARGET1
2711 Pc-relative or absolute relocation depending on target. Used for
2712 entries in .init_array sections.
2714 BFD_RELOC_ARM_ROSEGREL32
2716 Read-only segment base relative address.
2718 BFD_RELOC_ARM_SBREL32
2720 Data segment base relative address.
2722 BFD_RELOC_ARM_TARGET2
2724 This reloc is used for references to RTTI data from exception handling
2725 tables. The actual definition depends on the target. It may be a
2726 pc-relative or some form of GOT-indirect relocation.
2728 BFD_RELOC_ARM_PREL31
2730 31-bit PC relative address.
2736 BFD_RELOC_ARM_MOVW_PCREL
2738 BFD_RELOC_ARM_MOVT_PCREL
2740 BFD_RELOC_ARM_THUMB_MOVW
2742 BFD_RELOC_ARM_THUMB_MOVT
2744 BFD_RELOC_ARM_THUMB_MOVW_PCREL
2746 BFD_RELOC_ARM_THUMB_MOVT_PCREL
2748 Low and High halfword relocations for MOVW and MOVT instructions.
2751 BFD_RELOC_ARM_JUMP_SLOT
2753 BFD_RELOC_ARM_GLOB_DAT
2759 BFD_RELOC_ARM_RELATIVE
2761 BFD_RELOC_ARM_GOTOFF
2765 Relocations for setting up GOTs and PLTs for shared libraries.
2768 BFD_RELOC_ARM_TLS_GD32
2770 BFD_RELOC_ARM_TLS_LDO32
2772 BFD_RELOC_ARM_TLS_LDM32
2774 BFD_RELOC_ARM_TLS_DTPOFF32
2776 BFD_RELOC_ARM_TLS_DTPMOD32
2778 BFD_RELOC_ARM_TLS_TPOFF32
2780 BFD_RELOC_ARM_TLS_IE32
2782 BFD_RELOC_ARM_TLS_LE32
2784 ARM thread-local storage relocations.
2787 BFD_RELOC_ARM_ALU_PC_G0_NC
2789 BFD_RELOC_ARM_ALU_PC_G0
2791 BFD_RELOC_ARM_ALU_PC_G1_NC
2793 BFD_RELOC_ARM_ALU_PC_G1
2795 BFD_RELOC_ARM_ALU_PC_G2
2797 BFD_RELOC_ARM_LDR_PC_G0
2799 BFD_RELOC_ARM_LDR_PC_G1
2801 BFD_RELOC_ARM_LDR_PC_G2
2803 BFD_RELOC_ARM_LDRS_PC_G0
2805 BFD_RELOC_ARM_LDRS_PC_G1
2807 BFD_RELOC_ARM_LDRS_PC_G2
2809 BFD_RELOC_ARM_LDC_PC_G0
2811 BFD_RELOC_ARM_LDC_PC_G1
2813 BFD_RELOC_ARM_LDC_PC_G2
2815 BFD_RELOC_ARM_ALU_SB_G0_NC
2817 BFD_RELOC_ARM_ALU_SB_G0
2819 BFD_RELOC_ARM_ALU_SB_G1_NC
2821 BFD_RELOC_ARM_ALU_SB_G1
2823 BFD_RELOC_ARM_ALU_SB_G2
2825 BFD_RELOC_ARM_LDR_SB_G0
2827 BFD_RELOC_ARM_LDR_SB_G1
2829 BFD_RELOC_ARM_LDR_SB_G2
2831 BFD_RELOC_ARM_LDRS_SB_G0
2833 BFD_RELOC_ARM_LDRS_SB_G1
2835 BFD_RELOC_ARM_LDRS_SB_G2
2837 BFD_RELOC_ARM_LDC_SB_G0
2839 BFD_RELOC_ARM_LDC_SB_G1
2841 BFD_RELOC_ARM_LDC_SB_G2
2843 ARM group relocations.
2846 BFD_RELOC_ARM_IMMEDIATE
2848 BFD_RELOC_ARM_ADRL_IMMEDIATE
2850 BFD_RELOC_ARM_T32_IMMEDIATE
2852 BFD_RELOC_ARM_T32_ADD_IMM
2854 BFD_RELOC_ARM_T32_IMM12
2856 BFD_RELOC_ARM_T32_ADD_PC12
2858 BFD_RELOC_ARM_SHIFT_IMM
2866 BFD_RELOC_ARM_CP_OFF_IMM
2868 BFD_RELOC_ARM_CP_OFF_IMM_S2
2870 BFD_RELOC_ARM_T32_CP_OFF_IMM
2872 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
2874 BFD_RELOC_ARM_ADR_IMM
2876 BFD_RELOC_ARM_LDR_IMM
2878 BFD_RELOC_ARM_LITERAL
2880 BFD_RELOC_ARM_IN_POOL
2882 BFD_RELOC_ARM_OFFSET_IMM8
2884 BFD_RELOC_ARM_T32_OFFSET_U8
2886 BFD_RELOC_ARM_T32_OFFSET_IMM
2888 BFD_RELOC_ARM_HWLITERAL
2890 BFD_RELOC_ARM_THUMB_ADD
2892 BFD_RELOC_ARM_THUMB_IMM
2894 BFD_RELOC_ARM_THUMB_SHIFT
2896 These relocs are only used within the ARM assembler. They are not
2897 (at present) written to any object files.
2900 BFD_RELOC_SH_PCDISP8BY2
2902 BFD_RELOC_SH_PCDISP12BY2
2910 BFD_RELOC_SH_DISP12BY2
2912 BFD_RELOC_SH_DISP12BY4
2914 BFD_RELOC_SH_DISP12BY8
2918 BFD_RELOC_SH_DISP20BY8
2922 BFD_RELOC_SH_IMM4BY2
2924 BFD_RELOC_SH_IMM4BY4
2928 BFD_RELOC_SH_IMM8BY2
2930 BFD_RELOC_SH_IMM8BY4
2932 BFD_RELOC_SH_PCRELIMM8BY2
2934 BFD_RELOC_SH_PCRELIMM8BY4
2936 BFD_RELOC_SH_SWITCH16
2938 BFD_RELOC_SH_SWITCH32
2952 BFD_RELOC_SH_LOOP_START
2954 BFD_RELOC_SH_LOOP_END
2958 BFD_RELOC_SH_GLOB_DAT
2960 BFD_RELOC_SH_JMP_SLOT
2962 BFD_RELOC_SH_RELATIVE
2966 BFD_RELOC_SH_GOT_LOW16
2968 BFD_RELOC_SH_GOT_MEDLOW16
2970 BFD_RELOC_SH_GOT_MEDHI16
2972 BFD_RELOC_SH_GOT_HI16
2974 BFD_RELOC_SH_GOTPLT_LOW16
2976 BFD_RELOC_SH_GOTPLT_MEDLOW16
2978 BFD_RELOC_SH_GOTPLT_MEDHI16
2980 BFD_RELOC_SH_GOTPLT_HI16
2982 BFD_RELOC_SH_PLT_LOW16
2984 BFD_RELOC_SH_PLT_MEDLOW16
2986 BFD_RELOC_SH_PLT_MEDHI16
2988 BFD_RELOC_SH_PLT_HI16
2990 BFD_RELOC_SH_GOTOFF_LOW16
2992 BFD_RELOC_SH_GOTOFF_MEDLOW16
2994 BFD_RELOC_SH_GOTOFF_MEDHI16
2996 BFD_RELOC_SH_GOTOFF_HI16
2998 BFD_RELOC_SH_GOTPC_LOW16
3000 BFD_RELOC_SH_GOTPC_MEDLOW16
3002 BFD_RELOC_SH_GOTPC_MEDHI16
3004 BFD_RELOC_SH_GOTPC_HI16
3008 BFD_RELOC_SH_GLOB_DAT64
3010 BFD_RELOC_SH_JMP_SLOT64
3012 BFD_RELOC_SH_RELATIVE64
3014 BFD_RELOC_SH_GOT10BY4
3016 BFD_RELOC_SH_GOT10BY8
3018 BFD_RELOC_SH_GOTPLT10BY4
3020 BFD_RELOC_SH_GOTPLT10BY8
3022 BFD_RELOC_SH_GOTPLT32
3024 BFD_RELOC_SH_SHMEDIA_CODE
3030 BFD_RELOC_SH_IMMS6BY32
3036 BFD_RELOC_SH_IMMS10BY2
3038 BFD_RELOC_SH_IMMS10BY4
3040 BFD_RELOC_SH_IMMS10BY8
3046 BFD_RELOC_SH_IMM_LOW16
3048 BFD_RELOC_SH_IMM_LOW16_PCREL
3050 BFD_RELOC_SH_IMM_MEDLOW16
3052 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3054 BFD_RELOC_SH_IMM_MEDHI16
3056 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3058 BFD_RELOC_SH_IMM_HI16
3060 BFD_RELOC_SH_IMM_HI16_PCREL
3064 BFD_RELOC_SH_TLS_GD_32
3066 BFD_RELOC_SH_TLS_LD_32
3068 BFD_RELOC_SH_TLS_LDO_32
3070 BFD_RELOC_SH_TLS_IE_32
3072 BFD_RELOC_SH_TLS_LE_32
3074 BFD_RELOC_SH_TLS_DTPMOD32
3076 BFD_RELOC_SH_TLS_DTPOFF32
3078 BFD_RELOC_SH_TLS_TPOFF32
3080 Renesas / SuperH SH relocs. Not all of these appear in object files.
3083 BFD_RELOC_ARC_B22_PCREL
3086 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
3087 not stored in the instruction. The high 20 bits are installed in bits 26
3088 through 7 of the instruction.
3092 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
3093 stored in the instruction. The high 24 bits are installed in bits 23
3097 BFD_RELOC_BFIN_16_IMM
3099 ADI Blackfin 16 bit immediate absolute reloc.
3101 BFD_RELOC_BFIN_16_HIGH
3103 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3105 BFD_RELOC_BFIN_4_PCREL
3107 ADI Blackfin 'a' part of LSETUP.
3109 BFD_RELOC_BFIN_5_PCREL
3113 BFD_RELOC_BFIN_16_LOW
3115 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3117 BFD_RELOC_BFIN_10_PCREL
3121 BFD_RELOC_BFIN_11_PCREL
3123 ADI Blackfin 'b' part of LSETUP.
3125 BFD_RELOC_BFIN_12_PCREL_JUMP
3129 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3131 ADI Blackfin Short jump, pcrel.
3133 BFD_RELOC_BFIN_24_PCREL_CALL_X
3135 ADI Blackfin Call.x not implemented.
3137 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3139 ADI Blackfin Long Jump pcrel.
3141 BFD_RELOC_BFIN_GOT17M4
3143 BFD_RELOC_BFIN_GOTHI
3145 BFD_RELOC_BFIN_GOTLO
3147 BFD_RELOC_BFIN_FUNCDESC
3149 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3151 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3153 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3155 BFD_RELOC_BFIN_FUNCDESC_VALUE
3157 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3159 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3161 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3163 BFD_RELOC_BFIN_GOTOFF17M4
3165 BFD_RELOC_BFIN_GOTOFFHI
3167 BFD_RELOC_BFIN_GOTOFFLO
3169 ADI Blackfin FD-PIC relocations.
3173 ADI Blackfin GOT relocation.
3175 BFD_RELOC_BFIN_PLTPC
3177 ADI Blackfin PLTPC relocation.
3179 BFD_ARELOC_BFIN_PUSH
3181 ADI Blackfin arithmetic relocation.
3183 BFD_ARELOC_BFIN_CONST
3185 ADI Blackfin arithmetic relocation.
3189 ADI Blackfin arithmetic relocation.
3193 ADI Blackfin arithmetic relocation.
3195 BFD_ARELOC_BFIN_MULT
3197 ADI Blackfin arithmetic relocation.
3201 ADI Blackfin arithmetic relocation.
3205 ADI Blackfin arithmetic relocation.
3207 BFD_ARELOC_BFIN_LSHIFT
3209 ADI Blackfin arithmetic relocation.
3211 BFD_ARELOC_BFIN_RSHIFT
3213 ADI Blackfin arithmetic relocation.
3217 ADI Blackfin arithmetic relocation.
3221 ADI Blackfin arithmetic relocation.
3225 ADI Blackfin arithmetic relocation.
3227 BFD_ARELOC_BFIN_LAND
3229 ADI Blackfin arithmetic relocation.
3233 ADI Blackfin arithmetic relocation.
3237 ADI Blackfin arithmetic relocation.
3241 ADI Blackfin arithmetic relocation.
3243 BFD_ARELOC_BFIN_COMP
3245 ADI Blackfin arithmetic relocation.
3247 BFD_ARELOC_BFIN_PAGE
3249 ADI Blackfin arithmetic relocation.
3251 BFD_ARELOC_BFIN_HWPAGE
3253 ADI Blackfin arithmetic relocation.
3255 BFD_ARELOC_BFIN_ADDR
3257 ADI Blackfin arithmetic relocation.
3260 BFD_RELOC_D10V_10_PCREL_R
3262 Mitsubishi D10V relocs.
3263 This is a 10-bit reloc with the right 2 bits
3266 BFD_RELOC_D10V_10_PCREL_L
3268 Mitsubishi D10V relocs.
3269 This is a 10-bit reloc with the right 2 bits
3270 assumed to be 0. This is the same as the previous reloc
3271 except it is in the left container, i.e.,
3272 shifted left 15 bits.
3276 This is an 18-bit reloc with the right 2 bits
3279 BFD_RELOC_D10V_18_PCREL
3281 This is an 18-bit reloc with the right 2 bits
3287 Mitsubishi D30V relocs.
3288 This is a 6-bit absolute reloc.
3290 BFD_RELOC_D30V_9_PCREL
3292 This is a 6-bit pc-relative reloc with
3293 the right 3 bits assumed to be 0.
3295 BFD_RELOC_D30V_9_PCREL_R
3297 This is a 6-bit pc-relative reloc with
3298 the right 3 bits assumed to be 0. Same
3299 as the previous reloc but on the right side
3304 This is a 12-bit absolute reloc with the
3305 right 3 bitsassumed to be 0.
3307 BFD_RELOC_D30V_15_PCREL
3309 This is a 12-bit pc-relative reloc with
3310 the right 3 bits assumed to be 0.
3312 BFD_RELOC_D30V_15_PCREL_R
3314 This is a 12-bit pc-relative reloc with
3315 the right 3 bits assumed to be 0. Same
3316 as the previous reloc but on the right side
3321 This is an 18-bit absolute reloc with
3322 the right 3 bits assumed to be 0.
3324 BFD_RELOC_D30V_21_PCREL
3326 This is an 18-bit pc-relative reloc with
3327 the right 3 bits assumed to be 0.
3329 BFD_RELOC_D30V_21_PCREL_R
3331 This is an 18-bit pc-relative reloc with
3332 the right 3 bits assumed to be 0. Same
3333 as the previous reloc but on the right side
3338 This is a 32-bit absolute reloc.
3340 BFD_RELOC_D30V_32_PCREL
3342 This is a 32-bit pc-relative reloc.
3345 BFD_RELOC_DLX_HI16_S
3360 BFD_RELOC_M32C_RL_JUMP
3362 BFD_RELOC_M32C_RL_1ADDR
3364 BFD_RELOC_M32C_RL_2ADDR
3366 Renesas M16C/M32C Relocations.
3371 Renesas M32R (formerly Mitsubishi M32R) relocs.
3372 This is a 24 bit absolute address.
3374 BFD_RELOC_M32R_10_PCREL
3376 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3378 BFD_RELOC_M32R_18_PCREL
3380 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3382 BFD_RELOC_M32R_26_PCREL
3384 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3386 BFD_RELOC_M32R_HI16_ULO
3388 This is a 16-bit reloc containing the high 16 bits of an address
3389 used when the lower 16 bits are treated as unsigned.
3391 BFD_RELOC_M32R_HI16_SLO
3393 This is a 16-bit reloc containing the high 16 bits of an address
3394 used when the lower 16 bits are treated as signed.
3398 This is a 16-bit reloc containing the lower 16 bits of an address.
3400 BFD_RELOC_M32R_SDA16
3402 This is a 16-bit reloc containing the small data area offset for use in
3403 add3, load, and store instructions.
3405 BFD_RELOC_M32R_GOT24
3407 BFD_RELOC_M32R_26_PLTREL
3411 BFD_RELOC_M32R_GLOB_DAT
3413 BFD_RELOC_M32R_JMP_SLOT
3415 BFD_RELOC_M32R_RELATIVE
3417 BFD_RELOC_M32R_GOTOFF
3419 BFD_RELOC_M32R_GOTOFF_HI_ULO
3421 BFD_RELOC_M32R_GOTOFF_HI_SLO
3423 BFD_RELOC_M32R_GOTOFF_LO
3425 BFD_RELOC_M32R_GOTPC24
3427 BFD_RELOC_M32R_GOT16_HI_ULO
3429 BFD_RELOC_M32R_GOT16_HI_SLO
3431 BFD_RELOC_M32R_GOT16_LO
3433 BFD_RELOC_M32R_GOTPC_HI_ULO
3435 BFD_RELOC_M32R_GOTPC_HI_SLO
3437 BFD_RELOC_M32R_GOTPC_LO
3443 BFD_RELOC_V850_9_PCREL
3445 This is a 9-bit reloc
3447 BFD_RELOC_V850_22_PCREL
3449 This is a 22-bit reloc
3452 BFD_RELOC_V850_SDA_16_16_OFFSET
3454 This is a 16 bit offset from the short data area pointer.
3456 BFD_RELOC_V850_SDA_15_16_OFFSET
3458 This is a 16 bit offset (of which only 15 bits are used) from the
3459 short data area pointer.
3461 BFD_RELOC_V850_ZDA_16_16_OFFSET
3463 This is a 16 bit offset from the zero data area pointer.
3465 BFD_RELOC_V850_ZDA_15_16_OFFSET
3467 This is a 16 bit offset (of which only 15 bits are used) from the
3468 zero data area pointer.
3470 BFD_RELOC_V850_TDA_6_8_OFFSET
3472 This is an 8 bit offset (of which only 6 bits are used) from the
3473 tiny data area pointer.
3475 BFD_RELOC_V850_TDA_7_8_OFFSET
3477 This is an 8bit offset (of which only 7 bits are used) from the tiny
3480 BFD_RELOC_V850_TDA_7_7_OFFSET
3482 This is a 7 bit offset from the tiny data area pointer.
3484 BFD_RELOC_V850_TDA_16_16_OFFSET
3486 This is a 16 bit offset from the tiny data area pointer.
3489 BFD_RELOC_V850_TDA_4_5_OFFSET
3491 This is a 5 bit offset (of which only 4 bits are used) from the tiny
3494 BFD_RELOC_V850_TDA_4_4_OFFSET
3496 This is a 4 bit offset from the tiny data area pointer.
3498 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
3500 This is a 16 bit offset from the short data area pointer, with the
3501 bits placed non-contiguously in the instruction.
3503 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
3505 This is a 16 bit offset from the zero data area pointer, with the
3506 bits placed non-contiguously in the instruction.
3508 BFD_RELOC_V850_CALLT_6_7_OFFSET
3510 This is a 6 bit offset from the call table base pointer.
3512 BFD_RELOC_V850_CALLT_16_16_OFFSET
3514 This is a 16 bit offset from the call table base pointer.
3516 BFD_RELOC_V850_LONGCALL
3518 Used for relaxing indirect function calls.
3520 BFD_RELOC_V850_LONGJUMP
3522 Used for relaxing indirect jumps.
3524 BFD_RELOC_V850_ALIGN
3526 Used to maintain alignment whilst relaxing.
3528 BFD_RELOC_V850_LO16_SPLIT_OFFSET
3530 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
3533 BFD_RELOC_MN10300_32_PCREL
3535 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3538 BFD_RELOC_MN10300_16_PCREL
3540 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3546 This is a 8bit DP reloc for the tms320c30, where the most
3547 significant 8 bits of a 24 bit word are placed into the least
3548 significant 8 bits of the opcode.
3551 BFD_RELOC_TIC54X_PARTLS7
3553 This is a 7bit reloc for the tms320c54x, where the least
3554 significant 7 bits of a 16 bit word are placed into the least
3555 significant 7 bits of the opcode.
3558 BFD_RELOC_TIC54X_PARTMS9
3560 This is a 9bit DP reloc for the tms320c54x, where the most
3561 significant 9 bits of a 16 bit word are placed into the least
3562 significant 9 bits of the opcode.
3567 This is an extended address 23-bit reloc for the tms320c54x.
3570 BFD_RELOC_TIC54X_16_OF_23
3572 This is a 16-bit reloc for the tms320c54x, where the least
3573 significant 16 bits of a 23-bit extended address are placed into
3577 BFD_RELOC_TIC54X_MS7_OF_23
3579 This is a reloc for the tms320c54x, where the most
3580 significant 7 bits of a 23-bit extended address are placed into
3586 This is a 48 bit reloc for the FR30 that stores 32 bits.
3590 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3593 BFD_RELOC_FR30_6_IN_4
3595 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3598 BFD_RELOC_FR30_8_IN_8
3600 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3603 BFD_RELOC_FR30_9_IN_8
3605 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3608 BFD_RELOC_FR30_10_IN_8
3610 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3613 BFD_RELOC_FR30_9_PCREL
3615 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3616 short offset into 8 bits.
3618 BFD_RELOC_FR30_12_PCREL
3620 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3621 short offset into 11 bits.
3624 BFD_RELOC_MCORE_PCREL_IMM8BY4
3626 BFD_RELOC_MCORE_PCREL_IMM11BY2
3628 BFD_RELOC_MCORE_PCREL_IMM4BY2
3630 BFD_RELOC_MCORE_PCREL_32
3632 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3636 Motorola Mcore relocations.
3641 BFD_RELOC_MMIX_GETA_1
3643 BFD_RELOC_MMIX_GETA_2
3645 BFD_RELOC_MMIX_GETA_3
3647 These are relocations for the GETA instruction.
3649 BFD_RELOC_MMIX_CBRANCH
3651 BFD_RELOC_MMIX_CBRANCH_J
3653 BFD_RELOC_MMIX_CBRANCH_1
3655 BFD_RELOC_MMIX_CBRANCH_2
3657 BFD_RELOC_MMIX_CBRANCH_3
3659 These are relocations for a conditional branch instruction.
3661 BFD_RELOC_MMIX_PUSHJ
3663 BFD_RELOC_MMIX_PUSHJ_1
3665 BFD_RELOC_MMIX_PUSHJ_2
3667 BFD_RELOC_MMIX_PUSHJ_3
3669 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
3671 These are relocations for the PUSHJ instruction.
3675 BFD_RELOC_MMIX_JMP_1
3677 BFD_RELOC_MMIX_JMP_2
3679 BFD_RELOC_MMIX_JMP_3
3681 These are relocations for the JMP instruction.
3683 BFD_RELOC_MMIX_ADDR19
3685 This is a relocation for a relative address as in a GETA instruction or
3688 BFD_RELOC_MMIX_ADDR27
3690 This is a relocation for a relative address as in a JMP instruction.
3692 BFD_RELOC_MMIX_REG_OR_BYTE
3694 This is a relocation for an instruction field that may be a general
3695 register or a value 0..255.
3699 This is a relocation for an instruction field that may be a general
3702 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3704 This is a relocation for two instruction fields holding a register and
3705 an offset, the equivalent of the relocation.
3707 BFD_RELOC_MMIX_LOCAL
3709 This relocation is an assertion that the expression is not allocated as
3710 a global register. It does not modify contents.
3713 BFD_RELOC_AVR_7_PCREL
3715 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3716 short offset into 7 bits.
3718 BFD_RELOC_AVR_13_PCREL
3720 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3721 short offset into 12 bits.
3725 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3726 program memory address) into 16 bits.
3728 BFD_RELOC_AVR_LO8_LDI
3730 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3731 data memory address) into 8 bit immediate value of LDI insn.
3733 BFD_RELOC_AVR_HI8_LDI
3735 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3736 of data memory address) into 8 bit immediate value of LDI insn.
3738 BFD_RELOC_AVR_HH8_LDI
3740 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3741 of program memory address) into 8 bit immediate value of LDI insn.
3743 BFD_RELOC_AVR_MS8_LDI
3745 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3746 of 32 bit value) into 8 bit immediate value of LDI insn.
3748 BFD_RELOC_AVR_LO8_LDI_NEG
3750 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3751 (usually data memory address) into 8 bit immediate value of SUBI insn.
3753 BFD_RELOC_AVR_HI8_LDI_NEG
3755 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3756 (high 8 bit of data memory address) into 8 bit immediate value of
3759 BFD_RELOC_AVR_HH8_LDI_NEG
3761 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3762 (most high 8 bit of program memory address) into 8 bit immediate value
3763 of LDI or SUBI insn.
3765 BFD_RELOC_AVR_MS8_LDI_NEG
3767 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
3768 of 32 bit value) into 8 bit immediate value of LDI insn.
3770 BFD_RELOC_AVR_LO8_LDI_PM
3772 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3773 command address) into 8 bit immediate value of LDI insn.
3775 BFD_RELOC_AVR_LO8_LDI_GS
3777 This is a 16 bit reloc for the AVR that stores 8 bit value
3778 (command address) into 8 bit immediate value of LDI insn. If the address
3779 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
3782 BFD_RELOC_AVR_HI8_LDI_PM
3784 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3785 of command address) into 8 bit immediate value of LDI insn.
3787 BFD_RELOC_AVR_HI8_LDI_GS
3789 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3790 of command address) into 8 bit immediate value of LDI insn. If the address
3791 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
3794 BFD_RELOC_AVR_HH8_LDI_PM
3796 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3797 of command address) into 8 bit immediate value of LDI insn.
3799 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3801 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3802 (usually command address) into 8 bit immediate value of SUBI insn.
3804 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3806 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3807 (high 8 bit of 16 bit command address) into 8 bit immediate value
3810 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3812 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3813 (high 6 bit of 22 bit command address) into 8 bit immediate
3818 This is a 32 bit reloc for the AVR that stores 23 bit value
3823 This is a 16 bit reloc for the AVR that stores all needed bits
3824 for absolute addressing with ldi with overflow check to linktime
3828 This is a 6 bit reloc for the AVR that stores offset for ldd/std
3831 BFD_RELOC_AVR_6_ADIW
3833 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
3847 32 bit PC relative PLT address.
3851 Copy symbol at runtime.
3853 BFD_RELOC_390_GLOB_DAT
3857 BFD_RELOC_390_JMP_SLOT
3861 BFD_RELOC_390_RELATIVE
3863 Adjust by program base.
3867 32 bit PC relative offset to GOT.
3873 BFD_RELOC_390_PC16DBL
3875 PC relative 16 bit shifted by 1.
3877 BFD_RELOC_390_PLT16DBL
3879 16 bit PC rel. PLT shifted by 1.
3881 BFD_RELOC_390_PC32DBL
3883 PC relative 32 bit shifted by 1.
3885 BFD_RELOC_390_PLT32DBL
3887 32 bit PC rel. PLT shifted by 1.
3889 BFD_RELOC_390_GOTPCDBL
3891 32 bit PC rel. GOT shifted by 1.
3899 64 bit PC relative PLT address.
3901 BFD_RELOC_390_GOTENT
3903 32 bit rel. offset to GOT entry.
3905 BFD_RELOC_390_GOTOFF64
3907 64 bit offset to GOT.
3909 BFD_RELOC_390_GOTPLT12
3911 12-bit offset to symbol-entry within GOT, with PLT handling.
3913 BFD_RELOC_390_GOTPLT16
3915 16-bit offset to symbol-entry within GOT, with PLT handling.
3917 BFD_RELOC_390_GOTPLT32
3919 32-bit offset to symbol-entry within GOT, with PLT handling.
3921 BFD_RELOC_390_GOTPLT64
3923 64-bit offset to symbol-entry within GOT, with PLT handling.
3925 BFD_RELOC_390_GOTPLTENT
3927 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
3929 BFD_RELOC_390_PLTOFF16
3931 16-bit rel. offset from the GOT to a PLT entry.
3933 BFD_RELOC_390_PLTOFF32
3935 32-bit rel. offset from the GOT to a PLT entry.
3937 BFD_RELOC_390_PLTOFF64
3939 64-bit rel. offset from the GOT to a PLT entry.
3942 BFD_RELOC_390_TLS_LOAD
3944 BFD_RELOC_390_TLS_GDCALL
3946 BFD_RELOC_390_TLS_LDCALL
3948 BFD_RELOC_390_TLS_GD32
3950 BFD_RELOC_390_TLS_GD64
3952 BFD_RELOC_390_TLS_GOTIE12
3954 BFD_RELOC_390_TLS_GOTIE32
3956 BFD_RELOC_390_TLS_GOTIE64
3958 BFD_RELOC_390_TLS_LDM32
3960 BFD_RELOC_390_TLS_LDM64
3962 BFD_RELOC_390_TLS_IE32
3964 BFD_RELOC_390_TLS_IE64
3966 BFD_RELOC_390_TLS_IEENT
3968 BFD_RELOC_390_TLS_LE32
3970 BFD_RELOC_390_TLS_LE64
3972 BFD_RELOC_390_TLS_LDO32
3974 BFD_RELOC_390_TLS_LDO64
3976 BFD_RELOC_390_TLS_DTPMOD
3978 BFD_RELOC_390_TLS_DTPOFF
3980 BFD_RELOC_390_TLS_TPOFF
3982 s390 tls relocations.
3989 BFD_RELOC_390_GOTPLT20
3991 BFD_RELOC_390_TLS_GOTIE20
3993 Long displacement extension.
3996 BFD_RELOC_SCORE_DUMMY1
4000 BFD_RELOC_SCORE_GPREL15
4002 Low 16 bit for load/store
4004 BFD_RELOC_SCORE_DUMMY2
4008 This is a 24-bit reloc with the right 1 bit assumed to be 0
4010 BFD_RELOC_SCORE_BRANCH
4012 This is a 19-bit reloc with the right 1 bit assumed to be 0
4014 BFD_RELOC_SCORE16_JMP
4016 This is a 11-bit reloc with the right 1 bit assumed to be 0
4018 BFD_RELOC_SCORE16_BRANCH
4020 This is a 8-bit reloc with the right 1 bit assumed to be 0
4022 BFD_RELOC_SCORE_GOT15
4024 BFD_RELOC_SCORE_GOT_LO16
4026 BFD_RELOC_SCORE_CALL15
4028 BFD_RELOC_SCORE_DUMMY_HI16
4030 Undocumented Score relocs
4035 Scenix IP2K - 9-bit register number / data address
4039 Scenix IP2K - 4-bit register/data bank number
4041 BFD_RELOC_IP2K_ADDR16CJP
4043 Scenix IP2K - low 13 bits of instruction word address
4045 BFD_RELOC_IP2K_PAGE3
4047 Scenix IP2K - high 3 bits of instruction word address
4049 BFD_RELOC_IP2K_LO8DATA
4051 BFD_RELOC_IP2K_HI8DATA
4053 BFD_RELOC_IP2K_EX8DATA
4055 Scenix IP2K - ext/low/high 8 bits of data address
4057 BFD_RELOC_IP2K_LO8INSN
4059 BFD_RELOC_IP2K_HI8INSN
4061 Scenix IP2K - low/high 8 bits of instruction word address
4063 BFD_RELOC_IP2K_PC_SKIP
4065 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
4069 Scenix IP2K - 16 bit word address in text section.
4071 BFD_RELOC_IP2K_FR_OFFSET
4073 Scenix IP2K - 7-bit sp or dp offset
4075 BFD_RELOC_VPE4KMATH_DATA
4077 BFD_RELOC_VPE4KMATH_INSN
4079 Scenix VPE4K coprocessor - data/insn-space addressing
4082 BFD_RELOC_VTABLE_INHERIT
4084 BFD_RELOC_VTABLE_ENTRY
4086 These two relocations are used by the linker to determine which of
4087 the entries in a C++ virtual function table are actually used. When
4088 the --gc-sections option is given, the linker will zero out the entries
4089 that are not used, so that the code for those functions need not be
4090 included in the output.
4092 VTABLE_INHERIT is a zero-space relocation used to describe to the
4093 linker the inheritance tree of a C++ virtual function table. The
4094 relocation's symbol should be the parent class' vtable, and the
4095 relocation should be located at the child vtable.
4097 VTABLE_ENTRY is a zero-space relocation that describes the use of a
4098 virtual function table entry. The reloc's symbol should refer to the
4099 table of the class mentioned in the code. Off of that base, an offset
4100 describes the entry that is being used. For Rela hosts, this offset
4101 is stored in the reloc's addend. For Rel hosts, we are forced to put
4102 this offset in the reloc's section offset.
4105 BFD_RELOC_IA64_IMM14
4107 BFD_RELOC_IA64_IMM22
4109 BFD_RELOC_IA64_IMM64
4111 BFD_RELOC_IA64_DIR32MSB
4113 BFD_RELOC_IA64_DIR32LSB
4115 BFD_RELOC_IA64_DIR64MSB
4117 BFD_RELOC_IA64_DIR64LSB
4119 BFD_RELOC_IA64_GPREL22
4121 BFD_RELOC_IA64_GPREL64I
4123 BFD_RELOC_IA64_GPREL32MSB
4125 BFD_RELOC_IA64_GPREL32LSB
4127 BFD_RELOC_IA64_GPREL64MSB
4129 BFD_RELOC_IA64_GPREL64LSB
4131 BFD_RELOC_IA64_LTOFF22
4133 BFD_RELOC_IA64_LTOFF64I
4135 BFD_RELOC_IA64_PLTOFF22
4137 BFD_RELOC_IA64_PLTOFF64I
4139 BFD_RELOC_IA64_PLTOFF64MSB
4141 BFD_RELOC_IA64_PLTOFF64LSB
4143 BFD_RELOC_IA64_FPTR64I
4145 BFD_RELOC_IA64_FPTR32MSB
4147 BFD_RELOC_IA64_FPTR32LSB
4149 BFD_RELOC_IA64_FPTR64MSB
4151 BFD_RELOC_IA64_FPTR64LSB
4153 BFD_RELOC_IA64_PCREL21B
4155 BFD_RELOC_IA64_PCREL21BI
4157 BFD_RELOC_IA64_PCREL21M
4159 BFD_RELOC_IA64_PCREL21F
4161 BFD_RELOC_IA64_PCREL22
4163 BFD_RELOC_IA64_PCREL60B
4165 BFD_RELOC_IA64_PCREL64I
4167 BFD_RELOC_IA64_PCREL32MSB
4169 BFD_RELOC_IA64_PCREL32LSB
4171 BFD_RELOC_IA64_PCREL64MSB
4173 BFD_RELOC_IA64_PCREL64LSB
4175 BFD_RELOC_IA64_LTOFF_FPTR22
4177 BFD_RELOC_IA64_LTOFF_FPTR64I
4179 BFD_RELOC_IA64_LTOFF_FPTR32MSB
4181 BFD_RELOC_IA64_LTOFF_FPTR32LSB
4183 BFD_RELOC_IA64_LTOFF_FPTR64MSB
4185 BFD_RELOC_IA64_LTOFF_FPTR64LSB
4187 BFD_RELOC_IA64_SEGREL32MSB
4189 BFD_RELOC_IA64_SEGREL32LSB
4191 BFD_RELOC_IA64_SEGREL64MSB
4193 BFD_RELOC_IA64_SEGREL64LSB
4195 BFD_RELOC_IA64_SECREL32MSB
4197 BFD_RELOC_IA64_SECREL32LSB
4199 BFD_RELOC_IA64_SECREL64MSB
4201 BFD_RELOC_IA64_SECREL64LSB
4203 BFD_RELOC_IA64_REL32MSB
4205 BFD_RELOC_IA64_REL32LSB
4207 BFD_RELOC_IA64_REL64MSB
4209 BFD_RELOC_IA64_REL64LSB
4211 BFD_RELOC_IA64_LTV32MSB
4213 BFD_RELOC_IA64_LTV32LSB
4215 BFD_RELOC_IA64_LTV64MSB
4217 BFD_RELOC_IA64_LTV64LSB
4219 BFD_RELOC_IA64_IPLTMSB
4221 BFD_RELOC_IA64_IPLTLSB
4225 BFD_RELOC_IA64_LTOFF22X
4227 BFD_RELOC_IA64_LDXMOV
4229 BFD_RELOC_IA64_TPREL14
4231 BFD_RELOC_IA64_TPREL22
4233 BFD_RELOC_IA64_TPREL64I
4235 BFD_RELOC_IA64_TPREL64MSB
4237 BFD_RELOC_IA64_TPREL64LSB
4239 BFD_RELOC_IA64_LTOFF_TPREL22
4241 BFD_RELOC_IA64_DTPMOD64MSB
4243 BFD_RELOC_IA64_DTPMOD64LSB
4245 BFD_RELOC_IA64_LTOFF_DTPMOD22
4247 BFD_RELOC_IA64_DTPREL14
4249 BFD_RELOC_IA64_DTPREL22
4251 BFD_RELOC_IA64_DTPREL64I
4253 BFD_RELOC_IA64_DTPREL32MSB
4255 BFD_RELOC_IA64_DTPREL32LSB
4257 BFD_RELOC_IA64_DTPREL64MSB
4259 BFD_RELOC_IA64_DTPREL64LSB
4261 BFD_RELOC_IA64_LTOFF_DTPREL22
4263 Intel IA64 Relocations.
4266 BFD_RELOC_M68HC11_HI8
4268 Motorola 68HC11 reloc.
4269 This is the 8 bit high part of an absolute address.
4271 BFD_RELOC_M68HC11_LO8
4273 Motorola 68HC11 reloc.
4274 This is the 8 bit low part of an absolute address.
4276 BFD_RELOC_M68HC11_3B
4278 Motorola 68HC11 reloc.
4279 This is the 3 bit of a value.
4281 BFD_RELOC_M68HC11_RL_JUMP
4283 Motorola 68HC11 reloc.
4284 This reloc marks the beginning of a jump/call instruction.
4285 It is used for linker relaxation to correctly identify beginning
4286 of instruction and change some branches to use PC-relative
4289 BFD_RELOC_M68HC11_RL_GROUP
4291 Motorola 68HC11 reloc.
4292 This reloc marks a group of several instructions that gcc generates
4293 and for which the linker relaxation pass can modify and/or remove
4296 BFD_RELOC_M68HC11_LO16
4298 Motorola 68HC11 reloc.
4299 This is the 16-bit lower part of an address. It is used for 'call'
4300 instruction to specify the symbol address without any special
4301 transformation (due to memory bank window).
4303 BFD_RELOC_M68HC11_PAGE
4305 Motorola 68HC11 reloc.
4306 This is a 8-bit reloc that specifies the page number of an address.
4307 It is used by 'call' instruction to specify the page number of
4310 BFD_RELOC_M68HC11_24
4312 Motorola 68HC11 reloc.
4313 This is a 24-bit reloc that represents the address with a 16-bit
4314 value and a 8-bit page number. The symbol address is transformed
4315 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
4317 BFD_RELOC_M68HC12_5B
4319 Motorola 68HC12 reloc.
4320 This is the 5 bits of a value.
4325 BFD_RELOC_16C_NUM08_C
4329 BFD_RELOC_16C_NUM16_C
4333 BFD_RELOC_16C_NUM32_C
4335 BFD_RELOC_16C_DISP04
4337 BFD_RELOC_16C_DISP04_C
4339 BFD_RELOC_16C_DISP08
4341 BFD_RELOC_16C_DISP08_C
4343 BFD_RELOC_16C_DISP16
4345 BFD_RELOC_16C_DISP16_C
4347 BFD_RELOC_16C_DISP24
4349 BFD_RELOC_16C_DISP24_C
4351 BFD_RELOC_16C_DISP24a
4353 BFD_RELOC_16C_DISP24a_C
4357 BFD_RELOC_16C_REG04_C
4359 BFD_RELOC_16C_REG04a
4361 BFD_RELOC_16C_REG04a_C
4365 BFD_RELOC_16C_REG14_C
4369 BFD_RELOC_16C_REG16_C
4373 BFD_RELOC_16C_REG20_C
4377 BFD_RELOC_16C_ABS20_C
4381 BFD_RELOC_16C_ABS24_C
4385 BFD_RELOC_16C_IMM04_C
4389 BFD_RELOC_16C_IMM16_C
4393 BFD_RELOC_16C_IMM20_C
4397 BFD_RELOC_16C_IMM24_C
4401 BFD_RELOC_16C_IMM32_C
4403 NS CR16C Relocations.
4410 BFD_RELOC_CRX_REL8_CMP
4418 BFD_RELOC_CRX_REGREL12
4420 BFD_RELOC_CRX_REGREL22
4422 BFD_RELOC_CRX_REGREL28
4424 BFD_RELOC_CRX_REGREL32
4440 BFD_RELOC_CRX_SWITCH8
4442 BFD_RELOC_CRX_SWITCH16
4444 BFD_RELOC_CRX_SWITCH32
4449 BFD_RELOC_CRIS_BDISP8
4451 BFD_RELOC_CRIS_UNSIGNED_5
4453 BFD_RELOC_CRIS_SIGNED_6
4455 BFD_RELOC_CRIS_UNSIGNED_6
4457 BFD_RELOC_CRIS_SIGNED_8
4459 BFD_RELOC_CRIS_UNSIGNED_8
4461 BFD_RELOC_CRIS_SIGNED_16
4463 BFD_RELOC_CRIS_UNSIGNED_16
4465 BFD_RELOC_CRIS_LAPCQ_OFFSET
4467 BFD_RELOC_CRIS_UNSIGNED_4
4469 These relocs are only used within the CRIS assembler. They are not
4470 (at present) written to any object files.
4474 BFD_RELOC_CRIS_GLOB_DAT
4476 BFD_RELOC_CRIS_JUMP_SLOT
4478 BFD_RELOC_CRIS_RELATIVE
4480 Relocs used in ELF shared libraries for CRIS.
4482 BFD_RELOC_CRIS_32_GOT
4484 32-bit offset to symbol-entry within GOT.
4486 BFD_RELOC_CRIS_16_GOT
4488 16-bit offset to symbol-entry within GOT.
4490 BFD_RELOC_CRIS_32_GOTPLT
4492 32-bit offset to symbol-entry within GOT, with PLT handling.
4494 BFD_RELOC_CRIS_16_GOTPLT
4496 16-bit offset to symbol-entry within GOT, with PLT handling.
4498 BFD_RELOC_CRIS_32_GOTREL
4500 32-bit offset to symbol, relative to GOT.
4502 BFD_RELOC_CRIS_32_PLT_GOTREL
4504 32-bit offset to symbol with PLT entry, relative to GOT.
4506 BFD_RELOC_CRIS_32_PLT_PCREL
4508 32-bit offset to symbol with PLT entry, relative to this relocation.
4513 BFD_RELOC_860_GLOB_DAT
4515 BFD_RELOC_860_JUMP_SLOT
4517 BFD_RELOC_860_RELATIVE
4527 BFD_RELOC_860_SPLIT0
4531 BFD_RELOC_860_SPLIT1
4535 BFD_RELOC_860_SPLIT2
4539 BFD_RELOC_860_LOGOT0
4541 BFD_RELOC_860_SPGOT0
4543 BFD_RELOC_860_LOGOT1
4545 BFD_RELOC_860_SPGOT1
4547 BFD_RELOC_860_LOGOTOFF0
4549 BFD_RELOC_860_SPGOTOFF0
4551 BFD_RELOC_860_LOGOTOFF1
4553 BFD_RELOC_860_SPGOTOFF1
4555 BFD_RELOC_860_LOGOTOFF2
4557 BFD_RELOC_860_LOGOTOFF3
4561 BFD_RELOC_860_HIGHADJ
4565 BFD_RELOC_860_HAGOTOFF
4573 BFD_RELOC_860_HIGOTOFF
4575 Intel i860 Relocations.
4578 BFD_RELOC_OPENRISC_ABS_26
4580 BFD_RELOC_OPENRISC_REL_26
4582 OpenRISC Relocations.
4585 BFD_RELOC_H8_DIR16A8
4587 BFD_RELOC_H8_DIR16R8
4589 BFD_RELOC_H8_DIR24A8
4591 BFD_RELOC_H8_DIR24R8
4593 BFD_RELOC_H8_DIR32A16
4598 BFD_RELOC_XSTORMY16_REL_12
4600 BFD_RELOC_XSTORMY16_12
4602 BFD_RELOC_XSTORMY16_24
4604 BFD_RELOC_XSTORMY16_FPTR16
4606 Sony Xstormy16 Relocations.
4617 Infineon Relocations.
4620 BFD_RELOC_VAX_GLOB_DAT
4622 BFD_RELOC_VAX_JMP_SLOT
4624 BFD_RELOC_VAX_RELATIVE
4626 Relocations used by VAX ELF.
4631 Morpho MT - 16 bit immediate relocation.
4635 Morpho MT - Hi 16 bits of an address.
4639 Morpho MT - Low 16 bits of an address.
4641 BFD_RELOC_MT_GNU_VTINHERIT
4643 Morpho MT - Used to tell the linker which vtable entries are used.
4645 BFD_RELOC_MT_GNU_VTENTRY
4647 Morpho MT - Used to tell the linker which vtable entries are used.
4649 BFD_RELOC_MT_PCINSN8
4651 Morpho MT - 8 bit immediate relocation.
4654 BFD_RELOC_MSP430_10_PCREL
4656 BFD_RELOC_MSP430_16_PCREL
4660 BFD_RELOC_MSP430_16_PCREL_BYTE
4662 BFD_RELOC_MSP430_16_BYTE
4664 BFD_RELOC_MSP430_2X_PCREL
4666 BFD_RELOC_MSP430_RL_PCREL
4668 msp430 specific relocation codes
4671 BFD_RELOC_IQ2000_OFFSET_16
4673 BFD_RELOC_IQ2000_OFFSET_21
4675 BFD_RELOC_IQ2000_UHI16
4680 BFD_RELOC_XTENSA_RTLD
4682 Special Xtensa relocation used only by PLT entries in ELF shared
4683 objects to indicate that the runtime linker should set the value
4684 to one of its own internal functions or data structures.
4686 BFD_RELOC_XTENSA_GLOB_DAT
4688 BFD_RELOC_XTENSA_JMP_SLOT
4690 BFD_RELOC_XTENSA_RELATIVE
4692 Xtensa relocations for ELF shared objects.
4694 BFD_RELOC_XTENSA_PLT
4696 Xtensa relocation used in ELF object files for symbols that may require
4697 PLT entries. Otherwise, this is just a generic 32-bit relocation.
4699 BFD_RELOC_XTENSA_DIFF8
4701 BFD_RELOC_XTENSA_DIFF16
4703 BFD_RELOC_XTENSA_DIFF32
4705 Xtensa relocations to mark the difference of two local symbols.
4706 These are only needed to support linker relaxation and can be ignored
4707 when not relaxing. The field is set to the value of the difference
4708 assuming no relaxation. The relocation encodes the position of the
4709 first symbol so the linker can determine whether to adjust the field
4712 BFD_RELOC_XTENSA_SLOT0_OP
4714 BFD_RELOC_XTENSA_SLOT1_OP
4716 BFD_RELOC_XTENSA_SLOT2_OP
4718 BFD_RELOC_XTENSA_SLOT3_OP
4720 BFD_RELOC_XTENSA_SLOT4_OP
4722 BFD_RELOC_XTENSA_SLOT5_OP
4724 BFD_RELOC_XTENSA_SLOT6_OP
4726 BFD_RELOC_XTENSA_SLOT7_OP
4728 BFD_RELOC_XTENSA_SLOT8_OP
4730 BFD_RELOC_XTENSA_SLOT9_OP
4732 BFD_RELOC_XTENSA_SLOT10_OP
4734 BFD_RELOC_XTENSA_SLOT11_OP
4736 BFD_RELOC_XTENSA_SLOT12_OP
4738 BFD_RELOC_XTENSA_SLOT13_OP
4740 BFD_RELOC_XTENSA_SLOT14_OP
4742 Generic Xtensa relocations for instruction operands. Only the slot
4743 number is encoded in the relocation. The relocation applies to the
4744 last PC-relative immediate operand, or if there are no PC-relative
4745 immediates, to the last immediate operand.
4747 BFD_RELOC_XTENSA_SLOT0_ALT
4749 BFD_RELOC_XTENSA_SLOT1_ALT
4751 BFD_RELOC_XTENSA_SLOT2_ALT
4753 BFD_RELOC_XTENSA_SLOT3_ALT
4755 BFD_RELOC_XTENSA_SLOT4_ALT
4757 BFD_RELOC_XTENSA_SLOT5_ALT
4759 BFD_RELOC_XTENSA_SLOT6_ALT
4761 BFD_RELOC_XTENSA_SLOT7_ALT
4763 BFD_RELOC_XTENSA_SLOT8_ALT
4765 BFD_RELOC_XTENSA_SLOT9_ALT
4767 BFD_RELOC_XTENSA_SLOT10_ALT
4769 BFD_RELOC_XTENSA_SLOT11_ALT
4771 BFD_RELOC_XTENSA_SLOT12_ALT
4773 BFD_RELOC_XTENSA_SLOT13_ALT
4775 BFD_RELOC_XTENSA_SLOT14_ALT
4777 Alternate Xtensa relocations. Only the slot is encoded in the
4778 relocation. The meaning of these relocations is opcode-specific.
4780 BFD_RELOC_XTENSA_OP0
4782 BFD_RELOC_XTENSA_OP1
4784 BFD_RELOC_XTENSA_OP2
4786 Xtensa relocations for backward compatibility. These have all been
4787 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
4789 BFD_RELOC_XTENSA_ASM_EXPAND
4791 Xtensa relocation to mark that the assembler expanded the
4792 instructions from an original target. The expansion size is
4793 encoded in the reloc size.
4795 BFD_RELOC_XTENSA_ASM_SIMPLIFY
4797 Xtensa relocation to mark that the linker should simplify
4798 assembler-expanded instructions. This is commonly used
4799 internally by the linker after analysis of a
4800 BFD_RELOC_XTENSA_ASM_EXPAND.
4805 8 bit signed offset in (ix+d) or (iy+d).
4824 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
4829 bfd_reloc_type_lookup
4832 reloc_howto_type *bfd_reloc_type_lookup
4833 (bfd *abfd, bfd_reloc_code_real_type code);
4836 Return a pointer to a howto structure which, when
4837 invoked, will perform the relocation @var{code} on data from the
4843 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
4845 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
4848 static reloc_howto_type bfd_howto_32
=
4849 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_dont
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
4853 bfd_default_reloc_type_lookup
4856 reloc_howto_type *bfd_default_reloc_type_lookup
4857 (bfd *abfd, bfd_reloc_code_real_type code);
4860 Provides a default relocation lookup routine for any architecture.
4865 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
4869 case BFD_RELOC_CTOR
:
4870 /* The type of reloc used in a ctor, which will be as wide as the
4871 address - so either a 64, 32, or 16 bitter. */
4872 switch (bfd_get_arch_info (abfd
)->bits_per_address
)
4877 return &bfd_howto_32
;
4891 bfd_get_reloc_code_name
4894 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
4897 Provides a printable name for the supplied relocation code.
4898 Useful mainly for printing error messages.
4902 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
4904 if (code
> BFD_RELOC_UNUSED
)
4906 return bfd_reloc_code_real_names
[code
];
4911 bfd_generic_relax_section
4914 bfd_boolean bfd_generic_relax_section
4917 struct bfd_link_info *,
4921 Provides default handling for relaxing for back ends which
4926 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
4927 asection
*section ATTRIBUTE_UNUSED
,
4928 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
4937 bfd_generic_gc_sections
4940 bfd_boolean bfd_generic_gc_sections
4941 (bfd *, struct bfd_link_info *);
4944 Provides default handling for relaxing for back ends which
4945 don't do section gc -- i.e., does nothing.
4949 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
4950 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
4957 bfd_generic_merge_sections
4960 bfd_boolean bfd_generic_merge_sections
4961 (bfd *, struct bfd_link_info *);
4964 Provides default handling for SEC_MERGE section merging for back ends
4965 which don't have SEC_MERGE support -- i.e., does nothing.
4969 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
4970 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
4977 bfd_generic_get_relocated_section_contents
4980 bfd_byte *bfd_generic_get_relocated_section_contents
4982 struct bfd_link_info *link_info,
4983 struct bfd_link_order *link_order,
4985 bfd_boolean relocatable,
4989 Provides default handling of relocation effort for back ends
4990 which can't be bothered to do it efficiently.
4995 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
4996 struct bfd_link_info
*link_info
,
4997 struct bfd_link_order
*link_order
,
4999 bfd_boolean relocatable
,
5002 /* Get enough memory to hold the stuff. */
5003 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
5004 asection
*input_section
= link_order
->u
.indirect
.section
;
5006 long reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
5007 arelent
**reloc_vector
= NULL
;
5014 reloc_vector
= bfd_malloc (reloc_size
);
5015 if (reloc_vector
== NULL
&& reloc_size
!= 0)
5018 /* Read in the section. */
5019 sz
= input_section
->rawsize
? input_section
->rawsize
: input_section
->size
;
5020 if (!bfd_get_section_contents (input_bfd
, input_section
, data
, 0, sz
))
5023 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
5027 if (reloc_count
< 0)
5030 if (reloc_count
> 0)
5033 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
5035 char *error_message
= NULL
;
5036 bfd_reloc_status_type r
=
5037 bfd_perform_relocation (input_bfd
,
5041 relocatable
? abfd
: NULL
,
5046 asection
*os
= input_section
->output_section
;
5048 /* A partial link, so keep the relocs. */
5049 os
->orelocation
[os
->reloc_count
] = *parent
;
5053 if (r
!= bfd_reloc_ok
)
5057 case bfd_reloc_undefined
:
5058 if (!((*link_info
->callbacks
->undefined_symbol
)
5059 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
5060 input_bfd
, input_section
, (*parent
)->address
,
5064 case bfd_reloc_dangerous
:
5065 BFD_ASSERT (error_message
!= NULL
);
5066 if (!((*link_info
->callbacks
->reloc_dangerous
)
5067 (link_info
, error_message
, input_bfd
, input_section
,
5068 (*parent
)->address
)))
5071 case bfd_reloc_overflow
:
5072 if (!((*link_info
->callbacks
->reloc_overflow
)
5074 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
5075 (*parent
)->howto
->name
, (*parent
)->addend
,
5076 input_bfd
, input_section
, (*parent
)->address
)))
5079 case bfd_reloc_outofrange
:
5088 if (reloc_vector
!= NULL
)
5089 free (reloc_vector
);
5093 if (reloc_vector
!= NULL
)
5094 free (reloc_vector
);