1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 BFD maintains relocations in much the same way it maintains
28 symbols: they are left alone until required, then read in
29 en-masse and translated into an internal form. A common
30 routine <<bfd_perform_relocation>> acts upon the
31 canonical form to do the fixup.
33 Relocations are maintained on a per section basis,
34 while symbols are maintained on a per BFD basis.
36 All that a back end has to do to fit the BFD interface is to create
37 a <<struct reloc_cache_entry>> for each relocation
38 in a particular section, and fill in the right bits of the structures.
47 /* DO compile in the reloc_code name table from libbfd.h. */
48 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. *}
71 . {* The relocation was performed, but there was an overflow. *}
74 . {* The address to relocate was not within the section supplied. *}
75 . bfd_reloc_outofrange,
77 . {* Used by special functions. *}
80 . {* Unsupported relocation size requested. *}
81 . bfd_reloc_notsupported,
86 . {* The symbol to relocate against was undefined. *}
87 . bfd_reloc_undefined,
89 . {* The relocation was performed, but may not be ok - presently
90 . generated only when linking i960 coff files with i960 b.out
91 . symbols. If this type is returned, the error_message argument
92 . to bfd_perform_relocation will be set. *}
95 . bfd_reloc_status_type;
98 .typedef struct reloc_cache_entry
100 . {* A pointer into the canonical table of pointers. *}
101 . struct symbol_cache_entry **sym_ptr_ptr;
103 . {* offset in section. *}
104 . bfd_size_type address;
106 . {* addend for relocation value. *}
109 . {* Pointer to how to perform the required relocation. *}
110 . reloc_howto_type *howto;
120 Here is a description of each of the fields within an <<arelent>>:
124 The symbol table pointer points to a pointer to the symbol
125 associated with the relocation request. It is
126 the pointer into the table returned by the back end's
127 <<get_symtab>> action. @xref{Symbols}. The symbol is referenced
128 through a pointer to a pointer so that tools like the linker
129 can fix up all the symbols of the same name by modifying only
130 one pointer. The relocation routine looks in the symbol and
131 uses the base of the section the symbol is attached to and the
132 value of the symbol as the initial relocation offset. If the
133 symbol pointer is zero, then the section provided is looked up.
137 The <<address>> field gives the offset in bytes from the base of
138 the section data which owns the relocation record to the first
139 byte of relocatable information. The actual data relocated
140 will be relative to this point; for example, a relocation
141 type which modifies the bottom two bytes of a four byte word
142 would not touch the first byte pointed to in a big endian
147 The <<addend>> is a value provided by the back end to be added (!)
148 to the relocation offset. Its interpretation is dependent upon
149 the howto. For example, on the 68k the code:
154 | return foo[0x12345678];
157 Could be compiled into:
160 | moveb @@#12345678,d0
165 This could create a reloc pointing to <<foo>>, but leave the
166 offset in the data, something like:
168 |RELOCATION RECORDS FOR [.text]:
172 |00000000 4e56 fffc ; linkw fp,#-4
173 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
174 |0000000a 49c0 ; extbl d0
175 |0000000c 4e5e ; unlk fp
178 Using coff and an 88k, some instructions don't have enough
179 space in them to represent the full address range, and
180 pointers have to be loaded in two parts. So you'd get something like:
182 | or.u r13,r0,hi16(_foo+0x12345678)
183 | ld.b r2,r13,lo16(_foo+0x12345678)
186 This should create two relocs, both pointing to <<_foo>>, and with
187 0x12340000 in their addend field. The data would consist of:
189 |RELOCATION RECORDS FOR [.text]:
191 |00000002 HVRT16 _foo+0x12340000
192 |00000006 LVRT16 _foo+0x12340000
194 |00000000 5da05678 ; or.u r13,r0,0x5678
195 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
196 |00000008 f400c001 ; jmp r1
198 The relocation routine digs out the value from the data, adds
199 it to the addend to get the original offset, and then adds the
200 value of <<_foo>>. Note that all 32 bits have to be kept around
201 somewhere, to cope with carry from bit 15 to bit 16.
203 One further example is the sparc and the a.out format. The
204 sparc has a similar problem to the 88k, in that some
205 instructions don't have room for an entire offset, but on the
206 sparc the parts are created in odd sized lumps. The designers of
207 the a.out format chose to not use the data within the section
208 for storing part of the offset; all the offset is kept within
209 the reloc. Anything in the data should be ignored.
212 | sethi %hi(_foo+0x12345678),%g2
213 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
217 Both relocs contain a pointer to <<foo>>, and the offsets
220 |RELOCATION RECORDS FOR [.text]:
222 |00000004 HI22 _foo+0x12345678
223 |00000008 LO10 _foo+0x12345678
225 |00000000 9de3bf90 ; save %sp,-112,%sp
226 |00000004 05000000 ; sethi %hi(_foo+0),%g2
227 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
228 |0000000c 81c7e008 ; ret
229 |00000010 81e80000 ; restore
233 The <<howto>> field can be imagined as a
234 relocation instruction. It is a pointer to a structure which
235 contains information on what to do with all of the other
236 information in the reloc record and data section. A back end
237 would normally have a relocation instruction set and turn
238 relocations into pointers to the correct structure on input -
239 but it would be possible to create each howto field on demand.
245 <<enum complain_overflow>>
247 Indicates what sort of overflow checking should be done when
248 performing a relocation.
252 .enum complain_overflow
254 . {* Do not complain on overflow. *}
255 . complain_overflow_dont,
257 . {* Complain if the bitfield overflows, whether it is considered
258 . as signed or unsigned. *}
259 . complain_overflow_bitfield,
261 . {* Complain if the value overflows when considered as signed
263 . complain_overflow_signed,
265 . {* Complain if the value overflows when considered as an
266 . unsigned number. *}
267 . complain_overflow_unsigned
276 The <<reloc_howto_type>> is a structure which contains all the
277 information that libbfd needs to know to tie up a back end's data.
280 .struct symbol_cache_entry; {* Forward declaration. *}
282 .struct reloc_howto_struct
284 . {* The type field has mainly a documentary use - the back end can
285 . do what it wants with it, though normally the back end's
286 . external idea of what a reloc number is stored
287 . in this field. For example, a PC relative word relocation
288 . in a coff environment has the type 023 - because that's
289 . what the outside world calls a R_PCRWORD reloc. *}
292 . {* The value the final relocation is shifted right by. This drops
293 . unwanted data from the relocation. *}
294 . unsigned int rightshift;
296 . {* The size of the item to be relocated. This is *not* a
297 . power-of-two measure. To get the number of bytes operated
298 . on by a type of relocation, use bfd_get_reloc_size. *}
301 . {* The number of bits in the item to be relocated. This is used
302 . when doing overflow checking. *}
303 . unsigned int bitsize;
305 . {* Notes that the relocation is relative to the location in the
306 . data section of the addend. The relocation function will
307 . subtract from the relocation value the address of the location
308 . being relocated. *}
309 . bfd_boolean pc_relative;
311 . {* The bit position of the reloc value in the destination.
312 . The relocated value is left shifted by this amount. *}
313 . unsigned int bitpos;
315 . {* What type of overflow error should be checked for when
317 . enum complain_overflow complain_on_overflow;
319 . {* If this field is non null, then the supplied function is
320 . called rather than the normal function. This allows really
321 . strange relocation methods to be accomodated (e.g., i960 callj
323 . bfd_reloc_status_type (*special_function)
324 . (bfd *, arelent *, struct symbol_cache_entry *, void *, asection *,
327 . {* The textual name of the relocation type. *}
330 . {* Some formats record a relocation addend in the section contents
331 . rather than with the relocation. For ELF formats this is the
332 . distinction between USE_REL and USE_RELA (though the code checks
333 . for USE_REL == 1/0). The value of this field is TRUE if the
334 . addend is recorded with the section contents; when performing a
335 . partial link (ld -r) the section contents (the data) will be
336 . modified. The value of this field is FALSE if addends are
337 . recorded with the relocation (in arelent.addend); when performing
338 . a partial link the relocation will be modified.
339 . All relocations for all ELF USE_RELA targets should set this field
340 . to FALSE (values of TRUE should be looked on with suspicion).
341 . However, the converse is not true: not all relocations of all ELF
342 . USE_REL targets set this field to TRUE. Why this is so is peculiar
343 . to each particular target. For relocs that aren't used in partial
344 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
345 . bfd_boolean partial_inplace;
347 . {* src_mask selects the part of the instruction (or data) to be used
348 . in the relocation sum. If the target relocations don't have an
349 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
350 . dst_mask to extract the addend from the section contents. If
351 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
352 . field should be zero. Non-zero values for ELF USE_RELA targets are
353 . bogus as in those cases the value in the dst_mask part of the
354 . section contents should be treated as garbage. *}
357 . {* dst_mask selects which parts of the instruction (or data) are
358 . replaced with a relocated value. *}
361 . {* When some formats create PC relative instructions, they leave
362 . the value of the pc of the place being relocated in the offset
363 . slot of the instruction, so that a PC relative relocation can
364 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
365 . Some formats leave the displacement part of an instruction
366 . empty (e.g., m88k bcs); this flag signals the fact. *}
367 . bfd_boolean pcrel_offset;
377 The HOWTO define is horrible and will go away.
379 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
380 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
383 And will be replaced with the totally magic way. But for the
384 moment, we are compatible, so do it this way.
386 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
387 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
388 . NAME, FALSE, 0, 0, IN)
392 This is used to fill in an empty howto entry in an array.
394 .#define EMPTY_HOWTO(C) \
395 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
396 . NULL, FALSE, 0, 0, FALSE)
400 Helper routine to turn a symbol into a relocation value.
402 .#define HOWTO_PREPARE(relocation, symbol) \
404 . if (symbol != NULL) \
406 . if (bfd_is_com_section (symbol->section)) \
412 . relocation = symbol->value; \
424 unsigned int bfd_get_reloc_size (reloc_howto_type *);
427 For a reloc_howto_type that operates on a fixed number of bytes,
428 this returns the number of bytes operated on.
432 bfd_get_reloc_size (reloc_howto_type
*howto
)
453 How relocs are tied together in an <<asection>>:
455 .typedef struct relent_chain
458 . struct relent_chain *next;
464 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
465 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
472 bfd_reloc_status_type bfd_check_overflow
473 (enum complain_overflow how,
474 unsigned int bitsize,
475 unsigned int rightshift,
476 unsigned int addrsize,
480 Perform overflow checking on @var{relocation} which has
481 @var{bitsize} significant bits and will be shifted right by
482 @var{rightshift} bits, on a machine with addresses containing
483 @var{addrsize} significant bits. The result is either of
484 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
488 bfd_reloc_status_type
489 bfd_check_overflow (enum complain_overflow how
,
490 unsigned int bitsize
,
491 unsigned int rightshift
,
492 unsigned int addrsize
,
495 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
496 bfd_reloc_status_type flag
= bfd_reloc_ok
;
500 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
501 we'll be permissive: extra bits in the field mask will
502 automatically extend the address mask for purposes of the
504 fieldmask
= N_ONES (bitsize
);
505 addrmask
= N_ONES (addrsize
) | fieldmask
;
509 case complain_overflow_dont
:
512 case complain_overflow_signed
:
513 /* If any sign bits are set, all sign bits must be set. That
514 is, A must be a valid negative address after shifting. */
515 a
= (a
& addrmask
) >> rightshift
;
516 signmask
= ~ (fieldmask
>> 1);
518 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
519 flag
= bfd_reloc_overflow
;
522 case complain_overflow_unsigned
:
523 /* We have an overflow if the address does not fit in the field. */
524 a
= (a
& addrmask
) >> rightshift
;
525 if ((a
& ~ fieldmask
) != 0)
526 flag
= bfd_reloc_overflow
;
529 case complain_overflow_bitfield
:
530 /* Bitfields are sometimes signed, sometimes unsigned. We
531 explicitly allow an address wrap too, which means a bitfield
532 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
533 if the value has some, but not all, bits set outside the
536 ss
= a
& ~ fieldmask
;
537 if (ss
!= 0 && ss
!= (((bfd_vma
) -1 >> rightshift
) & ~ fieldmask
))
538 flag
= bfd_reloc_overflow
;
550 bfd_perform_relocation
553 bfd_reloc_status_type bfd_perform_relocation
555 arelent *reloc_entry,
557 asection *input_section,
559 char **error_message);
562 If @var{output_bfd} is supplied to this function, the
563 generated image will be relocatable; the relocations are
564 copied to the output file after they have been changed to
565 reflect the new state of the world. There are two ways of
566 reflecting the results of partial linkage in an output file:
567 by modifying the output data in place, and by modifying the
568 relocation record. Some native formats (e.g., basic a.out and
569 basic coff) have no way of specifying an addend in the
570 relocation type, so the addend has to go in the output data.
571 This is no big deal since in these formats the output data
572 slot will always be big enough for the addend. Complex reloc
573 types with addends were invented to solve just this problem.
574 The @var{error_message} argument is set to an error message if
575 this return @code{bfd_reloc_dangerous}.
579 bfd_reloc_status_type
580 bfd_perform_relocation (bfd
*abfd
,
581 arelent
*reloc_entry
,
583 asection
*input_section
,
585 char **error_message
)
588 bfd_reloc_status_type flag
= bfd_reloc_ok
;
589 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
590 bfd_vma output_base
= 0;
591 reloc_howto_type
*howto
= reloc_entry
->howto
;
592 asection
*reloc_target_output_section
;
595 symbol
= *(reloc_entry
->sym_ptr_ptr
);
596 if (bfd_is_abs_section (symbol
->section
)
597 && output_bfd
!= NULL
)
599 reloc_entry
->address
+= input_section
->output_offset
;
603 /* If we are not producing relocatable output, return an error if
604 the symbol is not defined. An undefined weak symbol is
605 considered to have a value of zero (SVR4 ABI, p. 4-27). */
606 if (bfd_is_und_section (symbol
->section
)
607 && (symbol
->flags
& BSF_WEAK
) == 0
608 && output_bfd
== NULL
)
609 flag
= bfd_reloc_undefined
;
611 /* If there is a function supplied to handle this relocation type,
612 call it. It'll return `bfd_reloc_continue' if further processing
614 if (howto
->special_function
)
616 bfd_reloc_status_type cont
;
617 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
618 input_section
, output_bfd
,
620 if (cont
!= bfd_reloc_continue
)
624 /* Is the address of the relocation really within the section? */
625 if (reloc_entry
->address
> (input_section
->_cooked_size
626 / bfd_octets_per_byte (abfd
)))
627 return bfd_reloc_outofrange
;
629 /* Work out which section the relocation is targetted at and the
630 initial relocation command value. */
632 /* Get symbol value. (Common symbols are special.) */
633 if (bfd_is_com_section (symbol
->section
))
636 relocation
= symbol
->value
;
638 reloc_target_output_section
= symbol
->section
->output_section
;
640 /* Convert input-section-relative symbol value to absolute. */
641 if ((output_bfd
&& ! howto
->partial_inplace
)
642 || reloc_target_output_section
== NULL
)
645 output_base
= reloc_target_output_section
->vma
;
647 relocation
+= output_base
+ symbol
->section
->output_offset
;
649 /* Add in supplied addend. */
650 relocation
+= reloc_entry
->addend
;
652 /* Here the variable relocation holds the final address of the
653 symbol we are relocating against, plus any addend. */
655 if (howto
->pc_relative
)
657 /* This is a PC relative relocation. We want to set RELOCATION
658 to the distance between the address of the symbol and the
659 location. RELOCATION is already the address of the symbol.
661 We start by subtracting the address of the section containing
664 If pcrel_offset is set, we must further subtract the position
665 of the location within the section. Some targets arrange for
666 the addend to be the negative of the position of the location
667 within the section; for example, i386-aout does this. For
668 i386-aout, pcrel_offset is FALSE. Some other targets do not
669 include the position of the location; for example, m88kbcs,
670 or ELF. For those targets, pcrel_offset is TRUE.
672 If we are producing relocatable output, then we must ensure
673 that this reloc will be correctly computed when the final
674 relocation is done. If pcrel_offset is FALSE we want to wind
675 up with the negative of the location within the section,
676 which means we must adjust the existing addend by the change
677 in the location within the section. If pcrel_offset is TRUE
678 we do not want to adjust the existing addend at all.
680 FIXME: This seems logical to me, but for the case of
681 producing relocatable output it is not what the code
682 actually does. I don't want to change it, because it seems
683 far too likely that something will break. */
686 input_section
->output_section
->vma
+ input_section
->output_offset
;
688 if (howto
->pcrel_offset
)
689 relocation
-= reloc_entry
->address
;
692 if (output_bfd
!= NULL
)
694 if (! howto
->partial_inplace
)
696 /* This is a partial relocation, and we want to apply the relocation
697 to the reloc entry rather than the raw data. Modify the reloc
698 inplace to reflect what we now know. */
699 reloc_entry
->addend
= relocation
;
700 reloc_entry
->address
+= input_section
->output_offset
;
705 /* This is a partial relocation, but inplace, so modify the
708 If we've relocated with a symbol with a section, change
709 into a ref to the section belonging to the symbol. */
711 reloc_entry
->address
+= input_section
->output_offset
;
714 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
715 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
716 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
719 /* For m68k-coff, the addend was being subtracted twice during
720 relocation with -r. Removing the line below this comment
721 fixes that problem; see PR 2953.
723 However, Ian wrote the following, regarding removing the line below,
724 which explains why it is still enabled: --djm
726 If you put a patch like that into BFD you need to check all the COFF
727 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
728 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
729 problem in a different way. There may very well be a reason that the
730 code works as it does.
732 Hmmm. The first obvious point is that bfd_perform_relocation should
733 not have any tests that depend upon the flavour. It's seem like
734 entirely the wrong place for such a thing. The second obvious point
735 is that the current code ignores the reloc addend when producing
736 relocatable output for COFF. That's peculiar. In fact, I really
737 have no idea what the point of the line you want to remove is.
739 A typical COFF reloc subtracts the old value of the symbol and adds in
740 the new value to the location in the object file (if it's a pc
741 relative reloc it adds the difference between the symbol value and the
742 location). When relocating we need to preserve that property.
744 BFD handles this by setting the addend to the negative of the old
745 value of the symbol. Unfortunately it handles common symbols in a
746 non-standard way (it doesn't subtract the old value) but that's a
747 different story (we can't change it without losing backward
748 compatibility with old object files) (coff-i386 does subtract the old
749 value, to be compatible with existing coff-i386 targets, like SCO).
751 So everything works fine when not producing relocatable output. When
752 we are producing relocatable output, logically we should do exactly
753 what we do when not producing relocatable output. Therefore, your
754 patch is correct. In fact, it should probably always just set
755 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
756 add the value into the object file. This won't hurt the COFF code,
757 which doesn't use the addend; I'm not sure what it will do to other
758 formats (the thing to check for would be whether any formats both use
759 the addend and set partial_inplace).
761 When I wanted to make coff-i386 produce relocatable output, I ran
762 into the problem that you are running into: I wanted to remove that
763 line. Rather than risk it, I made the coff-i386 relocs use a special
764 function; it's coff_i386_reloc in coff-i386.c. The function
765 specifically adds the addend field into the object file, knowing that
766 bfd_perform_relocation is not going to. If you remove that line, then
767 coff-i386.c will wind up adding the addend field in twice. It's
768 trivial to fix; it just needs to be done.
770 The problem with removing the line is just that it may break some
771 working code. With BFD it's hard to be sure of anything. The right
772 way to deal with this is simply to build and test at least all the
773 supported COFF targets. It should be straightforward if time and disk
774 space consuming. For each target:
776 2) generate some executable, and link it using -r (I would
777 probably use paranoia.o and link against newlib/libc.a, which
778 for all the supported targets would be available in
779 /usr/cygnus/progressive/H-host/target/lib/libc.a).
780 3) make the change to reloc.c
781 4) rebuild the linker
783 6) if the resulting object files are the same, you have at least
785 7) if they are different you have to figure out which version is
788 relocation
-= reloc_entry
->addend
;
790 reloc_entry
->addend
= 0;
794 reloc_entry
->addend
= relocation
;
800 reloc_entry
->addend
= 0;
803 /* FIXME: This overflow checking is incomplete, because the value
804 might have overflowed before we get here. For a correct check we
805 need to compute the value in a size larger than bitsize, but we
806 can't reasonably do that for a reloc the same size as a host
808 FIXME: We should also do overflow checking on the result after
809 adding in the value contained in the object file. */
810 if (howto
->complain_on_overflow
!= complain_overflow_dont
811 && flag
== bfd_reloc_ok
)
812 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
815 bfd_arch_bits_per_address (abfd
),
818 /* Either we are relocating all the way, or we don't want to apply
819 the relocation to the reloc entry (probably because there isn't
820 any room in the output format to describe addends to relocs). */
822 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
823 (OSF version 1.3, compiler version 3.11). It miscompiles the
837 x <<= (unsigned long) s.i0;
841 printf ("succeeded (%lx)\n", x);
845 relocation
>>= (bfd_vma
) howto
->rightshift
;
847 /* Shift everything up to where it's going to be used. */
848 relocation
<<= (bfd_vma
) howto
->bitpos
;
850 /* Wait for the day when all have the mask in them. */
853 i instruction to be left alone
854 o offset within instruction
855 r relocation offset to apply
864 (( i i i i i o o o o o from bfd_get<size>
865 and S S S S S) to get the size offset we want
866 + r r r r r r r r r r) to get the final value to place
867 and D D D D D to chop to right size
868 -----------------------
871 ( i i i i i o o o o o from bfd_get<size>
872 and N N N N N ) get instruction
873 -----------------------
879 -----------------------
880 = R R R R R R R R R R put into bfd_put<size>
884 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
890 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
892 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
898 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
900 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
905 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
907 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
912 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
913 relocation
= -relocation
;
915 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
921 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
922 relocation
= -relocation
;
924 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
935 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
937 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
944 return bfd_reloc_other
;
952 bfd_install_relocation
955 bfd_reloc_status_type bfd_install_relocation
957 arelent *reloc_entry,
958 void *data, bfd_vma data_start,
959 asection *input_section,
960 char **error_message);
963 This looks remarkably like <<bfd_perform_relocation>>, except it
964 does not expect that the section contents have been filled in.
965 I.e., it's suitable for use when creating, rather than applying
968 For now, this function should be considered reserved for the
972 bfd_reloc_status_type
973 bfd_install_relocation (bfd
*abfd
,
974 arelent
*reloc_entry
,
976 bfd_vma data_start_offset
,
977 asection
*input_section
,
978 char **error_message
)
981 bfd_reloc_status_type flag
= bfd_reloc_ok
;
982 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
983 bfd_vma output_base
= 0;
984 reloc_howto_type
*howto
= reloc_entry
->howto
;
985 asection
*reloc_target_output_section
;
989 symbol
= *(reloc_entry
->sym_ptr_ptr
);
990 if (bfd_is_abs_section (symbol
->section
))
992 reloc_entry
->address
+= input_section
->output_offset
;
996 /* If there is a function supplied to handle this relocation type,
997 call it. It'll return `bfd_reloc_continue' if further processing
999 if (howto
->special_function
)
1001 bfd_reloc_status_type cont
;
1003 /* XXX - The special_function calls haven't been fixed up to deal
1004 with creating new relocations and section contents. */
1005 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
1006 /* XXX - Non-portable! */
1007 ((bfd_byte
*) data_start
1008 - data_start_offset
),
1009 input_section
, abfd
, error_message
);
1010 if (cont
!= bfd_reloc_continue
)
1014 /* Is the address of the relocation really within the section? */
1015 if (reloc_entry
->address
> (input_section
->_cooked_size
1016 / bfd_octets_per_byte (abfd
)))
1017 return bfd_reloc_outofrange
;
1019 /* Work out which section the relocation is targetted at and the
1020 initial relocation command value. */
1022 /* Get symbol value. (Common symbols are special.) */
1023 if (bfd_is_com_section (symbol
->section
))
1026 relocation
= symbol
->value
;
1028 reloc_target_output_section
= symbol
->section
->output_section
;
1030 /* Convert input-section-relative symbol value to absolute. */
1031 if (! howto
->partial_inplace
)
1034 output_base
= reloc_target_output_section
->vma
;
1036 relocation
+= output_base
+ symbol
->section
->output_offset
;
1038 /* Add in supplied addend. */
1039 relocation
+= reloc_entry
->addend
;
1041 /* Here the variable relocation holds the final address of the
1042 symbol we are relocating against, plus any addend. */
1044 if (howto
->pc_relative
)
1046 /* This is a PC relative relocation. We want to set RELOCATION
1047 to the distance between the address of the symbol and the
1048 location. RELOCATION is already the address of the symbol.
1050 We start by subtracting the address of the section containing
1053 If pcrel_offset is set, we must further subtract the position
1054 of the location within the section. Some targets arrange for
1055 the addend to be the negative of the position of the location
1056 within the section; for example, i386-aout does this. For
1057 i386-aout, pcrel_offset is FALSE. Some other targets do not
1058 include the position of the location; for example, m88kbcs,
1059 or ELF. For those targets, pcrel_offset is TRUE.
1061 If we are producing relocatable output, then we must ensure
1062 that this reloc will be correctly computed when the final
1063 relocation is done. If pcrel_offset is FALSE we want to wind
1064 up with the negative of the location within the section,
1065 which means we must adjust the existing addend by the change
1066 in the location within the section. If pcrel_offset is TRUE
1067 we do not want to adjust the existing addend at all.
1069 FIXME: This seems logical to me, but for the case of
1070 producing relocatable output it is not what the code
1071 actually does. I don't want to change it, because it seems
1072 far too likely that something will break. */
1075 input_section
->output_section
->vma
+ input_section
->output_offset
;
1077 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1078 relocation
-= reloc_entry
->address
;
1081 if (! howto
->partial_inplace
)
1083 /* This is a partial relocation, and we want to apply the relocation
1084 to the reloc entry rather than the raw data. Modify the reloc
1085 inplace to reflect what we now know. */
1086 reloc_entry
->addend
= relocation
;
1087 reloc_entry
->address
+= input_section
->output_offset
;
1092 /* This is a partial relocation, but inplace, so modify the
1095 If we've relocated with a symbol with a section, change
1096 into a ref to the section belonging to the symbol. */
1097 reloc_entry
->address
+= input_section
->output_offset
;
1100 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1101 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1102 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1105 /* For m68k-coff, the addend was being subtracted twice during
1106 relocation with -r. Removing the line below this comment
1107 fixes that problem; see PR 2953.
1109 However, Ian wrote the following, regarding removing the line below,
1110 which explains why it is still enabled: --djm
1112 If you put a patch like that into BFD you need to check all the COFF
1113 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1114 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1115 problem in a different way. There may very well be a reason that the
1116 code works as it does.
1118 Hmmm. The first obvious point is that bfd_install_relocation should
1119 not have any tests that depend upon the flavour. It's seem like
1120 entirely the wrong place for such a thing. The second obvious point
1121 is that the current code ignores the reloc addend when producing
1122 relocatable output for COFF. That's peculiar. In fact, I really
1123 have no idea what the point of the line you want to remove is.
1125 A typical COFF reloc subtracts the old value of the symbol and adds in
1126 the new value to the location in the object file (if it's a pc
1127 relative reloc it adds the difference between the symbol value and the
1128 location). When relocating we need to preserve that property.
1130 BFD handles this by setting the addend to the negative of the old
1131 value of the symbol. Unfortunately it handles common symbols in a
1132 non-standard way (it doesn't subtract the old value) but that's a
1133 different story (we can't change it without losing backward
1134 compatibility with old object files) (coff-i386 does subtract the old
1135 value, to be compatible with existing coff-i386 targets, like SCO).
1137 So everything works fine when not producing relocatable output. When
1138 we are producing relocatable output, logically we should do exactly
1139 what we do when not producing relocatable output. Therefore, your
1140 patch is correct. In fact, it should probably always just set
1141 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1142 add the value into the object file. This won't hurt the COFF code,
1143 which doesn't use the addend; I'm not sure what it will do to other
1144 formats (the thing to check for would be whether any formats both use
1145 the addend and set partial_inplace).
1147 When I wanted to make coff-i386 produce relocatable output, I ran
1148 into the problem that you are running into: I wanted to remove that
1149 line. Rather than risk it, I made the coff-i386 relocs use a special
1150 function; it's coff_i386_reloc in coff-i386.c. The function
1151 specifically adds the addend field into the object file, knowing that
1152 bfd_install_relocation is not going to. If you remove that line, then
1153 coff-i386.c will wind up adding the addend field in twice. It's
1154 trivial to fix; it just needs to be done.
1156 The problem with removing the line is just that it may break some
1157 working code. With BFD it's hard to be sure of anything. The right
1158 way to deal with this is simply to build and test at least all the
1159 supported COFF targets. It should be straightforward if time and disk
1160 space consuming. For each target:
1162 2) generate some executable, and link it using -r (I would
1163 probably use paranoia.o and link against newlib/libc.a, which
1164 for all the supported targets would be available in
1165 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1166 3) make the change to reloc.c
1167 4) rebuild the linker
1169 6) if the resulting object files are the same, you have at least
1171 7) if they are different you have to figure out which version is
1173 relocation
-= reloc_entry
->addend
;
1175 reloc_entry
->addend
= 0;
1179 reloc_entry
->addend
= relocation
;
1183 /* FIXME: This overflow checking is incomplete, because the value
1184 might have overflowed before we get here. For a correct check we
1185 need to compute the value in a size larger than bitsize, but we
1186 can't reasonably do that for a reloc the same size as a host
1188 FIXME: We should also do overflow checking on the result after
1189 adding in the value contained in the object file. */
1190 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1191 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1194 bfd_arch_bits_per_address (abfd
),
1197 /* Either we are relocating all the way, or we don't want to apply
1198 the relocation to the reloc entry (probably because there isn't
1199 any room in the output format to describe addends to relocs). */
1201 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1202 (OSF version 1.3, compiler version 3.11). It miscompiles the
1216 x <<= (unsigned long) s.i0;
1218 printf ("failed\n");
1220 printf ("succeeded (%lx)\n", x);
1224 relocation
>>= (bfd_vma
) howto
->rightshift
;
1226 /* Shift everything up to where it's going to be used. */
1227 relocation
<<= (bfd_vma
) howto
->bitpos
;
1229 /* Wait for the day when all have the mask in them. */
1232 i instruction to be left alone
1233 o offset within instruction
1234 r relocation offset to apply
1243 (( i i i i i o o o o o from bfd_get<size>
1244 and S S S S S) to get the size offset we want
1245 + r r r r r r r r r r) to get the final value to place
1246 and D D D D D to chop to right size
1247 -----------------------
1250 ( i i i i i o o o o o from bfd_get<size>
1251 and N N N N N ) get instruction
1252 -----------------------
1258 -----------------------
1259 = R R R R R R R R R R put into bfd_put<size>
1263 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1265 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1267 switch (howto
->size
)
1271 char x
= bfd_get_8 (abfd
, data
);
1273 bfd_put_8 (abfd
, x
, data
);
1279 short x
= bfd_get_16 (abfd
, data
);
1281 bfd_put_16 (abfd
, (bfd_vma
) x
, data
);
1286 long x
= bfd_get_32 (abfd
, data
);
1288 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1293 long x
= bfd_get_32 (abfd
, data
);
1294 relocation
= -relocation
;
1296 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1306 bfd_vma x
= bfd_get_64 (abfd
, data
);
1308 bfd_put_64 (abfd
, x
, data
);
1312 return bfd_reloc_other
;
1318 /* This relocation routine is used by some of the backend linkers.
1319 They do not construct asymbol or arelent structures, so there is no
1320 reason for them to use bfd_perform_relocation. Also,
1321 bfd_perform_relocation is so hacked up it is easier to write a new
1322 function than to try to deal with it.
1324 This routine does a final relocation. Whether it is useful for a
1325 relocatable link depends upon how the object format defines
1328 FIXME: This routine ignores any special_function in the HOWTO,
1329 since the existing special_function values have been written for
1330 bfd_perform_relocation.
1332 HOWTO is the reloc howto information.
1333 INPUT_BFD is the BFD which the reloc applies to.
1334 INPUT_SECTION is the section which the reloc applies to.
1335 CONTENTS is the contents of the section.
1336 ADDRESS is the address of the reloc within INPUT_SECTION.
1337 VALUE is the value of the symbol the reloc refers to.
1338 ADDEND is the addend of the reloc. */
1340 bfd_reloc_status_type
1341 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1343 asection
*input_section
,
1351 /* Sanity check the address. */
1352 if (address
> input_section
->_raw_size
)
1353 return bfd_reloc_outofrange
;
1355 /* This function assumes that we are dealing with a basic relocation
1356 against a symbol. We want to compute the value of the symbol to
1357 relocate to. This is just VALUE, the value of the symbol, plus
1358 ADDEND, any addend associated with the reloc. */
1359 relocation
= value
+ addend
;
1361 /* If the relocation is PC relative, we want to set RELOCATION to
1362 the distance between the symbol (currently in RELOCATION) and the
1363 location we are relocating. Some targets (e.g., i386-aout)
1364 arrange for the contents of the section to be the negative of the
1365 offset of the location within the section; for such targets
1366 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1367 simply leave the contents of the section as zero; for such
1368 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1369 need to subtract out the offset of the location within the
1370 section (which is just ADDRESS). */
1371 if (howto
->pc_relative
)
1373 relocation
-= (input_section
->output_section
->vma
1374 + input_section
->output_offset
);
1375 if (howto
->pcrel_offset
)
1376 relocation
-= address
;
1379 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1380 contents
+ address
);
1383 /* Relocate a given location using a given value and howto. */
1385 bfd_reloc_status_type
1386 _bfd_relocate_contents (reloc_howto_type
*howto
,
1393 bfd_reloc_status_type flag
;
1394 unsigned int rightshift
= howto
->rightshift
;
1395 unsigned int bitpos
= howto
->bitpos
;
1397 /* If the size is negative, negate RELOCATION. This isn't very
1399 if (howto
->size
< 0)
1400 relocation
= -relocation
;
1402 /* Get the value we are going to relocate. */
1403 size
= bfd_get_reloc_size (howto
);
1410 x
= bfd_get_8 (input_bfd
, location
);
1413 x
= bfd_get_16 (input_bfd
, location
);
1416 x
= bfd_get_32 (input_bfd
, location
);
1420 x
= bfd_get_64 (input_bfd
, location
);
1427 /* Check for overflow. FIXME: We may drop bits during the addition
1428 which we don't check for. We must either check at every single
1429 operation, which would be tedious, or we must do the computations
1430 in a type larger than bfd_vma, which would be inefficient. */
1431 flag
= bfd_reloc_ok
;
1432 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1434 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1437 /* Get the values to be added together. For signed and unsigned
1438 relocations, we assume that all values should be truncated to
1439 the size of an address. For bitfields, all the bits matter.
1440 See also bfd_check_overflow. */
1441 fieldmask
= N_ONES (howto
->bitsize
);
1442 addrmask
= N_ONES (bfd_arch_bits_per_address (input_bfd
)) | fieldmask
;
1444 b
= x
& howto
->src_mask
;
1446 switch (howto
->complain_on_overflow
)
1448 case complain_overflow_signed
:
1449 a
= (a
& addrmask
) >> rightshift
;
1451 /* If any sign bits are set, all sign bits must be set.
1452 That is, A must be a valid negative address after
1454 signmask
= ~ (fieldmask
>> 1);
1456 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
1457 flag
= bfd_reloc_overflow
;
1459 /* We only need this next bit of code if the sign bit of B
1460 is below the sign bit of A. This would only happen if
1461 SRC_MASK had fewer bits than BITSIZE. Note that if
1462 SRC_MASK has more bits than BITSIZE, we can get into
1463 trouble; we would need to verify that B is in range, as
1464 we do for A above. */
1465 signmask
= ((~ howto
->src_mask
) >> 1) & howto
->src_mask
;
1467 /* Set all the bits above the sign bit. */
1468 b
= (b
^ signmask
) - signmask
;
1470 b
= (b
& addrmask
) >> bitpos
;
1472 /* Now we can do the addition. */
1475 /* See if the result has the correct sign. Bits above the
1476 sign bit are junk now; ignore them. If the sum is
1477 positive, make sure we did not have all negative inputs;
1478 if the sum is negative, make sure we did not have all
1479 positive inputs. The test below looks only at the sign
1480 bits, and it really just
1481 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1483 signmask
= (fieldmask
>> 1) + 1;
1484 if (((~ (a
^ b
)) & (a
^ sum
)) & signmask
)
1485 flag
= bfd_reloc_overflow
;
1489 case complain_overflow_unsigned
:
1490 /* Checking for an unsigned overflow is relatively easy:
1491 trim the addresses and add, and trim the result as well.
1492 Overflow is normally indicated when the result does not
1493 fit in the field. However, we also need to consider the
1494 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1495 input is 0x80000000, and bfd_vma is only 32 bits; then we
1496 will get sum == 0, but there is an overflow, since the
1497 inputs did not fit in the field. Instead of doing a
1498 separate test, we can check for this by or-ing in the
1499 operands when testing for the sum overflowing its final
1501 a
= (a
& addrmask
) >> rightshift
;
1502 b
= (b
& addrmask
) >> bitpos
;
1503 sum
= (a
+ b
) & addrmask
;
1504 if ((a
| b
| sum
) & ~ fieldmask
)
1505 flag
= bfd_reloc_overflow
;
1509 case complain_overflow_bitfield
:
1510 /* Much like the signed check, but for a field one bit
1511 wider, and no trimming inputs with addrmask. We allow a
1512 bitfield to represent numbers in the range -2**n to
1513 2**n-1, where n is the number of bits in the field.
1514 Note that when bfd_vma is 32 bits, a 32-bit reloc can't
1515 overflow, which is exactly what we want. */
1518 signmask
= ~ fieldmask
;
1520 if (ss
!= 0 && ss
!= (((bfd_vma
) -1 >> rightshift
) & signmask
))
1521 flag
= bfd_reloc_overflow
;
1523 signmask
= ((~ howto
->src_mask
) >> 1) & howto
->src_mask
;
1524 b
= (b
^ signmask
) - signmask
;
1530 /* We mask with addrmask here to explicitly allow an address
1531 wrap-around. The Linux kernel relies on it, and it is
1532 the only way to write assembler code which can run when
1533 loaded at a location 0x80000000 away from the location at
1534 which it is linked. */
1535 signmask
= fieldmask
+ 1;
1536 if (((~ (a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1537 flag
= bfd_reloc_overflow
;
1546 /* Put RELOCATION in the right bits. */
1547 relocation
>>= (bfd_vma
) rightshift
;
1548 relocation
<<= (bfd_vma
) bitpos
;
1550 /* Add RELOCATION to the right bits of X. */
1551 x
= ((x
& ~howto
->dst_mask
)
1552 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1554 /* Put the relocated value back in the object file. */
1561 bfd_put_8 (input_bfd
, x
, location
);
1564 bfd_put_16 (input_bfd
, x
, location
);
1567 bfd_put_32 (input_bfd
, x
, location
);
1571 bfd_put_64 (input_bfd
, x
, location
);
1584 howto manager, , typedef arelent, Relocations
1589 When an application wants to create a relocation, but doesn't
1590 know what the target machine might call it, it can find out by
1591 using this bit of code.
1600 The insides of a reloc code. The idea is that, eventually, there
1601 will be one enumerator for every type of relocation we ever do.
1602 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1603 return a howto pointer.
1605 This does mean that the application must determine the correct
1606 enumerator value; you can't get a howto pointer from a random set
1627 Basic absolute relocations of N bits.
1642 PC-relative relocations. Sometimes these are relative to the address
1643 of the relocation itself; sometimes they are relative to the start of
1644 the section containing the relocation. It depends on the specific target.
1646 The 24-bit relocation is used in some Intel 960 configurations.
1649 BFD_RELOC_32_GOT_PCREL
1651 BFD_RELOC_16_GOT_PCREL
1653 BFD_RELOC_8_GOT_PCREL
1659 BFD_RELOC_LO16_GOTOFF
1661 BFD_RELOC_HI16_GOTOFF
1663 BFD_RELOC_HI16_S_GOTOFF
1667 BFD_RELOC_64_PLT_PCREL
1669 BFD_RELOC_32_PLT_PCREL
1671 BFD_RELOC_24_PLT_PCREL
1673 BFD_RELOC_16_PLT_PCREL
1675 BFD_RELOC_8_PLT_PCREL
1683 BFD_RELOC_LO16_PLTOFF
1685 BFD_RELOC_HI16_PLTOFF
1687 BFD_RELOC_HI16_S_PLTOFF
1694 BFD_RELOC_68K_GLOB_DAT
1696 BFD_RELOC_68K_JMP_SLOT
1698 BFD_RELOC_68K_RELATIVE
1700 Relocations used by 68K ELF.
1703 BFD_RELOC_32_BASEREL
1705 BFD_RELOC_16_BASEREL
1707 BFD_RELOC_LO16_BASEREL
1709 BFD_RELOC_HI16_BASEREL
1711 BFD_RELOC_HI16_S_BASEREL
1717 Linkage-table relative.
1722 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1725 BFD_RELOC_32_PCREL_S2
1727 BFD_RELOC_16_PCREL_S2
1729 BFD_RELOC_23_PCREL_S2
1731 These PC-relative relocations are stored as word displacements --
1732 i.e., byte displacements shifted right two bits. The 30-bit word
1733 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1734 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1735 signed 16-bit displacement is used on the MIPS, and the 23-bit
1736 displacement is used on the Alpha.
1743 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1744 the target word. These are used on the SPARC.
1751 For systems that allocate a Global Pointer register, these are
1752 displacements off that register. These relocation types are
1753 handled specially, because the value the register will have is
1754 decided relatively late.
1757 BFD_RELOC_I960_CALLJ
1759 Reloc types used for i960/b.out.
1764 BFD_RELOC_SPARC_WDISP22
1770 BFD_RELOC_SPARC_GOT10
1772 BFD_RELOC_SPARC_GOT13
1774 BFD_RELOC_SPARC_GOT22
1776 BFD_RELOC_SPARC_PC10
1778 BFD_RELOC_SPARC_PC22
1780 BFD_RELOC_SPARC_WPLT30
1782 BFD_RELOC_SPARC_COPY
1784 BFD_RELOC_SPARC_GLOB_DAT
1786 BFD_RELOC_SPARC_JMP_SLOT
1788 BFD_RELOC_SPARC_RELATIVE
1790 BFD_RELOC_SPARC_UA16
1792 BFD_RELOC_SPARC_UA32
1794 BFD_RELOC_SPARC_UA64
1796 SPARC ELF relocations. There is probably some overlap with other
1797 relocation types already defined.
1800 BFD_RELOC_SPARC_BASE13
1802 BFD_RELOC_SPARC_BASE22
1804 I think these are specific to SPARC a.out (e.g., Sun 4).
1814 BFD_RELOC_SPARC_OLO10
1816 BFD_RELOC_SPARC_HH22
1818 BFD_RELOC_SPARC_HM10
1820 BFD_RELOC_SPARC_LM22
1822 BFD_RELOC_SPARC_PC_HH22
1824 BFD_RELOC_SPARC_PC_HM10
1826 BFD_RELOC_SPARC_PC_LM22
1828 BFD_RELOC_SPARC_WDISP16
1830 BFD_RELOC_SPARC_WDISP19
1838 BFD_RELOC_SPARC_DISP64
1841 BFD_RELOC_SPARC_PLT32
1843 BFD_RELOC_SPARC_PLT64
1845 BFD_RELOC_SPARC_HIX22
1847 BFD_RELOC_SPARC_LOX10
1855 BFD_RELOC_SPARC_REGISTER
1860 BFD_RELOC_SPARC_REV32
1862 SPARC little endian relocation
1864 BFD_RELOC_SPARC_TLS_GD_HI22
1866 BFD_RELOC_SPARC_TLS_GD_LO10
1868 BFD_RELOC_SPARC_TLS_GD_ADD
1870 BFD_RELOC_SPARC_TLS_GD_CALL
1872 BFD_RELOC_SPARC_TLS_LDM_HI22
1874 BFD_RELOC_SPARC_TLS_LDM_LO10
1876 BFD_RELOC_SPARC_TLS_LDM_ADD
1878 BFD_RELOC_SPARC_TLS_LDM_CALL
1880 BFD_RELOC_SPARC_TLS_LDO_HIX22
1882 BFD_RELOC_SPARC_TLS_LDO_LOX10
1884 BFD_RELOC_SPARC_TLS_LDO_ADD
1886 BFD_RELOC_SPARC_TLS_IE_HI22
1888 BFD_RELOC_SPARC_TLS_IE_LO10
1890 BFD_RELOC_SPARC_TLS_IE_LD
1892 BFD_RELOC_SPARC_TLS_IE_LDX
1894 BFD_RELOC_SPARC_TLS_IE_ADD
1896 BFD_RELOC_SPARC_TLS_LE_HIX22
1898 BFD_RELOC_SPARC_TLS_LE_LOX10
1900 BFD_RELOC_SPARC_TLS_DTPMOD32
1902 BFD_RELOC_SPARC_TLS_DTPMOD64
1904 BFD_RELOC_SPARC_TLS_DTPOFF32
1906 BFD_RELOC_SPARC_TLS_DTPOFF64
1908 BFD_RELOC_SPARC_TLS_TPOFF32
1910 BFD_RELOC_SPARC_TLS_TPOFF64
1912 SPARC TLS relocations
1915 BFD_RELOC_ALPHA_GPDISP_HI16
1917 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1918 "addend" in some special way.
1919 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1920 writing; when reading, it will be the absolute section symbol. The
1921 addend is the displacement in bytes of the "lda" instruction from
1922 the "ldah" instruction (which is at the address of this reloc).
1924 BFD_RELOC_ALPHA_GPDISP_LO16
1926 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1927 with GPDISP_HI16 relocs. The addend is ignored when writing the
1928 relocations out, and is filled in with the file's GP value on
1929 reading, for convenience.
1932 BFD_RELOC_ALPHA_GPDISP
1934 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1935 relocation except that there is no accompanying GPDISP_LO16
1939 BFD_RELOC_ALPHA_LITERAL
1941 BFD_RELOC_ALPHA_ELF_LITERAL
1943 BFD_RELOC_ALPHA_LITUSE
1945 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1946 the assembler turns it into a LDQ instruction to load the address of
1947 the symbol, and then fills in a register in the real instruction.
1949 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1950 section symbol. The addend is ignored when writing, but is filled
1951 in with the file's GP value on reading, for convenience, as with the
1954 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1955 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1956 but it generates output not based on the position within the .got
1957 section, but relative to the GP value chosen for the file during the
1960 The LITUSE reloc, on the instruction using the loaded address, gives
1961 information to the linker that it might be able to use to optimize
1962 away some literal section references. The symbol is ignored (read
1963 as the absolute section symbol), and the "addend" indicates the type
1964 of instruction using the register:
1965 1 - "memory" fmt insn
1966 2 - byte-manipulation (byte offset reg)
1967 3 - jsr (target of branch)
1970 BFD_RELOC_ALPHA_HINT
1972 The HINT relocation indicates a value that should be filled into the
1973 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1974 prediction logic which may be provided on some processors.
1977 BFD_RELOC_ALPHA_LINKAGE
1979 The LINKAGE relocation outputs a linkage pair in the object file,
1980 which is filled by the linker.
1983 BFD_RELOC_ALPHA_CODEADDR
1985 The CODEADDR relocation outputs a STO_CA in the object file,
1986 which is filled by the linker.
1989 BFD_RELOC_ALPHA_GPREL_HI16
1991 BFD_RELOC_ALPHA_GPREL_LO16
1993 The GPREL_HI/LO relocations together form a 32-bit offset from the
1997 BFD_RELOC_ALPHA_BRSGP
1999 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2000 share a common GP, and the target address is adjusted for
2001 STO_ALPHA_STD_GPLOAD.
2004 BFD_RELOC_ALPHA_TLSGD
2006 BFD_RELOC_ALPHA_TLSLDM
2008 BFD_RELOC_ALPHA_DTPMOD64
2010 BFD_RELOC_ALPHA_GOTDTPREL16
2012 BFD_RELOC_ALPHA_DTPREL64
2014 BFD_RELOC_ALPHA_DTPREL_HI16
2016 BFD_RELOC_ALPHA_DTPREL_LO16
2018 BFD_RELOC_ALPHA_DTPREL16
2020 BFD_RELOC_ALPHA_GOTTPREL16
2022 BFD_RELOC_ALPHA_TPREL64
2024 BFD_RELOC_ALPHA_TPREL_HI16
2026 BFD_RELOC_ALPHA_TPREL_LO16
2028 BFD_RELOC_ALPHA_TPREL16
2030 Alpha thread-local storage relocations.
2035 Bits 27..2 of the relocation address shifted right 2 bits;
2036 simple reloc otherwise.
2039 BFD_RELOC_MIPS16_JMP
2041 The MIPS16 jump instruction.
2044 BFD_RELOC_MIPS16_GPREL
2046 MIPS16 GP relative reloc.
2051 High 16 bits of 32-bit value; simple reloc.
2055 High 16 bits of 32-bit value but the low 16 bits will be sign
2056 extended and added to form the final result. If the low 16
2057 bits form a negative number, we need to add one to the high value
2058 to compensate for the borrow when the low bits are added.
2064 BFD_RELOC_PCREL_HI16_S
2066 Like BFD_RELOC_HI16_S, but PC relative.
2068 BFD_RELOC_PCREL_LO16
2070 Like BFD_RELOC_LO16, but PC relative.
2073 BFD_RELOC_MIPS_LITERAL
2075 Relocation against a MIPS literal section.
2078 BFD_RELOC_MIPS_GOT16
2080 BFD_RELOC_MIPS_CALL16
2082 BFD_RELOC_MIPS_GOT_HI16
2084 BFD_RELOC_MIPS_GOT_LO16
2086 BFD_RELOC_MIPS_CALL_HI16
2088 BFD_RELOC_MIPS_CALL_LO16
2092 BFD_RELOC_MIPS_GOT_PAGE
2094 BFD_RELOC_MIPS_GOT_OFST
2096 BFD_RELOC_MIPS_GOT_DISP
2098 BFD_RELOC_MIPS_SHIFT5
2100 BFD_RELOC_MIPS_SHIFT6
2102 BFD_RELOC_MIPS_INSERT_A
2104 BFD_RELOC_MIPS_INSERT_B
2106 BFD_RELOC_MIPS_DELETE
2108 BFD_RELOC_MIPS_HIGHEST
2110 BFD_RELOC_MIPS_HIGHER
2112 BFD_RELOC_MIPS_SCN_DISP
2114 BFD_RELOC_MIPS_REL16
2116 BFD_RELOC_MIPS_RELGOT
2120 MIPS ELF relocations.
2124 BFD_RELOC_FRV_LABEL16
2126 BFD_RELOC_FRV_LABEL24
2132 BFD_RELOC_FRV_GPREL12
2134 BFD_RELOC_FRV_GPRELU12
2136 BFD_RELOC_FRV_GPREL32
2138 BFD_RELOC_FRV_GPRELHI
2140 BFD_RELOC_FRV_GPRELLO
2142 Fujitsu Frv Relocations.
2146 BFD_RELOC_MN10300_GOTOFF24
2148 This is a 24bit GOT-relative reloc for the mn10300.
2150 BFD_RELOC_MN10300_GOT32
2152 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2155 BFD_RELOC_MN10300_GOT24
2157 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2160 BFD_RELOC_MN10300_GOT16
2162 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2165 BFD_RELOC_MN10300_COPY
2167 Copy symbol at runtime.
2169 BFD_RELOC_MN10300_GLOB_DAT
2173 BFD_RELOC_MN10300_JMP_SLOT
2177 BFD_RELOC_MN10300_RELATIVE
2179 Adjust by program base.
2189 BFD_RELOC_386_GLOB_DAT
2191 BFD_RELOC_386_JUMP_SLOT
2193 BFD_RELOC_386_RELATIVE
2195 BFD_RELOC_386_GOTOFF
2199 BFD_RELOC_386_TLS_TPOFF
2201 BFD_RELOC_386_TLS_IE
2203 BFD_RELOC_386_TLS_GOTIE
2205 BFD_RELOC_386_TLS_LE
2207 BFD_RELOC_386_TLS_GD
2209 BFD_RELOC_386_TLS_LDM
2211 BFD_RELOC_386_TLS_LDO_32
2213 BFD_RELOC_386_TLS_IE_32
2215 BFD_RELOC_386_TLS_LE_32
2217 BFD_RELOC_386_TLS_DTPMOD32
2219 BFD_RELOC_386_TLS_DTPOFF32
2221 BFD_RELOC_386_TLS_TPOFF32
2223 i386/elf relocations
2226 BFD_RELOC_X86_64_GOT32
2228 BFD_RELOC_X86_64_PLT32
2230 BFD_RELOC_X86_64_COPY
2232 BFD_RELOC_X86_64_GLOB_DAT
2234 BFD_RELOC_X86_64_JUMP_SLOT
2236 BFD_RELOC_X86_64_RELATIVE
2238 BFD_RELOC_X86_64_GOTPCREL
2240 BFD_RELOC_X86_64_32S
2242 BFD_RELOC_X86_64_DTPMOD64
2244 BFD_RELOC_X86_64_DTPOFF64
2246 BFD_RELOC_X86_64_TPOFF64
2248 BFD_RELOC_X86_64_TLSGD
2250 BFD_RELOC_X86_64_TLSLD
2252 BFD_RELOC_X86_64_DTPOFF32
2254 BFD_RELOC_X86_64_GOTTPOFF
2256 BFD_RELOC_X86_64_TPOFF32
2258 x86-64/elf relocations
2261 BFD_RELOC_NS32K_IMM_8
2263 BFD_RELOC_NS32K_IMM_16
2265 BFD_RELOC_NS32K_IMM_32
2267 BFD_RELOC_NS32K_IMM_8_PCREL
2269 BFD_RELOC_NS32K_IMM_16_PCREL
2271 BFD_RELOC_NS32K_IMM_32_PCREL
2273 BFD_RELOC_NS32K_DISP_8
2275 BFD_RELOC_NS32K_DISP_16
2277 BFD_RELOC_NS32K_DISP_32
2279 BFD_RELOC_NS32K_DISP_8_PCREL
2281 BFD_RELOC_NS32K_DISP_16_PCREL
2283 BFD_RELOC_NS32K_DISP_32_PCREL
2288 BFD_RELOC_PDP11_DISP_8_PCREL
2290 BFD_RELOC_PDP11_DISP_6_PCREL
2295 BFD_RELOC_PJ_CODE_HI16
2297 BFD_RELOC_PJ_CODE_LO16
2299 BFD_RELOC_PJ_CODE_DIR16
2301 BFD_RELOC_PJ_CODE_DIR32
2303 BFD_RELOC_PJ_CODE_REL16
2305 BFD_RELOC_PJ_CODE_REL32
2307 Picojava relocs. Not all of these appear in object files.
2318 BFD_RELOC_PPC_B16_BRTAKEN
2320 BFD_RELOC_PPC_B16_BRNTAKEN
2324 BFD_RELOC_PPC_BA16_BRTAKEN
2326 BFD_RELOC_PPC_BA16_BRNTAKEN
2330 BFD_RELOC_PPC_GLOB_DAT
2332 BFD_RELOC_PPC_JMP_SLOT
2334 BFD_RELOC_PPC_RELATIVE
2336 BFD_RELOC_PPC_LOCAL24PC
2338 BFD_RELOC_PPC_EMB_NADDR32
2340 BFD_RELOC_PPC_EMB_NADDR16
2342 BFD_RELOC_PPC_EMB_NADDR16_LO
2344 BFD_RELOC_PPC_EMB_NADDR16_HI
2346 BFD_RELOC_PPC_EMB_NADDR16_HA
2348 BFD_RELOC_PPC_EMB_SDAI16
2350 BFD_RELOC_PPC_EMB_SDA2I16
2352 BFD_RELOC_PPC_EMB_SDA2REL
2354 BFD_RELOC_PPC_EMB_SDA21
2356 BFD_RELOC_PPC_EMB_MRKREF
2358 BFD_RELOC_PPC_EMB_RELSEC16
2360 BFD_RELOC_PPC_EMB_RELST_LO
2362 BFD_RELOC_PPC_EMB_RELST_HI
2364 BFD_RELOC_PPC_EMB_RELST_HA
2366 BFD_RELOC_PPC_EMB_BIT_FLD
2368 BFD_RELOC_PPC_EMB_RELSDA
2370 BFD_RELOC_PPC64_HIGHER
2372 BFD_RELOC_PPC64_HIGHER_S
2374 BFD_RELOC_PPC64_HIGHEST
2376 BFD_RELOC_PPC64_HIGHEST_S
2378 BFD_RELOC_PPC64_TOC16_LO
2380 BFD_RELOC_PPC64_TOC16_HI
2382 BFD_RELOC_PPC64_TOC16_HA
2386 BFD_RELOC_PPC64_PLTGOT16
2388 BFD_RELOC_PPC64_PLTGOT16_LO
2390 BFD_RELOC_PPC64_PLTGOT16_HI
2392 BFD_RELOC_PPC64_PLTGOT16_HA
2394 BFD_RELOC_PPC64_ADDR16_DS
2396 BFD_RELOC_PPC64_ADDR16_LO_DS
2398 BFD_RELOC_PPC64_GOT16_DS
2400 BFD_RELOC_PPC64_GOT16_LO_DS
2402 BFD_RELOC_PPC64_PLT16_LO_DS
2404 BFD_RELOC_PPC64_SECTOFF_DS
2406 BFD_RELOC_PPC64_SECTOFF_LO_DS
2408 BFD_RELOC_PPC64_TOC16_DS
2410 BFD_RELOC_PPC64_TOC16_LO_DS
2412 BFD_RELOC_PPC64_PLTGOT16_DS
2414 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2416 Power(rs6000) and PowerPC relocations.
2421 BFD_RELOC_PPC_DTPMOD
2423 BFD_RELOC_PPC_TPREL16
2425 BFD_RELOC_PPC_TPREL16_LO
2427 BFD_RELOC_PPC_TPREL16_HI
2429 BFD_RELOC_PPC_TPREL16_HA
2433 BFD_RELOC_PPC_DTPREL16
2435 BFD_RELOC_PPC_DTPREL16_LO
2437 BFD_RELOC_PPC_DTPREL16_HI
2439 BFD_RELOC_PPC_DTPREL16_HA
2441 BFD_RELOC_PPC_DTPREL
2443 BFD_RELOC_PPC_GOT_TLSGD16
2445 BFD_RELOC_PPC_GOT_TLSGD16_LO
2447 BFD_RELOC_PPC_GOT_TLSGD16_HI
2449 BFD_RELOC_PPC_GOT_TLSGD16_HA
2451 BFD_RELOC_PPC_GOT_TLSLD16
2453 BFD_RELOC_PPC_GOT_TLSLD16_LO
2455 BFD_RELOC_PPC_GOT_TLSLD16_HI
2457 BFD_RELOC_PPC_GOT_TLSLD16_HA
2459 BFD_RELOC_PPC_GOT_TPREL16
2461 BFD_RELOC_PPC_GOT_TPREL16_LO
2463 BFD_RELOC_PPC_GOT_TPREL16_HI
2465 BFD_RELOC_PPC_GOT_TPREL16_HA
2467 BFD_RELOC_PPC_GOT_DTPREL16
2469 BFD_RELOC_PPC_GOT_DTPREL16_LO
2471 BFD_RELOC_PPC_GOT_DTPREL16_HI
2473 BFD_RELOC_PPC_GOT_DTPREL16_HA
2475 BFD_RELOC_PPC64_TPREL16_DS
2477 BFD_RELOC_PPC64_TPREL16_LO_DS
2479 BFD_RELOC_PPC64_TPREL16_HIGHER
2481 BFD_RELOC_PPC64_TPREL16_HIGHERA
2483 BFD_RELOC_PPC64_TPREL16_HIGHEST
2485 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2487 BFD_RELOC_PPC64_DTPREL16_DS
2489 BFD_RELOC_PPC64_DTPREL16_LO_DS
2491 BFD_RELOC_PPC64_DTPREL16_HIGHER
2493 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2495 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2497 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2499 PowerPC and PowerPC64 thread-local storage relocations.
2504 IBM 370/390 relocations
2509 The type of reloc used to build a contructor table - at the moment
2510 probably a 32 bit wide absolute relocation, but the target can choose.
2511 It generally does map to one of the other relocation types.
2514 BFD_RELOC_ARM_PCREL_BRANCH
2516 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2517 not stored in the instruction.
2519 BFD_RELOC_ARM_PCREL_BLX
2521 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2522 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2523 field in the instruction.
2525 BFD_RELOC_THUMB_PCREL_BLX
2527 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2528 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2529 field in the instruction.
2531 BFD_RELOC_ARM_IMMEDIATE
2533 BFD_RELOC_ARM_ADRL_IMMEDIATE
2535 BFD_RELOC_ARM_OFFSET_IMM
2537 BFD_RELOC_ARM_SHIFT_IMM
2543 BFD_RELOC_ARM_CP_OFF_IMM
2545 BFD_RELOC_ARM_CP_OFF_IMM_S2
2547 BFD_RELOC_ARM_ADR_IMM
2549 BFD_RELOC_ARM_LDR_IMM
2551 BFD_RELOC_ARM_LITERAL
2553 BFD_RELOC_ARM_IN_POOL
2555 BFD_RELOC_ARM_OFFSET_IMM8
2557 BFD_RELOC_ARM_HWLITERAL
2559 BFD_RELOC_ARM_THUMB_ADD
2561 BFD_RELOC_ARM_THUMB_IMM
2563 BFD_RELOC_ARM_THUMB_SHIFT
2565 BFD_RELOC_ARM_THUMB_OFFSET
2571 BFD_RELOC_ARM_JUMP_SLOT
2575 BFD_RELOC_ARM_GLOB_DAT
2579 BFD_RELOC_ARM_RELATIVE
2581 BFD_RELOC_ARM_GOTOFF
2585 These relocs are only used within the ARM assembler. They are not
2586 (at present) written to any object files.
2589 BFD_RELOC_SH_PCDISP8BY2
2591 BFD_RELOC_SH_PCDISP12BY2
2595 BFD_RELOC_SH_IMM4BY2
2597 BFD_RELOC_SH_IMM4BY4
2601 BFD_RELOC_SH_IMM8BY2
2603 BFD_RELOC_SH_IMM8BY4
2605 BFD_RELOC_SH_PCRELIMM8BY2
2607 BFD_RELOC_SH_PCRELIMM8BY4
2609 BFD_RELOC_SH_SWITCH16
2611 BFD_RELOC_SH_SWITCH32
2625 BFD_RELOC_SH_LOOP_START
2627 BFD_RELOC_SH_LOOP_END
2631 BFD_RELOC_SH_GLOB_DAT
2633 BFD_RELOC_SH_JMP_SLOT
2635 BFD_RELOC_SH_RELATIVE
2639 BFD_RELOC_SH_GOT_LOW16
2641 BFD_RELOC_SH_GOT_MEDLOW16
2643 BFD_RELOC_SH_GOT_MEDHI16
2645 BFD_RELOC_SH_GOT_HI16
2647 BFD_RELOC_SH_GOTPLT_LOW16
2649 BFD_RELOC_SH_GOTPLT_MEDLOW16
2651 BFD_RELOC_SH_GOTPLT_MEDHI16
2653 BFD_RELOC_SH_GOTPLT_HI16
2655 BFD_RELOC_SH_PLT_LOW16
2657 BFD_RELOC_SH_PLT_MEDLOW16
2659 BFD_RELOC_SH_PLT_MEDHI16
2661 BFD_RELOC_SH_PLT_HI16
2663 BFD_RELOC_SH_GOTOFF_LOW16
2665 BFD_RELOC_SH_GOTOFF_MEDLOW16
2667 BFD_RELOC_SH_GOTOFF_MEDHI16
2669 BFD_RELOC_SH_GOTOFF_HI16
2671 BFD_RELOC_SH_GOTPC_LOW16
2673 BFD_RELOC_SH_GOTPC_MEDLOW16
2675 BFD_RELOC_SH_GOTPC_MEDHI16
2677 BFD_RELOC_SH_GOTPC_HI16
2681 BFD_RELOC_SH_GLOB_DAT64
2683 BFD_RELOC_SH_JMP_SLOT64
2685 BFD_RELOC_SH_RELATIVE64
2687 BFD_RELOC_SH_GOT10BY4
2689 BFD_RELOC_SH_GOT10BY8
2691 BFD_RELOC_SH_GOTPLT10BY4
2693 BFD_RELOC_SH_GOTPLT10BY8
2695 BFD_RELOC_SH_GOTPLT32
2697 BFD_RELOC_SH_SHMEDIA_CODE
2703 BFD_RELOC_SH_IMMS6BY32
2709 BFD_RELOC_SH_IMMS10BY2
2711 BFD_RELOC_SH_IMMS10BY4
2713 BFD_RELOC_SH_IMMS10BY8
2719 BFD_RELOC_SH_IMM_LOW16
2721 BFD_RELOC_SH_IMM_LOW16_PCREL
2723 BFD_RELOC_SH_IMM_MEDLOW16
2725 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
2727 BFD_RELOC_SH_IMM_MEDHI16
2729 BFD_RELOC_SH_IMM_MEDHI16_PCREL
2731 BFD_RELOC_SH_IMM_HI16
2733 BFD_RELOC_SH_IMM_HI16_PCREL
2737 BFD_RELOC_SH_TLS_GD_32
2739 BFD_RELOC_SH_TLS_LD_32
2741 BFD_RELOC_SH_TLS_LDO_32
2743 BFD_RELOC_SH_TLS_IE_32
2745 BFD_RELOC_SH_TLS_LE_32
2747 BFD_RELOC_SH_TLS_DTPMOD32
2749 BFD_RELOC_SH_TLS_DTPOFF32
2751 BFD_RELOC_SH_TLS_TPOFF32
2753 Renesas / SuperH SH relocs. Not all of these appear in object files.
2756 BFD_RELOC_THUMB_PCREL_BRANCH9
2758 BFD_RELOC_THUMB_PCREL_BRANCH12
2760 BFD_RELOC_THUMB_PCREL_BRANCH23
2762 Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
2763 be zero and is not stored in the instruction.
2766 BFD_RELOC_ARC_B22_PCREL
2769 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
2770 not stored in the instruction. The high 20 bits are installed in bits 26
2771 through 7 of the instruction.
2775 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
2776 stored in the instruction. The high 24 bits are installed in bits 23
2780 BFD_RELOC_D10V_10_PCREL_R
2782 Mitsubishi D10V relocs.
2783 This is a 10-bit reloc with the right 2 bits
2786 BFD_RELOC_D10V_10_PCREL_L
2788 Mitsubishi D10V relocs.
2789 This is a 10-bit reloc with the right 2 bits
2790 assumed to be 0. This is the same as the previous reloc
2791 except it is in the left container, i.e.,
2792 shifted left 15 bits.
2796 This is an 18-bit reloc with the right 2 bits
2799 BFD_RELOC_D10V_18_PCREL
2801 This is an 18-bit reloc with the right 2 bits
2807 Mitsubishi D30V relocs.
2808 This is a 6-bit absolute reloc.
2810 BFD_RELOC_D30V_9_PCREL
2812 This is a 6-bit pc-relative reloc with
2813 the right 3 bits assumed to be 0.
2815 BFD_RELOC_D30V_9_PCREL_R
2817 This is a 6-bit pc-relative reloc with
2818 the right 3 bits assumed to be 0. Same
2819 as the previous reloc but on the right side
2824 This is a 12-bit absolute reloc with the
2825 right 3 bitsassumed to be 0.
2827 BFD_RELOC_D30V_15_PCREL
2829 This is a 12-bit pc-relative reloc with
2830 the right 3 bits assumed to be 0.
2832 BFD_RELOC_D30V_15_PCREL_R
2834 This is a 12-bit pc-relative reloc with
2835 the right 3 bits assumed to be 0. Same
2836 as the previous reloc but on the right side
2841 This is an 18-bit absolute reloc with
2842 the right 3 bits assumed to be 0.
2844 BFD_RELOC_D30V_21_PCREL
2846 This is an 18-bit pc-relative reloc with
2847 the right 3 bits assumed to be 0.
2849 BFD_RELOC_D30V_21_PCREL_R
2851 This is an 18-bit pc-relative reloc with
2852 the right 3 bits assumed to be 0. Same
2853 as the previous reloc but on the right side
2858 This is a 32-bit absolute reloc.
2860 BFD_RELOC_D30V_32_PCREL
2862 This is a 32-bit pc-relative reloc.
2865 BFD_RELOC_DLX_HI16_S
2880 Renesas M32R (formerly Mitsubishi M32R) relocs.
2881 This is a 24 bit absolute address.
2883 BFD_RELOC_M32R_10_PCREL
2885 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
2887 BFD_RELOC_M32R_18_PCREL
2889 This is an 18-bit reloc with the right 2 bits assumed to be 0.
2891 BFD_RELOC_M32R_26_PCREL
2893 This is a 26-bit reloc with the right 2 bits assumed to be 0.
2895 BFD_RELOC_M32R_HI16_ULO
2897 This is a 16-bit reloc containing the high 16 bits of an address
2898 used when the lower 16 bits are treated as unsigned.
2900 BFD_RELOC_M32R_HI16_SLO
2902 This is a 16-bit reloc containing the high 16 bits of an address
2903 used when the lower 16 bits are treated as signed.
2907 This is a 16-bit reloc containing the lower 16 bits of an address.
2909 BFD_RELOC_M32R_SDA16
2911 This is a 16-bit reloc containing the small data area offset for use in
2912 add3, load, and store instructions.
2915 BFD_RELOC_V850_9_PCREL
2917 This is a 9-bit reloc
2919 BFD_RELOC_V850_22_PCREL
2921 This is a 22-bit reloc
2924 BFD_RELOC_V850_SDA_16_16_OFFSET
2926 This is a 16 bit offset from the short data area pointer.
2928 BFD_RELOC_V850_SDA_15_16_OFFSET
2930 This is a 16 bit offset (of which only 15 bits are used) from the
2931 short data area pointer.
2933 BFD_RELOC_V850_ZDA_16_16_OFFSET
2935 This is a 16 bit offset from the zero data area pointer.
2937 BFD_RELOC_V850_ZDA_15_16_OFFSET
2939 This is a 16 bit offset (of which only 15 bits are used) from the
2940 zero data area pointer.
2942 BFD_RELOC_V850_TDA_6_8_OFFSET
2944 This is an 8 bit offset (of which only 6 bits are used) from the
2945 tiny data area pointer.
2947 BFD_RELOC_V850_TDA_7_8_OFFSET
2949 This is an 8bit offset (of which only 7 bits are used) from the tiny
2952 BFD_RELOC_V850_TDA_7_7_OFFSET
2954 This is a 7 bit offset from the tiny data area pointer.
2956 BFD_RELOC_V850_TDA_16_16_OFFSET
2958 This is a 16 bit offset from the tiny data area pointer.
2961 BFD_RELOC_V850_TDA_4_5_OFFSET
2963 This is a 5 bit offset (of which only 4 bits are used) from the tiny
2966 BFD_RELOC_V850_TDA_4_4_OFFSET
2968 This is a 4 bit offset from the tiny data area pointer.
2970 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
2972 This is a 16 bit offset from the short data area pointer, with the
2973 bits placed non-contigously in the instruction.
2975 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
2977 This is a 16 bit offset from the zero data area pointer, with the
2978 bits placed non-contigously in the instruction.
2980 BFD_RELOC_V850_CALLT_6_7_OFFSET
2982 This is a 6 bit offset from the call table base pointer.
2984 BFD_RELOC_V850_CALLT_16_16_OFFSET
2986 This is a 16 bit offset from the call table base pointer.
2988 BFD_RELOC_V850_LONGCALL
2990 Used for relaxing indirect function calls.
2992 BFD_RELOC_V850_LONGJUMP
2994 Used for relaxing indirect jumps.
2996 BFD_RELOC_V850_ALIGN
2998 Used to maintain alignment whilst relaxing.
3000 BFD_RELOC_MN10300_32_PCREL
3002 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3005 BFD_RELOC_MN10300_16_PCREL
3007 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3013 This is a 8bit DP reloc for the tms320c30, where the most
3014 significant 8 bits of a 24 bit word are placed into the least
3015 significant 8 bits of the opcode.
3018 BFD_RELOC_TIC54X_PARTLS7
3020 This is a 7bit reloc for the tms320c54x, where the least
3021 significant 7 bits of a 16 bit word are placed into the least
3022 significant 7 bits of the opcode.
3025 BFD_RELOC_TIC54X_PARTMS9
3027 This is a 9bit DP reloc for the tms320c54x, where the most
3028 significant 9 bits of a 16 bit word are placed into the least
3029 significant 9 bits of the opcode.
3034 This is an extended address 23-bit reloc for the tms320c54x.
3037 BFD_RELOC_TIC54X_16_OF_23
3039 This is a 16-bit reloc for the tms320c54x, where the least
3040 significant 16 bits of a 23-bit extended address are placed into
3044 BFD_RELOC_TIC54X_MS7_OF_23
3046 This is a reloc for the tms320c54x, where the most
3047 significant 7 bits of a 23-bit extended address are placed into
3053 This is a 48 bit reloc for the FR30 that stores 32 bits.
3057 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3060 BFD_RELOC_FR30_6_IN_4
3062 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3065 BFD_RELOC_FR30_8_IN_8
3067 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3070 BFD_RELOC_FR30_9_IN_8
3072 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3075 BFD_RELOC_FR30_10_IN_8
3077 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3080 BFD_RELOC_FR30_9_PCREL
3082 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3083 short offset into 8 bits.
3085 BFD_RELOC_FR30_12_PCREL
3087 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3088 short offset into 11 bits.
3091 BFD_RELOC_MCORE_PCREL_IMM8BY4
3093 BFD_RELOC_MCORE_PCREL_IMM11BY2
3095 BFD_RELOC_MCORE_PCREL_IMM4BY2
3097 BFD_RELOC_MCORE_PCREL_32
3099 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3103 Motorola Mcore relocations.
3108 BFD_RELOC_MMIX_GETA_1
3110 BFD_RELOC_MMIX_GETA_2
3112 BFD_RELOC_MMIX_GETA_3
3114 These are relocations for the GETA instruction.
3116 BFD_RELOC_MMIX_CBRANCH
3118 BFD_RELOC_MMIX_CBRANCH_J
3120 BFD_RELOC_MMIX_CBRANCH_1
3122 BFD_RELOC_MMIX_CBRANCH_2
3124 BFD_RELOC_MMIX_CBRANCH_3
3126 These are relocations for a conditional branch instruction.
3128 BFD_RELOC_MMIX_PUSHJ
3130 BFD_RELOC_MMIX_PUSHJ_1
3132 BFD_RELOC_MMIX_PUSHJ_2
3134 BFD_RELOC_MMIX_PUSHJ_3
3136 These are relocations for the PUSHJ instruction.
3140 BFD_RELOC_MMIX_JMP_1
3142 BFD_RELOC_MMIX_JMP_2
3144 BFD_RELOC_MMIX_JMP_3
3146 These are relocations for the JMP instruction.
3148 BFD_RELOC_MMIX_ADDR19
3150 This is a relocation for a relative address as in a GETA instruction or
3153 BFD_RELOC_MMIX_ADDR27
3155 This is a relocation for a relative address as in a JMP instruction.
3157 BFD_RELOC_MMIX_REG_OR_BYTE
3159 This is a relocation for an instruction field that may be a general
3160 register or a value 0..255.
3164 This is a relocation for an instruction field that may be a general
3167 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3169 This is a relocation for two instruction fields holding a register and
3170 an offset, the equivalent of the relocation.
3172 BFD_RELOC_MMIX_LOCAL
3174 This relocation is an assertion that the expression is not allocated as
3175 a global register. It does not modify contents.
3178 BFD_RELOC_AVR_7_PCREL
3180 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3181 short offset into 7 bits.
3183 BFD_RELOC_AVR_13_PCREL
3185 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3186 short offset into 12 bits.
3190 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3191 program memory address) into 16 bits.
3193 BFD_RELOC_AVR_LO8_LDI
3195 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3196 data memory address) into 8 bit immediate value of LDI insn.
3198 BFD_RELOC_AVR_HI8_LDI
3200 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3201 of data memory address) into 8 bit immediate value of LDI insn.
3203 BFD_RELOC_AVR_HH8_LDI
3205 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3206 of program memory address) into 8 bit immediate value of LDI insn.
3208 BFD_RELOC_AVR_LO8_LDI_NEG
3210 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3211 (usually data memory address) into 8 bit immediate value of SUBI insn.
3213 BFD_RELOC_AVR_HI8_LDI_NEG
3215 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3216 (high 8 bit of data memory address) into 8 bit immediate value of
3219 BFD_RELOC_AVR_HH8_LDI_NEG
3221 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3222 (most high 8 bit of program memory address) into 8 bit immediate value
3223 of LDI or SUBI insn.
3225 BFD_RELOC_AVR_LO8_LDI_PM
3227 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3228 command address) into 8 bit immediate value of LDI insn.
3230 BFD_RELOC_AVR_HI8_LDI_PM
3232 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3233 of command address) into 8 bit immediate value of LDI insn.
3235 BFD_RELOC_AVR_HH8_LDI_PM
3237 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3238 of command address) into 8 bit immediate value of LDI insn.
3240 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3242 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3243 (usually command address) into 8 bit immediate value of SUBI insn.
3245 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3247 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3248 (high 8 bit of 16 bit command address) into 8 bit immediate value
3251 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3253 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3254 (high 6 bit of 22 bit command address) into 8 bit immediate
3259 This is a 32 bit reloc for the AVR that stores 23 bit value
3273 32 bit PC relative PLT address.
3277 Copy symbol at runtime.
3279 BFD_RELOC_390_GLOB_DAT
3283 BFD_RELOC_390_JMP_SLOT
3287 BFD_RELOC_390_RELATIVE
3289 Adjust by program base.
3293 32 bit PC relative offset to GOT.
3299 BFD_RELOC_390_PC16DBL
3301 PC relative 16 bit shifted by 1.
3303 BFD_RELOC_390_PLT16DBL
3305 16 bit PC rel. PLT shifted by 1.
3307 BFD_RELOC_390_PC32DBL
3309 PC relative 32 bit shifted by 1.
3311 BFD_RELOC_390_PLT32DBL
3313 32 bit PC rel. PLT shifted by 1.
3315 BFD_RELOC_390_GOTPCDBL
3317 32 bit PC rel. GOT shifted by 1.
3325 64 bit PC relative PLT address.
3327 BFD_RELOC_390_GOTENT
3329 32 bit rel. offset to GOT entry.
3331 BFD_RELOC_390_GOTOFF64
3333 64 bit offset to GOT.
3335 BFD_RELOC_390_GOTPLT12
3337 12-bit offset to symbol-entry within GOT, with PLT handling.
3339 BFD_RELOC_390_GOTPLT16
3341 16-bit offset to symbol-entry within GOT, with PLT handling.
3343 BFD_RELOC_390_GOTPLT32
3345 32-bit offset to symbol-entry within GOT, with PLT handling.
3347 BFD_RELOC_390_GOTPLT64
3349 64-bit offset to symbol-entry within GOT, with PLT handling.
3351 BFD_RELOC_390_GOTPLTENT
3353 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
3355 BFD_RELOC_390_PLTOFF16
3357 16-bit rel. offset from the GOT to a PLT entry.
3359 BFD_RELOC_390_PLTOFF32
3361 32-bit rel. offset from the GOT to a PLT entry.
3363 BFD_RELOC_390_PLTOFF64
3365 64-bit rel. offset from the GOT to a PLT entry.
3368 BFD_RELOC_390_TLS_LOAD
3370 BFD_RELOC_390_TLS_GDCALL
3372 BFD_RELOC_390_TLS_LDCALL
3374 BFD_RELOC_390_TLS_GD32
3376 BFD_RELOC_390_TLS_GD64
3378 BFD_RELOC_390_TLS_GOTIE12
3380 BFD_RELOC_390_TLS_GOTIE32
3382 BFD_RELOC_390_TLS_GOTIE64
3384 BFD_RELOC_390_TLS_LDM32
3386 BFD_RELOC_390_TLS_LDM64
3388 BFD_RELOC_390_TLS_IE32
3390 BFD_RELOC_390_TLS_IE64
3392 BFD_RELOC_390_TLS_IEENT
3394 BFD_RELOC_390_TLS_LE32
3396 BFD_RELOC_390_TLS_LE64
3398 BFD_RELOC_390_TLS_LDO32
3400 BFD_RELOC_390_TLS_LDO64
3402 BFD_RELOC_390_TLS_DTPMOD
3404 BFD_RELOC_390_TLS_DTPOFF
3406 BFD_RELOC_390_TLS_TPOFF
3408 s390 tls relocations.
3415 BFD_RELOC_390_GOTPLT20
3417 BFD_RELOC_390_TLS_GOTIE20
3419 Long displacement extension.
3424 Scenix IP2K - 9-bit register number / data address
3428 Scenix IP2K - 4-bit register/data bank number
3430 BFD_RELOC_IP2K_ADDR16CJP
3432 Scenix IP2K - low 13 bits of instruction word address
3434 BFD_RELOC_IP2K_PAGE3
3436 Scenix IP2K - high 3 bits of instruction word address
3438 BFD_RELOC_IP2K_LO8DATA
3440 BFD_RELOC_IP2K_HI8DATA
3442 BFD_RELOC_IP2K_EX8DATA
3444 Scenix IP2K - ext/low/high 8 bits of data address
3446 BFD_RELOC_IP2K_LO8INSN
3448 BFD_RELOC_IP2K_HI8INSN
3450 Scenix IP2K - low/high 8 bits of instruction word address
3452 BFD_RELOC_IP2K_PC_SKIP
3454 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
3458 Scenix IP2K - 16 bit word address in text section.
3460 BFD_RELOC_IP2K_FR_OFFSET
3462 Scenix IP2K - 7-bit sp or dp offset
3464 BFD_RELOC_VPE4KMATH_DATA
3466 BFD_RELOC_VPE4KMATH_INSN
3468 Scenix VPE4K coprocessor - data/insn-space addressing
3471 BFD_RELOC_VTABLE_INHERIT
3473 BFD_RELOC_VTABLE_ENTRY
3475 These two relocations are used by the linker to determine which of
3476 the entries in a C++ virtual function table are actually used. When
3477 the --gc-sections option is given, the linker will zero out the entries
3478 that are not used, so that the code for those functions need not be
3479 included in the output.
3481 VTABLE_INHERIT is a zero-space relocation used to describe to the
3482 linker the inheritence tree of a C++ virtual function table. The
3483 relocation's symbol should be the parent class' vtable, and the
3484 relocation should be located at the child vtable.
3486 VTABLE_ENTRY is a zero-space relocation that describes the use of a
3487 virtual function table entry. The reloc's symbol should refer to the
3488 table of the class mentioned in the code. Off of that base, an offset
3489 describes the entry that is being used. For Rela hosts, this offset
3490 is stored in the reloc's addend. For Rel hosts, we are forced to put
3491 this offset in the reloc's section offset.
3494 BFD_RELOC_IA64_IMM14
3496 BFD_RELOC_IA64_IMM22
3498 BFD_RELOC_IA64_IMM64
3500 BFD_RELOC_IA64_DIR32MSB
3502 BFD_RELOC_IA64_DIR32LSB
3504 BFD_RELOC_IA64_DIR64MSB
3506 BFD_RELOC_IA64_DIR64LSB
3508 BFD_RELOC_IA64_GPREL22
3510 BFD_RELOC_IA64_GPREL64I
3512 BFD_RELOC_IA64_GPREL32MSB
3514 BFD_RELOC_IA64_GPREL32LSB
3516 BFD_RELOC_IA64_GPREL64MSB
3518 BFD_RELOC_IA64_GPREL64LSB
3520 BFD_RELOC_IA64_LTOFF22
3522 BFD_RELOC_IA64_LTOFF64I
3524 BFD_RELOC_IA64_PLTOFF22
3526 BFD_RELOC_IA64_PLTOFF64I
3528 BFD_RELOC_IA64_PLTOFF64MSB
3530 BFD_RELOC_IA64_PLTOFF64LSB
3532 BFD_RELOC_IA64_FPTR64I
3534 BFD_RELOC_IA64_FPTR32MSB
3536 BFD_RELOC_IA64_FPTR32LSB
3538 BFD_RELOC_IA64_FPTR64MSB
3540 BFD_RELOC_IA64_FPTR64LSB
3542 BFD_RELOC_IA64_PCREL21B
3544 BFD_RELOC_IA64_PCREL21BI
3546 BFD_RELOC_IA64_PCREL21M
3548 BFD_RELOC_IA64_PCREL21F
3550 BFD_RELOC_IA64_PCREL22
3552 BFD_RELOC_IA64_PCREL60B
3554 BFD_RELOC_IA64_PCREL64I
3556 BFD_RELOC_IA64_PCREL32MSB
3558 BFD_RELOC_IA64_PCREL32LSB
3560 BFD_RELOC_IA64_PCREL64MSB
3562 BFD_RELOC_IA64_PCREL64LSB
3564 BFD_RELOC_IA64_LTOFF_FPTR22
3566 BFD_RELOC_IA64_LTOFF_FPTR64I
3568 BFD_RELOC_IA64_LTOFF_FPTR32MSB
3570 BFD_RELOC_IA64_LTOFF_FPTR32LSB
3572 BFD_RELOC_IA64_LTOFF_FPTR64MSB
3574 BFD_RELOC_IA64_LTOFF_FPTR64LSB
3576 BFD_RELOC_IA64_SEGREL32MSB
3578 BFD_RELOC_IA64_SEGREL32LSB
3580 BFD_RELOC_IA64_SEGREL64MSB
3582 BFD_RELOC_IA64_SEGREL64LSB
3584 BFD_RELOC_IA64_SECREL32MSB
3586 BFD_RELOC_IA64_SECREL32LSB
3588 BFD_RELOC_IA64_SECREL64MSB
3590 BFD_RELOC_IA64_SECREL64LSB
3592 BFD_RELOC_IA64_REL32MSB
3594 BFD_RELOC_IA64_REL32LSB
3596 BFD_RELOC_IA64_REL64MSB
3598 BFD_RELOC_IA64_REL64LSB
3600 BFD_RELOC_IA64_LTV32MSB
3602 BFD_RELOC_IA64_LTV32LSB
3604 BFD_RELOC_IA64_LTV64MSB
3606 BFD_RELOC_IA64_LTV64LSB
3608 BFD_RELOC_IA64_IPLTMSB
3610 BFD_RELOC_IA64_IPLTLSB
3614 BFD_RELOC_IA64_LTOFF22X
3616 BFD_RELOC_IA64_LDXMOV
3618 BFD_RELOC_IA64_TPREL14
3620 BFD_RELOC_IA64_TPREL22
3622 BFD_RELOC_IA64_TPREL64I
3624 BFD_RELOC_IA64_TPREL64MSB
3626 BFD_RELOC_IA64_TPREL64LSB
3628 BFD_RELOC_IA64_LTOFF_TPREL22
3630 BFD_RELOC_IA64_DTPMOD64MSB
3632 BFD_RELOC_IA64_DTPMOD64LSB
3634 BFD_RELOC_IA64_LTOFF_DTPMOD22
3636 BFD_RELOC_IA64_DTPREL14
3638 BFD_RELOC_IA64_DTPREL22
3640 BFD_RELOC_IA64_DTPREL64I
3642 BFD_RELOC_IA64_DTPREL32MSB
3644 BFD_RELOC_IA64_DTPREL32LSB
3646 BFD_RELOC_IA64_DTPREL64MSB
3648 BFD_RELOC_IA64_DTPREL64LSB
3650 BFD_RELOC_IA64_LTOFF_DTPREL22
3652 Intel IA64 Relocations.
3655 BFD_RELOC_M68HC11_HI8
3657 Motorola 68HC11 reloc.
3658 This is the 8 bit high part of an absolute address.
3660 BFD_RELOC_M68HC11_LO8
3662 Motorola 68HC11 reloc.
3663 This is the 8 bit low part of an absolute address.
3665 BFD_RELOC_M68HC11_3B
3667 Motorola 68HC11 reloc.
3668 This is the 3 bit of a value.
3670 BFD_RELOC_M68HC11_RL_JUMP
3672 Motorola 68HC11 reloc.
3673 This reloc marks the beginning of a jump/call instruction.
3674 It is used for linker relaxation to correctly identify beginning
3675 of instruction and change some branchs to use PC-relative
3678 BFD_RELOC_M68HC11_RL_GROUP
3680 Motorola 68HC11 reloc.
3681 This reloc marks a group of several instructions that gcc generates
3682 and for which the linker relaxation pass can modify and/or remove
3685 BFD_RELOC_M68HC11_LO16
3687 Motorola 68HC11 reloc.
3688 This is the 16-bit lower part of an address. It is used for 'call'
3689 instruction to specify the symbol address without any special
3690 transformation (due to memory bank window).
3692 BFD_RELOC_M68HC11_PAGE
3694 Motorola 68HC11 reloc.
3695 This is a 8-bit reloc that specifies the page number of an address.
3696 It is used by 'call' instruction to specify the page number of
3699 BFD_RELOC_M68HC11_24
3701 Motorola 68HC11 reloc.
3702 This is a 24-bit reloc that represents the address with a 16-bit
3703 value and a 8-bit page number. The symbol address is transformed
3704 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
3707 BFD_RELOC_CRIS_BDISP8
3709 BFD_RELOC_CRIS_UNSIGNED_5
3711 BFD_RELOC_CRIS_SIGNED_6
3713 BFD_RELOC_CRIS_UNSIGNED_6
3715 BFD_RELOC_CRIS_UNSIGNED_4
3717 These relocs are only used within the CRIS assembler. They are not
3718 (at present) written to any object files.
3722 BFD_RELOC_CRIS_GLOB_DAT
3724 BFD_RELOC_CRIS_JUMP_SLOT
3726 BFD_RELOC_CRIS_RELATIVE
3728 Relocs used in ELF shared libraries for CRIS.
3730 BFD_RELOC_CRIS_32_GOT
3732 32-bit offset to symbol-entry within GOT.
3734 BFD_RELOC_CRIS_16_GOT
3736 16-bit offset to symbol-entry within GOT.
3738 BFD_RELOC_CRIS_32_GOTPLT
3740 32-bit offset to symbol-entry within GOT, with PLT handling.
3742 BFD_RELOC_CRIS_16_GOTPLT
3744 16-bit offset to symbol-entry within GOT, with PLT handling.
3746 BFD_RELOC_CRIS_32_GOTREL
3748 32-bit offset to symbol, relative to GOT.
3750 BFD_RELOC_CRIS_32_PLT_GOTREL
3752 32-bit offset to symbol with PLT entry, relative to GOT.
3754 BFD_RELOC_CRIS_32_PLT_PCREL
3756 32-bit offset to symbol with PLT entry, relative to this relocation.
3761 BFD_RELOC_860_GLOB_DAT
3763 BFD_RELOC_860_JUMP_SLOT
3765 BFD_RELOC_860_RELATIVE
3775 BFD_RELOC_860_SPLIT0
3779 BFD_RELOC_860_SPLIT1
3783 BFD_RELOC_860_SPLIT2
3787 BFD_RELOC_860_LOGOT0
3789 BFD_RELOC_860_SPGOT0
3791 BFD_RELOC_860_LOGOT1
3793 BFD_RELOC_860_SPGOT1
3795 BFD_RELOC_860_LOGOTOFF0
3797 BFD_RELOC_860_SPGOTOFF0
3799 BFD_RELOC_860_LOGOTOFF1
3801 BFD_RELOC_860_SPGOTOFF1
3803 BFD_RELOC_860_LOGOTOFF2
3805 BFD_RELOC_860_LOGOTOFF3
3809 BFD_RELOC_860_HIGHADJ
3813 BFD_RELOC_860_HAGOTOFF
3821 BFD_RELOC_860_HIGOTOFF
3823 Intel i860 Relocations.
3826 BFD_RELOC_OPENRISC_ABS_26
3828 BFD_RELOC_OPENRISC_REL_26
3830 OpenRISC Relocations.
3833 BFD_RELOC_H8_DIR16A8
3835 BFD_RELOC_H8_DIR16R8
3837 BFD_RELOC_H8_DIR24A8
3839 BFD_RELOC_H8_DIR24R8
3841 BFD_RELOC_H8_DIR32A16
3846 BFD_RELOC_XSTORMY16_REL_12
3848 BFD_RELOC_XSTORMY16_12
3850 BFD_RELOC_XSTORMY16_24
3852 BFD_RELOC_XSTORMY16_FPTR16
3854 Sony Xstormy16 Relocations.
3857 BFD_RELOC_VAX_GLOB_DAT
3859 BFD_RELOC_VAX_JMP_SLOT
3861 BFD_RELOC_VAX_RELATIVE
3863 Relocations used by VAX ELF.
3866 BFD_RELOC_MSP430_10_PCREL
3868 BFD_RELOC_MSP430_16_PCREL
3872 BFD_RELOC_MSP430_16_PCREL_BYTE
3874 BFD_RELOC_MSP430_16_BYTE
3876 msp430 specific relocation codes
3879 BFD_RELOC_IQ2000_OFFSET_16
3881 BFD_RELOC_IQ2000_OFFSET_21
3883 BFD_RELOC_IQ2000_UHI16
3888 BFD_RELOC_XTENSA_RTLD
3890 Special Xtensa relocation used only by PLT entries in ELF shared
3891 objects to indicate that the runtime linker should set the value
3892 to one of its own internal functions or data structures.
3894 BFD_RELOC_XTENSA_GLOB_DAT
3896 BFD_RELOC_XTENSA_JMP_SLOT
3898 BFD_RELOC_XTENSA_RELATIVE
3900 Xtensa relocations for ELF shared objects.
3902 BFD_RELOC_XTENSA_PLT
3904 Xtensa relocation used in ELF object files for symbols that may require
3905 PLT entries. Otherwise, this is just a generic 32-bit relocation.
3907 BFD_RELOC_XTENSA_OP0
3909 BFD_RELOC_XTENSA_OP1
3911 BFD_RELOC_XTENSA_OP2
3913 Generic Xtensa relocations. Only the operand number is encoded
3914 in the relocation. The details are determined by extracting the
3917 BFD_RELOC_XTENSA_ASM_EXPAND
3919 Xtensa relocation to mark that the assembler expanded the
3920 instructions from an original target. The expansion size is
3921 encoded in the reloc size.
3923 BFD_RELOC_XTENSA_ASM_SIMPLIFY
3925 Xtensa relocation to mark that the linker should simplify
3926 assembler-expanded instructions. This is commonly used
3927 internally by the linker after analysis of a
3928 BFD_RELOC_XTENSA_ASM_EXPAND.
3934 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
3939 bfd_reloc_type_lookup
3942 reloc_howto_type *bfd_reloc_type_lookup
3943 (bfd *abfd, bfd_reloc_code_real_type code);
3946 Return a pointer to a howto structure which, when
3947 invoked, will perform the relocation @var{code} on data from the
3953 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
3955 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
3958 static reloc_howto_type bfd_howto_32
=
3959 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_bitfield
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
3963 bfd_default_reloc_type_lookup
3966 reloc_howto_type *bfd_default_reloc_type_lookup
3967 (bfd *abfd, bfd_reloc_code_real_type code);
3970 Provides a default relocation lookup routine for any architecture.
3975 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
3979 case BFD_RELOC_CTOR
:
3980 /* The type of reloc used in a ctor, which will be as wide as the
3981 address - so either a 64, 32, or 16 bitter. */
3982 switch (bfd_get_arch_info (abfd
)->bits_per_address
)
3987 return &bfd_howto_32
;
4001 bfd_get_reloc_code_name
4004 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
4007 Provides a printable name for the supplied relocation code.
4008 Useful mainly for printing error messages.
4012 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
4014 if (code
> BFD_RELOC_UNUSED
)
4016 return bfd_reloc_code_real_names
[code
];
4021 bfd_generic_relax_section
4024 bfd_boolean bfd_generic_relax_section
4027 struct bfd_link_info *,
4031 Provides default handling for relaxing for back ends which
4032 don't do relaxing -- i.e., does nothing.
4036 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
4037 asection
*section ATTRIBUTE_UNUSED
,
4038 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
4047 bfd_generic_gc_sections
4050 bfd_boolean bfd_generic_gc_sections
4051 (bfd *, struct bfd_link_info *);
4054 Provides default handling for relaxing for back ends which
4055 don't do section gc -- i.e., does nothing.
4059 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
4060 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
4067 bfd_generic_merge_sections
4070 bfd_boolean bfd_generic_merge_sections
4071 (bfd *, struct bfd_link_info *);
4074 Provides default handling for SEC_MERGE section merging for back ends
4075 which don't have SEC_MERGE support -- i.e., does nothing.
4079 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
4080 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
4087 bfd_generic_get_relocated_section_contents
4090 bfd_byte *bfd_generic_get_relocated_section_contents
4092 struct bfd_link_info *link_info,
4093 struct bfd_link_order *link_order,
4095 bfd_boolean relocatable,
4099 Provides default handling of relocation effort for back ends
4100 which can't be bothered to do it efficiently.
4105 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
4106 struct bfd_link_info
*link_info
,
4107 struct bfd_link_order
*link_order
,
4109 bfd_boolean relocatable
,
4112 /* Get enough memory to hold the stuff. */
4113 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
4114 asection
*input_section
= link_order
->u
.indirect
.section
;
4116 long reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
4117 arelent
**reloc_vector
= NULL
;
4123 reloc_vector
= bfd_malloc (reloc_size
);
4124 if (reloc_vector
== NULL
&& reloc_size
!= 0)
4127 /* Read in the section. */
4128 if (!bfd_get_section_contents (input_bfd
,
4132 input_section
->_raw_size
))
4135 /* We're not relaxing the section, so just copy the size info. */
4136 input_section
->_cooked_size
= input_section
->_raw_size
;
4137 input_section
->reloc_done
= TRUE
;
4139 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
4143 if (reloc_count
< 0)
4146 if (reloc_count
> 0)
4149 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
4151 char *error_message
= NULL
;
4152 bfd_reloc_status_type r
=
4153 bfd_perform_relocation (input_bfd
,
4157 relocatable
? abfd
: NULL
,
4162 asection
*os
= input_section
->output_section
;
4164 /* A partial link, so keep the relocs. */
4165 os
->orelocation
[os
->reloc_count
] = *parent
;
4169 if (r
!= bfd_reloc_ok
)
4173 case bfd_reloc_undefined
:
4174 if (!((*link_info
->callbacks
->undefined_symbol
)
4175 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
4176 input_bfd
, input_section
, (*parent
)->address
,
4180 case bfd_reloc_dangerous
:
4181 BFD_ASSERT (error_message
!= NULL
);
4182 if (!((*link_info
->callbacks
->reloc_dangerous
)
4183 (link_info
, error_message
, input_bfd
, input_section
,
4184 (*parent
)->address
)))
4187 case bfd_reloc_overflow
:
4188 if (!((*link_info
->callbacks
->reloc_overflow
)
4189 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
4190 (*parent
)->howto
->name
, (*parent
)->addend
,
4191 input_bfd
, input_section
, (*parent
)->address
)))
4194 case bfd_reloc_outofrange
:
4203 if (reloc_vector
!= NULL
)
4204 free (reloc_vector
);
4208 if (reloc_vector
!= NULL
)
4209 free (reloc_vector
);