1 /* BFD support for handling relocation entries.
2 Copyright (C) 1990-2014 Free Software Foundation, Inc.
3 Written by Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 BFD maintains relocations in much the same way it maintains
27 symbols: they are left alone until required, then read in
28 en-masse and translated into an internal form. A common
29 routine <<bfd_perform_relocation>> acts upon the
30 canonical form to do the fixup.
32 Relocations are maintained on a per section basis,
33 while symbols are maintained on a per BFD basis.
35 All that a back end has to do to fit the BFD interface is to create
36 a <<struct reloc_cache_entry>> for each relocation
37 in a particular section, and fill in the right bits of the structures.
46 /* DO compile in the reloc_code name table from libbfd.h. */
47 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
56 typedef arelent, howto manager, Relocations, Relocations
61 This is the structure of a relocation entry:
65 .typedef enum bfd_reloc_status
67 . {* No errors detected. *}
70 . {* The relocation was performed, but there was an overflow. *}
73 . {* The address to relocate was not within the section supplied. *}
74 . bfd_reloc_outofrange,
76 . {* Used by special functions. *}
79 . {* Unsupported relocation size requested. *}
80 . bfd_reloc_notsupported,
85 . {* The symbol to relocate against was undefined. *}
86 . bfd_reloc_undefined,
88 . {* The relocation was performed, but may not be ok - presently
89 . generated only when linking i960 coff files with i960 b.out
90 . symbols. If this type is returned, the error_message argument
91 . to bfd_perform_relocation will be set. *}
94 . bfd_reloc_status_type;
97 .typedef struct reloc_cache_entry
99 . {* A pointer into the canonical table of pointers. *}
100 . struct bfd_symbol **sym_ptr_ptr;
102 . {* offset in section. *}
103 . bfd_size_type address;
105 . {* addend for relocation value. *}
108 . {* Pointer to how to perform the required relocation. *}
109 . reloc_howto_type *howto;
119 Here is a description of each of the fields within an <<arelent>>:
123 The symbol table pointer points to a pointer to the symbol
124 associated with the relocation request. It is the pointer
125 into the table returned by the back end's
126 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
127 referenced through a pointer to a pointer so that tools like
128 the linker can fix up all the symbols of the same name by
129 modifying only one pointer. The relocation routine looks in
130 the symbol and uses the base of the section the symbol is
131 attached to and the value of the symbol as the initial
132 relocation offset. If the symbol pointer is zero, then the
133 section provided is looked up.
137 The <<address>> field gives the offset in bytes from the base of
138 the section data which owns the relocation record to the first
139 byte of relocatable information. The actual data relocated
140 will be relative to this point; for example, a relocation
141 type which modifies the bottom two bytes of a four byte word
142 would not touch the first byte pointed to in a big endian
147 The <<addend>> is a value provided by the back end to be added (!)
148 to the relocation offset. Its interpretation is dependent upon
149 the howto. For example, on the 68k the code:
154 | return foo[0x12345678];
157 Could be compiled into:
160 | moveb @@#12345678,d0
165 This could create a reloc pointing to <<foo>>, but leave the
166 offset in the data, something like:
168 |RELOCATION RECORDS FOR [.text]:
172 |00000000 4e56 fffc ; linkw fp,#-4
173 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
174 |0000000a 49c0 ; extbl d0
175 |0000000c 4e5e ; unlk fp
178 Using coff and an 88k, some instructions don't have enough
179 space in them to represent the full address range, and
180 pointers have to be loaded in two parts. So you'd get something like:
182 | or.u r13,r0,hi16(_foo+0x12345678)
183 | ld.b r2,r13,lo16(_foo+0x12345678)
186 This should create two relocs, both pointing to <<_foo>>, and with
187 0x12340000 in their addend field. The data would consist of:
189 |RELOCATION RECORDS FOR [.text]:
191 |00000002 HVRT16 _foo+0x12340000
192 |00000006 LVRT16 _foo+0x12340000
194 |00000000 5da05678 ; or.u r13,r0,0x5678
195 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
196 |00000008 f400c001 ; jmp r1
198 The relocation routine digs out the value from the data, adds
199 it to the addend to get the original offset, and then adds the
200 value of <<_foo>>. Note that all 32 bits have to be kept around
201 somewhere, to cope with carry from bit 15 to bit 16.
203 One further example is the sparc and the a.out format. The
204 sparc has a similar problem to the 88k, in that some
205 instructions don't have room for an entire offset, but on the
206 sparc the parts are created in odd sized lumps. The designers of
207 the a.out format chose to not use the data within the section
208 for storing part of the offset; all the offset is kept within
209 the reloc. Anything in the data should be ignored.
212 | sethi %hi(_foo+0x12345678),%g2
213 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
217 Both relocs contain a pointer to <<foo>>, and the offsets
220 |RELOCATION RECORDS FOR [.text]:
222 |00000004 HI22 _foo+0x12345678
223 |00000008 LO10 _foo+0x12345678
225 |00000000 9de3bf90 ; save %sp,-112,%sp
226 |00000004 05000000 ; sethi %hi(_foo+0),%g2
227 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
228 |0000000c 81c7e008 ; ret
229 |00000010 81e80000 ; restore
233 The <<howto>> field can be imagined as a
234 relocation instruction. It is a pointer to a structure which
235 contains information on what to do with all of the other
236 information in the reloc record and data section. A back end
237 would normally have a relocation instruction set and turn
238 relocations into pointers to the correct structure on input -
239 but it would be possible to create each howto field on demand.
245 <<enum complain_overflow>>
247 Indicates what sort of overflow checking should be done when
248 performing a relocation.
252 .enum complain_overflow
254 . {* Do not complain on overflow. *}
255 . complain_overflow_dont,
257 . {* Complain if the value overflows when considered as a signed
258 . number one bit larger than the field. ie. A bitfield of N bits
259 . is allowed to represent -2**n to 2**n-1. *}
260 . complain_overflow_bitfield,
262 . {* Complain if the value overflows when considered as a signed
264 . complain_overflow_signed,
266 . {* Complain if the value overflows when considered as an
267 . unsigned number. *}
268 . complain_overflow_unsigned
277 The <<reloc_howto_type>> is a structure which contains all the
278 information that libbfd needs to know to tie up a back end's data.
281 .struct bfd_symbol; {* Forward declaration. *}
283 .struct reloc_howto_struct
285 . {* The type field has mainly a documentary use - the back end can
286 . do what it wants with it, though normally the back end's
287 . external idea of what a reloc number is stored
288 . in this field. For example, a PC relative word relocation
289 . in a coff environment has the type 023 - because that's
290 . what the outside world calls a R_PCRWORD reloc. *}
293 . {* The value the final relocation is shifted right by. This drops
294 . unwanted data from the relocation. *}
295 . unsigned int rightshift;
297 . {* The size of the item to be relocated. This is *not* a
298 . power-of-two measure. To get the number of bytes operated
299 . on by a type of relocation, use bfd_get_reloc_size. *}
302 . {* The number of bits in the item to be relocated. This is used
303 . when doing overflow checking. *}
304 . unsigned int bitsize;
306 . {* The relocation is relative to the field being relocated. *}
307 . bfd_boolean pc_relative;
309 . {* The bit position of the reloc value in the destination.
310 . The relocated value is left shifted by this amount. *}
311 . unsigned int bitpos;
313 . {* What type of overflow error should be checked for when
315 . enum complain_overflow complain_on_overflow;
317 . {* If this field is non null, then the supplied function is
318 . called rather than the normal function. This allows really
319 . strange relocation methods to be accommodated (e.g., i960 callj
321 . bfd_reloc_status_type (*special_function)
322 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
325 . {* The textual name of the relocation type. *}
328 . {* Some formats record a relocation addend in the section contents
329 . rather than with the relocation. For ELF formats this is the
330 . distinction between USE_REL and USE_RELA (though the code checks
331 . for USE_REL == 1/0). The value of this field is TRUE if the
332 . addend is recorded with the section contents; when performing a
333 . partial link (ld -r) the section contents (the data) will be
334 . modified. The value of this field is FALSE if addends are
335 . recorded with the relocation (in arelent.addend); when performing
336 . a partial link the relocation will be modified.
337 . All relocations for all ELF USE_RELA targets should set this field
338 . to FALSE (values of TRUE should be looked on with suspicion).
339 . However, the converse is not true: not all relocations of all ELF
340 . USE_REL targets set this field to TRUE. Why this is so is peculiar
341 . to each particular target. For relocs that aren't used in partial
342 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
343 . bfd_boolean partial_inplace;
345 . {* src_mask selects the part of the instruction (or data) to be used
346 . in the relocation sum. If the target relocations don't have an
347 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
348 . dst_mask to extract the addend from the section contents. If
349 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
350 . field should be zero. Non-zero values for ELF USE_RELA targets are
351 . bogus as in those cases the value in the dst_mask part of the
352 . section contents should be treated as garbage. *}
355 . {* dst_mask selects which parts of the instruction (or data) are
356 . replaced with a relocated value. *}
359 . {* When some formats create PC relative instructions, they leave
360 . the value of the pc of the place being relocated in the offset
361 . slot of the instruction, so that a PC relative relocation can
362 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
363 . Some formats leave the displacement part of an instruction
364 . empty (e.g., m88k bcs); this flag signals the fact. *}
365 . bfd_boolean pcrel_offset;
375 The HOWTO define is horrible and will go away.
377 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
378 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
381 And will be replaced with the totally magic way. But for the
382 moment, we are compatible, so do it this way.
384 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
385 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
386 . NAME, FALSE, 0, 0, IN)
390 This is used to fill in an empty howto entry in an array.
392 .#define EMPTY_HOWTO(C) \
393 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
394 . NULL, FALSE, 0, 0, FALSE)
398 Helper routine to turn a symbol into a relocation value.
400 .#define HOWTO_PREPARE(relocation, symbol) \
402 . if (symbol != NULL) \
404 . if (bfd_is_com_section (symbol->section)) \
410 . relocation = symbol->value; \
422 unsigned int bfd_get_reloc_size (reloc_howto_type *);
425 For a reloc_howto_type that operates on a fixed number of bytes,
426 this returns the number of bytes operated on.
430 bfd_get_reloc_size (reloc_howto_type
*howto
)
451 How relocs are tied together in an <<asection>>:
453 .typedef struct relent_chain
456 . struct relent_chain *next;
462 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
463 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
470 bfd_reloc_status_type bfd_check_overflow
471 (enum complain_overflow how,
472 unsigned int bitsize,
473 unsigned int rightshift,
474 unsigned int addrsize,
478 Perform overflow checking on @var{relocation} which has
479 @var{bitsize} significant bits and will be shifted right by
480 @var{rightshift} bits, on a machine with addresses containing
481 @var{addrsize} significant bits. The result is either of
482 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
486 bfd_reloc_status_type
487 bfd_check_overflow (enum complain_overflow how
,
488 unsigned int bitsize
,
489 unsigned int rightshift
,
490 unsigned int addrsize
,
493 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
494 bfd_reloc_status_type flag
= bfd_reloc_ok
;
496 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
497 we'll be permissive: extra bits in the field mask will
498 automatically extend the address mask for purposes of the
500 fieldmask
= N_ONES (bitsize
);
501 signmask
= ~fieldmask
;
502 addrmask
= N_ONES (addrsize
) | (fieldmask
<< rightshift
);
503 a
= (relocation
& addrmask
) >> rightshift
;
507 case complain_overflow_dont
:
510 case complain_overflow_signed
:
511 /* If any sign bits are set, all sign bits must be set. That
512 is, A must be a valid negative address after shifting. */
513 signmask
= ~ (fieldmask
>> 1);
516 case complain_overflow_bitfield
:
517 /* Bitfields are sometimes signed, sometimes unsigned. We
518 explicitly allow an address wrap too, which means a bitfield
519 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
520 if the value has some, but not all, bits set outside the
523 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
524 flag
= bfd_reloc_overflow
;
527 case complain_overflow_unsigned
:
528 /* We have an overflow if the address does not fit in the field. */
529 if ((a
& signmask
) != 0)
530 flag
= bfd_reloc_overflow
;
542 bfd_perform_relocation
545 bfd_reloc_status_type bfd_perform_relocation
547 arelent *reloc_entry,
549 asection *input_section,
551 char **error_message);
554 If @var{output_bfd} is supplied to this function, the
555 generated image will be relocatable; the relocations are
556 copied to the output file after they have been changed to
557 reflect the new state of the world. There are two ways of
558 reflecting the results of partial linkage in an output file:
559 by modifying the output data in place, and by modifying the
560 relocation record. Some native formats (e.g., basic a.out and
561 basic coff) have no way of specifying an addend in the
562 relocation type, so the addend has to go in the output data.
563 This is no big deal since in these formats the output data
564 slot will always be big enough for the addend. Complex reloc
565 types with addends were invented to solve just this problem.
566 The @var{error_message} argument is set to an error message if
567 this return @code{bfd_reloc_dangerous}.
571 bfd_reloc_status_type
572 bfd_perform_relocation (bfd
*abfd
,
573 arelent
*reloc_entry
,
575 asection
*input_section
,
577 char **error_message
)
580 bfd_reloc_status_type flag
= bfd_reloc_ok
;
581 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
582 bfd_vma output_base
= 0;
583 reloc_howto_type
*howto
= reloc_entry
->howto
;
584 asection
*reloc_target_output_section
;
587 symbol
= *(reloc_entry
->sym_ptr_ptr
);
588 if (bfd_is_abs_section (symbol
->section
)
589 && output_bfd
!= NULL
)
591 reloc_entry
->address
+= input_section
->output_offset
;
595 /* If we are not producing relocatable output, return an error if
596 the symbol is not defined. An undefined weak symbol is
597 considered to have a value of zero (SVR4 ABI, p. 4-27). */
598 if (bfd_is_und_section (symbol
->section
)
599 && (symbol
->flags
& BSF_WEAK
) == 0
600 && output_bfd
== NULL
)
601 flag
= bfd_reloc_undefined
;
603 /* If there is a function supplied to handle this relocation type,
604 call it. It'll return `bfd_reloc_continue' if further processing
606 if (howto
->special_function
)
608 bfd_reloc_status_type cont
;
609 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
610 input_section
, output_bfd
,
612 if (cont
!= bfd_reloc_continue
)
616 /* Is the address of the relocation really within the section? */
617 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
618 return bfd_reloc_outofrange
;
620 /* Work out which section the relocation is targeted at and the
621 initial relocation command value. */
623 /* Get symbol value. (Common symbols are special.) */
624 if (bfd_is_com_section (symbol
->section
))
627 relocation
= symbol
->value
;
629 reloc_target_output_section
= symbol
->section
->output_section
;
631 /* Convert input-section-relative symbol value to absolute. */
632 if ((output_bfd
&& ! howto
->partial_inplace
)
633 || reloc_target_output_section
== NULL
)
636 output_base
= reloc_target_output_section
->vma
;
638 relocation
+= output_base
+ symbol
->section
->output_offset
;
640 /* Add in supplied addend. */
641 relocation
+= reloc_entry
->addend
;
643 /* Here the variable relocation holds the final address of the
644 symbol we are relocating against, plus any addend. */
646 if (howto
->pc_relative
)
648 /* This is a PC relative relocation. We want to set RELOCATION
649 to the distance between the address of the symbol and the
650 location. RELOCATION is already the address of the symbol.
652 We start by subtracting the address of the section containing
655 If pcrel_offset is set, we must further subtract the position
656 of the location within the section. Some targets arrange for
657 the addend to be the negative of the position of the location
658 within the section; for example, i386-aout does this. For
659 i386-aout, pcrel_offset is FALSE. Some other targets do not
660 include the position of the location; for example, m88kbcs,
661 or ELF. For those targets, pcrel_offset is TRUE.
663 If we are producing relocatable output, then we must ensure
664 that this reloc will be correctly computed when the final
665 relocation is done. If pcrel_offset is FALSE we want to wind
666 up with the negative of the location within the section,
667 which means we must adjust the existing addend by the change
668 in the location within the section. If pcrel_offset is TRUE
669 we do not want to adjust the existing addend at all.
671 FIXME: This seems logical to me, but for the case of
672 producing relocatable output it is not what the code
673 actually does. I don't want to change it, because it seems
674 far too likely that something will break. */
677 input_section
->output_section
->vma
+ input_section
->output_offset
;
679 if (howto
->pcrel_offset
)
680 relocation
-= reloc_entry
->address
;
683 if (output_bfd
!= NULL
)
685 if (! howto
->partial_inplace
)
687 /* This is a partial relocation, and we want to apply the relocation
688 to the reloc entry rather than the raw data. Modify the reloc
689 inplace to reflect what we now know. */
690 reloc_entry
->addend
= relocation
;
691 reloc_entry
->address
+= input_section
->output_offset
;
696 /* This is a partial relocation, but inplace, so modify the
699 If we've relocated with a symbol with a section, change
700 into a ref to the section belonging to the symbol. */
702 reloc_entry
->address
+= input_section
->output_offset
;
705 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
706 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
707 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
709 /* For m68k-coff, the addend was being subtracted twice during
710 relocation with -r. Removing the line below this comment
711 fixes that problem; see PR 2953.
713 However, Ian wrote the following, regarding removing the line below,
714 which explains why it is still enabled: --djm
716 If you put a patch like that into BFD you need to check all the COFF
717 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
718 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
719 problem in a different way. There may very well be a reason that the
720 code works as it does.
722 Hmmm. The first obvious point is that bfd_perform_relocation should
723 not have any tests that depend upon the flavour. It's seem like
724 entirely the wrong place for such a thing. The second obvious point
725 is that the current code ignores the reloc addend when producing
726 relocatable output for COFF. That's peculiar. In fact, I really
727 have no idea what the point of the line you want to remove is.
729 A typical COFF reloc subtracts the old value of the symbol and adds in
730 the new value to the location in the object file (if it's a pc
731 relative reloc it adds the difference between the symbol value and the
732 location). When relocating we need to preserve that property.
734 BFD handles this by setting the addend to the negative of the old
735 value of the symbol. Unfortunately it handles common symbols in a
736 non-standard way (it doesn't subtract the old value) but that's a
737 different story (we can't change it without losing backward
738 compatibility with old object files) (coff-i386 does subtract the old
739 value, to be compatible with existing coff-i386 targets, like SCO).
741 So everything works fine when not producing relocatable output. When
742 we are producing relocatable output, logically we should do exactly
743 what we do when not producing relocatable output. Therefore, your
744 patch is correct. In fact, it should probably always just set
745 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
746 add the value into the object file. This won't hurt the COFF code,
747 which doesn't use the addend; I'm not sure what it will do to other
748 formats (the thing to check for would be whether any formats both use
749 the addend and set partial_inplace).
751 When I wanted to make coff-i386 produce relocatable output, I ran
752 into the problem that you are running into: I wanted to remove that
753 line. Rather than risk it, I made the coff-i386 relocs use a special
754 function; it's coff_i386_reloc in coff-i386.c. The function
755 specifically adds the addend field into the object file, knowing that
756 bfd_perform_relocation is not going to. If you remove that line, then
757 coff-i386.c will wind up adding the addend field in twice. It's
758 trivial to fix; it just needs to be done.
760 The problem with removing the line is just that it may break some
761 working code. With BFD it's hard to be sure of anything. The right
762 way to deal with this is simply to build and test at least all the
763 supported COFF targets. It should be straightforward if time and disk
764 space consuming. For each target:
766 2) generate some executable, and link it using -r (I would
767 probably use paranoia.o and link against newlib/libc.a, which
768 for all the supported targets would be available in
769 /usr/cygnus/progressive/H-host/target/lib/libc.a).
770 3) make the change to reloc.c
771 4) rebuild the linker
773 6) if the resulting object files are the same, you have at least
775 7) if they are different you have to figure out which version is
778 relocation
-= reloc_entry
->addend
;
779 reloc_entry
->addend
= 0;
783 reloc_entry
->addend
= relocation
;
789 reloc_entry
->addend
= 0;
792 /* FIXME: This overflow checking is incomplete, because the value
793 might have overflowed before we get here. For a correct check we
794 need to compute the value in a size larger than bitsize, but we
795 can't reasonably do that for a reloc the same size as a host
797 FIXME: We should also do overflow checking on the result after
798 adding in the value contained in the object file. */
799 if (howto
->complain_on_overflow
!= complain_overflow_dont
800 && flag
== bfd_reloc_ok
)
801 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
804 bfd_arch_bits_per_address (abfd
),
807 /* Either we are relocating all the way, or we don't want to apply
808 the relocation to the reloc entry (probably because there isn't
809 any room in the output format to describe addends to relocs). */
811 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
812 (OSF version 1.3, compiler version 3.11). It miscompiles the
826 x <<= (unsigned long) s.i0;
830 printf ("succeeded (%lx)\n", x);
834 relocation
>>= (bfd_vma
) howto
->rightshift
;
836 /* Shift everything up to where it's going to be used. */
837 relocation
<<= (bfd_vma
) howto
->bitpos
;
839 /* Wait for the day when all have the mask in them. */
842 i instruction to be left alone
843 o offset within instruction
844 r relocation offset to apply
853 (( i i i i i o o o o o from bfd_get<size>
854 and S S S S S) to get the size offset we want
855 + r r r r r r r r r r) to get the final value to place
856 and D D D D D to chop to right size
857 -----------------------
860 ( i i i i i o o o o o from bfd_get<size>
861 and N N N N N ) get instruction
862 -----------------------
868 -----------------------
869 = R R R R R R R R R R put into bfd_put<size>
873 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
879 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
881 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
887 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
889 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
894 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
896 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
901 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
902 relocation
= -relocation
;
904 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
910 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
911 relocation
= -relocation
;
913 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
924 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
926 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
933 return bfd_reloc_other
;
941 bfd_install_relocation
944 bfd_reloc_status_type bfd_install_relocation
946 arelent *reloc_entry,
947 void *data, bfd_vma data_start,
948 asection *input_section,
949 char **error_message);
952 This looks remarkably like <<bfd_perform_relocation>>, except it
953 does not expect that the section contents have been filled in.
954 I.e., it's suitable for use when creating, rather than applying
957 For now, this function should be considered reserved for the
961 bfd_reloc_status_type
962 bfd_install_relocation (bfd
*abfd
,
963 arelent
*reloc_entry
,
965 bfd_vma data_start_offset
,
966 asection
*input_section
,
967 char **error_message
)
970 bfd_reloc_status_type flag
= bfd_reloc_ok
;
971 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
972 bfd_vma output_base
= 0;
973 reloc_howto_type
*howto
= reloc_entry
->howto
;
974 asection
*reloc_target_output_section
;
978 symbol
= *(reloc_entry
->sym_ptr_ptr
);
979 if (bfd_is_abs_section (symbol
->section
))
981 reloc_entry
->address
+= input_section
->output_offset
;
985 /* If there is a function supplied to handle this relocation type,
986 call it. It'll return `bfd_reloc_continue' if further processing
988 if (howto
->special_function
)
990 bfd_reloc_status_type cont
;
992 /* XXX - The special_function calls haven't been fixed up to deal
993 with creating new relocations and section contents. */
994 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
995 /* XXX - Non-portable! */
996 ((bfd_byte
*) data_start
997 - data_start_offset
),
998 input_section
, abfd
, error_message
);
999 if (cont
!= bfd_reloc_continue
)
1003 /* Is the address of the relocation really within the section? */
1004 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
1005 return bfd_reloc_outofrange
;
1007 /* Work out which section the relocation is targeted at and the
1008 initial relocation command value. */
1010 /* Get symbol value. (Common symbols are special.) */
1011 if (bfd_is_com_section (symbol
->section
))
1014 relocation
= symbol
->value
;
1016 reloc_target_output_section
= symbol
->section
->output_section
;
1018 /* Convert input-section-relative symbol value to absolute. */
1019 if (! howto
->partial_inplace
)
1022 output_base
= reloc_target_output_section
->vma
;
1024 relocation
+= output_base
+ symbol
->section
->output_offset
;
1026 /* Add in supplied addend. */
1027 relocation
+= reloc_entry
->addend
;
1029 /* Here the variable relocation holds the final address of the
1030 symbol we are relocating against, plus any addend. */
1032 if (howto
->pc_relative
)
1034 /* This is a PC relative relocation. We want to set RELOCATION
1035 to the distance between the address of the symbol and the
1036 location. RELOCATION is already the address of the symbol.
1038 We start by subtracting the address of the section containing
1041 If pcrel_offset is set, we must further subtract the position
1042 of the location within the section. Some targets arrange for
1043 the addend to be the negative of the position of the location
1044 within the section; for example, i386-aout does this. For
1045 i386-aout, pcrel_offset is FALSE. Some other targets do not
1046 include the position of the location; for example, m88kbcs,
1047 or ELF. For those targets, pcrel_offset is TRUE.
1049 If we are producing relocatable output, then we must ensure
1050 that this reloc will be correctly computed when the final
1051 relocation is done. If pcrel_offset is FALSE we want to wind
1052 up with the negative of the location within the section,
1053 which means we must adjust the existing addend by the change
1054 in the location within the section. If pcrel_offset is TRUE
1055 we do not want to adjust the existing addend at all.
1057 FIXME: This seems logical to me, but for the case of
1058 producing relocatable output it is not what the code
1059 actually does. I don't want to change it, because it seems
1060 far too likely that something will break. */
1063 input_section
->output_section
->vma
+ input_section
->output_offset
;
1065 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1066 relocation
-= reloc_entry
->address
;
1069 if (! howto
->partial_inplace
)
1071 /* This is a partial relocation, and we want to apply the relocation
1072 to the reloc entry rather than the raw data. Modify the reloc
1073 inplace to reflect what we now know. */
1074 reloc_entry
->addend
= relocation
;
1075 reloc_entry
->address
+= input_section
->output_offset
;
1080 /* This is a partial relocation, but inplace, so modify the
1083 If we've relocated with a symbol with a section, change
1084 into a ref to the section belonging to the symbol. */
1085 reloc_entry
->address
+= input_section
->output_offset
;
1088 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1089 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1090 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1093 /* For m68k-coff, the addend was being subtracted twice during
1094 relocation with -r. Removing the line below this comment
1095 fixes that problem; see PR 2953.
1097 However, Ian wrote the following, regarding removing the line below,
1098 which explains why it is still enabled: --djm
1100 If you put a patch like that into BFD you need to check all the COFF
1101 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1102 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1103 problem in a different way. There may very well be a reason that the
1104 code works as it does.
1106 Hmmm. The first obvious point is that bfd_install_relocation should
1107 not have any tests that depend upon the flavour. It's seem like
1108 entirely the wrong place for such a thing. The second obvious point
1109 is that the current code ignores the reloc addend when producing
1110 relocatable output for COFF. That's peculiar. In fact, I really
1111 have no idea what the point of the line you want to remove is.
1113 A typical COFF reloc subtracts the old value of the symbol and adds in
1114 the new value to the location in the object file (if it's a pc
1115 relative reloc it adds the difference between the symbol value and the
1116 location). When relocating we need to preserve that property.
1118 BFD handles this by setting the addend to the negative of the old
1119 value of the symbol. Unfortunately it handles common symbols in a
1120 non-standard way (it doesn't subtract the old value) but that's a
1121 different story (we can't change it without losing backward
1122 compatibility with old object files) (coff-i386 does subtract the old
1123 value, to be compatible with existing coff-i386 targets, like SCO).
1125 So everything works fine when not producing relocatable output. When
1126 we are producing relocatable output, logically we should do exactly
1127 what we do when not producing relocatable output. Therefore, your
1128 patch is correct. In fact, it should probably always just set
1129 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1130 add the value into the object file. This won't hurt the COFF code,
1131 which doesn't use the addend; I'm not sure what it will do to other
1132 formats (the thing to check for would be whether any formats both use
1133 the addend and set partial_inplace).
1135 When I wanted to make coff-i386 produce relocatable output, I ran
1136 into the problem that you are running into: I wanted to remove that
1137 line. Rather than risk it, I made the coff-i386 relocs use a special
1138 function; it's coff_i386_reloc in coff-i386.c. The function
1139 specifically adds the addend field into the object file, knowing that
1140 bfd_install_relocation is not going to. If you remove that line, then
1141 coff-i386.c will wind up adding the addend field in twice. It's
1142 trivial to fix; it just needs to be done.
1144 The problem with removing the line is just that it may break some
1145 working code. With BFD it's hard to be sure of anything. The right
1146 way to deal with this is simply to build and test at least all the
1147 supported COFF targets. It should be straightforward if time and disk
1148 space consuming. For each target:
1150 2) generate some executable, and link it using -r (I would
1151 probably use paranoia.o and link against newlib/libc.a, which
1152 for all the supported targets would be available in
1153 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1154 3) make the change to reloc.c
1155 4) rebuild the linker
1157 6) if the resulting object files are the same, you have at least
1159 7) if they are different you have to figure out which version is
1161 relocation
-= reloc_entry
->addend
;
1162 /* FIXME: There should be no target specific code here... */
1163 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1164 reloc_entry
->addend
= 0;
1168 reloc_entry
->addend
= relocation
;
1172 /* FIXME: This overflow checking is incomplete, because the value
1173 might have overflowed before we get here. For a correct check we
1174 need to compute the value in a size larger than bitsize, but we
1175 can't reasonably do that for a reloc the same size as a host
1177 FIXME: We should also do overflow checking on the result after
1178 adding in the value contained in the object file. */
1179 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1180 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1183 bfd_arch_bits_per_address (abfd
),
1186 /* Either we are relocating all the way, or we don't want to apply
1187 the relocation to the reloc entry (probably because there isn't
1188 any room in the output format to describe addends to relocs). */
1190 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1191 (OSF version 1.3, compiler version 3.11). It miscompiles the
1205 x <<= (unsigned long) s.i0;
1207 printf ("failed\n");
1209 printf ("succeeded (%lx)\n", x);
1213 relocation
>>= (bfd_vma
) howto
->rightshift
;
1215 /* Shift everything up to where it's going to be used. */
1216 relocation
<<= (bfd_vma
) howto
->bitpos
;
1218 /* Wait for the day when all have the mask in them. */
1221 i instruction to be left alone
1222 o offset within instruction
1223 r relocation offset to apply
1232 (( i i i i i o o o o o from bfd_get<size>
1233 and S S S S S) to get the size offset we want
1234 + r r r r r r r r r r) to get the final value to place
1235 and D D D D D to chop to right size
1236 -----------------------
1239 ( i i i i i o o o o o from bfd_get<size>
1240 and N N N N N ) get instruction
1241 -----------------------
1247 -----------------------
1248 = R R R R R R R R R R put into bfd_put<size>
1252 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1254 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1256 switch (howto
->size
)
1260 char x
= bfd_get_8 (abfd
, data
);
1262 bfd_put_8 (abfd
, x
, data
);
1268 short x
= bfd_get_16 (abfd
, data
);
1270 bfd_put_16 (abfd
, (bfd_vma
) x
, data
);
1275 long x
= bfd_get_32 (abfd
, data
);
1277 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1282 long x
= bfd_get_32 (abfd
, data
);
1283 relocation
= -relocation
;
1285 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1295 bfd_vma x
= bfd_get_64 (abfd
, data
);
1297 bfd_put_64 (abfd
, x
, data
);
1301 return bfd_reloc_other
;
1307 /* This relocation routine is used by some of the backend linkers.
1308 They do not construct asymbol or arelent structures, so there is no
1309 reason for them to use bfd_perform_relocation. Also,
1310 bfd_perform_relocation is so hacked up it is easier to write a new
1311 function than to try to deal with it.
1313 This routine does a final relocation. Whether it is useful for a
1314 relocatable link depends upon how the object format defines
1317 FIXME: This routine ignores any special_function in the HOWTO,
1318 since the existing special_function values have been written for
1319 bfd_perform_relocation.
1321 HOWTO is the reloc howto information.
1322 INPUT_BFD is the BFD which the reloc applies to.
1323 INPUT_SECTION is the section which the reloc applies to.
1324 CONTENTS is the contents of the section.
1325 ADDRESS is the address of the reloc within INPUT_SECTION.
1326 VALUE is the value of the symbol the reloc refers to.
1327 ADDEND is the addend of the reloc. */
1329 bfd_reloc_status_type
1330 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1332 asection
*input_section
,
1340 /* Sanity check the address. */
1341 if (address
> bfd_get_section_limit (input_bfd
, input_section
))
1342 return bfd_reloc_outofrange
;
1344 /* This function assumes that we are dealing with a basic relocation
1345 against a symbol. We want to compute the value of the symbol to
1346 relocate to. This is just VALUE, the value of the symbol, plus
1347 ADDEND, any addend associated with the reloc. */
1348 relocation
= value
+ addend
;
1350 /* If the relocation is PC relative, we want to set RELOCATION to
1351 the distance between the symbol (currently in RELOCATION) and the
1352 location we are relocating. Some targets (e.g., i386-aout)
1353 arrange for the contents of the section to be the negative of the
1354 offset of the location within the section; for such targets
1355 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1356 simply leave the contents of the section as zero; for such
1357 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1358 need to subtract out the offset of the location within the
1359 section (which is just ADDRESS). */
1360 if (howto
->pc_relative
)
1362 relocation
-= (input_section
->output_section
->vma
1363 + input_section
->output_offset
);
1364 if (howto
->pcrel_offset
)
1365 relocation
-= address
;
1368 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1369 contents
+ address
);
1372 /* Relocate a given location using a given value and howto. */
1374 bfd_reloc_status_type
1375 _bfd_relocate_contents (reloc_howto_type
*howto
,
1382 bfd_reloc_status_type flag
;
1383 unsigned int rightshift
= howto
->rightshift
;
1384 unsigned int bitpos
= howto
->bitpos
;
1386 /* If the size is negative, negate RELOCATION. This isn't very
1388 if (howto
->size
< 0)
1389 relocation
= -relocation
;
1391 /* Get the value we are going to relocate. */
1392 size
= bfd_get_reloc_size (howto
);
1399 x
= bfd_get_8 (input_bfd
, location
);
1402 x
= bfd_get_16 (input_bfd
, location
);
1405 x
= bfd_get_32 (input_bfd
, location
);
1409 x
= bfd_get_64 (input_bfd
, location
);
1416 /* Check for overflow. FIXME: We may drop bits during the addition
1417 which we don't check for. We must either check at every single
1418 operation, which would be tedious, or we must do the computations
1419 in a type larger than bfd_vma, which would be inefficient. */
1420 flag
= bfd_reloc_ok
;
1421 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1423 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1426 /* Get the values to be added together. For signed and unsigned
1427 relocations, we assume that all values should be truncated to
1428 the size of an address. For bitfields, all the bits matter.
1429 See also bfd_check_overflow. */
1430 fieldmask
= N_ONES (howto
->bitsize
);
1431 signmask
= ~fieldmask
;
1432 addrmask
= (N_ONES (bfd_arch_bits_per_address (input_bfd
))
1433 | (fieldmask
<< rightshift
));
1434 a
= (relocation
& addrmask
) >> rightshift
;
1435 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1436 addrmask
>>= rightshift
;
1438 switch (howto
->complain_on_overflow
)
1440 case complain_overflow_signed
:
1441 /* If any sign bits are set, all sign bits must be set.
1442 That is, A must be a valid negative address after
1444 signmask
= ~(fieldmask
>> 1);
1447 case complain_overflow_bitfield
:
1448 /* Much like the signed check, but for a field one bit
1449 wider. We allow a bitfield to represent numbers in the
1450 range -2**n to 2**n-1, where n is the number of bits in the
1451 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1452 can't overflow, which is exactly what we want. */
1454 if (ss
!= 0 && ss
!= (addrmask
& signmask
))
1455 flag
= bfd_reloc_overflow
;
1457 /* We only need this next bit of code if the sign bit of B
1458 is below the sign bit of A. This would only happen if
1459 SRC_MASK had fewer bits than BITSIZE. Note that if
1460 SRC_MASK has more bits than BITSIZE, we can get into
1461 trouble; we would need to verify that B is in range, as
1462 we do for A above. */
1463 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1466 /* Set all the bits above the sign bit. */
1469 /* Now we can do the addition. */
1472 /* See if the result has the correct sign. Bits above the
1473 sign bit are junk now; ignore them. If the sum is
1474 positive, make sure we did not have all negative inputs;
1475 if the sum is negative, make sure we did not have all
1476 positive inputs. The test below looks only at the sign
1477 bits, and it really just
1478 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1480 We mask with addrmask here to explicitly allow an address
1481 wrap-around. The Linux kernel relies on it, and it is
1482 the only way to write assembler code which can run when
1483 loaded at a location 0x80000000 away from the location at
1484 which it is linked. */
1485 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1486 flag
= bfd_reloc_overflow
;
1489 case complain_overflow_unsigned
:
1490 /* Checking for an unsigned overflow is relatively easy:
1491 trim the addresses and add, and trim the result as well.
1492 Overflow is normally indicated when the result does not
1493 fit in the field. However, we also need to consider the
1494 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1495 input is 0x80000000, and bfd_vma is only 32 bits; then we
1496 will get sum == 0, but there is an overflow, since the
1497 inputs did not fit in the field. Instead of doing a
1498 separate test, we can check for this by or-ing in the
1499 operands when testing for the sum overflowing its final
1501 sum
= (a
+ b
) & addrmask
;
1502 if ((a
| b
| sum
) & signmask
)
1503 flag
= bfd_reloc_overflow
;
1511 /* Put RELOCATION in the right bits. */
1512 relocation
>>= (bfd_vma
) rightshift
;
1513 relocation
<<= (bfd_vma
) bitpos
;
1515 /* Add RELOCATION to the right bits of X. */
1516 x
= ((x
& ~howto
->dst_mask
)
1517 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1519 /* Put the relocated value back in the object file. */
1525 bfd_put_8 (input_bfd
, x
, location
);
1528 bfd_put_16 (input_bfd
, x
, location
);
1531 bfd_put_32 (input_bfd
, x
, location
);
1535 bfd_put_64 (input_bfd
, x
, location
);
1545 /* Clear a given location using a given howto, by applying a fixed relocation
1546 value and discarding any in-place addend. This is used for fixed-up
1547 relocations against discarded symbols, to make ignorable debug or unwind
1548 information more obvious. */
1551 _bfd_clear_contents (reloc_howto_type
*howto
,
1553 asection
*input_section
,
1559 /* Get the value we are going to relocate. */
1560 size
= bfd_get_reloc_size (howto
);
1567 x
= bfd_get_8 (input_bfd
, location
);
1570 x
= bfd_get_16 (input_bfd
, location
);
1573 x
= bfd_get_32 (input_bfd
, location
);
1577 x
= bfd_get_64 (input_bfd
, location
);
1584 /* Zero out the unwanted bits of X. */
1585 x
&= ~howto
->dst_mask
;
1587 /* For a range list, use 1 instead of 0 as placeholder. 0
1588 would terminate the list, hiding any later entries. */
1589 if (strcmp (bfd_get_section_name (input_bfd
, input_section
),
1590 ".debug_ranges") == 0
1591 && (howto
->dst_mask
& 1) != 0)
1594 /* Put the relocated value back in the object file. */
1601 bfd_put_8 (input_bfd
, x
, location
);
1604 bfd_put_16 (input_bfd
, x
, location
);
1607 bfd_put_32 (input_bfd
, x
, location
);
1611 bfd_put_64 (input_bfd
, x
, location
);
1622 howto manager, , typedef arelent, Relocations
1627 When an application wants to create a relocation, but doesn't
1628 know what the target machine might call it, it can find out by
1629 using this bit of code.
1638 The insides of a reloc code. The idea is that, eventually, there
1639 will be one enumerator for every type of relocation we ever do.
1640 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1641 return a howto pointer.
1643 This does mean that the application must determine the correct
1644 enumerator value; you can't get a howto pointer from a random set
1665 Basic absolute relocations of N bits.
1680 PC-relative relocations. Sometimes these are relative to the address
1681 of the relocation itself; sometimes they are relative to the start of
1682 the section containing the relocation. It depends on the specific target.
1684 The 24-bit relocation is used in some Intel 960 configurations.
1689 Section relative relocations. Some targets need this for DWARF2.
1692 BFD_RELOC_32_GOT_PCREL
1694 BFD_RELOC_16_GOT_PCREL
1696 BFD_RELOC_8_GOT_PCREL
1702 BFD_RELOC_LO16_GOTOFF
1704 BFD_RELOC_HI16_GOTOFF
1706 BFD_RELOC_HI16_S_GOTOFF
1710 BFD_RELOC_64_PLT_PCREL
1712 BFD_RELOC_32_PLT_PCREL
1714 BFD_RELOC_24_PLT_PCREL
1716 BFD_RELOC_16_PLT_PCREL
1718 BFD_RELOC_8_PLT_PCREL
1726 BFD_RELOC_LO16_PLTOFF
1728 BFD_RELOC_HI16_PLTOFF
1730 BFD_RELOC_HI16_S_PLTOFF
1744 BFD_RELOC_68K_GLOB_DAT
1746 BFD_RELOC_68K_JMP_SLOT
1748 BFD_RELOC_68K_RELATIVE
1750 BFD_RELOC_68K_TLS_GD32
1752 BFD_RELOC_68K_TLS_GD16
1754 BFD_RELOC_68K_TLS_GD8
1756 BFD_RELOC_68K_TLS_LDM32
1758 BFD_RELOC_68K_TLS_LDM16
1760 BFD_RELOC_68K_TLS_LDM8
1762 BFD_RELOC_68K_TLS_LDO32
1764 BFD_RELOC_68K_TLS_LDO16
1766 BFD_RELOC_68K_TLS_LDO8
1768 BFD_RELOC_68K_TLS_IE32
1770 BFD_RELOC_68K_TLS_IE16
1772 BFD_RELOC_68K_TLS_IE8
1774 BFD_RELOC_68K_TLS_LE32
1776 BFD_RELOC_68K_TLS_LE16
1778 BFD_RELOC_68K_TLS_LE8
1780 Relocations used by 68K ELF.
1783 BFD_RELOC_32_BASEREL
1785 BFD_RELOC_16_BASEREL
1787 BFD_RELOC_LO16_BASEREL
1789 BFD_RELOC_HI16_BASEREL
1791 BFD_RELOC_HI16_S_BASEREL
1797 Linkage-table relative.
1802 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1805 BFD_RELOC_32_PCREL_S2
1807 BFD_RELOC_16_PCREL_S2
1809 BFD_RELOC_23_PCREL_S2
1811 These PC-relative relocations are stored as word displacements --
1812 i.e., byte displacements shifted right two bits. The 30-bit word
1813 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1814 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1815 signed 16-bit displacement is used on the MIPS, and the 23-bit
1816 displacement is used on the Alpha.
1823 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1824 the target word. These are used on the SPARC.
1831 For systems that allocate a Global Pointer register, these are
1832 displacements off that register. These relocation types are
1833 handled specially, because the value the register will have is
1834 decided relatively late.
1837 BFD_RELOC_I960_CALLJ
1839 Reloc types used for i960/b.out.
1844 BFD_RELOC_SPARC_WDISP22
1850 BFD_RELOC_SPARC_GOT10
1852 BFD_RELOC_SPARC_GOT13
1854 BFD_RELOC_SPARC_GOT22
1856 BFD_RELOC_SPARC_PC10
1858 BFD_RELOC_SPARC_PC22
1860 BFD_RELOC_SPARC_WPLT30
1862 BFD_RELOC_SPARC_COPY
1864 BFD_RELOC_SPARC_GLOB_DAT
1866 BFD_RELOC_SPARC_JMP_SLOT
1868 BFD_RELOC_SPARC_RELATIVE
1870 BFD_RELOC_SPARC_UA16
1872 BFD_RELOC_SPARC_UA32
1874 BFD_RELOC_SPARC_UA64
1876 BFD_RELOC_SPARC_GOTDATA_HIX22
1878 BFD_RELOC_SPARC_GOTDATA_LOX10
1880 BFD_RELOC_SPARC_GOTDATA_OP_HIX22
1882 BFD_RELOC_SPARC_GOTDATA_OP_LOX10
1884 BFD_RELOC_SPARC_GOTDATA_OP
1886 BFD_RELOC_SPARC_JMP_IREL
1888 BFD_RELOC_SPARC_IRELATIVE
1890 SPARC ELF relocations. There is probably some overlap with other
1891 relocation types already defined.
1894 BFD_RELOC_SPARC_BASE13
1896 BFD_RELOC_SPARC_BASE22
1898 I think these are specific to SPARC a.out (e.g., Sun 4).
1908 BFD_RELOC_SPARC_OLO10
1910 BFD_RELOC_SPARC_HH22
1912 BFD_RELOC_SPARC_HM10
1914 BFD_RELOC_SPARC_LM22
1916 BFD_RELOC_SPARC_PC_HH22
1918 BFD_RELOC_SPARC_PC_HM10
1920 BFD_RELOC_SPARC_PC_LM22
1922 BFD_RELOC_SPARC_WDISP16
1924 BFD_RELOC_SPARC_WDISP19
1932 BFD_RELOC_SPARC_DISP64
1935 BFD_RELOC_SPARC_PLT32
1937 BFD_RELOC_SPARC_PLT64
1939 BFD_RELOC_SPARC_HIX22
1941 BFD_RELOC_SPARC_LOX10
1949 BFD_RELOC_SPARC_REGISTER
1953 BFD_RELOC_SPARC_SIZE32
1955 BFD_RELOC_SPARC_SIZE64
1957 BFD_RELOC_SPARC_WDISP10
1962 BFD_RELOC_SPARC_REV32
1964 SPARC little endian relocation
1966 BFD_RELOC_SPARC_TLS_GD_HI22
1968 BFD_RELOC_SPARC_TLS_GD_LO10
1970 BFD_RELOC_SPARC_TLS_GD_ADD
1972 BFD_RELOC_SPARC_TLS_GD_CALL
1974 BFD_RELOC_SPARC_TLS_LDM_HI22
1976 BFD_RELOC_SPARC_TLS_LDM_LO10
1978 BFD_RELOC_SPARC_TLS_LDM_ADD
1980 BFD_RELOC_SPARC_TLS_LDM_CALL
1982 BFD_RELOC_SPARC_TLS_LDO_HIX22
1984 BFD_RELOC_SPARC_TLS_LDO_LOX10
1986 BFD_RELOC_SPARC_TLS_LDO_ADD
1988 BFD_RELOC_SPARC_TLS_IE_HI22
1990 BFD_RELOC_SPARC_TLS_IE_LO10
1992 BFD_RELOC_SPARC_TLS_IE_LD
1994 BFD_RELOC_SPARC_TLS_IE_LDX
1996 BFD_RELOC_SPARC_TLS_IE_ADD
1998 BFD_RELOC_SPARC_TLS_LE_HIX22
2000 BFD_RELOC_SPARC_TLS_LE_LOX10
2002 BFD_RELOC_SPARC_TLS_DTPMOD32
2004 BFD_RELOC_SPARC_TLS_DTPMOD64
2006 BFD_RELOC_SPARC_TLS_DTPOFF32
2008 BFD_RELOC_SPARC_TLS_DTPOFF64
2010 BFD_RELOC_SPARC_TLS_TPOFF32
2012 BFD_RELOC_SPARC_TLS_TPOFF64
2014 SPARC TLS relocations
2023 BFD_RELOC_SPU_IMM10W
2027 BFD_RELOC_SPU_IMM16W
2031 BFD_RELOC_SPU_PCREL9a
2033 BFD_RELOC_SPU_PCREL9b
2035 BFD_RELOC_SPU_PCREL16
2045 BFD_RELOC_SPU_ADD_PIC
2050 BFD_RELOC_ALPHA_GPDISP_HI16
2052 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
2053 "addend" in some special way.
2054 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
2055 writing; when reading, it will be the absolute section symbol. The
2056 addend is the displacement in bytes of the "lda" instruction from
2057 the "ldah" instruction (which is at the address of this reloc).
2059 BFD_RELOC_ALPHA_GPDISP_LO16
2061 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
2062 with GPDISP_HI16 relocs. The addend is ignored when writing the
2063 relocations out, and is filled in with the file's GP value on
2064 reading, for convenience.
2067 BFD_RELOC_ALPHA_GPDISP
2069 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
2070 relocation except that there is no accompanying GPDISP_LO16
2074 BFD_RELOC_ALPHA_LITERAL
2076 BFD_RELOC_ALPHA_ELF_LITERAL
2078 BFD_RELOC_ALPHA_LITUSE
2080 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
2081 the assembler turns it into a LDQ instruction to load the address of
2082 the symbol, and then fills in a register in the real instruction.
2084 The LITERAL reloc, at the LDQ instruction, refers to the .lita
2085 section symbol. The addend is ignored when writing, but is filled
2086 in with the file's GP value on reading, for convenience, as with the
2089 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
2090 It should refer to the symbol to be referenced, as with 16_GOTOFF,
2091 but it generates output not based on the position within the .got
2092 section, but relative to the GP value chosen for the file during the
2095 The LITUSE reloc, on the instruction using the loaded address, gives
2096 information to the linker that it might be able to use to optimize
2097 away some literal section references. The symbol is ignored (read
2098 as the absolute section symbol), and the "addend" indicates the type
2099 of instruction using the register:
2100 1 - "memory" fmt insn
2101 2 - byte-manipulation (byte offset reg)
2102 3 - jsr (target of branch)
2105 BFD_RELOC_ALPHA_HINT
2107 The HINT relocation indicates a value that should be filled into the
2108 "hint" field of a jmp/jsr/ret instruction, for possible branch-
2109 prediction logic which may be provided on some processors.
2112 BFD_RELOC_ALPHA_LINKAGE
2114 The LINKAGE relocation outputs a linkage pair in the object file,
2115 which is filled by the linker.
2118 BFD_RELOC_ALPHA_CODEADDR
2120 The CODEADDR relocation outputs a STO_CA in the object file,
2121 which is filled by the linker.
2124 BFD_RELOC_ALPHA_GPREL_HI16
2126 BFD_RELOC_ALPHA_GPREL_LO16
2128 The GPREL_HI/LO relocations together form a 32-bit offset from the
2132 BFD_RELOC_ALPHA_BRSGP
2134 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2135 share a common GP, and the target address is adjusted for
2136 STO_ALPHA_STD_GPLOAD.
2141 The NOP relocation outputs a NOP if the longword displacement
2142 between two procedure entry points is < 2^21.
2147 The BSR relocation outputs a BSR if the longword displacement
2148 between two procedure entry points is < 2^21.
2153 The LDA relocation outputs a LDA if the longword displacement
2154 between two procedure entry points is < 2^16.
2159 The BOH relocation outputs a BSR if the longword displacement
2160 between two procedure entry points is < 2^21, or else a hint.
2163 BFD_RELOC_ALPHA_TLSGD
2165 BFD_RELOC_ALPHA_TLSLDM
2167 BFD_RELOC_ALPHA_DTPMOD64
2169 BFD_RELOC_ALPHA_GOTDTPREL16
2171 BFD_RELOC_ALPHA_DTPREL64
2173 BFD_RELOC_ALPHA_DTPREL_HI16
2175 BFD_RELOC_ALPHA_DTPREL_LO16
2177 BFD_RELOC_ALPHA_DTPREL16
2179 BFD_RELOC_ALPHA_GOTTPREL16
2181 BFD_RELOC_ALPHA_TPREL64
2183 BFD_RELOC_ALPHA_TPREL_HI16
2185 BFD_RELOC_ALPHA_TPREL_LO16
2187 BFD_RELOC_ALPHA_TPREL16
2189 Alpha thread-local storage relocations.
2194 BFD_RELOC_MICROMIPS_JMP
2196 The MIPS jump instruction.
2199 BFD_RELOC_MIPS16_JMP
2201 The MIPS16 jump instruction.
2204 BFD_RELOC_MIPS16_GPREL
2206 MIPS16 GP relative reloc.
2211 High 16 bits of 32-bit value; simple reloc.
2216 High 16 bits of 32-bit value but the low 16 bits will be sign
2217 extended and added to form the final result. If the low 16
2218 bits form a negative number, we need to add one to the high value
2219 to compensate for the borrow when the low bits are added.
2227 BFD_RELOC_HI16_PCREL
2229 High 16 bits of 32-bit pc-relative value
2231 BFD_RELOC_HI16_S_PCREL
2233 High 16 bits of 32-bit pc-relative value, adjusted
2235 BFD_RELOC_LO16_PCREL
2237 Low 16 bits of pc-relative value
2240 BFD_RELOC_MIPS16_GOT16
2242 BFD_RELOC_MIPS16_CALL16
2244 Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
2245 16-bit immediate fields
2247 BFD_RELOC_MIPS16_HI16
2249 MIPS16 high 16 bits of 32-bit value.
2251 BFD_RELOC_MIPS16_HI16_S
2253 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2254 extended and added to form the final result. If the low 16
2255 bits form a negative number, we need to add one to the high value
2256 to compensate for the borrow when the low bits are added.
2258 BFD_RELOC_MIPS16_LO16
2263 BFD_RELOC_MIPS16_TLS_GD
2265 BFD_RELOC_MIPS16_TLS_LDM
2267 BFD_RELOC_MIPS16_TLS_DTPREL_HI16
2269 BFD_RELOC_MIPS16_TLS_DTPREL_LO16
2271 BFD_RELOC_MIPS16_TLS_GOTTPREL
2273 BFD_RELOC_MIPS16_TLS_TPREL_HI16
2275 BFD_RELOC_MIPS16_TLS_TPREL_LO16
2277 MIPS16 TLS relocations
2280 BFD_RELOC_MIPS_LITERAL
2282 BFD_RELOC_MICROMIPS_LITERAL
2284 Relocation against a MIPS literal section.
2287 BFD_RELOC_MICROMIPS_7_PCREL_S1
2289 BFD_RELOC_MICROMIPS_10_PCREL_S1
2291 BFD_RELOC_MICROMIPS_16_PCREL_S1
2293 microMIPS PC-relative relocations.
2296 BFD_RELOC_MICROMIPS_GPREL16
2298 BFD_RELOC_MICROMIPS_HI16
2300 BFD_RELOC_MICROMIPS_HI16_S
2302 BFD_RELOC_MICROMIPS_LO16
2304 microMIPS versions of generic BFD relocs.
2307 BFD_RELOC_MIPS_GOT16
2309 BFD_RELOC_MICROMIPS_GOT16
2311 BFD_RELOC_MIPS_CALL16
2313 BFD_RELOC_MICROMIPS_CALL16
2315 BFD_RELOC_MIPS_GOT_HI16
2317 BFD_RELOC_MICROMIPS_GOT_HI16
2319 BFD_RELOC_MIPS_GOT_LO16
2321 BFD_RELOC_MICROMIPS_GOT_LO16
2323 BFD_RELOC_MIPS_CALL_HI16
2325 BFD_RELOC_MICROMIPS_CALL_HI16
2327 BFD_RELOC_MIPS_CALL_LO16
2329 BFD_RELOC_MICROMIPS_CALL_LO16
2333 BFD_RELOC_MICROMIPS_SUB
2335 BFD_RELOC_MIPS_GOT_PAGE
2337 BFD_RELOC_MICROMIPS_GOT_PAGE
2339 BFD_RELOC_MIPS_GOT_OFST
2341 BFD_RELOC_MICROMIPS_GOT_OFST
2343 BFD_RELOC_MIPS_GOT_DISP
2345 BFD_RELOC_MICROMIPS_GOT_DISP
2347 BFD_RELOC_MIPS_SHIFT5
2349 BFD_RELOC_MIPS_SHIFT6
2351 BFD_RELOC_MIPS_INSERT_A
2353 BFD_RELOC_MIPS_INSERT_B
2355 BFD_RELOC_MIPS_DELETE
2357 BFD_RELOC_MIPS_HIGHEST
2359 BFD_RELOC_MICROMIPS_HIGHEST
2361 BFD_RELOC_MIPS_HIGHER
2363 BFD_RELOC_MICROMIPS_HIGHER
2365 BFD_RELOC_MIPS_SCN_DISP
2367 BFD_RELOC_MICROMIPS_SCN_DISP
2369 BFD_RELOC_MIPS_REL16
2371 BFD_RELOC_MIPS_RELGOT
2375 BFD_RELOC_MICROMIPS_JALR
2377 BFD_RELOC_MIPS_TLS_DTPMOD32
2379 BFD_RELOC_MIPS_TLS_DTPREL32
2381 BFD_RELOC_MIPS_TLS_DTPMOD64
2383 BFD_RELOC_MIPS_TLS_DTPREL64
2385 BFD_RELOC_MIPS_TLS_GD
2387 BFD_RELOC_MICROMIPS_TLS_GD
2389 BFD_RELOC_MIPS_TLS_LDM
2391 BFD_RELOC_MICROMIPS_TLS_LDM
2393 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2395 BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16
2397 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2399 BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16
2401 BFD_RELOC_MIPS_TLS_GOTTPREL
2403 BFD_RELOC_MICROMIPS_TLS_GOTTPREL
2405 BFD_RELOC_MIPS_TLS_TPREL32
2407 BFD_RELOC_MIPS_TLS_TPREL64
2409 BFD_RELOC_MIPS_TLS_TPREL_HI16
2411 BFD_RELOC_MICROMIPS_TLS_TPREL_HI16
2413 BFD_RELOC_MIPS_TLS_TPREL_LO16
2415 BFD_RELOC_MICROMIPS_TLS_TPREL_LO16
2419 MIPS ELF relocations.
2425 BFD_RELOC_MIPS_JUMP_SLOT
2427 MIPS ELF relocations (VxWorks and PLT extensions).
2431 BFD_RELOC_MOXIE_10_PCREL
2433 Moxie ELF relocations.
2437 BFD_RELOC_FRV_LABEL16
2439 BFD_RELOC_FRV_LABEL24
2445 BFD_RELOC_FRV_GPREL12
2447 BFD_RELOC_FRV_GPRELU12
2449 BFD_RELOC_FRV_GPREL32
2451 BFD_RELOC_FRV_GPRELHI
2453 BFD_RELOC_FRV_GPRELLO
2461 BFD_RELOC_FRV_FUNCDESC
2463 BFD_RELOC_FRV_FUNCDESC_GOT12
2465 BFD_RELOC_FRV_FUNCDESC_GOTHI
2467 BFD_RELOC_FRV_FUNCDESC_GOTLO
2469 BFD_RELOC_FRV_FUNCDESC_VALUE
2471 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2473 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2475 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2477 BFD_RELOC_FRV_GOTOFF12
2479 BFD_RELOC_FRV_GOTOFFHI
2481 BFD_RELOC_FRV_GOTOFFLO
2483 BFD_RELOC_FRV_GETTLSOFF
2485 BFD_RELOC_FRV_TLSDESC_VALUE
2487 BFD_RELOC_FRV_GOTTLSDESC12
2489 BFD_RELOC_FRV_GOTTLSDESCHI
2491 BFD_RELOC_FRV_GOTTLSDESCLO
2493 BFD_RELOC_FRV_TLSMOFF12
2495 BFD_RELOC_FRV_TLSMOFFHI
2497 BFD_RELOC_FRV_TLSMOFFLO
2499 BFD_RELOC_FRV_GOTTLSOFF12
2501 BFD_RELOC_FRV_GOTTLSOFFHI
2503 BFD_RELOC_FRV_GOTTLSOFFLO
2505 BFD_RELOC_FRV_TLSOFF
2507 BFD_RELOC_FRV_TLSDESC_RELAX
2509 BFD_RELOC_FRV_GETTLSOFF_RELAX
2511 BFD_RELOC_FRV_TLSOFF_RELAX
2513 BFD_RELOC_FRV_TLSMOFF
2515 Fujitsu Frv Relocations.
2519 BFD_RELOC_MN10300_GOTOFF24
2521 This is a 24bit GOT-relative reloc for the mn10300.
2523 BFD_RELOC_MN10300_GOT32
2525 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2528 BFD_RELOC_MN10300_GOT24
2530 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2533 BFD_RELOC_MN10300_GOT16
2535 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2538 BFD_RELOC_MN10300_COPY
2540 Copy symbol at runtime.
2542 BFD_RELOC_MN10300_GLOB_DAT
2546 BFD_RELOC_MN10300_JMP_SLOT
2550 BFD_RELOC_MN10300_RELATIVE
2552 Adjust by program base.
2554 BFD_RELOC_MN10300_SYM_DIFF
2556 Together with another reloc targeted at the same location,
2557 allows for a value that is the difference of two symbols
2558 in the same section.
2560 BFD_RELOC_MN10300_ALIGN
2562 The addend of this reloc is an alignment power that must
2563 be honoured at the offset's location, regardless of linker
2566 BFD_RELOC_MN10300_TLS_GD
2568 BFD_RELOC_MN10300_TLS_LD
2570 BFD_RELOC_MN10300_TLS_LDO
2572 BFD_RELOC_MN10300_TLS_GOTIE
2574 BFD_RELOC_MN10300_TLS_IE
2576 BFD_RELOC_MN10300_TLS_LE
2578 BFD_RELOC_MN10300_TLS_DTPMOD
2580 BFD_RELOC_MN10300_TLS_DTPOFF
2582 BFD_RELOC_MN10300_TLS_TPOFF
2584 Various TLS-related relocations.
2586 BFD_RELOC_MN10300_32_PCREL
2588 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
2591 BFD_RELOC_MN10300_16_PCREL
2593 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
2604 BFD_RELOC_386_GLOB_DAT
2606 BFD_RELOC_386_JUMP_SLOT
2608 BFD_RELOC_386_RELATIVE
2610 BFD_RELOC_386_GOTOFF
2614 BFD_RELOC_386_TLS_TPOFF
2616 BFD_RELOC_386_TLS_IE
2618 BFD_RELOC_386_TLS_GOTIE
2620 BFD_RELOC_386_TLS_LE
2622 BFD_RELOC_386_TLS_GD
2624 BFD_RELOC_386_TLS_LDM
2626 BFD_RELOC_386_TLS_LDO_32
2628 BFD_RELOC_386_TLS_IE_32
2630 BFD_RELOC_386_TLS_LE_32
2632 BFD_RELOC_386_TLS_DTPMOD32
2634 BFD_RELOC_386_TLS_DTPOFF32
2636 BFD_RELOC_386_TLS_TPOFF32
2638 BFD_RELOC_386_TLS_GOTDESC
2640 BFD_RELOC_386_TLS_DESC_CALL
2642 BFD_RELOC_386_TLS_DESC
2644 BFD_RELOC_386_IRELATIVE
2646 i386/elf relocations
2649 BFD_RELOC_X86_64_GOT32
2651 BFD_RELOC_X86_64_PLT32
2653 BFD_RELOC_X86_64_COPY
2655 BFD_RELOC_X86_64_GLOB_DAT
2657 BFD_RELOC_X86_64_JUMP_SLOT
2659 BFD_RELOC_X86_64_RELATIVE
2661 BFD_RELOC_X86_64_GOTPCREL
2663 BFD_RELOC_X86_64_32S
2665 BFD_RELOC_X86_64_DTPMOD64
2667 BFD_RELOC_X86_64_DTPOFF64
2669 BFD_RELOC_X86_64_TPOFF64
2671 BFD_RELOC_X86_64_TLSGD
2673 BFD_RELOC_X86_64_TLSLD
2675 BFD_RELOC_X86_64_DTPOFF32
2677 BFD_RELOC_X86_64_GOTTPOFF
2679 BFD_RELOC_X86_64_TPOFF32
2681 BFD_RELOC_X86_64_GOTOFF64
2683 BFD_RELOC_X86_64_GOTPC32
2685 BFD_RELOC_X86_64_GOT64
2687 BFD_RELOC_X86_64_GOTPCREL64
2689 BFD_RELOC_X86_64_GOTPC64
2691 BFD_RELOC_X86_64_GOTPLT64
2693 BFD_RELOC_X86_64_PLTOFF64
2695 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2697 BFD_RELOC_X86_64_TLSDESC_CALL
2699 BFD_RELOC_X86_64_TLSDESC
2701 BFD_RELOC_X86_64_IRELATIVE
2703 BFD_RELOC_X86_64_PC32_BND
2705 BFD_RELOC_X86_64_PLT32_BND
2707 x86-64/elf relocations
2710 BFD_RELOC_NS32K_IMM_8
2712 BFD_RELOC_NS32K_IMM_16
2714 BFD_RELOC_NS32K_IMM_32
2716 BFD_RELOC_NS32K_IMM_8_PCREL
2718 BFD_RELOC_NS32K_IMM_16_PCREL
2720 BFD_RELOC_NS32K_IMM_32_PCREL
2722 BFD_RELOC_NS32K_DISP_8
2724 BFD_RELOC_NS32K_DISP_16
2726 BFD_RELOC_NS32K_DISP_32
2728 BFD_RELOC_NS32K_DISP_8_PCREL
2730 BFD_RELOC_NS32K_DISP_16_PCREL
2732 BFD_RELOC_NS32K_DISP_32_PCREL
2737 BFD_RELOC_PDP11_DISP_8_PCREL
2739 BFD_RELOC_PDP11_DISP_6_PCREL
2744 BFD_RELOC_PJ_CODE_HI16
2746 BFD_RELOC_PJ_CODE_LO16
2748 BFD_RELOC_PJ_CODE_DIR16
2750 BFD_RELOC_PJ_CODE_DIR32
2752 BFD_RELOC_PJ_CODE_REL16
2754 BFD_RELOC_PJ_CODE_REL32
2756 Picojava relocs. Not all of these appear in object files.
2767 BFD_RELOC_PPC_B16_BRTAKEN
2769 BFD_RELOC_PPC_B16_BRNTAKEN
2773 BFD_RELOC_PPC_BA16_BRTAKEN
2775 BFD_RELOC_PPC_BA16_BRNTAKEN
2779 BFD_RELOC_PPC_GLOB_DAT
2781 BFD_RELOC_PPC_JMP_SLOT
2783 BFD_RELOC_PPC_RELATIVE
2785 BFD_RELOC_PPC_LOCAL24PC
2787 BFD_RELOC_PPC_EMB_NADDR32
2789 BFD_RELOC_PPC_EMB_NADDR16
2791 BFD_RELOC_PPC_EMB_NADDR16_LO
2793 BFD_RELOC_PPC_EMB_NADDR16_HI
2795 BFD_RELOC_PPC_EMB_NADDR16_HA
2797 BFD_RELOC_PPC_EMB_SDAI16
2799 BFD_RELOC_PPC_EMB_SDA2I16
2801 BFD_RELOC_PPC_EMB_SDA2REL
2803 BFD_RELOC_PPC_EMB_SDA21
2805 BFD_RELOC_PPC_EMB_MRKREF
2807 BFD_RELOC_PPC_EMB_RELSEC16
2809 BFD_RELOC_PPC_EMB_RELST_LO
2811 BFD_RELOC_PPC_EMB_RELST_HI
2813 BFD_RELOC_PPC_EMB_RELST_HA
2815 BFD_RELOC_PPC_EMB_BIT_FLD
2817 BFD_RELOC_PPC_EMB_RELSDA
2819 BFD_RELOC_PPC_VLE_REL8
2821 BFD_RELOC_PPC_VLE_REL15
2823 BFD_RELOC_PPC_VLE_REL24
2825 BFD_RELOC_PPC_VLE_LO16A
2827 BFD_RELOC_PPC_VLE_LO16D
2829 BFD_RELOC_PPC_VLE_HI16A
2831 BFD_RELOC_PPC_VLE_HI16D
2833 BFD_RELOC_PPC_VLE_HA16A
2835 BFD_RELOC_PPC_VLE_HA16D
2837 BFD_RELOC_PPC_VLE_SDA21
2839 BFD_RELOC_PPC_VLE_SDA21_LO
2841 BFD_RELOC_PPC_VLE_SDAREL_LO16A
2843 BFD_RELOC_PPC_VLE_SDAREL_LO16D
2845 BFD_RELOC_PPC_VLE_SDAREL_HI16A
2847 BFD_RELOC_PPC_VLE_SDAREL_HI16D
2849 BFD_RELOC_PPC_VLE_SDAREL_HA16A
2851 BFD_RELOC_PPC_VLE_SDAREL_HA16D
2853 BFD_RELOC_PPC64_HIGHER
2855 BFD_RELOC_PPC64_HIGHER_S
2857 BFD_RELOC_PPC64_HIGHEST
2859 BFD_RELOC_PPC64_HIGHEST_S
2861 BFD_RELOC_PPC64_TOC16_LO
2863 BFD_RELOC_PPC64_TOC16_HI
2865 BFD_RELOC_PPC64_TOC16_HA
2869 BFD_RELOC_PPC64_PLTGOT16
2871 BFD_RELOC_PPC64_PLTGOT16_LO
2873 BFD_RELOC_PPC64_PLTGOT16_HI
2875 BFD_RELOC_PPC64_PLTGOT16_HA
2877 BFD_RELOC_PPC64_ADDR16_DS
2879 BFD_RELOC_PPC64_ADDR16_LO_DS
2881 BFD_RELOC_PPC64_GOT16_DS
2883 BFD_RELOC_PPC64_GOT16_LO_DS
2885 BFD_RELOC_PPC64_PLT16_LO_DS
2887 BFD_RELOC_PPC64_SECTOFF_DS
2889 BFD_RELOC_PPC64_SECTOFF_LO_DS
2891 BFD_RELOC_PPC64_TOC16_DS
2893 BFD_RELOC_PPC64_TOC16_LO_DS
2895 BFD_RELOC_PPC64_PLTGOT16_DS
2897 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2899 BFD_RELOC_PPC64_ADDR16_HIGH
2901 BFD_RELOC_PPC64_ADDR16_HIGHA
2903 BFD_RELOC_PPC64_ADDR64_LOCAL
2905 Power(rs6000) and PowerPC relocations.
2914 BFD_RELOC_PPC_DTPMOD
2916 BFD_RELOC_PPC_TPREL16
2918 BFD_RELOC_PPC_TPREL16_LO
2920 BFD_RELOC_PPC_TPREL16_HI
2922 BFD_RELOC_PPC_TPREL16_HA
2926 BFD_RELOC_PPC_DTPREL16
2928 BFD_RELOC_PPC_DTPREL16_LO
2930 BFD_RELOC_PPC_DTPREL16_HI
2932 BFD_RELOC_PPC_DTPREL16_HA
2934 BFD_RELOC_PPC_DTPREL
2936 BFD_RELOC_PPC_GOT_TLSGD16
2938 BFD_RELOC_PPC_GOT_TLSGD16_LO
2940 BFD_RELOC_PPC_GOT_TLSGD16_HI
2942 BFD_RELOC_PPC_GOT_TLSGD16_HA
2944 BFD_RELOC_PPC_GOT_TLSLD16
2946 BFD_RELOC_PPC_GOT_TLSLD16_LO
2948 BFD_RELOC_PPC_GOT_TLSLD16_HI
2950 BFD_RELOC_PPC_GOT_TLSLD16_HA
2952 BFD_RELOC_PPC_GOT_TPREL16
2954 BFD_RELOC_PPC_GOT_TPREL16_LO
2956 BFD_RELOC_PPC_GOT_TPREL16_HI
2958 BFD_RELOC_PPC_GOT_TPREL16_HA
2960 BFD_RELOC_PPC_GOT_DTPREL16
2962 BFD_RELOC_PPC_GOT_DTPREL16_LO
2964 BFD_RELOC_PPC_GOT_DTPREL16_HI
2966 BFD_RELOC_PPC_GOT_DTPREL16_HA
2968 BFD_RELOC_PPC64_TPREL16_DS
2970 BFD_RELOC_PPC64_TPREL16_LO_DS
2972 BFD_RELOC_PPC64_TPREL16_HIGHER
2974 BFD_RELOC_PPC64_TPREL16_HIGHERA
2976 BFD_RELOC_PPC64_TPREL16_HIGHEST
2978 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2980 BFD_RELOC_PPC64_DTPREL16_DS
2982 BFD_RELOC_PPC64_DTPREL16_LO_DS
2984 BFD_RELOC_PPC64_DTPREL16_HIGHER
2986 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2988 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2990 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2992 BFD_RELOC_PPC64_TPREL16_HIGH
2994 BFD_RELOC_PPC64_TPREL16_HIGHA
2996 BFD_RELOC_PPC64_DTPREL16_HIGH
2998 BFD_RELOC_PPC64_DTPREL16_HIGHA
3000 PowerPC and PowerPC64 thread-local storage relocations.
3005 IBM 370/390 relocations
3010 The type of reloc used to build a constructor table - at the moment
3011 probably a 32 bit wide absolute relocation, but the target can choose.
3012 It generally does map to one of the other relocation types.
3015 BFD_RELOC_ARM_PCREL_BRANCH
3017 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
3018 not stored in the instruction.
3020 BFD_RELOC_ARM_PCREL_BLX
3022 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
3023 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
3024 field in the instruction.
3026 BFD_RELOC_THUMB_PCREL_BLX
3028 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
3029 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
3030 field in the instruction.
3032 BFD_RELOC_ARM_PCREL_CALL
3034 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
3036 BFD_RELOC_ARM_PCREL_JUMP
3038 ARM 26-bit pc-relative branch for B or conditional BL instruction.
3041 BFD_RELOC_THUMB_PCREL_BRANCH7
3043 BFD_RELOC_THUMB_PCREL_BRANCH9
3045 BFD_RELOC_THUMB_PCREL_BRANCH12
3047 BFD_RELOC_THUMB_PCREL_BRANCH20
3049 BFD_RELOC_THUMB_PCREL_BRANCH23
3051 BFD_RELOC_THUMB_PCREL_BRANCH25
3053 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
3054 The lowest bit must be zero and is not stored in the instruction.
3055 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
3056 "nn" one smaller in all cases. Note further that BRANCH23
3057 corresponds to R_ARM_THM_CALL.
3060 BFD_RELOC_ARM_OFFSET_IMM
3062 12-bit immediate offset, used in ARM-format ldr and str instructions.
3065 BFD_RELOC_ARM_THUMB_OFFSET
3067 5-bit immediate offset, used in Thumb-format ldr and str instructions.
3070 BFD_RELOC_ARM_TARGET1
3072 Pc-relative or absolute relocation depending on target. Used for
3073 entries in .init_array sections.
3075 BFD_RELOC_ARM_ROSEGREL32
3077 Read-only segment base relative address.
3079 BFD_RELOC_ARM_SBREL32
3081 Data segment base relative address.
3083 BFD_RELOC_ARM_TARGET2
3085 This reloc is used for references to RTTI data from exception handling
3086 tables. The actual definition depends on the target. It may be a
3087 pc-relative or some form of GOT-indirect relocation.
3089 BFD_RELOC_ARM_PREL31
3091 31-bit PC relative address.
3097 BFD_RELOC_ARM_MOVW_PCREL
3099 BFD_RELOC_ARM_MOVT_PCREL
3101 BFD_RELOC_ARM_THUMB_MOVW
3103 BFD_RELOC_ARM_THUMB_MOVT
3105 BFD_RELOC_ARM_THUMB_MOVW_PCREL
3107 BFD_RELOC_ARM_THUMB_MOVT_PCREL
3109 Low and High halfword relocations for MOVW and MOVT instructions.
3112 BFD_RELOC_ARM_JUMP_SLOT
3114 BFD_RELOC_ARM_GLOB_DAT
3120 BFD_RELOC_ARM_RELATIVE
3122 BFD_RELOC_ARM_GOTOFF
3126 BFD_RELOC_ARM_GOT_PREL
3128 Relocations for setting up GOTs and PLTs for shared libraries.
3131 BFD_RELOC_ARM_TLS_GD32
3133 BFD_RELOC_ARM_TLS_LDO32
3135 BFD_RELOC_ARM_TLS_LDM32
3137 BFD_RELOC_ARM_TLS_DTPOFF32
3139 BFD_RELOC_ARM_TLS_DTPMOD32
3141 BFD_RELOC_ARM_TLS_TPOFF32
3143 BFD_RELOC_ARM_TLS_IE32
3145 BFD_RELOC_ARM_TLS_LE32
3147 BFD_RELOC_ARM_TLS_GOTDESC
3149 BFD_RELOC_ARM_TLS_CALL
3151 BFD_RELOC_ARM_THM_TLS_CALL
3153 BFD_RELOC_ARM_TLS_DESCSEQ
3155 BFD_RELOC_ARM_THM_TLS_DESCSEQ
3157 BFD_RELOC_ARM_TLS_DESC
3159 ARM thread-local storage relocations.
3162 BFD_RELOC_ARM_ALU_PC_G0_NC
3164 BFD_RELOC_ARM_ALU_PC_G0
3166 BFD_RELOC_ARM_ALU_PC_G1_NC
3168 BFD_RELOC_ARM_ALU_PC_G1
3170 BFD_RELOC_ARM_ALU_PC_G2
3172 BFD_RELOC_ARM_LDR_PC_G0
3174 BFD_RELOC_ARM_LDR_PC_G1
3176 BFD_RELOC_ARM_LDR_PC_G2
3178 BFD_RELOC_ARM_LDRS_PC_G0
3180 BFD_RELOC_ARM_LDRS_PC_G1
3182 BFD_RELOC_ARM_LDRS_PC_G2
3184 BFD_RELOC_ARM_LDC_PC_G0
3186 BFD_RELOC_ARM_LDC_PC_G1
3188 BFD_RELOC_ARM_LDC_PC_G2
3190 BFD_RELOC_ARM_ALU_SB_G0_NC
3192 BFD_RELOC_ARM_ALU_SB_G0
3194 BFD_RELOC_ARM_ALU_SB_G1_NC
3196 BFD_RELOC_ARM_ALU_SB_G1
3198 BFD_RELOC_ARM_ALU_SB_G2
3200 BFD_RELOC_ARM_LDR_SB_G0
3202 BFD_RELOC_ARM_LDR_SB_G1
3204 BFD_RELOC_ARM_LDR_SB_G2
3206 BFD_RELOC_ARM_LDRS_SB_G0
3208 BFD_RELOC_ARM_LDRS_SB_G1
3210 BFD_RELOC_ARM_LDRS_SB_G2
3212 BFD_RELOC_ARM_LDC_SB_G0
3214 BFD_RELOC_ARM_LDC_SB_G1
3216 BFD_RELOC_ARM_LDC_SB_G2
3218 ARM group relocations.
3223 Annotation of BX instructions.
3226 BFD_RELOC_ARM_IRELATIVE
3228 ARM support for STT_GNU_IFUNC.
3231 BFD_RELOC_ARM_IMMEDIATE
3233 BFD_RELOC_ARM_ADRL_IMMEDIATE
3235 BFD_RELOC_ARM_T32_IMMEDIATE
3237 BFD_RELOC_ARM_T32_ADD_IMM
3239 BFD_RELOC_ARM_T32_IMM12
3241 BFD_RELOC_ARM_T32_ADD_PC12
3243 BFD_RELOC_ARM_SHIFT_IMM
3253 BFD_RELOC_ARM_CP_OFF_IMM
3255 BFD_RELOC_ARM_CP_OFF_IMM_S2
3257 BFD_RELOC_ARM_T32_CP_OFF_IMM
3259 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
3261 BFD_RELOC_ARM_ADR_IMM
3263 BFD_RELOC_ARM_LDR_IMM
3265 BFD_RELOC_ARM_LITERAL
3267 BFD_RELOC_ARM_IN_POOL
3269 BFD_RELOC_ARM_OFFSET_IMM8
3271 BFD_RELOC_ARM_T32_OFFSET_U8
3273 BFD_RELOC_ARM_T32_OFFSET_IMM
3275 BFD_RELOC_ARM_HWLITERAL
3277 BFD_RELOC_ARM_THUMB_ADD
3279 BFD_RELOC_ARM_THUMB_IMM
3281 BFD_RELOC_ARM_THUMB_SHIFT
3283 These relocs are only used within the ARM assembler. They are not
3284 (at present) written to any object files.
3287 BFD_RELOC_SH_PCDISP8BY2
3289 BFD_RELOC_SH_PCDISP12BY2
3297 BFD_RELOC_SH_DISP12BY2
3299 BFD_RELOC_SH_DISP12BY4
3301 BFD_RELOC_SH_DISP12BY8
3305 BFD_RELOC_SH_DISP20BY8
3309 BFD_RELOC_SH_IMM4BY2
3311 BFD_RELOC_SH_IMM4BY4
3315 BFD_RELOC_SH_IMM8BY2
3317 BFD_RELOC_SH_IMM8BY4
3319 BFD_RELOC_SH_PCRELIMM8BY2
3321 BFD_RELOC_SH_PCRELIMM8BY4
3323 BFD_RELOC_SH_SWITCH16
3325 BFD_RELOC_SH_SWITCH32
3339 BFD_RELOC_SH_LOOP_START
3341 BFD_RELOC_SH_LOOP_END
3345 BFD_RELOC_SH_GLOB_DAT
3347 BFD_RELOC_SH_JMP_SLOT
3349 BFD_RELOC_SH_RELATIVE
3353 BFD_RELOC_SH_GOT_LOW16
3355 BFD_RELOC_SH_GOT_MEDLOW16
3357 BFD_RELOC_SH_GOT_MEDHI16
3359 BFD_RELOC_SH_GOT_HI16
3361 BFD_RELOC_SH_GOTPLT_LOW16
3363 BFD_RELOC_SH_GOTPLT_MEDLOW16
3365 BFD_RELOC_SH_GOTPLT_MEDHI16
3367 BFD_RELOC_SH_GOTPLT_HI16
3369 BFD_RELOC_SH_PLT_LOW16
3371 BFD_RELOC_SH_PLT_MEDLOW16
3373 BFD_RELOC_SH_PLT_MEDHI16
3375 BFD_RELOC_SH_PLT_HI16
3377 BFD_RELOC_SH_GOTOFF_LOW16
3379 BFD_RELOC_SH_GOTOFF_MEDLOW16
3381 BFD_RELOC_SH_GOTOFF_MEDHI16
3383 BFD_RELOC_SH_GOTOFF_HI16
3385 BFD_RELOC_SH_GOTPC_LOW16
3387 BFD_RELOC_SH_GOTPC_MEDLOW16
3389 BFD_RELOC_SH_GOTPC_MEDHI16
3391 BFD_RELOC_SH_GOTPC_HI16
3395 BFD_RELOC_SH_GLOB_DAT64
3397 BFD_RELOC_SH_JMP_SLOT64
3399 BFD_RELOC_SH_RELATIVE64
3401 BFD_RELOC_SH_GOT10BY4
3403 BFD_RELOC_SH_GOT10BY8
3405 BFD_RELOC_SH_GOTPLT10BY4
3407 BFD_RELOC_SH_GOTPLT10BY8
3409 BFD_RELOC_SH_GOTPLT32
3411 BFD_RELOC_SH_SHMEDIA_CODE
3417 BFD_RELOC_SH_IMMS6BY32
3423 BFD_RELOC_SH_IMMS10BY2
3425 BFD_RELOC_SH_IMMS10BY4
3427 BFD_RELOC_SH_IMMS10BY8
3433 BFD_RELOC_SH_IMM_LOW16
3435 BFD_RELOC_SH_IMM_LOW16_PCREL
3437 BFD_RELOC_SH_IMM_MEDLOW16
3439 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3441 BFD_RELOC_SH_IMM_MEDHI16
3443 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3445 BFD_RELOC_SH_IMM_HI16
3447 BFD_RELOC_SH_IMM_HI16_PCREL
3451 BFD_RELOC_SH_TLS_GD_32
3453 BFD_RELOC_SH_TLS_LD_32
3455 BFD_RELOC_SH_TLS_LDO_32
3457 BFD_RELOC_SH_TLS_IE_32
3459 BFD_RELOC_SH_TLS_LE_32
3461 BFD_RELOC_SH_TLS_DTPMOD32
3463 BFD_RELOC_SH_TLS_DTPOFF32
3465 BFD_RELOC_SH_TLS_TPOFF32
3469 BFD_RELOC_SH_GOTOFF20
3471 BFD_RELOC_SH_GOTFUNCDESC
3473 BFD_RELOC_SH_GOTFUNCDESC20
3475 BFD_RELOC_SH_GOTOFFFUNCDESC
3477 BFD_RELOC_SH_GOTOFFFUNCDESC20
3479 BFD_RELOC_SH_FUNCDESC
3481 Renesas / SuperH SH relocs. Not all of these appear in object files.
3484 BFD_RELOC_ARC_B22_PCREL
3487 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
3488 not stored in the instruction. The high 20 bits are installed in bits 26
3489 through 7 of the instruction.
3493 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
3494 stored in the instruction. The high 24 bits are installed in bits 23
3498 BFD_RELOC_BFIN_16_IMM
3500 ADI Blackfin 16 bit immediate absolute reloc.
3502 BFD_RELOC_BFIN_16_HIGH
3504 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3506 BFD_RELOC_BFIN_4_PCREL
3508 ADI Blackfin 'a' part of LSETUP.
3510 BFD_RELOC_BFIN_5_PCREL
3514 BFD_RELOC_BFIN_16_LOW
3516 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3518 BFD_RELOC_BFIN_10_PCREL
3522 BFD_RELOC_BFIN_11_PCREL
3524 ADI Blackfin 'b' part of LSETUP.
3526 BFD_RELOC_BFIN_12_PCREL_JUMP
3530 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3532 ADI Blackfin Short jump, pcrel.
3534 BFD_RELOC_BFIN_24_PCREL_CALL_X
3536 ADI Blackfin Call.x not implemented.
3538 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3540 ADI Blackfin Long Jump pcrel.
3542 BFD_RELOC_BFIN_GOT17M4
3544 BFD_RELOC_BFIN_GOTHI
3546 BFD_RELOC_BFIN_GOTLO
3548 BFD_RELOC_BFIN_FUNCDESC
3550 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3552 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3554 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3556 BFD_RELOC_BFIN_FUNCDESC_VALUE
3558 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3560 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3562 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3564 BFD_RELOC_BFIN_GOTOFF17M4
3566 BFD_RELOC_BFIN_GOTOFFHI
3568 BFD_RELOC_BFIN_GOTOFFLO
3570 ADI Blackfin FD-PIC relocations.
3574 ADI Blackfin GOT relocation.
3576 BFD_RELOC_BFIN_PLTPC
3578 ADI Blackfin PLTPC relocation.
3580 BFD_ARELOC_BFIN_PUSH
3582 ADI Blackfin arithmetic relocation.
3584 BFD_ARELOC_BFIN_CONST
3586 ADI Blackfin arithmetic relocation.
3590 ADI Blackfin arithmetic relocation.
3594 ADI Blackfin arithmetic relocation.
3596 BFD_ARELOC_BFIN_MULT
3598 ADI Blackfin arithmetic relocation.
3602 ADI Blackfin arithmetic relocation.
3606 ADI Blackfin arithmetic relocation.
3608 BFD_ARELOC_BFIN_LSHIFT
3610 ADI Blackfin arithmetic relocation.
3612 BFD_ARELOC_BFIN_RSHIFT
3614 ADI Blackfin arithmetic relocation.
3618 ADI Blackfin arithmetic relocation.
3622 ADI Blackfin arithmetic relocation.
3626 ADI Blackfin arithmetic relocation.
3628 BFD_ARELOC_BFIN_LAND
3630 ADI Blackfin arithmetic relocation.
3634 ADI Blackfin arithmetic relocation.
3638 ADI Blackfin arithmetic relocation.
3642 ADI Blackfin arithmetic relocation.
3644 BFD_ARELOC_BFIN_COMP
3646 ADI Blackfin arithmetic relocation.
3648 BFD_ARELOC_BFIN_PAGE
3650 ADI Blackfin arithmetic relocation.
3652 BFD_ARELOC_BFIN_HWPAGE
3654 ADI Blackfin arithmetic relocation.
3656 BFD_ARELOC_BFIN_ADDR
3658 ADI Blackfin arithmetic relocation.
3661 BFD_RELOC_D10V_10_PCREL_R
3663 Mitsubishi D10V relocs.
3664 This is a 10-bit reloc with the right 2 bits
3667 BFD_RELOC_D10V_10_PCREL_L
3669 Mitsubishi D10V relocs.
3670 This is a 10-bit reloc with the right 2 bits
3671 assumed to be 0. This is the same as the previous reloc
3672 except it is in the left container, i.e.,
3673 shifted left 15 bits.
3677 This is an 18-bit reloc with the right 2 bits
3680 BFD_RELOC_D10V_18_PCREL
3682 This is an 18-bit reloc with the right 2 bits
3688 Mitsubishi D30V relocs.
3689 This is a 6-bit absolute reloc.
3691 BFD_RELOC_D30V_9_PCREL
3693 This is a 6-bit pc-relative reloc with
3694 the right 3 bits assumed to be 0.
3696 BFD_RELOC_D30V_9_PCREL_R
3698 This is a 6-bit pc-relative reloc with
3699 the right 3 bits assumed to be 0. Same
3700 as the previous reloc but on the right side
3705 This is a 12-bit absolute reloc with the
3706 right 3 bitsassumed to be 0.
3708 BFD_RELOC_D30V_15_PCREL
3710 This is a 12-bit pc-relative reloc with
3711 the right 3 bits assumed to be 0.
3713 BFD_RELOC_D30V_15_PCREL_R
3715 This is a 12-bit pc-relative reloc with
3716 the right 3 bits assumed to be 0. Same
3717 as the previous reloc but on the right side
3722 This is an 18-bit absolute reloc with
3723 the right 3 bits assumed to be 0.
3725 BFD_RELOC_D30V_21_PCREL
3727 This is an 18-bit pc-relative reloc with
3728 the right 3 bits assumed to be 0.
3730 BFD_RELOC_D30V_21_PCREL_R
3732 This is an 18-bit pc-relative reloc with
3733 the right 3 bits assumed to be 0. Same
3734 as the previous reloc but on the right side
3739 This is a 32-bit absolute reloc.
3741 BFD_RELOC_D30V_32_PCREL
3743 This is a 32-bit pc-relative reloc.
3746 BFD_RELOC_DLX_HI16_S
3761 BFD_RELOC_M32C_RL_JUMP
3763 BFD_RELOC_M32C_RL_1ADDR
3765 BFD_RELOC_M32C_RL_2ADDR
3767 Renesas M16C/M32C Relocations.
3772 Renesas M32R (formerly Mitsubishi M32R) relocs.
3773 This is a 24 bit absolute address.
3775 BFD_RELOC_M32R_10_PCREL
3777 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3779 BFD_RELOC_M32R_18_PCREL
3781 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3783 BFD_RELOC_M32R_26_PCREL
3785 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3787 BFD_RELOC_M32R_HI16_ULO
3789 This is a 16-bit reloc containing the high 16 bits of an address
3790 used when the lower 16 bits are treated as unsigned.
3792 BFD_RELOC_M32R_HI16_SLO
3794 This is a 16-bit reloc containing the high 16 bits of an address
3795 used when the lower 16 bits are treated as signed.
3799 This is a 16-bit reloc containing the lower 16 bits of an address.
3801 BFD_RELOC_M32R_SDA16
3803 This is a 16-bit reloc containing the small data area offset for use in
3804 add3, load, and store instructions.
3806 BFD_RELOC_M32R_GOT24
3808 BFD_RELOC_M32R_26_PLTREL
3812 BFD_RELOC_M32R_GLOB_DAT
3814 BFD_RELOC_M32R_JMP_SLOT
3816 BFD_RELOC_M32R_RELATIVE
3818 BFD_RELOC_M32R_GOTOFF
3820 BFD_RELOC_M32R_GOTOFF_HI_ULO
3822 BFD_RELOC_M32R_GOTOFF_HI_SLO
3824 BFD_RELOC_M32R_GOTOFF_LO
3826 BFD_RELOC_M32R_GOTPC24
3828 BFD_RELOC_M32R_GOT16_HI_ULO
3830 BFD_RELOC_M32R_GOT16_HI_SLO
3832 BFD_RELOC_M32R_GOT16_LO
3834 BFD_RELOC_M32R_GOTPC_HI_ULO
3836 BFD_RELOC_M32R_GOTPC_HI_SLO
3838 BFD_RELOC_M32R_GOTPC_LO
3847 This is a 20 bit absolute address.
3849 BFD_RELOC_NDS32_9_PCREL
3851 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
3853 BFD_RELOC_NDS32_WORD_9_PCREL
3855 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
3857 BFD_RELOC_NDS32_15_PCREL
3859 This is an 15-bit reloc with the right 1 bit assumed to be 0.
3861 BFD_RELOC_NDS32_17_PCREL
3863 This is an 17-bit reloc with the right 1 bit assumed to be 0.
3865 BFD_RELOC_NDS32_25_PCREL
3867 This is a 25-bit reloc with the right 1 bit assumed to be 0.
3869 BFD_RELOC_NDS32_HI20
3871 This is a 20-bit reloc containing the high 20 bits of an address
3872 used with the lower 12 bits
3874 BFD_RELOC_NDS32_LO12S3
3876 This is a 12-bit reloc containing the lower 12 bits of an address
3877 then shift right by 3. This is used with ldi,sdi...
3879 BFD_RELOC_NDS32_LO12S2
3881 This is a 12-bit reloc containing the lower 12 bits of an address
3882 then shift left by 2. This is used with lwi,swi...
3884 BFD_RELOC_NDS32_LO12S1
3886 This is a 12-bit reloc containing the lower 12 bits of an address
3887 then shift left by 1. This is used with lhi,shi...
3889 BFD_RELOC_NDS32_LO12S0
3891 This is a 12-bit reloc containing the lower 12 bits of an address
3892 then shift left by 0. This is used with lbisbi...
3894 BFD_RELOC_NDS32_LO12S0_ORI
3896 This is a 12-bit reloc containing the lower 12 bits of an address
3897 then shift left by 0. This is only used with branch relaxations
3899 BFD_RELOC_NDS32_SDA15S3
3901 This is a 15-bit reloc containing the small data area 18-bit signed offset
3902 and shift left by 3 for use in ldi, sdi...
3904 BFD_RELOC_NDS32_SDA15S2
3906 This is a 15-bit reloc containing the small data area 17-bit signed offset
3907 and shift left by 2 for use in lwi, swi...
3909 BFD_RELOC_NDS32_SDA15S1
3911 This is a 15-bit reloc containing the small data area 16-bit signed offset
3912 and shift left by 1 for use in lhi, shi...
3914 BFD_RELOC_NDS32_SDA15S0
3916 This is a 15-bit reloc containing the small data area 15-bit signed offset
3917 and shift left by 0 for use in lbi, sbi...
3919 BFD_RELOC_NDS32_SDA16S3
3921 This is a 16-bit reloc containing the small data area 16-bit signed offset
3924 BFD_RELOC_NDS32_SDA17S2
3926 This is a 17-bit reloc containing the small data area 17-bit signed offset
3927 and shift left by 2 for use in lwi.gp, swi.gp...
3929 BFD_RELOC_NDS32_SDA18S1
3931 This is a 18-bit reloc containing the small data area 18-bit signed offset
3932 and shift left by 1 for use in lhi.gp, shi.gp...
3934 BFD_RELOC_NDS32_SDA19S0
3936 This is a 19-bit reloc containing the small data area 19-bit signed offset
3937 and shift left by 0 for use in lbi.gp, sbi.gp...
3939 BFD_RELOC_NDS32_GOT20
3941 BFD_RELOC_NDS32_9_PLTREL
3943 BFD_RELOC_NDS32_25_PLTREL
3945 BFD_RELOC_NDS32_COPY
3947 BFD_RELOC_NDS32_GLOB_DAT
3949 BFD_RELOC_NDS32_JMP_SLOT
3951 BFD_RELOC_NDS32_RELATIVE
3953 BFD_RELOC_NDS32_GOTOFF
3955 BFD_RELOC_NDS32_GOTOFF_HI20
3957 BFD_RELOC_NDS32_GOTOFF_LO12
3959 BFD_RELOC_NDS32_GOTPC20
3961 BFD_RELOC_NDS32_GOT_HI20
3963 BFD_RELOC_NDS32_GOT_LO12
3965 BFD_RELOC_NDS32_GOTPC_HI20
3967 BFD_RELOC_NDS32_GOTPC_LO12
3971 BFD_RELOC_NDS32_INSN16
3973 BFD_RELOC_NDS32_LABEL
3975 BFD_RELOC_NDS32_LONGCALL1
3977 BFD_RELOC_NDS32_LONGCALL2
3979 BFD_RELOC_NDS32_LONGCALL3
3981 BFD_RELOC_NDS32_LONGJUMP1
3983 BFD_RELOC_NDS32_LONGJUMP2
3985 BFD_RELOC_NDS32_LONGJUMP3
3987 BFD_RELOC_NDS32_LOADSTORE
3989 BFD_RELOC_NDS32_9_FIXED
3991 BFD_RELOC_NDS32_15_FIXED
3993 BFD_RELOC_NDS32_17_FIXED
3995 BFD_RELOC_NDS32_25_FIXED
3999 BFD_RELOC_NDS32_PLTREL_HI20
4001 BFD_RELOC_NDS32_PLTREL_LO12
4003 BFD_RELOC_NDS32_PLT_GOTREL_HI20
4005 BFD_RELOC_NDS32_PLT_GOTREL_LO12
4009 BFD_RELOC_NDS32_SDA12S2_DP
4011 BFD_RELOC_NDS32_SDA12S2_SP
4013 BFD_RELOC_NDS32_LO12S2_DP
4015 BFD_RELOC_NDS32_LO12S2_SP
4019 BFD_RELOC_NDS32_DWARF2_OP1
4021 BFD_RELOC_NDS32_DWARF2_OP2
4023 BFD_RELOC_NDS32_DWARF2_LEB
4025 for dwarf2 debug_line.
4027 BFD_RELOC_NDS32_UPDATE_TA
4029 for eliminate 16-bit instructions
4031 BFD_RELOC_NDS32_PLT_GOTREL_LO20
4033 BFD_RELOC_NDS32_PLT_GOTREL_LO15
4035 BFD_RELOC_NDS32_PLT_GOTREL_LO19
4037 BFD_RELOC_NDS32_GOT_LO15
4039 BFD_RELOC_NDS32_GOT_LO19
4041 BFD_RELOC_NDS32_GOTOFF_LO15
4043 BFD_RELOC_NDS32_GOTOFF_LO19
4045 BFD_RELOC_NDS32_GOT15S2
4047 BFD_RELOC_NDS32_GOT17S2
4049 for PIC object relaxation
4054 This is a 5 bit absolute address.
4056 BFD_RELOC_NDS32_10_UPCREL
4058 This is a 10-bit unsigned pc-relative reloc with the right 1 bit assumed to be 0.
4060 BFD_RELOC_NDS32_SDA_FP7U2_RELA
4062 If fp were omitted, fp can used as another gp.
4064 BFD_RELOC_NDS32_RELAX_ENTRY
4066 BFD_RELOC_NDS32_GOT_SUFF
4068 BFD_RELOC_NDS32_GOTOFF_SUFF
4070 BFD_RELOC_NDS32_PLT_GOT_SUFF
4072 BFD_RELOC_NDS32_MULCALL_SUFF
4076 BFD_RELOC_NDS32_PTR_COUNT
4078 BFD_RELOC_NDS32_PTR_RESOLVED
4080 BFD_RELOC_NDS32_PLTBLOCK
4082 BFD_RELOC_NDS32_RELAX_REGION_BEGIN
4084 BFD_RELOC_NDS32_RELAX_REGION_END
4086 BFD_RELOC_NDS32_MINUEND
4088 BFD_RELOC_NDS32_SUBTRAHEND
4090 BFD_RELOC_NDS32_DIFF8
4092 BFD_RELOC_NDS32_DIFF16
4094 BFD_RELOC_NDS32_DIFF32
4096 BFD_RELOC_NDS32_DIFF_ULEB128
4098 BFD_RELOC_NDS32_25_ABS
4100 BFD_RELOC_NDS32_DATA
4102 BFD_RELOC_NDS32_TRAN
4104 BFD_RELOC_NDS32_17IFC_PCREL
4106 BFD_RELOC_NDS32_10IFCU_PCREL
4108 relaxation relative relocation types
4112 BFD_RELOC_V850_9_PCREL
4114 This is a 9-bit reloc
4116 BFD_RELOC_V850_22_PCREL
4118 This is a 22-bit reloc
4121 BFD_RELOC_V850_SDA_16_16_OFFSET
4123 This is a 16 bit offset from the short data area pointer.
4125 BFD_RELOC_V850_SDA_15_16_OFFSET
4127 This is a 16 bit offset (of which only 15 bits are used) from the
4128 short data area pointer.
4130 BFD_RELOC_V850_ZDA_16_16_OFFSET
4132 This is a 16 bit offset from the zero data area pointer.
4134 BFD_RELOC_V850_ZDA_15_16_OFFSET
4136 This is a 16 bit offset (of which only 15 bits are used) from the
4137 zero data area pointer.
4139 BFD_RELOC_V850_TDA_6_8_OFFSET
4141 This is an 8 bit offset (of which only 6 bits are used) from the
4142 tiny data area pointer.
4144 BFD_RELOC_V850_TDA_7_8_OFFSET
4146 This is an 8bit offset (of which only 7 bits are used) from the tiny
4149 BFD_RELOC_V850_TDA_7_7_OFFSET
4151 This is a 7 bit offset from the tiny data area pointer.
4153 BFD_RELOC_V850_TDA_16_16_OFFSET
4155 This is a 16 bit offset from the tiny data area pointer.
4158 BFD_RELOC_V850_TDA_4_5_OFFSET
4160 This is a 5 bit offset (of which only 4 bits are used) from the tiny
4163 BFD_RELOC_V850_TDA_4_4_OFFSET
4165 This is a 4 bit offset from the tiny data area pointer.
4167 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
4169 This is a 16 bit offset from the short data area pointer, with the
4170 bits placed non-contiguously in the instruction.
4172 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
4174 This is a 16 bit offset from the zero data area pointer, with the
4175 bits placed non-contiguously in the instruction.
4177 BFD_RELOC_V850_CALLT_6_7_OFFSET
4179 This is a 6 bit offset from the call table base pointer.
4181 BFD_RELOC_V850_CALLT_16_16_OFFSET
4183 This is a 16 bit offset from the call table base pointer.
4185 BFD_RELOC_V850_LONGCALL
4187 Used for relaxing indirect function calls.
4189 BFD_RELOC_V850_LONGJUMP
4191 Used for relaxing indirect jumps.
4193 BFD_RELOC_V850_ALIGN
4195 Used to maintain alignment whilst relaxing.
4197 BFD_RELOC_V850_LO16_SPLIT_OFFSET
4199 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
4202 BFD_RELOC_V850_16_PCREL
4204 This is a 16-bit reloc.
4206 BFD_RELOC_V850_17_PCREL
4208 This is a 17-bit reloc.
4212 This is a 23-bit reloc.
4214 BFD_RELOC_V850_32_PCREL
4216 This is a 32-bit reloc.
4218 BFD_RELOC_V850_32_ABS
4220 This is a 32-bit reloc.
4222 BFD_RELOC_V850_16_SPLIT_OFFSET
4224 This is a 16-bit reloc.
4226 BFD_RELOC_V850_16_S1
4228 This is a 16-bit reloc.
4230 BFD_RELOC_V850_LO16_S1
4232 Low 16 bits. 16 bit shifted by 1.
4234 BFD_RELOC_V850_CALLT_15_16_OFFSET
4236 This is a 16 bit offset from the call table base pointer.
4238 BFD_RELOC_V850_32_GOTPCREL
4242 BFD_RELOC_V850_16_GOT
4246 BFD_RELOC_V850_32_GOT
4250 BFD_RELOC_V850_22_PLT_PCREL
4254 BFD_RELOC_V850_32_PLT_PCREL
4262 BFD_RELOC_V850_GLOB_DAT
4266 BFD_RELOC_V850_JMP_SLOT
4270 BFD_RELOC_V850_RELATIVE
4274 BFD_RELOC_V850_16_GOTOFF
4278 BFD_RELOC_V850_32_GOTOFF
4293 This is a 8bit DP reloc for the tms320c30, where the most
4294 significant 8 bits of a 24 bit word are placed into the least
4295 significant 8 bits of the opcode.
4298 BFD_RELOC_TIC54X_PARTLS7
4300 This is a 7bit reloc for the tms320c54x, where the least
4301 significant 7 bits of a 16 bit word are placed into the least
4302 significant 7 bits of the opcode.
4305 BFD_RELOC_TIC54X_PARTMS9
4307 This is a 9bit DP reloc for the tms320c54x, where the most
4308 significant 9 bits of a 16 bit word are placed into the least
4309 significant 9 bits of the opcode.
4314 This is an extended address 23-bit reloc for the tms320c54x.
4317 BFD_RELOC_TIC54X_16_OF_23
4319 This is a 16-bit reloc for the tms320c54x, where the least
4320 significant 16 bits of a 23-bit extended address are placed into
4324 BFD_RELOC_TIC54X_MS7_OF_23
4326 This is a reloc for the tms320c54x, where the most
4327 significant 7 bits of a 23-bit extended address are placed into
4331 BFD_RELOC_C6000_PCR_S21
4333 BFD_RELOC_C6000_PCR_S12
4335 BFD_RELOC_C6000_PCR_S10
4337 BFD_RELOC_C6000_PCR_S7
4339 BFD_RELOC_C6000_ABS_S16
4341 BFD_RELOC_C6000_ABS_L16
4343 BFD_RELOC_C6000_ABS_H16
4345 BFD_RELOC_C6000_SBR_U15_B
4347 BFD_RELOC_C6000_SBR_U15_H
4349 BFD_RELOC_C6000_SBR_U15_W
4351 BFD_RELOC_C6000_SBR_S16
4353 BFD_RELOC_C6000_SBR_L16_B
4355 BFD_RELOC_C6000_SBR_L16_H
4357 BFD_RELOC_C6000_SBR_L16_W
4359 BFD_RELOC_C6000_SBR_H16_B
4361 BFD_RELOC_C6000_SBR_H16_H
4363 BFD_RELOC_C6000_SBR_H16_W
4365 BFD_RELOC_C6000_SBR_GOT_U15_W
4367 BFD_RELOC_C6000_SBR_GOT_L16_W
4369 BFD_RELOC_C6000_SBR_GOT_H16_W
4371 BFD_RELOC_C6000_DSBT_INDEX
4373 BFD_RELOC_C6000_PREL31
4375 BFD_RELOC_C6000_COPY
4377 BFD_RELOC_C6000_JUMP_SLOT
4379 BFD_RELOC_C6000_EHTYPE
4381 BFD_RELOC_C6000_PCR_H16
4383 BFD_RELOC_C6000_PCR_L16
4385 BFD_RELOC_C6000_ALIGN
4387 BFD_RELOC_C6000_FPHEAD
4389 BFD_RELOC_C6000_NOCMP
4391 TMS320C6000 relocations.
4396 This is a 48 bit reloc for the FR30 that stores 32 bits.
4400 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
4403 BFD_RELOC_FR30_6_IN_4
4405 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
4408 BFD_RELOC_FR30_8_IN_8
4410 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
4413 BFD_RELOC_FR30_9_IN_8
4415 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
4418 BFD_RELOC_FR30_10_IN_8
4420 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
4423 BFD_RELOC_FR30_9_PCREL
4425 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
4426 short offset into 8 bits.
4428 BFD_RELOC_FR30_12_PCREL
4430 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
4431 short offset into 11 bits.
4434 BFD_RELOC_MCORE_PCREL_IMM8BY4
4436 BFD_RELOC_MCORE_PCREL_IMM11BY2
4438 BFD_RELOC_MCORE_PCREL_IMM4BY2
4440 BFD_RELOC_MCORE_PCREL_32
4442 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
4446 Motorola Mcore relocations.
4455 BFD_RELOC_MEP_PCREL8A2
4457 BFD_RELOC_MEP_PCREL12A2
4459 BFD_RELOC_MEP_PCREL17A2
4461 BFD_RELOC_MEP_PCREL24A2
4463 BFD_RELOC_MEP_PCABS24A2
4475 BFD_RELOC_MEP_TPREL7
4477 BFD_RELOC_MEP_TPREL7A2
4479 BFD_RELOC_MEP_TPREL7A4
4481 BFD_RELOC_MEP_UIMM24
4483 BFD_RELOC_MEP_ADDR24A4
4485 BFD_RELOC_MEP_GNU_VTINHERIT
4487 BFD_RELOC_MEP_GNU_VTENTRY
4489 Toshiba Media Processor Relocations.
4493 BFD_RELOC_METAG_HIADDR16
4495 BFD_RELOC_METAG_LOADDR16
4497 BFD_RELOC_METAG_RELBRANCH
4499 BFD_RELOC_METAG_GETSETOFF
4501 BFD_RELOC_METAG_HIOG
4503 BFD_RELOC_METAG_LOOG
4505 BFD_RELOC_METAG_REL8
4507 BFD_RELOC_METAG_REL16
4509 BFD_RELOC_METAG_HI16_GOTOFF
4511 BFD_RELOC_METAG_LO16_GOTOFF
4513 BFD_RELOC_METAG_GETSET_GOTOFF
4515 BFD_RELOC_METAG_GETSET_GOT
4517 BFD_RELOC_METAG_HI16_GOTPC
4519 BFD_RELOC_METAG_LO16_GOTPC
4521 BFD_RELOC_METAG_HI16_PLT
4523 BFD_RELOC_METAG_LO16_PLT
4525 BFD_RELOC_METAG_RELBRANCH_PLT
4527 BFD_RELOC_METAG_GOTOFF
4531 BFD_RELOC_METAG_COPY
4533 BFD_RELOC_METAG_JMP_SLOT
4535 BFD_RELOC_METAG_RELATIVE
4537 BFD_RELOC_METAG_GLOB_DAT
4539 BFD_RELOC_METAG_TLS_GD
4541 BFD_RELOC_METAG_TLS_LDM
4543 BFD_RELOC_METAG_TLS_LDO_HI16
4545 BFD_RELOC_METAG_TLS_LDO_LO16
4547 BFD_RELOC_METAG_TLS_LDO
4549 BFD_RELOC_METAG_TLS_IE
4551 BFD_RELOC_METAG_TLS_IENONPIC
4553 BFD_RELOC_METAG_TLS_IENONPIC_HI16
4555 BFD_RELOC_METAG_TLS_IENONPIC_LO16
4557 BFD_RELOC_METAG_TLS_TPOFF
4559 BFD_RELOC_METAG_TLS_DTPMOD
4561 BFD_RELOC_METAG_TLS_DTPOFF
4563 BFD_RELOC_METAG_TLS_LE
4565 BFD_RELOC_METAG_TLS_LE_HI16
4567 BFD_RELOC_METAG_TLS_LE_LO16
4569 Imagination Technologies Meta relocations.
4574 BFD_RELOC_MMIX_GETA_1
4576 BFD_RELOC_MMIX_GETA_2
4578 BFD_RELOC_MMIX_GETA_3
4580 These are relocations for the GETA instruction.
4582 BFD_RELOC_MMIX_CBRANCH
4584 BFD_RELOC_MMIX_CBRANCH_J
4586 BFD_RELOC_MMIX_CBRANCH_1
4588 BFD_RELOC_MMIX_CBRANCH_2
4590 BFD_RELOC_MMIX_CBRANCH_3
4592 These are relocations for a conditional branch instruction.
4594 BFD_RELOC_MMIX_PUSHJ
4596 BFD_RELOC_MMIX_PUSHJ_1
4598 BFD_RELOC_MMIX_PUSHJ_2
4600 BFD_RELOC_MMIX_PUSHJ_3
4602 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
4604 These are relocations for the PUSHJ instruction.
4608 BFD_RELOC_MMIX_JMP_1
4610 BFD_RELOC_MMIX_JMP_2
4612 BFD_RELOC_MMIX_JMP_3
4614 These are relocations for the JMP instruction.
4616 BFD_RELOC_MMIX_ADDR19
4618 This is a relocation for a relative address as in a GETA instruction or
4621 BFD_RELOC_MMIX_ADDR27
4623 This is a relocation for a relative address as in a JMP instruction.
4625 BFD_RELOC_MMIX_REG_OR_BYTE
4627 This is a relocation for an instruction field that may be a general
4628 register or a value 0..255.
4632 This is a relocation for an instruction field that may be a general
4635 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
4637 This is a relocation for two instruction fields holding a register and
4638 an offset, the equivalent of the relocation.
4640 BFD_RELOC_MMIX_LOCAL
4642 This relocation is an assertion that the expression is not allocated as
4643 a global register. It does not modify contents.
4646 BFD_RELOC_AVR_7_PCREL
4648 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
4649 short offset into 7 bits.
4651 BFD_RELOC_AVR_13_PCREL
4653 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
4654 short offset into 12 bits.
4658 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
4659 program memory address) into 16 bits.
4661 BFD_RELOC_AVR_LO8_LDI
4663 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4664 data memory address) into 8 bit immediate value of LDI insn.
4666 BFD_RELOC_AVR_HI8_LDI
4668 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4669 of data memory address) into 8 bit immediate value of LDI insn.
4671 BFD_RELOC_AVR_HH8_LDI
4673 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4674 of program memory address) into 8 bit immediate value of LDI insn.
4676 BFD_RELOC_AVR_MS8_LDI
4678 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4679 of 32 bit value) into 8 bit immediate value of LDI insn.
4681 BFD_RELOC_AVR_LO8_LDI_NEG
4683 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4684 (usually data memory address) into 8 bit immediate value of SUBI insn.
4686 BFD_RELOC_AVR_HI8_LDI_NEG
4688 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4689 (high 8 bit of data memory address) into 8 bit immediate value of
4692 BFD_RELOC_AVR_HH8_LDI_NEG
4694 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4695 (most high 8 bit of program memory address) into 8 bit immediate value
4696 of LDI or SUBI insn.
4698 BFD_RELOC_AVR_MS8_LDI_NEG
4700 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
4701 of 32 bit value) into 8 bit immediate value of LDI insn.
4703 BFD_RELOC_AVR_LO8_LDI_PM
4705 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4706 command address) into 8 bit immediate value of LDI insn.
4708 BFD_RELOC_AVR_LO8_LDI_GS
4710 This is a 16 bit reloc for the AVR that stores 8 bit value
4711 (command address) into 8 bit immediate value of LDI insn. If the address
4712 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4715 BFD_RELOC_AVR_HI8_LDI_PM
4717 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4718 of command address) into 8 bit immediate value of LDI insn.
4720 BFD_RELOC_AVR_HI8_LDI_GS
4722 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4723 of command address) into 8 bit immediate value of LDI insn. If the address
4724 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4727 BFD_RELOC_AVR_HH8_LDI_PM
4729 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4730 of command address) into 8 bit immediate value of LDI insn.
4732 BFD_RELOC_AVR_LO8_LDI_PM_NEG
4734 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4735 (usually command address) into 8 bit immediate value of SUBI insn.
4737 BFD_RELOC_AVR_HI8_LDI_PM_NEG
4739 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4740 (high 8 bit of 16 bit command address) into 8 bit immediate value
4743 BFD_RELOC_AVR_HH8_LDI_PM_NEG
4745 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4746 (high 6 bit of 22 bit command address) into 8 bit immediate
4751 This is a 32 bit reloc for the AVR that stores 23 bit value
4756 This is a 16 bit reloc for the AVR that stores all needed bits
4757 for absolute addressing with ldi with overflow check to linktime
4761 This is a 6 bit reloc for the AVR that stores offset for ldd/std
4764 BFD_RELOC_AVR_6_ADIW
4766 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
4771 This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
4772 in .byte lo8(symbol)
4776 This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol
4777 in .byte hi8(symbol)
4781 This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
4782 in .byte hlo8(symbol)
4786 BFD_RELOC_AVR_DIFF16
4788 BFD_RELOC_AVR_DIFF32
4790 AVR relocations to mark the difference of two local symbols.
4791 These are only needed to support linker relaxation and can be ignored
4792 when not relaxing. The field is set to the value of the difference
4793 assuming no relaxation. The relocation encodes the position of the
4794 second symbol so the linker can determine whether to adjust the field
4799 BFD_RELOC_RL78_NEG16
4801 BFD_RELOC_RL78_NEG24
4803 BFD_RELOC_RL78_NEG32
4805 BFD_RELOC_RL78_16_OP
4807 BFD_RELOC_RL78_24_OP
4809 BFD_RELOC_RL78_32_OP
4817 BFD_RELOC_RL78_DIR3U_PCREL
4821 BFD_RELOC_RL78_GPRELB
4823 BFD_RELOC_RL78_GPRELW
4825 BFD_RELOC_RL78_GPRELL
4829 BFD_RELOC_RL78_OP_SUBTRACT
4831 BFD_RELOC_RL78_OP_NEG
4833 BFD_RELOC_RL78_OP_AND
4835 BFD_RELOC_RL78_OP_SHRA
4839 BFD_RELOC_RL78_ABS16
4841 BFD_RELOC_RL78_ABS16_REV
4843 BFD_RELOC_RL78_ABS32
4845 BFD_RELOC_RL78_ABS32_REV
4847 BFD_RELOC_RL78_ABS16U
4849 BFD_RELOC_RL78_ABS16UW
4851 BFD_RELOC_RL78_ABS16UL
4853 BFD_RELOC_RL78_RELAX
4863 Renesas RL78 Relocations.
4886 BFD_RELOC_RX_DIR3U_PCREL
4898 BFD_RELOC_RX_OP_SUBTRACT
4906 BFD_RELOC_RX_ABS16_REV
4910 BFD_RELOC_RX_ABS32_REV
4914 BFD_RELOC_RX_ABS16UW
4916 BFD_RELOC_RX_ABS16UL
4920 Renesas RX Relocations.
4933 32 bit PC relative PLT address.
4937 Copy symbol at runtime.
4939 BFD_RELOC_390_GLOB_DAT
4943 BFD_RELOC_390_JMP_SLOT
4947 BFD_RELOC_390_RELATIVE
4949 Adjust by program base.
4953 32 bit PC relative offset to GOT.
4959 BFD_RELOC_390_PC12DBL
4961 PC relative 12 bit shifted by 1.
4963 BFD_RELOC_390_PLT12DBL
4965 12 bit PC rel. PLT shifted by 1.
4967 BFD_RELOC_390_PC16DBL
4969 PC relative 16 bit shifted by 1.
4971 BFD_RELOC_390_PLT16DBL
4973 16 bit PC rel. PLT shifted by 1.
4975 BFD_RELOC_390_PC24DBL
4977 PC relative 24 bit shifted by 1.
4979 BFD_RELOC_390_PLT24DBL
4981 24 bit PC rel. PLT shifted by 1.
4983 BFD_RELOC_390_PC32DBL
4985 PC relative 32 bit shifted by 1.
4987 BFD_RELOC_390_PLT32DBL
4989 32 bit PC rel. PLT shifted by 1.
4991 BFD_RELOC_390_GOTPCDBL
4993 32 bit PC rel. GOT shifted by 1.
5001 64 bit PC relative PLT address.
5003 BFD_RELOC_390_GOTENT
5005 32 bit rel. offset to GOT entry.
5007 BFD_RELOC_390_GOTOFF64
5009 64 bit offset to GOT.
5011 BFD_RELOC_390_GOTPLT12
5013 12-bit offset to symbol-entry within GOT, with PLT handling.
5015 BFD_RELOC_390_GOTPLT16
5017 16-bit offset to symbol-entry within GOT, with PLT handling.
5019 BFD_RELOC_390_GOTPLT32
5021 32-bit offset to symbol-entry within GOT, with PLT handling.
5023 BFD_RELOC_390_GOTPLT64
5025 64-bit offset to symbol-entry within GOT, with PLT handling.
5027 BFD_RELOC_390_GOTPLTENT
5029 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
5031 BFD_RELOC_390_PLTOFF16
5033 16-bit rel. offset from the GOT to a PLT entry.
5035 BFD_RELOC_390_PLTOFF32
5037 32-bit rel. offset from the GOT to a PLT entry.
5039 BFD_RELOC_390_PLTOFF64
5041 64-bit rel. offset from the GOT to a PLT entry.
5044 BFD_RELOC_390_TLS_LOAD
5046 BFD_RELOC_390_TLS_GDCALL
5048 BFD_RELOC_390_TLS_LDCALL
5050 BFD_RELOC_390_TLS_GD32
5052 BFD_RELOC_390_TLS_GD64
5054 BFD_RELOC_390_TLS_GOTIE12
5056 BFD_RELOC_390_TLS_GOTIE32
5058 BFD_RELOC_390_TLS_GOTIE64
5060 BFD_RELOC_390_TLS_LDM32
5062 BFD_RELOC_390_TLS_LDM64
5064 BFD_RELOC_390_TLS_IE32
5066 BFD_RELOC_390_TLS_IE64
5068 BFD_RELOC_390_TLS_IEENT
5070 BFD_RELOC_390_TLS_LE32
5072 BFD_RELOC_390_TLS_LE64
5074 BFD_RELOC_390_TLS_LDO32
5076 BFD_RELOC_390_TLS_LDO64
5078 BFD_RELOC_390_TLS_DTPMOD
5080 BFD_RELOC_390_TLS_DTPOFF
5082 BFD_RELOC_390_TLS_TPOFF
5084 s390 tls relocations.
5091 BFD_RELOC_390_GOTPLT20
5093 BFD_RELOC_390_TLS_GOTIE20
5095 Long displacement extension.
5098 BFD_RELOC_390_IRELATIVE
5100 STT_GNU_IFUNC relocation.
5103 BFD_RELOC_SCORE_GPREL15
5106 Low 16 bit for load/store
5108 BFD_RELOC_SCORE_DUMMY2
5112 This is a 24-bit reloc with the right 1 bit assumed to be 0
5114 BFD_RELOC_SCORE_BRANCH
5116 This is a 19-bit reloc with the right 1 bit assumed to be 0
5118 BFD_RELOC_SCORE_IMM30
5120 This is a 32-bit reloc for 48-bit instructions.
5122 BFD_RELOC_SCORE_IMM32
5124 This is a 32-bit reloc for 48-bit instructions.
5126 BFD_RELOC_SCORE16_JMP
5128 This is a 11-bit reloc with the right 1 bit assumed to be 0
5130 BFD_RELOC_SCORE16_BRANCH
5132 This is a 8-bit reloc with the right 1 bit assumed to be 0
5134 BFD_RELOC_SCORE_BCMP
5136 This is a 9-bit reloc with the right 1 bit assumed to be 0
5138 BFD_RELOC_SCORE_GOT15
5140 BFD_RELOC_SCORE_GOT_LO16
5142 BFD_RELOC_SCORE_CALL15
5144 BFD_RELOC_SCORE_DUMMY_HI16
5146 Undocumented Score relocs
5151 Scenix IP2K - 9-bit register number / data address
5155 Scenix IP2K - 4-bit register/data bank number
5157 BFD_RELOC_IP2K_ADDR16CJP
5159 Scenix IP2K - low 13 bits of instruction word address
5161 BFD_RELOC_IP2K_PAGE3
5163 Scenix IP2K - high 3 bits of instruction word address
5165 BFD_RELOC_IP2K_LO8DATA
5167 BFD_RELOC_IP2K_HI8DATA
5169 BFD_RELOC_IP2K_EX8DATA
5171 Scenix IP2K - ext/low/high 8 bits of data address
5173 BFD_RELOC_IP2K_LO8INSN
5175 BFD_RELOC_IP2K_HI8INSN
5177 Scenix IP2K - low/high 8 bits of instruction word address
5179 BFD_RELOC_IP2K_PC_SKIP
5181 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
5185 Scenix IP2K - 16 bit word address in text section.
5187 BFD_RELOC_IP2K_FR_OFFSET
5189 Scenix IP2K - 7-bit sp or dp offset
5191 BFD_RELOC_VPE4KMATH_DATA
5193 BFD_RELOC_VPE4KMATH_INSN
5195 Scenix VPE4K coprocessor - data/insn-space addressing
5198 BFD_RELOC_VTABLE_INHERIT
5200 BFD_RELOC_VTABLE_ENTRY
5202 These two relocations are used by the linker to determine which of
5203 the entries in a C++ virtual function table are actually used. When
5204 the --gc-sections option is given, the linker will zero out the entries
5205 that are not used, so that the code for those functions need not be
5206 included in the output.
5208 VTABLE_INHERIT is a zero-space relocation used to describe to the
5209 linker the inheritance tree of a C++ virtual function table. The
5210 relocation's symbol should be the parent class' vtable, and the
5211 relocation should be located at the child vtable.
5213 VTABLE_ENTRY is a zero-space relocation that describes the use of a
5214 virtual function table entry. The reloc's symbol should refer to the
5215 table of the class mentioned in the code. Off of that base, an offset
5216 describes the entry that is being used. For Rela hosts, this offset
5217 is stored in the reloc's addend. For Rel hosts, we are forced to put
5218 this offset in the reloc's section offset.
5221 BFD_RELOC_IA64_IMM14
5223 BFD_RELOC_IA64_IMM22
5225 BFD_RELOC_IA64_IMM64
5227 BFD_RELOC_IA64_DIR32MSB
5229 BFD_RELOC_IA64_DIR32LSB
5231 BFD_RELOC_IA64_DIR64MSB
5233 BFD_RELOC_IA64_DIR64LSB
5235 BFD_RELOC_IA64_GPREL22
5237 BFD_RELOC_IA64_GPREL64I
5239 BFD_RELOC_IA64_GPREL32MSB
5241 BFD_RELOC_IA64_GPREL32LSB
5243 BFD_RELOC_IA64_GPREL64MSB
5245 BFD_RELOC_IA64_GPREL64LSB
5247 BFD_RELOC_IA64_LTOFF22
5249 BFD_RELOC_IA64_LTOFF64I
5251 BFD_RELOC_IA64_PLTOFF22
5253 BFD_RELOC_IA64_PLTOFF64I
5255 BFD_RELOC_IA64_PLTOFF64MSB
5257 BFD_RELOC_IA64_PLTOFF64LSB
5259 BFD_RELOC_IA64_FPTR64I
5261 BFD_RELOC_IA64_FPTR32MSB
5263 BFD_RELOC_IA64_FPTR32LSB
5265 BFD_RELOC_IA64_FPTR64MSB
5267 BFD_RELOC_IA64_FPTR64LSB
5269 BFD_RELOC_IA64_PCREL21B
5271 BFD_RELOC_IA64_PCREL21BI
5273 BFD_RELOC_IA64_PCREL21M
5275 BFD_RELOC_IA64_PCREL21F
5277 BFD_RELOC_IA64_PCREL22
5279 BFD_RELOC_IA64_PCREL60B
5281 BFD_RELOC_IA64_PCREL64I
5283 BFD_RELOC_IA64_PCREL32MSB
5285 BFD_RELOC_IA64_PCREL32LSB
5287 BFD_RELOC_IA64_PCREL64MSB
5289 BFD_RELOC_IA64_PCREL64LSB
5291 BFD_RELOC_IA64_LTOFF_FPTR22
5293 BFD_RELOC_IA64_LTOFF_FPTR64I
5295 BFD_RELOC_IA64_LTOFF_FPTR32MSB
5297 BFD_RELOC_IA64_LTOFF_FPTR32LSB
5299 BFD_RELOC_IA64_LTOFF_FPTR64MSB
5301 BFD_RELOC_IA64_LTOFF_FPTR64LSB
5303 BFD_RELOC_IA64_SEGREL32MSB
5305 BFD_RELOC_IA64_SEGREL32LSB
5307 BFD_RELOC_IA64_SEGREL64MSB
5309 BFD_RELOC_IA64_SEGREL64LSB
5311 BFD_RELOC_IA64_SECREL32MSB
5313 BFD_RELOC_IA64_SECREL32LSB
5315 BFD_RELOC_IA64_SECREL64MSB
5317 BFD_RELOC_IA64_SECREL64LSB
5319 BFD_RELOC_IA64_REL32MSB
5321 BFD_RELOC_IA64_REL32LSB
5323 BFD_RELOC_IA64_REL64MSB
5325 BFD_RELOC_IA64_REL64LSB
5327 BFD_RELOC_IA64_LTV32MSB
5329 BFD_RELOC_IA64_LTV32LSB
5331 BFD_RELOC_IA64_LTV64MSB
5333 BFD_RELOC_IA64_LTV64LSB
5335 BFD_RELOC_IA64_IPLTMSB
5337 BFD_RELOC_IA64_IPLTLSB
5341 BFD_RELOC_IA64_LTOFF22X
5343 BFD_RELOC_IA64_LDXMOV
5345 BFD_RELOC_IA64_TPREL14
5347 BFD_RELOC_IA64_TPREL22
5349 BFD_RELOC_IA64_TPREL64I
5351 BFD_RELOC_IA64_TPREL64MSB
5353 BFD_RELOC_IA64_TPREL64LSB
5355 BFD_RELOC_IA64_LTOFF_TPREL22
5357 BFD_RELOC_IA64_DTPMOD64MSB
5359 BFD_RELOC_IA64_DTPMOD64LSB
5361 BFD_RELOC_IA64_LTOFF_DTPMOD22
5363 BFD_RELOC_IA64_DTPREL14
5365 BFD_RELOC_IA64_DTPREL22
5367 BFD_RELOC_IA64_DTPREL64I
5369 BFD_RELOC_IA64_DTPREL32MSB
5371 BFD_RELOC_IA64_DTPREL32LSB
5373 BFD_RELOC_IA64_DTPREL64MSB
5375 BFD_RELOC_IA64_DTPREL64LSB
5377 BFD_RELOC_IA64_LTOFF_DTPREL22
5379 Intel IA64 Relocations.
5382 BFD_RELOC_M68HC11_HI8
5384 Motorola 68HC11 reloc.
5385 This is the 8 bit high part of an absolute address.
5387 BFD_RELOC_M68HC11_LO8
5389 Motorola 68HC11 reloc.
5390 This is the 8 bit low part of an absolute address.
5392 BFD_RELOC_M68HC11_3B
5394 Motorola 68HC11 reloc.
5395 This is the 3 bit of a value.
5397 BFD_RELOC_M68HC11_RL_JUMP
5399 Motorola 68HC11 reloc.
5400 This reloc marks the beginning of a jump/call instruction.
5401 It is used for linker relaxation to correctly identify beginning
5402 of instruction and change some branches to use PC-relative
5405 BFD_RELOC_M68HC11_RL_GROUP
5407 Motorola 68HC11 reloc.
5408 This reloc marks a group of several instructions that gcc generates
5409 and for which the linker relaxation pass can modify and/or remove
5412 BFD_RELOC_M68HC11_LO16
5414 Motorola 68HC11 reloc.
5415 This is the 16-bit lower part of an address. It is used for 'call'
5416 instruction to specify the symbol address without any special
5417 transformation (due to memory bank window).
5419 BFD_RELOC_M68HC11_PAGE
5421 Motorola 68HC11 reloc.
5422 This is a 8-bit reloc that specifies the page number of an address.
5423 It is used by 'call' instruction to specify the page number of
5426 BFD_RELOC_M68HC11_24
5428 Motorola 68HC11 reloc.
5429 This is a 24-bit reloc that represents the address with a 16-bit
5430 value and a 8-bit page number. The symbol address is transformed
5431 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
5433 BFD_RELOC_M68HC12_5B
5435 Motorola 68HC12 reloc.
5436 This is the 5 bits of a value.
5438 BFD_RELOC_XGATE_RL_JUMP
5440 Freescale XGATE reloc.
5441 This reloc marks the beginning of a bra/jal instruction.
5443 BFD_RELOC_XGATE_RL_GROUP
5445 Freescale XGATE reloc.
5446 This reloc marks a group of several instructions that gcc generates
5447 and for which the linker relaxation pass can modify and/or remove
5450 BFD_RELOC_XGATE_LO16
5452 Freescale XGATE reloc.
5453 This is the 16-bit lower part of an address. It is used for the '16-bit'
5456 BFD_RELOC_XGATE_GPAGE
5458 Freescale XGATE reloc.
5462 Freescale XGATE reloc.
5464 BFD_RELOC_XGATE_PCREL_9
5466 Freescale XGATE reloc.
5467 This is a 9-bit pc-relative reloc.
5469 BFD_RELOC_XGATE_PCREL_10
5471 Freescale XGATE reloc.
5472 This is a 10-bit pc-relative reloc.
5474 BFD_RELOC_XGATE_IMM8_LO
5476 Freescale XGATE reloc.
5477 This is the 16-bit lower part of an address. It is used for the '16-bit'
5480 BFD_RELOC_XGATE_IMM8_HI
5482 Freescale XGATE reloc.
5483 This is the 16-bit higher part of an address. It is used for the '16-bit'
5486 BFD_RELOC_XGATE_IMM3
5488 Freescale XGATE reloc.
5489 This is a 3-bit pc-relative reloc.
5491 BFD_RELOC_XGATE_IMM4
5493 Freescale XGATE reloc.
5494 This is a 4-bit pc-relative reloc.
5496 BFD_RELOC_XGATE_IMM5
5498 Freescale XGATE reloc.
5499 This is a 5-bit pc-relative reloc.
5501 BFD_RELOC_M68HC12_9B
5503 Motorola 68HC12 reloc.
5504 This is the 9 bits of a value.
5506 BFD_RELOC_M68HC12_16B
5508 Motorola 68HC12 reloc.
5509 This is the 16 bits of a value.
5511 BFD_RELOC_M68HC12_9_PCREL
5513 Motorola 68HC12/XGATE reloc.
5514 This is a PCREL9 branch.
5516 BFD_RELOC_M68HC12_10_PCREL
5518 Motorola 68HC12/XGATE reloc.
5519 This is a PCREL10 branch.
5521 BFD_RELOC_M68HC12_LO8XG
5523 Motorola 68HC12/XGATE reloc.
5524 This is the 8 bit low part of an absolute address and immediately precedes
5525 a matching HI8XG part.
5527 BFD_RELOC_M68HC12_HI8XG
5529 Motorola 68HC12/XGATE reloc.
5530 This is the 8 bit high part of an absolute address and immediately follows
5531 a matching LO8XG part.
5535 BFD_RELOC_16C_NUM08_C
5539 BFD_RELOC_16C_NUM16_C
5543 BFD_RELOC_16C_NUM32_C
5545 BFD_RELOC_16C_DISP04
5547 BFD_RELOC_16C_DISP04_C
5549 BFD_RELOC_16C_DISP08
5551 BFD_RELOC_16C_DISP08_C
5553 BFD_RELOC_16C_DISP16
5555 BFD_RELOC_16C_DISP16_C
5557 BFD_RELOC_16C_DISP24
5559 BFD_RELOC_16C_DISP24_C
5561 BFD_RELOC_16C_DISP24a
5563 BFD_RELOC_16C_DISP24a_C
5567 BFD_RELOC_16C_REG04_C
5569 BFD_RELOC_16C_REG04a
5571 BFD_RELOC_16C_REG04a_C
5575 BFD_RELOC_16C_REG14_C
5579 BFD_RELOC_16C_REG16_C
5583 BFD_RELOC_16C_REG20_C
5587 BFD_RELOC_16C_ABS20_C
5591 BFD_RELOC_16C_ABS24_C
5595 BFD_RELOC_16C_IMM04_C
5599 BFD_RELOC_16C_IMM16_C
5603 BFD_RELOC_16C_IMM20_C
5607 BFD_RELOC_16C_IMM24_C
5611 BFD_RELOC_16C_IMM32_C
5613 NS CR16C Relocations.
5618 BFD_RELOC_CR16_NUM16
5620 BFD_RELOC_CR16_NUM32
5622 BFD_RELOC_CR16_NUM32a
5624 BFD_RELOC_CR16_REGREL0
5626 BFD_RELOC_CR16_REGREL4
5628 BFD_RELOC_CR16_REGREL4a
5630 BFD_RELOC_CR16_REGREL14
5632 BFD_RELOC_CR16_REGREL14a
5634 BFD_RELOC_CR16_REGREL16
5636 BFD_RELOC_CR16_REGREL20
5638 BFD_RELOC_CR16_REGREL20a
5640 BFD_RELOC_CR16_ABS20
5642 BFD_RELOC_CR16_ABS24
5648 BFD_RELOC_CR16_IMM16
5650 BFD_RELOC_CR16_IMM20
5652 BFD_RELOC_CR16_IMM24
5654 BFD_RELOC_CR16_IMM32
5656 BFD_RELOC_CR16_IMM32a
5658 BFD_RELOC_CR16_DISP4
5660 BFD_RELOC_CR16_DISP8
5662 BFD_RELOC_CR16_DISP16
5664 BFD_RELOC_CR16_DISP20
5666 BFD_RELOC_CR16_DISP24
5668 BFD_RELOC_CR16_DISP24a
5670 BFD_RELOC_CR16_SWITCH8
5672 BFD_RELOC_CR16_SWITCH16
5674 BFD_RELOC_CR16_SWITCH32
5676 BFD_RELOC_CR16_GOT_REGREL20
5678 BFD_RELOC_CR16_GOTC_REGREL20
5680 BFD_RELOC_CR16_GLOB_DAT
5682 NS CR16 Relocations.
5689 BFD_RELOC_CRX_REL8_CMP
5697 BFD_RELOC_CRX_REGREL12
5699 BFD_RELOC_CRX_REGREL22
5701 BFD_RELOC_CRX_REGREL28
5703 BFD_RELOC_CRX_REGREL32
5719 BFD_RELOC_CRX_SWITCH8
5721 BFD_RELOC_CRX_SWITCH16
5723 BFD_RELOC_CRX_SWITCH32
5728 BFD_RELOC_CRIS_BDISP8
5730 BFD_RELOC_CRIS_UNSIGNED_5
5732 BFD_RELOC_CRIS_SIGNED_6
5734 BFD_RELOC_CRIS_UNSIGNED_6
5736 BFD_RELOC_CRIS_SIGNED_8
5738 BFD_RELOC_CRIS_UNSIGNED_8
5740 BFD_RELOC_CRIS_SIGNED_16
5742 BFD_RELOC_CRIS_UNSIGNED_16
5744 BFD_RELOC_CRIS_LAPCQ_OFFSET
5746 BFD_RELOC_CRIS_UNSIGNED_4
5748 These relocs are only used within the CRIS assembler. They are not
5749 (at present) written to any object files.
5753 BFD_RELOC_CRIS_GLOB_DAT
5755 BFD_RELOC_CRIS_JUMP_SLOT
5757 BFD_RELOC_CRIS_RELATIVE
5759 Relocs used in ELF shared libraries for CRIS.
5761 BFD_RELOC_CRIS_32_GOT
5763 32-bit offset to symbol-entry within GOT.
5765 BFD_RELOC_CRIS_16_GOT
5767 16-bit offset to symbol-entry within GOT.
5769 BFD_RELOC_CRIS_32_GOTPLT
5771 32-bit offset to symbol-entry within GOT, with PLT handling.
5773 BFD_RELOC_CRIS_16_GOTPLT
5775 16-bit offset to symbol-entry within GOT, with PLT handling.
5777 BFD_RELOC_CRIS_32_GOTREL
5779 32-bit offset to symbol, relative to GOT.
5781 BFD_RELOC_CRIS_32_PLT_GOTREL
5783 32-bit offset to symbol with PLT entry, relative to GOT.
5785 BFD_RELOC_CRIS_32_PLT_PCREL
5787 32-bit offset to symbol with PLT entry, relative to this relocation.
5790 BFD_RELOC_CRIS_32_GOT_GD
5792 BFD_RELOC_CRIS_16_GOT_GD
5794 BFD_RELOC_CRIS_32_GD
5798 BFD_RELOC_CRIS_32_DTPREL
5800 BFD_RELOC_CRIS_16_DTPREL
5802 BFD_RELOC_CRIS_32_GOT_TPREL
5804 BFD_RELOC_CRIS_16_GOT_TPREL
5806 BFD_RELOC_CRIS_32_TPREL
5808 BFD_RELOC_CRIS_16_TPREL
5810 BFD_RELOC_CRIS_DTPMOD
5812 BFD_RELOC_CRIS_32_IE
5814 Relocs used in TLS code for CRIS.
5819 BFD_RELOC_860_GLOB_DAT
5821 BFD_RELOC_860_JUMP_SLOT
5823 BFD_RELOC_860_RELATIVE
5833 BFD_RELOC_860_SPLIT0
5837 BFD_RELOC_860_SPLIT1
5841 BFD_RELOC_860_SPLIT2
5845 BFD_RELOC_860_LOGOT0
5847 BFD_RELOC_860_SPGOT0
5849 BFD_RELOC_860_LOGOT1
5851 BFD_RELOC_860_SPGOT1
5853 BFD_RELOC_860_LOGOTOFF0
5855 BFD_RELOC_860_SPGOTOFF0
5857 BFD_RELOC_860_LOGOTOFF1
5859 BFD_RELOC_860_SPGOTOFF1
5861 BFD_RELOC_860_LOGOTOFF2
5863 BFD_RELOC_860_LOGOTOFF3
5867 BFD_RELOC_860_HIGHADJ
5871 BFD_RELOC_860_HAGOTOFF
5879 BFD_RELOC_860_HIGOTOFF
5881 Intel i860 Relocations.
5884 BFD_RELOC_OPENRISC_ABS_26
5886 BFD_RELOC_OPENRISC_REL_26
5888 OpenRISC Relocations.
5891 BFD_RELOC_H8_DIR16A8
5893 BFD_RELOC_H8_DIR16R8
5895 BFD_RELOC_H8_DIR24A8
5897 BFD_RELOC_H8_DIR24R8
5899 BFD_RELOC_H8_DIR32A16
5901 BFD_RELOC_H8_DISP32A16
5906 BFD_RELOC_XSTORMY16_REL_12
5908 BFD_RELOC_XSTORMY16_12
5910 BFD_RELOC_XSTORMY16_24
5912 BFD_RELOC_XSTORMY16_FPTR16
5914 Sony Xstormy16 Relocations.
5919 Self-describing complex relocations.
5931 Infineon Relocations.
5934 BFD_RELOC_VAX_GLOB_DAT
5936 BFD_RELOC_VAX_JMP_SLOT
5938 BFD_RELOC_VAX_RELATIVE
5940 Relocations used by VAX ELF.
5945 Morpho MT - 16 bit immediate relocation.
5949 Morpho MT - Hi 16 bits of an address.
5953 Morpho MT - Low 16 bits of an address.
5955 BFD_RELOC_MT_GNU_VTINHERIT
5957 Morpho MT - Used to tell the linker which vtable entries are used.
5959 BFD_RELOC_MT_GNU_VTENTRY
5961 Morpho MT - Used to tell the linker which vtable entries are used.
5963 BFD_RELOC_MT_PCINSN8
5965 Morpho MT - 8 bit immediate relocation.
5968 BFD_RELOC_MSP430_10_PCREL
5970 BFD_RELOC_MSP430_16_PCREL
5974 BFD_RELOC_MSP430_16_PCREL_BYTE
5976 BFD_RELOC_MSP430_16_BYTE
5978 BFD_RELOC_MSP430_2X_PCREL
5980 BFD_RELOC_MSP430_RL_PCREL
5982 BFD_RELOC_MSP430_ABS8
5984 BFD_RELOC_MSP430X_PCR20_EXT_SRC
5986 BFD_RELOC_MSP430X_PCR20_EXT_DST
5988 BFD_RELOC_MSP430X_PCR20_EXT_ODST
5990 BFD_RELOC_MSP430X_ABS20_EXT_SRC
5992 BFD_RELOC_MSP430X_ABS20_EXT_DST
5994 BFD_RELOC_MSP430X_ABS20_EXT_ODST
5996 BFD_RELOC_MSP430X_ABS20_ADR_SRC
5998 BFD_RELOC_MSP430X_ABS20_ADR_DST
6000 BFD_RELOC_MSP430X_PCR16
6002 BFD_RELOC_MSP430X_PCR20_CALL
6004 BFD_RELOC_MSP430X_ABS16
6006 BFD_RELOC_MSP430_ABS_HI16
6008 BFD_RELOC_MSP430_PREL31
6010 BFD_RELOC_MSP430_SYM_DIFF
6012 msp430 specific relocation codes
6019 BFD_RELOC_NIOS2_CALL26
6021 BFD_RELOC_NIOS2_IMM5
6023 BFD_RELOC_NIOS2_CACHE_OPX
6025 BFD_RELOC_NIOS2_IMM6
6027 BFD_RELOC_NIOS2_IMM8
6029 BFD_RELOC_NIOS2_HI16
6031 BFD_RELOC_NIOS2_LO16
6033 BFD_RELOC_NIOS2_HIADJ16
6035 BFD_RELOC_NIOS2_GPREL
6037 BFD_RELOC_NIOS2_UJMP
6039 BFD_RELOC_NIOS2_CJMP
6041 BFD_RELOC_NIOS2_CALLR
6043 BFD_RELOC_NIOS2_ALIGN
6045 BFD_RELOC_NIOS2_GOT16
6047 BFD_RELOC_NIOS2_CALL16
6049 BFD_RELOC_NIOS2_GOTOFF_LO
6051 BFD_RELOC_NIOS2_GOTOFF_HA
6053 BFD_RELOC_NIOS2_PCREL_LO
6055 BFD_RELOC_NIOS2_PCREL_HA
6057 BFD_RELOC_NIOS2_TLS_GD16
6059 BFD_RELOC_NIOS2_TLS_LDM16
6061 BFD_RELOC_NIOS2_TLS_LDO16
6063 BFD_RELOC_NIOS2_TLS_IE16
6065 BFD_RELOC_NIOS2_TLS_LE16
6067 BFD_RELOC_NIOS2_TLS_DTPMOD
6069 BFD_RELOC_NIOS2_TLS_DTPREL
6071 BFD_RELOC_NIOS2_TLS_TPREL
6073 BFD_RELOC_NIOS2_COPY
6075 BFD_RELOC_NIOS2_GLOB_DAT
6077 BFD_RELOC_NIOS2_JUMP_SLOT
6079 BFD_RELOC_NIOS2_RELATIVE
6081 BFD_RELOC_NIOS2_GOTOFF
6083 BFD_RELOC_NIOS2_CALL26_NOAT
6085 BFD_RELOC_NIOS2_GOT_LO
6087 BFD_RELOC_NIOS2_GOT_HA
6089 BFD_RELOC_NIOS2_CALL_LO
6091 BFD_RELOC_NIOS2_CALL_HA
6093 Relocations used by the Altera Nios II core.
6096 BFD_RELOC_IQ2000_OFFSET_16
6098 BFD_RELOC_IQ2000_OFFSET_21
6100 BFD_RELOC_IQ2000_UHI16
6105 BFD_RELOC_XTENSA_RTLD
6107 Special Xtensa relocation used only by PLT entries in ELF shared
6108 objects to indicate that the runtime linker should set the value
6109 to one of its own internal functions or data structures.
6111 BFD_RELOC_XTENSA_GLOB_DAT
6113 BFD_RELOC_XTENSA_JMP_SLOT
6115 BFD_RELOC_XTENSA_RELATIVE
6117 Xtensa relocations for ELF shared objects.
6119 BFD_RELOC_XTENSA_PLT
6121 Xtensa relocation used in ELF object files for symbols that may require
6122 PLT entries. Otherwise, this is just a generic 32-bit relocation.
6124 BFD_RELOC_XTENSA_DIFF8
6126 BFD_RELOC_XTENSA_DIFF16
6128 BFD_RELOC_XTENSA_DIFF32
6130 Xtensa relocations to mark the difference of two local symbols.
6131 These are only needed to support linker relaxation and can be ignored
6132 when not relaxing. The field is set to the value of the difference
6133 assuming no relaxation. The relocation encodes the position of the
6134 first symbol so the linker can determine whether to adjust the field
6137 BFD_RELOC_XTENSA_SLOT0_OP
6139 BFD_RELOC_XTENSA_SLOT1_OP
6141 BFD_RELOC_XTENSA_SLOT2_OP
6143 BFD_RELOC_XTENSA_SLOT3_OP
6145 BFD_RELOC_XTENSA_SLOT4_OP
6147 BFD_RELOC_XTENSA_SLOT5_OP
6149 BFD_RELOC_XTENSA_SLOT6_OP
6151 BFD_RELOC_XTENSA_SLOT7_OP
6153 BFD_RELOC_XTENSA_SLOT8_OP
6155 BFD_RELOC_XTENSA_SLOT9_OP
6157 BFD_RELOC_XTENSA_SLOT10_OP
6159 BFD_RELOC_XTENSA_SLOT11_OP
6161 BFD_RELOC_XTENSA_SLOT12_OP
6163 BFD_RELOC_XTENSA_SLOT13_OP
6165 BFD_RELOC_XTENSA_SLOT14_OP
6167 Generic Xtensa relocations for instruction operands. Only the slot
6168 number is encoded in the relocation. The relocation applies to the
6169 last PC-relative immediate operand, or if there are no PC-relative
6170 immediates, to the last immediate operand.
6172 BFD_RELOC_XTENSA_SLOT0_ALT
6174 BFD_RELOC_XTENSA_SLOT1_ALT
6176 BFD_RELOC_XTENSA_SLOT2_ALT
6178 BFD_RELOC_XTENSA_SLOT3_ALT
6180 BFD_RELOC_XTENSA_SLOT4_ALT
6182 BFD_RELOC_XTENSA_SLOT5_ALT
6184 BFD_RELOC_XTENSA_SLOT6_ALT
6186 BFD_RELOC_XTENSA_SLOT7_ALT
6188 BFD_RELOC_XTENSA_SLOT8_ALT
6190 BFD_RELOC_XTENSA_SLOT9_ALT
6192 BFD_RELOC_XTENSA_SLOT10_ALT
6194 BFD_RELOC_XTENSA_SLOT11_ALT
6196 BFD_RELOC_XTENSA_SLOT12_ALT
6198 BFD_RELOC_XTENSA_SLOT13_ALT
6200 BFD_RELOC_XTENSA_SLOT14_ALT
6202 Alternate Xtensa relocations. Only the slot is encoded in the
6203 relocation. The meaning of these relocations is opcode-specific.
6205 BFD_RELOC_XTENSA_OP0
6207 BFD_RELOC_XTENSA_OP1
6209 BFD_RELOC_XTENSA_OP2
6211 Xtensa relocations for backward compatibility. These have all been
6212 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
6214 BFD_RELOC_XTENSA_ASM_EXPAND
6216 Xtensa relocation to mark that the assembler expanded the
6217 instructions from an original target. The expansion size is
6218 encoded in the reloc size.
6220 BFD_RELOC_XTENSA_ASM_SIMPLIFY
6222 Xtensa relocation to mark that the linker should simplify
6223 assembler-expanded instructions. This is commonly used
6224 internally by the linker after analysis of a
6225 BFD_RELOC_XTENSA_ASM_EXPAND.
6227 BFD_RELOC_XTENSA_TLSDESC_FN
6229 BFD_RELOC_XTENSA_TLSDESC_ARG
6231 BFD_RELOC_XTENSA_TLS_DTPOFF
6233 BFD_RELOC_XTENSA_TLS_TPOFF
6235 BFD_RELOC_XTENSA_TLS_FUNC
6237 BFD_RELOC_XTENSA_TLS_ARG
6239 BFD_RELOC_XTENSA_TLS_CALL
6241 Xtensa TLS relocations.
6246 8 bit signed offset in (ix+d) or (iy+d).
6264 BFD_RELOC_LM32_BRANCH
6266 BFD_RELOC_LM32_16_GOT
6268 BFD_RELOC_LM32_GOTOFF_HI16
6270 BFD_RELOC_LM32_GOTOFF_LO16
6274 BFD_RELOC_LM32_GLOB_DAT
6276 BFD_RELOC_LM32_JMP_SLOT
6278 BFD_RELOC_LM32_RELATIVE
6280 Lattice Mico32 relocations.
6283 BFD_RELOC_MACH_O_SECTDIFF
6285 Difference between two section addreses. Must be followed by a
6286 BFD_RELOC_MACH_O_PAIR.
6288 BFD_RELOC_MACH_O_LOCAL_SECTDIFF
6290 Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol.
6292 BFD_RELOC_MACH_O_PAIR
6294 Pair of relocation. Contains the first symbol.
6297 BFD_RELOC_MACH_O_X86_64_BRANCH32
6299 BFD_RELOC_MACH_O_X86_64_BRANCH8
6301 PCREL relocations. They are marked as branch to create PLT entry if
6304 BFD_RELOC_MACH_O_X86_64_GOT
6306 Used when referencing a GOT entry.
6308 BFD_RELOC_MACH_O_X86_64_GOT_LOAD
6310 Used when loading a GOT entry with movq. It is specially marked so that
6311 the linker could optimize the movq to a leaq if possible.
6313 BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32
6315 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
6317 BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64
6319 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
6321 BFD_RELOC_MACH_O_X86_64_PCREL32_1
6323 Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
6325 BFD_RELOC_MACH_O_X86_64_PCREL32_2
6327 Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
6329 BFD_RELOC_MACH_O_X86_64_PCREL32_4
6331 Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
6334 BFD_RELOC_MICROBLAZE_32_LO
6336 This is a 32 bit reloc for the microblaze that stores the
6337 low 16 bits of a value
6339 BFD_RELOC_MICROBLAZE_32_LO_PCREL
6341 This is a 32 bit pc-relative reloc for the microblaze that
6342 stores the low 16 bits of a value
6344 BFD_RELOC_MICROBLAZE_32_ROSDA
6346 This is a 32 bit reloc for the microblaze that stores a
6347 value relative to the read-only small data area anchor
6349 BFD_RELOC_MICROBLAZE_32_RWSDA
6351 This is a 32 bit reloc for the microblaze that stores a
6352 value relative to the read-write small data area anchor
6354 BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
6356 This is a 32 bit reloc for the microblaze to handle
6357 expressions of the form "Symbol Op Symbol"
6359 BFD_RELOC_MICROBLAZE_64_NONE
6361 This is a 64 bit reloc that stores the 32 bit pc relative
6362 value in two words (with an imm instruction). No relocation is
6363 done here - only used for relaxing
6365 BFD_RELOC_MICROBLAZE_64_GOTPC
6367 This is a 64 bit reloc that stores the 32 bit pc relative
6368 value in two words (with an imm instruction). The relocation is
6369 PC-relative GOT offset
6371 BFD_RELOC_MICROBLAZE_64_GOT
6373 This is a 64 bit reloc that stores the 32 bit pc relative
6374 value in two words (with an imm instruction). The relocation is
6377 BFD_RELOC_MICROBLAZE_64_PLT
6379 This is a 64 bit reloc that stores the 32 bit pc relative
6380 value in two words (with an imm instruction). The relocation is
6381 PC-relative offset into PLT
6383 BFD_RELOC_MICROBLAZE_64_GOTOFF
6385 This is a 64 bit reloc that stores the 32 bit GOT relative
6386 value in two words (with an imm instruction). The relocation is
6387 relative offset from _GLOBAL_OFFSET_TABLE_
6389 BFD_RELOC_MICROBLAZE_32_GOTOFF
6391 This is a 32 bit reloc that stores the 32 bit GOT relative
6392 value in a word. The relocation is relative offset from
6393 _GLOBAL_OFFSET_TABLE_
6395 BFD_RELOC_MICROBLAZE_COPY
6397 This is used to tell the dynamic linker to copy the value out of
6398 the dynamic object into the runtime process image.
6400 BFD_RELOC_MICROBLAZE_64_TLS
6404 BFD_RELOC_MICROBLAZE_64_TLSGD
6406 This is a 64 bit reloc that stores the 32 bit GOT relative value
6407 of the GOT TLS GD info entry in two words (with an imm instruction). The
6408 relocation is GOT offset.
6410 BFD_RELOC_MICROBLAZE_64_TLSLD
6412 This is a 64 bit reloc that stores the 32 bit GOT relative value
6413 of the GOT TLS LD info entry in two words (with an imm instruction). The
6414 relocation is GOT offset.
6416 BFD_RELOC_MICROBLAZE_32_TLSDTPMOD
6418 This is a 32 bit reloc that stores the Module ID to GOT(n).
6420 BFD_RELOC_MICROBLAZE_32_TLSDTPREL
6422 This is a 32 bit reloc that stores TLS offset to GOT(n+1).
6424 BFD_RELOC_MICROBLAZE_64_TLSDTPREL
6426 This is a 32 bit reloc for storing TLS offset to two words (uses imm
6429 BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL
6431 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6432 to two words (uses imm instruction).
6434 BFD_RELOC_MICROBLAZE_64_TLSTPREL
6436 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6437 to two words (uses imm instruction).
6440 BFD_RELOC_AARCH64_RELOC_START
6442 AArch64 pseudo relocation code to mark the start of the AArch64
6443 relocation enumerators. N.B. the order of the enumerators is
6444 important as several tables in the AArch64 bfd backend are indexed
6445 by these enumerators; make sure they are all synced.
6447 BFD_RELOC_AARCH64_NONE
6449 AArch64 null relocation code.
6451 BFD_RELOC_AARCH64_64
6453 BFD_RELOC_AARCH64_32
6455 BFD_RELOC_AARCH64_16
6457 Basic absolute relocations of N bits. These are equivalent to
6458 BFD_RELOC_N and they were added to assist the indexing of the howto
6461 BFD_RELOC_AARCH64_64_PCREL
6463 BFD_RELOC_AARCH64_32_PCREL
6465 BFD_RELOC_AARCH64_16_PCREL
6467 PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
6468 and they were added to assist the indexing of the howto table.
6470 BFD_RELOC_AARCH64_MOVW_G0
6472 AArch64 MOV[NZK] instruction with most significant bits 0 to 15
6473 of an unsigned address/value.
6475 BFD_RELOC_AARCH64_MOVW_G0_NC
6477 AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
6478 an address/value. No overflow checking.
6480 BFD_RELOC_AARCH64_MOVW_G1
6482 AArch64 MOV[NZK] instruction with most significant bits 16 to 31
6483 of an unsigned address/value.
6485 BFD_RELOC_AARCH64_MOVW_G1_NC
6487 AArch64 MOV[NZK] instruction with less significant bits 16 to 31
6488 of an address/value. No overflow checking.
6490 BFD_RELOC_AARCH64_MOVW_G2
6492 AArch64 MOV[NZK] instruction with most significant bits 32 to 47
6493 of an unsigned address/value.
6495 BFD_RELOC_AARCH64_MOVW_G2_NC
6497 AArch64 MOV[NZK] instruction with less significant bits 32 to 47
6498 of an address/value. No overflow checking.
6500 BFD_RELOC_AARCH64_MOVW_G3
6502 AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
6503 of a signed or unsigned address/value.
6505 BFD_RELOC_AARCH64_MOVW_G0_S
6507 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
6508 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6511 BFD_RELOC_AARCH64_MOVW_G1_S
6513 AArch64 MOV[NZ] instruction with most significant bits 16 to 31
6514 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6517 BFD_RELOC_AARCH64_MOVW_G2_S
6519 AArch64 MOV[NZ] instruction with most significant bits 32 to 47
6520 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6523 BFD_RELOC_AARCH64_LD_LO19_PCREL
6525 AArch64 Load Literal instruction, holding a 19 bit pc-relative word
6526 offset. The lowest two bits must be zero and are not stored in the
6527 instruction, giving a 21 bit signed byte offset.
6529 BFD_RELOC_AARCH64_ADR_LO21_PCREL
6531 AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
6533 BFD_RELOC_AARCH64_ADR_HI21_PCREL
6535 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
6536 offset, giving a 4KB aligned page base address.
6538 BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
6540 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
6541 offset, giving a 4KB aligned page base address, but with no overflow
6544 BFD_RELOC_AARCH64_ADD_LO12
6546 AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
6547 Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6549 BFD_RELOC_AARCH64_LDST8_LO12
6551 AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
6552 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6554 BFD_RELOC_AARCH64_TSTBR14
6556 AArch64 14 bit pc-relative test bit and branch.
6557 The lowest two bits must be zero and are not stored in the instruction,
6558 giving a 16 bit signed byte offset.
6560 BFD_RELOC_AARCH64_BRANCH19
6562 AArch64 19 bit pc-relative conditional branch and compare & branch.
6563 The lowest two bits must be zero and are not stored in the instruction,
6564 giving a 21 bit signed byte offset.
6566 BFD_RELOC_AARCH64_JUMP26
6568 AArch64 26 bit pc-relative unconditional branch.
6569 The lowest two bits must be zero and are not stored in the instruction,
6570 giving a 28 bit signed byte offset.
6572 BFD_RELOC_AARCH64_CALL26
6574 AArch64 26 bit pc-relative unconditional branch and link.
6575 The lowest two bits must be zero and are not stored in the instruction,
6576 giving a 28 bit signed byte offset.
6578 BFD_RELOC_AARCH64_LDST16_LO12
6580 AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
6581 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6583 BFD_RELOC_AARCH64_LDST32_LO12
6585 AArch64 32-bit load/store instruction, holding bits 0 to 11 of the
6586 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6588 BFD_RELOC_AARCH64_LDST64_LO12
6590 AArch64 64-bit load/store instruction, holding bits 0 to 11 of the
6591 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6593 BFD_RELOC_AARCH64_LDST128_LO12
6595 AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
6596 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6598 BFD_RELOC_AARCH64_GOT_LD_PREL19
6600 AArch64 Load Literal instruction, holding a 19 bit PC relative word
6601 offset of the global offset table entry for a symbol. The lowest two
6602 bits must be zero and are not stored in the instruction, giving a 21
6603 bit signed byte offset. This relocation type requires signed overflow
6606 BFD_RELOC_AARCH64_ADR_GOT_PAGE
6608 Get to the page base of the global offset table entry for a symbol as
6609 part of an ADRP instruction using a 21 bit PC relative value.Used in
6610 conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
6612 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
6614 Unsigned 12 bit byte offset for 64 bit load/store from the page of
6615 the GOT entry for this symbol. Used in conjunction with
6616 BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in LP64 ABI only.
6618 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
6620 Unsigned 12 bit byte offset for 32 bit load/store from the page of
6621 the GOT entry for this symbol. Used in conjunction with
6622 BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in ILP32 ABI only.
6624 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
6626 Get to the page base of the global offset table entry for a symbols
6627 tls_index structure as part of an adrp instruction using a 21 bit PC
6628 relative value. Used in conjunction with
6629 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
6631 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
6633 Unsigned 12 bit byte offset to global offset table entry for a symbols
6634 tls_index structure. Used in conjunction with
6635 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
6637 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
6639 AArch64 TLS INITIAL EXEC relocation.
6641 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
6643 AArch64 TLS INITIAL EXEC relocation.
6645 BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
6647 AArch64 TLS INITIAL EXEC relocation.
6649 BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
6651 AArch64 TLS INITIAL EXEC relocation.
6653 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
6655 AArch64 TLS INITIAL EXEC relocation.
6657 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
6659 AArch64 TLS INITIAL EXEC relocation.
6661 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
6663 AArch64 TLS LOCAL EXEC relocation.
6665 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
6667 AArch64 TLS LOCAL EXEC relocation.
6669 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
6671 AArch64 TLS LOCAL EXEC relocation.
6673 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
6675 AArch64 TLS LOCAL EXEC relocation.
6677 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
6679 AArch64 TLS LOCAL EXEC relocation.
6681 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
6683 AArch64 TLS LOCAL EXEC relocation.
6685 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
6687 AArch64 TLS LOCAL EXEC relocation.
6689 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
6691 AArch64 TLS LOCAL EXEC relocation.
6693 BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
6695 AArch64 TLS DESC relocation.
6697 BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
6699 AArch64 TLS DESC relocation.
6701 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
6703 AArch64 TLS DESC relocation.
6705 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC
6707 AArch64 TLS DESC relocation.
6709 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
6711 AArch64 TLS DESC relocation.
6713 BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC
6715 AArch64 TLS DESC relocation.
6717 BFD_RELOC_AARCH64_TLSDESC_OFF_G1
6719 AArch64 TLS DESC relocation.
6721 BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
6723 AArch64 TLS DESC relocation.
6725 BFD_RELOC_AARCH64_TLSDESC_LDR
6727 AArch64 TLS DESC relocation.
6729 BFD_RELOC_AARCH64_TLSDESC_ADD
6731 AArch64 TLS DESC relocation.
6733 BFD_RELOC_AARCH64_TLSDESC_CALL
6735 AArch64 TLS DESC relocation.
6737 BFD_RELOC_AARCH64_COPY
6739 AArch64 TLS relocation.
6741 BFD_RELOC_AARCH64_GLOB_DAT
6743 AArch64 TLS relocation.
6745 BFD_RELOC_AARCH64_JUMP_SLOT
6747 AArch64 TLS relocation.
6749 BFD_RELOC_AARCH64_RELATIVE
6751 AArch64 TLS relocation.
6753 BFD_RELOC_AARCH64_TLS_DTPMOD
6755 AArch64 TLS relocation.
6757 BFD_RELOC_AARCH64_TLS_DTPREL
6759 AArch64 TLS relocation.
6761 BFD_RELOC_AARCH64_TLS_TPREL
6763 AArch64 TLS relocation.
6765 BFD_RELOC_AARCH64_TLSDESC
6767 AArch64 TLS relocation.
6769 BFD_RELOC_AARCH64_IRELATIVE
6771 AArch64 support for STT_GNU_IFUNC.
6773 BFD_RELOC_AARCH64_RELOC_END
6775 AArch64 pseudo relocation code to mark the end of the AArch64
6776 relocation enumerators that have direct mapping to ELF reloc codes.
6777 There are a few more enumerators after this one; those are mainly
6778 used by the AArch64 assembler for the internal fixup or to select
6779 one of the above enumerators.
6781 BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
6783 AArch64 pseudo relocation code to be used internally by the AArch64
6784 assembler and not (currently) written to any object files.
6786 BFD_RELOC_AARCH64_LDST_LO12
6788 AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
6789 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6791 BFD_RELOC_AARCH64_LD_GOT_LO12_NC
6793 AArch64 pseudo relocation code to be used internally by the AArch64
6794 assembler and not (currently) written to any object files.
6796 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
6798 AArch64 pseudo relocation code to be used internally by the AArch64
6799 assembler and not (currently) written to any object files.
6801 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
6803 AArch64 pseudo relocation code to be used internally by the AArch64
6804 assembler and not (currently) written to any object files.
6807 BFD_RELOC_TILEPRO_COPY
6809 BFD_RELOC_TILEPRO_GLOB_DAT
6811 BFD_RELOC_TILEPRO_JMP_SLOT
6813 BFD_RELOC_TILEPRO_RELATIVE
6815 BFD_RELOC_TILEPRO_BROFF_X1
6817 BFD_RELOC_TILEPRO_JOFFLONG_X1
6819 BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
6821 BFD_RELOC_TILEPRO_IMM8_X0
6823 BFD_RELOC_TILEPRO_IMM8_Y0
6825 BFD_RELOC_TILEPRO_IMM8_X1
6827 BFD_RELOC_TILEPRO_IMM8_Y1
6829 BFD_RELOC_TILEPRO_DEST_IMM8_X1
6831 BFD_RELOC_TILEPRO_MT_IMM15_X1
6833 BFD_RELOC_TILEPRO_MF_IMM15_X1
6835 BFD_RELOC_TILEPRO_IMM16_X0
6837 BFD_RELOC_TILEPRO_IMM16_X1
6839 BFD_RELOC_TILEPRO_IMM16_X0_LO
6841 BFD_RELOC_TILEPRO_IMM16_X1_LO
6843 BFD_RELOC_TILEPRO_IMM16_X0_HI
6845 BFD_RELOC_TILEPRO_IMM16_X1_HI
6847 BFD_RELOC_TILEPRO_IMM16_X0_HA
6849 BFD_RELOC_TILEPRO_IMM16_X1_HA
6851 BFD_RELOC_TILEPRO_IMM16_X0_PCREL
6853 BFD_RELOC_TILEPRO_IMM16_X1_PCREL
6855 BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
6857 BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
6859 BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
6861 BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
6863 BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
6865 BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
6867 BFD_RELOC_TILEPRO_IMM16_X0_GOT
6869 BFD_RELOC_TILEPRO_IMM16_X1_GOT
6871 BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
6873 BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
6875 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
6877 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
6879 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
6881 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
6883 BFD_RELOC_TILEPRO_MMSTART_X0
6885 BFD_RELOC_TILEPRO_MMEND_X0
6887 BFD_RELOC_TILEPRO_MMSTART_X1
6889 BFD_RELOC_TILEPRO_MMEND_X1
6891 BFD_RELOC_TILEPRO_SHAMT_X0
6893 BFD_RELOC_TILEPRO_SHAMT_X1
6895 BFD_RELOC_TILEPRO_SHAMT_Y0
6897 BFD_RELOC_TILEPRO_SHAMT_Y1
6899 BFD_RELOC_TILEPRO_TLS_GD_CALL
6901 BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD
6903 BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD
6905 BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD
6907 BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD
6909 BFD_RELOC_TILEPRO_TLS_IE_LOAD
6911 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
6913 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
6915 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
6917 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
6919 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
6921 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
6923 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
6925 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
6927 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
6929 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
6931 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
6933 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
6935 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
6937 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
6939 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
6941 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
6943 BFD_RELOC_TILEPRO_TLS_DTPMOD32
6945 BFD_RELOC_TILEPRO_TLS_DTPOFF32
6947 BFD_RELOC_TILEPRO_TLS_TPOFF32
6949 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE
6951 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE
6953 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO
6955 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO
6957 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI
6959 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI
6961 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA
6963 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA
6965 Tilera TILEPro Relocations.
6967 BFD_RELOC_TILEGX_HW0
6969 BFD_RELOC_TILEGX_HW1
6971 BFD_RELOC_TILEGX_HW2
6973 BFD_RELOC_TILEGX_HW3
6975 BFD_RELOC_TILEGX_HW0_LAST
6977 BFD_RELOC_TILEGX_HW1_LAST
6979 BFD_RELOC_TILEGX_HW2_LAST
6981 BFD_RELOC_TILEGX_COPY
6983 BFD_RELOC_TILEGX_GLOB_DAT
6985 BFD_RELOC_TILEGX_JMP_SLOT
6987 BFD_RELOC_TILEGX_RELATIVE
6989 BFD_RELOC_TILEGX_BROFF_X1
6991 BFD_RELOC_TILEGX_JUMPOFF_X1
6993 BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
6995 BFD_RELOC_TILEGX_IMM8_X0
6997 BFD_RELOC_TILEGX_IMM8_Y0
6999 BFD_RELOC_TILEGX_IMM8_X1
7001 BFD_RELOC_TILEGX_IMM8_Y1
7003 BFD_RELOC_TILEGX_DEST_IMM8_X1
7005 BFD_RELOC_TILEGX_MT_IMM14_X1
7007 BFD_RELOC_TILEGX_MF_IMM14_X1
7009 BFD_RELOC_TILEGX_MMSTART_X0
7011 BFD_RELOC_TILEGX_MMEND_X0
7013 BFD_RELOC_TILEGX_SHAMT_X0
7015 BFD_RELOC_TILEGX_SHAMT_X1
7017 BFD_RELOC_TILEGX_SHAMT_Y0
7019 BFD_RELOC_TILEGX_SHAMT_Y1
7021 BFD_RELOC_TILEGX_IMM16_X0_HW0
7023 BFD_RELOC_TILEGX_IMM16_X1_HW0
7025 BFD_RELOC_TILEGX_IMM16_X0_HW1
7027 BFD_RELOC_TILEGX_IMM16_X1_HW1
7029 BFD_RELOC_TILEGX_IMM16_X0_HW2
7031 BFD_RELOC_TILEGX_IMM16_X1_HW2
7033 BFD_RELOC_TILEGX_IMM16_X0_HW3
7035 BFD_RELOC_TILEGX_IMM16_X1_HW3
7037 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
7039 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
7041 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
7043 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
7045 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
7047 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
7049 BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
7051 BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
7053 BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
7055 BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
7057 BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
7059 BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
7061 BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
7063 BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
7065 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
7067 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
7069 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
7071 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
7073 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
7075 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
7077 BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
7079 BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
7081 BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL
7083 BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL
7085 BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL
7087 BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL
7089 BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL
7091 BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL
7093 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
7095 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
7097 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
7099 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
7101 BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL
7103 BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL
7105 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
7107 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
7109 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE
7111 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE
7113 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE
7115 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE
7117 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE
7119 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE
7121 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
7123 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
7125 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
7127 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
7129 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
7131 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
7133 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL
7135 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL
7137 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL
7139 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL
7141 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL
7143 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL
7145 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
7147 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
7149 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
7151 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
7153 BFD_RELOC_TILEGX_TLS_DTPMOD64
7155 BFD_RELOC_TILEGX_TLS_DTPOFF64
7157 BFD_RELOC_TILEGX_TLS_TPOFF64
7159 BFD_RELOC_TILEGX_TLS_DTPMOD32
7161 BFD_RELOC_TILEGX_TLS_DTPOFF32
7163 BFD_RELOC_TILEGX_TLS_TPOFF32
7165 BFD_RELOC_TILEGX_TLS_GD_CALL
7167 BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD
7169 BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD
7171 BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD
7173 BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD
7175 BFD_RELOC_TILEGX_TLS_IE_LOAD
7177 BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD
7179 BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD
7181 BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD
7183 BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD
7185 Tilera TILE-Gx Relocations.
7187 BFD_RELOC_EPIPHANY_SIMM8
7189 Adapteva EPIPHANY - 8 bit signed pc-relative displacement
7191 BFD_RELOC_EPIPHANY_SIMM24
7193 Adapteva EPIPHANY - 24 bit signed pc-relative displacement
7195 BFD_RELOC_EPIPHANY_HIGH
7197 Adapteva EPIPHANY - 16 most-significant bits of absolute address
7199 BFD_RELOC_EPIPHANY_LOW
7201 Adapteva EPIPHANY - 16 least-significant bits of absolute address
7203 BFD_RELOC_EPIPHANY_SIMM11
7205 Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
7207 BFD_RELOC_EPIPHANY_IMM11
7209 Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement)
7211 BFD_RELOC_EPIPHANY_IMM8
7213 Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
7220 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
7225 bfd_reloc_type_lookup
7226 bfd_reloc_name_lookup
7229 reloc_howto_type *bfd_reloc_type_lookup
7230 (bfd *abfd, bfd_reloc_code_real_type code);
7231 reloc_howto_type *bfd_reloc_name_lookup
7232 (bfd *abfd, const char *reloc_name);
7235 Return a pointer to a howto structure which, when
7236 invoked, will perform the relocation @var{code} on data from the
7242 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
7244 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
7248 bfd_reloc_name_lookup (bfd
*abfd
, const char *reloc_name
)
7250 return BFD_SEND (abfd
, reloc_name_lookup
, (abfd
, reloc_name
));
7253 static reloc_howto_type bfd_howto_32
=
7254 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_dont
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
7258 bfd_default_reloc_type_lookup
7261 reloc_howto_type *bfd_default_reloc_type_lookup
7262 (bfd *abfd, bfd_reloc_code_real_type code);
7265 Provides a default relocation lookup routine for any architecture.
7270 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
7274 case BFD_RELOC_CTOR
:
7275 /* The type of reloc used in a ctor, which will be as wide as the
7276 address - so either a 64, 32, or 16 bitter. */
7277 switch (bfd_arch_bits_per_address (abfd
))
7282 return &bfd_howto_32
;
7296 bfd_get_reloc_code_name
7299 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
7302 Provides a printable name for the supplied relocation code.
7303 Useful mainly for printing error messages.
7307 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
7309 if (code
> BFD_RELOC_UNUSED
)
7311 return bfd_reloc_code_real_names
[code
];
7316 bfd_generic_relax_section
7319 bfd_boolean bfd_generic_relax_section
7322 struct bfd_link_info *,
7326 Provides default handling for relaxing for back ends which
7331 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
7332 asection
*section ATTRIBUTE_UNUSED
,
7333 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
7336 if (link_info
->relocatable
)
7337 (*link_info
->callbacks
->einfo
)
7338 (_("%P%F: --relax and -r may not be used together\n"));
7346 bfd_generic_gc_sections
7349 bfd_boolean bfd_generic_gc_sections
7350 (bfd *, struct bfd_link_info *);
7353 Provides default handling for relaxing for back ends which
7354 don't do section gc -- i.e., does nothing.
7358 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
7359 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
7366 bfd_generic_lookup_section_flags
7369 bfd_boolean bfd_generic_lookup_section_flags
7370 (struct bfd_link_info *, struct flag_info *, asection *);
7373 Provides default handling for section flags lookup
7374 -- i.e., does nothing.
7375 Returns FALSE if the section should be omitted, otherwise TRUE.
7379 bfd_generic_lookup_section_flags (struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
7380 struct flag_info
*flaginfo
,
7381 asection
*section ATTRIBUTE_UNUSED
)
7383 if (flaginfo
!= NULL
)
7385 (*_bfd_error_handler
) (_("INPUT_SECTION_FLAGS are not supported.\n"));
7393 bfd_generic_merge_sections
7396 bfd_boolean bfd_generic_merge_sections
7397 (bfd *, struct bfd_link_info *);
7400 Provides default handling for SEC_MERGE section merging for back ends
7401 which don't have SEC_MERGE support -- i.e., does nothing.
7405 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
7406 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
7413 bfd_generic_get_relocated_section_contents
7416 bfd_byte *bfd_generic_get_relocated_section_contents
7418 struct bfd_link_info *link_info,
7419 struct bfd_link_order *link_order,
7421 bfd_boolean relocatable,
7425 Provides default handling of relocation effort for back ends
7426 which can't be bothered to do it efficiently.
7431 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
7432 struct bfd_link_info
*link_info
,
7433 struct bfd_link_order
*link_order
,
7435 bfd_boolean relocatable
,
7438 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
7439 asection
*input_section
= link_order
->u
.indirect
.section
;
7441 arelent
**reloc_vector
;
7444 reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
7448 /* Read in the section. */
7449 if (!bfd_get_full_section_contents (input_bfd
, input_section
, &data
))
7452 if (reloc_size
== 0)
7455 reloc_vector
= (arelent
**) bfd_malloc (reloc_size
);
7456 if (reloc_vector
== NULL
)
7459 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
7463 if (reloc_count
< 0)
7466 if (reloc_count
> 0)
7469 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
7471 char *error_message
= NULL
;
7473 bfd_reloc_status_type r
;
7475 symbol
= *(*parent
)->sym_ptr_ptr
;
7476 if (symbol
->section
&& discarded_section (symbol
->section
))
7479 static reloc_howto_type none_howto
7480 = HOWTO (0, 0, 0, 0, FALSE
, 0, complain_overflow_dont
, NULL
,
7481 "unused", FALSE
, 0, 0, FALSE
);
7483 p
= data
+ (*parent
)->address
* bfd_octets_per_byte (input_bfd
);
7484 _bfd_clear_contents ((*parent
)->howto
, input_bfd
, input_section
,
7486 (*parent
)->sym_ptr_ptr
= bfd_abs_section_ptr
->symbol_ptr_ptr
;
7487 (*parent
)->addend
= 0;
7488 (*parent
)->howto
= &none_howto
;
7492 r
= bfd_perform_relocation (input_bfd
,
7496 relocatable
? abfd
: NULL
,
7501 asection
*os
= input_section
->output_section
;
7503 /* A partial link, so keep the relocs. */
7504 os
->orelocation
[os
->reloc_count
] = *parent
;
7508 if (r
!= bfd_reloc_ok
)
7512 case bfd_reloc_undefined
:
7513 if (!((*link_info
->callbacks
->undefined_symbol
)
7514 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
7515 input_bfd
, input_section
, (*parent
)->address
,
7519 case bfd_reloc_dangerous
:
7520 BFD_ASSERT (error_message
!= NULL
);
7521 if (!((*link_info
->callbacks
->reloc_dangerous
)
7522 (link_info
, error_message
, input_bfd
, input_section
,
7523 (*parent
)->address
)))
7526 case bfd_reloc_overflow
:
7527 if (!((*link_info
->callbacks
->reloc_overflow
)
7529 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
7530 (*parent
)->howto
->name
, (*parent
)->addend
,
7531 input_bfd
, input_section
, (*parent
)->address
)))
7534 case bfd_reloc_outofrange
:
7536 This error can result when processing some partially
7537 complete binaries. Do not abort, but issue an error
7539 link_info
->callbacks
->einfo
7540 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
7541 abfd
, input_section
, * parent
);
7553 free (reloc_vector
);
7557 free (reloc_vector
);