1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 MA 02110-1301, USA. */
28 BFD maintains relocations in much the same way it maintains
29 symbols: they are left alone until required, then read in
30 en-masse and translated into an internal form. A common
31 routine <<bfd_perform_relocation>> acts upon the
32 canonical form to do the fixup.
34 Relocations are maintained on a per section basis,
35 while symbols are maintained on a per BFD basis.
37 All that a back end has to do to fit the BFD interface is to create
38 a <<struct reloc_cache_entry>> for each relocation
39 in a particular section, and fill in the right bits of the structures.
48 /* DO compile in the reloc_code name table from libbfd.h. */
49 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
58 typedef arelent, howto manager, Relocations, Relocations
63 This is the structure of a relocation entry:
67 .typedef enum bfd_reloc_status
69 . {* No errors detected. *}
72 . {* The relocation was performed, but there was an overflow. *}
75 . {* The address to relocate was not within the section supplied. *}
76 . bfd_reloc_outofrange,
78 . {* Used by special functions. *}
81 . {* Unsupported relocation size requested. *}
82 . bfd_reloc_notsupported,
87 . {* The symbol to relocate against was undefined. *}
88 . bfd_reloc_undefined,
90 . {* The relocation was performed, but may not be ok - presently
91 . generated only when linking i960 coff files with i960 b.out
92 . symbols. If this type is returned, the error_message argument
93 . to bfd_perform_relocation will be set. *}
96 . bfd_reloc_status_type;
99 .typedef struct reloc_cache_entry
101 . {* A pointer into the canonical table of pointers. *}
102 . struct bfd_symbol **sym_ptr_ptr;
104 . {* offset in section. *}
105 . bfd_size_type address;
107 . {* addend for relocation value. *}
110 . {* Pointer to how to perform the required relocation. *}
111 . reloc_howto_type *howto;
121 Here is a description of each of the fields within an <<arelent>>:
125 The symbol table pointer points to a pointer to the symbol
126 associated with the relocation request. It is the pointer
127 into the table returned by the back end's
128 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
129 referenced through a pointer to a pointer so that tools like
130 the linker can fix up all the symbols of the same name by
131 modifying only one pointer. The relocation routine looks in
132 the symbol and uses the base of the section the symbol is
133 attached to and the value of the symbol as the initial
134 relocation offset. If the symbol pointer is zero, then the
135 section provided is looked up.
139 The <<address>> field gives the offset in bytes from the base of
140 the section data which owns the relocation record to the first
141 byte of relocatable information. The actual data relocated
142 will be relative to this point; for example, a relocation
143 type which modifies the bottom two bytes of a four byte word
144 would not touch the first byte pointed to in a big endian
149 The <<addend>> is a value provided by the back end to be added (!)
150 to the relocation offset. Its interpretation is dependent upon
151 the howto. For example, on the 68k the code:
156 | return foo[0x12345678];
159 Could be compiled into:
162 | moveb @@#12345678,d0
167 This could create a reloc pointing to <<foo>>, but leave the
168 offset in the data, something like:
170 |RELOCATION RECORDS FOR [.text]:
174 |00000000 4e56 fffc ; linkw fp,#-4
175 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
176 |0000000a 49c0 ; extbl d0
177 |0000000c 4e5e ; unlk fp
180 Using coff and an 88k, some instructions don't have enough
181 space in them to represent the full address range, and
182 pointers have to be loaded in two parts. So you'd get something like:
184 | or.u r13,r0,hi16(_foo+0x12345678)
185 | ld.b r2,r13,lo16(_foo+0x12345678)
188 This should create two relocs, both pointing to <<_foo>>, and with
189 0x12340000 in their addend field. The data would consist of:
191 |RELOCATION RECORDS FOR [.text]:
193 |00000002 HVRT16 _foo+0x12340000
194 |00000006 LVRT16 _foo+0x12340000
196 |00000000 5da05678 ; or.u r13,r0,0x5678
197 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
198 |00000008 f400c001 ; jmp r1
200 The relocation routine digs out the value from the data, adds
201 it to the addend to get the original offset, and then adds the
202 value of <<_foo>>. Note that all 32 bits have to be kept around
203 somewhere, to cope with carry from bit 15 to bit 16.
205 One further example is the sparc and the a.out format. The
206 sparc has a similar problem to the 88k, in that some
207 instructions don't have room for an entire offset, but on the
208 sparc the parts are created in odd sized lumps. The designers of
209 the a.out format chose to not use the data within the section
210 for storing part of the offset; all the offset is kept within
211 the reloc. Anything in the data should be ignored.
214 | sethi %hi(_foo+0x12345678),%g2
215 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
219 Both relocs contain a pointer to <<foo>>, and the offsets
222 |RELOCATION RECORDS FOR [.text]:
224 |00000004 HI22 _foo+0x12345678
225 |00000008 LO10 _foo+0x12345678
227 |00000000 9de3bf90 ; save %sp,-112,%sp
228 |00000004 05000000 ; sethi %hi(_foo+0),%g2
229 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
230 |0000000c 81c7e008 ; ret
231 |00000010 81e80000 ; restore
235 The <<howto>> field can be imagined as a
236 relocation instruction. It is a pointer to a structure which
237 contains information on what to do with all of the other
238 information in the reloc record and data section. A back end
239 would normally have a relocation instruction set and turn
240 relocations into pointers to the correct structure on input -
241 but it would be possible to create each howto field on demand.
247 <<enum complain_overflow>>
249 Indicates what sort of overflow checking should be done when
250 performing a relocation.
254 .enum complain_overflow
256 . {* Do not complain on overflow. *}
257 . complain_overflow_dont,
259 . {* Complain if the value overflows when considered as a signed
260 . number one bit larger than the field. ie. A bitfield of N bits
261 . is allowed to represent -2**n to 2**n-1. *}
262 . complain_overflow_bitfield,
264 . {* Complain if the value overflows when considered as a signed
266 . complain_overflow_signed,
268 . {* Complain if the value overflows when considered as an
269 . unsigned number. *}
270 . complain_overflow_unsigned
279 The <<reloc_howto_type>> is a structure which contains all the
280 information that libbfd needs to know to tie up a back end's data.
283 .struct bfd_symbol; {* Forward declaration. *}
285 .struct reloc_howto_struct
287 . {* The type field has mainly a documentary use - the back end can
288 . do what it wants with it, though normally the back end's
289 . external idea of what a reloc number is stored
290 . in this field. For example, a PC relative word relocation
291 . in a coff environment has the type 023 - because that's
292 . what the outside world calls a R_PCRWORD reloc. *}
295 . {* The value the final relocation is shifted right by. This drops
296 . unwanted data from the relocation. *}
297 . unsigned int rightshift;
299 . {* The size of the item to be relocated. This is *not* a
300 . power-of-two measure. To get the number of bytes operated
301 . on by a type of relocation, use bfd_get_reloc_size. *}
304 . {* The number of bits in the item to be relocated. This is used
305 . when doing overflow checking. *}
306 . unsigned int bitsize;
308 . {* The relocation is relative to the field being relocated. *}
309 . bfd_boolean pc_relative;
311 . {* The bit position of the reloc value in the destination.
312 . The relocated value is left shifted by this amount. *}
313 . unsigned int bitpos;
315 . {* What type of overflow error should be checked for when
317 . enum complain_overflow complain_on_overflow;
319 . {* If this field is non null, then the supplied function is
320 . called rather than the normal function. This allows really
321 . strange relocation methods to be accommodated (e.g., i960 callj
323 . bfd_reloc_status_type (*special_function)
324 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
327 . {* The textual name of the relocation type. *}
330 . {* Some formats record a relocation addend in the section contents
331 . rather than with the relocation. For ELF formats this is the
332 . distinction between USE_REL and USE_RELA (though the code checks
333 . for USE_REL == 1/0). The value of this field is TRUE if the
334 . addend is recorded with the section contents; when performing a
335 . partial link (ld -r) the section contents (the data) will be
336 . modified. The value of this field is FALSE if addends are
337 . recorded with the relocation (in arelent.addend); when performing
338 . a partial link the relocation will be modified.
339 . All relocations for all ELF USE_RELA targets should set this field
340 . to FALSE (values of TRUE should be looked on with suspicion).
341 . However, the converse is not true: not all relocations of all ELF
342 . USE_REL targets set this field to TRUE. Why this is so is peculiar
343 . to each particular target. For relocs that aren't used in partial
344 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
345 . bfd_boolean partial_inplace;
347 . {* src_mask selects the part of the instruction (or data) to be used
348 . in the relocation sum. If the target relocations don't have an
349 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
350 . dst_mask to extract the addend from the section contents. If
351 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
352 . field should be zero. Non-zero values for ELF USE_RELA targets are
353 . bogus as in those cases the value in the dst_mask part of the
354 . section contents should be treated as garbage. *}
357 . {* dst_mask selects which parts of the instruction (or data) are
358 . replaced with a relocated value. *}
361 . {* When some formats create PC relative instructions, they leave
362 . the value of the pc of the place being relocated in the offset
363 . slot of the instruction, so that a PC relative relocation can
364 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
365 . Some formats leave the displacement part of an instruction
366 . empty (e.g., m88k bcs); this flag signals the fact. *}
367 . bfd_boolean pcrel_offset;
377 The HOWTO define is horrible and will go away.
379 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
380 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
383 And will be replaced with the totally magic way. But for the
384 moment, we are compatible, so do it this way.
386 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
387 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
388 . NAME, FALSE, 0, 0, IN)
392 This is used to fill in an empty howto entry in an array.
394 .#define EMPTY_HOWTO(C) \
395 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
396 . NULL, FALSE, 0, 0, FALSE)
400 Helper routine to turn a symbol into a relocation value.
402 .#define HOWTO_PREPARE(relocation, symbol) \
404 . if (symbol != NULL) \
406 . if (bfd_is_com_section (symbol->section)) \
412 . relocation = symbol->value; \
424 unsigned int bfd_get_reloc_size (reloc_howto_type *);
427 For a reloc_howto_type that operates on a fixed number of bytes,
428 this returns the number of bytes operated on.
432 bfd_get_reloc_size (reloc_howto_type
*howto
)
453 How relocs are tied together in an <<asection>>:
455 .typedef struct relent_chain
458 . struct relent_chain *next;
464 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
465 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
472 bfd_reloc_status_type bfd_check_overflow
473 (enum complain_overflow how,
474 unsigned int bitsize,
475 unsigned int rightshift,
476 unsigned int addrsize,
480 Perform overflow checking on @var{relocation} which has
481 @var{bitsize} significant bits and will be shifted right by
482 @var{rightshift} bits, on a machine with addresses containing
483 @var{addrsize} significant bits. The result is either of
484 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
488 bfd_reloc_status_type
489 bfd_check_overflow (enum complain_overflow how
,
490 unsigned int bitsize
,
491 unsigned int rightshift
,
492 unsigned int addrsize
,
495 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
496 bfd_reloc_status_type flag
= bfd_reloc_ok
;
498 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
499 we'll be permissive: extra bits in the field mask will
500 automatically extend the address mask for purposes of the
502 fieldmask
= N_ONES (bitsize
);
503 signmask
= ~fieldmask
;
504 addrmask
= N_ONES (addrsize
) | (fieldmask
<< rightshift
);
505 a
= (relocation
& addrmask
) >> rightshift
;;
509 case complain_overflow_dont
:
512 case complain_overflow_signed
:
513 /* If any sign bits are set, all sign bits must be set. That
514 is, A must be a valid negative address after shifting. */
515 signmask
= ~ (fieldmask
>> 1);
518 case complain_overflow_bitfield
:
519 /* Bitfields are sometimes signed, sometimes unsigned. We
520 explicitly allow an address wrap too, which means a bitfield
521 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
522 if the value has some, but not all, bits set outside the
525 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
526 flag
= bfd_reloc_overflow
;
529 case complain_overflow_unsigned
:
530 /* We have an overflow if the address does not fit in the field. */
531 if ((a
& signmask
) != 0)
532 flag
= bfd_reloc_overflow
;
544 bfd_perform_relocation
547 bfd_reloc_status_type bfd_perform_relocation
549 arelent *reloc_entry,
551 asection *input_section,
553 char **error_message);
556 If @var{output_bfd} is supplied to this function, the
557 generated image will be relocatable; the relocations are
558 copied to the output file after they have been changed to
559 reflect the new state of the world. There are two ways of
560 reflecting the results of partial linkage in an output file:
561 by modifying the output data in place, and by modifying the
562 relocation record. Some native formats (e.g., basic a.out and
563 basic coff) have no way of specifying an addend in the
564 relocation type, so the addend has to go in the output data.
565 This is no big deal since in these formats the output data
566 slot will always be big enough for the addend. Complex reloc
567 types with addends were invented to solve just this problem.
568 The @var{error_message} argument is set to an error message if
569 this return @code{bfd_reloc_dangerous}.
573 bfd_reloc_status_type
574 bfd_perform_relocation (bfd
*abfd
,
575 arelent
*reloc_entry
,
577 asection
*input_section
,
579 char **error_message
)
582 bfd_reloc_status_type flag
= bfd_reloc_ok
;
583 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
584 bfd_vma output_base
= 0;
585 reloc_howto_type
*howto
= reloc_entry
->howto
;
586 asection
*reloc_target_output_section
;
589 symbol
= *(reloc_entry
->sym_ptr_ptr
);
590 if (bfd_is_abs_section (symbol
->section
)
591 && output_bfd
!= NULL
)
593 reloc_entry
->address
+= input_section
->output_offset
;
597 /* If we are not producing relocatable output, return an error if
598 the symbol is not defined. An undefined weak symbol is
599 considered to have a value of zero (SVR4 ABI, p. 4-27). */
600 if (bfd_is_und_section (symbol
->section
)
601 && (symbol
->flags
& BSF_WEAK
) == 0
602 && output_bfd
== NULL
)
603 flag
= bfd_reloc_undefined
;
605 /* If there is a function supplied to handle this relocation type,
606 call it. It'll return `bfd_reloc_continue' if further processing
608 if (howto
->special_function
)
610 bfd_reloc_status_type cont
;
611 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
612 input_section
, output_bfd
,
614 if (cont
!= bfd_reloc_continue
)
618 /* Is the address of the relocation really within the section? */
619 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
620 return bfd_reloc_outofrange
;
622 /* Work out which section the relocation is targeted at and the
623 initial relocation command value. */
625 /* Get symbol value. (Common symbols are special.) */
626 if (bfd_is_com_section (symbol
->section
))
629 relocation
= symbol
->value
;
631 reloc_target_output_section
= symbol
->section
->output_section
;
633 /* Convert input-section-relative symbol value to absolute. */
634 if ((output_bfd
&& ! howto
->partial_inplace
)
635 || reloc_target_output_section
== NULL
)
638 output_base
= reloc_target_output_section
->vma
;
640 relocation
+= output_base
+ symbol
->section
->output_offset
;
642 /* Add in supplied addend. */
643 relocation
+= reloc_entry
->addend
;
645 /* Here the variable relocation holds the final address of the
646 symbol we are relocating against, plus any addend. */
648 if (howto
->pc_relative
)
650 /* This is a PC relative relocation. We want to set RELOCATION
651 to the distance between the address of the symbol and the
652 location. RELOCATION is already the address of the symbol.
654 We start by subtracting the address of the section containing
657 If pcrel_offset is set, we must further subtract the position
658 of the location within the section. Some targets arrange for
659 the addend to be the negative of the position of the location
660 within the section; for example, i386-aout does this. For
661 i386-aout, pcrel_offset is FALSE. Some other targets do not
662 include the position of the location; for example, m88kbcs,
663 or ELF. For those targets, pcrel_offset is TRUE.
665 If we are producing relocatable output, then we must ensure
666 that this reloc will be correctly computed when the final
667 relocation is done. If pcrel_offset is FALSE we want to wind
668 up with the negative of the location within the section,
669 which means we must adjust the existing addend by the change
670 in the location within the section. If pcrel_offset is TRUE
671 we do not want to adjust the existing addend at all.
673 FIXME: This seems logical to me, but for the case of
674 producing relocatable output it is not what the code
675 actually does. I don't want to change it, because it seems
676 far too likely that something will break. */
679 input_section
->output_section
->vma
+ input_section
->output_offset
;
681 if (howto
->pcrel_offset
)
682 relocation
-= reloc_entry
->address
;
685 if (output_bfd
!= NULL
)
687 if (! howto
->partial_inplace
)
689 /* This is a partial relocation, and we want to apply the relocation
690 to the reloc entry rather than the raw data. Modify the reloc
691 inplace to reflect what we now know. */
692 reloc_entry
->addend
= relocation
;
693 reloc_entry
->address
+= input_section
->output_offset
;
698 /* This is a partial relocation, but inplace, so modify the
701 If we've relocated with a symbol with a section, change
702 into a ref to the section belonging to the symbol. */
704 reloc_entry
->address
+= input_section
->output_offset
;
707 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
708 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
709 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
711 /* For m68k-coff, the addend was being subtracted twice during
712 relocation with -r. Removing the line below this comment
713 fixes that problem; see PR 2953.
715 However, Ian wrote the following, regarding removing the line below,
716 which explains why it is still enabled: --djm
718 If you put a patch like that into BFD you need to check all the COFF
719 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
720 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
721 problem in a different way. There may very well be a reason that the
722 code works as it does.
724 Hmmm. The first obvious point is that bfd_perform_relocation should
725 not have any tests that depend upon the flavour. It's seem like
726 entirely the wrong place for such a thing. The second obvious point
727 is that the current code ignores the reloc addend when producing
728 relocatable output for COFF. That's peculiar. In fact, I really
729 have no idea what the point of the line you want to remove is.
731 A typical COFF reloc subtracts the old value of the symbol and adds in
732 the new value to the location in the object file (if it's a pc
733 relative reloc it adds the difference between the symbol value and the
734 location). When relocating we need to preserve that property.
736 BFD handles this by setting the addend to the negative of the old
737 value of the symbol. Unfortunately it handles common symbols in a
738 non-standard way (it doesn't subtract the old value) but that's a
739 different story (we can't change it without losing backward
740 compatibility with old object files) (coff-i386 does subtract the old
741 value, to be compatible with existing coff-i386 targets, like SCO).
743 So everything works fine when not producing relocatable output. When
744 we are producing relocatable output, logically we should do exactly
745 what we do when not producing relocatable output. Therefore, your
746 patch is correct. In fact, it should probably always just set
747 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
748 add the value into the object file. This won't hurt the COFF code,
749 which doesn't use the addend; I'm not sure what it will do to other
750 formats (the thing to check for would be whether any formats both use
751 the addend and set partial_inplace).
753 When I wanted to make coff-i386 produce relocatable output, I ran
754 into the problem that you are running into: I wanted to remove that
755 line. Rather than risk it, I made the coff-i386 relocs use a special
756 function; it's coff_i386_reloc in coff-i386.c. The function
757 specifically adds the addend field into the object file, knowing that
758 bfd_perform_relocation is not going to. If you remove that line, then
759 coff-i386.c will wind up adding the addend field in twice. It's
760 trivial to fix; it just needs to be done.
762 The problem with removing the line is just that it may break some
763 working code. With BFD it's hard to be sure of anything. The right
764 way to deal with this is simply to build and test at least all the
765 supported COFF targets. It should be straightforward if time and disk
766 space consuming. For each target:
768 2) generate some executable, and link it using -r (I would
769 probably use paranoia.o and link against newlib/libc.a, which
770 for all the supported targets would be available in
771 /usr/cygnus/progressive/H-host/target/lib/libc.a).
772 3) make the change to reloc.c
773 4) rebuild the linker
775 6) if the resulting object files are the same, you have at least
777 7) if they are different you have to figure out which version is
780 relocation
-= reloc_entry
->addend
;
781 reloc_entry
->addend
= 0;
785 reloc_entry
->addend
= relocation
;
791 reloc_entry
->addend
= 0;
794 /* FIXME: This overflow checking is incomplete, because the value
795 might have overflowed before we get here. For a correct check we
796 need to compute the value in a size larger than bitsize, but we
797 can't reasonably do that for a reloc the same size as a host
799 FIXME: We should also do overflow checking on the result after
800 adding in the value contained in the object file. */
801 if (howto
->complain_on_overflow
!= complain_overflow_dont
802 && flag
== bfd_reloc_ok
)
803 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
806 bfd_arch_bits_per_address (abfd
),
809 /* Either we are relocating all the way, or we don't want to apply
810 the relocation to the reloc entry (probably because there isn't
811 any room in the output format to describe addends to relocs). */
813 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
814 (OSF version 1.3, compiler version 3.11). It miscompiles the
828 x <<= (unsigned long) s.i0;
832 printf ("succeeded (%lx)\n", x);
836 relocation
>>= (bfd_vma
) howto
->rightshift
;
838 /* Shift everything up to where it's going to be used. */
839 relocation
<<= (bfd_vma
) howto
->bitpos
;
841 /* Wait for the day when all have the mask in them. */
844 i instruction to be left alone
845 o offset within instruction
846 r relocation offset to apply
855 (( i i i i i o o o o o from bfd_get<size>
856 and S S S S S) to get the size offset we want
857 + r r r r r r r r r r) to get the final value to place
858 and D D D D D to chop to right size
859 -----------------------
862 ( i i i i i o o o o o from bfd_get<size>
863 and N N N N N ) get instruction
864 -----------------------
870 -----------------------
871 = R R R R R R R R R R put into bfd_put<size>
875 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
881 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
883 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
889 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
891 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
896 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
898 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
903 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
904 relocation
= -relocation
;
906 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
912 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
913 relocation
= -relocation
;
915 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
926 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
928 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
935 return bfd_reloc_other
;
943 bfd_install_relocation
946 bfd_reloc_status_type bfd_install_relocation
948 arelent *reloc_entry,
949 void *data, bfd_vma data_start,
950 asection *input_section,
951 char **error_message);
954 This looks remarkably like <<bfd_perform_relocation>>, except it
955 does not expect that the section contents have been filled in.
956 I.e., it's suitable for use when creating, rather than applying
959 For now, this function should be considered reserved for the
963 bfd_reloc_status_type
964 bfd_install_relocation (bfd
*abfd
,
965 arelent
*reloc_entry
,
967 bfd_vma data_start_offset
,
968 asection
*input_section
,
969 char **error_message
)
972 bfd_reloc_status_type flag
= bfd_reloc_ok
;
973 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
974 bfd_vma output_base
= 0;
975 reloc_howto_type
*howto
= reloc_entry
->howto
;
976 asection
*reloc_target_output_section
;
980 symbol
= *(reloc_entry
->sym_ptr_ptr
);
981 if (bfd_is_abs_section (symbol
->section
))
983 reloc_entry
->address
+= input_section
->output_offset
;
987 /* If there is a function supplied to handle this relocation type,
988 call it. It'll return `bfd_reloc_continue' if further processing
990 if (howto
->special_function
)
992 bfd_reloc_status_type cont
;
994 /* XXX - The special_function calls haven't been fixed up to deal
995 with creating new relocations and section contents. */
996 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
997 /* XXX - Non-portable! */
998 ((bfd_byte
*) data_start
999 - data_start_offset
),
1000 input_section
, abfd
, error_message
);
1001 if (cont
!= bfd_reloc_continue
)
1005 /* Is the address of the relocation really within the section? */
1006 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
1007 return bfd_reloc_outofrange
;
1009 /* Work out which section the relocation is targeted at and the
1010 initial relocation command value. */
1012 /* Get symbol value. (Common symbols are special.) */
1013 if (bfd_is_com_section (symbol
->section
))
1016 relocation
= symbol
->value
;
1018 reloc_target_output_section
= symbol
->section
->output_section
;
1020 /* Convert input-section-relative symbol value to absolute. */
1021 if (! howto
->partial_inplace
)
1024 output_base
= reloc_target_output_section
->vma
;
1026 relocation
+= output_base
+ symbol
->section
->output_offset
;
1028 /* Add in supplied addend. */
1029 relocation
+= reloc_entry
->addend
;
1031 /* Here the variable relocation holds the final address of the
1032 symbol we are relocating against, plus any addend. */
1034 if (howto
->pc_relative
)
1036 /* This is a PC relative relocation. We want to set RELOCATION
1037 to the distance between the address of the symbol and the
1038 location. RELOCATION is already the address of the symbol.
1040 We start by subtracting the address of the section containing
1043 If pcrel_offset is set, we must further subtract the position
1044 of the location within the section. Some targets arrange for
1045 the addend to be the negative of the position of the location
1046 within the section; for example, i386-aout does this. For
1047 i386-aout, pcrel_offset is FALSE. Some other targets do not
1048 include the position of the location; for example, m88kbcs,
1049 or ELF. For those targets, pcrel_offset is TRUE.
1051 If we are producing relocatable output, then we must ensure
1052 that this reloc will be correctly computed when the final
1053 relocation is done. If pcrel_offset is FALSE we want to wind
1054 up with the negative of the location within the section,
1055 which means we must adjust the existing addend by the change
1056 in the location within the section. If pcrel_offset is TRUE
1057 we do not want to adjust the existing addend at all.
1059 FIXME: This seems logical to me, but for the case of
1060 producing relocatable output it is not what the code
1061 actually does. I don't want to change it, because it seems
1062 far too likely that something will break. */
1065 input_section
->output_section
->vma
+ input_section
->output_offset
;
1067 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1068 relocation
-= reloc_entry
->address
;
1071 if (! howto
->partial_inplace
)
1073 /* This is a partial relocation, and we want to apply the relocation
1074 to the reloc entry rather than the raw data. Modify the reloc
1075 inplace to reflect what we now know. */
1076 reloc_entry
->addend
= relocation
;
1077 reloc_entry
->address
+= input_section
->output_offset
;
1082 /* This is a partial relocation, but inplace, so modify the
1085 If we've relocated with a symbol with a section, change
1086 into a ref to the section belonging to the symbol. */
1087 reloc_entry
->address
+= input_section
->output_offset
;
1090 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1091 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1092 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1095 /* For m68k-coff, the addend was being subtracted twice during
1096 relocation with -r. Removing the line below this comment
1097 fixes that problem; see PR 2953.
1099 However, Ian wrote the following, regarding removing the line below,
1100 which explains why it is still enabled: --djm
1102 If you put a patch like that into BFD you need to check all the COFF
1103 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1104 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1105 problem in a different way. There may very well be a reason that the
1106 code works as it does.
1108 Hmmm. The first obvious point is that bfd_install_relocation should
1109 not have any tests that depend upon the flavour. It's seem like
1110 entirely the wrong place for such a thing. The second obvious point
1111 is that the current code ignores the reloc addend when producing
1112 relocatable output for COFF. That's peculiar. In fact, I really
1113 have no idea what the point of the line you want to remove is.
1115 A typical COFF reloc subtracts the old value of the symbol and adds in
1116 the new value to the location in the object file (if it's a pc
1117 relative reloc it adds the difference between the symbol value and the
1118 location). When relocating we need to preserve that property.
1120 BFD handles this by setting the addend to the negative of the old
1121 value of the symbol. Unfortunately it handles common symbols in a
1122 non-standard way (it doesn't subtract the old value) but that's a
1123 different story (we can't change it without losing backward
1124 compatibility with old object files) (coff-i386 does subtract the old
1125 value, to be compatible with existing coff-i386 targets, like SCO).
1127 So everything works fine when not producing relocatable output. When
1128 we are producing relocatable output, logically we should do exactly
1129 what we do when not producing relocatable output. Therefore, your
1130 patch is correct. In fact, it should probably always just set
1131 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1132 add the value into the object file. This won't hurt the COFF code,
1133 which doesn't use the addend; I'm not sure what it will do to other
1134 formats (the thing to check for would be whether any formats both use
1135 the addend and set partial_inplace).
1137 When I wanted to make coff-i386 produce relocatable output, I ran
1138 into the problem that you are running into: I wanted to remove that
1139 line. Rather than risk it, I made the coff-i386 relocs use a special
1140 function; it's coff_i386_reloc in coff-i386.c. The function
1141 specifically adds the addend field into the object file, knowing that
1142 bfd_install_relocation is not going to. If you remove that line, then
1143 coff-i386.c will wind up adding the addend field in twice. It's
1144 trivial to fix; it just needs to be done.
1146 The problem with removing the line is just that it may break some
1147 working code. With BFD it's hard to be sure of anything. The right
1148 way to deal with this is simply to build and test at least all the
1149 supported COFF targets. It should be straightforward if time and disk
1150 space consuming. For each target:
1152 2) generate some executable, and link it using -r (I would
1153 probably use paranoia.o and link against newlib/libc.a, which
1154 for all the supported targets would be available in
1155 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1156 3) make the change to reloc.c
1157 4) rebuild the linker
1159 6) if the resulting object files are the same, you have at least
1161 7) if they are different you have to figure out which version is
1163 relocation
-= reloc_entry
->addend
;
1164 /* FIXME: There should be no target specific code here... */
1165 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1166 reloc_entry
->addend
= 0;
1170 reloc_entry
->addend
= relocation
;
1174 /* FIXME: This overflow checking is incomplete, because the value
1175 might have overflowed before we get here. For a correct check we
1176 need to compute the value in a size larger than bitsize, but we
1177 can't reasonably do that for a reloc the same size as a host
1179 FIXME: We should also do overflow checking on the result after
1180 adding in the value contained in the object file. */
1181 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1182 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1185 bfd_arch_bits_per_address (abfd
),
1188 /* Either we are relocating all the way, or we don't want to apply
1189 the relocation to the reloc entry (probably because there isn't
1190 any room in the output format to describe addends to relocs). */
1192 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1193 (OSF version 1.3, compiler version 3.11). It miscompiles the
1207 x <<= (unsigned long) s.i0;
1209 printf ("failed\n");
1211 printf ("succeeded (%lx)\n", x);
1215 relocation
>>= (bfd_vma
) howto
->rightshift
;
1217 /* Shift everything up to where it's going to be used. */
1218 relocation
<<= (bfd_vma
) howto
->bitpos
;
1220 /* Wait for the day when all have the mask in them. */
1223 i instruction to be left alone
1224 o offset within instruction
1225 r relocation offset to apply
1234 (( i i i i i o o o o o from bfd_get<size>
1235 and S S S S S) to get the size offset we want
1236 + r r r r r r r r r r) to get the final value to place
1237 and D D D D D to chop to right size
1238 -----------------------
1241 ( i i i i i o o o o o from bfd_get<size>
1242 and N N N N N ) get instruction
1243 -----------------------
1249 -----------------------
1250 = R R R R R R R R R R put into bfd_put<size>
1254 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1256 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1258 switch (howto
->size
)
1262 char x
= bfd_get_8 (abfd
, data
);
1264 bfd_put_8 (abfd
, x
, data
);
1270 short x
= bfd_get_16 (abfd
, data
);
1272 bfd_put_16 (abfd
, (bfd_vma
) x
, data
);
1277 long x
= bfd_get_32 (abfd
, data
);
1279 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1284 long x
= bfd_get_32 (abfd
, data
);
1285 relocation
= -relocation
;
1287 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1297 bfd_vma x
= bfd_get_64 (abfd
, data
);
1299 bfd_put_64 (abfd
, x
, data
);
1303 return bfd_reloc_other
;
1309 /* This relocation routine is used by some of the backend linkers.
1310 They do not construct asymbol or arelent structures, so there is no
1311 reason for them to use bfd_perform_relocation. Also,
1312 bfd_perform_relocation is so hacked up it is easier to write a new
1313 function than to try to deal with it.
1315 This routine does a final relocation. Whether it is useful for a
1316 relocatable link depends upon how the object format defines
1319 FIXME: This routine ignores any special_function in the HOWTO,
1320 since the existing special_function values have been written for
1321 bfd_perform_relocation.
1323 HOWTO is the reloc howto information.
1324 INPUT_BFD is the BFD which the reloc applies to.
1325 INPUT_SECTION is the section which the reloc applies to.
1326 CONTENTS is the contents of the section.
1327 ADDRESS is the address of the reloc within INPUT_SECTION.
1328 VALUE is the value of the symbol the reloc refers to.
1329 ADDEND is the addend of the reloc. */
1331 bfd_reloc_status_type
1332 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1334 asection
*input_section
,
1342 /* Sanity check the address. */
1343 if (address
> bfd_get_section_limit (input_bfd
, input_section
))
1344 return bfd_reloc_outofrange
;
1346 /* This function assumes that we are dealing with a basic relocation
1347 against a symbol. We want to compute the value of the symbol to
1348 relocate to. This is just VALUE, the value of the symbol, plus
1349 ADDEND, any addend associated with the reloc. */
1350 relocation
= value
+ addend
;
1352 /* If the relocation is PC relative, we want to set RELOCATION to
1353 the distance between the symbol (currently in RELOCATION) and the
1354 location we are relocating. Some targets (e.g., i386-aout)
1355 arrange for the contents of the section to be the negative of the
1356 offset of the location within the section; for such targets
1357 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1358 simply leave the contents of the section as zero; for such
1359 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1360 need to subtract out the offset of the location within the
1361 section (which is just ADDRESS). */
1362 if (howto
->pc_relative
)
1364 relocation
-= (input_section
->output_section
->vma
1365 + input_section
->output_offset
);
1366 if (howto
->pcrel_offset
)
1367 relocation
-= address
;
1370 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1371 contents
+ address
);
1374 /* Relocate a given location using a given value and howto. */
1376 bfd_reloc_status_type
1377 _bfd_relocate_contents (reloc_howto_type
*howto
,
1384 bfd_reloc_status_type flag
;
1385 unsigned int rightshift
= howto
->rightshift
;
1386 unsigned int bitpos
= howto
->bitpos
;
1388 /* If the size is negative, negate RELOCATION. This isn't very
1390 if (howto
->size
< 0)
1391 relocation
= -relocation
;
1393 /* Get the value we are going to relocate. */
1394 size
= bfd_get_reloc_size (howto
);
1401 x
= bfd_get_8 (input_bfd
, location
);
1404 x
= bfd_get_16 (input_bfd
, location
);
1407 x
= bfd_get_32 (input_bfd
, location
);
1411 x
= bfd_get_64 (input_bfd
, location
);
1418 /* Check for overflow. FIXME: We may drop bits during the addition
1419 which we don't check for. We must either check at every single
1420 operation, which would be tedious, or we must do the computations
1421 in a type larger than bfd_vma, which would be inefficient. */
1422 flag
= bfd_reloc_ok
;
1423 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1425 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1428 /* Get the values to be added together. For signed and unsigned
1429 relocations, we assume that all values should be truncated to
1430 the size of an address. For bitfields, all the bits matter.
1431 See also bfd_check_overflow. */
1432 fieldmask
= N_ONES (howto
->bitsize
);
1433 signmask
= ~fieldmask
;
1434 addrmask
= (N_ONES (bfd_arch_bits_per_address (input_bfd
))
1435 | (fieldmask
<< rightshift
));
1436 a
= (relocation
& addrmask
) >> rightshift
;
1437 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1438 addrmask
>>= rightshift
;
1440 switch (howto
->complain_on_overflow
)
1442 case complain_overflow_signed
:
1443 /* If any sign bits are set, all sign bits must be set.
1444 That is, A must be a valid negative address after
1446 signmask
= ~(fieldmask
>> 1);
1449 case complain_overflow_bitfield
:
1450 /* Much like the signed check, but for a field one bit
1451 wider. We allow a bitfield to represent numbers in the
1452 range -2**n to 2**n-1, where n is the number of bits in the
1453 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1454 can't overflow, which is exactly what we want. */
1456 if (ss
!= 0 && ss
!= (addrmask
& signmask
))
1457 flag
= bfd_reloc_overflow
;
1459 /* We only need this next bit of code if the sign bit of B
1460 is below the sign bit of A. This would only happen if
1461 SRC_MASK had fewer bits than BITSIZE. Note that if
1462 SRC_MASK has more bits than BITSIZE, we can get into
1463 trouble; we would need to verify that B is in range, as
1464 we do for A above. */
1465 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1468 /* Set all the bits above the sign bit. */
1471 /* Now we can do the addition. */
1474 /* See if the result has the correct sign. Bits above the
1475 sign bit are junk now; ignore them. If the sum is
1476 positive, make sure we did not have all negative inputs;
1477 if the sum is negative, make sure we did not have all
1478 positive inputs. The test below looks only at the sign
1479 bits, and it really just
1480 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1482 We mask with addrmask here to explicitly allow an address
1483 wrap-around. The Linux kernel relies on it, and it is
1484 the only way to write assembler code which can run when
1485 loaded at a location 0x80000000 away from the location at
1486 which it is linked. */
1487 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1488 flag
= bfd_reloc_overflow
;
1491 case complain_overflow_unsigned
:
1492 /* Checking for an unsigned overflow is relatively easy:
1493 trim the addresses and add, and trim the result as well.
1494 Overflow is normally indicated when the result does not
1495 fit in the field. However, we also need to consider the
1496 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1497 input is 0x80000000, and bfd_vma is only 32 bits; then we
1498 will get sum == 0, but there is an overflow, since the
1499 inputs did not fit in the field. Instead of doing a
1500 separate test, we can check for this by or-ing in the
1501 operands when testing for the sum overflowing its final
1503 sum
= (a
+ b
) & addrmask
;
1504 if ((a
| b
| sum
) & signmask
)
1505 flag
= bfd_reloc_overflow
;
1513 /* Put RELOCATION in the right bits. */
1514 relocation
>>= (bfd_vma
) rightshift
;
1515 relocation
<<= (bfd_vma
) bitpos
;
1517 /* Add RELOCATION to the right bits of X. */
1518 x
= ((x
& ~howto
->dst_mask
)
1519 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1521 /* Put the relocated value back in the object file. */
1527 bfd_put_8 (input_bfd
, x
, location
);
1530 bfd_put_16 (input_bfd
, x
, location
);
1533 bfd_put_32 (input_bfd
, x
, location
);
1537 bfd_put_64 (input_bfd
, x
, location
);
1547 /* Clear a given location using a given howto, by applying a relocation value
1548 of zero and discarding any in-place addend. This is used for fixed-up
1549 relocations against discarded symbols, to make ignorable debug or unwind
1550 information more obvious. */
1553 _bfd_clear_contents (reloc_howto_type
*howto
,
1560 /* Get the value we are going to relocate. */
1561 size
= bfd_get_reloc_size (howto
);
1568 x
= bfd_get_8 (input_bfd
, location
);
1571 x
= bfd_get_16 (input_bfd
, location
);
1574 x
= bfd_get_32 (input_bfd
, location
);
1578 x
= bfd_get_64 (input_bfd
, location
);
1585 /* Zero out the unwanted bits of X. */
1586 x
&= ~howto
->dst_mask
;
1588 /* Put the relocated value back in the object file. */
1595 bfd_put_8 (input_bfd
, x
, location
);
1598 bfd_put_16 (input_bfd
, x
, location
);
1601 bfd_put_32 (input_bfd
, x
, location
);
1605 bfd_put_64 (input_bfd
, x
, location
);
1616 howto manager, , typedef arelent, Relocations
1621 When an application wants to create a relocation, but doesn't
1622 know what the target machine might call it, it can find out by
1623 using this bit of code.
1632 The insides of a reloc code. The idea is that, eventually, there
1633 will be one enumerator for every type of relocation we ever do.
1634 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1635 return a howto pointer.
1637 This does mean that the application must determine the correct
1638 enumerator value; you can't get a howto pointer from a random set
1659 Basic absolute relocations of N bits.
1674 PC-relative relocations. Sometimes these are relative to the address
1675 of the relocation itself; sometimes they are relative to the start of
1676 the section containing the relocation. It depends on the specific target.
1678 The 24-bit relocation is used in some Intel 960 configurations.
1683 Section relative relocations. Some targets need this for DWARF2.
1686 BFD_RELOC_32_GOT_PCREL
1688 BFD_RELOC_16_GOT_PCREL
1690 BFD_RELOC_8_GOT_PCREL
1696 BFD_RELOC_LO16_GOTOFF
1698 BFD_RELOC_HI16_GOTOFF
1700 BFD_RELOC_HI16_S_GOTOFF
1704 BFD_RELOC_64_PLT_PCREL
1706 BFD_RELOC_32_PLT_PCREL
1708 BFD_RELOC_24_PLT_PCREL
1710 BFD_RELOC_16_PLT_PCREL
1712 BFD_RELOC_8_PLT_PCREL
1720 BFD_RELOC_LO16_PLTOFF
1722 BFD_RELOC_HI16_PLTOFF
1724 BFD_RELOC_HI16_S_PLTOFF
1731 BFD_RELOC_68K_GLOB_DAT
1733 BFD_RELOC_68K_JMP_SLOT
1735 BFD_RELOC_68K_RELATIVE
1737 BFD_RELOC_68K_TLS_GD32
1739 BFD_RELOC_68K_TLS_GD16
1741 BFD_RELOC_68K_TLS_GD8
1743 BFD_RELOC_68K_TLS_LDM32
1745 BFD_RELOC_68K_TLS_LDM16
1747 BFD_RELOC_68K_TLS_LDM8
1749 BFD_RELOC_68K_TLS_LDO32
1751 BFD_RELOC_68K_TLS_LDO16
1753 BFD_RELOC_68K_TLS_LDO8
1755 BFD_RELOC_68K_TLS_IE32
1757 BFD_RELOC_68K_TLS_IE16
1759 BFD_RELOC_68K_TLS_IE8
1761 BFD_RELOC_68K_TLS_LE32
1763 BFD_RELOC_68K_TLS_LE16
1765 BFD_RELOC_68K_TLS_LE8
1767 Relocations used by 68K ELF.
1770 BFD_RELOC_32_BASEREL
1772 BFD_RELOC_16_BASEREL
1774 BFD_RELOC_LO16_BASEREL
1776 BFD_RELOC_HI16_BASEREL
1778 BFD_RELOC_HI16_S_BASEREL
1784 Linkage-table relative.
1789 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1792 BFD_RELOC_32_PCREL_S2
1794 BFD_RELOC_16_PCREL_S2
1796 BFD_RELOC_23_PCREL_S2
1798 These PC-relative relocations are stored as word displacements --
1799 i.e., byte displacements shifted right two bits. The 30-bit word
1800 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1801 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1802 signed 16-bit displacement is used on the MIPS, and the 23-bit
1803 displacement is used on the Alpha.
1810 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1811 the target word. These are used on the SPARC.
1818 For systems that allocate a Global Pointer register, these are
1819 displacements off that register. These relocation types are
1820 handled specially, because the value the register will have is
1821 decided relatively late.
1824 BFD_RELOC_I960_CALLJ
1826 Reloc types used for i960/b.out.
1831 BFD_RELOC_SPARC_WDISP22
1837 BFD_RELOC_SPARC_GOT10
1839 BFD_RELOC_SPARC_GOT13
1841 BFD_RELOC_SPARC_GOT22
1843 BFD_RELOC_SPARC_PC10
1845 BFD_RELOC_SPARC_PC22
1847 BFD_RELOC_SPARC_WPLT30
1849 BFD_RELOC_SPARC_COPY
1851 BFD_RELOC_SPARC_GLOB_DAT
1853 BFD_RELOC_SPARC_JMP_SLOT
1855 BFD_RELOC_SPARC_RELATIVE
1857 BFD_RELOC_SPARC_UA16
1859 BFD_RELOC_SPARC_UA32
1861 BFD_RELOC_SPARC_UA64
1863 BFD_RELOC_SPARC_GOTDATA_HIX22
1865 BFD_RELOC_SPARC_GOTDATA_LOX10
1867 BFD_RELOC_SPARC_GOTDATA_OP_HIX22
1869 BFD_RELOC_SPARC_GOTDATA_OP_LOX10
1871 BFD_RELOC_SPARC_GOTDATA_OP
1873 BFD_RELOC_SPARC_JMP_IREL
1875 BFD_RELOC_SPARC_IRELATIVE
1877 SPARC ELF relocations. There is probably some overlap with other
1878 relocation types already defined.
1881 BFD_RELOC_SPARC_BASE13
1883 BFD_RELOC_SPARC_BASE22
1885 I think these are specific to SPARC a.out (e.g., Sun 4).
1895 BFD_RELOC_SPARC_OLO10
1897 BFD_RELOC_SPARC_HH22
1899 BFD_RELOC_SPARC_HM10
1901 BFD_RELOC_SPARC_LM22
1903 BFD_RELOC_SPARC_PC_HH22
1905 BFD_RELOC_SPARC_PC_HM10
1907 BFD_RELOC_SPARC_PC_LM22
1909 BFD_RELOC_SPARC_WDISP16
1911 BFD_RELOC_SPARC_WDISP19
1919 BFD_RELOC_SPARC_DISP64
1922 BFD_RELOC_SPARC_PLT32
1924 BFD_RELOC_SPARC_PLT64
1926 BFD_RELOC_SPARC_HIX22
1928 BFD_RELOC_SPARC_LOX10
1936 BFD_RELOC_SPARC_REGISTER
1941 BFD_RELOC_SPARC_REV32
1943 SPARC little endian relocation
1945 BFD_RELOC_SPARC_TLS_GD_HI22
1947 BFD_RELOC_SPARC_TLS_GD_LO10
1949 BFD_RELOC_SPARC_TLS_GD_ADD
1951 BFD_RELOC_SPARC_TLS_GD_CALL
1953 BFD_RELOC_SPARC_TLS_LDM_HI22
1955 BFD_RELOC_SPARC_TLS_LDM_LO10
1957 BFD_RELOC_SPARC_TLS_LDM_ADD
1959 BFD_RELOC_SPARC_TLS_LDM_CALL
1961 BFD_RELOC_SPARC_TLS_LDO_HIX22
1963 BFD_RELOC_SPARC_TLS_LDO_LOX10
1965 BFD_RELOC_SPARC_TLS_LDO_ADD
1967 BFD_RELOC_SPARC_TLS_IE_HI22
1969 BFD_RELOC_SPARC_TLS_IE_LO10
1971 BFD_RELOC_SPARC_TLS_IE_LD
1973 BFD_RELOC_SPARC_TLS_IE_LDX
1975 BFD_RELOC_SPARC_TLS_IE_ADD
1977 BFD_RELOC_SPARC_TLS_LE_HIX22
1979 BFD_RELOC_SPARC_TLS_LE_LOX10
1981 BFD_RELOC_SPARC_TLS_DTPMOD32
1983 BFD_RELOC_SPARC_TLS_DTPMOD64
1985 BFD_RELOC_SPARC_TLS_DTPOFF32
1987 BFD_RELOC_SPARC_TLS_DTPOFF64
1989 BFD_RELOC_SPARC_TLS_TPOFF32
1991 BFD_RELOC_SPARC_TLS_TPOFF64
1993 SPARC TLS relocations
2002 BFD_RELOC_SPU_IMM10W
2006 BFD_RELOC_SPU_IMM16W
2010 BFD_RELOC_SPU_PCREL9a
2012 BFD_RELOC_SPU_PCREL9b
2014 BFD_RELOC_SPU_PCREL16
2024 BFD_RELOC_SPU_ADD_PIC
2029 BFD_RELOC_ALPHA_GPDISP_HI16
2031 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
2032 "addend" in some special way.
2033 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
2034 writing; when reading, it will be the absolute section symbol. The
2035 addend is the displacement in bytes of the "lda" instruction from
2036 the "ldah" instruction (which is at the address of this reloc).
2038 BFD_RELOC_ALPHA_GPDISP_LO16
2040 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
2041 with GPDISP_HI16 relocs. The addend is ignored when writing the
2042 relocations out, and is filled in with the file's GP value on
2043 reading, for convenience.
2046 BFD_RELOC_ALPHA_GPDISP
2048 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
2049 relocation except that there is no accompanying GPDISP_LO16
2053 BFD_RELOC_ALPHA_LITERAL
2055 BFD_RELOC_ALPHA_ELF_LITERAL
2057 BFD_RELOC_ALPHA_LITUSE
2059 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
2060 the assembler turns it into a LDQ instruction to load the address of
2061 the symbol, and then fills in a register in the real instruction.
2063 The LITERAL reloc, at the LDQ instruction, refers to the .lita
2064 section symbol. The addend is ignored when writing, but is filled
2065 in with the file's GP value on reading, for convenience, as with the
2068 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
2069 It should refer to the symbol to be referenced, as with 16_GOTOFF,
2070 but it generates output not based on the position within the .got
2071 section, but relative to the GP value chosen for the file during the
2074 The LITUSE reloc, on the instruction using the loaded address, gives
2075 information to the linker that it might be able to use to optimize
2076 away some literal section references. The symbol is ignored (read
2077 as the absolute section symbol), and the "addend" indicates the type
2078 of instruction using the register:
2079 1 - "memory" fmt insn
2080 2 - byte-manipulation (byte offset reg)
2081 3 - jsr (target of branch)
2084 BFD_RELOC_ALPHA_HINT
2086 The HINT relocation indicates a value that should be filled into the
2087 "hint" field of a jmp/jsr/ret instruction, for possible branch-
2088 prediction logic which may be provided on some processors.
2091 BFD_RELOC_ALPHA_LINKAGE
2093 The LINKAGE relocation outputs a linkage pair in the object file,
2094 which is filled by the linker.
2097 BFD_RELOC_ALPHA_CODEADDR
2099 The CODEADDR relocation outputs a STO_CA in the object file,
2100 which is filled by the linker.
2103 BFD_RELOC_ALPHA_GPREL_HI16
2105 BFD_RELOC_ALPHA_GPREL_LO16
2107 The GPREL_HI/LO relocations together form a 32-bit offset from the
2111 BFD_RELOC_ALPHA_BRSGP
2113 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2114 share a common GP, and the target address is adjusted for
2115 STO_ALPHA_STD_GPLOAD.
2120 The NOP relocation outputs a NOP if the longword displacement
2121 between two procedure entry points is < 2^21.
2126 The BSR relocation outputs a BSR if the longword displacement
2127 between two procedure entry points is < 2^21.
2132 The LDA relocation outputs a LDA if the longword displacement
2133 between two procedure entry points is < 2^16.
2138 The BOH relocation outputs a BSR if the longword displacement
2139 between two procedure entry points is < 2^21, or else a hint.
2142 BFD_RELOC_ALPHA_TLSGD
2144 BFD_RELOC_ALPHA_TLSLDM
2146 BFD_RELOC_ALPHA_DTPMOD64
2148 BFD_RELOC_ALPHA_GOTDTPREL16
2150 BFD_RELOC_ALPHA_DTPREL64
2152 BFD_RELOC_ALPHA_DTPREL_HI16
2154 BFD_RELOC_ALPHA_DTPREL_LO16
2156 BFD_RELOC_ALPHA_DTPREL16
2158 BFD_RELOC_ALPHA_GOTTPREL16
2160 BFD_RELOC_ALPHA_TPREL64
2162 BFD_RELOC_ALPHA_TPREL_HI16
2164 BFD_RELOC_ALPHA_TPREL_LO16
2166 BFD_RELOC_ALPHA_TPREL16
2168 Alpha thread-local storage relocations.
2173 Bits 27..2 of the relocation address shifted right 2 bits;
2174 simple reloc otherwise.
2177 BFD_RELOC_MIPS16_JMP
2179 The MIPS16 jump instruction.
2182 BFD_RELOC_MIPS16_GPREL
2184 MIPS16 GP relative reloc.
2189 High 16 bits of 32-bit value; simple reloc.
2193 High 16 bits of 32-bit value but the low 16 bits will be sign
2194 extended and added to form the final result. If the low 16
2195 bits form a negative number, we need to add one to the high value
2196 to compensate for the borrow when the low bits are added.
2203 BFD_RELOC_HI16_PCREL
2205 High 16 bits of 32-bit pc-relative value
2207 BFD_RELOC_HI16_S_PCREL
2209 High 16 bits of 32-bit pc-relative value, adjusted
2211 BFD_RELOC_LO16_PCREL
2213 Low 16 bits of pc-relative value
2216 BFD_RELOC_MIPS16_GOT16
2218 BFD_RELOC_MIPS16_CALL16
2220 Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
2221 16-bit immediate fields
2223 BFD_RELOC_MIPS16_HI16
2225 MIPS16 high 16 bits of 32-bit value.
2227 BFD_RELOC_MIPS16_HI16_S
2229 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2230 extended and added to form the final result. If the low 16
2231 bits form a negative number, we need to add one to the high value
2232 to compensate for the borrow when the low bits are added.
2234 BFD_RELOC_MIPS16_LO16
2239 BFD_RELOC_MIPS_LITERAL
2241 Relocation against a MIPS literal section.
2244 BFD_RELOC_MIPS_GOT16
2246 BFD_RELOC_MIPS_CALL16
2248 BFD_RELOC_MIPS_GOT_HI16
2250 BFD_RELOC_MIPS_GOT_LO16
2252 BFD_RELOC_MIPS_CALL_HI16
2254 BFD_RELOC_MIPS_CALL_LO16
2258 BFD_RELOC_MIPS_GOT_PAGE
2260 BFD_RELOC_MIPS_GOT_OFST
2262 BFD_RELOC_MIPS_GOT_DISP
2264 BFD_RELOC_MIPS_SHIFT5
2266 BFD_RELOC_MIPS_SHIFT6
2268 BFD_RELOC_MIPS_INSERT_A
2270 BFD_RELOC_MIPS_INSERT_B
2272 BFD_RELOC_MIPS_DELETE
2274 BFD_RELOC_MIPS_HIGHEST
2276 BFD_RELOC_MIPS_HIGHER
2278 BFD_RELOC_MIPS_SCN_DISP
2280 BFD_RELOC_MIPS_REL16
2282 BFD_RELOC_MIPS_RELGOT
2286 BFD_RELOC_MIPS_TLS_DTPMOD32
2288 BFD_RELOC_MIPS_TLS_DTPREL32
2290 BFD_RELOC_MIPS_TLS_DTPMOD64
2292 BFD_RELOC_MIPS_TLS_DTPREL64
2294 BFD_RELOC_MIPS_TLS_GD
2296 BFD_RELOC_MIPS_TLS_LDM
2298 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2300 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2302 BFD_RELOC_MIPS_TLS_GOTTPREL
2304 BFD_RELOC_MIPS_TLS_TPREL32
2306 BFD_RELOC_MIPS_TLS_TPREL64
2308 BFD_RELOC_MIPS_TLS_TPREL_HI16
2310 BFD_RELOC_MIPS_TLS_TPREL_LO16
2312 MIPS ELF relocations.
2318 BFD_RELOC_MIPS_JUMP_SLOT
2320 MIPS ELF relocations (VxWorks and PLT extensions).
2324 BFD_RELOC_MOXIE_10_PCREL
2326 Moxie ELF relocations.
2330 BFD_RELOC_FRV_LABEL16
2332 BFD_RELOC_FRV_LABEL24
2338 BFD_RELOC_FRV_GPREL12
2340 BFD_RELOC_FRV_GPRELU12
2342 BFD_RELOC_FRV_GPREL32
2344 BFD_RELOC_FRV_GPRELHI
2346 BFD_RELOC_FRV_GPRELLO
2354 BFD_RELOC_FRV_FUNCDESC
2356 BFD_RELOC_FRV_FUNCDESC_GOT12
2358 BFD_RELOC_FRV_FUNCDESC_GOTHI
2360 BFD_RELOC_FRV_FUNCDESC_GOTLO
2362 BFD_RELOC_FRV_FUNCDESC_VALUE
2364 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2366 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2368 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2370 BFD_RELOC_FRV_GOTOFF12
2372 BFD_RELOC_FRV_GOTOFFHI
2374 BFD_RELOC_FRV_GOTOFFLO
2376 BFD_RELOC_FRV_GETTLSOFF
2378 BFD_RELOC_FRV_TLSDESC_VALUE
2380 BFD_RELOC_FRV_GOTTLSDESC12
2382 BFD_RELOC_FRV_GOTTLSDESCHI
2384 BFD_RELOC_FRV_GOTTLSDESCLO
2386 BFD_RELOC_FRV_TLSMOFF12
2388 BFD_RELOC_FRV_TLSMOFFHI
2390 BFD_RELOC_FRV_TLSMOFFLO
2392 BFD_RELOC_FRV_GOTTLSOFF12
2394 BFD_RELOC_FRV_GOTTLSOFFHI
2396 BFD_RELOC_FRV_GOTTLSOFFLO
2398 BFD_RELOC_FRV_TLSOFF
2400 BFD_RELOC_FRV_TLSDESC_RELAX
2402 BFD_RELOC_FRV_GETTLSOFF_RELAX
2404 BFD_RELOC_FRV_TLSOFF_RELAX
2406 BFD_RELOC_FRV_TLSMOFF
2408 Fujitsu Frv Relocations.
2412 BFD_RELOC_MN10300_GOTOFF24
2414 This is a 24bit GOT-relative reloc for the mn10300.
2416 BFD_RELOC_MN10300_GOT32
2418 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2421 BFD_RELOC_MN10300_GOT24
2423 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2426 BFD_RELOC_MN10300_GOT16
2428 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2431 BFD_RELOC_MN10300_COPY
2433 Copy symbol at runtime.
2435 BFD_RELOC_MN10300_GLOB_DAT
2439 BFD_RELOC_MN10300_JMP_SLOT
2443 BFD_RELOC_MN10300_RELATIVE
2445 Adjust by program base.
2447 BFD_RELOC_MN10300_SYM_DIFF
2449 Together with another reloc targeted at the same location,
2450 allows for a value that is the difference of two symbols
2451 in the same section.
2453 BFD_RELOC_MN10300_ALIGN
2455 The addend of this reloc is an alignment power that must
2456 be honoured at the offset's location, regardless of linker
2467 BFD_RELOC_386_GLOB_DAT
2469 BFD_RELOC_386_JUMP_SLOT
2471 BFD_RELOC_386_RELATIVE
2473 BFD_RELOC_386_GOTOFF
2477 BFD_RELOC_386_TLS_TPOFF
2479 BFD_RELOC_386_TLS_IE
2481 BFD_RELOC_386_TLS_GOTIE
2483 BFD_RELOC_386_TLS_LE
2485 BFD_RELOC_386_TLS_GD
2487 BFD_RELOC_386_TLS_LDM
2489 BFD_RELOC_386_TLS_LDO_32
2491 BFD_RELOC_386_TLS_IE_32
2493 BFD_RELOC_386_TLS_LE_32
2495 BFD_RELOC_386_TLS_DTPMOD32
2497 BFD_RELOC_386_TLS_DTPOFF32
2499 BFD_RELOC_386_TLS_TPOFF32
2501 BFD_RELOC_386_TLS_GOTDESC
2503 BFD_RELOC_386_TLS_DESC_CALL
2505 BFD_RELOC_386_TLS_DESC
2507 BFD_RELOC_386_IRELATIVE
2509 i386/elf relocations
2512 BFD_RELOC_X86_64_GOT32
2514 BFD_RELOC_X86_64_PLT32
2516 BFD_RELOC_X86_64_COPY
2518 BFD_RELOC_X86_64_GLOB_DAT
2520 BFD_RELOC_X86_64_JUMP_SLOT
2522 BFD_RELOC_X86_64_RELATIVE
2524 BFD_RELOC_X86_64_GOTPCREL
2526 BFD_RELOC_X86_64_32S
2528 BFD_RELOC_X86_64_DTPMOD64
2530 BFD_RELOC_X86_64_DTPOFF64
2532 BFD_RELOC_X86_64_TPOFF64
2534 BFD_RELOC_X86_64_TLSGD
2536 BFD_RELOC_X86_64_TLSLD
2538 BFD_RELOC_X86_64_DTPOFF32
2540 BFD_RELOC_X86_64_GOTTPOFF
2542 BFD_RELOC_X86_64_TPOFF32
2544 BFD_RELOC_X86_64_GOTOFF64
2546 BFD_RELOC_X86_64_GOTPC32
2548 BFD_RELOC_X86_64_GOT64
2550 BFD_RELOC_X86_64_GOTPCREL64
2552 BFD_RELOC_X86_64_GOTPC64
2554 BFD_RELOC_X86_64_GOTPLT64
2556 BFD_RELOC_X86_64_PLTOFF64
2558 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2560 BFD_RELOC_X86_64_TLSDESC_CALL
2562 BFD_RELOC_X86_64_TLSDESC
2564 BFD_RELOC_X86_64_IRELATIVE
2566 x86-64/elf relocations
2569 BFD_RELOC_NS32K_IMM_8
2571 BFD_RELOC_NS32K_IMM_16
2573 BFD_RELOC_NS32K_IMM_32
2575 BFD_RELOC_NS32K_IMM_8_PCREL
2577 BFD_RELOC_NS32K_IMM_16_PCREL
2579 BFD_RELOC_NS32K_IMM_32_PCREL
2581 BFD_RELOC_NS32K_DISP_8
2583 BFD_RELOC_NS32K_DISP_16
2585 BFD_RELOC_NS32K_DISP_32
2587 BFD_RELOC_NS32K_DISP_8_PCREL
2589 BFD_RELOC_NS32K_DISP_16_PCREL
2591 BFD_RELOC_NS32K_DISP_32_PCREL
2596 BFD_RELOC_PDP11_DISP_8_PCREL
2598 BFD_RELOC_PDP11_DISP_6_PCREL
2603 BFD_RELOC_PJ_CODE_HI16
2605 BFD_RELOC_PJ_CODE_LO16
2607 BFD_RELOC_PJ_CODE_DIR16
2609 BFD_RELOC_PJ_CODE_DIR32
2611 BFD_RELOC_PJ_CODE_REL16
2613 BFD_RELOC_PJ_CODE_REL32
2615 Picojava relocs. Not all of these appear in object files.
2626 BFD_RELOC_PPC_B16_BRTAKEN
2628 BFD_RELOC_PPC_B16_BRNTAKEN
2632 BFD_RELOC_PPC_BA16_BRTAKEN
2634 BFD_RELOC_PPC_BA16_BRNTAKEN
2638 BFD_RELOC_PPC_GLOB_DAT
2640 BFD_RELOC_PPC_JMP_SLOT
2642 BFD_RELOC_PPC_RELATIVE
2644 BFD_RELOC_PPC_LOCAL24PC
2646 BFD_RELOC_PPC_EMB_NADDR32
2648 BFD_RELOC_PPC_EMB_NADDR16
2650 BFD_RELOC_PPC_EMB_NADDR16_LO
2652 BFD_RELOC_PPC_EMB_NADDR16_HI
2654 BFD_RELOC_PPC_EMB_NADDR16_HA
2656 BFD_RELOC_PPC_EMB_SDAI16
2658 BFD_RELOC_PPC_EMB_SDA2I16
2660 BFD_RELOC_PPC_EMB_SDA2REL
2662 BFD_RELOC_PPC_EMB_SDA21
2664 BFD_RELOC_PPC_EMB_MRKREF
2666 BFD_RELOC_PPC_EMB_RELSEC16
2668 BFD_RELOC_PPC_EMB_RELST_LO
2670 BFD_RELOC_PPC_EMB_RELST_HI
2672 BFD_RELOC_PPC_EMB_RELST_HA
2674 BFD_RELOC_PPC_EMB_BIT_FLD
2676 BFD_RELOC_PPC_EMB_RELSDA
2678 BFD_RELOC_PPC64_HIGHER
2680 BFD_RELOC_PPC64_HIGHER_S
2682 BFD_RELOC_PPC64_HIGHEST
2684 BFD_RELOC_PPC64_HIGHEST_S
2686 BFD_RELOC_PPC64_TOC16_LO
2688 BFD_RELOC_PPC64_TOC16_HI
2690 BFD_RELOC_PPC64_TOC16_HA
2694 BFD_RELOC_PPC64_PLTGOT16
2696 BFD_RELOC_PPC64_PLTGOT16_LO
2698 BFD_RELOC_PPC64_PLTGOT16_HI
2700 BFD_RELOC_PPC64_PLTGOT16_HA
2702 BFD_RELOC_PPC64_ADDR16_DS
2704 BFD_RELOC_PPC64_ADDR16_LO_DS
2706 BFD_RELOC_PPC64_GOT16_DS
2708 BFD_RELOC_PPC64_GOT16_LO_DS
2710 BFD_RELOC_PPC64_PLT16_LO_DS
2712 BFD_RELOC_PPC64_SECTOFF_DS
2714 BFD_RELOC_PPC64_SECTOFF_LO_DS
2716 BFD_RELOC_PPC64_TOC16_DS
2718 BFD_RELOC_PPC64_TOC16_LO_DS
2720 BFD_RELOC_PPC64_PLTGOT16_DS
2722 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2724 Power(rs6000) and PowerPC relocations.
2733 BFD_RELOC_PPC_DTPMOD
2735 BFD_RELOC_PPC_TPREL16
2737 BFD_RELOC_PPC_TPREL16_LO
2739 BFD_RELOC_PPC_TPREL16_HI
2741 BFD_RELOC_PPC_TPREL16_HA
2745 BFD_RELOC_PPC_DTPREL16
2747 BFD_RELOC_PPC_DTPREL16_LO
2749 BFD_RELOC_PPC_DTPREL16_HI
2751 BFD_RELOC_PPC_DTPREL16_HA
2753 BFD_RELOC_PPC_DTPREL
2755 BFD_RELOC_PPC_GOT_TLSGD16
2757 BFD_RELOC_PPC_GOT_TLSGD16_LO
2759 BFD_RELOC_PPC_GOT_TLSGD16_HI
2761 BFD_RELOC_PPC_GOT_TLSGD16_HA
2763 BFD_RELOC_PPC_GOT_TLSLD16
2765 BFD_RELOC_PPC_GOT_TLSLD16_LO
2767 BFD_RELOC_PPC_GOT_TLSLD16_HI
2769 BFD_RELOC_PPC_GOT_TLSLD16_HA
2771 BFD_RELOC_PPC_GOT_TPREL16
2773 BFD_RELOC_PPC_GOT_TPREL16_LO
2775 BFD_RELOC_PPC_GOT_TPREL16_HI
2777 BFD_RELOC_PPC_GOT_TPREL16_HA
2779 BFD_RELOC_PPC_GOT_DTPREL16
2781 BFD_RELOC_PPC_GOT_DTPREL16_LO
2783 BFD_RELOC_PPC_GOT_DTPREL16_HI
2785 BFD_RELOC_PPC_GOT_DTPREL16_HA
2787 BFD_RELOC_PPC64_TPREL16_DS
2789 BFD_RELOC_PPC64_TPREL16_LO_DS
2791 BFD_RELOC_PPC64_TPREL16_HIGHER
2793 BFD_RELOC_PPC64_TPREL16_HIGHERA
2795 BFD_RELOC_PPC64_TPREL16_HIGHEST
2797 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2799 BFD_RELOC_PPC64_DTPREL16_DS
2801 BFD_RELOC_PPC64_DTPREL16_LO_DS
2803 BFD_RELOC_PPC64_DTPREL16_HIGHER
2805 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2807 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2809 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2811 PowerPC and PowerPC64 thread-local storage relocations.
2816 IBM 370/390 relocations
2821 The type of reloc used to build a constructor table - at the moment
2822 probably a 32 bit wide absolute relocation, but the target can choose.
2823 It generally does map to one of the other relocation types.
2826 BFD_RELOC_ARM_PCREL_BRANCH
2828 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2829 not stored in the instruction.
2831 BFD_RELOC_ARM_PCREL_BLX
2833 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2834 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2835 field in the instruction.
2837 BFD_RELOC_THUMB_PCREL_BLX
2839 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2840 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2841 field in the instruction.
2843 BFD_RELOC_ARM_PCREL_CALL
2845 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
2847 BFD_RELOC_ARM_PCREL_JUMP
2849 ARM 26-bit pc-relative branch for B or conditional BL instruction.
2852 BFD_RELOC_THUMB_PCREL_BRANCH7
2854 BFD_RELOC_THUMB_PCREL_BRANCH9
2856 BFD_RELOC_THUMB_PCREL_BRANCH12
2858 BFD_RELOC_THUMB_PCREL_BRANCH20
2860 BFD_RELOC_THUMB_PCREL_BRANCH23
2862 BFD_RELOC_THUMB_PCREL_BRANCH25
2864 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
2865 The lowest bit must be zero and is not stored in the instruction.
2866 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
2867 "nn" one smaller in all cases. Note further that BRANCH23
2868 corresponds to R_ARM_THM_CALL.
2871 BFD_RELOC_ARM_OFFSET_IMM
2873 12-bit immediate offset, used in ARM-format ldr and str instructions.
2876 BFD_RELOC_ARM_THUMB_OFFSET
2878 5-bit immediate offset, used in Thumb-format ldr and str instructions.
2881 BFD_RELOC_ARM_TARGET1
2883 Pc-relative or absolute relocation depending on target. Used for
2884 entries in .init_array sections.
2886 BFD_RELOC_ARM_ROSEGREL32
2888 Read-only segment base relative address.
2890 BFD_RELOC_ARM_SBREL32
2892 Data segment base relative address.
2894 BFD_RELOC_ARM_TARGET2
2896 This reloc is used for references to RTTI data from exception handling
2897 tables. The actual definition depends on the target. It may be a
2898 pc-relative or some form of GOT-indirect relocation.
2900 BFD_RELOC_ARM_PREL31
2902 31-bit PC relative address.
2908 BFD_RELOC_ARM_MOVW_PCREL
2910 BFD_RELOC_ARM_MOVT_PCREL
2912 BFD_RELOC_ARM_THUMB_MOVW
2914 BFD_RELOC_ARM_THUMB_MOVT
2916 BFD_RELOC_ARM_THUMB_MOVW_PCREL
2918 BFD_RELOC_ARM_THUMB_MOVT_PCREL
2920 Low and High halfword relocations for MOVW and MOVT instructions.
2923 BFD_RELOC_ARM_JUMP_SLOT
2925 BFD_RELOC_ARM_GLOB_DAT
2931 BFD_RELOC_ARM_RELATIVE
2933 BFD_RELOC_ARM_GOTOFF
2937 BFD_RELOC_ARM_GOT_PREL
2939 Relocations for setting up GOTs and PLTs for shared libraries.
2942 BFD_RELOC_ARM_TLS_GD32
2944 BFD_RELOC_ARM_TLS_LDO32
2946 BFD_RELOC_ARM_TLS_LDM32
2948 BFD_RELOC_ARM_TLS_DTPOFF32
2950 BFD_RELOC_ARM_TLS_DTPMOD32
2952 BFD_RELOC_ARM_TLS_TPOFF32
2954 BFD_RELOC_ARM_TLS_IE32
2956 BFD_RELOC_ARM_TLS_LE32
2958 ARM thread-local storage relocations.
2961 BFD_RELOC_ARM_ALU_PC_G0_NC
2963 BFD_RELOC_ARM_ALU_PC_G0
2965 BFD_RELOC_ARM_ALU_PC_G1_NC
2967 BFD_RELOC_ARM_ALU_PC_G1
2969 BFD_RELOC_ARM_ALU_PC_G2
2971 BFD_RELOC_ARM_LDR_PC_G0
2973 BFD_RELOC_ARM_LDR_PC_G1
2975 BFD_RELOC_ARM_LDR_PC_G2
2977 BFD_RELOC_ARM_LDRS_PC_G0
2979 BFD_RELOC_ARM_LDRS_PC_G1
2981 BFD_RELOC_ARM_LDRS_PC_G2
2983 BFD_RELOC_ARM_LDC_PC_G0
2985 BFD_RELOC_ARM_LDC_PC_G1
2987 BFD_RELOC_ARM_LDC_PC_G2
2989 BFD_RELOC_ARM_ALU_SB_G0_NC
2991 BFD_RELOC_ARM_ALU_SB_G0
2993 BFD_RELOC_ARM_ALU_SB_G1_NC
2995 BFD_RELOC_ARM_ALU_SB_G1
2997 BFD_RELOC_ARM_ALU_SB_G2
2999 BFD_RELOC_ARM_LDR_SB_G0
3001 BFD_RELOC_ARM_LDR_SB_G1
3003 BFD_RELOC_ARM_LDR_SB_G2
3005 BFD_RELOC_ARM_LDRS_SB_G0
3007 BFD_RELOC_ARM_LDRS_SB_G1
3009 BFD_RELOC_ARM_LDRS_SB_G2
3011 BFD_RELOC_ARM_LDC_SB_G0
3013 BFD_RELOC_ARM_LDC_SB_G1
3015 BFD_RELOC_ARM_LDC_SB_G2
3017 ARM group relocations.
3022 Annotation of BX instructions.
3025 BFD_RELOC_ARM_IMMEDIATE
3027 BFD_RELOC_ARM_ADRL_IMMEDIATE
3029 BFD_RELOC_ARM_T32_IMMEDIATE
3031 BFD_RELOC_ARM_T32_ADD_IMM
3033 BFD_RELOC_ARM_T32_IMM12
3035 BFD_RELOC_ARM_T32_ADD_PC12
3037 BFD_RELOC_ARM_SHIFT_IMM
3045 BFD_RELOC_ARM_CP_OFF_IMM
3047 BFD_RELOC_ARM_CP_OFF_IMM_S2
3049 BFD_RELOC_ARM_T32_CP_OFF_IMM
3051 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
3053 BFD_RELOC_ARM_ADR_IMM
3055 BFD_RELOC_ARM_LDR_IMM
3057 BFD_RELOC_ARM_LITERAL
3059 BFD_RELOC_ARM_IN_POOL
3061 BFD_RELOC_ARM_OFFSET_IMM8
3063 BFD_RELOC_ARM_T32_OFFSET_U8
3065 BFD_RELOC_ARM_T32_OFFSET_IMM
3067 BFD_RELOC_ARM_HWLITERAL
3069 BFD_RELOC_ARM_THUMB_ADD
3071 BFD_RELOC_ARM_THUMB_IMM
3073 BFD_RELOC_ARM_THUMB_SHIFT
3075 These relocs are only used within the ARM assembler. They are not
3076 (at present) written to any object files.
3079 BFD_RELOC_SH_PCDISP8BY2
3081 BFD_RELOC_SH_PCDISP12BY2
3089 BFD_RELOC_SH_DISP12BY2
3091 BFD_RELOC_SH_DISP12BY4
3093 BFD_RELOC_SH_DISP12BY8
3097 BFD_RELOC_SH_DISP20BY8
3101 BFD_RELOC_SH_IMM4BY2
3103 BFD_RELOC_SH_IMM4BY4
3107 BFD_RELOC_SH_IMM8BY2
3109 BFD_RELOC_SH_IMM8BY4
3111 BFD_RELOC_SH_PCRELIMM8BY2
3113 BFD_RELOC_SH_PCRELIMM8BY4
3115 BFD_RELOC_SH_SWITCH16
3117 BFD_RELOC_SH_SWITCH32
3131 BFD_RELOC_SH_LOOP_START
3133 BFD_RELOC_SH_LOOP_END
3137 BFD_RELOC_SH_GLOB_DAT
3139 BFD_RELOC_SH_JMP_SLOT
3141 BFD_RELOC_SH_RELATIVE
3145 BFD_RELOC_SH_GOT_LOW16
3147 BFD_RELOC_SH_GOT_MEDLOW16
3149 BFD_RELOC_SH_GOT_MEDHI16
3151 BFD_RELOC_SH_GOT_HI16
3153 BFD_RELOC_SH_GOTPLT_LOW16
3155 BFD_RELOC_SH_GOTPLT_MEDLOW16
3157 BFD_RELOC_SH_GOTPLT_MEDHI16
3159 BFD_RELOC_SH_GOTPLT_HI16
3161 BFD_RELOC_SH_PLT_LOW16
3163 BFD_RELOC_SH_PLT_MEDLOW16
3165 BFD_RELOC_SH_PLT_MEDHI16
3167 BFD_RELOC_SH_PLT_HI16
3169 BFD_RELOC_SH_GOTOFF_LOW16
3171 BFD_RELOC_SH_GOTOFF_MEDLOW16
3173 BFD_RELOC_SH_GOTOFF_MEDHI16
3175 BFD_RELOC_SH_GOTOFF_HI16
3177 BFD_RELOC_SH_GOTPC_LOW16
3179 BFD_RELOC_SH_GOTPC_MEDLOW16
3181 BFD_RELOC_SH_GOTPC_MEDHI16
3183 BFD_RELOC_SH_GOTPC_HI16
3187 BFD_RELOC_SH_GLOB_DAT64
3189 BFD_RELOC_SH_JMP_SLOT64
3191 BFD_RELOC_SH_RELATIVE64
3193 BFD_RELOC_SH_GOT10BY4
3195 BFD_RELOC_SH_GOT10BY8
3197 BFD_RELOC_SH_GOTPLT10BY4
3199 BFD_RELOC_SH_GOTPLT10BY8
3201 BFD_RELOC_SH_GOTPLT32
3203 BFD_RELOC_SH_SHMEDIA_CODE
3209 BFD_RELOC_SH_IMMS6BY32
3215 BFD_RELOC_SH_IMMS10BY2
3217 BFD_RELOC_SH_IMMS10BY4
3219 BFD_RELOC_SH_IMMS10BY8
3225 BFD_RELOC_SH_IMM_LOW16
3227 BFD_RELOC_SH_IMM_LOW16_PCREL
3229 BFD_RELOC_SH_IMM_MEDLOW16
3231 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3233 BFD_RELOC_SH_IMM_MEDHI16
3235 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3237 BFD_RELOC_SH_IMM_HI16
3239 BFD_RELOC_SH_IMM_HI16_PCREL
3243 BFD_RELOC_SH_TLS_GD_32
3245 BFD_RELOC_SH_TLS_LD_32
3247 BFD_RELOC_SH_TLS_LDO_32
3249 BFD_RELOC_SH_TLS_IE_32
3251 BFD_RELOC_SH_TLS_LE_32
3253 BFD_RELOC_SH_TLS_DTPMOD32
3255 BFD_RELOC_SH_TLS_DTPOFF32
3257 BFD_RELOC_SH_TLS_TPOFF32
3261 BFD_RELOC_SH_GOTOFF20
3263 BFD_RELOC_SH_GOTFUNCDESC
3265 BFD_RELOC_SH_GOTFUNCDESC20
3267 BFD_RELOC_SH_GOTOFFFUNCDESC
3269 BFD_RELOC_SH_GOTOFFFUNCDESC20
3271 BFD_RELOC_SH_FUNCDESC
3273 Renesas / SuperH SH relocs. Not all of these appear in object files.
3276 BFD_RELOC_ARC_B22_PCREL
3279 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
3280 not stored in the instruction. The high 20 bits are installed in bits 26
3281 through 7 of the instruction.
3285 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
3286 stored in the instruction. The high 24 bits are installed in bits 23
3290 BFD_RELOC_BFIN_16_IMM
3292 ADI Blackfin 16 bit immediate absolute reloc.
3294 BFD_RELOC_BFIN_16_HIGH
3296 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3298 BFD_RELOC_BFIN_4_PCREL
3300 ADI Blackfin 'a' part of LSETUP.
3302 BFD_RELOC_BFIN_5_PCREL
3306 BFD_RELOC_BFIN_16_LOW
3308 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3310 BFD_RELOC_BFIN_10_PCREL
3314 BFD_RELOC_BFIN_11_PCREL
3316 ADI Blackfin 'b' part of LSETUP.
3318 BFD_RELOC_BFIN_12_PCREL_JUMP
3322 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3324 ADI Blackfin Short jump, pcrel.
3326 BFD_RELOC_BFIN_24_PCREL_CALL_X
3328 ADI Blackfin Call.x not implemented.
3330 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3332 ADI Blackfin Long Jump pcrel.
3334 BFD_RELOC_BFIN_GOT17M4
3336 BFD_RELOC_BFIN_GOTHI
3338 BFD_RELOC_BFIN_GOTLO
3340 BFD_RELOC_BFIN_FUNCDESC
3342 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3344 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3346 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3348 BFD_RELOC_BFIN_FUNCDESC_VALUE
3350 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3352 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3354 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3356 BFD_RELOC_BFIN_GOTOFF17M4
3358 BFD_RELOC_BFIN_GOTOFFHI
3360 BFD_RELOC_BFIN_GOTOFFLO
3362 ADI Blackfin FD-PIC relocations.
3366 ADI Blackfin GOT relocation.
3368 BFD_RELOC_BFIN_PLTPC
3370 ADI Blackfin PLTPC relocation.
3372 BFD_ARELOC_BFIN_PUSH
3374 ADI Blackfin arithmetic relocation.
3376 BFD_ARELOC_BFIN_CONST
3378 ADI Blackfin arithmetic relocation.
3382 ADI Blackfin arithmetic relocation.
3386 ADI Blackfin arithmetic relocation.
3388 BFD_ARELOC_BFIN_MULT
3390 ADI Blackfin arithmetic relocation.
3394 ADI Blackfin arithmetic relocation.
3398 ADI Blackfin arithmetic relocation.
3400 BFD_ARELOC_BFIN_LSHIFT
3402 ADI Blackfin arithmetic relocation.
3404 BFD_ARELOC_BFIN_RSHIFT
3406 ADI Blackfin arithmetic relocation.
3410 ADI Blackfin arithmetic relocation.
3414 ADI Blackfin arithmetic relocation.
3418 ADI Blackfin arithmetic relocation.
3420 BFD_ARELOC_BFIN_LAND
3422 ADI Blackfin arithmetic relocation.
3426 ADI Blackfin arithmetic relocation.
3430 ADI Blackfin arithmetic relocation.
3434 ADI Blackfin arithmetic relocation.
3436 BFD_ARELOC_BFIN_COMP
3438 ADI Blackfin arithmetic relocation.
3440 BFD_ARELOC_BFIN_PAGE
3442 ADI Blackfin arithmetic relocation.
3444 BFD_ARELOC_BFIN_HWPAGE
3446 ADI Blackfin arithmetic relocation.
3448 BFD_ARELOC_BFIN_ADDR
3450 ADI Blackfin arithmetic relocation.
3453 BFD_RELOC_D10V_10_PCREL_R
3455 Mitsubishi D10V relocs.
3456 This is a 10-bit reloc with the right 2 bits
3459 BFD_RELOC_D10V_10_PCREL_L
3461 Mitsubishi D10V relocs.
3462 This is a 10-bit reloc with the right 2 bits
3463 assumed to be 0. This is the same as the previous reloc
3464 except it is in the left container, i.e.,
3465 shifted left 15 bits.
3469 This is an 18-bit reloc with the right 2 bits
3472 BFD_RELOC_D10V_18_PCREL
3474 This is an 18-bit reloc with the right 2 bits
3480 Mitsubishi D30V relocs.
3481 This is a 6-bit absolute reloc.
3483 BFD_RELOC_D30V_9_PCREL
3485 This is a 6-bit pc-relative reloc with
3486 the right 3 bits assumed to be 0.
3488 BFD_RELOC_D30V_9_PCREL_R
3490 This is a 6-bit pc-relative reloc with
3491 the right 3 bits assumed to be 0. Same
3492 as the previous reloc but on the right side
3497 This is a 12-bit absolute reloc with the
3498 right 3 bitsassumed to be 0.
3500 BFD_RELOC_D30V_15_PCREL
3502 This is a 12-bit pc-relative reloc with
3503 the right 3 bits assumed to be 0.
3505 BFD_RELOC_D30V_15_PCREL_R
3507 This is a 12-bit pc-relative reloc with
3508 the right 3 bits assumed to be 0. Same
3509 as the previous reloc but on the right side
3514 This is an 18-bit absolute reloc with
3515 the right 3 bits assumed to be 0.
3517 BFD_RELOC_D30V_21_PCREL
3519 This is an 18-bit pc-relative reloc with
3520 the right 3 bits assumed to be 0.
3522 BFD_RELOC_D30V_21_PCREL_R
3524 This is an 18-bit pc-relative reloc with
3525 the right 3 bits assumed to be 0. Same
3526 as the previous reloc but on the right side
3531 This is a 32-bit absolute reloc.
3533 BFD_RELOC_D30V_32_PCREL
3535 This is a 32-bit pc-relative reloc.
3538 BFD_RELOC_DLX_HI16_S
3553 BFD_RELOC_M32C_RL_JUMP
3555 BFD_RELOC_M32C_RL_1ADDR
3557 BFD_RELOC_M32C_RL_2ADDR
3559 Renesas M16C/M32C Relocations.
3564 Renesas M32R (formerly Mitsubishi M32R) relocs.
3565 This is a 24 bit absolute address.
3567 BFD_RELOC_M32R_10_PCREL
3569 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3571 BFD_RELOC_M32R_18_PCREL
3573 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3575 BFD_RELOC_M32R_26_PCREL
3577 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3579 BFD_RELOC_M32R_HI16_ULO
3581 This is a 16-bit reloc containing the high 16 bits of an address
3582 used when the lower 16 bits are treated as unsigned.
3584 BFD_RELOC_M32R_HI16_SLO
3586 This is a 16-bit reloc containing the high 16 bits of an address
3587 used when the lower 16 bits are treated as signed.
3591 This is a 16-bit reloc containing the lower 16 bits of an address.
3593 BFD_RELOC_M32R_SDA16
3595 This is a 16-bit reloc containing the small data area offset for use in
3596 add3, load, and store instructions.
3598 BFD_RELOC_M32R_GOT24
3600 BFD_RELOC_M32R_26_PLTREL
3604 BFD_RELOC_M32R_GLOB_DAT
3606 BFD_RELOC_M32R_JMP_SLOT
3608 BFD_RELOC_M32R_RELATIVE
3610 BFD_RELOC_M32R_GOTOFF
3612 BFD_RELOC_M32R_GOTOFF_HI_ULO
3614 BFD_RELOC_M32R_GOTOFF_HI_SLO
3616 BFD_RELOC_M32R_GOTOFF_LO
3618 BFD_RELOC_M32R_GOTPC24
3620 BFD_RELOC_M32R_GOT16_HI_ULO
3622 BFD_RELOC_M32R_GOT16_HI_SLO
3624 BFD_RELOC_M32R_GOT16_LO
3626 BFD_RELOC_M32R_GOTPC_HI_ULO
3628 BFD_RELOC_M32R_GOTPC_HI_SLO
3630 BFD_RELOC_M32R_GOTPC_LO
3636 BFD_RELOC_V850_9_PCREL
3638 This is a 9-bit reloc
3640 BFD_RELOC_V850_22_PCREL
3642 This is a 22-bit reloc
3645 BFD_RELOC_V850_SDA_16_16_OFFSET
3647 This is a 16 bit offset from the short data area pointer.
3649 BFD_RELOC_V850_SDA_15_16_OFFSET
3651 This is a 16 bit offset (of which only 15 bits are used) from the
3652 short data area pointer.
3654 BFD_RELOC_V850_ZDA_16_16_OFFSET
3656 This is a 16 bit offset from the zero data area pointer.
3658 BFD_RELOC_V850_ZDA_15_16_OFFSET
3660 This is a 16 bit offset (of which only 15 bits are used) from the
3661 zero data area pointer.
3663 BFD_RELOC_V850_TDA_6_8_OFFSET
3665 This is an 8 bit offset (of which only 6 bits are used) from the
3666 tiny data area pointer.
3668 BFD_RELOC_V850_TDA_7_8_OFFSET
3670 This is an 8bit offset (of which only 7 bits are used) from the tiny
3673 BFD_RELOC_V850_TDA_7_7_OFFSET
3675 This is a 7 bit offset from the tiny data area pointer.
3677 BFD_RELOC_V850_TDA_16_16_OFFSET
3679 This is a 16 bit offset from the tiny data area pointer.
3682 BFD_RELOC_V850_TDA_4_5_OFFSET
3684 This is a 5 bit offset (of which only 4 bits are used) from the tiny
3687 BFD_RELOC_V850_TDA_4_4_OFFSET
3689 This is a 4 bit offset from the tiny data area pointer.
3691 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
3693 This is a 16 bit offset from the short data area pointer, with the
3694 bits placed non-contiguously in the instruction.
3696 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
3698 This is a 16 bit offset from the zero data area pointer, with the
3699 bits placed non-contiguously in the instruction.
3701 BFD_RELOC_V850_CALLT_6_7_OFFSET
3703 This is a 6 bit offset from the call table base pointer.
3705 BFD_RELOC_V850_CALLT_16_16_OFFSET
3707 This is a 16 bit offset from the call table base pointer.
3709 BFD_RELOC_V850_LONGCALL
3711 Used for relaxing indirect function calls.
3713 BFD_RELOC_V850_LONGJUMP
3715 Used for relaxing indirect jumps.
3717 BFD_RELOC_V850_ALIGN
3719 Used to maintain alignment whilst relaxing.
3721 BFD_RELOC_V850_LO16_SPLIT_OFFSET
3723 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
3726 BFD_RELOC_MN10300_32_PCREL
3728 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3731 BFD_RELOC_MN10300_16_PCREL
3733 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3739 This is a 8bit DP reloc for the tms320c30, where the most
3740 significant 8 bits of a 24 bit word are placed into the least
3741 significant 8 bits of the opcode.
3744 BFD_RELOC_TIC54X_PARTLS7
3746 This is a 7bit reloc for the tms320c54x, where the least
3747 significant 7 bits of a 16 bit word are placed into the least
3748 significant 7 bits of the opcode.
3751 BFD_RELOC_TIC54X_PARTMS9
3753 This is a 9bit DP reloc for the tms320c54x, where the most
3754 significant 9 bits of a 16 bit word are placed into the least
3755 significant 9 bits of the opcode.
3760 This is an extended address 23-bit reloc for the tms320c54x.
3763 BFD_RELOC_TIC54X_16_OF_23
3765 This is a 16-bit reloc for the tms320c54x, where the least
3766 significant 16 bits of a 23-bit extended address are placed into
3770 BFD_RELOC_TIC54X_MS7_OF_23
3772 This is a reloc for the tms320c54x, where the most
3773 significant 7 bits of a 23-bit extended address are placed into
3777 BFD_RELOC_C6000_PCR_S21
3779 BFD_RELOC_C6000_PCR_S12
3781 BFD_RELOC_C6000_PCR_S10
3783 BFD_RELOC_C6000_PCR_S7
3785 BFD_RELOC_C6000_ABS_S16
3787 BFD_RELOC_C6000_ABS_L16
3789 BFD_RELOC_C6000_ABS_H16
3791 BFD_RELOC_C6000_SBR_U15_B
3793 BFD_RELOC_C6000_SBR_U15_H
3795 BFD_RELOC_C6000_SBR_U15_W
3797 BFD_RELOC_C6000_SBR_S16
3799 BFD_RELOC_C6000_SBR_L16_B
3801 BFD_RELOC_C6000_SBR_L16_H
3803 BFD_RELOC_C6000_SBR_L16_W
3805 BFD_RELOC_C6000_SBR_H16_B
3807 BFD_RELOC_C6000_SBR_H16_H
3809 BFD_RELOC_C6000_SBR_H16_W
3811 BFD_RELOC_C6000_SBR_GOT_U15_W
3813 BFD_RELOC_C6000_SBR_GOT_L16_W
3815 BFD_RELOC_C6000_SBR_GOT_H16_W
3817 BFD_RELOC_C6000_DSBT_INDEX
3819 BFD_RELOC_C6000_PREL31
3821 BFD_RELOC_C6000_COPY
3823 BFD_RELOC_C6000_ALIGN
3825 BFD_RELOC_C6000_FPHEAD
3827 BFD_RELOC_C6000_NOCMP
3829 TMS320C6000 relocations.
3834 This is a 48 bit reloc for the FR30 that stores 32 bits.
3838 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3841 BFD_RELOC_FR30_6_IN_4
3843 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3846 BFD_RELOC_FR30_8_IN_8
3848 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3851 BFD_RELOC_FR30_9_IN_8
3853 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3856 BFD_RELOC_FR30_10_IN_8
3858 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3861 BFD_RELOC_FR30_9_PCREL
3863 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3864 short offset into 8 bits.
3866 BFD_RELOC_FR30_12_PCREL
3868 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3869 short offset into 11 bits.
3872 BFD_RELOC_MCORE_PCREL_IMM8BY4
3874 BFD_RELOC_MCORE_PCREL_IMM11BY2
3876 BFD_RELOC_MCORE_PCREL_IMM4BY2
3878 BFD_RELOC_MCORE_PCREL_32
3880 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3884 Motorola Mcore relocations.
3893 BFD_RELOC_MEP_PCREL8A2
3895 BFD_RELOC_MEP_PCREL12A2
3897 BFD_RELOC_MEP_PCREL17A2
3899 BFD_RELOC_MEP_PCREL24A2
3901 BFD_RELOC_MEP_PCABS24A2
3913 BFD_RELOC_MEP_TPREL7
3915 BFD_RELOC_MEP_TPREL7A2
3917 BFD_RELOC_MEP_TPREL7A4
3919 BFD_RELOC_MEP_UIMM24
3921 BFD_RELOC_MEP_ADDR24A4
3923 BFD_RELOC_MEP_GNU_VTINHERIT
3925 BFD_RELOC_MEP_GNU_VTENTRY
3927 Toshiba Media Processor Relocations.
3933 BFD_RELOC_MMIX_GETA_1
3935 BFD_RELOC_MMIX_GETA_2
3937 BFD_RELOC_MMIX_GETA_3
3939 These are relocations for the GETA instruction.
3941 BFD_RELOC_MMIX_CBRANCH
3943 BFD_RELOC_MMIX_CBRANCH_J
3945 BFD_RELOC_MMIX_CBRANCH_1
3947 BFD_RELOC_MMIX_CBRANCH_2
3949 BFD_RELOC_MMIX_CBRANCH_3
3951 These are relocations for a conditional branch instruction.
3953 BFD_RELOC_MMIX_PUSHJ
3955 BFD_RELOC_MMIX_PUSHJ_1
3957 BFD_RELOC_MMIX_PUSHJ_2
3959 BFD_RELOC_MMIX_PUSHJ_3
3961 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
3963 These are relocations for the PUSHJ instruction.
3967 BFD_RELOC_MMIX_JMP_1
3969 BFD_RELOC_MMIX_JMP_2
3971 BFD_RELOC_MMIX_JMP_3
3973 These are relocations for the JMP instruction.
3975 BFD_RELOC_MMIX_ADDR19
3977 This is a relocation for a relative address as in a GETA instruction or
3980 BFD_RELOC_MMIX_ADDR27
3982 This is a relocation for a relative address as in a JMP instruction.
3984 BFD_RELOC_MMIX_REG_OR_BYTE
3986 This is a relocation for an instruction field that may be a general
3987 register or a value 0..255.
3991 This is a relocation for an instruction field that may be a general
3994 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3996 This is a relocation for two instruction fields holding a register and
3997 an offset, the equivalent of the relocation.
3999 BFD_RELOC_MMIX_LOCAL
4001 This relocation is an assertion that the expression is not allocated as
4002 a global register. It does not modify contents.
4005 BFD_RELOC_AVR_7_PCREL
4007 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
4008 short offset into 7 bits.
4010 BFD_RELOC_AVR_13_PCREL
4012 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
4013 short offset into 12 bits.
4017 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
4018 program memory address) into 16 bits.
4020 BFD_RELOC_AVR_LO8_LDI
4022 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4023 data memory address) into 8 bit immediate value of LDI insn.
4025 BFD_RELOC_AVR_HI8_LDI
4027 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4028 of data memory address) into 8 bit immediate value of LDI insn.
4030 BFD_RELOC_AVR_HH8_LDI
4032 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4033 of program memory address) into 8 bit immediate value of LDI insn.
4035 BFD_RELOC_AVR_MS8_LDI
4037 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4038 of 32 bit value) into 8 bit immediate value of LDI insn.
4040 BFD_RELOC_AVR_LO8_LDI_NEG
4042 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4043 (usually data memory address) into 8 bit immediate value of SUBI insn.
4045 BFD_RELOC_AVR_HI8_LDI_NEG
4047 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4048 (high 8 bit of data memory address) into 8 bit immediate value of
4051 BFD_RELOC_AVR_HH8_LDI_NEG
4053 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4054 (most high 8 bit of program memory address) into 8 bit immediate value
4055 of LDI or SUBI insn.
4057 BFD_RELOC_AVR_MS8_LDI_NEG
4059 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
4060 of 32 bit value) into 8 bit immediate value of LDI insn.
4062 BFD_RELOC_AVR_LO8_LDI_PM
4064 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4065 command address) into 8 bit immediate value of LDI insn.
4067 BFD_RELOC_AVR_LO8_LDI_GS
4069 This is a 16 bit reloc for the AVR that stores 8 bit value
4070 (command address) into 8 bit immediate value of LDI insn. If the address
4071 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4074 BFD_RELOC_AVR_HI8_LDI_PM
4076 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4077 of command address) into 8 bit immediate value of LDI insn.
4079 BFD_RELOC_AVR_HI8_LDI_GS
4081 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4082 of command address) into 8 bit immediate value of LDI insn. If the address
4083 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4086 BFD_RELOC_AVR_HH8_LDI_PM
4088 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4089 of command address) into 8 bit immediate value of LDI insn.
4091 BFD_RELOC_AVR_LO8_LDI_PM_NEG
4093 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4094 (usually command address) into 8 bit immediate value of SUBI insn.
4096 BFD_RELOC_AVR_HI8_LDI_PM_NEG
4098 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4099 (high 8 bit of 16 bit command address) into 8 bit immediate value
4102 BFD_RELOC_AVR_HH8_LDI_PM_NEG
4104 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4105 (high 6 bit of 22 bit command address) into 8 bit immediate
4110 This is a 32 bit reloc for the AVR that stores 23 bit value
4115 This is a 16 bit reloc for the AVR that stores all needed bits
4116 for absolute addressing with ldi with overflow check to linktime
4120 This is a 6 bit reloc for the AVR that stores offset for ldd/std
4123 BFD_RELOC_AVR_6_ADIW
4125 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
4149 BFD_RELOC_RX_DIR3U_PCREL
4161 BFD_RELOC_RX_OP_SUBTRACT
4171 BFD_RELOC_RX_ABS16UW
4173 BFD_RELOC_RX_ABS16UL
4177 Renesas RX Relocations.
4190 32 bit PC relative PLT address.
4194 Copy symbol at runtime.
4196 BFD_RELOC_390_GLOB_DAT
4200 BFD_RELOC_390_JMP_SLOT
4204 BFD_RELOC_390_RELATIVE
4206 Adjust by program base.
4210 32 bit PC relative offset to GOT.
4216 BFD_RELOC_390_PC16DBL
4218 PC relative 16 bit shifted by 1.
4220 BFD_RELOC_390_PLT16DBL
4222 16 bit PC rel. PLT shifted by 1.
4224 BFD_RELOC_390_PC32DBL
4226 PC relative 32 bit shifted by 1.
4228 BFD_RELOC_390_PLT32DBL
4230 32 bit PC rel. PLT shifted by 1.
4232 BFD_RELOC_390_GOTPCDBL
4234 32 bit PC rel. GOT shifted by 1.
4242 64 bit PC relative PLT address.
4244 BFD_RELOC_390_GOTENT
4246 32 bit rel. offset to GOT entry.
4248 BFD_RELOC_390_GOTOFF64
4250 64 bit offset to GOT.
4252 BFD_RELOC_390_GOTPLT12
4254 12-bit offset to symbol-entry within GOT, with PLT handling.
4256 BFD_RELOC_390_GOTPLT16
4258 16-bit offset to symbol-entry within GOT, with PLT handling.
4260 BFD_RELOC_390_GOTPLT32
4262 32-bit offset to symbol-entry within GOT, with PLT handling.
4264 BFD_RELOC_390_GOTPLT64
4266 64-bit offset to symbol-entry within GOT, with PLT handling.
4268 BFD_RELOC_390_GOTPLTENT
4270 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
4272 BFD_RELOC_390_PLTOFF16
4274 16-bit rel. offset from the GOT to a PLT entry.
4276 BFD_RELOC_390_PLTOFF32
4278 32-bit rel. offset from the GOT to a PLT entry.
4280 BFD_RELOC_390_PLTOFF64
4282 64-bit rel. offset from the GOT to a PLT entry.
4285 BFD_RELOC_390_TLS_LOAD
4287 BFD_RELOC_390_TLS_GDCALL
4289 BFD_RELOC_390_TLS_LDCALL
4291 BFD_RELOC_390_TLS_GD32
4293 BFD_RELOC_390_TLS_GD64
4295 BFD_RELOC_390_TLS_GOTIE12
4297 BFD_RELOC_390_TLS_GOTIE32
4299 BFD_RELOC_390_TLS_GOTIE64
4301 BFD_RELOC_390_TLS_LDM32
4303 BFD_RELOC_390_TLS_LDM64
4305 BFD_RELOC_390_TLS_IE32
4307 BFD_RELOC_390_TLS_IE64
4309 BFD_RELOC_390_TLS_IEENT
4311 BFD_RELOC_390_TLS_LE32
4313 BFD_RELOC_390_TLS_LE64
4315 BFD_RELOC_390_TLS_LDO32
4317 BFD_RELOC_390_TLS_LDO64
4319 BFD_RELOC_390_TLS_DTPMOD
4321 BFD_RELOC_390_TLS_DTPOFF
4323 BFD_RELOC_390_TLS_TPOFF
4325 s390 tls relocations.
4332 BFD_RELOC_390_GOTPLT20
4334 BFD_RELOC_390_TLS_GOTIE20
4336 Long displacement extension.
4339 BFD_RELOC_SCORE_GPREL15
4342 Low 16 bit for load/store
4344 BFD_RELOC_SCORE_DUMMY2
4348 This is a 24-bit reloc with the right 1 bit assumed to be 0
4350 BFD_RELOC_SCORE_BRANCH
4352 This is a 19-bit reloc with the right 1 bit assumed to be 0
4354 BFD_RELOC_SCORE_IMM30
4356 This is a 32-bit reloc for 48-bit instructions.
4358 BFD_RELOC_SCORE_IMM32
4360 This is a 32-bit reloc for 48-bit instructions.
4362 BFD_RELOC_SCORE16_JMP
4364 This is a 11-bit reloc with the right 1 bit assumed to be 0
4366 BFD_RELOC_SCORE16_BRANCH
4368 This is a 8-bit reloc with the right 1 bit assumed to be 0
4370 BFD_RELOC_SCORE_BCMP
4372 This is a 9-bit reloc with the right 1 bit assumed to be 0
4374 BFD_RELOC_SCORE_GOT15
4376 BFD_RELOC_SCORE_GOT_LO16
4378 BFD_RELOC_SCORE_CALL15
4380 BFD_RELOC_SCORE_DUMMY_HI16
4382 Undocumented Score relocs
4387 Scenix IP2K - 9-bit register number / data address
4391 Scenix IP2K - 4-bit register/data bank number
4393 BFD_RELOC_IP2K_ADDR16CJP
4395 Scenix IP2K - low 13 bits of instruction word address
4397 BFD_RELOC_IP2K_PAGE3
4399 Scenix IP2K - high 3 bits of instruction word address
4401 BFD_RELOC_IP2K_LO8DATA
4403 BFD_RELOC_IP2K_HI8DATA
4405 BFD_RELOC_IP2K_EX8DATA
4407 Scenix IP2K - ext/low/high 8 bits of data address
4409 BFD_RELOC_IP2K_LO8INSN
4411 BFD_RELOC_IP2K_HI8INSN
4413 Scenix IP2K - low/high 8 bits of instruction word address
4415 BFD_RELOC_IP2K_PC_SKIP
4417 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
4421 Scenix IP2K - 16 bit word address in text section.
4423 BFD_RELOC_IP2K_FR_OFFSET
4425 Scenix IP2K - 7-bit sp or dp offset
4427 BFD_RELOC_VPE4KMATH_DATA
4429 BFD_RELOC_VPE4KMATH_INSN
4431 Scenix VPE4K coprocessor - data/insn-space addressing
4434 BFD_RELOC_VTABLE_INHERIT
4436 BFD_RELOC_VTABLE_ENTRY
4438 These two relocations are used by the linker to determine which of
4439 the entries in a C++ virtual function table are actually used. When
4440 the --gc-sections option is given, the linker will zero out the entries
4441 that are not used, so that the code for those functions need not be
4442 included in the output.
4444 VTABLE_INHERIT is a zero-space relocation used to describe to the
4445 linker the inheritance tree of a C++ virtual function table. The
4446 relocation's symbol should be the parent class' vtable, and the
4447 relocation should be located at the child vtable.
4449 VTABLE_ENTRY is a zero-space relocation that describes the use of a
4450 virtual function table entry. The reloc's symbol should refer to the
4451 table of the class mentioned in the code. Off of that base, an offset
4452 describes the entry that is being used. For Rela hosts, this offset
4453 is stored in the reloc's addend. For Rel hosts, we are forced to put
4454 this offset in the reloc's section offset.
4457 BFD_RELOC_IA64_IMM14
4459 BFD_RELOC_IA64_IMM22
4461 BFD_RELOC_IA64_IMM64
4463 BFD_RELOC_IA64_DIR32MSB
4465 BFD_RELOC_IA64_DIR32LSB
4467 BFD_RELOC_IA64_DIR64MSB
4469 BFD_RELOC_IA64_DIR64LSB
4471 BFD_RELOC_IA64_GPREL22
4473 BFD_RELOC_IA64_GPREL64I
4475 BFD_RELOC_IA64_GPREL32MSB
4477 BFD_RELOC_IA64_GPREL32LSB
4479 BFD_RELOC_IA64_GPREL64MSB
4481 BFD_RELOC_IA64_GPREL64LSB
4483 BFD_RELOC_IA64_LTOFF22
4485 BFD_RELOC_IA64_LTOFF64I
4487 BFD_RELOC_IA64_PLTOFF22
4489 BFD_RELOC_IA64_PLTOFF64I
4491 BFD_RELOC_IA64_PLTOFF64MSB
4493 BFD_RELOC_IA64_PLTOFF64LSB
4495 BFD_RELOC_IA64_FPTR64I
4497 BFD_RELOC_IA64_FPTR32MSB
4499 BFD_RELOC_IA64_FPTR32LSB
4501 BFD_RELOC_IA64_FPTR64MSB
4503 BFD_RELOC_IA64_FPTR64LSB
4505 BFD_RELOC_IA64_PCREL21B
4507 BFD_RELOC_IA64_PCREL21BI
4509 BFD_RELOC_IA64_PCREL21M
4511 BFD_RELOC_IA64_PCREL21F
4513 BFD_RELOC_IA64_PCREL22
4515 BFD_RELOC_IA64_PCREL60B
4517 BFD_RELOC_IA64_PCREL64I
4519 BFD_RELOC_IA64_PCREL32MSB
4521 BFD_RELOC_IA64_PCREL32LSB
4523 BFD_RELOC_IA64_PCREL64MSB
4525 BFD_RELOC_IA64_PCREL64LSB
4527 BFD_RELOC_IA64_LTOFF_FPTR22
4529 BFD_RELOC_IA64_LTOFF_FPTR64I
4531 BFD_RELOC_IA64_LTOFF_FPTR32MSB
4533 BFD_RELOC_IA64_LTOFF_FPTR32LSB
4535 BFD_RELOC_IA64_LTOFF_FPTR64MSB
4537 BFD_RELOC_IA64_LTOFF_FPTR64LSB
4539 BFD_RELOC_IA64_SEGREL32MSB
4541 BFD_RELOC_IA64_SEGREL32LSB
4543 BFD_RELOC_IA64_SEGREL64MSB
4545 BFD_RELOC_IA64_SEGREL64LSB
4547 BFD_RELOC_IA64_SECREL32MSB
4549 BFD_RELOC_IA64_SECREL32LSB
4551 BFD_RELOC_IA64_SECREL64MSB
4553 BFD_RELOC_IA64_SECREL64LSB
4555 BFD_RELOC_IA64_REL32MSB
4557 BFD_RELOC_IA64_REL32LSB
4559 BFD_RELOC_IA64_REL64MSB
4561 BFD_RELOC_IA64_REL64LSB
4563 BFD_RELOC_IA64_LTV32MSB
4565 BFD_RELOC_IA64_LTV32LSB
4567 BFD_RELOC_IA64_LTV64MSB
4569 BFD_RELOC_IA64_LTV64LSB
4571 BFD_RELOC_IA64_IPLTMSB
4573 BFD_RELOC_IA64_IPLTLSB
4577 BFD_RELOC_IA64_LTOFF22X
4579 BFD_RELOC_IA64_LDXMOV
4581 BFD_RELOC_IA64_TPREL14
4583 BFD_RELOC_IA64_TPREL22
4585 BFD_RELOC_IA64_TPREL64I
4587 BFD_RELOC_IA64_TPREL64MSB
4589 BFD_RELOC_IA64_TPREL64LSB
4591 BFD_RELOC_IA64_LTOFF_TPREL22
4593 BFD_RELOC_IA64_DTPMOD64MSB
4595 BFD_RELOC_IA64_DTPMOD64LSB
4597 BFD_RELOC_IA64_LTOFF_DTPMOD22
4599 BFD_RELOC_IA64_DTPREL14
4601 BFD_RELOC_IA64_DTPREL22
4603 BFD_RELOC_IA64_DTPREL64I
4605 BFD_RELOC_IA64_DTPREL32MSB
4607 BFD_RELOC_IA64_DTPREL32LSB
4609 BFD_RELOC_IA64_DTPREL64MSB
4611 BFD_RELOC_IA64_DTPREL64LSB
4613 BFD_RELOC_IA64_LTOFF_DTPREL22
4615 Intel IA64 Relocations.
4618 BFD_RELOC_M68HC11_HI8
4620 Motorola 68HC11 reloc.
4621 This is the 8 bit high part of an absolute address.
4623 BFD_RELOC_M68HC11_LO8
4625 Motorola 68HC11 reloc.
4626 This is the 8 bit low part of an absolute address.
4628 BFD_RELOC_M68HC11_3B
4630 Motorola 68HC11 reloc.
4631 This is the 3 bit of a value.
4633 BFD_RELOC_M68HC11_RL_JUMP
4635 Motorola 68HC11 reloc.
4636 This reloc marks the beginning of a jump/call instruction.
4637 It is used for linker relaxation to correctly identify beginning
4638 of instruction and change some branches to use PC-relative
4641 BFD_RELOC_M68HC11_RL_GROUP
4643 Motorola 68HC11 reloc.
4644 This reloc marks a group of several instructions that gcc generates
4645 and for which the linker relaxation pass can modify and/or remove
4648 BFD_RELOC_M68HC11_LO16
4650 Motorola 68HC11 reloc.
4651 This is the 16-bit lower part of an address. It is used for 'call'
4652 instruction to specify the symbol address without any special
4653 transformation (due to memory bank window).
4655 BFD_RELOC_M68HC11_PAGE
4657 Motorola 68HC11 reloc.
4658 This is a 8-bit reloc that specifies the page number of an address.
4659 It is used by 'call' instruction to specify the page number of
4662 BFD_RELOC_M68HC11_24
4664 Motorola 68HC11 reloc.
4665 This is a 24-bit reloc that represents the address with a 16-bit
4666 value and a 8-bit page number. The symbol address is transformed
4667 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
4669 BFD_RELOC_M68HC12_5B
4671 Motorola 68HC12 reloc.
4672 This is the 5 bits of a value.
4677 BFD_RELOC_16C_NUM08_C
4681 BFD_RELOC_16C_NUM16_C
4685 BFD_RELOC_16C_NUM32_C
4687 BFD_RELOC_16C_DISP04
4689 BFD_RELOC_16C_DISP04_C
4691 BFD_RELOC_16C_DISP08
4693 BFD_RELOC_16C_DISP08_C
4695 BFD_RELOC_16C_DISP16
4697 BFD_RELOC_16C_DISP16_C
4699 BFD_RELOC_16C_DISP24
4701 BFD_RELOC_16C_DISP24_C
4703 BFD_RELOC_16C_DISP24a
4705 BFD_RELOC_16C_DISP24a_C
4709 BFD_RELOC_16C_REG04_C
4711 BFD_RELOC_16C_REG04a
4713 BFD_RELOC_16C_REG04a_C
4717 BFD_RELOC_16C_REG14_C
4721 BFD_RELOC_16C_REG16_C
4725 BFD_RELOC_16C_REG20_C
4729 BFD_RELOC_16C_ABS20_C
4733 BFD_RELOC_16C_ABS24_C
4737 BFD_RELOC_16C_IMM04_C
4741 BFD_RELOC_16C_IMM16_C
4745 BFD_RELOC_16C_IMM20_C
4749 BFD_RELOC_16C_IMM24_C
4753 BFD_RELOC_16C_IMM32_C
4755 NS CR16C Relocations.
4760 BFD_RELOC_CR16_NUM16
4762 BFD_RELOC_CR16_NUM32
4764 BFD_RELOC_CR16_NUM32a
4766 BFD_RELOC_CR16_REGREL0
4768 BFD_RELOC_CR16_REGREL4
4770 BFD_RELOC_CR16_REGREL4a
4772 BFD_RELOC_CR16_REGREL14
4774 BFD_RELOC_CR16_REGREL14a
4776 BFD_RELOC_CR16_REGREL16
4778 BFD_RELOC_CR16_REGREL20
4780 BFD_RELOC_CR16_REGREL20a
4782 BFD_RELOC_CR16_ABS20
4784 BFD_RELOC_CR16_ABS24
4790 BFD_RELOC_CR16_IMM16
4792 BFD_RELOC_CR16_IMM20
4794 BFD_RELOC_CR16_IMM24
4796 BFD_RELOC_CR16_IMM32
4798 BFD_RELOC_CR16_IMM32a
4800 BFD_RELOC_CR16_DISP4
4802 BFD_RELOC_CR16_DISP8
4804 BFD_RELOC_CR16_DISP16
4806 BFD_RELOC_CR16_DISP20
4808 BFD_RELOC_CR16_DISP24
4810 BFD_RELOC_CR16_DISP24a
4812 BFD_RELOC_CR16_SWITCH8
4814 BFD_RELOC_CR16_SWITCH16
4816 BFD_RELOC_CR16_SWITCH32
4818 BFD_RELOC_CR16_GOT_REGREL20
4820 BFD_RELOC_CR16_GOTC_REGREL20
4822 BFD_RELOC_CR16_GLOB_DAT
4824 NS CR16 Relocations.
4831 BFD_RELOC_CRX_REL8_CMP
4839 BFD_RELOC_CRX_REGREL12
4841 BFD_RELOC_CRX_REGREL22
4843 BFD_RELOC_CRX_REGREL28
4845 BFD_RELOC_CRX_REGREL32
4861 BFD_RELOC_CRX_SWITCH8
4863 BFD_RELOC_CRX_SWITCH16
4865 BFD_RELOC_CRX_SWITCH32
4870 BFD_RELOC_CRIS_BDISP8
4872 BFD_RELOC_CRIS_UNSIGNED_5
4874 BFD_RELOC_CRIS_SIGNED_6
4876 BFD_RELOC_CRIS_UNSIGNED_6
4878 BFD_RELOC_CRIS_SIGNED_8
4880 BFD_RELOC_CRIS_UNSIGNED_8
4882 BFD_RELOC_CRIS_SIGNED_16
4884 BFD_RELOC_CRIS_UNSIGNED_16
4886 BFD_RELOC_CRIS_LAPCQ_OFFSET
4888 BFD_RELOC_CRIS_UNSIGNED_4
4890 These relocs are only used within the CRIS assembler. They are not
4891 (at present) written to any object files.
4895 BFD_RELOC_CRIS_GLOB_DAT
4897 BFD_RELOC_CRIS_JUMP_SLOT
4899 BFD_RELOC_CRIS_RELATIVE
4901 Relocs used in ELF shared libraries for CRIS.
4903 BFD_RELOC_CRIS_32_GOT
4905 32-bit offset to symbol-entry within GOT.
4907 BFD_RELOC_CRIS_16_GOT
4909 16-bit offset to symbol-entry within GOT.
4911 BFD_RELOC_CRIS_32_GOTPLT
4913 32-bit offset to symbol-entry within GOT, with PLT handling.
4915 BFD_RELOC_CRIS_16_GOTPLT
4917 16-bit offset to symbol-entry within GOT, with PLT handling.
4919 BFD_RELOC_CRIS_32_GOTREL
4921 32-bit offset to symbol, relative to GOT.
4923 BFD_RELOC_CRIS_32_PLT_GOTREL
4925 32-bit offset to symbol with PLT entry, relative to GOT.
4927 BFD_RELOC_CRIS_32_PLT_PCREL
4929 32-bit offset to symbol with PLT entry, relative to this relocation.
4932 BFD_RELOC_CRIS_32_GOT_GD
4934 BFD_RELOC_CRIS_16_GOT_GD
4936 BFD_RELOC_CRIS_32_GD
4940 BFD_RELOC_CRIS_32_DTPREL
4942 BFD_RELOC_CRIS_16_DTPREL
4944 BFD_RELOC_CRIS_32_GOT_TPREL
4946 BFD_RELOC_CRIS_16_GOT_TPREL
4948 BFD_RELOC_CRIS_32_TPREL
4950 BFD_RELOC_CRIS_16_TPREL
4952 BFD_RELOC_CRIS_DTPMOD
4954 BFD_RELOC_CRIS_32_IE
4956 Relocs used in TLS code for CRIS.
4961 BFD_RELOC_860_GLOB_DAT
4963 BFD_RELOC_860_JUMP_SLOT
4965 BFD_RELOC_860_RELATIVE
4975 BFD_RELOC_860_SPLIT0
4979 BFD_RELOC_860_SPLIT1
4983 BFD_RELOC_860_SPLIT2
4987 BFD_RELOC_860_LOGOT0
4989 BFD_RELOC_860_SPGOT0
4991 BFD_RELOC_860_LOGOT1
4993 BFD_RELOC_860_SPGOT1
4995 BFD_RELOC_860_LOGOTOFF0
4997 BFD_RELOC_860_SPGOTOFF0
4999 BFD_RELOC_860_LOGOTOFF1
5001 BFD_RELOC_860_SPGOTOFF1
5003 BFD_RELOC_860_LOGOTOFF2
5005 BFD_RELOC_860_LOGOTOFF3
5009 BFD_RELOC_860_HIGHADJ
5013 BFD_RELOC_860_HAGOTOFF
5021 BFD_RELOC_860_HIGOTOFF
5023 Intel i860 Relocations.
5026 BFD_RELOC_OPENRISC_ABS_26
5028 BFD_RELOC_OPENRISC_REL_26
5030 OpenRISC Relocations.
5033 BFD_RELOC_H8_DIR16A8
5035 BFD_RELOC_H8_DIR16R8
5037 BFD_RELOC_H8_DIR24A8
5039 BFD_RELOC_H8_DIR24R8
5041 BFD_RELOC_H8_DIR32A16
5046 BFD_RELOC_XSTORMY16_REL_12
5048 BFD_RELOC_XSTORMY16_12
5050 BFD_RELOC_XSTORMY16_24
5052 BFD_RELOC_XSTORMY16_FPTR16
5054 Sony Xstormy16 Relocations.
5059 Self-describing complex relocations.
5071 Infineon Relocations.
5074 BFD_RELOC_VAX_GLOB_DAT
5076 BFD_RELOC_VAX_JMP_SLOT
5078 BFD_RELOC_VAX_RELATIVE
5080 Relocations used by VAX ELF.
5085 Morpho MT - 16 bit immediate relocation.
5089 Morpho MT - Hi 16 bits of an address.
5093 Morpho MT - Low 16 bits of an address.
5095 BFD_RELOC_MT_GNU_VTINHERIT
5097 Morpho MT - Used to tell the linker which vtable entries are used.
5099 BFD_RELOC_MT_GNU_VTENTRY
5101 Morpho MT - Used to tell the linker which vtable entries are used.
5103 BFD_RELOC_MT_PCINSN8
5105 Morpho MT - 8 bit immediate relocation.
5108 BFD_RELOC_MSP430_10_PCREL
5110 BFD_RELOC_MSP430_16_PCREL
5114 BFD_RELOC_MSP430_16_PCREL_BYTE
5116 BFD_RELOC_MSP430_16_BYTE
5118 BFD_RELOC_MSP430_2X_PCREL
5120 BFD_RELOC_MSP430_RL_PCREL
5122 msp430 specific relocation codes
5125 BFD_RELOC_IQ2000_OFFSET_16
5127 BFD_RELOC_IQ2000_OFFSET_21
5129 BFD_RELOC_IQ2000_UHI16
5134 BFD_RELOC_XTENSA_RTLD
5136 Special Xtensa relocation used only by PLT entries in ELF shared
5137 objects to indicate that the runtime linker should set the value
5138 to one of its own internal functions or data structures.
5140 BFD_RELOC_XTENSA_GLOB_DAT
5142 BFD_RELOC_XTENSA_JMP_SLOT
5144 BFD_RELOC_XTENSA_RELATIVE
5146 Xtensa relocations for ELF shared objects.
5148 BFD_RELOC_XTENSA_PLT
5150 Xtensa relocation used in ELF object files for symbols that may require
5151 PLT entries. Otherwise, this is just a generic 32-bit relocation.
5153 BFD_RELOC_XTENSA_DIFF8
5155 BFD_RELOC_XTENSA_DIFF16
5157 BFD_RELOC_XTENSA_DIFF32
5159 Xtensa relocations to mark the difference of two local symbols.
5160 These are only needed to support linker relaxation and can be ignored
5161 when not relaxing. The field is set to the value of the difference
5162 assuming no relaxation. The relocation encodes the position of the
5163 first symbol so the linker can determine whether to adjust the field
5166 BFD_RELOC_XTENSA_SLOT0_OP
5168 BFD_RELOC_XTENSA_SLOT1_OP
5170 BFD_RELOC_XTENSA_SLOT2_OP
5172 BFD_RELOC_XTENSA_SLOT3_OP
5174 BFD_RELOC_XTENSA_SLOT4_OP
5176 BFD_RELOC_XTENSA_SLOT5_OP
5178 BFD_RELOC_XTENSA_SLOT6_OP
5180 BFD_RELOC_XTENSA_SLOT7_OP
5182 BFD_RELOC_XTENSA_SLOT8_OP
5184 BFD_RELOC_XTENSA_SLOT9_OP
5186 BFD_RELOC_XTENSA_SLOT10_OP
5188 BFD_RELOC_XTENSA_SLOT11_OP
5190 BFD_RELOC_XTENSA_SLOT12_OP
5192 BFD_RELOC_XTENSA_SLOT13_OP
5194 BFD_RELOC_XTENSA_SLOT14_OP
5196 Generic Xtensa relocations for instruction operands. Only the slot
5197 number is encoded in the relocation. The relocation applies to the
5198 last PC-relative immediate operand, or if there are no PC-relative
5199 immediates, to the last immediate operand.
5201 BFD_RELOC_XTENSA_SLOT0_ALT
5203 BFD_RELOC_XTENSA_SLOT1_ALT
5205 BFD_RELOC_XTENSA_SLOT2_ALT
5207 BFD_RELOC_XTENSA_SLOT3_ALT
5209 BFD_RELOC_XTENSA_SLOT4_ALT
5211 BFD_RELOC_XTENSA_SLOT5_ALT
5213 BFD_RELOC_XTENSA_SLOT6_ALT
5215 BFD_RELOC_XTENSA_SLOT7_ALT
5217 BFD_RELOC_XTENSA_SLOT8_ALT
5219 BFD_RELOC_XTENSA_SLOT9_ALT
5221 BFD_RELOC_XTENSA_SLOT10_ALT
5223 BFD_RELOC_XTENSA_SLOT11_ALT
5225 BFD_RELOC_XTENSA_SLOT12_ALT
5227 BFD_RELOC_XTENSA_SLOT13_ALT
5229 BFD_RELOC_XTENSA_SLOT14_ALT
5231 Alternate Xtensa relocations. Only the slot is encoded in the
5232 relocation. The meaning of these relocations is opcode-specific.
5234 BFD_RELOC_XTENSA_OP0
5236 BFD_RELOC_XTENSA_OP1
5238 BFD_RELOC_XTENSA_OP2
5240 Xtensa relocations for backward compatibility. These have all been
5241 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
5243 BFD_RELOC_XTENSA_ASM_EXPAND
5245 Xtensa relocation to mark that the assembler expanded the
5246 instructions from an original target. The expansion size is
5247 encoded in the reloc size.
5249 BFD_RELOC_XTENSA_ASM_SIMPLIFY
5251 Xtensa relocation to mark that the linker should simplify
5252 assembler-expanded instructions. This is commonly used
5253 internally by the linker after analysis of a
5254 BFD_RELOC_XTENSA_ASM_EXPAND.
5256 BFD_RELOC_XTENSA_TLSDESC_FN
5258 BFD_RELOC_XTENSA_TLSDESC_ARG
5260 BFD_RELOC_XTENSA_TLS_DTPOFF
5262 BFD_RELOC_XTENSA_TLS_TPOFF
5264 BFD_RELOC_XTENSA_TLS_FUNC
5266 BFD_RELOC_XTENSA_TLS_ARG
5268 BFD_RELOC_XTENSA_TLS_CALL
5270 Xtensa TLS relocations.
5275 8 bit signed offset in (ix+d) or (iy+d).
5293 BFD_RELOC_LM32_BRANCH
5295 BFD_RELOC_LM32_16_GOT
5297 BFD_RELOC_LM32_GOTOFF_HI16
5299 BFD_RELOC_LM32_GOTOFF_LO16
5303 BFD_RELOC_LM32_GLOB_DAT
5305 BFD_RELOC_LM32_JMP_SLOT
5307 BFD_RELOC_LM32_RELATIVE
5309 Lattice Mico32 relocations.
5312 BFD_RELOC_MACH_O_SECTDIFF
5314 Difference between two section addreses. Must be followed by a
5315 BFD_RELOC_MACH_O_PAIR.
5317 BFD_RELOC_MACH_O_PAIR
5319 Pair of relocation. Contains the first symbol.
5322 BFD_RELOC_MACH_O_X86_64_BRANCH32
5324 BFD_RELOC_MACH_O_X86_64_BRANCH8
5326 PCREL relocations. They are marked as branch to create PLT entry if
5329 BFD_RELOC_MACH_O_X86_64_GOT
5331 Used when referencing a GOT entry.
5333 BFD_RELOC_MACH_O_X86_64_GOT_LOAD
5335 Used when loading a GOT entry with movq. It is specially marked so that
5336 the linker could optimize the movq to a leaq if possible.
5338 BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32
5340 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
5342 BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64
5344 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
5346 BFD_RELOC_MACH_O_X86_64_PCREL32_1
5348 Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
5350 BFD_RELOC_MACH_O_X86_64_PCREL32_2
5352 Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
5354 BFD_RELOC_MACH_O_X86_64_PCREL32_4
5356 Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
5359 BFD_RELOC_MICROBLAZE_32_LO
5361 This is a 32 bit reloc for the microblaze that stores the
5362 low 16 bits of a value
5364 BFD_RELOC_MICROBLAZE_32_LO_PCREL
5366 This is a 32 bit pc-relative reloc for the microblaze that
5367 stores the low 16 bits of a value
5369 BFD_RELOC_MICROBLAZE_32_ROSDA
5371 This is a 32 bit reloc for the microblaze that stores a
5372 value relative to the read-only small data area anchor
5374 BFD_RELOC_MICROBLAZE_32_RWSDA
5376 This is a 32 bit reloc for the microblaze that stores a
5377 value relative to the read-write small data area anchor
5379 BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
5381 This is a 32 bit reloc for the microblaze to handle
5382 expressions of the form "Symbol Op Symbol"
5384 BFD_RELOC_MICROBLAZE_64_NONE
5386 This is a 64 bit reloc that stores the 32 bit pc relative
5387 value in two words (with an imm instruction). No relocation is
5388 done here - only used for relaxing
5390 BFD_RELOC_MICROBLAZE_64_GOTPC
5392 This is a 64 bit reloc that stores the 32 bit pc relative
5393 value in two words (with an imm instruction). The relocation is
5394 PC-relative GOT offset
5396 BFD_RELOC_MICROBLAZE_64_GOT
5398 This is a 64 bit reloc that stores the 32 bit pc relative
5399 value in two words (with an imm instruction). The relocation is
5402 BFD_RELOC_MICROBLAZE_64_PLT
5404 This is a 64 bit reloc that stores the 32 bit pc relative
5405 value in two words (with an imm instruction). The relocation is
5406 PC-relative offset into PLT
5408 BFD_RELOC_MICROBLAZE_64_GOTOFF
5410 This is a 64 bit reloc that stores the 32 bit GOT relative
5411 value in two words (with an imm instruction). The relocation is
5412 relative offset from _GLOBAL_OFFSET_TABLE_
5414 BFD_RELOC_MICROBLAZE_32_GOTOFF
5416 This is a 32 bit reloc that stores the 32 bit GOT relative
5417 value in a word. The relocation is relative offset from
5418 _GLOBAL_OFFSET_TABLE_
5420 BFD_RELOC_MICROBLAZE_COPY
5422 This is used to tell the dynamic linker to copy the value out of
5423 the dynamic object into the runtime process image.
5430 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
5435 bfd_reloc_type_lookup
5436 bfd_reloc_name_lookup
5439 reloc_howto_type *bfd_reloc_type_lookup
5440 (bfd *abfd, bfd_reloc_code_real_type code);
5441 reloc_howto_type *bfd_reloc_name_lookup
5442 (bfd *abfd, const char *reloc_name);
5445 Return a pointer to a howto structure which, when
5446 invoked, will perform the relocation @var{code} on data from the
5452 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
5454 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
5458 bfd_reloc_name_lookup (bfd
*abfd
, const char *reloc_name
)
5460 return BFD_SEND (abfd
, reloc_name_lookup
, (abfd
, reloc_name
));
5463 static reloc_howto_type bfd_howto_32
=
5464 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_dont
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
5468 bfd_default_reloc_type_lookup
5471 reloc_howto_type *bfd_default_reloc_type_lookup
5472 (bfd *abfd, bfd_reloc_code_real_type code);
5475 Provides a default relocation lookup routine for any architecture.
5480 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
5484 case BFD_RELOC_CTOR
:
5485 /* The type of reloc used in a ctor, which will be as wide as the
5486 address - so either a 64, 32, or 16 bitter. */
5487 switch (bfd_get_arch_info (abfd
)->bits_per_address
)
5492 return &bfd_howto_32
;
5506 bfd_get_reloc_code_name
5509 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
5512 Provides a printable name for the supplied relocation code.
5513 Useful mainly for printing error messages.
5517 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
5519 if (code
> BFD_RELOC_UNUSED
)
5521 return bfd_reloc_code_real_names
[code
];
5526 bfd_generic_relax_section
5529 bfd_boolean bfd_generic_relax_section
5532 struct bfd_link_info *,
5536 Provides default handling for relaxing for back ends which
5541 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
5542 asection
*section ATTRIBUTE_UNUSED
,
5543 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
5546 if (link_info
->relocatable
)
5547 (*link_info
->callbacks
->einfo
)
5548 (_("%P%F: --relax and -r may not be used together\n"));
5556 bfd_generic_gc_sections
5559 bfd_boolean bfd_generic_gc_sections
5560 (bfd *, struct bfd_link_info *);
5563 Provides default handling for relaxing for back ends which
5564 don't do section gc -- i.e., does nothing.
5568 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
5569 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
5576 bfd_generic_merge_sections
5579 bfd_boolean bfd_generic_merge_sections
5580 (bfd *, struct bfd_link_info *);
5583 Provides default handling for SEC_MERGE section merging for back ends
5584 which don't have SEC_MERGE support -- i.e., does nothing.
5588 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
5589 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
5596 bfd_generic_get_relocated_section_contents
5599 bfd_byte *bfd_generic_get_relocated_section_contents
5601 struct bfd_link_info *link_info,
5602 struct bfd_link_order *link_order,
5604 bfd_boolean relocatable,
5608 Provides default handling of relocation effort for back ends
5609 which can't be bothered to do it efficiently.
5614 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
5615 struct bfd_link_info
*link_info
,
5616 struct bfd_link_order
*link_order
,
5618 bfd_boolean relocatable
,
5621 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
5622 asection
*input_section
= link_order
->u
.indirect
.section
;
5624 arelent
**reloc_vector
;
5628 reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
5632 /* Read in the section. */
5633 sz
= input_section
->rawsize
? input_section
->rawsize
: input_section
->size
;
5634 if (!bfd_get_section_contents (input_bfd
, input_section
, data
, 0, sz
))
5637 if (reloc_size
== 0)
5640 reloc_vector
= (arelent
**) bfd_malloc (reloc_size
);
5641 if (reloc_vector
== NULL
)
5644 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
5648 if (reloc_count
< 0)
5651 if (reloc_count
> 0)
5654 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
5656 char *error_message
= NULL
;
5658 bfd_reloc_status_type r
;
5660 symbol
= *(*parent
)->sym_ptr_ptr
;
5661 if (symbol
->section
&& elf_discarded_section (symbol
->section
))
5664 static reloc_howto_type none_howto
5665 = HOWTO (0, 0, 0, 0, FALSE
, 0, complain_overflow_dont
, NULL
,
5666 "unused", FALSE
, 0, 0, FALSE
);
5668 p
= data
+ (*parent
)->address
* bfd_octets_per_byte (input_bfd
);
5669 _bfd_clear_contents ((*parent
)->howto
, input_bfd
, p
);
5670 (*parent
)->sym_ptr_ptr
= bfd_abs_section
.symbol_ptr_ptr
;
5671 (*parent
)->addend
= 0;
5672 (*parent
)->howto
= &none_howto
;
5676 r
= bfd_perform_relocation (input_bfd
,
5680 relocatable
? abfd
: NULL
,
5685 asection
*os
= input_section
->output_section
;
5687 /* A partial link, so keep the relocs. */
5688 os
->orelocation
[os
->reloc_count
] = *parent
;
5692 if (r
!= bfd_reloc_ok
)
5696 case bfd_reloc_undefined
:
5697 if (!((*link_info
->callbacks
->undefined_symbol
)
5698 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
5699 input_bfd
, input_section
, (*parent
)->address
,
5703 case bfd_reloc_dangerous
:
5704 BFD_ASSERT (error_message
!= NULL
);
5705 if (!((*link_info
->callbacks
->reloc_dangerous
)
5706 (link_info
, error_message
, input_bfd
, input_section
,
5707 (*parent
)->address
)))
5710 case bfd_reloc_overflow
:
5711 if (!((*link_info
->callbacks
->reloc_overflow
)
5713 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
5714 (*parent
)->howto
->name
, (*parent
)->addend
,
5715 input_bfd
, input_section
, (*parent
)->address
)))
5718 case bfd_reloc_outofrange
:
5728 free (reloc_vector
);
5732 free (reloc_vector
);