1 /* BFD support for handling relocation entries.
2 Copyright (C) 1990-2019 Free Software Foundation, Inc.
3 Written by Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 BFD maintains relocations in much the same way it maintains
27 symbols: they are left alone until required, then read in
28 en-masse and translated into an internal form. A common
29 routine <<bfd_perform_relocation>> acts upon the
30 canonical form to do the fixup.
32 Relocations are maintained on a per section basis,
33 while symbols are maintained on a per BFD basis.
35 All that a back end has to do to fit the BFD interface is to create
36 a <<struct reloc_cache_entry>> for each relocation
37 in a particular section, and fill in the right bits of the structures.
46 /* DO compile in the reloc_code name table from libbfd.h. */
47 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. Note - the value 2 is used so that it
69 . will not be mistaken for the boolean TRUE or FALSE values. *}
72 . {* The relocation was performed, but there was an overflow. *}
75 . {* The address to relocate was not within the section supplied. *}
76 . bfd_reloc_outofrange,
78 . {* Used by special functions. *}
81 . {* Unsupported relocation size requested. *}
82 . bfd_reloc_notsupported,
87 . {* The symbol to relocate against was undefined. *}
88 . bfd_reloc_undefined,
90 . {* The relocation was performed, but may not be ok. If this type is
91 . returned, the error_message argument to bfd_perform_relocation
95 . bfd_reloc_status_type;
97 .typedef const struct reloc_howto_struct reloc_howto_type;
99 .typedef struct reloc_cache_entry
101 . {* A pointer into the canonical table of pointers. *}
102 . struct bfd_symbol **sym_ptr_ptr;
104 . {* offset in section. *}
105 . bfd_size_type address;
107 . {* addend for relocation value. *}
110 . {* Pointer to how to perform the required relocation. *}
111 . reloc_howto_type *howto;
121 Here is a description of each of the fields within an <<arelent>>:
125 The symbol table pointer points to a pointer to the symbol
126 associated with the relocation request. It is the pointer
127 into the table returned by the back end's
128 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
129 referenced through a pointer to a pointer so that tools like
130 the linker can fix up all the symbols of the same name by
131 modifying only one pointer. The relocation routine looks in
132 the symbol and uses the base of the section the symbol is
133 attached to and the value of the symbol as the initial
134 relocation offset. If the symbol pointer is zero, then the
135 section provided is looked up.
139 The <<address>> field gives the offset in bytes from the base of
140 the section data which owns the relocation record to the first
141 byte of relocatable information. The actual data relocated
142 will be relative to this point; for example, a relocation
143 type which modifies the bottom two bytes of a four byte word
144 would not touch the first byte pointed to in a big endian
149 The <<addend>> is a value provided by the back end to be added (!)
150 to the relocation offset. Its interpretation is dependent upon
151 the howto. For example, on the 68k the code:
156 | return foo[0x12345678];
159 Could be compiled into:
162 | moveb @@#12345678,d0
167 This could create a reloc pointing to <<foo>>, but leave the
168 offset in the data, something like:
170 |RELOCATION RECORDS FOR [.text]:
174 |00000000 4e56 fffc ; linkw fp,#-4
175 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
176 |0000000a 49c0 ; extbl d0
177 |0000000c 4e5e ; unlk fp
180 Using coff and an 88k, some instructions don't have enough
181 space in them to represent the full address range, and
182 pointers have to be loaded in two parts. So you'd get something like:
184 | or.u r13,r0,hi16(_foo+0x12345678)
185 | ld.b r2,r13,lo16(_foo+0x12345678)
188 This should create two relocs, both pointing to <<_foo>>, and with
189 0x12340000 in their addend field. The data would consist of:
191 |RELOCATION RECORDS FOR [.text]:
193 |00000002 HVRT16 _foo+0x12340000
194 |00000006 LVRT16 _foo+0x12340000
196 |00000000 5da05678 ; or.u r13,r0,0x5678
197 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
198 |00000008 f400c001 ; jmp r1
200 The relocation routine digs out the value from the data, adds
201 it to the addend to get the original offset, and then adds the
202 value of <<_foo>>. Note that all 32 bits have to be kept around
203 somewhere, to cope with carry from bit 15 to bit 16.
205 One further example is the sparc and the a.out format. The
206 sparc has a similar problem to the 88k, in that some
207 instructions don't have room for an entire offset, but on the
208 sparc the parts are created in odd sized lumps. The designers of
209 the a.out format chose to not use the data within the section
210 for storing part of the offset; all the offset is kept within
211 the reloc. Anything in the data should be ignored.
214 | sethi %hi(_foo+0x12345678),%g2
215 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
219 Both relocs contain a pointer to <<foo>>, and the offsets
222 |RELOCATION RECORDS FOR [.text]:
224 |00000004 HI22 _foo+0x12345678
225 |00000008 LO10 _foo+0x12345678
227 |00000000 9de3bf90 ; save %sp,-112,%sp
228 |00000004 05000000 ; sethi %hi(_foo+0),%g2
229 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
230 |0000000c 81c7e008 ; ret
231 |00000010 81e80000 ; restore
235 The <<howto>> field can be imagined as a
236 relocation instruction. It is a pointer to a structure which
237 contains information on what to do with all of the other
238 information in the reloc record and data section. A back end
239 would normally have a relocation instruction set and turn
240 relocations into pointers to the correct structure on input -
241 but it would be possible to create each howto field on demand.
247 <<enum complain_overflow>>
249 Indicates what sort of overflow checking should be done when
250 performing a relocation.
254 .enum complain_overflow
256 . {* Do not complain on overflow. *}
257 . complain_overflow_dont,
259 . {* Complain if the value overflows when considered as a signed
260 . number one bit larger than the field. ie. A bitfield of N bits
261 . is allowed to represent -2**n to 2**n-1. *}
262 . complain_overflow_bitfield,
264 . {* Complain if the value overflows when considered as a signed
266 . complain_overflow_signed,
268 . {* Complain if the value overflows when considered as an
269 . unsigned number. *}
270 . complain_overflow_unsigned
279 The <<reloc_howto_type>> is a structure which contains all the
280 information that libbfd needs to know to tie up a back end's data.
283 .struct reloc_howto_struct
285 . {* The type field has mainly a documentary use - the back end can
286 . do what it wants with it, though normally the back end's idea of
287 . an external reloc number is stored in this field. *}
290 . {* The encoded size of the item to be relocated. This is *not* a
291 . power-of-two measure. Use bfd_get_reloc_size to find the size
292 . of the item in bytes. *}
293 . unsigned int size:3;
295 . {* The number of bits in the field to be relocated. This is used
296 . when doing overflow checking. *}
297 . unsigned int bitsize:7;
299 . {* The value the final relocation is shifted right by. This drops
300 . unwanted data from the relocation. *}
301 . unsigned int rightshift:6;
303 . {* The bit position of the reloc value in the destination.
304 . The relocated value is left shifted by this amount. *}
305 . unsigned int bitpos:6;
307 . {* What type of overflow error should be checked for when
309 . ENUM_BITFIELD (complain_overflow) complain_on_overflow:2;
311 . {* The relocation value should be negated before applying. *}
312 . unsigned int negate:1;
314 . {* The relocation is relative to the item being relocated. *}
315 . unsigned int pc_relative:1;
317 . {* Some formats record a relocation addend in the section contents
318 . rather than with the relocation. For ELF formats this is the
319 . distinction between USE_REL and USE_RELA (though the code checks
320 . for USE_REL == 1/0). The value of this field is TRUE if the
321 . addend is recorded with the section contents; when performing a
322 . partial link (ld -r) the section contents (the data) will be
323 . modified. The value of this field is FALSE if addends are
324 . recorded with the relocation (in arelent.addend); when performing
325 . a partial link the relocation will be modified.
326 . All relocations for all ELF USE_RELA targets should set this field
327 . to FALSE (values of TRUE should be looked on with suspicion).
328 . However, the converse is not true: not all relocations of all ELF
329 . USE_REL targets set this field to TRUE. Why this is so is peculiar
330 . to each particular target. For relocs that aren't used in partial
331 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
332 . unsigned int partial_inplace:1;
334 . {* When some formats create PC relative instructions, they leave
335 . the value of the pc of the place being relocated in the offset
336 . slot of the instruction, so that a PC relative relocation can
337 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
338 . Some formats leave the displacement part of an instruction
339 . empty (e.g., ELF); this flag signals the fact. *}
340 . unsigned int pcrel_offset:1;
342 . {* src_mask selects the part of the instruction (or data) to be used
343 . in the relocation sum. If the target relocations don't have an
344 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
345 . dst_mask to extract the addend from the section contents. If
346 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
347 . field should normally be zero. Non-zero values for ELF USE_RELA
348 . targets should be viewed with suspicion as normally the value in
349 . the dst_mask part of the section contents should be ignored. *}
352 . {* dst_mask selects which parts of the instruction (or data) are
353 . replaced with a relocated value. *}
356 . {* If this field is non null, then the supplied function is
357 . called rather than the normal function. This allows really
358 . strange relocation methods to be accommodated. *}
359 . bfd_reloc_status_type (*special_function)
360 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
363 . {* The textual name of the relocation type. *}
374 The HOWTO macro fills in a reloc_howto_type (a typedef for
375 const struct reloc_howto_struct).
377 .#define HOWTO(type, right, size, bits, pcrel, left, ovf, func, name, \
378 . inplace, src_mask, dst_mask, pcrel_off) \
379 . { (unsigned) type, size < 0 ? -size : size, bits, right, left, ovf, \
380 . size < 0, pcrel, inplace, pcrel_off, src_mask, dst_mask, func, name }
383 This is used to fill in an empty howto entry in an array.
385 .#define EMPTY_HOWTO(C) \
386 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
387 . NULL, FALSE, 0, 0, FALSE)
396 unsigned int bfd_get_reloc_size (reloc_howto_type *);
399 For a reloc_howto_type that operates on a fixed number of bytes,
400 this returns the number of bytes operated on.
404 bfd_get_reloc_size (reloc_howto_type
*howto
)
424 How relocs are tied together in an <<asection>>:
426 .typedef struct relent_chain
429 . struct relent_chain *next;
435 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
436 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
443 bfd_reloc_status_type bfd_check_overflow
444 (enum complain_overflow how,
445 unsigned int bitsize,
446 unsigned int rightshift,
447 unsigned int addrsize,
451 Perform overflow checking on @var{relocation} which has
452 @var{bitsize} significant bits and will be shifted right by
453 @var{rightshift} bits, on a machine with addresses containing
454 @var{addrsize} significant bits. The result is either of
455 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
459 bfd_reloc_status_type
460 bfd_check_overflow (enum complain_overflow how
,
461 unsigned int bitsize
,
462 unsigned int rightshift
,
463 unsigned int addrsize
,
466 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
467 bfd_reloc_status_type flag
= bfd_reloc_ok
;
469 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
470 we'll be permissive: extra bits in the field mask will
471 automatically extend the address mask for purposes of the
473 fieldmask
= N_ONES (bitsize
);
474 signmask
= ~fieldmask
;
475 addrmask
= N_ONES (addrsize
) | (fieldmask
<< rightshift
);
476 a
= (relocation
& addrmask
) >> rightshift
;
480 case complain_overflow_dont
:
483 case complain_overflow_signed
:
484 /* If any sign bits are set, all sign bits must be set. That
485 is, A must be a valid negative address after shifting. */
486 signmask
= ~ (fieldmask
>> 1);
489 case complain_overflow_bitfield
:
490 /* Bitfields are sometimes signed, sometimes unsigned. We
491 explicitly allow an address wrap too, which means a bitfield
492 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
493 if the value has some, but not all, bits set outside the
496 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
497 flag
= bfd_reloc_overflow
;
500 case complain_overflow_unsigned
:
501 /* We have an overflow if the address does not fit in the field. */
502 if ((a
& signmask
) != 0)
503 flag
= bfd_reloc_overflow
;
515 bfd_reloc_offset_in_range
518 bfd_boolean bfd_reloc_offset_in_range
519 (reloc_howto_type *howto,
522 bfd_size_type offset);
525 Returns TRUE if the reloc described by @var{HOWTO} can be
526 applied at @var{OFFSET} octets in @var{SECTION}.
530 /* HOWTO describes a relocation, at offset OCTET. Return whether the
531 relocation field is within SECTION of ABFD. */
534 bfd_reloc_offset_in_range (reloc_howto_type
*howto
,
539 bfd_size_type octet_end
= bfd_get_section_limit_octets (abfd
, section
);
540 bfd_size_type reloc_size
= bfd_get_reloc_size (howto
);
542 /* The reloc field must be contained entirely within the section.
543 Allow zero length fields (marker relocs or NONE relocs where no
544 relocation will be performed) at the end of the section. */
545 return octet
<= octet_end
&& octet
+ reloc_size
<= octet_end
;
548 /* Read and return the section contents at DATA converted to a host
549 integer (bfd_vma). The number of bytes read is given by the HOWTO. */
552 read_reloc (bfd
*abfd
, bfd_byte
*data
, reloc_howto_type
*howto
)
557 return bfd_get_8 (abfd
, data
);
560 return bfd_get_16 (abfd
, data
);
563 return bfd_get_32 (abfd
, data
);
570 return bfd_get_64 (abfd
, data
);
574 return bfd_get_24 (abfd
, data
);
582 /* Convert VAL to target format and write to DATA. The number of
583 bytes written is given by the HOWTO. */
586 write_reloc (bfd
*abfd
, bfd_vma val
, bfd_byte
*data
, reloc_howto_type
*howto
)
591 bfd_put_8 (abfd
, val
, data
);
595 bfd_put_16 (abfd
, val
, data
);
599 bfd_put_32 (abfd
, val
, data
);
607 bfd_put_64 (abfd
, val
, data
);
612 bfd_put_24 (abfd
, val
, data
);
620 /* Apply RELOCATION value to target bytes at DATA, according to
624 apply_reloc (bfd
*abfd
, bfd_byte
*data
, reloc_howto_type
*howto
,
627 bfd_vma val
= read_reloc (abfd
, data
, howto
);
630 relocation
= -relocation
;
632 val
= ((val
& ~howto
->dst_mask
)
633 | (((val
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
635 write_reloc (abfd
, val
, data
, howto
);
640 bfd_perform_relocation
643 bfd_reloc_status_type bfd_perform_relocation
645 arelent *reloc_entry,
647 asection *input_section,
649 char **error_message);
652 If @var{output_bfd} is supplied to this function, the
653 generated image will be relocatable; the relocations are
654 copied to the output file after they have been changed to
655 reflect the new state of the world. There are two ways of
656 reflecting the results of partial linkage in an output file:
657 by modifying the output data in place, and by modifying the
658 relocation record. Some native formats (e.g., basic a.out and
659 basic coff) have no way of specifying an addend in the
660 relocation type, so the addend has to go in the output data.
661 This is no big deal since in these formats the output data
662 slot will always be big enough for the addend. Complex reloc
663 types with addends were invented to solve just this problem.
664 The @var{error_message} argument is set to an error message if
665 this return @code{bfd_reloc_dangerous}.
669 bfd_reloc_status_type
670 bfd_perform_relocation (bfd
*abfd
,
671 arelent
*reloc_entry
,
673 asection
*input_section
,
675 char **error_message
)
678 bfd_reloc_status_type flag
= bfd_reloc_ok
;
679 bfd_size_type octets
;
680 bfd_vma output_base
= 0;
681 reloc_howto_type
*howto
= reloc_entry
->howto
;
682 asection
*reloc_target_output_section
;
685 symbol
= *(reloc_entry
->sym_ptr_ptr
);
687 /* If we are not producing relocatable output, return an error if
688 the symbol is not defined. An undefined weak symbol is
689 considered to have a value of zero (SVR4 ABI, p. 4-27). */
690 if (bfd_is_und_section (symbol
->section
)
691 && (symbol
->flags
& BSF_WEAK
) == 0
692 && output_bfd
== NULL
)
693 flag
= bfd_reloc_undefined
;
695 /* If there is a function supplied to handle this relocation type,
696 call it. It'll return `bfd_reloc_continue' if further processing
698 if (howto
&& howto
->special_function
)
700 bfd_reloc_status_type cont
;
702 /* Note - we do not call bfd_reloc_offset_in_range here as the
703 reloc_entry->address field might actually be valid for the
704 backend concerned. It is up to the special_function itself
705 to call bfd_reloc_offset_in_range if needed. */
706 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
707 input_section
, output_bfd
,
709 if (cont
!= bfd_reloc_continue
)
713 if (bfd_is_abs_section (symbol
->section
)
714 && output_bfd
!= NULL
)
716 reloc_entry
->address
+= input_section
->output_offset
;
720 /* PR 17512: file: 0f67f69d. */
722 return bfd_reloc_undefined
;
724 /* Is the address of the relocation really within the section? */
725 octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
726 if (!bfd_reloc_offset_in_range (howto
, abfd
, input_section
, octets
))
727 return bfd_reloc_outofrange
;
729 /* Work out which section the relocation is targeted at and the
730 initial relocation command value. */
732 /* Get symbol value. (Common symbols are special.) */
733 if (bfd_is_com_section (symbol
->section
))
736 relocation
= symbol
->value
;
738 reloc_target_output_section
= symbol
->section
->output_section
;
740 /* Convert input-section-relative symbol value to absolute. */
741 if ((output_bfd
&& ! howto
->partial_inplace
)
742 || reloc_target_output_section
== NULL
)
745 output_base
= reloc_target_output_section
->vma
;
747 relocation
+= output_base
+ symbol
->section
->output_offset
;
749 /* Add in supplied addend. */
750 relocation
+= reloc_entry
->addend
;
752 /* Here the variable relocation holds the final address of the
753 symbol we are relocating against, plus any addend. */
755 if (howto
->pc_relative
)
757 /* This is a PC relative relocation. We want to set RELOCATION
758 to the distance between the address of the symbol and the
759 location. RELOCATION is already the address of the symbol.
761 We start by subtracting the address of the section containing
764 If pcrel_offset is set, we must further subtract the position
765 of the location within the section. Some targets arrange for
766 the addend to be the negative of the position of the location
767 within the section; for example, i386-aout does this. For
768 i386-aout, pcrel_offset is FALSE. Some other targets do not
769 include the position of the location; for example, ELF.
770 For those targets, pcrel_offset is TRUE.
772 If we are producing relocatable output, then we must ensure
773 that this reloc will be correctly computed when the final
774 relocation is done. If pcrel_offset is FALSE we want to wind
775 up with the negative of the location within the section,
776 which means we must adjust the existing addend by the change
777 in the location within the section. If pcrel_offset is TRUE
778 we do not want to adjust the existing addend at all.
780 FIXME: This seems logical to me, but for the case of
781 producing relocatable output it is not what the code
782 actually does. I don't want to change it, because it seems
783 far too likely that something will break. */
786 input_section
->output_section
->vma
+ input_section
->output_offset
;
788 if (howto
->pcrel_offset
)
789 relocation
-= reloc_entry
->address
;
792 if (output_bfd
!= NULL
)
794 if (! howto
->partial_inplace
)
796 /* This is a partial relocation, and we want to apply the relocation
797 to the reloc entry rather than the raw data. Modify the reloc
798 inplace to reflect what we now know. */
799 reloc_entry
->addend
= relocation
;
800 reloc_entry
->address
+= input_section
->output_offset
;
805 /* This is a partial relocation, but inplace, so modify the
808 If we've relocated with a symbol with a section, change
809 into a ref to the section belonging to the symbol. */
811 reloc_entry
->address
+= input_section
->output_offset
;
814 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
815 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
816 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
818 /* For m68k-coff, the addend was being subtracted twice during
819 relocation with -r. Removing the line below this comment
820 fixes that problem; see PR 2953.
822 However, Ian wrote the following, regarding removing the line below,
823 which explains why it is still enabled: --djm
825 If you put a patch like that into BFD you need to check all the COFF
826 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
827 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
828 problem in a different way. There may very well be a reason that the
829 code works as it does.
831 Hmmm. The first obvious point is that bfd_perform_relocation should
832 not have any tests that depend upon the flavour. It's seem like
833 entirely the wrong place for such a thing. The second obvious point
834 is that the current code ignores the reloc addend when producing
835 relocatable output for COFF. That's peculiar. In fact, I really
836 have no idea what the point of the line you want to remove is.
838 A typical COFF reloc subtracts the old value of the symbol and adds in
839 the new value to the location in the object file (if it's a pc
840 relative reloc it adds the difference between the symbol value and the
841 location). When relocating we need to preserve that property.
843 BFD handles this by setting the addend to the negative of the old
844 value of the symbol. Unfortunately it handles common symbols in a
845 non-standard way (it doesn't subtract the old value) but that's a
846 different story (we can't change it without losing backward
847 compatibility with old object files) (coff-i386 does subtract the old
848 value, to be compatible with existing coff-i386 targets, like SCO).
850 So everything works fine when not producing relocatable output. When
851 we are producing relocatable output, logically we should do exactly
852 what we do when not producing relocatable output. Therefore, your
853 patch is correct. In fact, it should probably always just set
854 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
855 add the value into the object file. This won't hurt the COFF code,
856 which doesn't use the addend; I'm not sure what it will do to other
857 formats (the thing to check for would be whether any formats both use
858 the addend and set partial_inplace).
860 When I wanted to make coff-i386 produce relocatable output, I ran
861 into the problem that you are running into: I wanted to remove that
862 line. Rather than risk it, I made the coff-i386 relocs use a special
863 function; it's coff_i386_reloc in coff-i386.c. The function
864 specifically adds the addend field into the object file, knowing that
865 bfd_perform_relocation is not going to. If you remove that line, then
866 coff-i386.c will wind up adding the addend field in twice. It's
867 trivial to fix; it just needs to be done.
869 The problem with removing the line is just that it may break some
870 working code. With BFD it's hard to be sure of anything. The right
871 way to deal with this is simply to build and test at least all the
872 supported COFF targets. It should be straightforward if time and disk
873 space consuming. For each target:
875 2) generate some executable, and link it using -r (I would
876 probably use paranoia.o and link against newlib/libc.a, which
877 for all the supported targets would be available in
878 /usr/cygnus/progressive/H-host/target/lib/libc.a).
879 3) make the change to reloc.c
880 4) rebuild the linker
882 6) if the resulting object files are the same, you have at least
884 7) if they are different you have to figure out which version is
887 relocation
-= reloc_entry
->addend
;
888 reloc_entry
->addend
= 0;
892 reloc_entry
->addend
= relocation
;
897 /* FIXME: This overflow checking is incomplete, because the value
898 might have overflowed before we get here. For a correct check we
899 need to compute the value in a size larger than bitsize, but we
900 can't reasonably do that for a reloc the same size as a host
902 FIXME: We should also do overflow checking on the result after
903 adding in the value contained in the object file. */
904 if (howto
->complain_on_overflow
!= complain_overflow_dont
905 && flag
== bfd_reloc_ok
)
906 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
909 bfd_arch_bits_per_address (abfd
),
912 /* Either we are relocating all the way, or we don't want to apply
913 the relocation to the reloc entry (probably because there isn't
914 any room in the output format to describe addends to relocs). */
916 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
917 (OSF version 1.3, compiler version 3.11). It miscompiles the
931 x <<= (unsigned long) s.i0;
935 printf ("succeeded (%lx)\n", x);
939 relocation
>>= (bfd_vma
) howto
->rightshift
;
941 /* Shift everything up to where it's going to be used. */
942 relocation
<<= (bfd_vma
) howto
->bitpos
;
944 /* Wait for the day when all have the mask in them. */
947 i instruction to be left alone
948 o offset within instruction
949 r relocation offset to apply
958 (( i i i i i o o o o o from bfd_get<size>
959 and S S S S S) to get the size offset we want
960 + r r r r r r r r r r) to get the final value to place
961 and D D D D D to chop to right size
962 -----------------------
965 ( i i i i i o o o o o from bfd_get<size>
966 and N N N N N ) get instruction
967 -----------------------
973 -----------------------
974 = R R R R R R R R R R put into bfd_put<size>
977 data
= (bfd_byte
*) data
+ octets
;
978 apply_reloc (abfd
, data
, howto
, relocation
);
984 bfd_install_relocation
987 bfd_reloc_status_type bfd_install_relocation
989 arelent *reloc_entry,
990 void *data, bfd_vma data_start,
991 asection *input_section,
992 char **error_message);
995 This looks remarkably like <<bfd_perform_relocation>>, except it
996 does not expect that the section contents have been filled in.
997 I.e., it's suitable for use when creating, rather than applying
1000 For now, this function should be considered reserved for the
1004 bfd_reloc_status_type
1005 bfd_install_relocation (bfd
*abfd
,
1006 arelent
*reloc_entry
,
1008 bfd_vma data_start_offset
,
1009 asection
*input_section
,
1010 char **error_message
)
1013 bfd_reloc_status_type flag
= bfd_reloc_ok
;
1014 bfd_size_type octets
;
1015 bfd_vma output_base
= 0;
1016 reloc_howto_type
*howto
= reloc_entry
->howto
;
1017 asection
*reloc_target_output_section
;
1021 symbol
= *(reloc_entry
->sym_ptr_ptr
);
1023 /* If there is a function supplied to handle this relocation type,
1024 call it. It'll return `bfd_reloc_continue' if further processing
1026 if (howto
&& howto
->special_function
)
1028 bfd_reloc_status_type cont
;
1030 /* Note - we do not call bfd_reloc_offset_in_range here as the
1031 reloc_entry->address field might actually be valid for the
1032 backend concerned. It is up to the special_function itself
1033 to call bfd_reloc_offset_in_range if needed. */
1034 /* XXX - The special_function calls haven't been fixed up to deal
1035 with creating new relocations and section contents. */
1036 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
1037 /* XXX - Non-portable! */
1038 ((bfd_byte
*) data_start
1039 - data_start_offset
),
1040 input_section
, abfd
, error_message
);
1041 if (cont
!= bfd_reloc_continue
)
1045 if (bfd_is_abs_section (symbol
->section
))
1047 reloc_entry
->address
+= input_section
->output_offset
;
1048 return bfd_reloc_ok
;
1051 /* No need to check for howto != NULL if !bfd_is_abs_section as
1052 it will have been checked in `bfd_perform_relocation already'. */
1054 /* Is the address of the relocation really within the section? */
1055 octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
1056 if (!bfd_reloc_offset_in_range (howto
, abfd
, input_section
, octets
))
1057 return bfd_reloc_outofrange
;
1059 /* Work out which section the relocation is targeted at and the
1060 initial relocation command value. */
1062 /* Get symbol value. (Common symbols are special.) */
1063 if (bfd_is_com_section (symbol
->section
))
1066 relocation
= symbol
->value
;
1068 reloc_target_output_section
= symbol
->section
->output_section
;
1070 /* Convert input-section-relative symbol value to absolute. */
1071 if (! howto
->partial_inplace
)
1074 output_base
= reloc_target_output_section
->vma
;
1076 relocation
+= output_base
+ symbol
->section
->output_offset
;
1078 /* Add in supplied addend. */
1079 relocation
+= reloc_entry
->addend
;
1081 /* Here the variable relocation holds the final address of the
1082 symbol we are relocating against, plus any addend. */
1084 if (howto
->pc_relative
)
1086 /* This is a PC relative relocation. We want to set RELOCATION
1087 to the distance between the address of the symbol and the
1088 location. RELOCATION is already the address of the symbol.
1090 We start by subtracting the address of the section containing
1093 If pcrel_offset is set, we must further subtract the position
1094 of the location within the section. Some targets arrange for
1095 the addend to be the negative of the position of the location
1096 within the section; for example, i386-aout does this. For
1097 i386-aout, pcrel_offset is FALSE. Some other targets do not
1098 include the position of the location; for example, ELF.
1099 For those targets, pcrel_offset is TRUE.
1101 If we are producing relocatable output, then we must ensure
1102 that this reloc will be correctly computed when the final
1103 relocation is done. If pcrel_offset is FALSE we want to wind
1104 up with the negative of the location within the section,
1105 which means we must adjust the existing addend by the change
1106 in the location within the section. If pcrel_offset is TRUE
1107 we do not want to adjust the existing addend at all.
1109 FIXME: This seems logical to me, but for the case of
1110 producing relocatable output it is not what the code
1111 actually does. I don't want to change it, because it seems
1112 far too likely that something will break. */
1115 input_section
->output_section
->vma
+ input_section
->output_offset
;
1117 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1118 relocation
-= reloc_entry
->address
;
1121 if (! howto
->partial_inplace
)
1123 /* This is a partial relocation, and we want to apply the relocation
1124 to the reloc entry rather than the raw data. Modify the reloc
1125 inplace to reflect what we now know. */
1126 reloc_entry
->addend
= relocation
;
1127 reloc_entry
->address
+= input_section
->output_offset
;
1132 /* This is a partial relocation, but inplace, so modify the
1135 If we've relocated with a symbol with a section, change
1136 into a ref to the section belonging to the symbol. */
1137 reloc_entry
->address
+= input_section
->output_offset
;
1140 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1141 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1142 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1145 /* For m68k-coff, the addend was being subtracted twice during
1146 relocation with -r. Removing the line below this comment
1147 fixes that problem; see PR 2953.
1149 However, Ian wrote the following, regarding removing the line below,
1150 which explains why it is still enabled: --djm
1152 If you put a patch like that into BFD you need to check all the COFF
1153 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1154 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1155 problem in a different way. There may very well be a reason that the
1156 code works as it does.
1158 Hmmm. The first obvious point is that bfd_install_relocation should
1159 not have any tests that depend upon the flavour. It's seem like
1160 entirely the wrong place for such a thing. The second obvious point
1161 is that the current code ignores the reloc addend when producing
1162 relocatable output for COFF. That's peculiar. In fact, I really
1163 have no idea what the point of the line you want to remove is.
1165 A typical COFF reloc subtracts the old value of the symbol and adds in
1166 the new value to the location in the object file (if it's a pc
1167 relative reloc it adds the difference between the symbol value and the
1168 location). When relocating we need to preserve that property.
1170 BFD handles this by setting the addend to the negative of the old
1171 value of the symbol. Unfortunately it handles common symbols in a
1172 non-standard way (it doesn't subtract the old value) but that's a
1173 different story (we can't change it without losing backward
1174 compatibility with old object files) (coff-i386 does subtract the old
1175 value, to be compatible with existing coff-i386 targets, like SCO).
1177 So everything works fine when not producing relocatable output. When
1178 we are producing relocatable output, logically we should do exactly
1179 what we do when not producing relocatable output. Therefore, your
1180 patch is correct. In fact, it should probably always just set
1181 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1182 add the value into the object file. This won't hurt the COFF code,
1183 which doesn't use the addend; I'm not sure what it will do to other
1184 formats (the thing to check for would be whether any formats both use
1185 the addend and set partial_inplace).
1187 When I wanted to make coff-i386 produce relocatable output, I ran
1188 into the problem that you are running into: I wanted to remove that
1189 line. Rather than risk it, I made the coff-i386 relocs use a special
1190 function; it's coff_i386_reloc in coff-i386.c. The function
1191 specifically adds the addend field into the object file, knowing that
1192 bfd_install_relocation is not going to. If you remove that line, then
1193 coff-i386.c will wind up adding the addend field in twice. It's
1194 trivial to fix; it just needs to be done.
1196 The problem with removing the line is just that it may break some
1197 working code. With BFD it's hard to be sure of anything. The right
1198 way to deal with this is simply to build and test at least all the
1199 supported COFF targets. It should be straightforward if time and disk
1200 space consuming. For each target:
1202 2) generate some executable, and link it using -r (I would
1203 probably use paranoia.o and link against newlib/libc.a, which
1204 for all the supported targets would be available in
1205 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1206 3) make the change to reloc.c
1207 4) rebuild the linker
1209 6) if the resulting object files are the same, you have at least
1211 7) if they are different you have to figure out which version is
1213 relocation
-= reloc_entry
->addend
;
1214 /* FIXME: There should be no target specific code here... */
1215 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1216 reloc_entry
->addend
= 0;
1220 reloc_entry
->addend
= relocation
;
1224 /* FIXME: This overflow checking is incomplete, because the value
1225 might have overflowed before we get here. For a correct check we
1226 need to compute the value in a size larger than bitsize, but we
1227 can't reasonably do that for a reloc the same size as a host
1229 FIXME: We should also do overflow checking on the result after
1230 adding in the value contained in the object file. */
1231 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1232 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1235 bfd_arch_bits_per_address (abfd
),
1238 /* Either we are relocating all the way, or we don't want to apply
1239 the relocation to the reloc entry (probably because there isn't
1240 any room in the output format to describe addends to relocs). */
1242 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1243 (OSF version 1.3, compiler version 3.11). It miscompiles the
1257 x <<= (unsigned long) s.i0;
1259 printf ("failed\n");
1261 printf ("succeeded (%lx)\n", x);
1265 relocation
>>= (bfd_vma
) howto
->rightshift
;
1267 /* Shift everything up to where it's going to be used. */
1268 relocation
<<= (bfd_vma
) howto
->bitpos
;
1270 /* Wait for the day when all have the mask in them. */
1273 i instruction to be left alone
1274 o offset within instruction
1275 r relocation offset to apply
1284 (( i i i i i o o o o o from bfd_get<size>
1285 and S S S S S) to get the size offset we want
1286 + r r r r r r r r r r) to get the final value to place
1287 and D D D D D to chop to right size
1288 -----------------------
1291 ( i i i i i o o o o o from bfd_get<size>
1292 and N N N N N ) get instruction
1293 -----------------------
1299 -----------------------
1300 = R R R R R R R R R R put into bfd_put<size>
1303 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1304 apply_reloc (abfd
, data
, howto
, relocation
);
1308 /* This relocation routine is used by some of the backend linkers.
1309 They do not construct asymbol or arelent structures, so there is no
1310 reason for them to use bfd_perform_relocation. Also,
1311 bfd_perform_relocation is so hacked up it is easier to write a new
1312 function than to try to deal with it.
1314 This routine does a final relocation. Whether it is useful for a
1315 relocatable link depends upon how the object format defines
1318 FIXME: This routine ignores any special_function in the HOWTO,
1319 since the existing special_function values have been written for
1320 bfd_perform_relocation.
1322 HOWTO is the reloc howto information.
1323 INPUT_BFD is the BFD which the reloc applies to.
1324 INPUT_SECTION is the section which the reloc applies to.
1325 CONTENTS is the contents of the section.
1326 ADDRESS is the address of the reloc within INPUT_SECTION.
1327 VALUE is the value of the symbol the reloc refers to.
1328 ADDEND is the addend of the reloc. */
1330 bfd_reloc_status_type
1331 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1333 asection
*input_section
,
1340 bfd_size_type octets
= address
* bfd_octets_per_byte (input_bfd
);
1342 /* Sanity check the address. */
1343 if (!bfd_reloc_offset_in_range (howto
, input_bfd
, input_section
, octets
))
1344 return bfd_reloc_outofrange
;
1346 /* This function assumes that we are dealing with a basic relocation
1347 against a symbol. We want to compute the value of the symbol to
1348 relocate to. This is just VALUE, the value of the symbol, plus
1349 ADDEND, any addend associated with the reloc. */
1350 relocation
= value
+ addend
;
1352 /* If the relocation is PC relative, we want to set RELOCATION to
1353 the distance between the symbol (currently in RELOCATION) and the
1354 location we are relocating. Some targets (e.g., i386-aout)
1355 arrange for the contents of the section to be the negative of the
1356 offset of the location within the section; for such targets
1357 pcrel_offset is FALSE. Other targets (e.g., ELF) simply leave
1358 the contents of the section as zero; for such targets
1359 pcrel_offset is TRUE. If pcrel_offset is FALSE we do not need to
1360 subtract out the offset of the location within the section (which
1361 is just ADDRESS). */
1362 if (howto
->pc_relative
)
1364 relocation
-= (input_section
->output_section
->vma
1365 + input_section
->output_offset
);
1366 if (howto
->pcrel_offset
)
1367 relocation
-= address
;
1370 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1372 + address
* bfd_octets_per_byte (input_bfd
));
1375 /* Relocate a given location using a given value and howto. */
1377 bfd_reloc_status_type
1378 _bfd_relocate_contents (reloc_howto_type
*howto
,
1384 bfd_reloc_status_type flag
;
1385 unsigned int rightshift
= howto
->rightshift
;
1386 unsigned int bitpos
= howto
->bitpos
;
1389 relocation
= -relocation
;
1391 /* Get the value we are going to relocate. */
1392 x
= read_reloc (input_bfd
, location
, howto
);
1394 /* Check for overflow. FIXME: We may drop bits during the addition
1395 which we don't check for. We must either check at every single
1396 operation, which would be tedious, or we must do the computations
1397 in a type larger than bfd_vma, which would be inefficient. */
1398 flag
= bfd_reloc_ok
;
1399 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1401 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1404 /* Get the values to be added together. For signed and unsigned
1405 relocations, we assume that all values should be truncated to
1406 the size of an address. For bitfields, all the bits matter.
1407 See also bfd_check_overflow. */
1408 fieldmask
= N_ONES (howto
->bitsize
);
1409 signmask
= ~fieldmask
;
1410 addrmask
= (N_ONES (bfd_arch_bits_per_address (input_bfd
))
1411 | (fieldmask
<< rightshift
));
1412 a
= (relocation
& addrmask
) >> rightshift
;
1413 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1414 addrmask
>>= rightshift
;
1416 switch (howto
->complain_on_overflow
)
1418 case complain_overflow_signed
:
1419 /* If any sign bits are set, all sign bits must be set.
1420 That is, A must be a valid negative address after
1422 signmask
= ~(fieldmask
>> 1);
1425 case complain_overflow_bitfield
:
1426 /* Much like the signed check, but for a field one bit
1427 wider. We allow a bitfield to represent numbers in the
1428 range -2**n to 2**n-1, where n is the number of bits in the
1429 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1430 can't overflow, which is exactly what we want. */
1432 if (ss
!= 0 && ss
!= (addrmask
& signmask
))
1433 flag
= bfd_reloc_overflow
;
1435 /* We only need this next bit of code if the sign bit of B
1436 is below the sign bit of A. This would only happen if
1437 SRC_MASK had fewer bits than BITSIZE. Note that if
1438 SRC_MASK has more bits than BITSIZE, we can get into
1439 trouble; we would need to verify that B is in range, as
1440 we do for A above. */
1441 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1444 /* Set all the bits above the sign bit. */
1447 /* Now we can do the addition. */
1450 /* See if the result has the correct sign. Bits above the
1451 sign bit are junk now; ignore them. If the sum is
1452 positive, make sure we did not have all negative inputs;
1453 if the sum is negative, make sure we did not have all
1454 positive inputs. The test below looks only at the sign
1455 bits, and it really just
1456 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1458 We mask with addrmask here to explicitly allow an address
1459 wrap-around. The Linux kernel relies on it, and it is
1460 the only way to write assembler code which can run when
1461 loaded at a location 0x80000000 away from the location at
1462 which it is linked. */
1463 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1464 flag
= bfd_reloc_overflow
;
1467 case complain_overflow_unsigned
:
1468 /* Checking for an unsigned overflow is relatively easy:
1469 trim the addresses and add, and trim the result as well.
1470 Overflow is normally indicated when the result does not
1471 fit in the field. However, we also need to consider the
1472 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1473 input is 0x80000000, and bfd_vma is only 32 bits; then we
1474 will get sum == 0, but there is an overflow, since the
1475 inputs did not fit in the field. Instead of doing a
1476 separate test, we can check for this by or-ing in the
1477 operands when testing for the sum overflowing its final
1479 sum
= (a
+ b
) & addrmask
;
1480 if ((a
| b
| sum
) & signmask
)
1481 flag
= bfd_reloc_overflow
;
1489 /* Put RELOCATION in the right bits. */
1490 relocation
>>= (bfd_vma
) rightshift
;
1491 relocation
<<= (bfd_vma
) bitpos
;
1493 /* Add RELOCATION to the right bits of X. */
1494 x
= ((x
& ~howto
->dst_mask
)
1495 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1497 /* Put the relocated value back in the object file. */
1498 write_reloc (input_bfd
, x
, location
, howto
);
1502 /* Clear a given location using a given howto, by applying a fixed relocation
1503 value and discarding any in-place addend. This is used for fixed-up
1504 relocations against discarded symbols, to make ignorable debug or unwind
1505 information more obvious. */
1507 bfd_reloc_status_type
1508 _bfd_clear_contents (reloc_howto_type
*howto
,
1510 asection
*input_section
,
1517 if (!bfd_reloc_offset_in_range (howto
, input_bfd
, input_section
, off
))
1518 return bfd_reloc_outofrange
;
1520 /* Get the value we are going to relocate. */
1521 location
= buf
+ off
;
1522 x
= read_reloc (input_bfd
, location
, howto
);
1524 /* Zero out the unwanted bits of X. */
1525 x
&= ~howto
->dst_mask
;
1527 /* For a range list, use 1 instead of 0 as placeholder. 0
1528 would terminate the list, hiding any later entries. */
1529 if (strcmp (bfd_get_section_name (input_bfd
, input_section
),
1530 ".debug_ranges") == 0
1531 && (howto
->dst_mask
& 1) != 0)
1534 /* Put the relocated value back in the object file. */
1535 write_reloc (input_bfd
, x
, location
, howto
);
1536 return bfd_reloc_ok
;
1542 howto manager, , typedef arelent, Relocations
1547 When an application wants to create a relocation, but doesn't
1548 know what the target machine might call it, it can find out by
1549 using this bit of code.
1558 The insides of a reloc code. The idea is that, eventually, there
1559 will be one enumerator for every type of relocation we ever do.
1560 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1561 return a howto pointer.
1563 This does mean that the application must determine the correct
1564 enumerator value; you can't get a howto pointer from a random set
1585 Basic absolute relocations of N bits.
1600 PC-relative relocations. Sometimes these are relative to the address
1601 of the relocation itself; sometimes they are relative to the start of
1602 the section containing the relocation. It depends on the specific target.
1607 Section relative relocations. Some targets need this for DWARF2.
1610 BFD_RELOC_32_GOT_PCREL
1612 BFD_RELOC_16_GOT_PCREL
1614 BFD_RELOC_8_GOT_PCREL
1620 BFD_RELOC_LO16_GOTOFF
1622 BFD_RELOC_HI16_GOTOFF
1624 BFD_RELOC_HI16_S_GOTOFF
1628 BFD_RELOC_64_PLT_PCREL
1630 BFD_RELOC_32_PLT_PCREL
1632 BFD_RELOC_24_PLT_PCREL
1634 BFD_RELOC_16_PLT_PCREL
1636 BFD_RELOC_8_PLT_PCREL
1644 BFD_RELOC_LO16_PLTOFF
1646 BFD_RELOC_HI16_PLTOFF
1648 BFD_RELOC_HI16_S_PLTOFF
1662 BFD_RELOC_68K_GLOB_DAT
1664 BFD_RELOC_68K_JMP_SLOT
1666 BFD_RELOC_68K_RELATIVE
1668 BFD_RELOC_68K_TLS_GD32
1670 BFD_RELOC_68K_TLS_GD16
1672 BFD_RELOC_68K_TLS_GD8
1674 BFD_RELOC_68K_TLS_LDM32
1676 BFD_RELOC_68K_TLS_LDM16
1678 BFD_RELOC_68K_TLS_LDM8
1680 BFD_RELOC_68K_TLS_LDO32
1682 BFD_RELOC_68K_TLS_LDO16
1684 BFD_RELOC_68K_TLS_LDO8
1686 BFD_RELOC_68K_TLS_IE32
1688 BFD_RELOC_68K_TLS_IE16
1690 BFD_RELOC_68K_TLS_IE8
1692 BFD_RELOC_68K_TLS_LE32
1694 BFD_RELOC_68K_TLS_LE16
1696 BFD_RELOC_68K_TLS_LE8
1698 Relocations used by 68K ELF.
1701 BFD_RELOC_32_BASEREL
1703 BFD_RELOC_16_BASEREL
1705 BFD_RELOC_LO16_BASEREL
1707 BFD_RELOC_HI16_BASEREL
1709 BFD_RELOC_HI16_S_BASEREL
1715 Linkage-table relative.
1720 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1723 BFD_RELOC_32_PCREL_S2
1725 BFD_RELOC_16_PCREL_S2
1727 BFD_RELOC_23_PCREL_S2
1729 These PC-relative relocations are stored as word displacements --
1730 i.e., byte displacements shifted right two bits. The 30-bit word
1731 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1732 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1733 signed 16-bit displacement is used on the MIPS, and the 23-bit
1734 displacement is used on the Alpha.
1741 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1742 the target word. These are used on the SPARC.
1749 For systems that allocate a Global Pointer register, these are
1750 displacements off that register. These relocation types are
1751 handled specially, because the value the register will have is
1752 decided relatively late.
1757 BFD_RELOC_SPARC_WDISP22
1763 BFD_RELOC_SPARC_GOT10
1765 BFD_RELOC_SPARC_GOT13
1767 BFD_RELOC_SPARC_GOT22
1769 BFD_RELOC_SPARC_PC10
1771 BFD_RELOC_SPARC_PC22
1773 BFD_RELOC_SPARC_WPLT30
1775 BFD_RELOC_SPARC_COPY
1777 BFD_RELOC_SPARC_GLOB_DAT
1779 BFD_RELOC_SPARC_JMP_SLOT
1781 BFD_RELOC_SPARC_RELATIVE
1783 BFD_RELOC_SPARC_UA16
1785 BFD_RELOC_SPARC_UA32
1787 BFD_RELOC_SPARC_UA64
1789 BFD_RELOC_SPARC_GOTDATA_HIX22
1791 BFD_RELOC_SPARC_GOTDATA_LOX10
1793 BFD_RELOC_SPARC_GOTDATA_OP_HIX22
1795 BFD_RELOC_SPARC_GOTDATA_OP_LOX10
1797 BFD_RELOC_SPARC_GOTDATA_OP
1799 BFD_RELOC_SPARC_JMP_IREL
1801 BFD_RELOC_SPARC_IRELATIVE
1803 SPARC ELF relocations. There is probably some overlap with other
1804 relocation types already defined.
1807 BFD_RELOC_SPARC_BASE13
1809 BFD_RELOC_SPARC_BASE22
1811 I think these are specific to SPARC a.out (e.g., Sun 4).
1821 BFD_RELOC_SPARC_OLO10
1823 BFD_RELOC_SPARC_HH22
1825 BFD_RELOC_SPARC_HM10
1827 BFD_RELOC_SPARC_LM22
1829 BFD_RELOC_SPARC_PC_HH22
1831 BFD_RELOC_SPARC_PC_HM10
1833 BFD_RELOC_SPARC_PC_LM22
1835 BFD_RELOC_SPARC_WDISP16
1837 BFD_RELOC_SPARC_WDISP19
1845 BFD_RELOC_SPARC_DISP64
1848 BFD_RELOC_SPARC_PLT32
1850 BFD_RELOC_SPARC_PLT64
1852 BFD_RELOC_SPARC_HIX22
1854 BFD_RELOC_SPARC_LOX10
1862 BFD_RELOC_SPARC_REGISTER
1866 BFD_RELOC_SPARC_SIZE32
1868 BFD_RELOC_SPARC_SIZE64
1870 BFD_RELOC_SPARC_WDISP10
1875 BFD_RELOC_SPARC_REV32
1877 SPARC little endian relocation
1879 BFD_RELOC_SPARC_TLS_GD_HI22
1881 BFD_RELOC_SPARC_TLS_GD_LO10
1883 BFD_RELOC_SPARC_TLS_GD_ADD
1885 BFD_RELOC_SPARC_TLS_GD_CALL
1887 BFD_RELOC_SPARC_TLS_LDM_HI22
1889 BFD_RELOC_SPARC_TLS_LDM_LO10
1891 BFD_RELOC_SPARC_TLS_LDM_ADD
1893 BFD_RELOC_SPARC_TLS_LDM_CALL
1895 BFD_RELOC_SPARC_TLS_LDO_HIX22
1897 BFD_RELOC_SPARC_TLS_LDO_LOX10
1899 BFD_RELOC_SPARC_TLS_LDO_ADD
1901 BFD_RELOC_SPARC_TLS_IE_HI22
1903 BFD_RELOC_SPARC_TLS_IE_LO10
1905 BFD_RELOC_SPARC_TLS_IE_LD
1907 BFD_RELOC_SPARC_TLS_IE_LDX
1909 BFD_RELOC_SPARC_TLS_IE_ADD
1911 BFD_RELOC_SPARC_TLS_LE_HIX22
1913 BFD_RELOC_SPARC_TLS_LE_LOX10
1915 BFD_RELOC_SPARC_TLS_DTPMOD32
1917 BFD_RELOC_SPARC_TLS_DTPMOD64
1919 BFD_RELOC_SPARC_TLS_DTPOFF32
1921 BFD_RELOC_SPARC_TLS_DTPOFF64
1923 BFD_RELOC_SPARC_TLS_TPOFF32
1925 BFD_RELOC_SPARC_TLS_TPOFF64
1927 SPARC TLS relocations
1936 BFD_RELOC_SPU_IMM10W
1940 BFD_RELOC_SPU_IMM16W
1944 BFD_RELOC_SPU_PCREL9a
1946 BFD_RELOC_SPU_PCREL9b
1948 BFD_RELOC_SPU_PCREL16
1958 BFD_RELOC_SPU_ADD_PIC
1963 BFD_RELOC_ALPHA_GPDISP_HI16
1965 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1966 "addend" in some special way.
1967 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1968 writing; when reading, it will be the absolute section symbol. The
1969 addend is the displacement in bytes of the "lda" instruction from
1970 the "ldah" instruction (which is at the address of this reloc).
1972 BFD_RELOC_ALPHA_GPDISP_LO16
1974 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1975 with GPDISP_HI16 relocs. The addend is ignored when writing the
1976 relocations out, and is filled in with the file's GP value on
1977 reading, for convenience.
1980 BFD_RELOC_ALPHA_GPDISP
1982 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1983 relocation except that there is no accompanying GPDISP_LO16
1987 BFD_RELOC_ALPHA_LITERAL
1989 BFD_RELOC_ALPHA_ELF_LITERAL
1991 BFD_RELOC_ALPHA_LITUSE
1993 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1994 the assembler turns it into a LDQ instruction to load the address of
1995 the symbol, and then fills in a register in the real instruction.
1997 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1998 section symbol. The addend is ignored when writing, but is filled
1999 in with the file's GP value on reading, for convenience, as with the
2002 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
2003 It should refer to the symbol to be referenced, as with 16_GOTOFF,
2004 but it generates output not based on the position within the .got
2005 section, but relative to the GP value chosen for the file during the
2008 The LITUSE reloc, on the instruction using the loaded address, gives
2009 information to the linker that it might be able to use to optimize
2010 away some literal section references. The symbol is ignored (read
2011 as the absolute section symbol), and the "addend" indicates the type
2012 of instruction using the register:
2013 1 - "memory" fmt insn
2014 2 - byte-manipulation (byte offset reg)
2015 3 - jsr (target of branch)
2018 BFD_RELOC_ALPHA_HINT
2020 The HINT relocation indicates a value that should be filled into the
2021 "hint" field of a jmp/jsr/ret instruction, for possible branch-
2022 prediction logic which may be provided on some processors.
2025 BFD_RELOC_ALPHA_LINKAGE
2027 The LINKAGE relocation outputs a linkage pair in the object file,
2028 which is filled by the linker.
2031 BFD_RELOC_ALPHA_CODEADDR
2033 The CODEADDR relocation outputs a STO_CA in the object file,
2034 which is filled by the linker.
2037 BFD_RELOC_ALPHA_GPREL_HI16
2039 BFD_RELOC_ALPHA_GPREL_LO16
2041 The GPREL_HI/LO relocations together form a 32-bit offset from the
2045 BFD_RELOC_ALPHA_BRSGP
2047 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2048 share a common GP, and the target address is adjusted for
2049 STO_ALPHA_STD_GPLOAD.
2054 The NOP relocation outputs a NOP if the longword displacement
2055 between two procedure entry points is < 2^21.
2060 The BSR relocation outputs a BSR if the longword displacement
2061 between two procedure entry points is < 2^21.
2066 The LDA relocation outputs a LDA if the longword displacement
2067 between two procedure entry points is < 2^16.
2072 The BOH relocation outputs a BSR if the longword displacement
2073 between two procedure entry points is < 2^21, or else a hint.
2076 BFD_RELOC_ALPHA_TLSGD
2078 BFD_RELOC_ALPHA_TLSLDM
2080 BFD_RELOC_ALPHA_DTPMOD64
2082 BFD_RELOC_ALPHA_GOTDTPREL16
2084 BFD_RELOC_ALPHA_DTPREL64
2086 BFD_RELOC_ALPHA_DTPREL_HI16
2088 BFD_RELOC_ALPHA_DTPREL_LO16
2090 BFD_RELOC_ALPHA_DTPREL16
2092 BFD_RELOC_ALPHA_GOTTPREL16
2094 BFD_RELOC_ALPHA_TPREL64
2096 BFD_RELOC_ALPHA_TPREL_HI16
2098 BFD_RELOC_ALPHA_TPREL_LO16
2100 BFD_RELOC_ALPHA_TPREL16
2102 Alpha thread-local storage relocations.
2107 BFD_RELOC_MICROMIPS_JMP
2109 The MIPS jump instruction.
2112 BFD_RELOC_MIPS16_JMP
2114 The MIPS16 jump instruction.
2117 BFD_RELOC_MIPS16_GPREL
2119 MIPS16 GP relative reloc.
2124 High 16 bits of 32-bit value; simple reloc.
2129 High 16 bits of 32-bit value but the low 16 bits will be sign
2130 extended and added to form the final result. If the low 16
2131 bits form a negative number, we need to add one to the high value
2132 to compensate for the borrow when the low bits are added.
2140 BFD_RELOC_HI16_PCREL
2142 High 16 bits of 32-bit pc-relative value
2144 BFD_RELOC_HI16_S_PCREL
2146 High 16 bits of 32-bit pc-relative value, adjusted
2148 BFD_RELOC_LO16_PCREL
2150 Low 16 bits of pc-relative value
2153 BFD_RELOC_MIPS16_GOT16
2155 BFD_RELOC_MIPS16_CALL16
2157 Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
2158 16-bit immediate fields
2160 BFD_RELOC_MIPS16_HI16
2162 MIPS16 high 16 bits of 32-bit value.
2164 BFD_RELOC_MIPS16_HI16_S
2166 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2167 extended and added to form the final result. If the low 16
2168 bits form a negative number, we need to add one to the high value
2169 to compensate for the borrow when the low bits are added.
2171 BFD_RELOC_MIPS16_LO16
2176 BFD_RELOC_MIPS16_TLS_GD
2178 BFD_RELOC_MIPS16_TLS_LDM
2180 BFD_RELOC_MIPS16_TLS_DTPREL_HI16
2182 BFD_RELOC_MIPS16_TLS_DTPREL_LO16
2184 BFD_RELOC_MIPS16_TLS_GOTTPREL
2186 BFD_RELOC_MIPS16_TLS_TPREL_HI16
2188 BFD_RELOC_MIPS16_TLS_TPREL_LO16
2190 MIPS16 TLS relocations
2193 BFD_RELOC_MIPS_LITERAL
2195 BFD_RELOC_MICROMIPS_LITERAL
2197 Relocation against a MIPS literal section.
2200 BFD_RELOC_MICROMIPS_7_PCREL_S1
2202 BFD_RELOC_MICROMIPS_10_PCREL_S1
2204 BFD_RELOC_MICROMIPS_16_PCREL_S1
2206 microMIPS PC-relative relocations.
2209 BFD_RELOC_MIPS16_16_PCREL_S1
2211 MIPS16 PC-relative relocation.
2214 BFD_RELOC_MIPS_21_PCREL_S2
2216 BFD_RELOC_MIPS_26_PCREL_S2
2218 BFD_RELOC_MIPS_18_PCREL_S3
2220 BFD_RELOC_MIPS_19_PCREL_S2
2222 MIPS PC-relative relocations.
2225 BFD_RELOC_MICROMIPS_GPREL16
2227 BFD_RELOC_MICROMIPS_HI16
2229 BFD_RELOC_MICROMIPS_HI16_S
2231 BFD_RELOC_MICROMIPS_LO16
2233 microMIPS versions of generic BFD relocs.
2236 BFD_RELOC_MIPS_GOT16
2238 BFD_RELOC_MICROMIPS_GOT16
2240 BFD_RELOC_MIPS_CALL16
2242 BFD_RELOC_MICROMIPS_CALL16
2244 BFD_RELOC_MIPS_GOT_HI16
2246 BFD_RELOC_MICROMIPS_GOT_HI16
2248 BFD_RELOC_MIPS_GOT_LO16
2250 BFD_RELOC_MICROMIPS_GOT_LO16
2252 BFD_RELOC_MIPS_CALL_HI16
2254 BFD_RELOC_MICROMIPS_CALL_HI16
2256 BFD_RELOC_MIPS_CALL_LO16
2258 BFD_RELOC_MICROMIPS_CALL_LO16
2262 BFD_RELOC_MICROMIPS_SUB
2264 BFD_RELOC_MIPS_GOT_PAGE
2266 BFD_RELOC_MICROMIPS_GOT_PAGE
2268 BFD_RELOC_MIPS_GOT_OFST
2270 BFD_RELOC_MICROMIPS_GOT_OFST
2272 BFD_RELOC_MIPS_GOT_DISP
2274 BFD_RELOC_MICROMIPS_GOT_DISP
2276 BFD_RELOC_MIPS_SHIFT5
2278 BFD_RELOC_MIPS_SHIFT6
2280 BFD_RELOC_MIPS_INSERT_A
2282 BFD_RELOC_MIPS_INSERT_B
2284 BFD_RELOC_MIPS_DELETE
2286 BFD_RELOC_MIPS_HIGHEST
2288 BFD_RELOC_MICROMIPS_HIGHEST
2290 BFD_RELOC_MIPS_HIGHER
2292 BFD_RELOC_MICROMIPS_HIGHER
2294 BFD_RELOC_MIPS_SCN_DISP
2296 BFD_RELOC_MICROMIPS_SCN_DISP
2298 BFD_RELOC_MIPS_REL16
2300 BFD_RELOC_MIPS_RELGOT
2304 BFD_RELOC_MICROMIPS_JALR
2306 BFD_RELOC_MIPS_TLS_DTPMOD32
2308 BFD_RELOC_MIPS_TLS_DTPREL32
2310 BFD_RELOC_MIPS_TLS_DTPMOD64
2312 BFD_RELOC_MIPS_TLS_DTPREL64
2314 BFD_RELOC_MIPS_TLS_GD
2316 BFD_RELOC_MICROMIPS_TLS_GD
2318 BFD_RELOC_MIPS_TLS_LDM
2320 BFD_RELOC_MICROMIPS_TLS_LDM
2322 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2324 BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16
2326 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2328 BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16
2330 BFD_RELOC_MIPS_TLS_GOTTPREL
2332 BFD_RELOC_MICROMIPS_TLS_GOTTPREL
2334 BFD_RELOC_MIPS_TLS_TPREL32
2336 BFD_RELOC_MIPS_TLS_TPREL64
2338 BFD_RELOC_MIPS_TLS_TPREL_HI16
2340 BFD_RELOC_MICROMIPS_TLS_TPREL_HI16
2342 BFD_RELOC_MIPS_TLS_TPREL_LO16
2344 BFD_RELOC_MICROMIPS_TLS_TPREL_LO16
2348 MIPS ELF relocations.
2354 BFD_RELOC_MIPS_JUMP_SLOT
2356 MIPS ELF relocations (VxWorks and PLT extensions).
2360 BFD_RELOC_MOXIE_10_PCREL
2362 Moxie ELF relocations.
2374 BFD_RELOC_FT32_RELAX
2382 BFD_RELOC_FT32_DIFF32
2384 FT32 ELF relocations.
2388 BFD_RELOC_FRV_LABEL16
2390 BFD_RELOC_FRV_LABEL24
2396 BFD_RELOC_FRV_GPREL12
2398 BFD_RELOC_FRV_GPRELU12
2400 BFD_RELOC_FRV_GPREL32
2402 BFD_RELOC_FRV_GPRELHI
2404 BFD_RELOC_FRV_GPRELLO
2412 BFD_RELOC_FRV_FUNCDESC
2414 BFD_RELOC_FRV_FUNCDESC_GOT12
2416 BFD_RELOC_FRV_FUNCDESC_GOTHI
2418 BFD_RELOC_FRV_FUNCDESC_GOTLO
2420 BFD_RELOC_FRV_FUNCDESC_VALUE
2422 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2424 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2426 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2428 BFD_RELOC_FRV_GOTOFF12
2430 BFD_RELOC_FRV_GOTOFFHI
2432 BFD_RELOC_FRV_GOTOFFLO
2434 BFD_RELOC_FRV_GETTLSOFF
2436 BFD_RELOC_FRV_TLSDESC_VALUE
2438 BFD_RELOC_FRV_GOTTLSDESC12
2440 BFD_RELOC_FRV_GOTTLSDESCHI
2442 BFD_RELOC_FRV_GOTTLSDESCLO
2444 BFD_RELOC_FRV_TLSMOFF12
2446 BFD_RELOC_FRV_TLSMOFFHI
2448 BFD_RELOC_FRV_TLSMOFFLO
2450 BFD_RELOC_FRV_GOTTLSOFF12
2452 BFD_RELOC_FRV_GOTTLSOFFHI
2454 BFD_RELOC_FRV_GOTTLSOFFLO
2456 BFD_RELOC_FRV_TLSOFF
2458 BFD_RELOC_FRV_TLSDESC_RELAX
2460 BFD_RELOC_FRV_GETTLSOFF_RELAX
2462 BFD_RELOC_FRV_TLSOFF_RELAX
2464 BFD_RELOC_FRV_TLSMOFF
2466 Fujitsu Frv Relocations.
2470 BFD_RELOC_MN10300_GOTOFF24
2472 This is a 24bit GOT-relative reloc for the mn10300.
2474 BFD_RELOC_MN10300_GOT32
2476 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2479 BFD_RELOC_MN10300_GOT24
2481 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2484 BFD_RELOC_MN10300_GOT16
2486 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2489 BFD_RELOC_MN10300_COPY
2491 Copy symbol at runtime.
2493 BFD_RELOC_MN10300_GLOB_DAT
2497 BFD_RELOC_MN10300_JMP_SLOT
2501 BFD_RELOC_MN10300_RELATIVE
2503 Adjust by program base.
2505 BFD_RELOC_MN10300_SYM_DIFF
2507 Together with another reloc targeted at the same location,
2508 allows for a value that is the difference of two symbols
2509 in the same section.
2511 BFD_RELOC_MN10300_ALIGN
2513 The addend of this reloc is an alignment power that must
2514 be honoured at the offset's location, regardless of linker
2517 BFD_RELOC_MN10300_TLS_GD
2519 BFD_RELOC_MN10300_TLS_LD
2521 BFD_RELOC_MN10300_TLS_LDO
2523 BFD_RELOC_MN10300_TLS_GOTIE
2525 BFD_RELOC_MN10300_TLS_IE
2527 BFD_RELOC_MN10300_TLS_LE
2529 BFD_RELOC_MN10300_TLS_DTPMOD
2531 BFD_RELOC_MN10300_TLS_DTPOFF
2533 BFD_RELOC_MN10300_TLS_TPOFF
2535 Various TLS-related relocations.
2537 BFD_RELOC_MN10300_32_PCREL
2539 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
2542 BFD_RELOC_MN10300_16_PCREL
2544 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
2555 BFD_RELOC_386_GLOB_DAT
2557 BFD_RELOC_386_JUMP_SLOT
2559 BFD_RELOC_386_RELATIVE
2561 BFD_RELOC_386_GOTOFF
2565 BFD_RELOC_386_TLS_TPOFF
2567 BFD_RELOC_386_TLS_IE
2569 BFD_RELOC_386_TLS_GOTIE
2571 BFD_RELOC_386_TLS_LE
2573 BFD_RELOC_386_TLS_GD
2575 BFD_RELOC_386_TLS_LDM
2577 BFD_RELOC_386_TLS_LDO_32
2579 BFD_RELOC_386_TLS_IE_32
2581 BFD_RELOC_386_TLS_LE_32
2583 BFD_RELOC_386_TLS_DTPMOD32
2585 BFD_RELOC_386_TLS_DTPOFF32
2587 BFD_RELOC_386_TLS_TPOFF32
2589 BFD_RELOC_386_TLS_GOTDESC
2591 BFD_RELOC_386_TLS_DESC_CALL
2593 BFD_RELOC_386_TLS_DESC
2595 BFD_RELOC_386_IRELATIVE
2597 BFD_RELOC_386_GOT32X
2599 i386/elf relocations
2602 BFD_RELOC_X86_64_GOT32
2604 BFD_RELOC_X86_64_PLT32
2606 BFD_RELOC_X86_64_COPY
2608 BFD_RELOC_X86_64_GLOB_DAT
2610 BFD_RELOC_X86_64_JUMP_SLOT
2612 BFD_RELOC_X86_64_RELATIVE
2614 BFD_RELOC_X86_64_GOTPCREL
2616 BFD_RELOC_X86_64_32S
2618 BFD_RELOC_X86_64_DTPMOD64
2620 BFD_RELOC_X86_64_DTPOFF64
2622 BFD_RELOC_X86_64_TPOFF64
2624 BFD_RELOC_X86_64_TLSGD
2626 BFD_RELOC_X86_64_TLSLD
2628 BFD_RELOC_X86_64_DTPOFF32
2630 BFD_RELOC_X86_64_GOTTPOFF
2632 BFD_RELOC_X86_64_TPOFF32
2634 BFD_RELOC_X86_64_GOTOFF64
2636 BFD_RELOC_X86_64_GOTPC32
2638 BFD_RELOC_X86_64_GOT64
2640 BFD_RELOC_X86_64_GOTPCREL64
2642 BFD_RELOC_X86_64_GOTPC64
2644 BFD_RELOC_X86_64_GOTPLT64
2646 BFD_RELOC_X86_64_PLTOFF64
2648 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2650 BFD_RELOC_X86_64_TLSDESC_CALL
2652 BFD_RELOC_X86_64_TLSDESC
2654 BFD_RELOC_X86_64_IRELATIVE
2656 BFD_RELOC_X86_64_PC32_BND
2658 BFD_RELOC_X86_64_PLT32_BND
2660 BFD_RELOC_X86_64_GOTPCRELX
2662 BFD_RELOC_X86_64_REX_GOTPCRELX
2664 x86-64/elf relocations
2667 BFD_RELOC_NS32K_IMM_8
2669 BFD_RELOC_NS32K_IMM_16
2671 BFD_RELOC_NS32K_IMM_32
2673 BFD_RELOC_NS32K_IMM_8_PCREL
2675 BFD_RELOC_NS32K_IMM_16_PCREL
2677 BFD_RELOC_NS32K_IMM_32_PCREL
2679 BFD_RELOC_NS32K_DISP_8
2681 BFD_RELOC_NS32K_DISP_16
2683 BFD_RELOC_NS32K_DISP_32
2685 BFD_RELOC_NS32K_DISP_8_PCREL
2687 BFD_RELOC_NS32K_DISP_16_PCREL
2689 BFD_RELOC_NS32K_DISP_32_PCREL
2694 BFD_RELOC_PDP11_DISP_8_PCREL
2696 BFD_RELOC_PDP11_DISP_6_PCREL
2701 BFD_RELOC_PJ_CODE_HI16
2703 BFD_RELOC_PJ_CODE_LO16
2705 BFD_RELOC_PJ_CODE_DIR16
2707 BFD_RELOC_PJ_CODE_DIR32
2709 BFD_RELOC_PJ_CODE_REL16
2711 BFD_RELOC_PJ_CODE_REL32
2713 Picojava relocs. Not all of these appear in object files.
2724 BFD_RELOC_PPC_B16_BRTAKEN
2726 BFD_RELOC_PPC_B16_BRNTAKEN
2730 BFD_RELOC_PPC_BA16_BRTAKEN
2732 BFD_RELOC_PPC_BA16_BRNTAKEN
2736 BFD_RELOC_PPC_GLOB_DAT
2738 BFD_RELOC_PPC_JMP_SLOT
2740 BFD_RELOC_PPC_RELATIVE
2742 BFD_RELOC_PPC_LOCAL24PC
2744 BFD_RELOC_PPC_EMB_NADDR32
2746 BFD_RELOC_PPC_EMB_NADDR16
2748 BFD_RELOC_PPC_EMB_NADDR16_LO
2750 BFD_RELOC_PPC_EMB_NADDR16_HI
2752 BFD_RELOC_PPC_EMB_NADDR16_HA
2754 BFD_RELOC_PPC_EMB_SDAI16
2756 BFD_RELOC_PPC_EMB_SDA2I16
2758 BFD_RELOC_PPC_EMB_SDA2REL
2760 BFD_RELOC_PPC_EMB_SDA21
2762 BFD_RELOC_PPC_EMB_MRKREF
2764 BFD_RELOC_PPC_EMB_RELSEC16
2766 BFD_RELOC_PPC_EMB_RELST_LO
2768 BFD_RELOC_PPC_EMB_RELST_HI
2770 BFD_RELOC_PPC_EMB_RELST_HA
2772 BFD_RELOC_PPC_EMB_BIT_FLD
2774 BFD_RELOC_PPC_EMB_RELSDA
2776 BFD_RELOC_PPC_VLE_REL8
2778 BFD_RELOC_PPC_VLE_REL15
2780 BFD_RELOC_PPC_VLE_REL24
2782 BFD_RELOC_PPC_VLE_LO16A
2784 BFD_RELOC_PPC_VLE_LO16D
2786 BFD_RELOC_PPC_VLE_HI16A
2788 BFD_RELOC_PPC_VLE_HI16D
2790 BFD_RELOC_PPC_VLE_HA16A
2792 BFD_RELOC_PPC_VLE_HA16D
2794 BFD_RELOC_PPC_VLE_SDA21
2796 BFD_RELOC_PPC_VLE_SDA21_LO
2798 BFD_RELOC_PPC_VLE_SDAREL_LO16A
2800 BFD_RELOC_PPC_VLE_SDAREL_LO16D
2802 BFD_RELOC_PPC_VLE_SDAREL_HI16A
2804 BFD_RELOC_PPC_VLE_SDAREL_HI16D
2806 BFD_RELOC_PPC_VLE_SDAREL_HA16A
2808 BFD_RELOC_PPC_VLE_SDAREL_HA16D
2810 BFD_RELOC_PPC_16DX_HA
2812 BFD_RELOC_PPC_REL16DX_HA
2814 BFD_RELOC_PPC64_HIGHER
2816 BFD_RELOC_PPC64_HIGHER_S
2818 BFD_RELOC_PPC64_HIGHEST
2820 BFD_RELOC_PPC64_HIGHEST_S
2822 BFD_RELOC_PPC64_TOC16_LO
2824 BFD_RELOC_PPC64_TOC16_HI
2826 BFD_RELOC_PPC64_TOC16_HA
2830 BFD_RELOC_PPC64_PLTGOT16
2832 BFD_RELOC_PPC64_PLTGOT16_LO
2834 BFD_RELOC_PPC64_PLTGOT16_HI
2836 BFD_RELOC_PPC64_PLTGOT16_HA
2838 BFD_RELOC_PPC64_ADDR16_DS
2840 BFD_RELOC_PPC64_ADDR16_LO_DS
2842 BFD_RELOC_PPC64_GOT16_DS
2844 BFD_RELOC_PPC64_GOT16_LO_DS
2846 BFD_RELOC_PPC64_PLT16_LO_DS
2848 BFD_RELOC_PPC64_SECTOFF_DS
2850 BFD_RELOC_PPC64_SECTOFF_LO_DS
2852 BFD_RELOC_PPC64_TOC16_DS
2854 BFD_RELOC_PPC64_TOC16_LO_DS
2856 BFD_RELOC_PPC64_PLTGOT16_DS
2858 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2860 BFD_RELOC_PPC64_ADDR16_HIGH
2862 BFD_RELOC_PPC64_ADDR16_HIGHA
2864 BFD_RELOC_PPC64_REL16_HIGH
2866 BFD_RELOC_PPC64_REL16_HIGHA
2868 BFD_RELOC_PPC64_REL16_HIGHER
2870 BFD_RELOC_PPC64_REL16_HIGHERA
2872 BFD_RELOC_PPC64_REL16_HIGHEST
2874 BFD_RELOC_PPC64_REL16_HIGHESTA
2876 BFD_RELOC_PPC64_ADDR64_LOCAL
2878 BFD_RELOC_PPC64_ENTRY
2880 BFD_RELOC_PPC64_REL24_NOTOC
2882 Power(rs6000) and PowerPC relocations.
2891 BFD_RELOC_PPC_DTPMOD
2893 BFD_RELOC_PPC_TPREL16
2895 BFD_RELOC_PPC_TPREL16_LO
2897 BFD_RELOC_PPC_TPREL16_HI
2899 BFD_RELOC_PPC_TPREL16_HA
2903 BFD_RELOC_PPC_DTPREL16
2905 BFD_RELOC_PPC_DTPREL16_LO
2907 BFD_RELOC_PPC_DTPREL16_HI
2909 BFD_RELOC_PPC_DTPREL16_HA
2911 BFD_RELOC_PPC_DTPREL
2913 BFD_RELOC_PPC_GOT_TLSGD16
2915 BFD_RELOC_PPC_GOT_TLSGD16_LO
2917 BFD_RELOC_PPC_GOT_TLSGD16_HI
2919 BFD_RELOC_PPC_GOT_TLSGD16_HA
2921 BFD_RELOC_PPC_GOT_TLSLD16
2923 BFD_RELOC_PPC_GOT_TLSLD16_LO
2925 BFD_RELOC_PPC_GOT_TLSLD16_HI
2927 BFD_RELOC_PPC_GOT_TLSLD16_HA
2929 BFD_RELOC_PPC_GOT_TPREL16
2931 BFD_RELOC_PPC_GOT_TPREL16_LO
2933 BFD_RELOC_PPC_GOT_TPREL16_HI
2935 BFD_RELOC_PPC_GOT_TPREL16_HA
2937 BFD_RELOC_PPC_GOT_DTPREL16
2939 BFD_RELOC_PPC_GOT_DTPREL16_LO
2941 BFD_RELOC_PPC_GOT_DTPREL16_HI
2943 BFD_RELOC_PPC_GOT_DTPREL16_HA
2945 BFD_RELOC_PPC64_TPREL16_DS
2947 BFD_RELOC_PPC64_TPREL16_LO_DS
2949 BFD_RELOC_PPC64_TPREL16_HIGHER
2951 BFD_RELOC_PPC64_TPREL16_HIGHERA
2953 BFD_RELOC_PPC64_TPREL16_HIGHEST
2955 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2957 BFD_RELOC_PPC64_DTPREL16_DS
2959 BFD_RELOC_PPC64_DTPREL16_LO_DS
2961 BFD_RELOC_PPC64_DTPREL16_HIGHER
2963 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2965 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2967 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2969 BFD_RELOC_PPC64_TPREL16_HIGH
2971 BFD_RELOC_PPC64_TPREL16_HIGHA
2973 BFD_RELOC_PPC64_DTPREL16_HIGH
2975 BFD_RELOC_PPC64_DTPREL16_HIGHA
2977 PowerPC and PowerPC64 thread-local storage relocations.
2982 IBM 370/390 relocations
2987 The type of reloc used to build a constructor table - at the moment
2988 probably a 32 bit wide absolute relocation, but the target can choose.
2989 It generally does map to one of the other relocation types.
2992 BFD_RELOC_ARM_PCREL_BRANCH
2994 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2995 not stored in the instruction.
2997 BFD_RELOC_ARM_PCREL_BLX
2999 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
3000 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
3001 field in the instruction.
3003 BFD_RELOC_THUMB_PCREL_BLX
3005 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
3006 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
3007 field in the instruction.
3009 BFD_RELOC_ARM_PCREL_CALL
3011 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
3013 BFD_RELOC_ARM_PCREL_JUMP
3015 ARM 26-bit pc-relative branch for B or conditional BL instruction.
3018 BFD_RELOC_THUMB_PCREL_BRANCH5
3020 ARM 5-bit pc-relative branch for Branch Future instructions.
3023 BFD_RELOC_THUMB_PCREL_BFCSEL
3025 ARM 6-bit pc-relative branch for BFCSEL instruction.
3028 BFD_RELOC_ARM_THUMB_BF17
3030 ARM 17-bit pc-relative branch for Branch Future instructions.
3033 BFD_RELOC_ARM_THUMB_BF13
3035 ARM 13-bit pc-relative branch for BFCSEL instruction.
3038 BFD_RELOC_ARM_THUMB_BF19
3040 ARM 19-bit pc-relative branch for Branch Future Link instruction.
3043 BFD_RELOC_THUMB_PCREL_BRANCH7
3045 BFD_RELOC_THUMB_PCREL_BRANCH9
3047 BFD_RELOC_THUMB_PCREL_BRANCH12
3049 BFD_RELOC_THUMB_PCREL_BRANCH20
3051 BFD_RELOC_THUMB_PCREL_BRANCH23
3053 BFD_RELOC_THUMB_PCREL_BRANCH25
3055 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
3056 The lowest bit must be zero and is not stored in the instruction.
3057 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
3058 "nn" one smaller in all cases. Note further that BRANCH23
3059 corresponds to R_ARM_THM_CALL.
3062 BFD_RELOC_ARM_OFFSET_IMM
3064 12-bit immediate offset, used in ARM-format ldr and str instructions.
3067 BFD_RELOC_ARM_THUMB_OFFSET
3069 5-bit immediate offset, used in Thumb-format ldr and str instructions.
3072 BFD_RELOC_ARM_TARGET1
3074 Pc-relative or absolute relocation depending on target. Used for
3075 entries in .init_array sections.
3077 BFD_RELOC_ARM_ROSEGREL32
3079 Read-only segment base relative address.
3081 BFD_RELOC_ARM_SBREL32
3083 Data segment base relative address.
3085 BFD_RELOC_ARM_TARGET2
3087 This reloc is used for references to RTTI data from exception handling
3088 tables. The actual definition depends on the target. It may be a
3089 pc-relative or some form of GOT-indirect relocation.
3091 BFD_RELOC_ARM_PREL31
3093 31-bit PC relative address.
3099 BFD_RELOC_ARM_MOVW_PCREL
3101 BFD_RELOC_ARM_MOVT_PCREL
3103 BFD_RELOC_ARM_THUMB_MOVW
3105 BFD_RELOC_ARM_THUMB_MOVT
3107 BFD_RELOC_ARM_THUMB_MOVW_PCREL
3109 BFD_RELOC_ARM_THUMB_MOVT_PCREL
3111 Low and High halfword relocations for MOVW and MOVT instructions.
3114 BFD_RELOC_ARM_GOTFUNCDESC
3116 BFD_RELOC_ARM_GOTOFFFUNCDESC
3118 BFD_RELOC_ARM_FUNCDESC
3120 BFD_RELOC_ARM_FUNCDESC_VALUE
3122 BFD_RELOC_ARM_TLS_GD32_FDPIC
3124 BFD_RELOC_ARM_TLS_LDM32_FDPIC
3126 BFD_RELOC_ARM_TLS_IE32_FDPIC
3128 ARM FDPIC specific relocations.
3131 BFD_RELOC_ARM_JUMP_SLOT
3133 BFD_RELOC_ARM_GLOB_DAT
3139 BFD_RELOC_ARM_RELATIVE
3141 BFD_RELOC_ARM_GOTOFF
3145 BFD_RELOC_ARM_GOT_PREL
3147 Relocations for setting up GOTs and PLTs for shared libraries.
3150 BFD_RELOC_ARM_TLS_GD32
3152 BFD_RELOC_ARM_TLS_LDO32
3154 BFD_RELOC_ARM_TLS_LDM32
3156 BFD_RELOC_ARM_TLS_DTPOFF32
3158 BFD_RELOC_ARM_TLS_DTPMOD32
3160 BFD_RELOC_ARM_TLS_TPOFF32
3162 BFD_RELOC_ARM_TLS_IE32
3164 BFD_RELOC_ARM_TLS_LE32
3166 BFD_RELOC_ARM_TLS_GOTDESC
3168 BFD_RELOC_ARM_TLS_CALL
3170 BFD_RELOC_ARM_THM_TLS_CALL
3172 BFD_RELOC_ARM_TLS_DESCSEQ
3174 BFD_RELOC_ARM_THM_TLS_DESCSEQ
3176 BFD_RELOC_ARM_TLS_DESC
3178 ARM thread-local storage relocations.
3181 BFD_RELOC_ARM_ALU_PC_G0_NC
3183 BFD_RELOC_ARM_ALU_PC_G0
3185 BFD_RELOC_ARM_ALU_PC_G1_NC
3187 BFD_RELOC_ARM_ALU_PC_G1
3189 BFD_RELOC_ARM_ALU_PC_G2
3191 BFD_RELOC_ARM_LDR_PC_G0
3193 BFD_RELOC_ARM_LDR_PC_G1
3195 BFD_RELOC_ARM_LDR_PC_G2
3197 BFD_RELOC_ARM_LDRS_PC_G0
3199 BFD_RELOC_ARM_LDRS_PC_G1
3201 BFD_RELOC_ARM_LDRS_PC_G2
3203 BFD_RELOC_ARM_LDC_PC_G0
3205 BFD_RELOC_ARM_LDC_PC_G1
3207 BFD_RELOC_ARM_LDC_PC_G2
3209 BFD_RELOC_ARM_ALU_SB_G0_NC
3211 BFD_RELOC_ARM_ALU_SB_G0
3213 BFD_RELOC_ARM_ALU_SB_G1_NC
3215 BFD_RELOC_ARM_ALU_SB_G1
3217 BFD_RELOC_ARM_ALU_SB_G2
3219 BFD_RELOC_ARM_LDR_SB_G0
3221 BFD_RELOC_ARM_LDR_SB_G1
3223 BFD_RELOC_ARM_LDR_SB_G2
3225 BFD_RELOC_ARM_LDRS_SB_G0
3227 BFD_RELOC_ARM_LDRS_SB_G1
3229 BFD_RELOC_ARM_LDRS_SB_G2
3231 BFD_RELOC_ARM_LDC_SB_G0
3233 BFD_RELOC_ARM_LDC_SB_G1
3235 BFD_RELOC_ARM_LDC_SB_G2
3237 ARM group relocations.
3242 Annotation of BX instructions.
3245 BFD_RELOC_ARM_IRELATIVE
3247 ARM support for STT_GNU_IFUNC.
3250 BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
3252 BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
3254 BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
3256 BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
3258 Thumb1 relocations to support execute-only code.
3261 BFD_RELOC_ARM_IMMEDIATE
3263 BFD_RELOC_ARM_ADRL_IMMEDIATE
3265 BFD_RELOC_ARM_T32_IMMEDIATE
3267 BFD_RELOC_ARM_T32_ADD_IMM
3269 BFD_RELOC_ARM_T32_IMM12
3271 BFD_RELOC_ARM_T32_ADD_PC12
3273 BFD_RELOC_ARM_SHIFT_IMM
3283 BFD_RELOC_ARM_CP_OFF_IMM
3285 BFD_RELOC_ARM_CP_OFF_IMM_S2
3287 BFD_RELOC_ARM_T32_CP_OFF_IMM
3289 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
3291 BFD_RELOC_ARM_ADR_IMM
3293 BFD_RELOC_ARM_LDR_IMM
3295 BFD_RELOC_ARM_LITERAL
3297 BFD_RELOC_ARM_IN_POOL
3299 BFD_RELOC_ARM_OFFSET_IMM8
3301 BFD_RELOC_ARM_T32_OFFSET_U8
3303 BFD_RELOC_ARM_T32_OFFSET_IMM
3305 BFD_RELOC_ARM_HWLITERAL
3307 BFD_RELOC_ARM_THUMB_ADD
3309 BFD_RELOC_ARM_THUMB_IMM
3311 BFD_RELOC_ARM_THUMB_SHIFT
3313 These relocs are only used within the ARM assembler. They are not
3314 (at present) written to any object files.
3317 BFD_RELOC_SH_PCDISP8BY2
3319 BFD_RELOC_SH_PCDISP12BY2
3327 BFD_RELOC_SH_DISP12BY2
3329 BFD_RELOC_SH_DISP12BY4
3331 BFD_RELOC_SH_DISP12BY8
3335 BFD_RELOC_SH_DISP20BY8
3339 BFD_RELOC_SH_IMM4BY2
3341 BFD_RELOC_SH_IMM4BY4
3345 BFD_RELOC_SH_IMM8BY2
3347 BFD_RELOC_SH_IMM8BY4
3349 BFD_RELOC_SH_PCRELIMM8BY2
3351 BFD_RELOC_SH_PCRELIMM8BY4
3353 BFD_RELOC_SH_SWITCH16
3355 BFD_RELOC_SH_SWITCH32
3369 BFD_RELOC_SH_LOOP_START
3371 BFD_RELOC_SH_LOOP_END
3375 BFD_RELOC_SH_GLOB_DAT
3377 BFD_RELOC_SH_JMP_SLOT
3379 BFD_RELOC_SH_RELATIVE
3383 BFD_RELOC_SH_GOT_LOW16
3385 BFD_RELOC_SH_GOT_MEDLOW16
3387 BFD_RELOC_SH_GOT_MEDHI16
3389 BFD_RELOC_SH_GOT_HI16
3391 BFD_RELOC_SH_GOTPLT_LOW16
3393 BFD_RELOC_SH_GOTPLT_MEDLOW16
3395 BFD_RELOC_SH_GOTPLT_MEDHI16
3397 BFD_RELOC_SH_GOTPLT_HI16
3399 BFD_RELOC_SH_PLT_LOW16
3401 BFD_RELOC_SH_PLT_MEDLOW16
3403 BFD_RELOC_SH_PLT_MEDHI16
3405 BFD_RELOC_SH_PLT_HI16
3407 BFD_RELOC_SH_GOTOFF_LOW16
3409 BFD_RELOC_SH_GOTOFF_MEDLOW16
3411 BFD_RELOC_SH_GOTOFF_MEDHI16
3413 BFD_RELOC_SH_GOTOFF_HI16
3415 BFD_RELOC_SH_GOTPC_LOW16
3417 BFD_RELOC_SH_GOTPC_MEDLOW16
3419 BFD_RELOC_SH_GOTPC_MEDHI16
3421 BFD_RELOC_SH_GOTPC_HI16
3425 BFD_RELOC_SH_GLOB_DAT64
3427 BFD_RELOC_SH_JMP_SLOT64
3429 BFD_RELOC_SH_RELATIVE64
3431 BFD_RELOC_SH_GOT10BY4
3433 BFD_RELOC_SH_GOT10BY8
3435 BFD_RELOC_SH_GOTPLT10BY4
3437 BFD_RELOC_SH_GOTPLT10BY8
3439 BFD_RELOC_SH_GOTPLT32
3441 BFD_RELOC_SH_SHMEDIA_CODE
3447 BFD_RELOC_SH_IMMS6BY32
3453 BFD_RELOC_SH_IMMS10BY2
3455 BFD_RELOC_SH_IMMS10BY4
3457 BFD_RELOC_SH_IMMS10BY8
3463 BFD_RELOC_SH_IMM_LOW16
3465 BFD_RELOC_SH_IMM_LOW16_PCREL
3467 BFD_RELOC_SH_IMM_MEDLOW16
3469 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3471 BFD_RELOC_SH_IMM_MEDHI16
3473 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3475 BFD_RELOC_SH_IMM_HI16
3477 BFD_RELOC_SH_IMM_HI16_PCREL
3481 BFD_RELOC_SH_TLS_GD_32
3483 BFD_RELOC_SH_TLS_LD_32
3485 BFD_RELOC_SH_TLS_LDO_32
3487 BFD_RELOC_SH_TLS_IE_32
3489 BFD_RELOC_SH_TLS_LE_32
3491 BFD_RELOC_SH_TLS_DTPMOD32
3493 BFD_RELOC_SH_TLS_DTPOFF32
3495 BFD_RELOC_SH_TLS_TPOFF32
3499 BFD_RELOC_SH_GOTOFF20
3501 BFD_RELOC_SH_GOTFUNCDESC
3503 BFD_RELOC_SH_GOTFUNCDESC20
3505 BFD_RELOC_SH_GOTOFFFUNCDESC
3507 BFD_RELOC_SH_GOTOFFFUNCDESC20
3509 BFD_RELOC_SH_FUNCDESC
3511 Renesas / SuperH SH relocs. Not all of these appear in object files.
3534 BFD_RELOC_ARC_SECTOFF
3536 BFD_RELOC_ARC_S21H_PCREL
3538 BFD_RELOC_ARC_S21W_PCREL
3540 BFD_RELOC_ARC_S25H_PCREL
3542 BFD_RELOC_ARC_S25W_PCREL
3546 BFD_RELOC_ARC_SDA_LDST
3548 BFD_RELOC_ARC_SDA_LDST1
3550 BFD_RELOC_ARC_SDA_LDST2
3552 BFD_RELOC_ARC_SDA16_LD
3554 BFD_RELOC_ARC_SDA16_LD1
3556 BFD_RELOC_ARC_SDA16_LD2
3558 BFD_RELOC_ARC_S13_PCREL
3564 BFD_RELOC_ARC_32_ME_S
3566 BFD_RELOC_ARC_N32_ME
3568 BFD_RELOC_ARC_SECTOFF_ME
3570 BFD_RELOC_ARC_SDA32_ME
3574 BFD_RELOC_AC_SECTOFF_U8
3576 BFD_RELOC_AC_SECTOFF_U8_1
3578 BFD_RELOC_AC_SECTOFF_U8_2
3580 BFD_RELOC_AC_SECTOFF_S9
3582 BFD_RELOC_AC_SECTOFF_S9_1
3584 BFD_RELOC_AC_SECTOFF_S9_2
3586 BFD_RELOC_ARC_SECTOFF_ME_1
3588 BFD_RELOC_ARC_SECTOFF_ME_2
3590 BFD_RELOC_ARC_SECTOFF_1
3592 BFD_RELOC_ARC_SECTOFF_2
3594 BFD_RELOC_ARC_SDA_12
3596 BFD_RELOC_ARC_SDA16_ST2
3598 BFD_RELOC_ARC_32_PCREL
3604 BFD_RELOC_ARC_GOTPC32
3610 BFD_RELOC_ARC_GLOB_DAT
3612 BFD_RELOC_ARC_JMP_SLOT
3614 BFD_RELOC_ARC_RELATIVE
3616 BFD_RELOC_ARC_GOTOFF
3620 BFD_RELOC_ARC_S21W_PCREL_PLT
3622 BFD_RELOC_ARC_S25H_PCREL_PLT
3624 BFD_RELOC_ARC_TLS_DTPMOD
3626 BFD_RELOC_ARC_TLS_TPOFF
3628 BFD_RELOC_ARC_TLS_GD_GOT
3630 BFD_RELOC_ARC_TLS_GD_LD
3632 BFD_RELOC_ARC_TLS_GD_CALL
3634 BFD_RELOC_ARC_TLS_IE_GOT
3636 BFD_RELOC_ARC_TLS_DTPOFF
3638 BFD_RELOC_ARC_TLS_DTPOFF_S9
3640 BFD_RELOC_ARC_TLS_LE_S9
3642 BFD_RELOC_ARC_TLS_LE_32
3644 BFD_RELOC_ARC_S25W_PCREL_PLT
3646 BFD_RELOC_ARC_S21H_PCREL_PLT
3648 BFD_RELOC_ARC_NPS_CMEM16
3650 BFD_RELOC_ARC_JLI_SECTOFF
3655 BFD_RELOC_BFIN_16_IMM
3657 ADI Blackfin 16 bit immediate absolute reloc.
3659 BFD_RELOC_BFIN_16_HIGH
3661 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3663 BFD_RELOC_BFIN_4_PCREL
3665 ADI Blackfin 'a' part of LSETUP.
3667 BFD_RELOC_BFIN_5_PCREL
3671 BFD_RELOC_BFIN_16_LOW
3673 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3675 BFD_RELOC_BFIN_10_PCREL
3679 BFD_RELOC_BFIN_11_PCREL
3681 ADI Blackfin 'b' part of LSETUP.
3683 BFD_RELOC_BFIN_12_PCREL_JUMP
3687 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3689 ADI Blackfin Short jump, pcrel.
3691 BFD_RELOC_BFIN_24_PCREL_CALL_X
3693 ADI Blackfin Call.x not implemented.
3695 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3697 ADI Blackfin Long Jump pcrel.
3699 BFD_RELOC_BFIN_GOT17M4
3701 BFD_RELOC_BFIN_GOTHI
3703 BFD_RELOC_BFIN_GOTLO
3705 BFD_RELOC_BFIN_FUNCDESC
3707 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3709 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3711 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3713 BFD_RELOC_BFIN_FUNCDESC_VALUE
3715 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3717 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3719 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3721 BFD_RELOC_BFIN_GOTOFF17M4
3723 BFD_RELOC_BFIN_GOTOFFHI
3725 BFD_RELOC_BFIN_GOTOFFLO
3727 ADI Blackfin FD-PIC relocations.
3731 ADI Blackfin GOT relocation.
3733 BFD_RELOC_BFIN_PLTPC
3735 ADI Blackfin PLTPC relocation.
3737 BFD_ARELOC_BFIN_PUSH
3739 ADI Blackfin arithmetic relocation.
3741 BFD_ARELOC_BFIN_CONST
3743 ADI Blackfin arithmetic relocation.
3747 ADI Blackfin arithmetic relocation.
3751 ADI Blackfin arithmetic relocation.
3753 BFD_ARELOC_BFIN_MULT
3755 ADI Blackfin arithmetic relocation.
3759 ADI Blackfin arithmetic relocation.
3763 ADI Blackfin arithmetic relocation.
3765 BFD_ARELOC_BFIN_LSHIFT
3767 ADI Blackfin arithmetic relocation.
3769 BFD_ARELOC_BFIN_RSHIFT
3771 ADI Blackfin arithmetic relocation.
3775 ADI Blackfin arithmetic relocation.
3779 ADI Blackfin arithmetic relocation.
3783 ADI Blackfin arithmetic relocation.
3785 BFD_ARELOC_BFIN_LAND
3787 ADI Blackfin arithmetic relocation.
3791 ADI Blackfin arithmetic relocation.
3795 ADI Blackfin arithmetic relocation.
3799 ADI Blackfin arithmetic relocation.
3801 BFD_ARELOC_BFIN_COMP
3803 ADI Blackfin arithmetic relocation.
3805 BFD_ARELOC_BFIN_PAGE
3807 ADI Blackfin arithmetic relocation.
3809 BFD_ARELOC_BFIN_HWPAGE
3811 ADI Blackfin arithmetic relocation.
3813 BFD_ARELOC_BFIN_ADDR
3815 ADI Blackfin arithmetic relocation.
3818 BFD_RELOC_D10V_10_PCREL_R
3820 Mitsubishi D10V relocs.
3821 This is a 10-bit reloc with the right 2 bits
3824 BFD_RELOC_D10V_10_PCREL_L
3826 Mitsubishi D10V relocs.
3827 This is a 10-bit reloc with the right 2 bits
3828 assumed to be 0. This is the same as the previous reloc
3829 except it is in the left container, i.e.,
3830 shifted left 15 bits.
3834 This is an 18-bit reloc with the right 2 bits
3837 BFD_RELOC_D10V_18_PCREL
3839 This is an 18-bit reloc with the right 2 bits
3845 Mitsubishi D30V relocs.
3846 This is a 6-bit absolute reloc.
3848 BFD_RELOC_D30V_9_PCREL
3850 This is a 6-bit pc-relative reloc with
3851 the right 3 bits assumed to be 0.
3853 BFD_RELOC_D30V_9_PCREL_R
3855 This is a 6-bit pc-relative reloc with
3856 the right 3 bits assumed to be 0. Same
3857 as the previous reloc but on the right side
3862 This is a 12-bit absolute reloc with the
3863 right 3 bitsassumed to be 0.
3865 BFD_RELOC_D30V_15_PCREL
3867 This is a 12-bit pc-relative reloc with
3868 the right 3 bits assumed to be 0.
3870 BFD_RELOC_D30V_15_PCREL_R
3872 This is a 12-bit pc-relative reloc with
3873 the right 3 bits assumed to be 0. Same
3874 as the previous reloc but on the right side
3879 This is an 18-bit absolute reloc with
3880 the right 3 bits assumed to be 0.
3882 BFD_RELOC_D30V_21_PCREL
3884 This is an 18-bit pc-relative reloc with
3885 the right 3 bits assumed to be 0.
3887 BFD_RELOC_D30V_21_PCREL_R
3889 This is an 18-bit pc-relative reloc with
3890 the right 3 bits assumed to be 0. Same
3891 as the previous reloc but on the right side
3896 This is a 32-bit absolute reloc.
3898 BFD_RELOC_D30V_32_PCREL
3900 This is a 32-bit pc-relative reloc.
3903 BFD_RELOC_DLX_HI16_S
3918 BFD_RELOC_M32C_RL_JUMP
3920 BFD_RELOC_M32C_RL_1ADDR
3922 BFD_RELOC_M32C_RL_2ADDR
3924 Renesas M16C/M32C Relocations.
3929 Renesas M32R (formerly Mitsubishi M32R) relocs.
3930 This is a 24 bit absolute address.
3932 BFD_RELOC_M32R_10_PCREL
3934 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3936 BFD_RELOC_M32R_18_PCREL
3938 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3940 BFD_RELOC_M32R_26_PCREL
3942 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3944 BFD_RELOC_M32R_HI16_ULO
3946 This is a 16-bit reloc containing the high 16 bits of an address
3947 used when the lower 16 bits are treated as unsigned.
3949 BFD_RELOC_M32R_HI16_SLO
3951 This is a 16-bit reloc containing the high 16 bits of an address
3952 used when the lower 16 bits are treated as signed.
3956 This is a 16-bit reloc containing the lower 16 bits of an address.
3958 BFD_RELOC_M32R_SDA16
3960 This is a 16-bit reloc containing the small data area offset for use in
3961 add3, load, and store instructions.
3963 BFD_RELOC_M32R_GOT24
3965 BFD_RELOC_M32R_26_PLTREL
3969 BFD_RELOC_M32R_GLOB_DAT
3971 BFD_RELOC_M32R_JMP_SLOT
3973 BFD_RELOC_M32R_RELATIVE
3975 BFD_RELOC_M32R_GOTOFF
3977 BFD_RELOC_M32R_GOTOFF_HI_ULO
3979 BFD_RELOC_M32R_GOTOFF_HI_SLO
3981 BFD_RELOC_M32R_GOTOFF_LO
3983 BFD_RELOC_M32R_GOTPC24
3985 BFD_RELOC_M32R_GOT16_HI_ULO
3987 BFD_RELOC_M32R_GOT16_HI_SLO
3989 BFD_RELOC_M32R_GOT16_LO
3991 BFD_RELOC_M32R_GOTPC_HI_ULO
3993 BFD_RELOC_M32R_GOTPC_HI_SLO
3995 BFD_RELOC_M32R_GOTPC_LO
4004 This is a 20 bit absolute address.
4006 BFD_RELOC_NDS32_9_PCREL
4008 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
4010 BFD_RELOC_NDS32_WORD_9_PCREL
4012 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
4014 BFD_RELOC_NDS32_15_PCREL
4016 This is an 15-bit reloc with the right 1 bit assumed to be 0.
4018 BFD_RELOC_NDS32_17_PCREL
4020 This is an 17-bit reloc with the right 1 bit assumed to be 0.
4022 BFD_RELOC_NDS32_25_PCREL
4024 This is a 25-bit reloc with the right 1 bit assumed to be 0.
4026 BFD_RELOC_NDS32_HI20
4028 This is a 20-bit reloc containing the high 20 bits of an address
4029 used with the lower 12 bits
4031 BFD_RELOC_NDS32_LO12S3
4033 This is a 12-bit reloc containing the lower 12 bits of an address
4034 then shift right by 3. This is used with ldi,sdi...
4036 BFD_RELOC_NDS32_LO12S2
4038 This is a 12-bit reloc containing the lower 12 bits of an address
4039 then shift left by 2. This is used with lwi,swi...
4041 BFD_RELOC_NDS32_LO12S1
4043 This is a 12-bit reloc containing the lower 12 bits of an address
4044 then shift left by 1. This is used with lhi,shi...
4046 BFD_RELOC_NDS32_LO12S0
4048 This is a 12-bit reloc containing the lower 12 bits of an address
4049 then shift left by 0. This is used with lbisbi...
4051 BFD_RELOC_NDS32_LO12S0_ORI
4053 This is a 12-bit reloc containing the lower 12 bits of an address
4054 then shift left by 0. This is only used with branch relaxations
4056 BFD_RELOC_NDS32_SDA15S3
4058 This is a 15-bit reloc containing the small data area 18-bit signed offset
4059 and shift left by 3 for use in ldi, sdi...
4061 BFD_RELOC_NDS32_SDA15S2
4063 This is a 15-bit reloc containing the small data area 17-bit signed offset
4064 and shift left by 2 for use in lwi, swi...
4066 BFD_RELOC_NDS32_SDA15S1
4068 This is a 15-bit reloc containing the small data area 16-bit signed offset
4069 and shift left by 1 for use in lhi, shi...
4071 BFD_RELOC_NDS32_SDA15S0
4073 This is a 15-bit reloc containing the small data area 15-bit signed offset
4074 and shift left by 0 for use in lbi, sbi...
4076 BFD_RELOC_NDS32_SDA16S3
4078 This is a 16-bit reloc containing the small data area 16-bit signed offset
4081 BFD_RELOC_NDS32_SDA17S2
4083 This is a 17-bit reloc containing the small data area 17-bit signed offset
4084 and shift left by 2 for use in lwi.gp, swi.gp...
4086 BFD_RELOC_NDS32_SDA18S1
4088 This is a 18-bit reloc containing the small data area 18-bit signed offset
4089 and shift left by 1 for use in lhi.gp, shi.gp...
4091 BFD_RELOC_NDS32_SDA19S0
4093 This is a 19-bit reloc containing the small data area 19-bit signed offset
4094 and shift left by 0 for use in lbi.gp, sbi.gp...
4096 BFD_RELOC_NDS32_GOT20
4098 BFD_RELOC_NDS32_9_PLTREL
4100 BFD_RELOC_NDS32_25_PLTREL
4102 BFD_RELOC_NDS32_COPY
4104 BFD_RELOC_NDS32_GLOB_DAT
4106 BFD_RELOC_NDS32_JMP_SLOT
4108 BFD_RELOC_NDS32_RELATIVE
4110 BFD_RELOC_NDS32_GOTOFF
4112 BFD_RELOC_NDS32_GOTOFF_HI20
4114 BFD_RELOC_NDS32_GOTOFF_LO12
4116 BFD_RELOC_NDS32_GOTPC20
4118 BFD_RELOC_NDS32_GOT_HI20
4120 BFD_RELOC_NDS32_GOT_LO12
4122 BFD_RELOC_NDS32_GOTPC_HI20
4124 BFD_RELOC_NDS32_GOTPC_LO12
4128 BFD_RELOC_NDS32_INSN16
4130 BFD_RELOC_NDS32_LABEL
4132 BFD_RELOC_NDS32_LONGCALL1
4134 BFD_RELOC_NDS32_LONGCALL2
4136 BFD_RELOC_NDS32_LONGCALL3
4138 BFD_RELOC_NDS32_LONGJUMP1
4140 BFD_RELOC_NDS32_LONGJUMP2
4142 BFD_RELOC_NDS32_LONGJUMP3
4144 BFD_RELOC_NDS32_LOADSTORE
4146 BFD_RELOC_NDS32_9_FIXED
4148 BFD_RELOC_NDS32_15_FIXED
4150 BFD_RELOC_NDS32_17_FIXED
4152 BFD_RELOC_NDS32_25_FIXED
4154 BFD_RELOC_NDS32_LONGCALL4
4156 BFD_RELOC_NDS32_LONGCALL5
4158 BFD_RELOC_NDS32_LONGCALL6
4160 BFD_RELOC_NDS32_LONGJUMP4
4162 BFD_RELOC_NDS32_LONGJUMP5
4164 BFD_RELOC_NDS32_LONGJUMP6
4166 BFD_RELOC_NDS32_LONGJUMP7
4170 BFD_RELOC_NDS32_PLTREL_HI20
4172 BFD_RELOC_NDS32_PLTREL_LO12
4174 BFD_RELOC_NDS32_PLT_GOTREL_HI20
4176 BFD_RELOC_NDS32_PLT_GOTREL_LO12
4180 BFD_RELOC_NDS32_SDA12S2_DP
4182 BFD_RELOC_NDS32_SDA12S2_SP
4184 BFD_RELOC_NDS32_LO12S2_DP
4186 BFD_RELOC_NDS32_LO12S2_SP
4190 BFD_RELOC_NDS32_DWARF2_OP1
4192 BFD_RELOC_NDS32_DWARF2_OP2
4194 BFD_RELOC_NDS32_DWARF2_LEB
4196 for dwarf2 debug_line.
4198 BFD_RELOC_NDS32_UPDATE_TA
4200 for eliminate 16-bit instructions
4202 BFD_RELOC_NDS32_PLT_GOTREL_LO20
4204 BFD_RELOC_NDS32_PLT_GOTREL_LO15
4206 BFD_RELOC_NDS32_PLT_GOTREL_LO19
4208 BFD_RELOC_NDS32_GOT_LO15
4210 BFD_RELOC_NDS32_GOT_LO19
4212 BFD_RELOC_NDS32_GOTOFF_LO15
4214 BFD_RELOC_NDS32_GOTOFF_LO19
4216 BFD_RELOC_NDS32_GOT15S2
4218 BFD_RELOC_NDS32_GOT17S2
4220 for PIC object relaxation
4225 This is a 5 bit absolute address.
4227 BFD_RELOC_NDS32_10_UPCREL
4229 This is a 10-bit unsigned pc-relative reloc with the right 1 bit assumed to be 0.
4231 BFD_RELOC_NDS32_SDA_FP7U2_RELA
4233 If fp were omitted, fp can used as another gp.
4235 BFD_RELOC_NDS32_RELAX_ENTRY
4237 BFD_RELOC_NDS32_GOT_SUFF
4239 BFD_RELOC_NDS32_GOTOFF_SUFF
4241 BFD_RELOC_NDS32_PLT_GOT_SUFF
4243 BFD_RELOC_NDS32_MULCALL_SUFF
4247 BFD_RELOC_NDS32_PTR_COUNT
4249 BFD_RELOC_NDS32_PTR_RESOLVED
4251 BFD_RELOC_NDS32_PLTBLOCK
4253 BFD_RELOC_NDS32_RELAX_REGION_BEGIN
4255 BFD_RELOC_NDS32_RELAX_REGION_END
4257 BFD_RELOC_NDS32_MINUEND
4259 BFD_RELOC_NDS32_SUBTRAHEND
4261 BFD_RELOC_NDS32_DIFF8
4263 BFD_RELOC_NDS32_DIFF16
4265 BFD_RELOC_NDS32_DIFF32
4267 BFD_RELOC_NDS32_DIFF_ULEB128
4269 BFD_RELOC_NDS32_EMPTY
4271 relaxation relative relocation types
4273 BFD_RELOC_NDS32_25_ABS
4275 This is a 25 bit absolute address.
4277 BFD_RELOC_NDS32_DATA
4279 BFD_RELOC_NDS32_TRAN
4281 BFD_RELOC_NDS32_17IFC_PCREL
4283 BFD_RELOC_NDS32_10IFCU_PCREL
4285 For ex9 and ifc using.
4287 BFD_RELOC_NDS32_TPOFF
4289 BFD_RELOC_NDS32_GOTTPOFF
4291 BFD_RELOC_NDS32_TLS_LE_HI20
4293 BFD_RELOC_NDS32_TLS_LE_LO12
4295 BFD_RELOC_NDS32_TLS_LE_20
4297 BFD_RELOC_NDS32_TLS_LE_15S0
4299 BFD_RELOC_NDS32_TLS_LE_15S1
4301 BFD_RELOC_NDS32_TLS_LE_15S2
4303 BFD_RELOC_NDS32_TLS_LE_ADD
4305 BFD_RELOC_NDS32_TLS_LE_LS
4307 BFD_RELOC_NDS32_TLS_IE_HI20
4309 BFD_RELOC_NDS32_TLS_IE_LO12
4311 BFD_RELOC_NDS32_TLS_IE_LO12S2
4313 BFD_RELOC_NDS32_TLS_IEGP_HI20
4315 BFD_RELOC_NDS32_TLS_IEGP_LO12
4317 BFD_RELOC_NDS32_TLS_IEGP_LO12S2
4319 BFD_RELOC_NDS32_TLS_IEGP_LW
4321 BFD_RELOC_NDS32_TLS_DESC
4323 BFD_RELOC_NDS32_TLS_DESC_HI20
4325 BFD_RELOC_NDS32_TLS_DESC_LO12
4327 BFD_RELOC_NDS32_TLS_DESC_20
4329 BFD_RELOC_NDS32_TLS_DESC_SDA17S2
4331 BFD_RELOC_NDS32_TLS_DESC_ADD
4333 BFD_RELOC_NDS32_TLS_DESC_FUNC
4335 BFD_RELOC_NDS32_TLS_DESC_CALL
4337 BFD_RELOC_NDS32_TLS_DESC_MEM
4339 BFD_RELOC_NDS32_REMOVE
4341 BFD_RELOC_NDS32_GROUP
4347 For floating load store relaxation.
4351 BFD_RELOC_V850_9_PCREL
4353 This is a 9-bit reloc
4355 BFD_RELOC_V850_22_PCREL
4357 This is a 22-bit reloc
4360 BFD_RELOC_V850_SDA_16_16_OFFSET
4362 This is a 16 bit offset from the short data area pointer.
4364 BFD_RELOC_V850_SDA_15_16_OFFSET
4366 This is a 16 bit offset (of which only 15 bits are used) from the
4367 short data area pointer.
4369 BFD_RELOC_V850_ZDA_16_16_OFFSET
4371 This is a 16 bit offset from the zero data area pointer.
4373 BFD_RELOC_V850_ZDA_15_16_OFFSET
4375 This is a 16 bit offset (of which only 15 bits are used) from the
4376 zero data area pointer.
4378 BFD_RELOC_V850_TDA_6_8_OFFSET
4380 This is an 8 bit offset (of which only 6 bits are used) from the
4381 tiny data area pointer.
4383 BFD_RELOC_V850_TDA_7_8_OFFSET
4385 This is an 8bit offset (of which only 7 bits are used) from the tiny
4388 BFD_RELOC_V850_TDA_7_7_OFFSET
4390 This is a 7 bit offset from the tiny data area pointer.
4392 BFD_RELOC_V850_TDA_16_16_OFFSET
4394 This is a 16 bit offset from the tiny data area pointer.
4397 BFD_RELOC_V850_TDA_4_5_OFFSET
4399 This is a 5 bit offset (of which only 4 bits are used) from the tiny
4402 BFD_RELOC_V850_TDA_4_4_OFFSET
4404 This is a 4 bit offset from the tiny data area pointer.
4406 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
4408 This is a 16 bit offset from the short data area pointer, with the
4409 bits placed non-contiguously in the instruction.
4411 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
4413 This is a 16 bit offset from the zero data area pointer, with the
4414 bits placed non-contiguously in the instruction.
4416 BFD_RELOC_V850_CALLT_6_7_OFFSET
4418 This is a 6 bit offset from the call table base pointer.
4420 BFD_RELOC_V850_CALLT_16_16_OFFSET
4422 This is a 16 bit offset from the call table base pointer.
4424 BFD_RELOC_V850_LONGCALL
4426 Used for relaxing indirect function calls.
4428 BFD_RELOC_V850_LONGJUMP
4430 Used for relaxing indirect jumps.
4432 BFD_RELOC_V850_ALIGN
4434 Used to maintain alignment whilst relaxing.
4436 BFD_RELOC_V850_LO16_SPLIT_OFFSET
4438 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
4441 BFD_RELOC_V850_16_PCREL
4443 This is a 16-bit reloc.
4445 BFD_RELOC_V850_17_PCREL
4447 This is a 17-bit reloc.
4451 This is a 23-bit reloc.
4453 BFD_RELOC_V850_32_PCREL
4455 This is a 32-bit reloc.
4457 BFD_RELOC_V850_32_ABS
4459 This is a 32-bit reloc.
4461 BFD_RELOC_V850_16_SPLIT_OFFSET
4463 This is a 16-bit reloc.
4465 BFD_RELOC_V850_16_S1
4467 This is a 16-bit reloc.
4469 BFD_RELOC_V850_LO16_S1
4471 Low 16 bits. 16 bit shifted by 1.
4473 BFD_RELOC_V850_CALLT_15_16_OFFSET
4475 This is a 16 bit offset from the call table base pointer.
4477 BFD_RELOC_V850_32_GOTPCREL
4481 BFD_RELOC_V850_16_GOT
4485 BFD_RELOC_V850_32_GOT
4489 BFD_RELOC_V850_22_PLT_PCREL
4493 BFD_RELOC_V850_32_PLT_PCREL
4501 BFD_RELOC_V850_GLOB_DAT
4505 BFD_RELOC_V850_JMP_SLOT
4509 BFD_RELOC_V850_RELATIVE
4513 BFD_RELOC_V850_16_GOTOFF
4517 BFD_RELOC_V850_32_GOTOFF
4532 This is a 8bit DP reloc for the tms320c30, where the most
4533 significant 8 bits of a 24 bit word are placed into the least
4534 significant 8 bits of the opcode.
4537 BFD_RELOC_TIC54X_PARTLS7
4539 This is a 7bit reloc for the tms320c54x, where the least
4540 significant 7 bits of a 16 bit word are placed into the least
4541 significant 7 bits of the opcode.
4544 BFD_RELOC_TIC54X_PARTMS9
4546 This is a 9bit DP reloc for the tms320c54x, where the most
4547 significant 9 bits of a 16 bit word are placed into the least
4548 significant 9 bits of the opcode.
4553 This is an extended address 23-bit reloc for the tms320c54x.
4556 BFD_RELOC_TIC54X_16_OF_23
4558 This is a 16-bit reloc for the tms320c54x, where the least
4559 significant 16 bits of a 23-bit extended address are placed into
4563 BFD_RELOC_TIC54X_MS7_OF_23
4565 This is a reloc for the tms320c54x, where the most
4566 significant 7 bits of a 23-bit extended address are placed into
4570 BFD_RELOC_C6000_PCR_S21
4572 BFD_RELOC_C6000_PCR_S12
4574 BFD_RELOC_C6000_PCR_S10
4576 BFD_RELOC_C6000_PCR_S7
4578 BFD_RELOC_C6000_ABS_S16
4580 BFD_RELOC_C6000_ABS_L16
4582 BFD_RELOC_C6000_ABS_H16
4584 BFD_RELOC_C6000_SBR_U15_B
4586 BFD_RELOC_C6000_SBR_U15_H
4588 BFD_RELOC_C6000_SBR_U15_W
4590 BFD_RELOC_C6000_SBR_S16
4592 BFD_RELOC_C6000_SBR_L16_B
4594 BFD_RELOC_C6000_SBR_L16_H
4596 BFD_RELOC_C6000_SBR_L16_W
4598 BFD_RELOC_C6000_SBR_H16_B
4600 BFD_RELOC_C6000_SBR_H16_H
4602 BFD_RELOC_C6000_SBR_H16_W
4604 BFD_RELOC_C6000_SBR_GOT_U15_W
4606 BFD_RELOC_C6000_SBR_GOT_L16_W
4608 BFD_RELOC_C6000_SBR_GOT_H16_W
4610 BFD_RELOC_C6000_DSBT_INDEX
4612 BFD_RELOC_C6000_PREL31
4614 BFD_RELOC_C6000_COPY
4616 BFD_RELOC_C6000_JUMP_SLOT
4618 BFD_RELOC_C6000_EHTYPE
4620 BFD_RELOC_C6000_PCR_H16
4622 BFD_RELOC_C6000_PCR_L16
4624 BFD_RELOC_C6000_ALIGN
4626 BFD_RELOC_C6000_FPHEAD
4628 BFD_RELOC_C6000_NOCMP
4630 TMS320C6000 relocations.
4635 This is a 48 bit reloc for the FR30 that stores 32 bits.
4639 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
4642 BFD_RELOC_FR30_6_IN_4
4644 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
4647 BFD_RELOC_FR30_8_IN_8
4649 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
4652 BFD_RELOC_FR30_9_IN_8
4654 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
4657 BFD_RELOC_FR30_10_IN_8
4659 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
4662 BFD_RELOC_FR30_9_PCREL
4664 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
4665 short offset into 8 bits.
4667 BFD_RELOC_FR30_12_PCREL
4669 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
4670 short offset into 11 bits.
4673 BFD_RELOC_MCORE_PCREL_IMM8BY4
4675 BFD_RELOC_MCORE_PCREL_IMM11BY2
4677 BFD_RELOC_MCORE_PCREL_IMM4BY2
4679 BFD_RELOC_MCORE_PCREL_32
4681 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
4685 Motorola Mcore relocations.
4694 BFD_RELOC_MEP_PCREL8A2
4696 BFD_RELOC_MEP_PCREL12A2
4698 BFD_RELOC_MEP_PCREL17A2
4700 BFD_RELOC_MEP_PCREL24A2
4702 BFD_RELOC_MEP_PCABS24A2
4714 BFD_RELOC_MEP_TPREL7
4716 BFD_RELOC_MEP_TPREL7A2
4718 BFD_RELOC_MEP_TPREL7A4
4720 BFD_RELOC_MEP_UIMM24
4722 BFD_RELOC_MEP_ADDR24A4
4724 BFD_RELOC_MEP_GNU_VTINHERIT
4726 BFD_RELOC_MEP_GNU_VTENTRY
4728 Toshiba Media Processor Relocations.
4732 BFD_RELOC_METAG_HIADDR16
4734 BFD_RELOC_METAG_LOADDR16
4736 BFD_RELOC_METAG_RELBRANCH
4738 BFD_RELOC_METAG_GETSETOFF
4740 BFD_RELOC_METAG_HIOG
4742 BFD_RELOC_METAG_LOOG
4744 BFD_RELOC_METAG_REL8
4746 BFD_RELOC_METAG_REL16
4748 BFD_RELOC_METAG_HI16_GOTOFF
4750 BFD_RELOC_METAG_LO16_GOTOFF
4752 BFD_RELOC_METAG_GETSET_GOTOFF
4754 BFD_RELOC_METAG_GETSET_GOT
4756 BFD_RELOC_METAG_HI16_GOTPC
4758 BFD_RELOC_METAG_LO16_GOTPC
4760 BFD_RELOC_METAG_HI16_PLT
4762 BFD_RELOC_METAG_LO16_PLT
4764 BFD_RELOC_METAG_RELBRANCH_PLT
4766 BFD_RELOC_METAG_GOTOFF
4770 BFD_RELOC_METAG_COPY
4772 BFD_RELOC_METAG_JMP_SLOT
4774 BFD_RELOC_METAG_RELATIVE
4776 BFD_RELOC_METAG_GLOB_DAT
4778 BFD_RELOC_METAG_TLS_GD
4780 BFD_RELOC_METAG_TLS_LDM
4782 BFD_RELOC_METAG_TLS_LDO_HI16
4784 BFD_RELOC_METAG_TLS_LDO_LO16
4786 BFD_RELOC_METAG_TLS_LDO
4788 BFD_RELOC_METAG_TLS_IE
4790 BFD_RELOC_METAG_TLS_IENONPIC
4792 BFD_RELOC_METAG_TLS_IENONPIC_HI16
4794 BFD_RELOC_METAG_TLS_IENONPIC_LO16
4796 BFD_RELOC_METAG_TLS_TPOFF
4798 BFD_RELOC_METAG_TLS_DTPMOD
4800 BFD_RELOC_METAG_TLS_DTPOFF
4802 BFD_RELOC_METAG_TLS_LE
4804 BFD_RELOC_METAG_TLS_LE_HI16
4806 BFD_RELOC_METAG_TLS_LE_LO16
4808 Imagination Technologies Meta relocations.
4813 BFD_RELOC_MMIX_GETA_1
4815 BFD_RELOC_MMIX_GETA_2
4817 BFD_RELOC_MMIX_GETA_3
4819 These are relocations for the GETA instruction.
4821 BFD_RELOC_MMIX_CBRANCH
4823 BFD_RELOC_MMIX_CBRANCH_J
4825 BFD_RELOC_MMIX_CBRANCH_1
4827 BFD_RELOC_MMIX_CBRANCH_2
4829 BFD_RELOC_MMIX_CBRANCH_3
4831 These are relocations for a conditional branch instruction.
4833 BFD_RELOC_MMIX_PUSHJ
4835 BFD_RELOC_MMIX_PUSHJ_1
4837 BFD_RELOC_MMIX_PUSHJ_2
4839 BFD_RELOC_MMIX_PUSHJ_3
4841 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
4843 These are relocations for the PUSHJ instruction.
4847 BFD_RELOC_MMIX_JMP_1
4849 BFD_RELOC_MMIX_JMP_2
4851 BFD_RELOC_MMIX_JMP_3
4853 These are relocations for the JMP instruction.
4855 BFD_RELOC_MMIX_ADDR19
4857 This is a relocation for a relative address as in a GETA instruction or
4860 BFD_RELOC_MMIX_ADDR27
4862 This is a relocation for a relative address as in a JMP instruction.
4864 BFD_RELOC_MMIX_REG_OR_BYTE
4866 This is a relocation for an instruction field that may be a general
4867 register or a value 0..255.
4871 This is a relocation for an instruction field that may be a general
4874 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
4876 This is a relocation for two instruction fields holding a register and
4877 an offset, the equivalent of the relocation.
4879 BFD_RELOC_MMIX_LOCAL
4881 This relocation is an assertion that the expression is not allocated as
4882 a global register. It does not modify contents.
4885 BFD_RELOC_AVR_7_PCREL
4887 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
4888 short offset into 7 bits.
4890 BFD_RELOC_AVR_13_PCREL
4892 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
4893 short offset into 12 bits.
4897 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
4898 program memory address) into 16 bits.
4900 BFD_RELOC_AVR_LO8_LDI
4902 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4903 data memory address) into 8 bit immediate value of LDI insn.
4905 BFD_RELOC_AVR_HI8_LDI
4907 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4908 of data memory address) into 8 bit immediate value of LDI insn.
4910 BFD_RELOC_AVR_HH8_LDI
4912 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4913 of program memory address) into 8 bit immediate value of LDI insn.
4915 BFD_RELOC_AVR_MS8_LDI
4917 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4918 of 32 bit value) into 8 bit immediate value of LDI insn.
4920 BFD_RELOC_AVR_LO8_LDI_NEG
4922 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4923 (usually data memory address) into 8 bit immediate value of SUBI insn.
4925 BFD_RELOC_AVR_HI8_LDI_NEG
4927 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4928 (high 8 bit of data memory address) into 8 bit immediate value of
4931 BFD_RELOC_AVR_HH8_LDI_NEG
4933 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4934 (most high 8 bit of program memory address) into 8 bit immediate value
4935 of LDI or SUBI insn.
4937 BFD_RELOC_AVR_MS8_LDI_NEG
4939 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
4940 of 32 bit value) into 8 bit immediate value of LDI insn.
4942 BFD_RELOC_AVR_LO8_LDI_PM
4944 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4945 command address) into 8 bit immediate value of LDI insn.
4947 BFD_RELOC_AVR_LO8_LDI_GS
4949 This is a 16 bit reloc for the AVR that stores 8 bit value
4950 (command address) into 8 bit immediate value of LDI insn. If the address
4951 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4954 BFD_RELOC_AVR_HI8_LDI_PM
4956 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4957 of command address) into 8 bit immediate value of LDI insn.
4959 BFD_RELOC_AVR_HI8_LDI_GS
4961 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4962 of command address) into 8 bit immediate value of LDI insn. If the address
4963 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4966 BFD_RELOC_AVR_HH8_LDI_PM
4968 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4969 of command address) into 8 bit immediate value of LDI insn.
4971 BFD_RELOC_AVR_LO8_LDI_PM_NEG
4973 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4974 (usually command address) into 8 bit immediate value of SUBI insn.
4976 BFD_RELOC_AVR_HI8_LDI_PM_NEG
4978 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4979 (high 8 bit of 16 bit command address) into 8 bit immediate value
4982 BFD_RELOC_AVR_HH8_LDI_PM_NEG
4984 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4985 (high 6 bit of 22 bit command address) into 8 bit immediate
4990 This is a 32 bit reloc for the AVR that stores 23 bit value
4995 This is a 16 bit reloc for the AVR that stores all needed bits
4996 for absolute addressing with ldi with overflow check to linktime
5000 This is a 6 bit reloc for the AVR that stores offset for ldd/std
5003 BFD_RELOC_AVR_6_ADIW
5005 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
5010 This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
5011 in .byte lo8(symbol)
5015 This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol
5016 in .byte hi8(symbol)
5020 This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
5021 in .byte hlo8(symbol)
5025 BFD_RELOC_AVR_DIFF16
5027 BFD_RELOC_AVR_DIFF32
5029 AVR relocations to mark the difference of two local symbols.
5030 These are only needed to support linker relaxation and can be ignored
5031 when not relaxing. The field is set to the value of the difference
5032 assuming no relaxation. The relocation encodes the position of the
5033 second symbol so the linker can determine whether to adjust the field
5036 BFD_RELOC_AVR_LDS_STS_16
5038 This is a 7 bit reloc for the AVR that stores SRAM address for 16bit
5039 lds and sts instructions supported only tiny core.
5043 This is a 6 bit reloc for the AVR that stores an I/O register
5044 number for the IN and OUT instructions
5048 This is a 5 bit reloc for the AVR that stores an I/O register
5049 number for the SBIC, SBIS, SBI and CBI instructions
5052 BFD_RELOC_RISCV_HI20
5054 BFD_RELOC_RISCV_PCREL_HI20
5056 BFD_RELOC_RISCV_PCREL_LO12_I
5058 BFD_RELOC_RISCV_PCREL_LO12_S
5060 BFD_RELOC_RISCV_LO12_I
5062 BFD_RELOC_RISCV_LO12_S
5064 BFD_RELOC_RISCV_GPREL12_I
5066 BFD_RELOC_RISCV_GPREL12_S
5068 BFD_RELOC_RISCV_TPREL_HI20
5070 BFD_RELOC_RISCV_TPREL_LO12_I
5072 BFD_RELOC_RISCV_TPREL_LO12_S
5074 BFD_RELOC_RISCV_TPREL_ADD
5076 BFD_RELOC_RISCV_CALL
5078 BFD_RELOC_RISCV_CALL_PLT
5080 BFD_RELOC_RISCV_ADD8
5082 BFD_RELOC_RISCV_ADD16
5084 BFD_RELOC_RISCV_ADD32
5086 BFD_RELOC_RISCV_ADD64
5088 BFD_RELOC_RISCV_SUB8
5090 BFD_RELOC_RISCV_SUB16
5092 BFD_RELOC_RISCV_SUB32
5094 BFD_RELOC_RISCV_SUB64
5096 BFD_RELOC_RISCV_GOT_HI20
5098 BFD_RELOC_RISCV_TLS_GOT_HI20
5100 BFD_RELOC_RISCV_TLS_GD_HI20
5104 BFD_RELOC_RISCV_TLS_DTPMOD32
5106 BFD_RELOC_RISCV_TLS_DTPREL32
5108 BFD_RELOC_RISCV_TLS_DTPMOD64
5110 BFD_RELOC_RISCV_TLS_DTPREL64
5112 BFD_RELOC_RISCV_TLS_TPREL32
5114 BFD_RELOC_RISCV_TLS_TPREL64
5116 BFD_RELOC_RISCV_ALIGN
5118 BFD_RELOC_RISCV_RVC_BRANCH
5120 BFD_RELOC_RISCV_RVC_JUMP
5122 BFD_RELOC_RISCV_RVC_LUI
5124 BFD_RELOC_RISCV_GPREL_I
5126 BFD_RELOC_RISCV_GPREL_S
5128 BFD_RELOC_RISCV_TPREL_I
5130 BFD_RELOC_RISCV_TPREL_S
5132 BFD_RELOC_RISCV_RELAX
5136 BFD_RELOC_RISCV_SUB6
5138 BFD_RELOC_RISCV_SET6
5140 BFD_RELOC_RISCV_SET8
5142 BFD_RELOC_RISCV_SET16
5144 BFD_RELOC_RISCV_SET32
5146 BFD_RELOC_RISCV_32_PCREL
5153 BFD_RELOC_RL78_NEG16
5155 BFD_RELOC_RL78_NEG24
5157 BFD_RELOC_RL78_NEG32
5159 BFD_RELOC_RL78_16_OP
5161 BFD_RELOC_RL78_24_OP
5163 BFD_RELOC_RL78_32_OP
5171 BFD_RELOC_RL78_DIR3U_PCREL
5175 BFD_RELOC_RL78_GPRELB
5177 BFD_RELOC_RL78_GPRELW
5179 BFD_RELOC_RL78_GPRELL
5183 BFD_RELOC_RL78_OP_SUBTRACT
5185 BFD_RELOC_RL78_OP_NEG
5187 BFD_RELOC_RL78_OP_AND
5189 BFD_RELOC_RL78_OP_SHRA
5193 BFD_RELOC_RL78_ABS16
5195 BFD_RELOC_RL78_ABS16_REV
5197 BFD_RELOC_RL78_ABS32
5199 BFD_RELOC_RL78_ABS32_REV
5201 BFD_RELOC_RL78_ABS16U
5203 BFD_RELOC_RL78_ABS16UW
5205 BFD_RELOC_RL78_ABS16UL
5207 BFD_RELOC_RL78_RELAX
5217 BFD_RELOC_RL78_SADDR
5219 Renesas RL78 Relocations.
5242 BFD_RELOC_RX_DIR3U_PCREL
5254 BFD_RELOC_RX_OP_SUBTRACT
5262 BFD_RELOC_RX_ABS16_REV
5266 BFD_RELOC_RX_ABS32_REV
5270 BFD_RELOC_RX_ABS16UW
5272 BFD_RELOC_RX_ABS16UL
5276 Renesas RX Relocations.
5289 32 bit PC relative PLT address.
5293 Copy symbol at runtime.
5295 BFD_RELOC_390_GLOB_DAT
5299 BFD_RELOC_390_JMP_SLOT
5303 BFD_RELOC_390_RELATIVE
5305 Adjust by program base.
5309 32 bit PC relative offset to GOT.
5315 BFD_RELOC_390_PC12DBL
5317 PC relative 12 bit shifted by 1.
5319 BFD_RELOC_390_PLT12DBL
5321 12 bit PC rel. PLT shifted by 1.
5323 BFD_RELOC_390_PC16DBL
5325 PC relative 16 bit shifted by 1.
5327 BFD_RELOC_390_PLT16DBL
5329 16 bit PC rel. PLT shifted by 1.
5331 BFD_RELOC_390_PC24DBL
5333 PC relative 24 bit shifted by 1.
5335 BFD_RELOC_390_PLT24DBL
5337 24 bit PC rel. PLT shifted by 1.
5339 BFD_RELOC_390_PC32DBL
5341 PC relative 32 bit shifted by 1.
5343 BFD_RELOC_390_PLT32DBL
5345 32 bit PC rel. PLT shifted by 1.
5347 BFD_RELOC_390_GOTPCDBL
5349 32 bit PC rel. GOT shifted by 1.
5357 64 bit PC relative PLT address.
5359 BFD_RELOC_390_GOTENT
5361 32 bit rel. offset to GOT entry.
5363 BFD_RELOC_390_GOTOFF64
5365 64 bit offset to GOT.
5367 BFD_RELOC_390_GOTPLT12
5369 12-bit offset to symbol-entry within GOT, with PLT handling.
5371 BFD_RELOC_390_GOTPLT16
5373 16-bit offset to symbol-entry within GOT, with PLT handling.
5375 BFD_RELOC_390_GOTPLT32
5377 32-bit offset to symbol-entry within GOT, with PLT handling.
5379 BFD_RELOC_390_GOTPLT64
5381 64-bit offset to symbol-entry within GOT, with PLT handling.
5383 BFD_RELOC_390_GOTPLTENT
5385 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
5387 BFD_RELOC_390_PLTOFF16
5389 16-bit rel. offset from the GOT to a PLT entry.
5391 BFD_RELOC_390_PLTOFF32
5393 32-bit rel. offset from the GOT to a PLT entry.
5395 BFD_RELOC_390_PLTOFF64
5397 64-bit rel. offset from the GOT to a PLT entry.
5400 BFD_RELOC_390_TLS_LOAD
5402 BFD_RELOC_390_TLS_GDCALL
5404 BFD_RELOC_390_TLS_LDCALL
5406 BFD_RELOC_390_TLS_GD32
5408 BFD_RELOC_390_TLS_GD64
5410 BFD_RELOC_390_TLS_GOTIE12
5412 BFD_RELOC_390_TLS_GOTIE32
5414 BFD_RELOC_390_TLS_GOTIE64
5416 BFD_RELOC_390_TLS_LDM32
5418 BFD_RELOC_390_TLS_LDM64
5420 BFD_RELOC_390_TLS_IE32
5422 BFD_RELOC_390_TLS_IE64
5424 BFD_RELOC_390_TLS_IEENT
5426 BFD_RELOC_390_TLS_LE32
5428 BFD_RELOC_390_TLS_LE64
5430 BFD_RELOC_390_TLS_LDO32
5432 BFD_RELOC_390_TLS_LDO64
5434 BFD_RELOC_390_TLS_DTPMOD
5436 BFD_RELOC_390_TLS_DTPOFF
5438 BFD_RELOC_390_TLS_TPOFF
5440 s390 tls relocations.
5447 BFD_RELOC_390_GOTPLT20
5449 BFD_RELOC_390_TLS_GOTIE20
5451 Long displacement extension.
5454 BFD_RELOC_390_IRELATIVE
5456 STT_GNU_IFUNC relocation.
5459 BFD_RELOC_SCORE_GPREL15
5462 Low 16 bit for load/store
5464 BFD_RELOC_SCORE_DUMMY2
5468 This is a 24-bit reloc with the right 1 bit assumed to be 0
5470 BFD_RELOC_SCORE_BRANCH
5472 This is a 19-bit reloc with the right 1 bit assumed to be 0
5474 BFD_RELOC_SCORE_IMM30
5476 This is a 32-bit reloc for 48-bit instructions.
5478 BFD_RELOC_SCORE_IMM32
5480 This is a 32-bit reloc for 48-bit instructions.
5482 BFD_RELOC_SCORE16_JMP
5484 This is a 11-bit reloc with the right 1 bit assumed to be 0
5486 BFD_RELOC_SCORE16_BRANCH
5488 This is a 8-bit reloc with the right 1 bit assumed to be 0
5490 BFD_RELOC_SCORE_BCMP
5492 This is a 9-bit reloc with the right 1 bit assumed to be 0
5494 BFD_RELOC_SCORE_GOT15
5496 BFD_RELOC_SCORE_GOT_LO16
5498 BFD_RELOC_SCORE_CALL15
5500 BFD_RELOC_SCORE_DUMMY_HI16
5502 Undocumented Score relocs
5507 Scenix IP2K - 9-bit register number / data address
5511 Scenix IP2K - 4-bit register/data bank number
5513 BFD_RELOC_IP2K_ADDR16CJP
5515 Scenix IP2K - low 13 bits of instruction word address
5517 BFD_RELOC_IP2K_PAGE3
5519 Scenix IP2K - high 3 bits of instruction word address
5521 BFD_RELOC_IP2K_LO8DATA
5523 BFD_RELOC_IP2K_HI8DATA
5525 BFD_RELOC_IP2K_EX8DATA
5527 Scenix IP2K - ext/low/high 8 bits of data address
5529 BFD_RELOC_IP2K_LO8INSN
5531 BFD_RELOC_IP2K_HI8INSN
5533 Scenix IP2K - low/high 8 bits of instruction word address
5535 BFD_RELOC_IP2K_PC_SKIP
5537 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
5541 Scenix IP2K - 16 bit word address in text section.
5543 BFD_RELOC_IP2K_FR_OFFSET
5545 Scenix IP2K - 7-bit sp or dp offset
5547 BFD_RELOC_VPE4KMATH_DATA
5549 BFD_RELOC_VPE4KMATH_INSN
5551 Scenix VPE4K coprocessor - data/insn-space addressing
5554 BFD_RELOC_VTABLE_INHERIT
5556 BFD_RELOC_VTABLE_ENTRY
5558 These two relocations are used by the linker to determine which of
5559 the entries in a C++ virtual function table are actually used. When
5560 the --gc-sections option is given, the linker will zero out the entries
5561 that are not used, so that the code for those functions need not be
5562 included in the output.
5564 VTABLE_INHERIT is a zero-space relocation used to describe to the
5565 linker the inheritance tree of a C++ virtual function table. The
5566 relocation's symbol should be the parent class' vtable, and the
5567 relocation should be located at the child vtable.
5569 VTABLE_ENTRY is a zero-space relocation that describes the use of a
5570 virtual function table entry. The reloc's symbol should refer to the
5571 table of the class mentioned in the code. Off of that base, an offset
5572 describes the entry that is being used. For Rela hosts, this offset
5573 is stored in the reloc's addend. For Rel hosts, we are forced to put
5574 this offset in the reloc's section offset.
5577 BFD_RELOC_IA64_IMM14
5579 BFD_RELOC_IA64_IMM22
5581 BFD_RELOC_IA64_IMM64
5583 BFD_RELOC_IA64_DIR32MSB
5585 BFD_RELOC_IA64_DIR32LSB
5587 BFD_RELOC_IA64_DIR64MSB
5589 BFD_RELOC_IA64_DIR64LSB
5591 BFD_RELOC_IA64_GPREL22
5593 BFD_RELOC_IA64_GPREL64I
5595 BFD_RELOC_IA64_GPREL32MSB
5597 BFD_RELOC_IA64_GPREL32LSB
5599 BFD_RELOC_IA64_GPREL64MSB
5601 BFD_RELOC_IA64_GPREL64LSB
5603 BFD_RELOC_IA64_LTOFF22
5605 BFD_RELOC_IA64_LTOFF64I
5607 BFD_RELOC_IA64_PLTOFF22
5609 BFD_RELOC_IA64_PLTOFF64I
5611 BFD_RELOC_IA64_PLTOFF64MSB
5613 BFD_RELOC_IA64_PLTOFF64LSB
5615 BFD_RELOC_IA64_FPTR64I
5617 BFD_RELOC_IA64_FPTR32MSB
5619 BFD_RELOC_IA64_FPTR32LSB
5621 BFD_RELOC_IA64_FPTR64MSB
5623 BFD_RELOC_IA64_FPTR64LSB
5625 BFD_RELOC_IA64_PCREL21B
5627 BFD_RELOC_IA64_PCREL21BI
5629 BFD_RELOC_IA64_PCREL21M
5631 BFD_RELOC_IA64_PCREL21F
5633 BFD_RELOC_IA64_PCREL22
5635 BFD_RELOC_IA64_PCREL60B
5637 BFD_RELOC_IA64_PCREL64I
5639 BFD_RELOC_IA64_PCREL32MSB
5641 BFD_RELOC_IA64_PCREL32LSB
5643 BFD_RELOC_IA64_PCREL64MSB
5645 BFD_RELOC_IA64_PCREL64LSB
5647 BFD_RELOC_IA64_LTOFF_FPTR22
5649 BFD_RELOC_IA64_LTOFF_FPTR64I
5651 BFD_RELOC_IA64_LTOFF_FPTR32MSB
5653 BFD_RELOC_IA64_LTOFF_FPTR32LSB
5655 BFD_RELOC_IA64_LTOFF_FPTR64MSB
5657 BFD_RELOC_IA64_LTOFF_FPTR64LSB
5659 BFD_RELOC_IA64_SEGREL32MSB
5661 BFD_RELOC_IA64_SEGREL32LSB
5663 BFD_RELOC_IA64_SEGREL64MSB
5665 BFD_RELOC_IA64_SEGREL64LSB
5667 BFD_RELOC_IA64_SECREL32MSB
5669 BFD_RELOC_IA64_SECREL32LSB
5671 BFD_RELOC_IA64_SECREL64MSB
5673 BFD_RELOC_IA64_SECREL64LSB
5675 BFD_RELOC_IA64_REL32MSB
5677 BFD_RELOC_IA64_REL32LSB
5679 BFD_RELOC_IA64_REL64MSB
5681 BFD_RELOC_IA64_REL64LSB
5683 BFD_RELOC_IA64_LTV32MSB
5685 BFD_RELOC_IA64_LTV32LSB
5687 BFD_RELOC_IA64_LTV64MSB
5689 BFD_RELOC_IA64_LTV64LSB
5691 BFD_RELOC_IA64_IPLTMSB
5693 BFD_RELOC_IA64_IPLTLSB
5697 BFD_RELOC_IA64_LTOFF22X
5699 BFD_RELOC_IA64_LDXMOV
5701 BFD_RELOC_IA64_TPREL14
5703 BFD_RELOC_IA64_TPREL22
5705 BFD_RELOC_IA64_TPREL64I
5707 BFD_RELOC_IA64_TPREL64MSB
5709 BFD_RELOC_IA64_TPREL64LSB
5711 BFD_RELOC_IA64_LTOFF_TPREL22
5713 BFD_RELOC_IA64_DTPMOD64MSB
5715 BFD_RELOC_IA64_DTPMOD64LSB
5717 BFD_RELOC_IA64_LTOFF_DTPMOD22
5719 BFD_RELOC_IA64_DTPREL14
5721 BFD_RELOC_IA64_DTPREL22
5723 BFD_RELOC_IA64_DTPREL64I
5725 BFD_RELOC_IA64_DTPREL32MSB
5727 BFD_RELOC_IA64_DTPREL32LSB
5729 BFD_RELOC_IA64_DTPREL64MSB
5731 BFD_RELOC_IA64_DTPREL64LSB
5733 BFD_RELOC_IA64_LTOFF_DTPREL22
5735 Intel IA64 Relocations.
5738 BFD_RELOC_M68HC11_HI8
5740 Motorola 68HC11 reloc.
5741 This is the 8 bit high part of an absolute address.
5743 BFD_RELOC_M68HC11_LO8
5745 Motorola 68HC11 reloc.
5746 This is the 8 bit low part of an absolute address.
5748 BFD_RELOC_M68HC11_3B
5750 Motorola 68HC11 reloc.
5751 This is the 3 bit of a value.
5753 BFD_RELOC_M68HC11_RL_JUMP
5755 Motorola 68HC11 reloc.
5756 This reloc marks the beginning of a jump/call instruction.
5757 It is used for linker relaxation to correctly identify beginning
5758 of instruction and change some branches to use PC-relative
5761 BFD_RELOC_M68HC11_RL_GROUP
5763 Motorola 68HC11 reloc.
5764 This reloc marks a group of several instructions that gcc generates
5765 and for which the linker relaxation pass can modify and/or remove
5768 BFD_RELOC_M68HC11_LO16
5770 Motorola 68HC11 reloc.
5771 This is the 16-bit lower part of an address. It is used for 'call'
5772 instruction to specify the symbol address without any special
5773 transformation (due to memory bank window).
5775 BFD_RELOC_M68HC11_PAGE
5777 Motorola 68HC11 reloc.
5778 This is a 8-bit reloc that specifies the page number of an address.
5779 It is used by 'call' instruction to specify the page number of
5782 BFD_RELOC_M68HC11_24
5784 Motorola 68HC11 reloc.
5785 This is a 24-bit reloc that represents the address with a 16-bit
5786 value and a 8-bit page number. The symbol address is transformed
5787 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
5789 BFD_RELOC_M68HC12_5B
5791 Motorola 68HC12 reloc.
5792 This is the 5 bits of a value.
5794 BFD_RELOC_XGATE_RL_JUMP
5796 Freescale XGATE reloc.
5797 This reloc marks the beginning of a bra/jal instruction.
5799 BFD_RELOC_XGATE_RL_GROUP
5801 Freescale XGATE reloc.
5802 This reloc marks a group of several instructions that gcc generates
5803 and for which the linker relaxation pass can modify and/or remove
5806 BFD_RELOC_XGATE_LO16
5808 Freescale XGATE reloc.
5809 This is the 16-bit lower part of an address. It is used for the '16-bit'
5812 BFD_RELOC_XGATE_GPAGE
5814 Freescale XGATE reloc.
5818 Freescale XGATE reloc.
5820 BFD_RELOC_XGATE_PCREL_9
5822 Freescale XGATE reloc.
5823 This is a 9-bit pc-relative reloc.
5825 BFD_RELOC_XGATE_PCREL_10
5827 Freescale XGATE reloc.
5828 This is a 10-bit pc-relative reloc.
5830 BFD_RELOC_XGATE_IMM8_LO
5832 Freescale XGATE reloc.
5833 This is the 16-bit lower part of an address. It is used for the '16-bit'
5836 BFD_RELOC_XGATE_IMM8_HI
5838 Freescale XGATE reloc.
5839 This is the 16-bit higher part of an address. It is used for the '16-bit'
5842 BFD_RELOC_XGATE_IMM3
5844 Freescale XGATE reloc.
5845 This is a 3-bit pc-relative reloc.
5847 BFD_RELOC_XGATE_IMM4
5849 Freescale XGATE reloc.
5850 This is a 4-bit pc-relative reloc.
5852 BFD_RELOC_XGATE_IMM5
5854 Freescale XGATE reloc.
5855 This is a 5-bit pc-relative reloc.
5857 BFD_RELOC_M68HC12_9B
5859 Motorola 68HC12 reloc.
5860 This is the 9 bits of a value.
5862 BFD_RELOC_M68HC12_16B
5864 Motorola 68HC12 reloc.
5865 This is the 16 bits of a value.
5867 BFD_RELOC_M68HC12_9_PCREL
5869 Motorola 68HC12/XGATE reloc.
5870 This is a PCREL9 branch.
5872 BFD_RELOC_M68HC12_10_PCREL
5874 Motorola 68HC12/XGATE reloc.
5875 This is a PCREL10 branch.
5877 BFD_RELOC_M68HC12_LO8XG
5879 Motorola 68HC12/XGATE reloc.
5880 This is the 8 bit low part of an absolute address and immediately precedes
5881 a matching HI8XG part.
5883 BFD_RELOC_M68HC12_HI8XG
5885 Motorola 68HC12/XGATE reloc.
5886 This is the 8 bit high part of an absolute address and immediately follows
5887 a matching LO8XG part.
5889 BFD_RELOC_S12Z_15_PCREL
5891 Freescale S12Z reloc.
5892 This is a 15 bit relative address. If the most significant bits are all zero
5893 then it may be truncated to 8 bits.
5897 BFD_RELOC_16C_NUM08_C
5901 BFD_RELOC_16C_NUM16_C
5905 BFD_RELOC_16C_NUM32_C
5907 BFD_RELOC_16C_DISP04
5909 BFD_RELOC_16C_DISP04_C
5911 BFD_RELOC_16C_DISP08
5913 BFD_RELOC_16C_DISP08_C
5915 BFD_RELOC_16C_DISP16
5917 BFD_RELOC_16C_DISP16_C
5919 BFD_RELOC_16C_DISP24
5921 BFD_RELOC_16C_DISP24_C
5923 BFD_RELOC_16C_DISP24a
5925 BFD_RELOC_16C_DISP24a_C
5929 BFD_RELOC_16C_REG04_C
5931 BFD_RELOC_16C_REG04a
5933 BFD_RELOC_16C_REG04a_C
5937 BFD_RELOC_16C_REG14_C
5941 BFD_RELOC_16C_REG16_C
5945 BFD_RELOC_16C_REG20_C
5949 BFD_RELOC_16C_ABS20_C
5953 BFD_RELOC_16C_ABS24_C
5957 BFD_RELOC_16C_IMM04_C
5961 BFD_RELOC_16C_IMM16_C
5965 BFD_RELOC_16C_IMM20_C
5969 BFD_RELOC_16C_IMM24_C
5973 BFD_RELOC_16C_IMM32_C
5975 NS CR16C Relocations.
5980 BFD_RELOC_CR16_NUM16
5982 BFD_RELOC_CR16_NUM32
5984 BFD_RELOC_CR16_NUM32a
5986 BFD_RELOC_CR16_REGREL0
5988 BFD_RELOC_CR16_REGREL4
5990 BFD_RELOC_CR16_REGREL4a
5992 BFD_RELOC_CR16_REGREL14
5994 BFD_RELOC_CR16_REGREL14a
5996 BFD_RELOC_CR16_REGREL16
5998 BFD_RELOC_CR16_REGREL20
6000 BFD_RELOC_CR16_REGREL20a
6002 BFD_RELOC_CR16_ABS20
6004 BFD_RELOC_CR16_ABS24
6010 BFD_RELOC_CR16_IMM16
6012 BFD_RELOC_CR16_IMM20
6014 BFD_RELOC_CR16_IMM24
6016 BFD_RELOC_CR16_IMM32
6018 BFD_RELOC_CR16_IMM32a
6020 BFD_RELOC_CR16_DISP4
6022 BFD_RELOC_CR16_DISP8
6024 BFD_RELOC_CR16_DISP16
6026 BFD_RELOC_CR16_DISP20
6028 BFD_RELOC_CR16_DISP24
6030 BFD_RELOC_CR16_DISP24a
6032 BFD_RELOC_CR16_SWITCH8
6034 BFD_RELOC_CR16_SWITCH16
6036 BFD_RELOC_CR16_SWITCH32
6038 BFD_RELOC_CR16_GOT_REGREL20
6040 BFD_RELOC_CR16_GOTC_REGREL20
6042 BFD_RELOC_CR16_GLOB_DAT
6044 NS CR16 Relocations.
6051 BFD_RELOC_CRX_REL8_CMP
6059 BFD_RELOC_CRX_REGREL12
6061 BFD_RELOC_CRX_REGREL22
6063 BFD_RELOC_CRX_REGREL28
6065 BFD_RELOC_CRX_REGREL32
6081 BFD_RELOC_CRX_SWITCH8
6083 BFD_RELOC_CRX_SWITCH16
6085 BFD_RELOC_CRX_SWITCH32
6090 BFD_RELOC_CRIS_BDISP8
6092 BFD_RELOC_CRIS_UNSIGNED_5
6094 BFD_RELOC_CRIS_SIGNED_6
6096 BFD_RELOC_CRIS_UNSIGNED_6
6098 BFD_RELOC_CRIS_SIGNED_8
6100 BFD_RELOC_CRIS_UNSIGNED_8
6102 BFD_RELOC_CRIS_SIGNED_16
6104 BFD_RELOC_CRIS_UNSIGNED_16
6106 BFD_RELOC_CRIS_LAPCQ_OFFSET
6108 BFD_RELOC_CRIS_UNSIGNED_4
6110 These relocs are only used within the CRIS assembler. They are not
6111 (at present) written to any object files.
6115 BFD_RELOC_CRIS_GLOB_DAT
6117 BFD_RELOC_CRIS_JUMP_SLOT
6119 BFD_RELOC_CRIS_RELATIVE
6121 Relocs used in ELF shared libraries for CRIS.
6123 BFD_RELOC_CRIS_32_GOT
6125 32-bit offset to symbol-entry within GOT.
6127 BFD_RELOC_CRIS_16_GOT
6129 16-bit offset to symbol-entry within GOT.
6131 BFD_RELOC_CRIS_32_GOTPLT
6133 32-bit offset to symbol-entry within GOT, with PLT handling.
6135 BFD_RELOC_CRIS_16_GOTPLT
6137 16-bit offset to symbol-entry within GOT, with PLT handling.
6139 BFD_RELOC_CRIS_32_GOTREL
6141 32-bit offset to symbol, relative to GOT.
6143 BFD_RELOC_CRIS_32_PLT_GOTREL
6145 32-bit offset to symbol with PLT entry, relative to GOT.
6147 BFD_RELOC_CRIS_32_PLT_PCREL
6149 32-bit offset to symbol with PLT entry, relative to this relocation.
6152 BFD_RELOC_CRIS_32_GOT_GD
6154 BFD_RELOC_CRIS_16_GOT_GD
6156 BFD_RELOC_CRIS_32_GD
6160 BFD_RELOC_CRIS_32_DTPREL
6162 BFD_RELOC_CRIS_16_DTPREL
6164 BFD_RELOC_CRIS_32_GOT_TPREL
6166 BFD_RELOC_CRIS_16_GOT_TPREL
6168 BFD_RELOC_CRIS_32_TPREL
6170 BFD_RELOC_CRIS_16_TPREL
6172 BFD_RELOC_CRIS_DTPMOD
6174 BFD_RELOC_CRIS_32_IE
6176 Relocs used in TLS code for CRIS.
6179 BFD_RELOC_OR1K_REL_26
6181 BFD_RELOC_OR1K_SLO16
6183 BFD_RELOC_OR1K_PCREL_PG21
6187 BFD_RELOC_OR1K_SLO13
6189 BFD_RELOC_OR1K_GOTPC_HI16
6191 BFD_RELOC_OR1K_GOTPC_LO16
6193 BFD_RELOC_OR1K_GOT16
6195 BFD_RELOC_OR1K_GOT_PG21
6197 BFD_RELOC_OR1K_GOT_LO13
6199 BFD_RELOC_OR1K_PLT26
6201 BFD_RELOC_OR1K_PLTA26
6203 BFD_RELOC_OR1K_GOTOFF_SLO16
6207 BFD_RELOC_OR1K_GLOB_DAT
6209 BFD_RELOC_OR1K_JMP_SLOT
6211 BFD_RELOC_OR1K_RELATIVE
6213 BFD_RELOC_OR1K_TLS_GD_HI16
6215 BFD_RELOC_OR1K_TLS_GD_LO16
6217 BFD_RELOC_OR1K_TLS_GD_PG21
6219 BFD_RELOC_OR1K_TLS_GD_LO13
6221 BFD_RELOC_OR1K_TLS_LDM_HI16
6223 BFD_RELOC_OR1K_TLS_LDM_LO16
6225 BFD_RELOC_OR1K_TLS_LDM_PG21
6227 BFD_RELOC_OR1K_TLS_LDM_LO13
6229 BFD_RELOC_OR1K_TLS_LDO_HI16
6231 BFD_RELOC_OR1K_TLS_LDO_LO16
6233 BFD_RELOC_OR1K_TLS_IE_HI16
6235 BFD_RELOC_OR1K_TLS_IE_AHI16
6237 BFD_RELOC_OR1K_TLS_IE_LO16
6239 BFD_RELOC_OR1K_TLS_IE_PG21
6241 BFD_RELOC_OR1K_TLS_IE_LO13
6243 BFD_RELOC_OR1K_TLS_LE_HI16
6245 BFD_RELOC_OR1K_TLS_LE_AHI16
6247 BFD_RELOC_OR1K_TLS_LE_LO16
6249 BFD_RELOC_OR1K_TLS_LE_SLO16
6251 BFD_RELOC_OR1K_TLS_TPOFF
6253 BFD_RELOC_OR1K_TLS_DTPOFF
6255 BFD_RELOC_OR1K_TLS_DTPMOD
6257 OpenRISC 1000 Relocations.
6260 BFD_RELOC_H8_DIR16A8
6262 BFD_RELOC_H8_DIR16R8
6264 BFD_RELOC_H8_DIR24A8
6266 BFD_RELOC_H8_DIR24R8
6268 BFD_RELOC_H8_DIR32A16
6270 BFD_RELOC_H8_DISP32A16
6275 BFD_RELOC_XSTORMY16_REL_12
6277 BFD_RELOC_XSTORMY16_12
6279 BFD_RELOC_XSTORMY16_24
6281 BFD_RELOC_XSTORMY16_FPTR16
6283 Sony Xstormy16 Relocations.
6288 Self-describing complex relocations.
6300 Infineon Relocations.
6303 BFD_RELOC_VAX_GLOB_DAT
6305 BFD_RELOC_VAX_JMP_SLOT
6307 BFD_RELOC_VAX_RELATIVE
6309 Relocations used by VAX ELF.
6314 Morpho MT - 16 bit immediate relocation.
6318 Morpho MT - Hi 16 bits of an address.
6322 Morpho MT - Low 16 bits of an address.
6324 BFD_RELOC_MT_GNU_VTINHERIT
6326 Morpho MT - Used to tell the linker which vtable entries are used.
6328 BFD_RELOC_MT_GNU_VTENTRY
6330 Morpho MT - Used to tell the linker which vtable entries are used.
6332 BFD_RELOC_MT_PCINSN8
6334 Morpho MT - 8 bit immediate relocation.
6337 BFD_RELOC_MSP430_10_PCREL
6339 BFD_RELOC_MSP430_16_PCREL
6343 BFD_RELOC_MSP430_16_PCREL_BYTE
6345 BFD_RELOC_MSP430_16_BYTE
6347 BFD_RELOC_MSP430_2X_PCREL
6349 BFD_RELOC_MSP430_RL_PCREL
6351 BFD_RELOC_MSP430_ABS8
6353 BFD_RELOC_MSP430X_PCR20_EXT_SRC
6355 BFD_RELOC_MSP430X_PCR20_EXT_DST
6357 BFD_RELOC_MSP430X_PCR20_EXT_ODST
6359 BFD_RELOC_MSP430X_ABS20_EXT_SRC
6361 BFD_RELOC_MSP430X_ABS20_EXT_DST
6363 BFD_RELOC_MSP430X_ABS20_EXT_ODST
6365 BFD_RELOC_MSP430X_ABS20_ADR_SRC
6367 BFD_RELOC_MSP430X_ABS20_ADR_DST
6369 BFD_RELOC_MSP430X_PCR16
6371 BFD_RELOC_MSP430X_PCR20_CALL
6373 BFD_RELOC_MSP430X_ABS16
6375 BFD_RELOC_MSP430_ABS_HI16
6377 BFD_RELOC_MSP430_PREL31
6379 BFD_RELOC_MSP430_SYM_DIFF
6381 msp430 specific relocation codes
6388 BFD_RELOC_NIOS2_CALL26
6390 BFD_RELOC_NIOS2_IMM5
6392 BFD_RELOC_NIOS2_CACHE_OPX
6394 BFD_RELOC_NIOS2_IMM6
6396 BFD_RELOC_NIOS2_IMM8
6398 BFD_RELOC_NIOS2_HI16
6400 BFD_RELOC_NIOS2_LO16
6402 BFD_RELOC_NIOS2_HIADJ16
6404 BFD_RELOC_NIOS2_GPREL
6406 BFD_RELOC_NIOS2_UJMP
6408 BFD_RELOC_NIOS2_CJMP
6410 BFD_RELOC_NIOS2_CALLR
6412 BFD_RELOC_NIOS2_ALIGN
6414 BFD_RELOC_NIOS2_GOT16
6416 BFD_RELOC_NIOS2_CALL16
6418 BFD_RELOC_NIOS2_GOTOFF_LO
6420 BFD_RELOC_NIOS2_GOTOFF_HA
6422 BFD_RELOC_NIOS2_PCREL_LO
6424 BFD_RELOC_NIOS2_PCREL_HA
6426 BFD_RELOC_NIOS2_TLS_GD16
6428 BFD_RELOC_NIOS2_TLS_LDM16
6430 BFD_RELOC_NIOS2_TLS_LDO16
6432 BFD_RELOC_NIOS2_TLS_IE16
6434 BFD_RELOC_NIOS2_TLS_LE16
6436 BFD_RELOC_NIOS2_TLS_DTPMOD
6438 BFD_RELOC_NIOS2_TLS_DTPREL
6440 BFD_RELOC_NIOS2_TLS_TPREL
6442 BFD_RELOC_NIOS2_COPY
6444 BFD_RELOC_NIOS2_GLOB_DAT
6446 BFD_RELOC_NIOS2_JUMP_SLOT
6448 BFD_RELOC_NIOS2_RELATIVE
6450 BFD_RELOC_NIOS2_GOTOFF
6452 BFD_RELOC_NIOS2_CALL26_NOAT
6454 BFD_RELOC_NIOS2_GOT_LO
6456 BFD_RELOC_NIOS2_GOT_HA
6458 BFD_RELOC_NIOS2_CALL_LO
6460 BFD_RELOC_NIOS2_CALL_HA
6462 BFD_RELOC_NIOS2_R2_S12
6464 BFD_RELOC_NIOS2_R2_I10_1_PCREL
6466 BFD_RELOC_NIOS2_R2_T1I7_1_PCREL
6468 BFD_RELOC_NIOS2_R2_T1I7_2
6470 BFD_RELOC_NIOS2_R2_T2I4
6472 BFD_RELOC_NIOS2_R2_T2I4_1
6474 BFD_RELOC_NIOS2_R2_T2I4_2
6476 BFD_RELOC_NIOS2_R2_X1I7_2
6478 BFD_RELOC_NIOS2_R2_X2L5
6480 BFD_RELOC_NIOS2_R2_F1I5_2
6482 BFD_RELOC_NIOS2_R2_L5I4X1
6484 BFD_RELOC_NIOS2_R2_T1X1I6
6486 BFD_RELOC_NIOS2_R2_T1X1I6_2
6488 Relocations used by the Altera Nios II core.
6493 PRU LDI 16-bit unsigned data-memory relocation.
6495 BFD_RELOC_PRU_U16_PMEMIMM
6497 PRU LDI 16-bit unsigned instruction-memory relocation.
6501 PRU relocation for two consecutive LDI load instructions that load a
6502 32 bit value into a register. If the higher bits are all zero, then
6503 the second instruction may be relaxed.
6505 BFD_RELOC_PRU_S10_PCREL
6507 PRU QBBx 10-bit signed PC-relative relocation.
6509 BFD_RELOC_PRU_U8_PCREL
6511 PRU 8-bit unsigned relocation used for the LOOP instruction.
6513 BFD_RELOC_PRU_32_PMEM
6515 BFD_RELOC_PRU_16_PMEM
6517 PRU Program Memory relocations. Used to convert from byte addressing to
6518 32-bit word addressing.
6520 BFD_RELOC_PRU_GNU_DIFF8
6522 BFD_RELOC_PRU_GNU_DIFF16
6524 BFD_RELOC_PRU_GNU_DIFF32
6526 BFD_RELOC_PRU_GNU_DIFF16_PMEM
6528 BFD_RELOC_PRU_GNU_DIFF32_PMEM
6530 PRU relocations to mark the difference of two local symbols.
6531 These are only needed to support linker relaxation and can be ignored
6532 when not relaxing. The field is set to the value of the difference
6533 assuming no relaxation. The relocation encodes the position of the
6534 second symbol so the linker can determine whether to adjust the field
6535 value. The PMEM variants encode the word difference, instead of byte
6536 difference between symbols.
6539 BFD_RELOC_IQ2000_OFFSET_16
6541 BFD_RELOC_IQ2000_OFFSET_21
6543 BFD_RELOC_IQ2000_UHI16
6548 BFD_RELOC_XTENSA_RTLD
6550 Special Xtensa relocation used only by PLT entries in ELF shared
6551 objects to indicate that the runtime linker should set the value
6552 to one of its own internal functions or data structures.
6554 BFD_RELOC_XTENSA_GLOB_DAT
6556 BFD_RELOC_XTENSA_JMP_SLOT
6558 BFD_RELOC_XTENSA_RELATIVE
6560 Xtensa relocations for ELF shared objects.
6562 BFD_RELOC_XTENSA_PLT
6564 Xtensa relocation used in ELF object files for symbols that may require
6565 PLT entries. Otherwise, this is just a generic 32-bit relocation.
6567 BFD_RELOC_XTENSA_DIFF8
6569 BFD_RELOC_XTENSA_DIFF16
6571 BFD_RELOC_XTENSA_DIFF32
6573 Xtensa relocations to mark the difference of two local symbols.
6574 These are only needed to support linker relaxation and can be ignored
6575 when not relaxing. The field is set to the value of the difference
6576 assuming no relaxation. The relocation encodes the position of the
6577 first symbol so the linker can determine whether to adjust the field
6580 BFD_RELOC_XTENSA_SLOT0_OP
6582 BFD_RELOC_XTENSA_SLOT1_OP
6584 BFD_RELOC_XTENSA_SLOT2_OP
6586 BFD_RELOC_XTENSA_SLOT3_OP
6588 BFD_RELOC_XTENSA_SLOT4_OP
6590 BFD_RELOC_XTENSA_SLOT5_OP
6592 BFD_RELOC_XTENSA_SLOT6_OP
6594 BFD_RELOC_XTENSA_SLOT7_OP
6596 BFD_RELOC_XTENSA_SLOT8_OP
6598 BFD_RELOC_XTENSA_SLOT9_OP
6600 BFD_RELOC_XTENSA_SLOT10_OP
6602 BFD_RELOC_XTENSA_SLOT11_OP
6604 BFD_RELOC_XTENSA_SLOT12_OP
6606 BFD_RELOC_XTENSA_SLOT13_OP
6608 BFD_RELOC_XTENSA_SLOT14_OP
6610 Generic Xtensa relocations for instruction operands. Only the slot
6611 number is encoded in the relocation. The relocation applies to the
6612 last PC-relative immediate operand, or if there are no PC-relative
6613 immediates, to the last immediate operand.
6615 BFD_RELOC_XTENSA_SLOT0_ALT
6617 BFD_RELOC_XTENSA_SLOT1_ALT
6619 BFD_RELOC_XTENSA_SLOT2_ALT
6621 BFD_RELOC_XTENSA_SLOT3_ALT
6623 BFD_RELOC_XTENSA_SLOT4_ALT
6625 BFD_RELOC_XTENSA_SLOT5_ALT
6627 BFD_RELOC_XTENSA_SLOT6_ALT
6629 BFD_RELOC_XTENSA_SLOT7_ALT
6631 BFD_RELOC_XTENSA_SLOT8_ALT
6633 BFD_RELOC_XTENSA_SLOT9_ALT
6635 BFD_RELOC_XTENSA_SLOT10_ALT
6637 BFD_RELOC_XTENSA_SLOT11_ALT
6639 BFD_RELOC_XTENSA_SLOT12_ALT
6641 BFD_RELOC_XTENSA_SLOT13_ALT
6643 BFD_RELOC_XTENSA_SLOT14_ALT
6645 Alternate Xtensa relocations. Only the slot is encoded in the
6646 relocation. The meaning of these relocations is opcode-specific.
6648 BFD_RELOC_XTENSA_OP0
6650 BFD_RELOC_XTENSA_OP1
6652 BFD_RELOC_XTENSA_OP2
6654 Xtensa relocations for backward compatibility. These have all been
6655 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
6657 BFD_RELOC_XTENSA_ASM_EXPAND
6659 Xtensa relocation to mark that the assembler expanded the
6660 instructions from an original target. The expansion size is
6661 encoded in the reloc size.
6663 BFD_RELOC_XTENSA_ASM_SIMPLIFY
6665 Xtensa relocation to mark that the linker should simplify
6666 assembler-expanded instructions. This is commonly used
6667 internally by the linker after analysis of a
6668 BFD_RELOC_XTENSA_ASM_EXPAND.
6670 BFD_RELOC_XTENSA_TLSDESC_FN
6672 BFD_RELOC_XTENSA_TLSDESC_ARG
6674 BFD_RELOC_XTENSA_TLS_DTPOFF
6676 BFD_RELOC_XTENSA_TLS_TPOFF
6678 BFD_RELOC_XTENSA_TLS_FUNC
6680 BFD_RELOC_XTENSA_TLS_ARG
6682 BFD_RELOC_XTENSA_TLS_CALL
6684 Xtensa TLS relocations.
6689 8 bit signed offset in (ix+d) or (iy+d).
6707 BFD_RELOC_LM32_BRANCH
6709 BFD_RELOC_LM32_16_GOT
6711 BFD_RELOC_LM32_GOTOFF_HI16
6713 BFD_RELOC_LM32_GOTOFF_LO16
6717 BFD_RELOC_LM32_GLOB_DAT
6719 BFD_RELOC_LM32_JMP_SLOT
6721 BFD_RELOC_LM32_RELATIVE
6723 Lattice Mico32 relocations.
6726 BFD_RELOC_MACH_O_SECTDIFF
6728 Difference between two section addreses. Must be followed by a
6729 BFD_RELOC_MACH_O_PAIR.
6731 BFD_RELOC_MACH_O_LOCAL_SECTDIFF
6733 Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol.
6735 BFD_RELOC_MACH_O_PAIR
6737 Pair of relocation. Contains the first symbol.
6739 BFD_RELOC_MACH_O_SUBTRACTOR32
6741 Symbol will be substracted. Must be followed by a BFD_RELOC_32.
6743 BFD_RELOC_MACH_O_SUBTRACTOR64
6745 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
6748 BFD_RELOC_MACH_O_X86_64_BRANCH32
6750 BFD_RELOC_MACH_O_X86_64_BRANCH8
6752 PCREL relocations. They are marked as branch to create PLT entry if
6755 BFD_RELOC_MACH_O_X86_64_GOT
6757 Used when referencing a GOT entry.
6759 BFD_RELOC_MACH_O_X86_64_GOT_LOAD
6761 Used when loading a GOT entry with movq. It is specially marked so that
6762 the linker could optimize the movq to a leaq if possible.
6764 BFD_RELOC_MACH_O_X86_64_PCREL32_1
6766 Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
6768 BFD_RELOC_MACH_O_X86_64_PCREL32_2
6770 Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
6772 BFD_RELOC_MACH_O_X86_64_PCREL32_4
6774 Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
6776 BFD_RELOC_MACH_O_X86_64_TLV
6778 Used when referencing a TLV entry.
6782 BFD_RELOC_MACH_O_ARM64_ADDEND
6784 Addend for PAGE or PAGEOFF.
6786 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21
6788 Relative offset to page of GOT slot.
6790 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12
6792 Relative offset within page of GOT slot.
6794 BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT
6796 Address of a GOT entry.
6799 BFD_RELOC_MICROBLAZE_32_LO
6801 This is a 32 bit reloc for the microblaze that stores the
6802 low 16 bits of a value
6804 BFD_RELOC_MICROBLAZE_32_LO_PCREL
6806 This is a 32 bit pc-relative reloc for the microblaze that
6807 stores the low 16 bits of a value
6809 BFD_RELOC_MICROBLAZE_32_ROSDA
6811 This is a 32 bit reloc for the microblaze that stores a
6812 value relative to the read-only small data area anchor
6814 BFD_RELOC_MICROBLAZE_32_RWSDA
6816 This is a 32 bit reloc for the microblaze that stores a
6817 value relative to the read-write small data area anchor
6819 BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
6821 This is a 32 bit reloc for the microblaze to handle
6822 expressions of the form "Symbol Op Symbol"
6824 BFD_RELOC_MICROBLAZE_64_NONE
6826 This is a 64 bit reloc that stores the 32 bit pc relative
6827 value in two words (with an imm instruction). No relocation is
6828 done here - only used for relaxing
6830 BFD_RELOC_MICROBLAZE_64_GOTPC
6832 This is a 64 bit reloc that stores the 32 bit pc relative
6833 value in two words (with an imm instruction). The relocation is
6834 PC-relative GOT offset
6836 BFD_RELOC_MICROBLAZE_64_GOT
6838 This is a 64 bit reloc that stores the 32 bit pc relative
6839 value in two words (with an imm instruction). The relocation is
6842 BFD_RELOC_MICROBLAZE_64_PLT
6844 This is a 64 bit reloc that stores the 32 bit pc relative
6845 value in two words (with an imm instruction). The relocation is
6846 PC-relative offset into PLT
6848 BFD_RELOC_MICROBLAZE_64_GOTOFF
6850 This is a 64 bit reloc that stores the 32 bit GOT relative
6851 value in two words (with an imm instruction). The relocation is
6852 relative offset from _GLOBAL_OFFSET_TABLE_
6854 BFD_RELOC_MICROBLAZE_32_GOTOFF
6856 This is a 32 bit reloc that stores the 32 bit GOT relative
6857 value in a word. The relocation is relative offset from
6858 _GLOBAL_OFFSET_TABLE_
6860 BFD_RELOC_MICROBLAZE_COPY
6862 This is used to tell the dynamic linker to copy the value out of
6863 the dynamic object into the runtime process image.
6865 BFD_RELOC_MICROBLAZE_64_TLS
6869 BFD_RELOC_MICROBLAZE_64_TLSGD
6871 This is a 64 bit reloc that stores the 32 bit GOT relative value
6872 of the GOT TLS GD info entry in two words (with an imm instruction). The
6873 relocation is GOT offset.
6875 BFD_RELOC_MICROBLAZE_64_TLSLD
6877 This is a 64 bit reloc that stores the 32 bit GOT relative value
6878 of the GOT TLS LD info entry in two words (with an imm instruction). The
6879 relocation is GOT offset.
6881 BFD_RELOC_MICROBLAZE_32_TLSDTPMOD
6883 This is a 32 bit reloc that stores the Module ID to GOT(n).
6885 BFD_RELOC_MICROBLAZE_32_TLSDTPREL
6887 This is a 32 bit reloc that stores TLS offset to GOT(n+1).
6889 BFD_RELOC_MICROBLAZE_64_TLSDTPREL
6891 This is a 32 bit reloc for storing TLS offset to two words (uses imm
6894 BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL
6896 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6897 to two words (uses imm instruction).
6899 BFD_RELOC_MICROBLAZE_64_TLSTPREL
6901 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6902 to two words (uses imm instruction).
6904 BFD_RELOC_MICROBLAZE_64_TEXTPCREL
6906 This is a 64 bit reloc that stores the 32 bit pc relative
6907 value in two words (with an imm instruction). The relocation is
6908 PC-relative offset from start of TEXT.
6910 BFD_RELOC_MICROBLAZE_64_TEXTREL
6912 This is a 64 bit reloc that stores the 32 bit offset
6913 value in two words (with an imm instruction). The relocation is
6914 relative offset from start of TEXT.
6917 BFD_RELOC_AARCH64_RELOC_START
6919 AArch64 pseudo relocation code to mark the start of the AArch64
6920 relocation enumerators. N.B. the order of the enumerators is
6921 important as several tables in the AArch64 bfd backend are indexed
6922 by these enumerators; make sure they are all synced.
6924 BFD_RELOC_AARCH64_NULL
6926 Deprecated AArch64 null relocation code.
6928 BFD_RELOC_AARCH64_NONE
6930 AArch64 null relocation code.
6932 BFD_RELOC_AARCH64_64
6934 BFD_RELOC_AARCH64_32
6936 BFD_RELOC_AARCH64_16
6938 Basic absolute relocations of N bits. These are equivalent to
6939 BFD_RELOC_N and they were added to assist the indexing of the howto
6942 BFD_RELOC_AARCH64_64_PCREL
6944 BFD_RELOC_AARCH64_32_PCREL
6946 BFD_RELOC_AARCH64_16_PCREL
6948 PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
6949 and they were added to assist the indexing of the howto table.
6951 BFD_RELOC_AARCH64_MOVW_G0
6953 AArch64 MOV[NZK] instruction with most significant bits 0 to 15
6954 of an unsigned address/value.
6956 BFD_RELOC_AARCH64_MOVW_G0_NC
6958 AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
6959 an address/value. No overflow checking.
6961 BFD_RELOC_AARCH64_MOVW_G1
6963 AArch64 MOV[NZK] instruction with most significant bits 16 to 31
6964 of an unsigned address/value.
6966 BFD_RELOC_AARCH64_MOVW_G1_NC
6968 AArch64 MOV[NZK] instruction with less significant bits 16 to 31
6969 of an address/value. No overflow checking.
6971 BFD_RELOC_AARCH64_MOVW_G2
6973 AArch64 MOV[NZK] instruction with most significant bits 32 to 47
6974 of an unsigned address/value.
6976 BFD_RELOC_AARCH64_MOVW_G2_NC
6978 AArch64 MOV[NZK] instruction with less significant bits 32 to 47
6979 of an address/value. No overflow checking.
6981 BFD_RELOC_AARCH64_MOVW_G3
6983 AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
6984 of a signed or unsigned address/value.
6986 BFD_RELOC_AARCH64_MOVW_G0_S
6988 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
6989 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6992 BFD_RELOC_AARCH64_MOVW_G1_S
6994 AArch64 MOV[NZ] instruction with most significant bits 16 to 31
6995 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6998 BFD_RELOC_AARCH64_MOVW_G2_S
7000 AArch64 MOV[NZ] instruction with most significant bits 32 to 47
7001 of a signed value. Changes instruction to MOVZ or MOVN depending on the
7004 BFD_RELOC_AARCH64_MOVW_PREL_G0
7006 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
7007 of a signed value. Changes instruction to MOVZ or MOVN depending on the
7010 BFD_RELOC_AARCH64_MOVW_PREL_G0_NC
7012 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
7013 of a signed value. Changes instruction to MOVZ or MOVN depending on the
7016 BFD_RELOC_AARCH64_MOVW_PREL_G1
7018 AArch64 MOVK instruction with most significant bits 16 to 31
7021 BFD_RELOC_AARCH64_MOVW_PREL_G1_NC
7023 AArch64 MOVK instruction with most significant bits 16 to 31
7026 BFD_RELOC_AARCH64_MOVW_PREL_G2
7028 AArch64 MOVK instruction with most significant bits 32 to 47
7031 BFD_RELOC_AARCH64_MOVW_PREL_G2_NC
7033 AArch64 MOVK instruction with most significant bits 32 to 47
7036 BFD_RELOC_AARCH64_MOVW_PREL_G3
7038 AArch64 MOVK instruction with most significant bits 47 to 63
7041 BFD_RELOC_AARCH64_LD_LO19_PCREL
7043 AArch64 Load Literal instruction, holding a 19 bit pc-relative word
7044 offset. The lowest two bits must be zero and are not stored in the
7045 instruction, giving a 21 bit signed byte offset.
7047 BFD_RELOC_AARCH64_ADR_LO21_PCREL
7049 AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
7051 BFD_RELOC_AARCH64_ADR_HI21_PCREL
7053 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
7054 offset, giving a 4KB aligned page base address.
7056 BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
7058 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
7059 offset, giving a 4KB aligned page base address, but with no overflow
7062 BFD_RELOC_AARCH64_ADD_LO12
7064 AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
7065 Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7067 BFD_RELOC_AARCH64_LDST8_LO12
7069 AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
7070 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7072 BFD_RELOC_AARCH64_TSTBR14
7074 AArch64 14 bit pc-relative test bit and branch.
7075 The lowest two bits must be zero and are not stored in the instruction,
7076 giving a 16 bit signed byte offset.
7078 BFD_RELOC_AARCH64_BRANCH19
7080 AArch64 19 bit pc-relative conditional branch and compare & branch.
7081 The lowest two bits must be zero and are not stored in the instruction,
7082 giving a 21 bit signed byte offset.
7084 BFD_RELOC_AARCH64_JUMP26
7086 AArch64 26 bit pc-relative unconditional branch.
7087 The lowest two bits must be zero and are not stored in the instruction,
7088 giving a 28 bit signed byte offset.
7090 BFD_RELOC_AARCH64_CALL26
7092 AArch64 26 bit pc-relative unconditional branch and link.
7093 The lowest two bits must be zero and are not stored in the instruction,
7094 giving a 28 bit signed byte offset.
7096 BFD_RELOC_AARCH64_LDST16_LO12
7098 AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
7099 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7101 BFD_RELOC_AARCH64_LDST32_LO12
7103 AArch64 32-bit load/store instruction, holding bits 0 to 11 of the
7104 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7106 BFD_RELOC_AARCH64_LDST64_LO12
7108 AArch64 64-bit load/store instruction, holding bits 0 to 11 of the
7109 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7111 BFD_RELOC_AARCH64_LDST128_LO12
7113 AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
7114 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7116 BFD_RELOC_AARCH64_GOT_LD_PREL19
7118 AArch64 Load Literal instruction, holding a 19 bit PC relative word
7119 offset of the global offset table entry for a symbol. The lowest two
7120 bits must be zero and are not stored in the instruction, giving a 21
7121 bit signed byte offset. This relocation type requires signed overflow
7124 BFD_RELOC_AARCH64_ADR_GOT_PAGE
7126 Get to the page base of the global offset table entry for a symbol as
7127 part of an ADRP instruction using a 21 bit PC relative value.Used in
7128 conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
7130 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
7132 Unsigned 12 bit byte offset for 64 bit load/store from the page of
7133 the GOT entry for this symbol. Used in conjunction with
7134 BFD_RELOC_AARCH64_ADR_GOT_PAGE. Valid in LP64 ABI only.
7136 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
7138 Unsigned 12 bit byte offset for 32 bit load/store from the page of
7139 the GOT entry for this symbol. Used in conjunction with
7140 BFD_RELOC_AARCH64_ADR_GOT_PAGE. Valid in ILP32 ABI only.
7142 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
7144 Unsigned 16 bit byte offset for 64 bit load/store from the GOT entry
7145 for this symbol. Valid in LP64 ABI only.
7147 BFD_RELOC_AARCH64_MOVW_GOTOFF_G1
7149 Unsigned 16 bit byte higher offset for 64 bit load/store from the GOT entry
7150 for this symbol. Valid in LP64 ABI only.
7152 BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
7154 Unsigned 15 bit byte offset for 64 bit load/store from the page of
7155 the GOT entry for this symbol. Valid in LP64 ABI only.
7157 BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
7159 Scaled 14 bit byte offset to the page base of the global offset table.
7161 BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
7163 Scaled 15 bit byte offset to the page base of the global offset table.
7165 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
7167 Get to the page base of the global offset table entry for a symbols
7168 tls_index structure as part of an adrp instruction using a 21 bit PC
7169 relative value. Used in conjunction with
7170 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
7172 BFD_RELOC_AARCH64_TLSGD_ADR_PREL21
7174 AArch64 TLS General Dynamic
7176 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
7178 Unsigned 12 bit byte offset to global offset table entry for a symbols
7179 tls_index structure. Used in conjunction with
7180 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
7182 BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC
7184 AArch64 TLS General Dynamic relocation.
7186 BFD_RELOC_AARCH64_TLSGD_MOVW_G1
7188 AArch64 TLS General Dynamic relocation.
7190 BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
7192 AArch64 TLS INITIAL EXEC relocation.
7194 BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
7196 AArch64 TLS INITIAL EXEC relocation.
7198 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
7200 AArch64 TLS INITIAL EXEC relocation.
7202 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
7204 AArch64 TLS INITIAL EXEC relocation.
7206 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
7208 AArch64 TLS INITIAL EXEC relocation.
7210 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
7212 AArch64 TLS INITIAL EXEC relocation.
7214 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
7216 bit[23:12] of byte offset to module TLS base address.
7218 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
7220 Unsigned 12 bit byte offset to module TLS base address.
7222 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
7224 No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
7226 BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
7228 Unsigned 12 bit byte offset to global offset table entry for a symbols
7229 tls_index structure. Used in conjunction with
7230 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
7232 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
7234 GOT entry page address for AArch64 TLS Local Dynamic, used with ADRP
7237 BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
7239 GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.
7241 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12
7243 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7246 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC
7248 Similar as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.
7250 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12
7252 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7255 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC
7257 Similar as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.
7259 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12
7261 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7264 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC
7266 Similar as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.
7268 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12
7270 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7273 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC
7275 Similar as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.
7277 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7279 bit[15:0] of byte offset to module TLS base address.
7281 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
7283 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7285 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7287 bit[31:16] of byte offset to module TLS base address.
7289 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
7291 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7293 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
7295 bit[47:32] of byte offset to module TLS base address.
7297 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
7299 AArch64 TLS LOCAL EXEC relocation.
7301 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
7303 AArch64 TLS LOCAL EXEC relocation.
7305 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
7307 AArch64 TLS LOCAL EXEC relocation.
7309 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
7311 AArch64 TLS LOCAL EXEC relocation.
7313 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
7315 AArch64 TLS LOCAL EXEC relocation.
7317 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
7319 AArch64 TLS LOCAL EXEC relocation.
7321 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
7323 AArch64 TLS LOCAL EXEC relocation.
7325 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
7327 AArch64 TLS LOCAL EXEC relocation.
7329 BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12
7331 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7334 BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC
7336 Similar as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check.
7338 BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12
7340 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7343 BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC
7345 Similar as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check.
7347 BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12
7349 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7352 BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC
7354 Similar as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check.
7356 BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12
7358 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7361 BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC
7363 Similar as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check.
7365 BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
7367 AArch64 TLS DESC relocation.
7369 BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
7371 AArch64 TLS DESC relocation.
7373 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
7375 AArch64 TLS DESC relocation.
7377 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12
7379 AArch64 TLS DESC relocation.
7381 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
7383 AArch64 TLS DESC relocation.
7385 BFD_RELOC_AARCH64_TLSDESC_ADD_LO12
7387 AArch64 TLS DESC relocation.
7389 BFD_RELOC_AARCH64_TLSDESC_OFF_G1
7391 AArch64 TLS DESC relocation.
7393 BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
7395 AArch64 TLS DESC relocation.
7397 BFD_RELOC_AARCH64_TLSDESC_LDR
7399 AArch64 TLS DESC relocation.
7401 BFD_RELOC_AARCH64_TLSDESC_ADD
7403 AArch64 TLS DESC relocation.
7405 BFD_RELOC_AARCH64_TLSDESC_CALL
7407 AArch64 TLS DESC relocation.
7409 BFD_RELOC_AARCH64_COPY
7411 AArch64 TLS relocation.
7413 BFD_RELOC_AARCH64_GLOB_DAT
7415 AArch64 TLS relocation.
7417 BFD_RELOC_AARCH64_JUMP_SLOT
7419 AArch64 TLS relocation.
7421 BFD_RELOC_AARCH64_RELATIVE
7423 AArch64 TLS relocation.
7425 BFD_RELOC_AARCH64_TLS_DTPMOD
7427 AArch64 TLS relocation.
7429 BFD_RELOC_AARCH64_TLS_DTPREL
7431 AArch64 TLS relocation.
7433 BFD_RELOC_AARCH64_TLS_TPREL
7435 AArch64 TLS relocation.
7437 BFD_RELOC_AARCH64_TLSDESC
7439 AArch64 TLS relocation.
7441 BFD_RELOC_AARCH64_IRELATIVE
7443 AArch64 support for STT_GNU_IFUNC.
7445 BFD_RELOC_AARCH64_RELOC_END
7447 AArch64 pseudo relocation code to mark the end of the AArch64
7448 relocation enumerators that have direct mapping to ELF reloc codes.
7449 There are a few more enumerators after this one; those are mainly
7450 used by the AArch64 assembler for the internal fixup or to select
7451 one of the above enumerators.
7453 BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
7455 AArch64 pseudo relocation code to be used internally by the AArch64
7456 assembler and not (currently) written to any object files.
7458 BFD_RELOC_AARCH64_LDST_LO12
7460 AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
7461 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7463 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
7465 AArch64 pseudo relocation code for TLS local dynamic mode. It's to be
7466 used internally by the AArch64 assembler and not (currently) written to
7469 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
7471 Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.
7473 BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12
7475 AArch64 pseudo relocation code for TLS local exec mode. It's to be
7476 used internally by the AArch64 assembler and not (currently) written to
7479 BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC
7481 Similar as BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12, but no overflow check.
7483 BFD_RELOC_AARCH64_LD_GOT_LO12_NC
7485 AArch64 pseudo relocation code to be used internally by the AArch64
7486 assembler and not (currently) written to any object files.
7488 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
7490 AArch64 pseudo relocation code to be used internally by the AArch64
7491 assembler and not (currently) written to any object files.
7493 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
7495 AArch64 pseudo relocation code to be used internally by the AArch64
7496 assembler and not (currently) written to any object files.
7498 BFD_RELOC_TILEPRO_COPY
7500 BFD_RELOC_TILEPRO_GLOB_DAT
7502 BFD_RELOC_TILEPRO_JMP_SLOT
7504 BFD_RELOC_TILEPRO_RELATIVE
7506 BFD_RELOC_TILEPRO_BROFF_X1
7508 BFD_RELOC_TILEPRO_JOFFLONG_X1
7510 BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
7512 BFD_RELOC_TILEPRO_IMM8_X0
7514 BFD_RELOC_TILEPRO_IMM8_Y0
7516 BFD_RELOC_TILEPRO_IMM8_X1
7518 BFD_RELOC_TILEPRO_IMM8_Y1
7520 BFD_RELOC_TILEPRO_DEST_IMM8_X1
7522 BFD_RELOC_TILEPRO_MT_IMM15_X1
7524 BFD_RELOC_TILEPRO_MF_IMM15_X1
7526 BFD_RELOC_TILEPRO_IMM16_X0
7528 BFD_RELOC_TILEPRO_IMM16_X1
7530 BFD_RELOC_TILEPRO_IMM16_X0_LO
7532 BFD_RELOC_TILEPRO_IMM16_X1_LO
7534 BFD_RELOC_TILEPRO_IMM16_X0_HI
7536 BFD_RELOC_TILEPRO_IMM16_X1_HI
7538 BFD_RELOC_TILEPRO_IMM16_X0_HA
7540 BFD_RELOC_TILEPRO_IMM16_X1_HA
7542 BFD_RELOC_TILEPRO_IMM16_X0_PCREL
7544 BFD_RELOC_TILEPRO_IMM16_X1_PCREL
7546 BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
7548 BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
7550 BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
7552 BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
7554 BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
7556 BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
7558 BFD_RELOC_TILEPRO_IMM16_X0_GOT
7560 BFD_RELOC_TILEPRO_IMM16_X1_GOT
7562 BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
7564 BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
7566 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
7568 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
7570 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
7572 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
7574 BFD_RELOC_TILEPRO_MMSTART_X0
7576 BFD_RELOC_TILEPRO_MMEND_X0
7578 BFD_RELOC_TILEPRO_MMSTART_X1
7580 BFD_RELOC_TILEPRO_MMEND_X1
7582 BFD_RELOC_TILEPRO_SHAMT_X0
7584 BFD_RELOC_TILEPRO_SHAMT_X1
7586 BFD_RELOC_TILEPRO_SHAMT_Y0
7588 BFD_RELOC_TILEPRO_SHAMT_Y1
7590 BFD_RELOC_TILEPRO_TLS_GD_CALL
7592 BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD
7594 BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD
7596 BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD
7598 BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD
7600 BFD_RELOC_TILEPRO_TLS_IE_LOAD
7602 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
7604 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
7606 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
7608 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
7610 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
7612 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
7614 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
7616 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
7618 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
7620 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
7622 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
7624 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
7626 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
7628 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
7630 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
7632 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
7634 BFD_RELOC_TILEPRO_TLS_DTPMOD32
7636 BFD_RELOC_TILEPRO_TLS_DTPOFF32
7638 BFD_RELOC_TILEPRO_TLS_TPOFF32
7640 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE
7642 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE
7644 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO
7646 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO
7648 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI
7650 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI
7652 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA
7654 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA
7656 Tilera TILEPro Relocations.
7658 BFD_RELOC_TILEGX_HW0
7660 BFD_RELOC_TILEGX_HW1
7662 BFD_RELOC_TILEGX_HW2
7664 BFD_RELOC_TILEGX_HW3
7666 BFD_RELOC_TILEGX_HW0_LAST
7668 BFD_RELOC_TILEGX_HW1_LAST
7670 BFD_RELOC_TILEGX_HW2_LAST
7672 BFD_RELOC_TILEGX_COPY
7674 BFD_RELOC_TILEGX_GLOB_DAT
7676 BFD_RELOC_TILEGX_JMP_SLOT
7678 BFD_RELOC_TILEGX_RELATIVE
7680 BFD_RELOC_TILEGX_BROFF_X1
7682 BFD_RELOC_TILEGX_JUMPOFF_X1
7684 BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
7686 BFD_RELOC_TILEGX_IMM8_X0
7688 BFD_RELOC_TILEGX_IMM8_Y0
7690 BFD_RELOC_TILEGX_IMM8_X1
7692 BFD_RELOC_TILEGX_IMM8_Y1
7694 BFD_RELOC_TILEGX_DEST_IMM8_X1
7696 BFD_RELOC_TILEGX_MT_IMM14_X1
7698 BFD_RELOC_TILEGX_MF_IMM14_X1
7700 BFD_RELOC_TILEGX_MMSTART_X0
7702 BFD_RELOC_TILEGX_MMEND_X0
7704 BFD_RELOC_TILEGX_SHAMT_X0
7706 BFD_RELOC_TILEGX_SHAMT_X1
7708 BFD_RELOC_TILEGX_SHAMT_Y0
7710 BFD_RELOC_TILEGX_SHAMT_Y1
7712 BFD_RELOC_TILEGX_IMM16_X0_HW0
7714 BFD_RELOC_TILEGX_IMM16_X1_HW0
7716 BFD_RELOC_TILEGX_IMM16_X0_HW1
7718 BFD_RELOC_TILEGX_IMM16_X1_HW1
7720 BFD_RELOC_TILEGX_IMM16_X0_HW2
7722 BFD_RELOC_TILEGX_IMM16_X1_HW2
7724 BFD_RELOC_TILEGX_IMM16_X0_HW3
7726 BFD_RELOC_TILEGX_IMM16_X1_HW3
7728 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
7730 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
7732 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
7734 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
7736 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
7738 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
7740 BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
7742 BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
7744 BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
7746 BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
7748 BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
7750 BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
7752 BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
7754 BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
7756 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
7758 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
7760 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
7762 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
7764 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
7766 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
7768 BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
7770 BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
7772 BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL
7774 BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL
7776 BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL
7778 BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL
7780 BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL
7782 BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL
7784 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
7786 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
7788 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
7790 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
7792 BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL
7794 BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL
7796 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
7798 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
7800 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE
7802 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE
7804 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE
7806 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE
7808 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE
7810 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE
7812 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
7814 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
7816 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
7818 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
7820 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
7822 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
7824 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL
7826 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL
7828 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL
7830 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL
7832 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL
7834 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL
7836 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
7838 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
7840 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
7842 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
7844 BFD_RELOC_TILEGX_TLS_DTPMOD64
7846 BFD_RELOC_TILEGX_TLS_DTPOFF64
7848 BFD_RELOC_TILEGX_TLS_TPOFF64
7850 BFD_RELOC_TILEGX_TLS_DTPMOD32
7852 BFD_RELOC_TILEGX_TLS_DTPOFF32
7854 BFD_RELOC_TILEGX_TLS_TPOFF32
7856 BFD_RELOC_TILEGX_TLS_GD_CALL
7858 BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD
7860 BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD
7862 BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD
7864 BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD
7866 BFD_RELOC_TILEGX_TLS_IE_LOAD
7868 BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD
7870 BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD
7872 BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD
7874 BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD
7876 Tilera TILE-Gx Relocations.
7879 BFD_RELOC_EPIPHANY_SIMM8
7881 Adapteva EPIPHANY - 8 bit signed pc-relative displacement
7883 BFD_RELOC_EPIPHANY_SIMM24
7885 Adapteva EPIPHANY - 24 bit signed pc-relative displacement
7887 BFD_RELOC_EPIPHANY_HIGH
7889 Adapteva EPIPHANY - 16 most-significant bits of absolute address
7891 BFD_RELOC_EPIPHANY_LOW
7893 Adapteva EPIPHANY - 16 least-significant bits of absolute address
7895 BFD_RELOC_EPIPHANY_SIMM11
7897 Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
7899 BFD_RELOC_EPIPHANY_IMM11
7901 Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement)
7903 BFD_RELOC_EPIPHANY_IMM8
7905 Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
7908 BFD_RELOC_VISIUM_HI16
7910 BFD_RELOC_VISIUM_LO16
7912 BFD_RELOC_VISIUM_IM16
7914 BFD_RELOC_VISIUM_REL16
7916 BFD_RELOC_VISIUM_HI16_PCREL
7918 BFD_RELOC_VISIUM_LO16_PCREL
7920 BFD_RELOC_VISIUM_IM16_PCREL
7925 BFD_RELOC_WASM32_LEB128
7927 BFD_RELOC_WASM32_LEB128_GOT
7929 BFD_RELOC_WASM32_LEB128_GOT_CODE
7931 BFD_RELOC_WASM32_LEB128_PLT
7933 BFD_RELOC_WASM32_PLT_INDEX
7935 BFD_RELOC_WASM32_ABS32_CODE
7937 BFD_RELOC_WASM32_COPY
7939 BFD_RELOC_WASM32_CODE_POINTER
7941 BFD_RELOC_WASM32_INDEX
7943 BFD_RELOC_WASM32_PLT_SIG
7945 WebAssembly relocations.
7948 BFD_RELOC_CKCORE_NONE
7950 BFD_RELOC_CKCORE_ADDR32
7952 BFD_RELOC_CKCORE_PCREL_IMM8BY4
7954 BFD_RELOC_CKCORE_PCREL_IMM11BY2
7956 BFD_RELOC_CKCORE_PCREL_IMM4BY2
7958 BFD_RELOC_CKCORE_PCREL32
7960 BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2
7962 BFD_RELOC_CKCORE_GNU_VTINHERIT
7964 BFD_RELOC_CKCORE_GNU_VTENTRY
7966 BFD_RELOC_CKCORE_RELATIVE
7968 BFD_RELOC_CKCORE_COPY
7970 BFD_RELOC_CKCORE_GLOB_DAT
7972 BFD_RELOC_CKCORE_JUMP_SLOT
7974 BFD_RELOC_CKCORE_GOTOFF
7976 BFD_RELOC_CKCORE_GOTPC
7978 BFD_RELOC_CKCORE_GOT32
7980 BFD_RELOC_CKCORE_PLT32
7982 BFD_RELOC_CKCORE_ADDRGOT
7984 BFD_RELOC_CKCORE_ADDRPLT
7986 BFD_RELOC_CKCORE_PCREL_IMM26BY2
7988 BFD_RELOC_CKCORE_PCREL_IMM16BY2
7990 BFD_RELOC_CKCORE_PCREL_IMM16BY4
7992 BFD_RELOC_CKCORE_PCREL_IMM10BY2
7994 BFD_RELOC_CKCORE_PCREL_IMM10BY4
7996 BFD_RELOC_CKCORE_ADDR_HI16
7998 BFD_RELOC_CKCORE_ADDR_LO16
8000 BFD_RELOC_CKCORE_GOTPC_HI16
8002 BFD_RELOC_CKCORE_GOTPC_LO16
8004 BFD_RELOC_CKCORE_GOTOFF_HI16
8006 BFD_RELOC_CKCORE_GOTOFF_LO16
8008 BFD_RELOC_CKCORE_GOT12
8010 BFD_RELOC_CKCORE_GOT_HI16
8012 BFD_RELOC_CKCORE_GOT_LO16
8014 BFD_RELOC_CKCORE_PLT12
8016 BFD_RELOC_CKCORE_PLT_HI16
8018 BFD_RELOC_CKCORE_PLT_LO16
8020 BFD_RELOC_CKCORE_ADDRGOT_HI16
8022 BFD_RELOC_CKCORE_ADDRGOT_LO16
8024 BFD_RELOC_CKCORE_ADDRPLT_HI16
8026 BFD_RELOC_CKCORE_ADDRPLT_LO16
8028 BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2
8030 BFD_RELOC_CKCORE_TOFFSET_LO16
8032 BFD_RELOC_CKCORE_DOFFSET_LO16
8034 BFD_RELOC_CKCORE_PCREL_IMM18BY2
8036 BFD_RELOC_CKCORE_DOFFSET_IMM18
8038 BFD_RELOC_CKCORE_DOFFSET_IMM18BY2
8040 BFD_RELOC_CKCORE_DOFFSET_IMM18BY4
8042 BFD_RELOC_CKCORE_GOTOFF_IMM18
8044 BFD_RELOC_CKCORE_GOT_IMM18BY4
8046 BFD_RELOC_CKCORE_PLT_IMM18BY4
8048 BFD_RELOC_CKCORE_PCREL_IMM7BY4
8050 BFD_RELOC_CKCORE_TLS_LE32
8052 BFD_RELOC_CKCORE_TLS_IE32
8054 BFD_RELOC_CKCORE_TLS_GD32
8056 BFD_RELOC_CKCORE_TLS_LDM32
8058 BFD_RELOC_CKCORE_TLS_LDO32
8060 BFD_RELOC_CKCORE_TLS_DTPMOD32
8062 BFD_RELOC_CKCORE_TLS_DTPOFF32
8064 BFD_RELOC_CKCORE_TLS_TPOFF32
8066 BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
8068 BFD_RELOC_CKCORE_NOJSRI
8070 BFD_RELOC_CKCORE_CALLGRAPH
8072 BFD_RELOC_CKCORE_IRELATIVE
8074 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4
8076 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4
8089 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
8094 bfd_reloc_type_lookup
8095 bfd_reloc_name_lookup
8098 reloc_howto_type *bfd_reloc_type_lookup
8099 (bfd *abfd, bfd_reloc_code_real_type code);
8100 reloc_howto_type *bfd_reloc_name_lookup
8101 (bfd *abfd, const char *reloc_name);
8104 Return a pointer to a howto structure which, when
8105 invoked, will perform the relocation @var{code} on data from the
8111 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
8113 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
8117 bfd_reloc_name_lookup (bfd
*abfd
, const char *reloc_name
)
8119 return BFD_SEND (abfd
, reloc_name_lookup
, (abfd
, reloc_name
));
8122 static reloc_howto_type bfd_howto_32
=
8123 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_dont
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
8127 bfd_default_reloc_type_lookup
8130 reloc_howto_type *bfd_default_reloc_type_lookup
8131 (bfd *abfd, bfd_reloc_code_real_type code);
8134 Provides a default relocation lookup routine for any architecture.
8139 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
8143 case BFD_RELOC_CTOR
:
8144 /* The type of reloc used in a ctor, which will be as wide as the
8145 address - so either a 64, 32, or 16 bitter. */
8146 switch (bfd_arch_bits_per_address (abfd
))
8152 return &bfd_howto_32
;
8168 bfd_get_reloc_code_name
8171 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
8174 Provides a printable name for the supplied relocation code.
8175 Useful mainly for printing error messages.
8179 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
8181 if (code
> BFD_RELOC_UNUSED
)
8183 return bfd_reloc_code_real_names
[code
];
8188 bfd_generic_relax_section
8191 bfd_boolean bfd_generic_relax_section
8194 struct bfd_link_info *,
8198 Provides default handling for relaxing for back ends which
8203 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
8204 asection
*section ATTRIBUTE_UNUSED
,
8205 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
8208 if (bfd_link_relocatable (link_info
))
8209 (*link_info
->callbacks
->einfo
)
8210 (_("%P%F: --relax and -r may not be used together\n"));
8218 bfd_generic_gc_sections
8221 bfd_boolean bfd_generic_gc_sections
8222 (bfd *, struct bfd_link_info *);
8225 Provides default handling for relaxing for back ends which
8226 don't do section gc -- i.e., does nothing.
8230 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
8231 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
8238 bfd_generic_lookup_section_flags
8241 bfd_boolean bfd_generic_lookup_section_flags
8242 (struct bfd_link_info *, struct flag_info *, asection *);
8245 Provides default handling for section flags lookup
8246 -- i.e., does nothing.
8247 Returns FALSE if the section should be omitted, otherwise TRUE.
8251 bfd_generic_lookup_section_flags (struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
8252 struct flag_info
*flaginfo
,
8253 asection
*section ATTRIBUTE_UNUSED
)
8255 if (flaginfo
!= NULL
)
8257 _bfd_error_handler (_("INPUT_SECTION_FLAGS are not supported"));
8265 bfd_generic_merge_sections
8268 bfd_boolean bfd_generic_merge_sections
8269 (bfd *, struct bfd_link_info *);
8272 Provides default handling for SEC_MERGE section merging for back ends
8273 which don't have SEC_MERGE support -- i.e., does nothing.
8277 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
8278 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
8285 bfd_generic_get_relocated_section_contents
8288 bfd_byte *bfd_generic_get_relocated_section_contents
8290 struct bfd_link_info *link_info,
8291 struct bfd_link_order *link_order,
8293 bfd_boolean relocatable,
8297 Provides default handling of relocation effort for back ends
8298 which can't be bothered to do it efficiently.
8303 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
8304 struct bfd_link_info
*link_info
,
8305 struct bfd_link_order
*link_order
,
8307 bfd_boolean relocatable
,
8310 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
8311 asection
*input_section
= link_order
->u
.indirect
.section
;
8313 arelent
**reloc_vector
;
8316 reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
8320 /* Read in the section. */
8321 if (!bfd_get_full_section_contents (input_bfd
, input_section
, &data
))
8327 if (reloc_size
== 0)
8330 reloc_vector
= (arelent
**) bfd_malloc (reloc_size
);
8331 if (reloc_vector
== NULL
)
8334 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
8338 if (reloc_count
< 0)
8341 if (reloc_count
> 0)
8345 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
8347 char *error_message
= NULL
;
8349 bfd_reloc_status_type r
;
8351 symbol
= *(*parent
)->sym_ptr_ptr
;
8352 /* PR ld/19628: A specially crafted input file
8353 can result in a NULL symbol pointer here. */
8356 link_info
->callbacks
->einfo
8357 /* xgettext:c-format */
8358 (_("%X%P: %pB(%pA): error: relocation for offset %V has no value\n"),
8359 abfd
, input_section
, (* parent
)->address
);
8363 /* Zap reloc field when the symbol is from a discarded
8364 section, ignoring any addend. Do the same when called
8365 from bfd_simple_get_relocated_section_contents for
8366 undefined symbols in debug sections. This is to keep
8367 debug info reasonably sane, in particular so that
8368 DW_FORM_ref_addr to another file's .debug_info isn't
8369 confused with an offset into the current file's
8371 if ((symbol
->section
!= NULL
&& discarded_section (symbol
->section
))
8372 || (symbol
->section
== bfd_und_section_ptr
8373 && (input_section
->flags
& SEC_DEBUGGING
) != 0
8374 && link_info
->input_bfds
== link_info
->output_bfd
))
8377 static reloc_howto_type none_howto
8378 = HOWTO (0, 0, 0, 0, FALSE
, 0, complain_overflow_dont
, NULL
,
8379 "unused", FALSE
, 0, 0, FALSE
);
8381 off
= (*parent
)->address
* bfd_octets_per_byte (input_bfd
);
8382 _bfd_clear_contents ((*parent
)->howto
, input_bfd
,
8383 input_section
, data
, off
);
8384 (*parent
)->sym_ptr_ptr
= bfd_abs_section_ptr
->symbol_ptr_ptr
;
8385 (*parent
)->addend
= 0;
8386 (*parent
)->howto
= &none_howto
;
8390 r
= bfd_perform_relocation (input_bfd
,
8394 relocatable
? abfd
: NULL
,
8399 asection
*os
= input_section
->output_section
;
8401 /* A partial link, so keep the relocs. */
8402 os
->orelocation
[os
->reloc_count
] = *parent
;
8406 if (r
!= bfd_reloc_ok
)
8410 case bfd_reloc_undefined
:
8411 (*link_info
->callbacks
->undefined_symbol
)
8412 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
8413 input_bfd
, input_section
, (*parent
)->address
, TRUE
);
8415 case bfd_reloc_dangerous
:
8416 BFD_ASSERT (error_message
!= NULL
);
8417 (*link_info
->callbacks
->reloc_dangerous
)
8418 (link_info
, error_message
,
8419 input_bfd
, input_section
, (*parent
)->address
);
8421 case bfd_reloc_overflow
:
8422 (*link_info
->callbacks
->reloc_overflow
)
8424 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
8425 (*parent
)->howto
->name
, (*parent
)->addend
,
8426 input_bfd
, input_section
, (*parent
)->address
);
8428 case bfd_reloc_outofrange
:
8430 This error can result when processing some partially
8431 complete binaries. Do not abort, but issue an error
8433 link_info
->callbacks
->einfo
8434 /* xgettext:c-format */
8435 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
8436 abfd
, input_section
, * parent
);
8439 case bfd_reloc_notsupported
:
8441 This error can result when processing a corrupt binary.
8442 Do not abort. Issue an error message instead. */
8443 link_info
->callbacks
->einfo
8444 /* xgettext:c-format */
8445 (_("%X%P: %pB(%pA): relocation \"%pR\" is not supported\n"),
8446 abfd
, input_section
, * parent
);
8450 /* PR 17512; file: 90c2a92e.
8451 Report unexpected results, without aborting. */
8452 link_info
->callbacks
->einfo
8453 /* xgettext:c-format */
8454 (_("%X%P: %pB(%pA): relocation \"%pR\" returns an unrecognized value %x\n"),
8455 abfd
, input_section
, * parent
, r
);
8463 free (reloc_vector
);
8467 free (reloc_vector
);
8473 _bfd_generic_set_reloc
8476 void _bfd_generic_set_reloc
8480 unsigned int count);
8483 Installs a new set of internal relocations in SECTION.
8487 _bfd_generic_set_reloc (bfd
*abfd ATTRIBUTE_UNUSED
,
8492 section
->orelocation
= relptr
;
8493 section
->reloc_count
= count
;
8498 _bfd_unrecognized_reloc
8501 bfd_boolean _bfd_unrecognized_reloc
8504 unsigned int r_type);
8507 Reports an unrecognized reloc.
8508 Written as a function in order to reduce code duplication.
8509 Returns FALSE so that it can be called from a return statement.
8513 _bfd_unrecognized_reloc (bfd
* abfd
, sec_ptr section
, unsigned int r_type
)
8515 /* xgettext:c-format */
8516 _bfd_error_handler (_("%pB: unrecognized relocation type %#x in section `%pA'"),
8517 abfd
, r_type
, section
);
8519 /* PR 21803: Suggest the most likely cause of this error. */
8520 _bfd_error_handler (_("is this version of the linker - %s - out of date ?"),
8521 BFD_VERSION_STRING
);
8523 bfd_set_error (bfd_error_bad_value
);
8528 _bfd_norelocs_bfd_reloc_type_lookup
8530 bfd_reloc_code_real_type code ATTRIBUTE_UNUSED
)
8532 return (reloc_howto_type
*) _bfd_ptr_bfd_null_error (abfd
);
8536 _bfd_norelocs_bfd_reloc_name_lookup (bfd
*abfd
,
8537 const char *reloc_name ATTRIBUTE_UNUSED
)
8539 return (reloc_howto_type
*) _bfd_ptr_bfd_null_error (abfd
);
8543 _bfd_nodynamic_canonicalize_dynamic_reloc (bfd
*abfd
,
8544 arelent
**relp ATTRIBUTE_UNUSED
,
8545 asymbol
**symp ATTRIBUTE_UNUSED
)
8547 return _bfd_long_bfd_n1_error (abfd
);