1 /* BFD support for handling relocation entries.
2 Copyright (C) 1990-2019 Free Software Foundation, Inc.
3 Written by Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 BFD maintains relocations in much the same way it maintains
27 symbols: they are left alone until required, then read in
28 en-masse and translated into an internal form. A common
29 routine <<bfd_perform_relocation>> acts upon the
30 canonical form to do the fixup.
32 Relocations are maintained on a per section basis,
33 while symbols are maintained on a per BFD basis.
35 All that a back end has to do to fit the BFD interface is to create
36 a <<struct reloc_cache_entry>> for each relocation
37 in a particular section, and fill in the right bits of the structures.
46 /* DO compile in the reloc_code name table from libbfd.h. */
47 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. Note - the value 2 is used so that it
69 . will not be mistaken for the boolean TRUE or FALSE values. *}
72 . {* The relocation was performed, but there was an overflow. *}
75 . {* The address to relocate was not within the section supplied. *}
76 . bfd_reloc_outofrange,
78 . {* Used by special functions. *}
81 . {* Unsupported relocation size requested. *}
82 . bfd_reloc_notsupported,
87 . {* The symbol to relocate against was undefined. *}
88 . bfd_reloc_undefined,
90 . {* The relocation was performed, but may not be ok. If this type is
91 . returned, the error_message argument to bfd_perform_relocation
95 . bfd_reloc_status_type;
97 .typedef const struct reloc_howto_struct reloc_howto_type;
99 .typedef struct reloc_cache_entry
101 . {* A pointer into the canonical table of pointers. *}
102 . struct bfd_symbol **sym_ptr_ptr;
104 . {* offset in section. *}
105 . bfd_size_type address;
107 . {* addend for relocation value. *}
110 . {* Pointer to how to perform the required relocation. *}
111 . reloc_howto_type *howto;
121 Here is a description of each of the fields within an <<arelent>>:
125 The symbol table pointer points to a pointer to the symbol
126 associated with the relocation request. It is the pointer
127 into the table returned by the back end's
128 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
129 referenced through a pointer to a pointer so that tools like
130 the linker can fix up all the symbols of the same name by
131 modifying only one pointer. The relocation routine looks in
132 the symbol and uses the base of the section the symbol is
133 attached to and the value of the symbol as the initial
134 relocation offset. If the symbol pointer is zero, then the
135 section provided is looked up.
139 The <<address>> field gives the offset in bytes from the base of
140 the section data which owns the relocation record to the first
141 byte of relocatable information. The actual data relocated
142 will be relative to this point; for example, a relocation
143 type which modifies the bottom two bytes of a four byte word
144 would not touch the first byte pointed to in a big endian
149 The <<addend>> is a value provided by the back end to be added (!)
150 to the relocation offset. Its interpretation is dependent upon
151 the howto. For example, on the 68k the code:
156 | return foo[0x12345678];
159 Could be compiled into:
162 | moveb @@#12345678,d0
167 This could create a reloc pointing to <<foo>>, but leave the
168 offset in the data, something like:
170 |RELOCATION RECORDS FOR [.text]:
174 |00000000 4e56 fffc ; linkw fp,#-4
175 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
176 |0000000a 49c0 ; extbl d0
177 |0000000c 4e5e ; unlk fp
180 Using coff and an 88k, some instructions don't have enough
181 space in them to represent the full address range, and
182 pointers have to be loaded in two parts. So you'd get something like:
184 | or.u r13,r0,hi16(_foo+0x12345678)
185 | ld.b r2,r13,lo16(_foo+0x12345678)
188 This should create two relocs, both pointing to <<_foo>>, and with
189 0x12340000 in their addend field. The data would consist of:
191 |RELOCATION RECORDS FOR [.text]:
193 |00000002 HVRT16 _foo+0x12340000
194 |00000006 LVRT16 _foo+0x12340000
196 |00000000 5da05678 ; or.u r13,r0,0x5678
197 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
198 |00000008 f400c001 ; jmp r1
200 The relocation routine digs out the value from the data, adds
201 it to the addend to get the original offset, and then adds the
202 value of <<_foo>>. Note that all 32 bits have to be kept around
203 somewhere, to cope with carry from bit 15 to bit 16.
205 One further example is the sparc and the a.out format. The
206 sparc has a similar problem to the 88k, in that some
207 instructions don't have room for an entire offset, but on the
208 sparc the parts are created in odd sized lumps. The designers of
209 the a.out format chose to not use the data within the section
210 for storing part of the offset; all the offset is kept within
211 the reloc. Anything in the data should be ignored.
214 | sethi %hi(_foo+0x12345678),%g2
215 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
219 Both relocs contain a pointer to <<foo>>, and the offsets
222 |RELOCATION RECORDS FOR [.text]:
224 |00000004 HI22 _foo+0x12345678
225 |00000008 LO10 _foo+0x12345678
227 |00000000 9de3bf90 ; save %sp,-112,%sp
228 |00000004 05000000 ; sethi %hi(_foo+0),%g2
229 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
230 |0000000c 81c7e008 ; ret
231 |00000010 81e80000 ; restore
235 The <<howto>> field can be imagined as a
236 relocation instruction. It is a pointer to a structure which
237 contains information on what to do with all of the other
238 information in the reloc record and data section. A back end
239 would normally have a relocation instruction set and turn
240 relocations into pointers to the correct structure on input -
241 but it would be possible to create each howto field on demand.
247 <<enum complain_overflow>>
249 Indicates what sort of overflow checking should be done when
250 performing a relocation.
254 .enum complain_overflow
256 . {* Do not complain on overflow. *}
257 . complain_overflow_dont,
259 . {* Complain if the value overflows when considered as a signed
260 . number one bit larger than the field. ie. A bitfield of N bits
261 . is allowed to represent -2**n to 2**n-1. *}
262 . complain_overflow_bitfield,
264 . {* Complain if the value overflows when considered as a signed
266 . complain_overflow_signed,
268 . {* Complain if the value overflows when considered as an
269 . unsigned number. *}
270 . complain_overflow_unsigned
279 The <<reloc_howto_type>> is a structure which contains all the
280 information that libbfd needs to know to tie up a back end's data.
283 .struct reloc_howto_struct
285 . {* The type field has mainly a documentary use - the back end can
286 . do what it wants with it, though normally the back end's idea of
287 . an external reloc number is stored in this field. *}
290 . {* The encoded size of the item to be relocated. This is *not* a
291 . power-of-two measure. Use bfd_get_reloc_size to find the size
292 . of the item in bytes. *}
293 . unsigned int size:3;
295 . {* The number of bits in the field to be relocated. This is used
296 . when doing overflow checking. *}
297 . unsigned int bitsize:7;
299 . {* The value the final relocation is shifted right by. This drops
300 . unwanted data from the relocation. *}
301 . unsigned int rightshift:6;
303 . {* The bit position of the reloc value in the destination.
304 . The relocated value is left shifted by this amount. *}
305 . unsigned int bitpos:6;
307 . {* What type of overflow error should be checked for when
309 . ENUM_BITFIELD (complain_overflow) complain_on_overflow:2;
311 . {* The relocation value should be negated before applying. *}
312 . unsigned int negate:1;
314 . {* The relocation is relative to the item being relocated. *}
315 . unsigned int pc_relative:1;
317 . {* Some formats record a relocation addend in the section contents
318 . rather than with the relocation. For ELF formats this is the
319 . distinction between USE_REL and USE_RELA (though the code checks
320 . for USE_REL == 1/0). The value of this field is TRUE if the
321 . addend is recorded with the section contents; when performing a
322 . partial link (ld -r) the section contents (the data) will be
323 . modified. The value of this field is FALSE if addends are
324 . recorded with the relocation (in arelent.addend); when performing
325 . a partial link the relocation will be modified.
326 . All relocations for all ELF USE_RELA targets should set this field
327 . to FALSE (values of TRUE should be looked on with suspicion).
328 . However, the converse is not true: not all relocations of all ELF
329 . USE_REL targets set this field to TRUE. Why this is so is peculiar
330 . to each particular target. For relocs that aren't used in partial
331 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
332 . unsigned int partial_inplace:1;
334 . {* When some formats create PC relative instructions, they leave
335 . the value of the pc of the place being relocated in the offset
336 . slot of the instruction, so that a PC relative relocation can
337 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
338 . Some formats leave the displacement part of an instruction
339 . empty (e.g., ELF); this flag signals the fact. *}
340 . unsigned int pcrel_offset:1;
342 . {* src_mask selects the part of the instruction (or data) to be used
343 . in the relocation sum. If the target relocations don't have an
344 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
345 . dst_mask to extract the addend from the section contents. If
346 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
347 . field should normally be zero. Non-zero values for ELF USE_RELA
348 . targets should be viewed with suspicion as normally the value in
349 . the dst_mask part of the section contents should be ignored. *}
352 . {* dst_mask selects which parts of the instruction (or data) are
353 . replaced with a relocated value. *}
356 . {* If this field is non null, then the supplied function is
357 . called rather than the normal function. This allows really
358 . strange relocation methods to be accommodated. *}
359 . bfd_reloc_status_type (*special_function)
360 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
363 . {* The textual name of the relocation type. *}
374 The HOWTO macro fills in a reloc_howto_type (a typedef for
375 const struct reloc_howto_struct).
377 .#define HOWTO(type, right, size, bits, pcrel, left, ovf, func, name, \
378 . inplace, src_mask, dst_mask, pcrel_off) \
379 . { (unsigned) type, size < 0 ? -size : size, bits, right, left, ovf, \
380 . size < 0, pcrel, inplace, pcrel_off, src_mask, dst_mask, func, name }
383 This is used to fill in an empty howto entry in an array.
385 .#define EMPTY_HOWTO(C) \
386 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
387 . NULL, FALSE, 0, 0, FALSE)
396 unsigned int bfd_get_reloc_size (reloc_howto_type *);
399 For a reloc_howto_type that operates on a fixed number of bytes,
400 this returns the number of bytes operated on.
404 bfd_get_reloc_size (reloc_howto_type
*howto
)
424 How relocs are tied together in an <<asection>>:
426 .typedef struct relent_chain
429 . struct relent_chain *next;
435 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
436 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
443 bfd_reloc_status_type bfd_check_overflow
444 (enum complain_overflow how,
445 unsigned int bitsize,
446 unsigned int rightshift,
447 unsigned int addrsize,
451 Perform overflow checking on @var{relocation} which has
452 @var{bitsize} significant bits and will be shifted right by
453 @var{rightshift} bits, on a machine with addresses containing
454 @var{addrsize} significant bits. The result is either of
455 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
459 bfd_reloc_status_type
460 bfd_check_overflow (enum complain_overflow how
,
461 unsigned int bitsize
,
462 unsigned int rightshift
,
463 unsigned int addrsize
,
466 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
467 bfd_reloc_status_type flag
= bfd_reloc_ok
;
469 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
470 we'll be permissive: extra bits in the field mask will
471 automatically extend the address mask for purposes of the
473 fieldmask
= N_ONES (bitsize
);
474 signmask
= ~fieldmask
;
475 addrmask
= N_ONES (addrsize
) | (fieldmask
<< rightshift
);
476 a
= (relocation
& addrmask
) >> rightshift
;
480 case complain_overflow_dont
:
483 case complain_overflow_signed
:
484 /* If any sign bits are set, all sign bits must be set. That
485 is, A must be a valid negative address after shifting. */
486 signmask
= ~ (fieldmask
>> 1);
489 case complain_overflow_bitfield
:
490 /* Bitfields are sometimes signed, sometimes unsigned. We
491 explicitly allow an address wrap too, which means a bitfield
492 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
493 if the value has some, but not all, bits set outside the
496 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
497 flag
= bfd_reloc_overflow
;
500 case complain_overflow_unsigned
:
501 /* We have an overflow if the address does not fit in the field. */
502 if ((a
& signmask
) != 0)
503 flag
= bfd_reloc_overflow
;
515 bfd_reloc_offset_in_range
518 bfd_boolean bfd_reloc_offset_in_range
519 (reloc_howto_type *howto,
522 bfd_size_type offset);
525 Returns TRUE if the reloc described by @var{HOWTO} can be
526 applied at @var{OFFSET} octets in @var{SECTION}.
530 /* HOWTO describes a relocation, at offset OCTET. Return whether the
531 relocation field is within SECTION of ABFD. */
534 bfd_reloc_offset_in_range (reloc_howto_type
*howto
,
539 bfd_size_type octet_end
= bfd_get_section_limit_octets (abfd
, section
);
540 bfd_size_type reloc_size
= bfd_get_reloc_size (howto
);
542 /* The reloc field must be contained entirely within the section.
543 Allow zero length fields (marker relocs or NONE relocs where no
544 relocation will be performed) at the end of the section. */
545 return octet
<= octet_end
&& octet
+ reloc_size
<= octet_end
;
548 /* Read and return the section contents at DATA converted to a host
549 integer (bfd_vma). The number of bytes read is given by the HOWTO. */
552 read_reloc (bfd
*abfd
, bfd_byte
*data
, reloc_howto_type
*howto
)
557 return bfd_get_8 (abfd
, data
);
560 return bfd_get_16 (abfd
, data
);
563 return bfd_get_32 (abfd
, data
);
570 return bfd_get_64 (abfd
, data
);
574 return bfd_get_24 (abfd
, data
);
582 /* Convert VAL to target format and write to DATA. The number of
583 bytes written is given by the HOWTO. */
586 write_reloc (bfd
*abfd
, bfd_vma val
, bfd_byte
*data
, reloc_howto_type
*howto
)
591 bfd_put_8 (abfd
, val
, data
);
595 bfd_put_16 (abfd
, val
, data
);
599 bfd_put_32 (abfd
, val
, data
);
607 bfd_put_64 (abfd
, val
, data
);
612 bfd_put_24 (abfd
, val
, data
);
620 /* Apply RELOCATION value to target bytes at DATA, according to
624 apply_reloc (bfd
*abfd
, bfd_byte
*data
, reloc_howto_type
*howto
,
627 bfd_vma val
= read_reloc (abfd
, data
, howto
);
630 relocation
= -relocation
;
632 val
= ((val
& ~howto
->dst_mask
)
633 | (((val
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
635 write_reloc (abfd
, val
, data
, howto
);
640 bfd_perform_relocation
643 bfd_reloc_status_type bfd_perform_relocation
645 arelent *reloc_entry,
647 asection *input_section,
649 char **error_message);
652 If @var{output_bfd} is supplied to this function, the
653 generated image will be relocatable; the relocations are
654 copied to the output file after they have been changed to
655 reflect the new state of the world. There are two ways of
656 reflecting the results of partial linkage in an output file:
657 by modifying the output data in place, and by modifying the
658 relocation record. Some native formats (e.g., basic a.out and
659 basic coff) have no way of specifying an addend in the
660 relocation type, so the addend has to go in the output data.
661 This is no big deal since in these formats the output data
662 slot will always be big enough for the addend. Complex reloc
663 types with addends were invented to solve just this problem.
664 The @var{error_message} argument is set to an error message if
665 this return @code{bfd_reloc_dangerous}.
669 bfd_reloc_status_type
670 bfd_perform_relocation (bfd
*abfd
,
671 arelent
*reloc_entry
,
673 asection
*input_section
,
675 char **error_message
)
678 bfd_reloc_status_type flag
= bfd_reloc_ok
;
679 bfd_size_type octets
;
680 bfd_vma output_base
= 0;
681 reloc_howto_type
*howto
= reloc_entry
->howto
;
682 asection
*reloc_target_output_section
;
685 symbol
= *(reloc_entry
->sym_ptr_ptr
);
687 /* If we are not producing relocatable output, return an error if
688 the symbol is not defined. An undefined weak symbol is
689 considered to have a value of zero (SVR4 ABI, p. 4-27). */
690 if (bfd_is_und_section (symbol
->section
)
691 && (symbol
->flags
& BSF_WEAK
) == 0
692 && output_bfd
== NULL
)
693 flag
= bfd_reloc_undefined
;
695 /* If there is a function supplied to handle this relocation type,
696 call it. It'll return `bfd_reloc_continue' if further processing
698 if (howto
&& howto
->special_function
)
700 bfd_reloc_status_type cont
;
702 /* Note - we do not call bfd_reloc_offset_in_range here as the
703 reloc_entry->address field might actually be valid for the
704 backend concerned. It is up to the special_function itself
705 to call bfd_reloc_offset_in_range if needed. */
706 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
707 input_section
, output_bfd
,
709 if (cont
!= bfd_reloc_continue
)
713 if (bfd_is_abs_section (symbol
->section
)
714 && output_bfd
!= NULL
)
716 reloc_entry
->address
+= input_section
->output_offset
;
720 /* PR 17512: file: 0f67f69d. */
722 return bfd_reloc_undefined
;
724 /* Is the address of the relocation really within the section? */
725 octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
726 if (!bfd_reloc_offset_in_range (howto
, abfd
, input_section
, octets
))
727 return bfd_reloc_outofrange
;
729 /* Work out which section the relocation is targeted at and the
730 initial relocation command value. */
732 /* Get symbol value. (Common symbols are special.) */
733 if (bfd_is_com_section (symbol
->section
))
736 relocation
= symbol
->value
;
738 reloc_target_output_section
= symbol
->section
->output_section
;
740 /* Convert input-section-relative symbol value to absolute. */
741 if ((output_bfd
&& ! howto
->partial_inplace
)
742 || reloc_target_output_section
== NULL
)
745 output_base
= reloc_target_output_section
->vma
;
747 relocation
+= output_base
+ symbol
->section
->output_offset
;
749 /* Add in supplied addend. */
750 relocation
+= reloc_entry
->addend
;
752 /* Here the variable relocation holds the final address of the
753 symbol we are relocating against, plus any addend. */
755 if (howto
->pc_relative
)
757 /* This is a PC relative relocation. We want to set RELOCATION
758 to the distance between the address of the symbol and the
759 location. RELOCATION is already the address of the symbol.
761 We start by subtracting the address of the section containing
764 If pcrel_offset is set, we must further subtract the position
765 of the location within the section. Some targets arrange for
766 the addend to be the negative of the position of the location
767 within the section; for example, i386-aout does this. For
768 i386-aout, pcrel_offset is FALSE. Some other targets do not
769 include the position of the location; for example, ELF.
770 For those targets, pcrel_offset is TRUE.
772 If we are producing relocatable output, then we must ensure
773 that this reloc will be correctly computed when the final
774 relocation is done. If pcrel_offset is FALSE we want to wind
775 up with the negative of the location within the section,
776 which means we must adjust the existing addend by the change
777 in the location within the section. If pcrel_offset is TRUE
778 we do not want to adjust the existing addend at all.
780 FIXME: This seems logical to me, but for the case of
781 producing relocatable output it is not what the code
782 actually does. I don't want to change it, because it seems
783 far too likely that something will break. */
786 input_section
->output_section
->vma
+ input_section
->output_offset
;
788 if (howto
->pcrel_offset
)
789 relocation
-= reloc_entry
->address
;
792 if (output_bfd
!= NULL
)
794 if (! howto
->partial_inplace
)
796 /* This is a partial relocation, and we want to apply the relocation
797 to the reloc entry rather than the raw data. Modify the reloc
798 inplace to reflect what we now know. */
799 reloc_entry
->addend
= relocation
;
800 reloc_entry
->address
+= input_section
->output_offset
;
805 /* This is a partial relocation, but inplace, so modify the
808 If we've relocated with a symbol with a section, change
809 into a ref to the section belonging to the symbol. */
811 reloc_entry
->address
+= input_section
->output_offset
;
814 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
815 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
816 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
818 /* For m68k-coff, the addend was being subtracted twice during
819 relocation with -r. Removing the line below this comment
820 fixes that problem; see PR 2953.
822 However, Ian wrote the following, regarding removing the line below,
823 which explains why it is still enabled: --djm
825 If you put a patch like that into BFD you need to check all the COFF
826 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
827 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
828 problem in a different way. There may very well be a reason that the
829 code works as it does.
831 Hmmm. The first obvious point is that bfd_perform_relocation should
832 not have any tests that depend upon the flavour. It's seem like
833 entirely the wrong place for such a thing. The second obvious point
834 is that the current code ignores the reloc addend when producing
835 relocatable output for COFF. That's peculiar. In fact, I really
836 have no idea what the point of the line you want to remove is.
838 A typical COFF reloc subtracts the old value of the symbol and adds in
839 the new value to the location in the object file (if it's a pc
840 relative reloc it adds the difference between the symbol value and the
841 location). When relocating we need to preserve that property.
843 BFD handles this by setting the addend to the negative of the old
844 value of the symbol. Unfortunately it handles common symbols in a
845 non-standard way (it doesn't subtract the old value) but that's a
846 different story (we can't change it without losing backward
847 compatibility with old object files) (coff-i386 does subtract the old
848 value, to be compatible with existing coff-i386 targets, like SCO).
850 So everything works fine when not producing relocatable output. When
851 we are producing relocatable output, logically we should do exactly
852 what we do when not producing relocatable output. Therefore, your
853 patch is correct. In fact, it should probably always just set
854 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
855 add the value into the object file. This won't hurt the COFF code,
856 which doesn't use the addend; I'm not sure what it will do to other
857 formats (the thing to check for would be whether any formats both use
858 the addend and set partial_inplace).
860 When I wanted to make coff-i386 produce relocatable output, I ran
861 into the problem that you are running into: I wanted to remove that
862 line. Rather than risk it, I made the coff-i386 relocs use a special
863 function; it's coff_i386_reloc in coff-i386.c. The function
864 specifically adds the addend field into the object file, knowing that
865 bfd_perform_relocation is not going to. If you remove that line, then
866 coff-i386.c will wind up adding the addend field in twice. It's
867 trivial to fix; it just needs to be done.
869 The problem with removing the line is just that it may break some
870 working code. With BFD it's hard to be sure of anything. The right
871 way to deal with this is simply to build and test at least all the
872 supported COFF targets. It should be straightforward if time and disk
873 space consuming. For each target:
875 2) generate some executable, and link it using -r (I would
876 probably use paranoia.o and link against newlib/libc.a, which
877 for all the supported targets would be available in
878 /usr/cygnus/progressive/H-host/target/lib/libc.a).
879 3) make the change to reloc.c
880 4) rebuild the linker
882 6) if the resulting object files are the same, you have at least
884 7) if they are different you have to figure out which version is
887 relocation
-= reloc_entry
->addend
;
888 reloc_entry
->addend
= 0;
892 reloc_entry
->addend
= relocation
;
897 /* FIXME: This overflow checking is incomplete, because the value
898 might have overflowed before we get here. For a correct check we
899 need to compute the value in a size larger than bitsize, but we
900 can't reasonably do that for a reloc the same size as a host
902 FIXME: We should also do overflow checking on the result after
903 adding in the value contained in the object file. */
904 if (howto
->complain_on_overflow
!= complain_overflow_dont
905 && flag
== bfd_reloc_ok
)
906 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
909 bfd_arch_bits_per_address (abfd
),
912 /* Either we are relocating all the way, or we don't want to apply
913 the relocation to the reloc entry (probably because there isn't
914 any room in the output format to describe addends to relocs). */
916 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
917 (OSF version 1.3, compiler version 3.11). It miscompiles the
931 x <<= (unsigned long) s.i0;
935 printf ("succeeded (%lx)\n", x);
939 relocation
>>= (bfd_vma
) howto
->rightshift
;
941 /* Shift everything up to where it's going to be used. */
942 relocation
<<= (bfd_vma
) howto
->bitpos
;
944 /* Wait for the day when all have the mask in them. */
947 i instruction to be left alone
948 o offset within instruction
949 r relocation offset to apply
958 (( i i i i i o o o o o from bfd_get<size>
959 and S S S S S) to get the size offset we want
960 + r r r r r r r r r r) to get the final value to place
961 and D D D D D to chop to right size
962 -----------------------
965 ( i i i i i o o o o o from bfd_get<size>
966 and N N N N N ) get instruction
967 -----------------------
973 -----------------------
974 = R R R R R R R R R R put into bfd_put<size>
977 data
= (bfd_byte
*) data
+ octets
;
978 apply_reloc (abfd
, data
, howto
, relocation
);
984 bfd_install_relocation
987 bfd_reloc_status_type bfd_install_relocation
989 arelent *reloc_entry,
990 void *data, bfd_vma data_start,
991 asection *input_section,
992 char **error_message);
995 This looks remarkably like <<bfd_perform_relocation>>, except it
996 does not expect that the section contents have been filled in.
997 I.e., it's suitable for use when creating, rather than applying
1000 For now, this function should be considered reserved for the
1004 bfd_reloc_status_type
1005 bfd_install_relocation (bfd
*abfd
,
1006 arelent
*reloc_entry
,
1008 bfd_vma data_start_offset
,
1009 asection
*input_section
,
1010 char **error_message
)
1013 bfd_reloc_status_type flag
= bfd_reloc_ok
;
1014 bfd_size_type octets
;
1015 bfd_vma output_base
= 0;
1016 reloc_howto_type
*howto
= reloc_entry
->howto
;
1017 asection
*reloc_target_output_section
;
1021 symbol
= *(reloc_entry
->sym_ptr_ptr
);
1023 /* If there is a function supplied to handle this relocation type,
1024 call it. It'll return `bfd_reloc_continue' if further processing
1026 if (howto
&& howto
->special_function
)
1028 bfd_reloc_status_type cont
;
1030 /* Note - we do not call bfd_reloc_offset_in_range here as the
1031 reloc_entry->address field might actually be valid for the
1032 backend concerned. It is up to the special_function itself
1033 to call bfd_reloc_offset_in_range if needed. */
1034 /* XXX - The special_function calls haven't been fixed up to deal
1035 with creating new relocations and section contents. */
1036 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
1037 /* XXX - Non-portable! */
1038 ((bfd_byte
*) data_start
1039 - data_start_offset
),
1040 input_section
, abfd
, error_message
);
1041 if (cont
!= bfd_reloc_continue
)
1045 if (bfd_is_abs_section (symbol
->section
))
1047 reloc_entry
->address
+= input_section
->output_offset
;
1048 return bfd_reloc_ok
;
1051 /* No need to check for howto != NULL if !bfd_is_abs_section as
1052 it will have been checked in `bfd_perform_relocation already'. */
1054 /* Is the address of the relocation really within the section? */
1055 octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
1056 if (!bfd_reloc_offset_in_range (howto
, abfd
, input_section
, octets
))
1057 return bfd_reloc_outofrange
;
1059 /* Work out which section the relocation is targeted at and the
1060 initial relocation command value. */
1062 /* Get symbol value. (Common symbols are special.) */
1063 if (bfd_is_com_section (symbol
->section
))
1066 relocation
= symbol
->value
;
1068 reloc_target_output_section
= symbol
->section
->output_section
;
1070 /* Convert input-section-relative symbol value to absolute. */
1071 if (! howto
->partial_inplace
)
1074 output_base
= reloc_target_output_section
->vma
;
1076 relocation
+= output_base
+ symbol
->section
->output_offset
;
1078 /* Add in supplied addend. */
1079 relocation
+= reloc_entry
->addend
;
1081 /* Here the variable relocation holds the final address of the
1082 symbol we are relocating against, plus any addend. */
1084 if (howto
->pc_relative
)
1086 /* This is a PC relative relocation. We want to set RELOCATION
1087 to the distance between the address of the symbol and the
1088 location. RELOCATION is already the address of the symbol.
1090 We start by subtracting the address of the section containing
1093 If pcrel_offset is set, we must further subtract the position
1094 of the location within the section. Some targets arrange for
1095 the addend to be the negative of the position of the location
1096 within the section; for example, i386-aout does this. For
1097 i386-aout, pcrel_offset is FALSE. Some other targets do not
1098 include the position of the location; for example, ELF.
1099 For those targets, pcrel_offset is TRUE.
1101 If we are producing relocatable output, then we must ensure
1102 that this reloc will be correctly computed when the final
1103 relocation is done. If pcrel_offset is FALSE we want to wind
1104 up with the negative of the location within the section,
1105 which means we must adjust the existing addend by the change
1106 in the location within the section. If pcrel_offset is TRUE
1107 we do not want to adjust the existing addend at all.
1109 FIXME: This seems logical to me, but for the case of
1110 producing relocatable output it is not what the code
1111 actually does. I don't want to change it, because it seems
1112 far too likely that something will break. */
1115 input_section
->output_section
->vma
+ input_section
->output_offset
;
1117 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1118 relocation
-= reloc_entry
->address
;
1121 if (! howto
->partial_inplace
)
1123 /* This is a partial relocation, and we want to apply the relocation
1124 to the reloc entry rather than the raw data. Modify the reloc
1125 inplace to reflect what we now know. */
1126 reloc_entry
->addend
= relocation
;
1127 reloc_entry
->address
+= input_section
->output_offset
;
1132 /* This is a partial relocation, but inplace, so modify the
1135 If we've relocated with a symbol with a section, change
1136 into a ref to the section belonging to the symbol. */
1137 reloc_entry
->address
+= input_section
->output_offset
;
1140 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1141 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1142 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1145 /* For m68k-coff, the addend was being subtracted twice during
1146 relocation with -r. Removing the line below this comment
1147 fixes that problem; see PR 2953.
1149 However, Ian wrote the following, regarding removing the line below,
1150 which explains why it is still enabled: --djm
1152 If you put a patch like that into BFD you need to check all the COFF
1153 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1154 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1155 problem in a different way. There may very well be a reason that the
1156 code works as it does.
1158 Hmmm. The first obvious point is that bfd_install_relocation should
1159 not have any tests that depend upon the flavour. It's seem like
1160 entirely the wrong place for such a thing. The second obvious point
1161 is that the current code ignores the reloc addend when producing
1162 relocatable output for COFF. That's peculiar. In fact, I really
1163 have no idea what the point of the line you want to remove is.
1165 A typical COFF reloc subtracts the old value of the symbol and adds in
1166 the new value to the location in the object file (if it's a pc
1167 relative reloc it adds the difference between the symbol value and the
1168 location). When relocating we need to preserve that property.
1170 BFD handles this by setting the addend to the negative of the old
1171 value of the symbol. Unfortunately it handles common symbols in a
1172 non-standard way (it doesn't subtract the old value) but that's a
1173 different story (we can't change it without losing backward
1174 compatibility with old object files) (coff-i386 does subtract the old
1175 value, to be compatible with existing coff-i386 targets, like SCO).
1177 So everything works fine when not producing relocatable output. When
1178 we are producing relocatable output, logically we should do exactly
1179 what we do when not producing relocatable output. Therefore, your
1180 patch is correct. In fact, it should probably always just set
1181 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1182 add the value into the object file. This won't hurt the COFF code,
1183 which doesn't use the addend; I'm not sure what it will do to other
1184 formats (the thing to check for would be whether any formats both use
1185 the addend and set partial_inplace).
1187 When I wanted to make coff-i386 produce relocatable output, I ran
1188 into the problem that you are running into: I wanted to remove that
1189 line. Rather than risk it, I made the coff-i386 relocs use a special
1190 function; it's coff_i386_reloc in coff-i386.c. The function
1191 specifically adds the addend field into the object file, knowing that
1192 bfd_install_relocation is not going to. If you remove that line, then
1193 coff-i386.c will wind up adding the addend field in twice. It's
1194 trivial to fix; it just needs to be done.
1196 The problem with removing the line is just that it may break some
1197 working code. With BFD it's hard to be sure of anything. The right
1198 way to deal with this is simply to build and test at least all the
1199 supported COFF targets. It should be straightforward if time and disk
1200 space consuming. For each target:
1202 2) generate some executable, and link it using -r (I would
1203 probably use paranoia.o and link against newlib/libc.a, which
1204 for all the supported targets would be available in
1205 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1206 3) make the change to reloc.c
1207 4) rebuild the linker
1209 6) if the resulting object files are the same, you have at least
1211 7) if they are different you have to figure out which version is
1213 relocation
-= reloc_entry
->addend
;
1214 /* FIXME: There should be no target specific code here... */
1215 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1216 reloc_entry
->addend
= 0;
1220 reloc_entry
->addend
= relocation
;
1224 /* FIXME: This overflow checking is incomplete, because the value
1225 might have overflowed before we get here. For a correct check we
1226 need to compute the value in a size larger than bitsize, but we
1227 can't reasonably do that for a reloc the same size as a host
1229 FIXME: We should also do overflow checking on the result after
1230 adding in the value contained in the object file. */
1231 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1232 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1235 bfd_arch_bits_per_address (abfd
),
1238 /* Either we are relocating all the way, or we don't want to apply
1239 the relocation to the reloc entry (probably because there isn't
1240 any room in the output format to describe addends to relocs). */
1242 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1243 (OSF version 1.3, compiler version 3.11). It miscompiles the
1257 x <<= (unsigned long) s.i0;
1259 printf ("failed\n");
1261 printf ("succeeded (%lx)\n", x);
1265 relocation
>>= (bfd_vma
) howto
->rightshift
;
1267 /* Shift everything up to where it's going to be used. */
1268 relocation
<<= (bfd_vma
) howto
->bitpos
;
1270 /* Wait for the day when all have the mask in them. */
1273 i instruction to be left alone
1274 o offset within instruction
1275 r relocation offset to apply
1284 (( i i i i i o o o o o from bfd_get<size>
1285 and S S S S S) to get the size offset we want
1286 + r r r r r r r r r r) to get the final value to place
1287 and D D D D D to chop to right size
1288 -----------------------
1291 ( i i i i i o o o o o from bfd_get<size>
1292 and N N N N N ) get instruction
1293 -----------------------
1299 -----------------------
1300 = R R R R R R R R R R put into bfd_put<size>
1303 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1304 apply_reloc (abfd
, data
, howto
, relocation
);
1308 /* This relocation routine is used by some of the backend linkers.
1309 They do not construct asymbol or arelent structures, so there is no
1310 reason for them to use bfd_perform_relocation. Also,
1311 bfd_perform_relocation is so hacked up it is easier to write a new
1312 function than to try to deal with it.
1314 This routine does a final relocation. Whether it is useful for a
1315 relocatable link depends upon how the object format defines
1318 FIXME: This routine ignores any special_function in the HOWTO,
1319 since the existing special_function values have been written for
1320 bfd_perform_relocation.
1322 HOWTO is the reloc howto information.
1323 INPUT_BFD is the BFD which the reloc applies to.
1324 INPUT_SECTION is the section which the reloc applies to.
1325 CONTENTS is the contents of the section.
1326 ADDRESS is the address of the reloc within INPUT_SECTION.
1327 VALUE is the value of the symbol the reloc refers to.
1328 ADDEND is the addend of the reloc. */
1330 bfd_reloc_status_type
1331 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1333 asection
*input_section
,
1340 bfd_size_type octets
= address
* bfd_octets_per_byte (input_bfd
);
1342 /* Sanity check the address. */
1343 if (!bfd_reloc_offset_in_range (howto
, input_bfd
, input_section
, octets
))
1344 return bfd_reloc_outofrange
;
1346 /* This function assumes that we are dealing with a basic relocation
1347 against a symbol. We want to compute the value of the symbol to
1348 relocate to. This is just VALUE, the value of the symbol, plus
1349 ADDEND, any addend associated with the reloc. */
1350 relocation
= value
+ addend
;
1352 /* If the relocation is PC relative, we want to set RELOCATION to
1353 the distance between the symbol (currently in RELOCATION) and the
1354 location we are relocating. Some targets (e.g., i386-aout)
1355 arrange for the contents of the section to be the negative of the
1356 offset of the location within the section; for such targets
1357 pcrel_offset is FALSE. Other targets (e.g., ELF) simply leave
1358 the contents of the section as zero; for such targets
1359 pcrel_offset is TRUE. If pcrel_offset is FALSE we do not need to
1360 subtract out the offset of the location within the section (which
1361 is just ADDRESS). */
1362 if (howto
->pc_relative
)
1364 relocation
-= (input_section
->output_section
->vma
1365 + input_section
->output_offset
);
1366 if (howto
->pcrel_offset
)
1367 relocation
-= address
;
1370 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1372 + address
* bfd_octets_per_byte (input_bfd
));
1375 /* Relocate a given location using a given value and howto. */
1377 bfd_reloc_status_type
1378 _bfd_relocate_contents (reloc_howto_type
*howto
,
1384 bfd_reloc_status_type flag
;
1385 unsigned int rightshift
= howto
->rightshift
;
1386 unsigned int bitpos
= howto
->bitpos
;
1389 relocation
= -relocation
;
1391 /* Get the value we are going to relocate. */
1392 x
= read_reloc (input_bfd
, location
, howto
);
1394 /* Check for overflow. FIXME: We may drop bits during the addition
1395 which we don't check for. We must either check at every single
1396 operation, which would be tedious, or we must do the computations
1397 in a type larger than bfd_vma, which would be inefficient. */
1398 flag
= bfd_reloc_ok
;
1399 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1401 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1404 /* Get the values to be added together. For signed and unsigned
1405 relocations, we assume that all values should be truncated to
1406 the size of an address. For bitfields, all the bits matter.
1407 See also bfd_check_overflow. */
1408 fieldmask
= N_ONES (howto
->bitsize
);
1409 signmask
= ~fieldmask
;
1410 addrmask
= (N_ONES (bfd_arch_bits_per_address (input_bfd
))
1411 | (fieldmask
<< rightshift
));
1412 a
= (relocation
& addrmask
) >> rightshift
;
1413 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1414 addrmask
>>= rightshift
;
1416 switch (howto
->complain_on_overflow
)
1418 case complain_overflow_signed
:
1419 /* If any sign bits are set, all sign bits must be set.
1420 That is, A must be a valid negative address after
1422 signmask
= ~(fieldmask
>> 1);
1425 case complain_overflow_bitfield
:
1426 /* Much like the signed check, but for a field one bit
1427 wider. We allow a bitfield to represent numbers in the
1428 range -2**n to 2**n-1, where n is the number of bits in the
1429 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1430 can't overflow, which is exactly what we want. */
1432 if (ss
!= 0 && ss
!= (addrmask
& signmask
))
1433 flag
= bfd_reloc_overflow
;
1435 /* We only need this next bit of code if the sign bit of B
1436 is below the sign bit of A. This would only happen if
1437 SRC_MASK had fewer bits than BITSIZE. Note that if
1438 SRC_MASK has more bits than BITSIZE, we can get into
1439 trouble; we would need to verify that B is in range, as
1440 we do for A above. */
1441 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1444 /* Set all the bits above the sign bit. */
1447 /* Now we can do the addition. */
1450 /* See if the result has the correct sign. Bits above the
1451 sign bit are junk now; ignore them. If the sum is
1452 positive, make sure we did not have all negative inputs;
1453 if the sum is negative, make sure we did not have all
1454 positive inputs. The test below looks only at the sign
1455 bits, and it really just
1456 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1458 We mask with addrmask here to explicitly allow an address
1459 wrap-around. The Linux kernel relies on it, and it is
1460 the only way to write assembler code which can run when
1461 loaded at a location 0x80000000 away from the location at
1462 which it is linked. */
1463 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1464 flag
= bfd_reloc_overflow
;
1467 case complain_overflow_unsigned
:
1468 /* Checking for an unsigned overflow is relatively easy:
1469 trim the addresses and add, and trim the result as well.
1470 Overflow is normally indicated when the result does not
1471 fit in the field. However, we also need to consider the
1472 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1473 input is 0x80000000, and bfd_vma is only 32 bits; then we
1474 will get sum == 0, but there is an overflow, since the
1475 inputs did not fit in the field. Instead of doing a
1476 separate test, we can check for this by or-ing in the
1477 operands when testing for the sum overflowing its final
1479 sum
= (a
+ b
) & addrmask
;
1480 if ((a
| b
| sum
) & signmask
)
1481 flag
= bfd_reloc_overflow
;
1489 /* Put RELOCATION in the right bits. */
1490 relocation
>>= (bfd_vma
) rightshift
;
1491 relocation
<<= (bfd_vma
) bitpos
;
1493 /* Add RELOCATION to the right bits of X. */
1494 x
= ((x
& ~howto
->dst_mask
)
1495 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1497 /* Put the relocated value back in the object file. */
1498 write_reloc (input_bfd
, x
, location
, howto
);
1502 /* Clear a given location using a given howto, by applying a fixed relocation
1503 value and discarding any in-place addend. This is used for fixed-up
1504 relocations against discarded symbols, to make ignorable debug or unwind
1505 information more obvious. */
1507 bfd_reloc_status_type
1508 _bfd_clear_contents (reloc_howto_type
*howto
,
1510 asection
*input_section
,
1517 if (!bfd_reloc_offset_in_range (howto
, input_bfd
, input_section
, off
))
1518 return bfd_reloc_outofrange
;
1520 /* Get the value we are going to relocate. */
1521 location
= buf
+ off
;
1522 x
= read_reloc (input_bfd
, location
, howto
);
1524 /* Zero out the unwanted bits of X. */
1525 x
&= ~howto
->dst_mask
;
1527 /* For a range list, use 1 instead of 0 as placeholder. 0
1528 would terminate the list, hiding any later entries. */
1529 if (strcmp (bfd_get_section_name (input_bfd
, input_section
),
1530 ".debug_ranges") == 0
1531 && (howto
->dst_mask
& 1) != 0)
1534 /* Put the relocated value back in the object file. */
1535 write_reloc (input_bfd
, x
, location
, howto
);
1536 return bfd_reloc_ok
;
1542 howto manager, , typedef arelent, Relocations
1547 When an application wants to create a relocation, but doesn't
1548 know what the target machine might call it, it can find out by
1549 using this bit of code.
1558 The insides of a reloc code. The idea is that, eventually, there
1559 will be one enumerator for every type of relocation we ever do.
1560 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1561 return a howto pointer.
1563 This does mean that the application must determine the correct
1564 enumerator value; you can't get a howto pointer from a random set
1585 Basic absolute relocations of N bits.
1600 PC-relative relocations. Sometimes these are relative to the address
1601 of the relocation itself; sometimes they are relative to the start of
1602 the section containing the relocation. It depends on the specific target.
1607 Section relative relocations. Some targets need this for DWARF2.
1610 BFD_RELOC_32_GOT_PCREL
1612 BFD_RELOC_16_GOT_PCREL
1614 BFD_RELOC_8_GOT_PCREL
1620 BFD_RELOC_LO16_GOTOFF
1622 BFD_RELOC_HI16_GOTOFF
1624 BFD_RELOC_HI16_S_GOTOFF
1628 BFD_RELOC_64_PLT_PCREL
1630 BFD_RELOC_32_PLT_PCREL
1632 BFD_RELOC_24_PLT_PCREL
1634 BFD_RELOC_16_PLT_PCREL
1636 BFD_RELOC_8_PLT_PCREL
1644 BFD_RELOC_LO16_PLTOFF
1646 BFD_RELOC_HI16_PLTOFF
1648 BFD_RELOC_HI16_S_PLTOFF
1662 BFD_RELOC_68K_GLOB_DAT
1664 BFD_RELOC_68K_JMP_SLOT
1666 BFD_RELOC_68K_RELATIVE
1668 BFD_RELOC_68K_TLS_GD32
1670 BFD_RELOC_68K_TLS_GD16
1672 BFD_RELOC_68K_TLS_GD8
1674 BFD_RELOC_68K_TLS_LDM32
1676 BFD_RELOC_68K_TLS_LDM16
1678 BFD_RELOC_68K_TLS_LDM8
1680 BFD_RELOC_68K_TLS_LDO32
1682 BFD_RELOC_68K_TLS_LDO16
1684 BFD_RELOC_68K_TLS_LDO8
1686 BFD_RELOC_68K_TLS_IE32
1688 BFD_RELOC_68K_TLS_IE16
1690 BFD_RELOC_68K_TLS_IE8
1692 BFD_RELOC_68K_TLS_LE32
1694 BFD_RELOC_68K_TLS_LE16
1696 BFD_RELOC_68K_TLS_LE8
1698 Relocations used by 68K ELF.
1701 BFD_RELOC_32_BASEREL
1703 BFD_RELOC_16_BASEREL
1705 BFD_RELOC_LO16_BASEREL
1707 BFD_RELOC_HI16_BASEREL
1709 BFD_RELOC_HI16_S_BASEREL
1715 Linkage-table relative.
1720 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1723 BFD_RELOC_32_PCREL_S2
1725 BFD_RELOC_16_PCREL_S2
1727 BFD_RELOC_23_PCREL_S2
1729 These PC-relative relocations are stored as word displacements --
1730 i.e., byte displacements shifted right two bits. The 30-bit word
1731 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1732 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1733 signed 16-bit displacement is used on the MIPS, and the 23-bit
1734 displacement is used on the Alpha.
1741 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1742 the target word. These are used on the SPARC.
1749 For systems that allocate a Global Pointer register, these are
1750 displacements off that register. These relocation types are
1751 handled specially, because the value the register will have is
1752 decided relatively late.
1757 BFD_RELOC_SPARC_WDISP22
1763 BFD_RELOC_SPARC_GOT10
1765 BFD_RELOC_SPARC_GOT13
1767 BFD_RELOC_SPARC_GOT22
1769 BFD_RELOC_SPARC_PC10
1771 BFD_RELOC_SPARC_PC22
1773 BFD_RELOC_SPARC_WPLT30
1775 BFD_RELOC_SPARC_COPY
1777 BFD_RELOC_SPARC_GLOB_DAT
1779 BFD_RELOC_SPARC_JMP_SLOT
1781 BFD_RELOC_SPARC_RELATIVE
1783 BFD_RELOC_SPARC_UA16
1785 BFD_RELOC_SPARC_UA32
1787 BFD_RELOC_SPARC_UA64
1789 BFD_RELOC_SPARC_GOTDATA_HIX22
1791 BFD_RELOC_SPARC_GOTDATA_LOX10
1793 BFD_RELOC_SPARC_GOTDATA_OP_HIX22
1795 BFD_RELOC_SPARC_GOTDATA_OP_LOX10
1797 BFD_RELOC_SPARC_GOTDATA_OP
1799 BFD_RELOC_SPARC_JMP_IREL
1801 BFD_RELOC_SPARC_IRELATIVE
1803 SPARC ELF relocations. There is probably some overlap with other
1804 relocation types already defined.
1807 BFD_RELOC_SPARC_BASE13
1809 BFD_RELOC_SPARC_BASE22
1811 I think these are specific to SPARC a.out (e.g., Sun 4).
1821 BFD_RELOC_SPARC_OLO10
1823 BFD_RELOC_SPARC_HH22
1825 BFD_RELOC_SPARC_HM10
1827 BFD_RELOC_SPARC_LM22
1829 BFD_RELOC_SPARC_PC_HH22
1831 BFD_RELOC_SPARC_PC_HM10
1833 BFD_RELOC_SPARC_PC_LM22
1835 BFD_RELOC_SPARC_WDISP16
1837 BFD_RELOC_SPARC_WDISP19
1845 BFD_RELOC_SPARC_DISP64
1848 BFD_RELOC_SPARC_PLT32
1850 BFD_RELOC_SPARC_PLT64
1852 BFD_RELOC_SPARC_HIX22
1854 BFD_RELOC_SPARC_LOX10
1862 BFD_RELOC_SPARC_REGISTER
1866 BFD_RELOC_SPARC_SIZE32
1868 BFD_RELOC_SPARC_SIZE64
1870 BFD_RELOC_SPARC_WDISP10
1875 BFD_RELOC_SPARC_REV32
1877 SPARC little endian relocation
1879 BFD_RELOC_SPARC_TLS_GD_HI22
1881 BFD_RELOC_SPARC_TLS_GD_LO10
1883 BFD_RELOC_SPARC_TLS_GD_ADD
1885 BFD_RELOC_SPARC_TLS_GD_CALL
1887 BFD_RELOC_SPARC_TLS_LDM_HI22
1889 BFD_RELOC_SPARC_TLS_LDM_LO10
1891 BFD_RELOC_SPARC_TLS_LDM_ADD
1893 BFD_RELOC_SPARC_TLS_LDM_CALL
1895 BFD_RELOC_SPARC_TLS_LDO_HIX22
1897 BFD_RELOC_SPARC_TLS_LDO_LOX10
1899 BFD_RELOC_SPARC_TLS_LDO_ADD
1901 BFD_RELOC_SPARC_TLS_IE_HI22
1903 BFD_RELOC_SPARC_TLS_IE_LO10
1905 BFD_RELOC_SPARC_TLS_IE_LD
1907 BFD_RELOC_SPARC_TLS_IE_LDX
1909 BFD_RELOC_SPARC_TLS_IE_ADD
1911 BFD_RELOC_SPARC_TLS_LE_HIX22
1913 BFD_RELOC_SPARC_TLS_LE_LOX10
1915 BFD_RELOC_SPARC_TLS_DTPMOD32
1917 BFD_RELOC_SPARC_TLS_DTPMOD64
1919 BFD_RELOC_SPARC_TLS_DTPOFF32
1921 BFD_RELOC_SPARC_TLS_DTPOFF64
1923 BFD_RELOC_SPARC_TLS_TPOFF32
1925 BFD_RELOC_SPARC_TLS_TPOFF64
1927 SPARC TLS relocations
1936 BFD_RELOC_SPU_IMM10W
1940 BFD_RELOC_SPU_IMM16W
1944 BFD_RELOC_SPU_PCREL9a
1946 BFD_RELOC_SPU_PCREL9b
1948 BFD_RELOC_SPU_PCREL16
1958 BFD_RELOC_SPU_ADD_PIC
1963 BFD_RELOC_ALPHA_GPDISP_HI16
1965 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1966 "addend" in some special way.
1967 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1968 writing; when reading, it will be the absolute section symbol. The
1969 addend is the displacement in bytes of the "lda" instruction from
1970 the "ldah" instruction (which is at the address of this reloc).
1972 BFD_RELOC_ALPHA_GPDISP_LO16
1974 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1975 with GPDISP_HI16 relocs. The addend is ignored when writing the
1976 relocations out, and is filled in with the file's GP value on
1977 reading, for convenience.
1980 BFD_RELOC_ALPHA_GPDISP
1982 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1983 relocation except that there is no accompanying GPDISP_LO16
1987 BFD_RELOC_ALPHA_LITERAL
1989 BFD_RELOC_ALPHA_ELF_LITERAL
1991 BFD_RELOC_ALPHA_LITUSE
1993 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1994 the assembler turns it into a LDQ instruction to load the address of
1995 the symbol, and then fills in a register in the real instruction.
1997 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1998 section symbol. The addend is ignored when writing, but is filled
1999 in with the file's GP value on reading, for convenience, as with the
2002 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
2003 It should refer to the symbol to be referenced, as with 16_GOTOFF,
2004 but it generates output not based on the position within the .got
2005 section, but relative to the GP value chosen for the file during the
2008 The LITUSE reloc, on the instruction using the loaded address, gives
2009 information to the linker that it might be able to use to optimize
2010 away some literal section references. The symbol is ignored (read
2011 as the absolute section symbol), and the "addend" indicates the type
2012 of instruction using the register:
2013 1 - "memory" fmt insn
2014 2 - byte-manipulation (byte offset reg)
2015 3 - jsr (target of branch)
2018 BFD_RELOC_ALPHA_HINT
2020 The HINT relocation indicates a value that should be filled into the
2021 "hint" field of a jmp/jsr/ret instruction, for possible branch-
2022 prediction logic which may be provided on some processors.
2025 BFD_RELOC_ALPHA_LINKAGE
2027 The LINKAGE relocation outputs a linkage pair in the object file,
2028 which is filled by the linker.
2031 BFD_RELOC_ALPHA_CODEADDR
2033 The CODEADDR relocation outputs a STO_CA in the object file,
2034 which is filled by the linker.
2037 BFD_RELOC_ALPHA_GPREL_HI16
2039 BFD_RELOC_ALPHA_GPREL_LO16
2041 The GPREL_HI/LO relocations together form a 32-bit offset from the
2045 BFD_RELOC_ALPHA_BRSGP
2047 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2048 share a common GP, and the target address is adjusted for
2049 STO_ALPHA_STD_GPLOAD.
2054 The NOP relocation outputs a NOP if the longword displacement
2055 between two procedure entry points is < 2^21.
2060 The BSR relocation outputs a BSR if the longword displacement
2061 between two procedure entry points is < 2^21.
2066 The LDA relocation outputs a LDA if the longword displacement
2067 between two procedure entry points is < 2^16.
2072 The BOH relocation outputs a BSR if the longword displacement
2073 between two procedure entry points is < 2^21, or else a hint.
2076 BFD_RELOC_ALPHA_TLSGD
2078 BFD_RELOC_ALPHA_TLSLDM
2080 BFD_RELOC_ALPHA_DTPMOD64
2082 BFD_RELOC_ALPHA_GOTDTPREL16
2084 BFD_RELOC_ALPHA_DTPREL64
2086 BFD_RELOC_ALPHA_DTPREL_HI16
2088 BFD_RELOC_ALPHA_DTPREL_LO16
2090 BFD_RELOC_ALPHA_DTPREL16
2092 BFD_RELOC_ALPHA_GOTTPREL16
2094 BFD_RELOC_ALPHA_TPREL64
2096 BFD_RELOC_ALPHA_TPREL_HI16
2098 BFD_RELOC_ALPHA_TPREL_LO16
2100 BFD_RELOC_ALPHA_TPREL16
2102 Alpha thread-local storage relocations.
2107 BFD_RELOC_MICROMIPS_JMP
2109 The MIPS jump instruction.
2112 BFD_RELOC_MIPS16_JMP
2114 The MIPS16 jump instruction.
2117 BFD_RELOC_MIPS16_GPREL
2119 MIPS16 GP relative reloc.
2124 High 16 bits of 32-bit value; simple reloc.
2129 High 16 bits of 32-bit value but the low 16 bits will be sign
2130 extended and added to form the final result. If the low 16
2131 bits form a negative number, we need to add one to the high value
2132 to compensate for the borrow when the low bits are added.
2140 BFD_RELOC_HI16_PCREL
2142 High 16 bits of 32-bit pc-relative value
2144 BFD_RELOC_HI16_S_PCREL
2146 High 16 bits of 32-bit pc-relative value, adjusted
2148 BFD_RELOC_LO16_PCREL
2150 Low 16 bits of pc-relative value
2153 BFD_RELOC_MIPS16_GOT16
2155 BFD_RELOC_MIPS16_CALL16
2157 Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
2158 16-bit immediate fields
2160 BFD_RELOC_MIPS16_HI16
2162 MIPS16 high 16 bits of 32-bit value.
2164 BFD_RELOC_MIPS16_HI16_S
2166 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2167 extended and added to form the final result. If the low 16
2168 bits form a negative number, we need to add one to the high value
2169 to compensate for the borrow when the low bits are added.
2171 BFD_RELOC_MIPS16_LO16
2176 BFD_RELOC_MIPS16_TLS_GD
2178 BFD_RELOC_MIPS16_TLS_LDM
2180 BFD_RELOC_MIPS16_TLS_DTPREL_HI16
2182 BFD_RELOC_MIPS16_TLS_DTPREL_LO16
2184 BFD_RELOC_MIPS16_TLS_GOTTPREL
2186 BFD_RELOC_MIPS16_TLS_TPREL_HI16
2188 BFD_RELOC_MIPS16_TLS_TPREL_LO16
2190 MIPS16 TLS relocations
2193 BFD_RELOC_MIPS_LITERAL
2195 BFD_RELOC_MICROMIPS_LITERAL
2197 Relocation against a MIPS literal section.
2200 BFD_RELOC_MICROMIPS_7_PCREL_S1
2202 BFD_RELOC_MICROMIPS_10_PCREL_S1
2204 BFD_RELOC_MICROMIPS_16_PCREL_S1
2206 microMIPS PC-relative relocations.
2209 BFD_RELOC_MIPS16_16_PCREL_S1
2211 MIPS16 PC-relative relocation.
2214 BFD_RELOC_MIPS_21_PCREL_S2
2216 BFD_RELOC_MIPS_26_PCREL_S2
2218 BFD_RELOC_MIPS_18_PCREL_S3
2220 BFD_RELOC_MIPS_19_PCREL_S2
2222 MIPS PC-relative relocations.
2225 BFD_RELOC_MICROMIPS_GPREL16
2227 BFD_RELOC_MICROMIPS_HI16
2229 BFD_RELOC_MICROMIPS_HI16_S
2231 BFD_RELOC_MICROMIPS_LO16
2233 microMIPS versions of generic BFD relocs.
2236 BFD_RELOC_MIPS_GOT16
2238 BFD_RELOC_MICROMIPS_GOT16
2240 BFD_RELOC_MIPS_CALL16
2242 BFD_RELOC_MICROMIPS_CALL16
2244 BFD_RELOC_MIPS_GOT_HI16
2246 BFD_RELOC_MICROMIPS_GOT_HI16
2248 BFD_RELOC_MIPS_GOT_LO16
2250 BFD_RELOC_MICROMIPS_GOT_LO16
2252 BFD_RELOC_MIPS_CALL_HI16
2254 BFD_RELOC_MICROMIPS_CALL_HI16
2256 BFD_RELOC_MIPS_CALL_LO16
2258 BFD_RELOC_MICROMIPS_CALL_LO16
2262 BFD_RELOC_MICROMIPS_SUB
2264 BFD_RELOC_MIPS_GOT_PAGE
2266 BFD_RELOC_MICROMIPS_GOT_PAGE
2268 BFD_RELOC_MIPS_GOT_OFST
2270 BFD_RELOC_MICROMIPS_GOT_OFST
2272 BFD_RELOC_MIPS_GOT_DISP
2274 BFD_RELOC_MICROMIPS_GOT_DISP
2276 BFD_RELOC_MIPS_SHIFT5
2278 BFD_RELOC_MIPS_SHIFT6
2280 BFD_RELOC_MIPS_INSERT_A
2282 BFD_RELOC_MIPS_INSERT_B
2284 BFD_RELOC_MIPS_DELETE
2286 BFD_RELOC_MIPS_HIGHEST
2288 BFD_RELOC_MICROMIPS_HIGHEST
2290 BFD_RELOC_MIPS_HIGHER
2292 BFD_RELOC_MICROMIPS_HIGHER
2294 BFD_RELOC_MIPS_SCN_DISP
2296 BFD_RELOC_MICROMIPS_SCN_DISP
2298 BFD_RELOC_MIPS_REL16
2300 BFD_RELOC_MIPS_RELGOT
2304 BFD_RELOC_MICROMIPS_JALR
2306 BFD_RELOC_MIPS_TLS_DTPMOD32
2308 BFD_RELOC_MIPS_TLS_DTPREL32
2310 BFD_RELOC_MIPS_TLS_DTPMOD64
2312 BFD_RELOC_MIPS_TLS_DTPREL64
2314 BFD_RELOC_MIPS_TLS_GD
2316 BFD_RELOC_MICROMIPS_TLS_GD
2318 BFD_RELOC_MIPS_TLS_LDM
2320 BFD_RELOC_MICROMIPS_TLS_LDM
2322 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2324 BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16
2326 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2328 BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16
2330 BFD_RELOC_MIPS_TLS_GOTTPREL
2332 BFD_RELOC_MICROMIPS_TLS_GOTTPREL
2334 BFD_RELOC_MIPS_TLS_TPREL32
2336 BFD_RELOC_MIPS_TLS_TPREL64
2338 BFD_RELOC_MIPS_TLS_TPREL_HI16
2340 BFD_RELOC_MICROMIPS_TLS_TPREL_HI16
2342 BFD_RELOC_MIPS_TLS_TPREL_LO16
2344 BFD_RELOC_MICROMIPS_TLS_TPREL_LO16
2348 MIPS ELF relocations.
2354 BFD_RELOC_MIPS_JUMP_SLOT
2356 MIPS ELF relocations (VxWorks and PLT extensions).
2360 BFD_RELOC_MOXIE_10_PCREL
2362 Moxie ELF relocations.
2374 BFD_RELOC_FT32_RELAX
2382 BFD_RELOC_FT32_DIFF32
2384 FT32 ELF relocations.
2388 BFD_RELOC_FRV_LABEL16
2390 BFD_RELOC_FRV_LABEL24
2396 BFD_RELOC_FRV_GPREL12
2398 BFD_RELOC_FRV_GPRELU12
2400 BFD_RELOC_FRV_GPREL32
2402 BFD_RELOC_FRV_GPRELHI
2404 BFD_RELOC_FRV_GPRELLO
2412 BFD_RELOC_FRV_FUNCDESC
2414 BFD_RELOC_FRV_FUNCDESC_GOT12
2416 BFD_RELOC_FRV_FUNCDESC_GOTHI
2418 BFD_RELOC_FRV_FUNCDESC_GOTLO
2420 BFD_RELOC_FRV_FUNCDESC_VALUE
2422 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2424 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2426 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2428 BFD_RELOC_FRV_GOTOFF12
2430 BFD_RELOC_FRV_GOTOFFHI
2432 BFD_RELOC_FRV_GOTOFFLO
2434 BFD_RELOC_FRV_GETTLSOFF
2436 BFD_RELOC_FRV_TLSDESC_VALUE
2438 BFD_RELOC_FRV_GOTTLSDESC12
2440 BFD_RELOC_FRV_GOTTLSDESCHI
2442 BFD_RELOC_FRV_GOTTLSDESCLO
2444 BFD_RELOC_FRV_TLSMOFF12
2446 BFD_RELOC_FRV_TLSMOFFHI
2448 BFD_RELOC_FRV_TLSMOFFLO
2450 BFD_RELOC_FRV_GOTTLSOFF12
2452 BFD_RELOC_FRV_GOTTLSOFFHI
2454 BFD_RELOC_FRV_GOTTLSOFFLO
2456 BFD_RELOC_FRV_TLSOFF
2458 BFD_RELOC_FRV_TLSDESC_RELAX
2460 BFD_RELOC_FRV_GETTLSOFF_RELAX
2462 BFD_RELOC_FRV_TLSOFF_RELAX
2464 BFD_RELOC_FRV_TLSMOFF
2466 Fujitsu Frv Relocations.
2470 BFD_RELOC_MN10300_GOTOFF24
2472 This is a 24bit GOT-relative reloc for the mn10300.
2474 BFD_RELOC_MN10300_GOT32
2476 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2479 BFD_RELOC_MN10300_GOT24
2481 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2484 BFD_RELOC_MN10300_GOT16
2486 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2489 BFD_RELOC_MN10300_COPY
2491 Copy symbol at runtime.
2493 BFD_RELOC_MN10300_GLOB_DAT
2497 BFD_RELOC_MN10300_JMP_SLOT
2501 BFD_RELOC_MN10300_RELATIVE
2503 Adjust by program base.
2505 BFD_RELOC_MN10300_SYM_DIFF
2507 Together with another reloc targeted at the same location,
2508 allows for a value that is the difference of two symbols
2509 in the same section.
2511 BFD_RELOC_MN10300_ALIGN
2513 The addend of this reloc is an alignment power that must
2514 be honoured at the offset's location, regardless of linker
2517 BFD_RELOC_MN10300_TLS_GD
2519 BFD_RELOC_MN10300_TLS_LD
2521 BFD_RELOC_MN10300_TLS_LDO
2523 BFD_RELOC_MN10300_TLS_GOTIE
2525 BFD_RELOC_MN10300_TLS_IE
2527 BFD_RELOC_MN10300_TLS_LE
2529 BFD_RELOC_MN10300_TLS_DTPMOD
2531 BFD_RELOC_MN10300_TLS_DTPOFF
2533 BFD_RELOC_MN10300_TLS_TPOFF
2535 Various TLS-related relocations.
2537 BFD_RELOC_MN10300_32_PCREL
2539 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
2542 BFD_RELOC_MN10300_16_PCREL
2544 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
2555 BFD_RELOC_386_GLOB_DAT
2557 BFD_RELOC_386_JUMP_SLOT
2559 BFD_RELOC_386_RELATIVE
2561 BFD_RELOC_386_GOTOFF
2565 BFD_RELOC_386_TLS_TPOFF
2567 BFD_RELOC_386_TLS_IE
2569 BFD_RELOC_386_TLS_GOTIE
2571 BFD_RELOC_386_TLS_LE
2573 BFD_RELOC_386_TLS_GD
2575 BFD_RELOC_386_TLS_LDM
2577 BFD_RELOC_386_TLS_LDO_32
2579 BFD_RELOC_386_TLS_IE_32
2581 BFD_RELOC_386_TLS_LE_32
2583 BFD_RELOC_386_TLS_DTPMOD32
2585 BFD_RELOC_386_TLS_DTPOFF32
2587 BFD_RELOC_386_TLS_TPOFF32
2589 BFD_RELOC_386_TLS_GOTDESC
2591 BFD_RELOC_386_TLS_DESC_CALL
2593 BFD_RELOC_386_TLS_DESC
2595 BFD_RELOC_386_IRELATIVE
2597 BFD_RELOC_386_GOT32X
2599 i386/elf relocations
2602 BFD_RELOC_X86_64_GOT32
2604 BFD_RELOC_X86_64_PLT32
2606 BFD_RELOC_X86_64_COPY
2608 BFD_RELOC_X86_64_GLOB_DAT
2610 BFD_RELOC_X86_64_JUMP_SLOT
2612 BFD_RELOC_X86_64_RELATIVE
2614 BFD_RELOC_X86_64_GOTPCREL
2616 BFD_RELOC_X86_64_32S
2618 BFD_RELOC_X86_64_DTPMOD64
2620 BFD_RELOC_X86_64_DTPOFF64
2622 BFD_RELOC_X86_64_TPOFF64
2624 BFD_RELOC_X86_64_TLSGD
2626 BFD_RELOC_X86_64_TLSLD
2628 BFD_RELOC_X86_64_DTPOFF32
2630 BFD_RELOC_X86_64_GOTTPOFF
2632 BFD_RELOC_X86_64_TPOFF32
2634 BFD_RELOC_X86_64_GOTOFF64
2636 BFD_RELOC_X86_64_GOTPC32
2638 BFD_RELOC_X86_64_GOT64
2640 BFD_RELOC_X86_64_GOTPCREL64
2642 BFD_RELOC_X86_64_GOTPC64
2644 BFD_RELOC_X86_64_GOTPLT64
2646 BFD_RELOC_X86_64_PLTOFF64
2648 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2650 BFD_RELOC_X86_64_TLSDESC_CALL
2652 BFD_RELOC_X86_64_TLSDESC
2654 BFD_RELOC_X86_64_IRELATIVE
2656 BFD_RELOC_X86_64_PC32_BND
2658 BFD_RELOC_X86_64_PLT32_BND
2660 BFD_RELOC_X86_64_GOTPCRELX
2662 BFD_RELOC_X86_64_REX_GOTPCRELX
2664 x86-64/elf relocations
2667 BFD_RELOC_NS32K_IMM_8
2669 BFD_RELOC_NS32K_IMM_16
2671 BFD_RELOC_NS32K_IMM_32
2673 BFD_RELOC_NS32K_IMM_8_PCREL
2675 BFD_RELOC_NS32K_IMM_16_PCREL
2677 BFD_RELOC_NS32K_IMM_32_PCREL
2679 BFD_RELOC_NS32K_DISP_8
2681 BFD_RELOC_NS32K_DISP_16
2683 BFD_RELOC_NS32K_DISP_32
2685 BFD_RELOC_NS32K_DISP_8_PCREL
2687 BFD_RELOC_NS32K_DISP_16_PCREL
2689 BFD_RELOC_NS32K_DISP_32_PCREL
2694 BFD_RELOC_PDP11_DISP_8_PCREL
2696 BFD_RELOC_PDP11_DISP_6_PCREL
2701 BFD_RELOC_PJ_CODE_HI16
2703 BFD_RELOC_PJ_CODE_LO16
2705 BFD_RELOC_PJ_CODE_DIR16
2707 BFD_RELOC_PJ_CODE_DIR32
2709 BFD_RELOC_PJ_CODE_REL16
2711 BFD_RELOC_PJ_CODE_REL32
2713 Picojava relocs. Not all of these appear in object files.
2724 BFD_RELOC_PPC_B16_BRTAKEN
2726 BFD_RELOC_PPC_B16_BRNTAKEN
2730 BFD_RELOC_PPC_BA16_BRTAKEN
2732 BFD_RELOC_PPC_BA16_BRNTAKEN
2736 BFD_RELOC_PPC_GLOB_DAT
2738 BFD_RELOC_PPC_JMP_SLOT
2740 BFD_RELOC_PPC_RELATIVE
2742 BFD_RELOC_PPC_LOCAL24PC
2744 BFD_RELOC_PPC_EMB_NADDR32
2746 BFD_RELOC_PPC_EMB_NADDR16
2748 BFD_RELOC_PPC_EMB_NADDR16_LO
2750 BFD_RELOC_PPC_EMB_NADDR16_HI
2752 BFD_RELOC_PPC_EMB_NADDR16_HA
2754 BFD_RELOC_PPC_EMB_SDAI16
2756 BFD_RELOC_PPC_EMB_SDA2I16
2758 BFD_RELOC_PPC_EMB_SDA2REL
2760 BFD_RELOC_PPC_EMB_SDA21
2762 BFD_RELOC_PPC_EMB_MRKREF
2764 BFD_RELOC_PPC_EMB_RELSEC16
2766 BFD_RELOC_PPC_EMB_RELST_LO
2768 BFD_RELOC_PPC_EMB_RELST_HI
2770 BFD_RELOC_PPC_EMB_RELST_HA
2772 BFD_RELOC_PPC_EMB_BIT_FLD
2774 BFD_RELOC_PPC_EMB_RELSDA
2776 BFD_RELOC_PPC_VLE_REL8
2778 BFD_RELOC_PPC_VLE_REL15
2780 BFD_RELOC_PPC_VLE_REL24
2782 BFD_RELOC_PPC_VLE_LO16A
2784 BFD_RELOC_PPC_VLE_LO16D
2786 BFD_RELOC_PPC_VLE_HI16A
2788 BFD_RELOC_PPC_VLE_HI16D
2790 BFD_RELOC_PPC_VLE_HA16A
2792 BFD_RELOC_PPC_VLE_HA16D
2794 BFD_RELOC_PPC_VLE_SDA21
2796 BFD_RELOC_PPC_VLE_SDA21_LO
2798 BFD_RELOC_PPC_VLE_SDAREL_LO16A
2800 BFD_RELOC_PPC_VLE_SDAREL_LO16D
2802 BFD_RELOC_PPC_VLE_SDAREL_HI16A
2804 BFD_RELOC_PPC_VLE_SDAREL_HI16D
2806 BFD_RELOC_PPC_VLE_SDAREL_HA16A
2808 BFD_RELOC_PPC_VLE_SDAREL_HA16D
2810 BFD_RELOC_PPC_16DX_HA
2812 BFD_RELOC_PPC_REL16DX_HA
2814 BFD_RELOC_PPC64_HIGHER
2816 BFD_RELOC_PPC64_HIGHER_S
2818 BFD_RELOC_PPC64_HIGHEST
2820 BFD_RELOC_PPC64_HIGHEST_S
2822 BFD_RELOC_PPC64_TOC16_LO
2824 BFD_RELOC_PPC64_TOC16_HI
2826 BFD_RELOC_PPC64_TOC16_HA
2830 BFD_RELOC_PPC64_PLTGOT16
2832 BFD_RELOC_PPC64_PLTGOT16_LO
2834 BFD_RELOC_PPC64_PLTGOT16_HI
2836 BFD_RELOC_PPC64_PLTGOT16_HA
2838 BFD_RELOC_PPC64_ADDR16_DS
2840 BFD_RELOC_PPC64_ADDR16_LO_DS
2842 BFD_RELOC_PPC64_GOT16_DS
2844 BFD_RELOC_PPC64_GOT16_LO_DS
2846 BFD_RELOC_PPC64_PLT16_LO_DS
2848 BFD_RELOC_PPC64_SECTOFF_DS
2850 BFD_RELOC_PPC64_SECTOFF_LO_DS
2852 BFD_RELOC_PPC64_TOC16_DS
2854 BFD_RELOC_PPC64_TOC16_LO_DS
2856 BFD_RELOC_PPC64_PLTGOT16_DS
2858 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2860 BFD_RELOC_PPC64_ADDR16_HIGH
2862 BFD_RELOC_PPC64_ADDR16_HIGHA
2864 BFD_RELOC_PPC64_REL16_HIGH
2866 BFD_RELOC_PPC64_REL16_HIGHA
2868 BFD_RELOC_PPC64_REL16_HIGHER
2870 BFD_RELOC_PPC64_REL16_HIGHERA
2872 BFD_RELOC_PPC64_REL16_HIGHEST
2874 BFD_RELOC_PPC64_REL16_HIGHESTA
2876 BFD_RELOC_PPC64_ADDR64_LOCAL
2878 BFD_RELOC_PPC64_ENTRY
2880 BFD_RELOC_PPC64_REL24_NOTOC
2882 Power(rs6000) and PowerPC relocations.
2891 BFD_RELOC_PPC_DTPMOD
2893 BFD_RELOC_PPC_TPREL16
2895 BFD_RELOC_PPC_TPREL16_LO
2897 BFD_RELOC_PPC_TPREL16_HI
2899 BFD_RELOC_PPC_TPREL16_HA
2903 BFD_RELOC_PPC_DTPREL16
2905 BFD_RELOC_PPC_DTPREL16_LO
2907 BFD_RELOC_PPC_DTPREL16_HI
2909 BFD_RELOC_PPC_DTPREL16_HA
2911 BFD_RELOC_PPC_DTPREL
2913 BFD_RELOC_PPC_GOT_TLSGD16
2915 BFD_RELOC_PPC_GOT_TLSGD16_LO
2917 BFD_RELOC_PPC_GOT_TLSGD16_HI
2919 BFD_RELOC_PPC_GOT_TLSGD16_HA
2921 BFD_RELOC_PPC_GOT_TLSLD16
2923 BFD_RELOC_PPC_GOT_TLSLD16_LO
2925 BFD_RELOC_PPC_GOT_TLSLD16_HI
2927 BFD_RELOC_PPC_GOT_TLSLD16_HA
2929 BFD_RELOC_PPC_GOT_TPREL16
2931 BFD_RELOC_PPC_GOT_TPREL16_LO
2933 BFD_RELOC_PPC_GOT_TPREL16_HI
2935 BFD_RELOC_PPC_GOT_TPREL16_HA
2937 BFD_RELOC_PPC_GOT_DTPREL16
2939 BFD_RELOC_PPC_GOT_DTPREL16_LO
2941 BFD_RELOC_PPC_GOT_DTPREL16_HI
2943 BFD_RELOC_PPC_GOT_DTPREL16_HA
2945 BFD_RELOC_PPC64_TPREL16_DS
2947 BFD_RELOC_PPC64_TPREL16_LO_DS
2949 BFD_RELOC_PPC64_TPREL16_HIGHER
2951 BFD_RELOC_PPC64_TPREL16_HIGHERA
2953 BFD_RELOC_PPC64_TPREL16_HIGHEST
2955 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2957 BFD_RELOC_PPC64_DTPREL16_DS
2959 BFD_RELOC_PPC64_DTPREL16_LO_DS
2961 BFD_RELOC_PPC64_DTPREL16_HIGHER
2963 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2965 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2967 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2969 BFD_RELOC_PPC64_TPREL16_HIGH
2971 BFD_RELOC_PPC64_TPREL16_HIGHA
2973 BFD_RELOC_PPC64_DTPREL16_HIGH
2975 BFD_RELOC_PPC64_DTPREL16_HIGHA
2977 PowerPC and PowerPC64 thread-local storage relocations.
2982 IBM 370/390 relocations
2987 The type of reloc used to build a constructor table - at the moment
2988 probably a 32 bit wide absolute relocation, but the target can choose.
2989 It generally does map to one of the other relocation types.
2992 BFD_RELOC_ARM_PCREL_BRANCH
2994 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2995 not stored in the instruction.
2997 BFD_RELOC_ARM_PCREL_BLX
2999 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
3000 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
3001 field in the instruction.
3003 BFD_RELOC_THUMB_PCREL_BLX
3005 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
3006 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
3007 field in the instruction.
3009 BFD_RELOC_ARM_PCREL_CALL
3011 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
3013 BFD_RELOC_ARM_PCREL_JUMP
3015 ARM 26-bit pc-relative branch for B or conditional BL instruction.
3018 BFD_RELOC_THUMB_PCREL_BRANCH5
3020 ARM 5-bit pc-relative branch for Branch Future instructions.
3023 BFD_RELOC_ARM_THUMB_BF17
3025 ARM 17-bit pc-relative branch for Branch Future instructions.
3028 BFD_RELOC_ARM_THUMB_BF13
3030 ARM 13-bit pc-relative branch for BFCSEL instruction.
3033 BFD_RELOC_ARM_THUMB_BF19
3035 ARM 19-bit pc-relative branch for Branch Future Link instruction.
3038 BFD_RELOC_THUMB_PCREL_BRANCH7
3040 BFD_RELOC_THUMB_PCREL_BRANCH9
3042 BFD_RELOC_THUMB_PCREL_BRANCH12
3044 BFD_RELOC_THUMB_PCREL_BRANCH20
3046 BFD_RELOC_THUMB_PCREL_BRANCH23
3048 BFD_RELOC_THUMB_PCREL_BRANCH25
3050 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
3051 The lowest bit must be zero and is not stored in the instruction.
3052 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
3053 "nn" one smaller in all cases. Note further that BRANCH23
3054 corresponds to R_ARM_THM_CALL.
3057 BFD_RELOC_ARM_OFFSET_IMM
3059 12-bit immediate offset, used in ARM-format ldr and str instructions.
3062 BFD_RELOC_ARM_THUMB_OFFSET
3064 5-bit immediate offset, used in Thumb-format ldr and str instructions.
3067 BFD_RELOC_ARM_TARGET1
3069 Pc-relative or absolute relocation depending on target. Used for
3070 entries in .init_array sections.
3072 BFD_RELOC_ARM_ROSEGREL32
3074 Read-only segment base relative address.
3076 BFD_RELOC_ARM_SBREL32
3078 Data segment base relative address.
3080 BFD_RELOC_ARM_TARGET2
3082 This reloc is used for references to RTTI data from exception handling
3083 tables. The actual definition depends on the target. It may be a
3084 pc-relative or some form of GOT-indirect relocation.
3086 BFD_RELOC_ARM_PREL31
3088 31-bit PC relative address.
3094 BFD_RELOC_ARM_MOVW_PCREL
3096 BFD_RELOC_ARM_MOVT_PCREL
3098 BFD_RELOC_ARM_THUMB_MOVW
3100 BFD_RELOC_ARM_THUMB_MOVT
3102 BFD_RELOC_ARM_THUMB_MOVW_PCREL
3104 BFD_RELOC_ARM_THUMB_MOVT_PCREL
3106 Low and High halfword relocations for MOVW and MOVT instructions.
3109 BFD_RELOC_ARM_GOTFUNCDESC
3111 BFD_RELOC_ARM_GOTOFFFUNCDESC
3113 BFD_RELOC_ARM_FUNCDESC
3115 BFD_RELOC_ARM_FUNCDESC_VALUE
3117 BFD_RELOC_ARM_TLS_GD32_FDPIC
3119 BFD_RELOC_ARM_TLS_LDM32_FDPIC
3121 BFD_RELOC_ARM_TLS_IE32_FDPIC
3123 ARM FDPIC specific relocations.
3126 BFD_RELOC_ARM_JUMP_SLOT
3128 BFD_RELOC_ARM_GLOB_DAT
3134 BFD_RELOC_ARM_RELATIVE
3136 BFD_RELOC_ARM_GOTOFF
3140 BFD_RELOC_ARM_GOT_PREL
3142 Relocations for setting up GOTs and PLTs for shared libraries.
3145 BFD_RELOC_ARM_TLS_GD32
3147 BFD_RELOC_ARM_TLS_LDO32
3149 BFD_RELOC_ARM_TLS_LDM32
3151 BFD_RELOC_ARM_TLS_DTPOFF32
3153 BFD_RELOC_ARM_TLS_DTPMOD32
3155 BFD_RELOC_ARM_TLS_TPOFF32
3157 BFD_RELOC_ARM_TLS_IE32
3159 BFD_RELOC_ARM_TLS_LE32
3161 BFD_RELOC_ARM_TLS_GOTDESC
3163 BFD_RELOC_ARM_TLS_CALL
3165 BFD_RELOC_ARM_THM_TLS_CALL
3167 BFD_RELOC_ARM_TLS_DESCSEQ
3169 BFD_RELOC_ARM_THM_TLS_DESCSEQ
3171 BFD_RELOC_ARM_TLS_DESC
3173 ARM thread-local storage relocations.
3176 BFD_RELOC_ARM_ALU_PC_G0_NC
3178 BFD_RELOC_ARM_ALU_PC_G0
3180 BFD_RELOC_ARM_ALU_PC_G1_NC
3182 BFD_RELOC_ARM_ALU_PC_G1
3184 BFD_RELOC_ARM_ALU_PC_G2
3186 BFD_RELOC_ARM_LDR_PC_G0
3188 BFD_RELOC_ARM_LDR_PC_G1
3190 BFD_RELOC_ARM_LDR_PC_G2
3192 BFD_RELOC_ARM_LDRS_PC_G0
3194 BFD_RELOC_ARM_LDRS_PC_G1
3196 BFD_RELOC_ARM_LDRS_PC_G2
3198 BFD_RELOC_ARM_LDC_PC_G0
3200 BFD_RELOC_ARM_LDC_PC_G1
3202 BFD_RELOC_ARM_LDC_PC_G2
3204 BFD_RELOC_ARM_ALU_SB_G0_NC
3206 BFD_RELOC_ARM_ALU_SB_G0
3208 BFD_RELOC_ARM_ALU_SB_G1_NC
3210 BFD_RELOC_ARM_ALU_SB_G1
3212 BFD_RELOC_ARM_ALU_SB_G2
3214 BFD_RELOC_ARM_LDR_SB_G0
3216 BFD_RELOC_ARM_LDR_SB_G1
3218 BFD_RELOC_ARM_LDR_SB_G2
3220 BFD_RELOC_ARM_LDRS_SB_G0
3222 BFD_RELOC_ARM_LDRS_SB_G1
3224 BFD_RELOC_ARM_LDRS_SB_G2
3226 BFD_RELOC_ARM_LDC_SB_G0
3228 BFD_RELOC_ARM_LDC_SB_G1
3230 BFD_RELOC_ARM_LDC_SB_G2
3232 ARM group relocations.
3237 Annotation of BX instructions.
3240 BFD_RELOC_ARM_IRELATIVE
3242 ARM support for STT_GNU_IFUNC.
3245 BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
3247 BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
3249 BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
3251 BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
3253 Thumb1 relocations to support execute-only code.
3256 BFD_RELOC_ARM_IMMEDIATE
3258 BFD_RELOC_ARM_ADRL_IMMEDIATE
3260 BFD_RELOC_ARM_T32_IMMEDIATE
3262 BFD_RELOC_ARM_T32_ADD_IMM
3264 BFD_RELOC_ARM_T32_IMM12
3266 BFD_RELOC_ARM_T32_ADD_PC12
3268 BFD_RELOC_ARM_SHIFT_IMM
3278 BFD_RELOC_ARM_CP_OFF_IMM
3280 BFD_RELOC_ARM_CP_OFF_IMM_S2
3282 BFD_RELOC_ARM_T32_CP_OFF_IMM
3284 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
3286 BFD_RELOC_ARM_ADR_IMM
3288 BFD_RELOC_ARM_LDR_IMM
3290 BFD_RELOC_ARM_LITERAL
3292 BFD_RELOC_ARM_IN_POOL
3294 BFD_RELOC_ARM_OFFSET_IMM8
3296 BFD_RELOC_ARM_T32_OFFSET_U8
3298 BFD_RELOC_ARM_T32_OFFSET_IMM
3300 BFD_RELOC_ARM_HWLITERAL
3302 BFD_RELOC_ARM_THUMB_ADD
3304 BFD_RELOC_ARM_THUMB_IMM
3306 BFD_RELOC_ARM_THUMB_SHIFT
3308 These relocs are only used within the ARM assembler. They are not
3309 (at present) written to any object files.
3312 BFD_RELOC_SH_PCDISP8BY2
3314 BFD_RELOC_SH_PCDISP12BY2
3322 BFD_RELOC_SH_DISP12BY2
3324 BFD_RELOC_SH_DISP12BY4
3326 BFD_RELOC_SH_DISP12BY8
3330 BFD_RELOC_SH_DISP20BY8
3334 BFD_RELOC_SH_IMM4BY2
3336 BFD_RELOC_SH_IMM4BY4
3340 BFD_RELOC_SH_IMM8BY2
3342 BFD_RELOC_SH_IMM8BY4
3344 BFD_RELOC_SH_PCRELIMM8BY2
3346 BFD_RELOC_SH_PCRELIMM8BY4
3348 BFD_RELOC_SH_SWITCH16
3350 BFD_RELOC_SH_SWITCH32
3364 BFD_RELOC_SH_LOOP_START
3366 BFD_RELOC_SH_LOOP_END
3370 BFD_RELOC_SH_GLOB_DAT
3372 BFD_RELOC_SH_JMP_SLOT
3374 BFD_RELOC_SH_RELATIVE
3378 BFD_RELOC_SH_GOT_LOW16
3380 BFD_RELOC_SH_GOT_MEDLOW16
3382 BFD_RELOC_SH_GOT_MEDHI16
3384 BFD_RELOC_SH_GOT_HI16
3386 BFD_RELOC_SH_GOTPLT_LOW16
3388 BFD_RELOC_SH_GOTPLT_MEDLOW16
3390 BFD_RELOC_SH_GOTPLT_MEDHI16
3392 BFD_RELOC_SH_GOTPLT_HI16
3394 BFD_RELOC_SH_PLT_LOW16
3396 BFD_RELOC_SH_PLT_MEDLOW16
3398 BFD_RELOC_SH_PLT_MEDHI16
3400 BFD_RELOC_SH_PLT_HI16
3402 BFD_RELOC_SH_GOTOFF_LOW16
3404 BFD_RELOC_SH_GOTOFF_MEDLOW16
3406 BFD_RELOC_SH_GOTOFF_MEDHI16
3408 BFD_RELOC_SH_GOTOFF_HI16
3410 BFD_RELOC_SH_GOTPC_LOW16
3412 BFD_RELOC_SH_GOTPC_MEDLOW16
3414 BFD_RELOC_SH_GOTPC_MEDHI16
3416 BFD_RELOC_SH_GOTPC_HI16
3420 BFD_RELOC_SH_GLOB_DAT64
3422 BFD_RELOC_SH_JMP_SLOT64
3424 BFD_RELOC_SH_RELATIVE64
3426 BFD_RELOC_SH_GOT10BY4
3428 BFD_RELOC_SH_GOT10BY8
3430 BFD_RELOC_SH_GOTPLT10BY4
3432 BFD_RELOC_SH_GOTPLT10BY8
3434 BFD_RELOC_SH_GOTPLT32
3436 BFD_RELOC_SH_SHMEDIA_CODE
3442 BFD_RELOC_SH_IMMS6BY32
3448 BFD_RELOC_SH_IMMS10BY2
3450 BFD_RELOC_SH_IMMS10BY4
3452 BFD_RELOC_SH_IMMS10BY8
3458 BFD_RELOC_SH_IMM_LOW16
3460 BFD_RELOC_SH_IMM_LOW16_PCREL
3462 BFD_RELOC_SH_IMM_MEDLOW16
3464 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3466 BFD_RELOC_SH_IMM_MEDHI16
3468 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3470 BFD_RELOC_SH_IMM_HI16
3472 BFD_RELOC_SH_IMM_HI16_PCREL
3476 BFD_RELOC_SH_TLS_GD_32
3478 BFD_RELOC_SH_TLS_LD_32
3480 BFD_RELOC_SH_TLS_LDO_32
3482 BFD_RELOC_SH_TLS_IE_32
3484 BFD_RELOC_SH_TLS_LE_32
3486 BFD_RELOC_SH_TLS_DTPMOD32
3488 BFD_RELOC_SH_TLS_DTPOFF32
3490 BFD_RELOC_SH_TLS_TPOFF32
3494 BFD_RELOC_SH_GOTOFF20
3496 BFD_RELOC_SH_GOTFUNCDESC
3498 BFD_RELOC_SH_GOTFUNCDESC20
3500 BFD_RELOC_SH_GOTOFFFUNCDESC
3502 BFD_RELOC_SH_GOTOFFFUNCDESC20
3504 BFD_RELOC_SH_FUNCDESC
3506 Renesas / SuperH SH relocs. Not all of these appear in object files.
3529 BFD_RELOC_ARC_SECTOFF
3531 BFD_RELOC_ARC_S21H_PCREL
3533 BFD_RELOC_ARC_S21W_PCREL
3535 BFD_RELOC_ARC_S25H_PCREL
3537 BFD_RELOC_ARC_S25W_PCREL
3541 BFD_RELOC_ARC_SDA_LDST
3543 BFD_RELOC_ARC_SDA_LDST1
3545 BFD_RELOC_ARC_SDA_LDST2
3547 BFD_RELOC_ARC_SDA16_LD
3549 BFD_RELOC_ARC_SDA16_LD1
3551 BFD_RELOC_ARC_SDA16_LD2
3553 BFD_RELOC_ARC_S13_PCREL
3559 BFD_RELOC_ARC_32_ME_S
3561 BFD_RELOC_ARC_N32_ME
3563 BFD_RELOC_ARC_SECTOFF_ME
3565 BFD_RELOC_ARC_SDA32_ME
3569 BFD_RELOC_AC_SECTOFF_U8
3571 BFD_RELOC_AC_SECTOFF_U8_1
3573 BFD_RELOC_AC_SECTOFF_U8_2
3575 BFD_RELOC_AC_SECTOFF_S9
3577 BFD_RELOC_AC_SECTOFF_S9_1
3579 BFD_RELOC_AC_SECTOFF_S9_2
3581 BFD_RELOC_ARC_SECTOFF_ME_1
3583 BFD_RELOC_ARC_SECTOFF_ME_2
3585 BFD_RELOC_ARC_SECTOFF_1
3587 BFD_RELOC_ARC_SECTOFF_2
3589 BFD_RELOC_ARC_SDA_12
3591 BFD_RELOC_ARC_SDA16_ST2
3593 BFD_RELOC_ARC_32_PCREL
3599 BFD_RELOC_ARC_GOTPC32
3605 BFD_RELOC_ARC_GLOB_DAT
3607 BFD_RELOC_ARC_JMP_SLOT
3609 BFD_RELOC_ARC_RELATIVE
3611 BFD_RELOC_ARC_GOTOFF
3615 BFD_RELOC_ARC_S21W_PCREL_PLT
3617 BFD_RELOC_ARC_S25H_PCREL_PLT
3619 BFD_RELOC_ARC_TLS_DTPMOD
3621 BFD_RELOC_ARC_TLS_TPOFF
3623 BFD_RELOC_ARC_TLS_GD_GOT
3625 BFD_RELOC_ARC_TLS_GD_LD
3627 BFD_RELOC_ARC_TLS_GD_CALL
3629 BFD_RELOC_ARC_TLS_IE_GOT
3631 BFD_RELOC_ARC_TLS_DTPOFF
3633 BFD_RELOC_ARC_TLS_DTPOFF_S9
3635 BFD_RELOC_ARC_TLS_LE_S9
3637 BFD_RELOC_ARC_TLS_LE_32
3639 BFD_RELOC_ARC_S25W_PCREL_PLT
3641 BFD_RELOC_ARC_S21H_PCREL_PLT
3643 BFD_RELOC_ARC_NPS_CMEM16
3645 BFD_RELOC_ARC_JLI_SECTOFF
3650 BFD_RELOC_BFIN_16_IMM
3652 ADI Blackfin 16 bit immediate absolute reloc.
3654 BFD_RELOC_BFIN_16_HIGH
3656 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3658 BFD_RELOC_BFIN_4_PCREL
3660 ADI Blackfin 'a' part of LSETUP.
3662 BFD_RELOC_BFIN_5_PCREL
3666 BFD_RELOC_BFIN_16_LOW
3668 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3670 BFD_RELOC_BFIN_10_PCREL
3674 BFD_RELOC_BFIN_11_PCREL
3676 ADI Blackfin 'b' part of LSETUP.
3678 BFD_RELOC_BFIN_12_PCREL_JUMP
3682 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3684 ADI Blackfin Short jump, pcrel.
3686 BFD_RELOC_BFIN_24_PCREL_CALL_X
3688 ADI Blackfin Call.x not implemented.
3690 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3692 ADI Blackfin Long Jump pcrel.
3694 BFD_RELOC_BFIN_GOT17M4
3696 BFD_RELOC_BFIN_GOTHI
3698 BFD_RELOC_BFIN_GOTLO
3700 BFD_RELOC_BFIN_FUNCDESC
3702 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3704 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3706 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3708 BFD_RELOC_BFIN_FUNCDESC_VALUE
3710 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3712 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3714 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3716 BFD_RELOC_BFIN_GOTOFF17M4
3718 BFD_RELOC_BFIN_GOTOFFHI
3720 BFD_RELOC_BFIN_GOTOFFLO
3722 ADI Blackfin FD-PIC relocations.
3726 ADI Blackfin GOT relocation.
3728 BFD_RELOC_BFIN_PLTPC
3730 ADI Blackfin PLTPC relocation.
3732 BFD_ARELOC_BFIN_PUSH
3734 ADI Blackfin arithmetic relocation.
3736 BFD_ARELOC_BFIN_CONST
3738 ADI Blackfin arithmetic relocation.
3742 ADI Blackfin arithmetic relocation.
3746 ADI Blackfin arithmetic relocation.
3748 BFD_ARELOC_BFIN_MULT
3750 ADI Blackfin arithmetic relocation.
3754 ADI Blackfin arithmetic relocation.
3758 ADI Blackfin arithmetic relocation.
3760 BFD_ARELOC_BFIN_LSHIFT
3762 ADI Blackfin arithmetic relocation.
3764 BFD_ARELOC_BFIN_RSHIFT
3766 ADI Blackfin arithmetic relocation.
3770 ADI Blackfin arithmetic relocation.
3774 ADI Blackfin arithmetic relocation.
3778 ADI Blackfin arithmetic relocation.
3780 BFD_ARELOC_BFIN_LAND
3782 ADI Blackfin arithmetic relocation.
3786 ADI Blackfin arithmetic relocation.
3790 ADI Blackfin arithmetic relocation.
3794 ADI Blackfin arithmetic relocation.
3796 BFD_ARELOC_BFIN_COMP
3798 ADI Blackfin arithmetic relocation.
3800 BFD_ARELOC_BFIN_PAGE
3802 ADI Blackfin arithmetic relocation.
3804 BFD_ARELOC_BFIN_HWPAGE
3806 ADI Blackfin arithmetic relocation.
3808 BFD_ARELOC_BFIN_ADDR
3810 ADI Blackfin arithmetic relocation.
3813 BFD_RELOC_D10V_10_PCREL_R
3815 Mitsubishi D10V relocs.
3816 This is a 10-bit reloc with the right 2 bits
3819 BFD_RELOC_D10V_10_PCREL_L
3821 Mitsubishi D10V relocs.
3822 This is a 10-bit reloc with the right 2 bits
3823 assumed to be 0. This is the same as the previous reloc
3824 except it is in the left container, i.e.,
3825 shifted left 15 bits.
3829 This is an 18-bit reloc with the right 2 bits
3832 BFD_RELOC_D10V_18_PCREL
3834 This is an 18-bit reloc with the right 2 bits
3840 Mitsubishi D30V relocs.
3841 This is a 6-bit absolute reloc.
3843 BFD_RELOC_D30V_9_PCREL
3845 This is a 6-bit pc-relative reloc with
3846 the right 3 bits assumed to be 0.
3848 BFD_RELOC_D30V_9_PCREL_R
3850 This is a 6-bit pc-relative reloc with
3851 the right 3 bits assumed to be 0. Same
3852 as the previous reloc but on the right side
3857 This is a 12-bit absolute reloc with the
3858 right 3 bitsassumed to be 0.
3860 BFD_RELOC_D30V_15_PCREL
3862 This is a 12-bit pc-relative reloc with
3863 the right 3 bits assumed to be 0.
3865 BFD_RELOC_D30V_15_PCREL_R
3867 This is a 12-bit pc-relative reloc with
3868 the right 3 bits assumed to be 0. Same
3869 as the previous reloc but on the right side
3874 This is an 18-bit absolute reloc with
3875 the right 3 bits assumed to be 0.
3877 BFD_RELOC_D30V_21_PCREL
3879 This is an 18-bit pc-relative reloc with
3880 the right 3 bits assumed to be 0.
3882 BFD_RELOC_D30V_21_PCREL_R
3884 This is an 18-bit pc-relative reloc with
3885 the right 3 bits assumed to be 0. Same
3886 as the previous reloc but on the right side
3891 This is a 32-bit absolute reloc.
3893 BFD_RELOC_D30V_32_PCREL
3895 This is a 32-bit pc-relative reloc.
3898 BFD_RELOC_DLX_HI16_S
3913 BFD_RELOC_M32C_RL_JUMP
3915 BFD_RELOC_M32C_RL_1ADDR
3917 BFD_RELOC_M32C_RL_2ADDR
3919 Renesas M16C/M32C Relocations.
3924 Renesas M32R (formerly Mitsubishi M32R) relocs.
3925 This is a 24 bit absolute address.
3927 BFD_RELOC_M32R_10_PCREL
3929 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3931 BFD_RELOC_M32R_18_PCREL
3933 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3935 BFD_RELOC_M32R_26_PCREL
3937 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3939 BFD_RELOC_M32R_HI16_ULO
3941 This is a 16-bit reloc containing the high 16 bits of an address
3942 used when the lower 16 bits are treated as unsigned.
3944 BFD_RELOC_M32R_HI16_SLO
3946 This is a 16-bit reloc containing the high 16 bits of an address
3947 used when the lower 16 bits are treated as signed.
3951 This is a 16-bit reloc containing the lower 16 bits of an address.
3953 BFD_RELOC_M32R_SDA16
3955 This is a 16-bit reloc containing the small data area offset for use in
3956 add3, load, and store instructions.
3958 BFD_RELOC_M32R_GOT24
3960 BFD_RELOC_M32R_26_PLTREL
3964 BFD_RELOC_M32R_GLOB_DAT
3966 BFD_RELOC_M32R_JMP_SLOT
3968 BFD_RELOC_M32R_RELATIVE
3970 BFD_RELOC_M32R_GOTOFF
3972 BFD_RELOC_M32R_GOTOFF_HI_ULO
3974 BFD_RELOC_M32R_GOTOFF_HI_SLO
3976 BFD_RELOC_M32R_GOTOFF_LO
3978 BFD_RELOC_M32R_GOTPC24
3980 BFD_RELOC_M32R_GOT16_HI_ULO
3982 BFD_RELOC_M32R_GOT16_HI_SLO
3984 BFD_RELOC_M32R_GOT16_LO
3986 BFD_RELOC_M32R_GOTPC_HI_ULO
3988 BFD_RELOC_M32R_GOTPC_HI_SLO
3990 BFD_RELOC_M32R_GOTPC_LO
3999 This is a 20 bit absolute address.
4001 BFD_RELOC_NDS32_9_PCREL
4003 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
4005 BFD_RELOC_NDS32_WORD_9_PCREL
4007 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
4009 BFD_RELOC_NDS32_15_PCREL
4011 This is an 15-bit reloc with the right 1 bit assumed to be 0.
4013 BFD_RELOC_NDS32_17_PCREL
4015 This is an 17-bit reloc with the right 1 bit assumed to be 0.
4017 BFD_RELOC_NDS32_25_PCREL
4019 This is a 25-bit reloc with the right 1 bit assumed to be 0.
4021 BFD_RELOC_NDS32_HI20
4023 This is a 20-bit reloc containing the high 20 bits of an address
4024 used with the lower 12 bits
4026 BFD_RELOC_NDS32_LO12S3
4028 This is a 12-bit reloc containing the lower 12 bits of an address
4029 then shift right by 3. This is used with ldi,sdi...
4031 BFD_RELOC_NDS32_LO12S2
4033 This is a 12-bit reloc containing the lower 12 bits of an address
4034 then shift left by 2. This is used with lwi,swi...
4036 BFD_RELOC_NDS32_LO12S1
4038 This is a 12-bit reloc containing the lower 12 bits of an address
4039 then shift left by 1. This is used with lhi,shi...
4041 BFD_RELOC_NDS32_LO12S0
4043 This is a 12-bit reloc containing the lower 12 bits of an address
4044 then shift left by 0. This is used with lbisbi...
4046 BFD_RELOC_NDS32_LO12S0_ORI
4048 This is a 12-bit reloc containing the lower 12 bits of an address
4049 then shift left by 0. This is only used with branch relaxations
4051 BFD_RELOC_NDS32_SDA15S3
4053 This is a 15-bit reloc containing the small data area 18-bit signed offset
4054 and shift left by 3 for use in ldi, sdi...
4056 BFD_RELOC_NDS32_SDA15S2
4058 This is a 15-bit reloc containing the small data area 17-bit signed offset
4059 and shift left by 2 for use in lwi, swi...
4061 BFD_RELOC_NDS32_SDA15S1
4063 This is a 15-bit reloc containing the small data area 16-bit signed offset
4064 and shift left by 1 for use in lhi, shi...
4066 BFD_RELOC_NDS32_SDA15S0
4068 This is a 15-bit reloc containing the small data area 15-bit signed offset
4069 and shift left by 0 for use in lbi, sbi...
4071 BFD_RELOC_NDS32_SDA16S3
4073 This is a 16-bit reloc containing the small data area 16-bit signed offset
4076 BFD_RELOC_NDS32_SDA17S2
4078 This is a 17-bit reloc containing the small data area 17-bit signed offset
4079 and shift left by 2 for use in lwi.gp, swi.gp...
4081 BFD_RELOC_NDS32_SDA18S1
4083 This is a 18-bit reloc containing the small data area 18-bit signed offset
4084 and shift left by 1 for use in lhi.gp, shi.gp...
4086 BFD_RELOC_NDS32_SDA19S0
4088 This is a 19-bit reloc containing the small data area 19-bit signed offset
4089 and shift left by 0 for use in lbi.gp, sbi.gp...
4091 BFD_RELOC_NDS32_GOT20
4093 BFD_RELOC_NDS32_9_PLTREL
4095 BFD_RELOC_NDS32_25_PLTREL
4097 BFD_RELOC_NDS32_COPY
4099 BFD_RELOC_NDS32_GLOB_DAT
4101 BFD_RELOC_NDS32_JMP_SLOT
4103 BFD_RELOC_NDS32_RELATIVE
4105 BFD_RELOC_NDS32_GOTOFF
4107 BFD_RELOC_NDS32_GOTOFF_HI20
4109 BFD_RELOC_NDS32_GOTOFF_LO12
4111 BFD_RELOC_NDS32_GOTPC20
4113 BFD_RELOC_NDS32_GOT_HI20
4115 BFD_RELOC_NDS32_GOT_LO12
4117 BFD_RELOC_NDS32_GOTPC_HI20
4119 BFD_RELOC_NDS32_GOTPC_LO12
4123 BFD_RELOC_NDS32_INSN16
4125 BFD_RELOC_NDS32_LABEL
4127 BFD_RELOC_NDS32_LONGCALL1
4129 BFD_RELOC_NDS32_LONGCALL2
4131 BFD_RELOC_NDS32_LONGCALL3
4133 BFD_RELOC_NDS32_LONGJUMP1
4135 BFD_RELOC_NDS32_LONGJUMP2
4137 BFD_RELOC_NDS32_LONGJUMP3
4139 BFD_RELOC_NDS32_LOADSTORE
4141 BFD_RELOC_NDS32_9_FIXED
4143 BFD_RELOC_NDS32_15_FIXED
4145 BFD_RELOC_NDS32_17_FIXED
4147 BFD_RELOC_NDS32_25_FIXED
4149 BFD_RELOC_NDS32_LONGCALL4
4151 BFD_RELOC_NDS32_LONGCALL5
4153 BFD_RELOC_NDS32_LONGCALL6
4155 BFD_RELOC_NDS32_LONGJUMP4
4157 BFD_RELOC_NDS32_LONGJUMP5
4159 BFD_RELOC_NDS32_LONGJUMP6
4161 BFD_RELOC_NDS32_LONGJUMP7
4165 BFD_RELOC_NDS32_PLTREL_HI20
4167 BFD_RELOC_NDS32_PLTREL_LO12
4169 BFD_RELOC_NDS32_PLT_GOTREL_HI20
4171 BFD_RELOC_NDS32_PLT_GOTREL_LO12
4175 BFD_RELOC_NDS32_SDA12S2_DP
4177 BFD_RELOC_NDS32_SDA12S2_SP
4179 BFD_RELOC_NDS32_LO12S2_DP
4181 BFD_RELOC_NDS32_LO12S2_SP
4185 BFD_RELOC_NDS32_DWARF2_OP1
4187 BFD_RELOC_NDS32_DWARF2_OP2
4189 BFD_RELOC_NDS32_DWARF2_LEB
4191 for dwarf2 debug_line.
4193 BFD_RELOC_NDS32_UPDATE_TA
4195 for eliminate 16-bit instructions
4197 BFD_RELOC_NDS32_PLT_GOTREL_LO20
4199 BFD_RELOC_NDS32_PLT_GOTREL_LO15
4201 BFD_RELOC_NDS32_PLT_GOTREL_LO19
4203 BFD_RELOC_NDS32_GOT_LO15
4205 BFD_RELOC_NDS32_GOT_LO19
4207 BFD_RELOC_NDS32_GOTOFF_LO15
4209 BFD_RELOC_NDS32_GOTOFF_LO19
4211 BFD_RELOC_NDS32_GOT15S2
4213 BFD_RELOC_NDS32_GOT17S2
4215 for PIC object relaxation
4220 This is a 5 bit absolute address.
4222 BFD_RELOC_NDS32_10_UPCREL
4224 This is a 10-bit unsigned pc-relative reloc with the right 1 bit assumed to be 0.
4226 BFD_RELOC_NDS32_SDA_FP7U2_RELA
4228 If fp were omitted, fp can used as another gp.
4230 BFD_RELOC_NDS32_RELAX_ENTRY
4232 BFD_RELOC_NDS32_GOT_SUFF
4234 BFD_RELOC_NDS32_GOTOFF_SUFF
4236 BFD_RELOC_NDS32_PLT_GOT_SUFF
4238 BFD_RELOC_NDS32_MULCALL_SUFF
4242 BFD_RELOC_NDS32_PTR_COUNT
4244 BFD_RELOC_NDS32_PTR_RESOLVED
4246 BFD_RELOC_NDS32_PLTBLOCK
4248 BFD_RELOC_NDS32_RELAX_REGION_BEGIN
4250 BFD_RELOC_NDS32_RELAX_REGION_END
4252 BFD_RELOC_NDS32_MINUEND
4254 BFD_RELOC_NDS32_SUBTRAHEND
4256 BFD_RELOC_NDS32_DIFF8
4258 BFD_RELOC_NDS32_DIFF16
4260 BFD_RELOC_NDS32_DIFF32
4262 BFD_RELOC_NDS32_DIFF_ULEB128
4264 BFD_RELOC_NDS32_EMPTY
4266 relaxation relative relocation types
4268 BFD_RELOC_NDS32_25_ABS
4270 This is a 25 bit absolute address.
4272 BFD_RELOC_NDS32_DATA
4274 BFD_RELOC_NDS32_TRAN
4276 BFD_RELOC_NDS32_17IFC_PCREL
4278 BFD_RELOC_NDS32_10IFCU_PCREL
4280 For ex9 and ifc using.
4282 BFD_RELOC_NDS32_TPOFF
4284 BFD_RELOC_NDS32_GOTTPOFF
4286 BFD_RELOC_NDS32_TLS_LE_HI20
4288 BFD_RELOC_NDS32_TLS_LE_LO12
4290 BFD_RELOC_NDS32_TLS_LE_20
4292 BFD_RELOC_NDS32_TLS_LE_15S0
4294 BFD_RELOC_NDS32_TLS_LE_15S1
4296 BFD_RELOC_NDS32_TLS_LE_15S2
4298 BFD_RELOC_NDS32_TLS_LE_ADD
4300 BFD_RELOC_NDS32_TLS_LE_LS
4302 BFD_RELOC_NDS32_TLS_IE_HI20
4304 BFD_RELOC_NDS32_TLS_IE_LO12
4306 BFD_RELOC_NDS32_TLS_IE_LO12S2
4308 BFD_RELOC_NDS32_TLS_IEGP_HI20
4310 BFD_RELOC_NDS32_TLS_IEGP_LO12
4312 BFD_RELOC_NDS32_TLS_IEGP_LO12S2
4314 BFD_RELOC_NDS32_TLS_IEGP_LW
4316 BFD_RELOC_NDS32_TLS_DESC
4318 BFD_RELOC_NDS32_TLS_DESC_HI20
4320 BFD_RELOC_NDS32_TLS_DESC_LO12
4322 BFD_RELOC_NDS32_TLS_DESC_20
4324 BFD_RELOC_NDS32_TLS_DESC_SDA17S2
4326 BFD_RELOC_NDS32_TLS_DESC_ADD
4328 BFD_RELOC_NDS32_TLS_DESC_FUNC
4330 BFD_RELOC_NDS32_TLS_DESC_CALL
4332 BFD_RELOC_NDS32_TLS_DESC_MEM
4334 BFD_RELOC_NDS32_REMOVE
4336 BFD_RELOC_NDS32_GROUP
4342 For floating load store relaxation.
4346 BFD_RELOC_V850_9_PCREL
4348 This is a 9-bit reloc
4350 BFD_RELOC_V850_22_PCREL
4352 This is a 22-bit reloc
4355 BFD_RELOC_V850_SDA_16_16_OFFSET
4357 This is a 16 bit offset from the short data area pointer.
4359 BFD_RELOC_V850_SDA_15_16_OFFSET
4361 This is a 16 bit offset (of which only 15 bits are used) from the
4362 short data area pointer.
4364 BFD_RELOC_V850_ZDA_16_16_OFFSET
4366 This is a 16 bit offset from the zero data area pointer.
4368 BFD_RELOC_V850_ZDA_15_16_OFFSET
4370 This is a 16 bit offset (of which only 15 bits are used) from the
4371 zero data area pointer.
4373 BFD_RELOC_V850_TDA_6_8_OFFSET
4375 This is an 8 bit offset (of which only 6 bits are used) from the
4376 tiny data area pointer.
4378 BFD_RELOC_V850_TDA_7_8_OFFSET
4380 This is an 8bit offset (of which only 7 bits are used) from the tiny
4383 BFD_RELOC_V850_TDA_7_7_OFFSET
4385 This is a 7 bit offset from the tiny data area pointer.
4387 BFD_RELOC_V850_TDA_16_16_OFFSET
4389 This is a 16 bit offset from the tiny data area pointer.
4392 BFD_RELOC_V850_TDA_4_5_OFFSET
4394 This is a 5 bit offset (of which only 4 bits are used) from the tiny
4397 BFD_RELOC_V850_TDA_4_4_OFFSET
4399 This is a 4 bit offset from the tiny data area pointer.
4401 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
4403 This is a 16 bit offset from the short data area pointer, with the
4404 bits placed non-contiguously in the instruction.
4406 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
4408 This is a 16 bit offset from the zero data area pointer, with the
4409 bits placed non-contiguously in the instruction.
4411 BFD_RELOC_V850_CALLT_6_7_OFFSET
4413 This is a 6 bit offset from the call table base pointer.
4415 BFD_RELOC_V850_CALLT_16_16_OFFSET
4417 This is a 16 bit offset from the call table base pointer.
4419 BFD_RELOC_V850_LONGCALL
4421 Used for relaxing indirect function calls.
4423 BFD_RELOC_V850_LONGJUMP
4425 Used for relaxing indirect jumps.
4427 BFD_RELOC_V850_ALIGN
4429 Used to maintain alignment whilst relaxing.
4431 BFD_RELOC_V850_LO16_SPLIT_OFFSET
4433 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
4436 BFD_RELOC_V850_16_PCREL
4438 This is a 16-bit reloc.
4440 BFD_RELOC_V850_17_PCREL
4442 This is a 17-bit reloc.
4446 This is a 23-bit reloc.
4448 BFD_RELOC_V850_32_PCREL
4450 This is a 32-bit reloc.
4452 BFD_RELOC_V850_32_ABS
4454 This is a 32-bit reloc.
4456 BFD_RELOC_V850_16_SPLIT_OFFSET
4458 This is a 16-bit reloc.
4460 BFD_RELOC_V850_16_S1
4462 This is a 16-bit reloc.
4464 BFD_RELOC_V850_LO16_S1
4466 Low 16 bits. 16 bit shifted by 1.
4468 BFD_RELOC_V850_CALLT_15_16_OFFSET
4470 This is a 16 bit offset from the call table base pointer.
4472 BFD_RELOC_V850_32_GOTPCREL
4476 BFD_RELOC_V850_16_GOT
4480 BFD_RELOC_V850_32_GOT
4484 BFD_RELOC_V850_22_PLT_PCREL
4488 BFD_RELOC_V850_32_PLT_PCREL
4496 BFD_RELOC_V850_GLOB_DAT
4500 BFD_RELOC_V850_JMP_SLOT
4504 BFD_RELOC_V850_RELATIVE
4508 BFD_RELOC_V850_16_GOTOFF
4512 BFD_RELOC_V850_32_GOTOFF
4527 This is a 8bit DP reloc for the tms320c30, where the most
4528 significant 8 bits of a 24 bit word are placed into the least
4529 significant 8 bits of the opcode.
4532 BFD_RELOC_TIC54X_PARTLS7
4534 This is a 7bit reloc for the tms320c54x, where the least
4535 significant 7 bits of a 16 bit word are placed into the least
4536 significant 7 bits of the opcode.
4539 BFD_RELOC_TIC54X_PARTMS9
4541 This is a 9bit DP reloc for the tms320c54x, where the most
4542 significant 9 bits of a 16 bit word are placed into the least
4543 significant 9 bits of the opcode.
4548 This is an extended address 23-bit reloc for the tms320c54x.
4551 BFD_RELOC_TIC54X_16_OF_23
4553 This is a 16-bit reloc for the tms320c54x, where the least
4554 significant 16 bits of a 23-bit extended address are placed into
4558 BFD_RELOC_TIC54X_MS7_OF_23
4560 This is a reloc for the tms320c54x, where the most
4561 significant 7 bits of a 23-bit extended address are placed into
4565 BFD_RELOC_C6000_PCR_S21
4567 BFD_RELOC_C6000_PCR_S12
4569 BFD_RELOC_C6000_PCR_S10
4571 BFD_RELOC_C6000_PCR_S7
4573 BFD_RELOC_C6000_ABS_S16
4575 BFD_RELOC_C6000_ABS_L16
4577 BFD_RELOC_C6000_ABS_H16
4579 BFD_RELOC_C6000_SBR_U15_B
4581 BFD_RELOC_C6000_SBR_U15_H
4583 BFD_RELOC_C6000_SBR_U15_W
4585 BFD_RELOC_C6000_SBR_S16
4587 BFD_RELOC_C6000_SBR_L16_B
4589 BFD_RELOC_C6000_SBR_L16_H
4591 BFD_RELOC_C6000_SBR_L16_W
4593 BFD_RELOC_C6000_SBR_H16_B
4595 BFD_RELOC_C6000_SBR_H16_H
4597 BFD_RELOC_C6000_SBR_H16_W
4599 BFD_RELOC_C6000_SBR_GOT_U15_W
4601 BFD_RELOC_C6000_SBR_GOT_L16_W
4603 BFD_RELOC_C6000_SBR_GOT_H16_W
4605 BFD_RELOC_C6000_DSBT_INDEX
4607 BFD_RELOC_C6000_PREL31
4609 BFD_RELOC_C6000_COPY
4611 BFD_RELOC_C6000_JUMP_SLOT
4613 BFD_RELOC_C6000_EHTYPE
4615 BFD_RELOC_C6000_PCR_H16
4617 BFD_RELOC_C6000_PCR_L16
4619 BFD_RELOC_C6000_ALIGN
4621 BFD_RELOC_C6000_FPHEAD
4623 BFD_RELOC_C6000_NOCMP
4625 TMS320C6000 relocations.
4630 This is a 48 bit reloc for the FR30 that stores 32 bits.
4634 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
4637 BFD_RELOC_FR30_6_IN_4
4639 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
4642 BFD_RELOC_FR30_8_IN_8
4644 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
4647 BFD_RELOC_FR30_9_IN_8
4649 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
4652 BFD_RELOC_FR30_10_IN_8
4654 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
4657 BFD_RELOC_FR30_9_PCREL
4659 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
4660 short offset into 8 bits.
4662 BFD_RELOC_FR30_12_PCREL
4664 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
4665 short offset into 11 bits.
4668 BFD_RELOC_MCORE_PCREL_IMM8BY4
4670 BFD_RELOC_MCORE_PCREL_IMM11BY2
4672 BFD_RELOC_MCORE_PCREL_IMM4BY2
4674 BFD_RELOC_MCORE_PCREL_32
4676 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
4680 Motorola Mcore relocations.
4689 BFD_RELOC_MEP_PCREL8A2
4691 BFD_RELOC_MEP_PCREL12A2
4693 BFD_RELOC_MEP_PCREL17A2
4695 BFD_RELOC_MEP_PCREL24A2
4697 BFD_RELOC_MEP_PCABS24A2
4709 BFD_RELOC_MEP_TPREL7
4711 BFD_RELOC_MEP_TPREL7A2
4713 BFD_RELOC_MEP_TPREL7A4
4715 BFD_RELOC_MEP_UIMM24
4717 BFD_RELOC_MEP_ADDR24A4
4719 BFD_RELOC_MEP_GNU_VTINHERIT
4721 BFD_RELOC_MEP_GNU_VTENTRY
4723 Toshiba Media Processor Relocations.
4727 BFD_RELOC_METAG_HIADDR16
4729 BFD_RELOC_METAG_LOADDR16
4731 BFD_RELOC_METAG_RELBRANCH
4733 BFD_RELOC_METAG_GETSETOFF
4735 BFD_RELOC_METAG_HIOG
4737 BFD_RELOC_METAG_LOOG
4739 BFD_RELOC_METAG_REL8
4741 BFD_RELOC_METAG_REL16
4743 BFD_RELOC_METAG_HI16_GOTOFF
4745 BFD_RELOC_METAG_LO16_GOTOFF
4747 BFD_RELOC_METAG_GETSET_GOTOFF
4749 BFD_RELOC_METAG_GETSET_GOT
4751 BFD_RELOC_METAG_HI16_GOTPC
4753 BFD_RELOC_METAG_LO16_GOTPC
4755 BFD_RELOC_METAG_HI16_PLT
4757 BFD_RELOC_METAG_LO16_PLT
4759 BFD_RELOC_METAG_RELBRANCH_PLT
4761 BFD_RELOC_METAG_GOTOFF
4765 BFD_RELOC_METAG_COPY
4767 BFD_RELOC_METAG_JMP_SLOT
4769 BFD_RELOC_METAG_RELATIVE
4771 BFD_RELOC_METAG_GLOB_DAT
4773 BFD_RELOC_METAG_TLS_GD
4775 BFD_RELOC_METAG_TLS_LDM
4777 BFD_RELOC_METAG_TLS_LDO_HI16
4779 BFD_RELOC_METAG_TLS_LDO_LO16
4781 BFD_RELOC_METAG_TLS_LDO
4783 BFD_RELOC_METAG_TLS_IE
4785 BFD_RELOC_METAG_TLS_IENONPIC
4787 BFD_RELOC_METAG_TLS_IENONPIC_HI16
4789 BFD_RELOC_METAG_TLS_IENONPIC_LO16
4791 BFD_RELOC_METAG_TLS_TPOFF
4793 BFD_RELOC_METAG_TLS_DTPMOD
4795 BFD_RELOC_METAG_TLS_DTPOFF
4797 BFD_RELOC_METAG_TLS_LE
4799 BFD_RELOC_METAG_TLS_LE_HI16
4801 BFD_RELOC_METAG_TLS_LE_LO16
4803 Imagination Technologies Meta relocations.
4808 BFD_RELOC_MMIX_GETA_1
4810 BFD_RELOC_MMIX_GETA_2
4812 BFD_RELOC_MMIX_GETA_3
4814 These are relocations for the GETA instruction.
4816 BFD_RELOC_MMIX_CBRANCH
4818 BFD_RELOC_MMIX_CBRANCH_J
4820 BFD_RELOC_MMIX_CBRANCH_1
4822 BFD_RELOC_MMIX_CBRANCH_2
4824 BFD_RELOC_MMIX_CBRANCH_3
4826 These are relocations for a conditional branch instruction.
4828 BFD_RELOC_MMIX_PUSHJ
4830 BFD_RELOC_MMIX_PUSHJ_1
4832 BFD_RELOC_MMIX_PUSHJ_2
4834 BFD_RELOC_MMIX_PUSHJ_3
4836 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
4838 These are relocations for the PUSHJ instruction.
4842 BFD_RELOC_MMIX_JMP_1
4844 BFD_RELOC_MMIX_JMP_2
4846 BFD_RELOC_MMIX_JMP_3
4848 These are relocations for the JMP instruction.
4850 BFD_RELOC_MMIX_ADDR19
4852 This is a relocation for a relative address as in a GETA instruction or
4855 BFD_RELOC_MMIX_ADDR27
4857 This is a relocation for a relative address as in a JMP instruction.
4859 BFD_RELOC_MMIX_REG_OR_BYTE
4861 This is a relocation for an instruction field that may be a general
4862 register or a value 0..255.
4866 This is a relocation for an instruction field that may be a general
4869 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
4871 This is a relocation for two instruction fields holding a register and
4872 an offset, the equivalent of the relocation.
4874 BFD_RELOC_MMIX_LOCAL
4876 This relocation is an assertion that the expression is not allocated as
4877 a global register. It does not modify contents.
4880 BFD_RELOC_AVR_7_PCREL
4882 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
4883 short offset into 7 bits.
4885 BFD_RELOC_AVR_13_PCREL
4887 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
4888 short offset into 12 bits.
4892 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
4893 program memory address) into 16 bits.
4895 BFD_RELOC_AVR_LO8_LDI
4897 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4898 data memory address) into 8 bit immediate value of LDI insn.
4900 BFD_RELOC_AVR_HI8_LDI
4902 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4903 of data memory address) into 8 bit immediate value of LDI insn.
4905 BFD_RELOC_AVR_HH8_LDI
4907 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4908 of program memory address) into 8 bit immediate value of LDI insn.
4910 BFD_RELOC_AVR_MS8_LDI
4912 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4913 of 32 bit value) into 8 bit immediate value of LDI insn.
4915 BFD_RELOC_AVR_LO8_LDI_NEG
4917 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4918 (usually data memory address) into 8 bit immediate value of SUBI insn.
4920 BFD_RELOC_AVR_HI8_LDI_NEG
4922 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4923 (high 8 bit of data memory address) into 8 bit immediate value of
4926 BFD_RELOC_AVR_HH8_LDI_NEG
4928 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4929 (most high 8 bit of program memory address) into 8 bit immediate value
4930 of LDI or SUBI insn.
4932 BFD_RELOC_AVR_MS8_LDI_NEG
4934 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
4935 of 32 bit value) into 8 bit immediate value of LDI insn.
4937 BFD_RELOC_AVR_LO8_LDI_PM
4939 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4940 command address) into 8 bit immediate value of LDI insn.
4942 BFD_RELOC_AVR_LO8_LDI_GS
4944 This is a 16 bit reloc for the AVR that stores 8 bit value
4945 (command address) into 8 bit immediate value of LDI insn. If the address
4946 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4949 BFD_RELOC_AVR_HI8_LDI_PM
4951 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4952 of command address) into 8 bit immediate value of LDI insn.
4954 BFD_RELOC_AVR_HI8_LDI_GS
4956 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4957 of command address) into 8 bit immediate value of LDI insn. If the address
4958 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4961 BFD_RELOC_AVR_HH8_LDI_PM
4963 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4964 of command address) into 8 bit immediate value of LDI insn.
4966 BFD_RELOC_AVR_LO8_LDI_PM_NEG
4968 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4969 (usually command address) into 8 bit immediate value of SUBI insn.
4971 BFD_RELOC_AVR_HI8_LDI_PM_NEG
4973 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4974 (high 8 bit of 16 bit command address) into 8 bit immediate value
4977 BFD_RELOC_AVR_HH8_LDI_PM_NEG
4979 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4980 (high 6 bit of 22 bit command address) into 8 bit immediate
4985 This is a 32 bit reloc for the AVR that stores 23 bit value
4990 This is a 16 bit reloc for the AVR that stores all needed bits
4991 for absolute addressing with ldi with overflow check to linktime
4995 This is a 6 bit reloc for the AVR that stores offset for ldd/std
4998 BFD_RELOC_AVR_6_ADIW
5000 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
5005 This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
5006 in .byte lo8(symbol)
5010 This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol
5011 in .byte hi8(symbol)
5015 This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
5016 in .byte hlo8(symbol)
5020 BFD_RELOC_AVR_DIFF16
5022 BFD_RELOC_AVR_DIFF32
5024 AVR relocations to mark the difference of two local symbols.
5025 These are only needed to support linker relaxation and can be ignored
5026 when not relaxing. The field is set to the value of the difference
5027 assuming no relaxation. The relocation encodes the position of the
5028 second symbol so the linker can determine whether to adjust the field
5031 BFD_RELOC_AVR_LDS_STS_16
5033 This is a 7 bit reloc for the AVR that stores SRAM address for 16bit
5034 lds and sts instructions supported only tiny core.
5038 This is a 6 bit reloc for the AVR that stores an I/O register
5039 number for the IN and OUT instructions
5043 This is a 5 bit reloc for the AVR that stores an I/O register
5044 number for the SBIC, SBIS, SBI and CBI instructions
5047 BFD_RELOC_RISCV_HI20
5049 BFD_RELOC_RISCV_PCREL_HI20
5051 BFD_RELOC_RISCV_PCREL_LO12_I
5053 BFD_RELOC_RISCV_PCREL_LO12_S
5055 BFD_RELOC_RISCV_LO12_I
5057 BFD_RELOC_RISCV_LO12_S
5059 BFD_RELOC_RISCV_GPREL12_I
5061 BFD_RELOC_RISCV_GPREL12_S
5063 BFD_RELOC_RISCV_TPREL_HI20
5065 BFD_RELOC_RISCV_TPREL_LO12_I
5067 BFD_RELOC_RISCV_TPREL_LO12_S
5069 BFD_RELOC_RISCV_TPREL_ADD
5071 BFD_RELOC_RISCV_CALL
5073 BFD_RELOC_RISCV_CALL_PLT
5075 BFD_RELOC_RISCV_ADD8
5077 BFD_RELOC_RISCV_ADD16
5079 BFD_RELOC_RISCV_ADD32
5081 BFD_RELOC_RISCV_ADD64
5083 BFD_RELOC_RISCV_SUB8
5085 BFD_RELOC_RISCV_SUB16
5087 BFD_RELOC_RISCV_SUB32
5089 BFD_RELOC_RISCV_SUB64
5091 BFD_RELOC_RISCV_GOT_HI20
5093 BFD_RELOC_RISCV_TLS_GOT_HI20
5095 BFD_RELOC_RISCV_TLS_GD_HI20
5099 BFD_RELOC_RISCV_TLS_DTPMOD32
5101 BFD_RELOC_RISCV_TLS_DTPREL32
5103 BFD_RELOC_RISCV_TLS_DTPMOD64
5105 BFD_RELOC_RISCV_TLS_DTPREL64
5107 BFD_RELOC_RISCV_TLS_TPREL32
5109 BFD_RELOC_RISCV_TLS_TPREL64
5111 BFD_RELOC_RISCV_ALIGN
5113 BFD_RELOC_RISCV_RVC_BRANCH
5115 BFD_RELOC_RISCV_RVC_JUMP
5117 BFD_RELOC_RISCV_RVC_LUI
5119 BFD_RELOC_RISCV_GPREL_I
5121 BFD_RELOC_RISCV_GPREL_S
5123 BFD_RELOC_RISCV_TPREL_I
5125 BFD_RELOC_RISCV_TPREL_S
5127 BFD_RELOC_RISCV_RELAX
5131 BFD_RELOC_RISCV_SUB6
5133 BFD_RELOC_RISCV_SET6
5135 BFD_RELOC_RISCV_SET8
5137 BFD_RELOC_RISCV_SET16
5139 BFD_RELOC_RISCV_SET32
5141 BFD_RELOC_RISCV_32_PCREL
5148 BFD_RELOC_RL78_NEG16
5150 BFD_RELOC_RL78_NEG24
5152 BFD_RELOC_RL78_NEG32
5154 BFD_RELOC_RL78_16_OP
5156 BFD_RELOC_RL78_24_OP
5158 BFD_RELOC_RL78_32_OP
5166 BFD_RELOC_RL78_DIR3U_PCREL
5170 BFD_RELOC_RL78_GPRELB
5172 BFD_RELOC_RL78_GPRELW
5174 BFD_RELOC_RL78_GPRELL
5178 BFD_RELOC_RL78_OP_SUBTRACT
5180 BFD_RELOC_RL78_OP_NEG
5182 BFD_RELOC_RL78_OP_AND
5184 BFD_RELOC_RL78_OP_SHRA
5188 BFD_RELOC_RL78_ABS16
5190 BFD_RELOC_RL78_ABS16_REV
5192 BFD_RELOC_RL78_ABS32
5194 BFD_RELOC_RL78_ABS32_REV
5196 BFD_RELOC_RL78_ABS16U
5198 BFD_RELOC_RL78_ABS16UW
5200 BFD_RELOC_RL78_ABS16UL
5202 BFD_RELOC_RL78_RELAX
5212 BFD_RELOC_RL78_SADDR
5214 Renesas RL78 Relocations.
5237 BFD_RELOC_RX_DIR3U_PCREL
5249 BFD_RELOC_RX_OP_SUBTRACT
5257 BFD_RELOC_RX_ABS16_REV
5261 BFD_RELOC_RX_ABS32_REV
5265 BFD_RELOC_RX_ABS16UW
5267 BFD_RELOC_RX_ABS16UL
5271 Renesas RX Relocations.
5284 32 bit PC relative PLT address.
5288 Copy symbol at runtime.
5290 BFD_RELOC_390_GLOB_DAT
5294 BFD_RELOC_390_JMP_SLOT
5298 BFD_RELOC_390_RELATIVE
5300 Adjust by program base.
5304 32 bit PC relative offset to GOT.
5310 BFD_RELOC_390_PC12DBL
5312 PC relative 12 bit shifted by 1.
5314 BFD_RELOC_390_PLT12DBL
5316 12 bit PC rel. PLT shifted by 1.
5318 BFD_RELOC_390_PC16DBL
5320 PC relative 16 bit shifted by 1.
5322 BFD_RELOC_390_PLT16DBL
5324 16 bit PC rel. PLT shifted by 1.
5326 BFD_RELOC_390_PC24DBL
5328 PC relative 24 bit shifted by 1.
5330 BFD_RELOC_390_PLT24DBL
5332 24 bit PC rel. PLT shifted by 1.
5334 BFD_RELOC_390_PC32DBL
5336 PC relative 32 bit shifted by 1.
5338 BFD_RELOC_390_PLT32DBL
5340 32 bit PC rel. PLT shifted by 1.
5342 BFD_RELOC_390_GOTPCDBL
5344 32 bit PC rel. GOT shifted by 1.
5352 64 bit PC relative PLT address.
5354 BFD_RELOC_390_GOTENT
5356 32 bit rel. offset to GOT entry.
5358 BFD_RELOC_390_GOTOFF64
5360 64 bit offset to GOT.
5362 BFD_RELOC_390_GOTPLT12
5364 12-bit offset to symbol-entry within GOT, with PLT handling.
5366 BFD_RELOC_390_GOTPLT16
5368 16-bit offset to symbol-entry within GOT, with PLT handling.
5370 BFD_RELOC_390_GOTPLT32
5372 32-bit offset to symbol-entry within GOT, with PLT handling.
5374 BFD_RELOC_390_GOTPLT64
5376 64-bit offset to symbol-entry within GOT, with PLT handling.
5378 BFD_RELOC_390_GOTPLTENT
5380 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
5382 BFD_RELOC_390_PLTOFF16
5384 16-bit rel. offset from the GOT to a PLT entry.
5386 BFD_RELOC_390_PLTOFF32
5388 32-bit rel. offset from the GOT to a PLT entry.
5390 BFD_RELOC_390_PLTOFF64
5392 64-bit rel. offset from the GOT to a PLT entry.
5395 BFD_RELOC_390_TLS_LOAD
5397 BFD_RELOC_390_TLS_GDCALL
5399 BFD_RELOC_390_TLS_LDCALL
5401 BFD_RELOC_390_TLS_GD32
5403 BFD_RELOC_390_TLS_GD64
5405 BFD_RELOC_390_TLS_GOTIE12
5407 BFD_RELOC_390_TLS_GOTIE32
5409 BFD_RELOC_390_TLS_GOTIE64
5411 BFD_RELOC_390_TLS_LDM32
5413 BFD_RELOC_390_TLS_LDM64
5415 BFD_RELOC_390_TLS_IE32
5417 BFD_RELOC_390_TLS_IE64
5419 BFD_RELOC_390_TLS_IEENT
5421 BFD_RELOC_390_TLS_LE32
5423 BFD_RELOC_390_TLS_LE64
5425 BFD_RELOC_390_TLS_LDO32
5427 BFD_RELOC_390_TLS_LDO64
5429 BFD_RELOC_390_TLS_DTPMOD
5431 BFD_RELOC_390_TLS_DTPOFF
5433 BFD_RELOC_390_TLS_TPOFF
5435 s390 tls relocations.
5442 BFD_RELOC_390_GOTPLT20
5444 BFD_RELOC_390_TLS_GOTIE20
5446 Long displacement extension.
5449 BFD_RELOC_390_IRELATIVE
5451 STT_GNU_IFUNC relocation.
5454 BFD_RELOC_SCORE_GPREL15
5457 Low 16 bit for load/store
5459 BFD_RELOC_SCORE_DUMMY2
5463 This is a 24-bit reloc with the right 1 bit assumed to be 0
5465 BFD_RELOC_SCORE_BRANCH
5467 This is a 19-bit reloc with the right 1 bit assumed to be 0
5469 BFD_RELOC_SCORE_IMM30
5471 This is a 32-bit reloc for 48-bit instructions.
5473 BFD_RELOC_SCORE_IMM32
5475 This is a 32-bit reloc for 48-bit instructions.
5477 BFD_RELOC_SCORE16_JMP
5479 This is a 11-bit reloc with the right 1 bit assumed to be 0
5481 BFD_RELOC_SCORE16_BRANCH
5483 This is a 8-bit reloc with the right 1 bit assumed to be 0
5485 BFD_RELOC_SCORE_BCMP
5487 This is a 9-bit reloc with the right 1 bit assumed to be 0
5489 BFD_RELOC_SCORE_GOT15
5491 BFD_RELOC_SCORE_GOT_LO16
5493 BFD_RELOC_SCORE_CALL15
5495 BFD_RELOC_SCORE_DUMMY_HI16
5497 Undocumented Score relocs
5502 Scenix IP2K - 9-bit register number / data address
5506 Scenix IP2K - 4-bit register/data bank number
5508 BFD_RELOC_IP2K_ADDR16CJP
5510 Scenix IP2K - low 13 bits of instruction word address
5512 BFD_RELOC_IP2K_PAGE3
5514 Scenix IP2K - high 3 bits of instruction word address
5516 BFD_RELOC_IP2K_LO8DATA
5518 BFD_RELOC_IP2K_HI8DATA
5520 BFD_RELOC_IP2K_EX8DATA
5522 Scenix IP2K - ext/low/high 8 bits of data address
5524 BFD_RELOC_IP2K_LO8INSN
5526 BFD_RELOC_IP2K_HI8INSN
5528 Scenix IP2K - low/high 8 bits of instruction word address
5530 BFD_RELOC_IP2K_PC_SKIP
5532 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
5536 Scenix IP2K - 16 bit word address in text section.
5538 BFD_RELOC_IP2K_FR_OFFSET
5540 Scenix IP2K - 7-bit sp or dp offset
5542 BFD_RELOC_VPE4KMATH_DATA
5544 BFD_RELOC_VPE4KMATH_INSN
5546 Scenix VPE4K coprocessor - data/insn-space addressing
5549 BFD_RELOC_VTABLE_INHERIT
5551 BFD_RELOC_VTABLE_ENTRY
5553 These two relocations are used by the linker to determine which of
5554 the entries in a C++ virtual function table are actually used. When
5555 the --gc-sections option is given, the linker will zero out the entries
5556 that are not used, so that the code for those functions need not be
5557 included in the output.
5559 VTABLE_INHERIT is a zero-space relocation used to describe to the
5560 linker the inheritance tree of a C++ virtual function table. The
5561 relocation's symbol should be the parent class' vtable, and the
5562 relocation should be located at the child vtable.
5564 VTABLE_ENTRY is a zero-space relocation that describes the use of a
5565 virtual function table entry. The reloc's symbol should refer to the
5566 table of the class mentioned in the code. Off of that base, an offset
5567 describes the entry that is being used. For Rela hosts, this offset
5568 is stored in the reloc's addend. For Rel hosts, we are forced to put
5569 this offset in the reloc's section offset.
5572 BFD_RELOC_IA64_IMM14
5574 BFD_RELOC_IA64_IMM22
5576 BFD_RELOC_IA64_IMM64
5578 BFD_RELOC_IA64_DIR32MSB
5580 BFD_RELOC_IA64_DIR32LSB
5582 BFD_RELOC_IA64_DIR64MSB
5584 BFD_RELOC_IA64_DIR64LSB
5586 BFD_RELOC_IA64_GPREL22
5588 BFD_RELOC_IA64_GPREL64I
5590 BFD_RELOC_IA64_GPREL32MSB
5592 BFD_RELOC_IA64_GPREL32LSB
5594 BFD_RELOC_IA64_GPREL64MSB
5596 BFD_RELOC_IA64_GPREL64LSB
5598 BFD_RELOC_IA64_LTOFF22
5600 BFD_RELOC_IA64_LTOFF64I
5602 BFD_RELOC_IA64_PLTOFF22
5604 BFD_RELOC_IA64_PLTOFF64I
5606 BFD_RELOC_IA64_PLTOFF64MSB
5608 BFD_RELOC_IA64_PLTOFF64LSB
5610 BFD_RELOC_IA64_FPTR64I
5612 BFD_RELOC_IA64_FPTR32MSB
5614 BFD_RELOC_IA64_FPTR32LSB
5616 BFD_RELOC_IA64_FPTR64MSB
5618 BFD_RELOC_IA64_FPTR64LSB
5620 BFD_RELOC_IA64_PCREL21B
5622 BFD_RELOC_IA64_PCREL21BI
5624 BFD_RELOC_IA64_PCREL21M
5626 BFD_RELOC_IA64_PCREL21F
5628 BFD_RELOC_IA64_PCREL22
5630 BFD_RELOC_IA64_PCREL60B
5632 BFD_RELOC_IA64_PCREL64I
5634 BFD_RELOC_IA64_PCREL32MSB
5636 BFD_RELOC_IA64_PCREL32LSB
5638 BFD_RELOC_IA64_PCREL64MSB
5640 BFD_RELOC_IA64_PCREL64LSB
5642 BFD_RELOC_IA64_LTOFF_FPTR22
5644 BFD_RELOC_IA64_LTOFF_FPTR64I
5646 BFD_RELOC_IA64_LTOFF_FPTR32MSB
5648 BFD_RELOC_IA64_LTOFF_FPTR32LSB
5650 BFD_RELOC_IA64_LTOFF_FPTR64MSB
5652 BFD_RELOC_IA64_LTOFF_FPTR64LSB
5654 BFD_RELOC_IA64_SEGREL32MSB
5656 BFD_RELOC_IA64_SEGREL32LSB
5658 BFD_RELOC_IA64_SEGREL64MSB
5660 BFD_RELOC_IA64_SEGREL64LSB
5662 BFD_RELOC_IA64_SECREL32MSB
5664 BFD_RELOC_IA64_SECREL32LSB
5666 BFD_RELOC_IA64_SECREL64MSB
5668 BFD_RELOC_IA64_SECREL64LSB
5670 BFD_RELOC_IA64_REL32MSB
5672 BFD_RELOC_IA64_REL32LSB
5674 BFD_RELOC_IA64_REL64MSB
5676 BFD_RELOC_IA64_REL64LSB
5678 BFD_RELOC_IA64_LTV32MSB
5680 BFD_RELOC_IA64_LTV32LSB
5682 BFD_RELOC_IA64_LTV64MSB
5684 BFD_RELOC_IA64_LTV64LSB
5686 BFD_RELOC_IA64_IPLTMSB
5688 BFD_RELOC_IA64_IPLTLSB
5692 BFD_RELOC_IA64_LTOFF22X
5694 BFD_RELOC_IA64_LDXMOV
5696 BFD_RELOC_IA64_TPREL14
5698 BFD_RELOC_IA64_TPREL22
5700 BFD_RELOC_IA64_TPREL64I
5702 BFD_RELOC_IA64_TPREL64MSB
5704 BFD_RELOC_IA64_TPREL64LSB
5706 BFD_RELOC_IA64_LTOFF_TPREL22
5708 BFD_RELOC_IA64_DTPMOD64MSB
5710 BFD_RELOC_IA64_DTPMOD64LSB
5712 BFD_RELOC_IA64_LTOFF_DTPMOD22
5714 BFD_RELOC_IA64_DTPREL14
5716 BFD_RELOC_IA64_DTPREL22
5718 BFD_RELOC_IA64_DTPREL64I
5720 BFD_RELOC_IA64_DTPREL32MSB
5722 BFD_RELOC_IA64_DTPREL32LSB
5724 BFD_RELOC_IA64_DTPREL64MSB
5726 BFD_RELOC_IA64_DTPREL64LSB
5728 BFD_RELOC_IA64_LTOFF_DTPREL22
5730 Intel IA64 Relocations.
5733 BFD_RELOC_M68HC11_HI8
5735 Motorola 68HC11 reloc.
5736 This is the 8 bit high part of an absolute address.
5738 BFD_RELOC_M68HC11_LO8
5740 Motorola 68HC11 reloc.
5741 This is the 8 bit low part of an absolute address.
5743 BFD_RELOC_M68HC11_3B
5745 Motorola 68HC11 reloc.
5746 This is the 3 bit of a value.
5748 BFD_RELOC_M68HC11_RL_JUMP
5750 Motorola 68HC11 reloc.
5751 This reloc marks the beginning of a jump/call instruction.
5752 It is used for linker relaxation to correctly identify beginning
5753 of instruction and change some branches to use PC-relative
5756 BFD_RELOC_M68HC11_RL_GROUP
5758 Motorola 68HC11 reloc.
5759 This reloc marks a group of several instructions that gcc generates
5760 and for which the linker relaxation pass can modify and/or remove
5763 BFD_RELOC_M68HC11_LO16
5765 Motorola 68HC11 reloc.
5766 This is the 16-bit lower part of an address. It is used for 'call'
5767 instruction to specify the symbol address without any special
5768 transformation (due to memory bank window).
5770 BFD_RELOC_M68HC11_PAGE
5772 Motorola 68HC11 reloc.
5773 This is a 8-bit reloc that specifies the page number of an address.
5774 It is used by 'call' instruction to specify the page number of
5777 BFD_RELOC_M68HC11_24
5779 Motorola 68HC11 reloc.
5780 This is a 24-bit reloc that represents the address with a 16-bit
5781 value and a 8-bit page number. The symbol address is transformed
5782 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
5784 BFD_RELOC_M68HC12_5B
5786 Motorola 68HC12 reloc.
5787 This is the 5 bits of a value.
5789 BFD_RELOC_XGATE_RL_JUMP
5791 Freescale XGATE reloc.
5792 This reloc marks the beginning of a bra/jal instruction.
5794 BFD_RELOC_XGATE_RL_GROUP
5796 Freescale XGATE reloc.
5797 This reloc marks a group of several instructions that gcc generates
5798 and for which the linker relaxation pass can modify and/or remove
5801 BFD_RELOC_XGATE_LO16
5803 Freescale XGATE reloc.
5804 This is the 16-bit lower part of an address. It is used for the '16-bit'
5807 BFD_RELOC_XGATE_GPAGE
5809 Freescale XGATE reloc.
5813 Freescale XGATE reloc.
5815 BFD_RELOC_XGATE_PCREL_9
5817 Freescale XGATE reloc.
5818 This is a 9-bit pc-relative reloc.
5820 BFD_RELOC_XGATE_PCREL_10
5822 Freescale XGATE reloc.
5823 This is a 10-bit pc-relative reloc.
5825 BFD_RELOC_XGATE_IMM8_LO
5827 Freescale XGATE reloc.
5828 This is the 16-bit lower part of an address. It is used for the '16-bit'
5831 BFD_RELOC_XGATE_IMM8_HI
5833 Freescale XGATE reloc.
5834 This is the 16-bit higher part of an address. It is used for the '16-bit'
5837 BFD_RELOC_XGATE_IMM3
5839 Freescale XGATE reloc.
5840 This is a 3-bit pc-relative reloc.
5842 BFD_RELOC_XGATE_IMM4
5844 Freescale XGATE reloc.
5845 This is a 4-bit pc-relative reloc.
5847 BFD_RELOC_XGATE_IMM5
5849 Freescale XGATE reloc.
5850 This is a 5-bit pc-relative reloc.
5852 BFD_RELOC_M68HC12_9B
5854 Motorola 68HC12 reloc.
5855 This is the 9 bits of a value.
5857 BFD_RELOC_M68HC12_16B
5859 Motorola 68HC12 reloc.
5860 This is the 16 bits of a value.
5862 BFD_RELOC_M68HC12_9_PCREL
5864 Motorola 68HC12/XGATE reloc.
5865 This is a PCREL9 branch.
5867 BFD_RELOC_M68HC12_10_PCREL
5869 Motorola 68HC12/XGATE reloc.
5870 This is a PCREL10 branch.
5872 BFD_RELOC_M68HC12_LO8XG
5874 Motorola 68HC12/XGATE reloc.
5875 This is the 8 bit low part of an absolute address and immediately precedes
5876 a matching HI8XG part.
5878 BFD_RELOC_M68HC12_HI8XG
5880 Motorola 68HC12/XGATE reloc.
5881 This is the 8 bit high part of an absolute address and immediately follows
5882 a matching LO8XG part.
5884 BFD_RELOC_S12Z_15_PCREL
5886 Freescale S12Z reloc.
5887 This is a 15 bit relative address. If the most significant bits are all zero
5888 then it may be truncated to 8 bits.
5892 BFD_RELOC_16C_NUM08_C
5896 BFD_RELOC_16C_NUM16_C
5900 BFD_RELOC_16C_NUM32_C
5902 BFD_RELOC_16C_DISP04
5904 BFD_RELOC_16C_DISP04_C
5906 BFD_RELOC_16C_DISP08
5908 BFD_RELOC_16C_DISP08_C
5910 BFD_RELOC_16C_DISP16
5912 BFD_RELOC_16C_DISP16_C
5914 BFD_RELOC_16C_DISP24
5916 BFD_RELOC_16C_DISP24_C
5918 BFD_RELOC_16C_DISP24a
5920 BFD_RELOC_16C_DISP24a_C
5924 BFD_RELOC_16C_REG04_C
5926 BFD_RELOC_16C_REG04a
5928 BFD_RELOC_16C_REG04a_C
5932 BFD_RELOC_16C_REG14_C
5936 BFD_RELOC_16C_REG16_C
5940 BFD_RELOC_16C_REG20_C
5944 BFD_RELOC_16C_ABS20_C
5948 BFD_RELOC_16C_ABS24_C
5952 BFD_RELOC_16C_IMM04_C
5956 BFD_RELOC_16C_IMM16_C
5960 BFD_RELOC_16C_IMM20_C
5964 BFD_RELOC_16C_IMM24_C
5968 BFD_RELOC_16C_IMM32_C
5970 NS CR16C Relocations.
5975 BFD_RELOC_CR16_NUM16
5977 BFD_RELOC_CR16_NUM32
5979 BFD_RELOC_CR16_NUM32a
5981 BFD_RELOC_CR16_REGREL0
5983 BFD_RELOC_CR16_REGREL4
5985 BFD_RELOC_CR16_REGREL4a
5987 BFD_RELOC_CR16_REGREL14
5989 BFD_RELOC_CR16_REGREL14a
5991 BFD_RELOC_CR16_REGREL16
5993 BFD_RELOC_CR16_REGREL20
5995 BFD_RELOC_CR16_REGREL20a
5997 BFD_RELOC_CR16_ABS20
5999 BFD_RELOC_CR16_ABS24
6005 BFD_RELOC_CR16_IMM16
6007 BFD_RELOC_CR16_IMM20
6009 BFD_RELOC_CR16_IMM24
6011 BFD_RELOC_CR16_IMM32
6013 BFD_RELOC_CR16_IMM32a
6015 BFD_RELOC_CR16_DISP4
6017 BFD_RELOC_CR16_DISP8
6019 BFD_RELOC_CR16_DISP16
6021 BFD_RELOC_CR16_DISP20
6023 BFD_RELOC_CR16_DISP24
6025 BFD_RELOC_CR16_DISP24a
6027 BFD_RELOC_CR16_SWITCH8
6029 BFD_RELOC_CR16_SWITCH16
6031 BFD_RELOC_CR16_SWITCH32
6033 BFD_RELOC_CR16_GOT_REGREL20
6035 BFD_RELOC_CR16_GOTC_REGREL20
6037 BFD_RELOC_CR16_GLOB_DAT
6039 NS CR16 Relocations.
6046 BFD_RELOC_CRX_REL8_CMP
6054 BFD_RELOC_CRX_REGREL12
6056 BFD_RELOC_CRX_REGREL22
6058 BFD_RELOC_CRX_REGREL28
6060 BFD_RELOC_CRX_REGREL32
6076 BFD_RELOC_CRX_SWITCH8
6078 BFD_RELOC_CRX_SWITCH16
6080 BFD_RELOC_CRX_SWITCH32
6085 BFD_RELOC_CRIS_BDISP8
6087 BFD_RELOC_CRIS_UNSIGNED_5
6089 BFD_RELOC_CRIS_SIGNED_6
6091 BFD_RELOC_CRIS_UNSIGNED_6
6093 BFD_RELOC_CRIS_SIGNED_8
6095 BFD_RELOC_CRIS_UNSIGNED_8
6097 BFD_RELOC_CRIS_SIGNED_16
6099 BFD_RELOC_CRIS_UNSIGNED_16
6101 BFD_RELOC_CRIS_LAPCQ_OFFSET
6103 BFD_RELOC_CRIS_UNSIGNED_4
6105 These relocs are only used within the CRIS assembler. They are not
6106 (at present) written to any object files.
6110 BFD_RELOC_CRIS_GLOB_DAT
6112 BFD_RELOC_CRIS_JUMP_SLOT
6114 BFD_RELOC_CRIS_RELATIVE
6116 Relocs used in ELF shared libraries for CRIS.
6118 BFD_RELOC_CRIS_32_GOT
6120 32-bit offset to symbol-entry within GOT.
6122 BFD_RELOC_CRIS_16_GOT
6124 16-bit offset to symbol-entry within GOT.
6126 BFD_RELOC_CRIS_32_GOTPLT
6128 32-bit offset to symbol-entry within GOT, with PLT handling.
6130 BFD_RELOC_CRIS_16_GOTPLT
6132 16-bit offset to symbol-entry within GOT, with PLT handling.
6134 BFD_RELOC_CRIS_32_GOTREL
6136 32-bit offset to symbol, relative to GOT.
6138 BFD_RELOC_CRIS_32_PLT_GOTREL
6140 32-bit offset to symbol with PLT entry, relative to GOT.
6142 BFD_RELOC_CRIS_32_PLT_PCREL
6144 32-bit offset to symbol with PLT entry, relative to this relocation.
6147 BFD_RELOC_CRIS_32_GOT_GD
6149 BFD_RELOC_CRIS_16_GOT_GD
6151 BFD_RELOC_CRIS_32_GD
6155 BFD_RELOC_CRIS_32_DTPREL
6157 BFD_RELOC_CRIS_16_DTPREL
6159 BFD_RELOC_CRIS_32_GOT_TPREL
6161 BFD_RELOC_CRIS_16_GOT_TPREL
6163 BFD_RELOC_CRIS_32_TPREL
6165 BFD_RELOC_CRIS_16_TPREL
6167 BFD_RELOC_CRIS_DTPMOD
6169 BFD_RELOC_CRIS_32_IE
6171 Relocs used in TLS code for CRIS.
6174 BFD_RELOC_OR1K_REL_26
6176 BFD_RELOC_OR1K_SLO16
6178 BFD_RELOC_OR1K_PCREL_PG21
6182 BFD_RELOC_OR1K_SLO13
6184 BFD_RELOC_OR1K_GOTPC_HI16
6186 BFD_RELOC_OR1K_GOTPC_LO16
6188 BFD_RELOC_OR1K_GOT16
6190 BFD_RELOC_OR1K_GOT_PG21
6192 BFD_RELOC_OR1K_GOT_LO13
6194 BFD_RELOC_OR1K_PLT26
6196 BFD_RELOC_OR1K_PLTA26
6198 BFD_RELOC_OR1K_GOTOFF_SLO16
6202 BFD_RELOC_OR1K_GLOB_DAT
6204 BFD_RELOC_OR1K_JMP_SLOT
6206 BFD_RELOC_OR1K_RELATIVE
6208 BFD_RELOC_OR1K_TLS_GD_HI16
6210 BFD_RELOC_OR1K_TLS_GD_LO16
6212 BFD_RELOC_OR1K_TLS_GD_PG21
6214 BFD_RELOC_OR1K_TLS_GD_LO13
6216 BFD_RELOC_OR1K_TLS_LDM_HI16
6218 BFD_RELOC_OR1K_TLS_LDM_LO16
6220 BFD_RELOC_OR1K_TLS_LDM_PG21
6222 BFD_RELOC_OR1K_TLS_LDM_LO13
6224 BFD_RELOC_OR1K_TLS_LDO_HI16
6226 BFD_RELOC_OR1K_TLS_LDO_LO16
6228 BFD_RELOC_OR1K_TLS_IE_HI16
6230 BFD_RELOC_OR1K_TLS_IE_AHI16
6232 BFD_RELOC_OR1K_TLS_IE_LO16
6234 BFD_RELOC_OR1K_TLS_IE_PG21
6236 BFD_RELOC_OR1K_TLS_IE_LO13
6238 BFD_RELOC_OR1K_TLS_LE_HI16
6240 BFD_RELOC_OR1K_TLS_LE_AHI16
6242 BFD_RELOC_OR1K_TLS_LE_LO16
6244 BFD_RELOC_OR1K_TLS_LE_SLO16
6246 BFD_RELOC_OR1K_TLS_TPOFF
6248 BFD_RELOC_OR1K_TLS_DTPOFF
6250 BFD_RELOC_OR1K_TLS_DTPMOD
6252 OpenRISC 1000 Relocations.
6255 BFD_RELOC_H8_DIR16A8
6257 BFD_RELOC_H8_DIR16R8
6259 BFD_RELOC_H8_DIR24A8
6261 BFD_RELOC_H8_DIR24R8
6263 BFD_RELOC_H8_DIR32A16
6265 BFD_RELOC_H8_DISP32A16
6270 BFD_RELOC_XSTORMY16_REL_12
6272 BFD_RELOC_XSTORMY16_12
6274 BFD_RELOC_XSTORMY16_24
6276 BFD_RELOC_XSTORMY16_FPTR16
6278 Sony Xstormy16 Relocations.
6283 Self-describing complex relocations.
6295 Infineon Relocations.
6298 BFD_RELOC_VAX_GLOB_DAT
6300 BFD_RELOC_VAX_JMP_SLOT
6302 BFD_RELOC_VAX_RELATIVE
6304 Relocations used by VAX ELF.
6309 Morpho MT - 16 bit immediate relocation.
6313 Morpho MT - Hi 16 bits of an address.
6317 Morpho MT - Low 16 bits of an address.
6319 BFD_RELOC_MT_GNU_VTINHERIT
6321 Morpho MT - Used to tell the linker which vtable entries are used.
6323 BFD_RELOC_MT_GNU_VTENTRY
6325 Morpho MT - Used to tell the linker which vtable entries are used.
6327 BFD_RELOC_MT_PCINSN8
6329 Morpho MT - 8 bit immediate relocation.
6332 BFD_RELOC_MSP430_10_PCREL
6334 BFD_RELOC_MSP430_16_PCREL
6338 BFD_RELOC_MSP430_16_PCREL_BYTE
6340 BFD_RELOC_MSP430_16_BYTE
6342 BFD_RELOC_MSP430_2X_PCREL
6344 BFD_RELOC_MSP430_RL_PCREL
6346 BFD_RELOC_MSP430_ABS8
6348 BFD_RELOC_MSP430X_PCR20_EXT_SRC
6350 BFD_RELOC_MSP430X_PCR20_EXT_DST
6352 BFD_RELOC_MSP430X_PCR20_EXT_ODST
6354 BFD_RELOC_MSP430X_ABS20_EXT_SRC
6356 BFD_RELOC_MSP430X_ABS20_EXT_DST
6358 BFD_RELOC_MSP430X_ABS20_EXT_ODST
6360 BFD_RELOC_MSP430X_ABS20_ADR_SRC
6362 BFD_RELOC_MSP430X_ABS20_ADR_DST
6364 BFD_RELOC_MSP430X_PCR16
6366 BFD_RELOC_MSP430X_PCR20_CALL
6368 BFD_RELOC_MSP430X_ABS16
6370 BFD_RELOC_MSP430_ABS_HI16
6372 BFD_RELOC_MSP430_PREL31
6374 BFD_RELOC_MSP430_SYM_DIFF
6376 msp430 specific relocation codes
6383 BFD_RELOC_NIOS2_CALL26
6385 BFD_RELOC_NIOS2_IMM5
6387 BFD_RELOC_NIOS2_CACHE_OPX
6389 BFD_RELOC_NIOS2_IMM6
6391 BFD_RELOC_NIOS2_IMM8
6393 BFD_RELOC_NIOS2_HI16
6395 BFD_RELOC_NIOS2_LO16
6397 BFD_RELOC_NIOS2_HIADJ16
6399 BFD_RELOC_NIOS2_GPREL
6401 BFD_RELOC_NIOS2_UJMP
6403 BFD_RELOC_NIOS2_CJMP
6405 BFD_RELOC_NIOS2_CALLR
6407 BFD_RELOC_NIOS2_ALIGN
6409 BFD_RELOC_NIOS2_GOT16
6411 BFD_RELOC_NIOS2_CALL16
6413 BFD_RELOC_NIOS2_GOTOFF_LO
6415 BFD_RELOC_NIOS2_GOTOFF_HA
6417 BFD_RELOC_NIOS2_PCREL_LO
6419 BFD_RELOC_NIOS2_PCREL_HA
6421 BFD_RELOC_NIOS2_TLS_GD16
6423 BFD_RELOC_NIOS2_TLS_LDM16
6425 BFD_RELOC_NIOS2_TLS_LDO16
6427 BFD_RELOC_NIOS2_TLS_IE16
6429 BFD_RELOC_NIOS2_TLS_LE16
6431 BFD_RELOC_NIOS2_TLS_DTPMOD
6433 BFD_RELOC_NIOS2_TLS_DTPREL
6435 BFD_RELOC_NIOS2_TLS_TPREL
6437 BFD_RELOC_NIOS2_COPY
6439 BFD_RELOC_NIOS2_GLOB_DAT
6441 BFD_RELOC_NIOS2_JUMP_SLOT
6443 BFD_RELOC_NIOS2_RELATIVE
6445 BFD_RELOC_NIOS2_GOTOFF
6447 BFD_RELOC_NIOS2_CALL26_NOAT
6449 BFD_RELOC_NIOS2_GOT_LO
6451 BFD_RELOC_NIOS2_GOT_HA
6453 BFD_RELOC_NIOS2_CALL_LO
6455 BFD_RELOC_NIOS2_CALL_HA
6457 BFD_RELOC_NIOS2_R2_S12
6459 BFD_RELOC_NIOS2_R2_I10_1_PCREL
6461 BFD_RELOC_NIOS2_R2_T1I7_1_PCREL
6463 BFD_RELOC_NIOS2_R2_T1I7_2
6465 BFD_RELOC_NIOS2_R2_T2I4
6467 BFD_RELOC_NIOS2_R2_T2I4_1
6469 BFD_RELOC_NIOS2_R2_T2I4_2
6471 BFD_RELOC_NIOS2_R2_X1I7_2
6473 BFD_RELOC_NIOS2_R2_X2L5
6475 BFD_RELOC_NIOS2_R2_F1I5_2
6477 BFD_RELOC_NIOS2_R2_L5I4X1
6479 BFD_RELOC_NIOS2_R2_T1X1I6
6481 BFD_RELOC_NIOS2_R2_T1X1I6_2
6483 Relocations used by the Altera Nios II core.
6488 PRU LDI 16-bit unsigned data-memory relocation.
6490 BFD_RELOC_PRU_U16_PMEMIMM
6492 PRU LDI 16-bit unsigned instruction-memory relocation.
6496 PRU relocation for two consecutive LDI load instructions that load a
6497 32 bit value into a register. If the higher bits are all zero, then
6498 the second instruction may be relaxed.
6500 BFD_RELOC_PRU_S10_PCREL
6502 PRU QBBx 10-bit signed PC-relative relocation.
6504 BFD_RELOC_PRU_U8_PCREL
6506 PRU 8-bit unsigned relocation used for the LOOP instruction.
6508 BFD_RELOC_PRU_32_PMEM
6510 BFD_RELOC_PRU_16_PMEM
6512 PRU Program Memory relocations. Used to convert from byte addressing to
6513 32-bit word addressing.
6515 BFD_RELOC_PRU_GNU_DIFF8
6517 BFD_RELOC_PRU_GNU_DIFF16
6519 BFD_RELOC_PRU_GNU_DIFF32
6521 BFD_RELOC_PRU_GNU_DIFF16_PMEM
6523 BFD_RELOC_PRU_GNU_DIFF32_PMEM
6525 PRU relocations to mark the difference of two local symbols.
6526 These are only needed to support linker relaxation and can be ignored
6527 when not relaxing. The field is set to the value of the difference
6528 assuming no relaxation. The relocation encodes the position of the
6529 second symbol so the linker can determine whether to adjust the field
6530 value. The PMEM variants encode the word difference, instead of byte
6531 difference between symbols.
6534 BFD_RELOC_IQ2000_OFFSET_16
6536 BFD_RELOC_IQ2000_OFFSET_21
6538 BFD_RELOC_IQ2000_UHI16
6543 BFD_RELOC_XTENSA_RTLD
6545 Special Xtensa relocation used only by PLT entries in ELF shared
6546 objects to indicate that the runtime linker should set the value
6547 to one of its own internal functions or data structures.
6549 BFD_RELOC_XTENSA_GLOB_DAT
6551 BFD_RELOC_XTENSA_JMP_SLOT
6553 BFD_RELOC_XTENSA_RELATIVE
6555 Xtensa relocations for ELF shared objects.
6557 BFD_RELOC_XTENSA_PLT
6559 Xtensa relocation used in ELF object files for symbols that may require
6560 PLT entries. Otherwise, this is just a generic 32-bit relocation.
6562 BFD_RELOC_XTENSA_DIFF8
6564 BFD_RELOC_XTENSA_DIFF16
6566 BFD_RELOC_XTENSA_DIFF32
6568 Xtensa relocations to mark the difference of two local symbols.
6569 These are only needed to support linker relaxation and can be ignored
6570 when not relaxing. The field is set to the value of the difference
6571 assuming no relaxation. The relocation encodes the position of the
6572 first symbol so the linker can determine whether to adjust the field
6575 BFD_RELOC_XTENSA_SLOT0_OP
6577 BFD_RELOC_XTENSA_SLOT1_OP
6579 BFD_RELOC_XTENSA_SLOT2_OP
6581 BFD_RELOC_XTENSA_SLOT3_OP
6583 BFD_RELOC_XTENSA_SLOT4_OP
6585 BFD_RELOC_XTENSA_SLOT5_OP
6587 BFD_RELOC_XTENSA_SLOT6_OP
6589 BFD_RELOC_XTENSA_SLOT7_OP
6591 BFD_RELOC_XTENSA_SLOT8_OP
6593 BFD_RELOC_XTENSA_SLOT9_OP
6595 BFD_RELOC_XTENSA_SLOT10_OP
6597 BFD_RELOC_XTENSA_SLOT11_OP
6599 BFD_RELOC_XTENSA_SLOT12_OP
6601 BFD_RELOC_XTENSA_SLOT13_OP
6603 BFD_RELOC_XTENSA_SLOT14_OP
6605 Generic Xtensa relocations for instruction operands. Only the slot
6606 number is encoded in the relocation. The relocation applies to the
6607 last PC-relative immediate operand, or if there are no PC-relative
6608 immediates, to the last immediate operand.
6610 BFD_RELOC_XTENSA_SLOT0_ALT
6612 BFD_RELOC_XTENSA_SLOT1_ALT
6614 BFD_RELOC_XTENSA_SLOT2_ALT
6616 BFD_RELOC_XTENSA_SLOT3_ALT
6618 BFD_RELOC_XTENSA_SLOT4_ALT
6620 BFD_RELOC_XTENSA_SLOT5_ALT
6622 BFD_RELOC_XTENSA_SLOT6_ALT
6624 BFD_RELOC_XTENSA_SLOT7_ALT
6626 BFD_RELOC_XTENSA_SLOT8_ALT
6628 BFD_RELOC_XTENSA_SLOT9_ALT
6630 BFD_RELOC_XTENSA_SLOT10_ALT
6632 BFD_RELOC_XTENSA_SLOT11_ALT
6634 BFD_RELOC_XTENSA_SLOT12_ALT
6636 BFD_RELOC_XTENSA_SLOT13_ALT
6638 BFD_RELOC_XTENSA_SLOT14_ALT
6640 Alternate Xtensa relocations. Only the slot is encoded in the
6641 relocation. The meaning of these relocations is opcode-specific.
6643 BFD_RELOC_XTENSA_OP0
6645 BFD_RELOC_XTENSA_OP1
6647 BFD_RELOC_XTENSA_OP2
6649 Xtensa relocations for backward compatibility. These have all been
6650 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
6652 BFD_RELOC_XTENSA_ASM_EXPAND
6654 Xtensa relocation to mark that the assembler expanded the
6655 instructions from an original target. The expansion size is
6656 encoded in the reloc size.
6658 BFD_RELOC_XTENSA_ASM_SIMPLIFY
6660 Xtensa relocation to mark that the linker should simplify
6661 assembler-expanded instructions. This is commonly used
6662 internally by the linker after analysis of a
6663 BFD_RELOC_XTENSA_ASM_EXPAND.
6665 BFD_RELOC_XTENSA_TLSDESC_FN
6667 BFD_RELOC_XTENSA_TLSDESC_ARG
6669 BFD_RELOC_XTENSA_TLS_DTPOFF
6671 BFD_RELOC_XTENSA_TLS_TPOFF
6673 BFD_RELOC_XTENSA_TLS_FUNC
6675 BFD_RELOC_XTENSA_TLS_ARG
6677 BFD_RELOC_XTENSA_TLS_CALL
6679 Xtensa TLS relocations.
6684 8 bit signed offset in (ix+d) or (iy+d).
6702 BFD_RELOC_LM32_BRANCH
6704 BFD_RELOC_LM32_16_GOT
6706 BFD_RELOC_LM32_GOTOFF_HI16
6708 BFD_RELOC_LM32_GOTOFF_LO16
6712 BFD_RELOC_LM32_GLOB_DAT
6714 BFD_RELOC_LM32_JMP_SLOT
6716 BFD_RELOC_LM32_RELATIVE
6718 Lattice Mico32 relocations.
6721 BFD_RELOC_MACH_O_SECTDIFF
6723 Difference between two section addreses. Must be followed by a
6724 BFD_RELOC_MACH_O_PAIR.
6726 BFD_RELOC_MACH_O_LOCAL_SECTDIFF
6728 Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol.
6730 BFD_RELOC_MACH_O_PAIR
6732 Pair of relocation. Contains the first symbol.
6734 BFD_RELOC_MACH_O_SUBTRACTOR32
6736 Symbol will be substracted. Must be followed by a BFD_RELOC_32.
6738 BFD_RELOC_MACH_O_SUBTRACTOR64
6740 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
6743 BFD_RELOC_MACH_O_X86_64_BRANCH32
6745 BFD_RELOC_MACH_O_X86_64_BRANCH8
6747 PCREL relocations. They are marked as branch to create PLT entry if
6750 BFD_RELOC_MACH_O_X86_64_GOT
6752 Used when referencing a GOT entry.
6754 BFD_RELOC_MACH_O_X86_64_GOT_LOAD
6756 Used when loading a GOT entry with movq. It is specially marked so that
6757 the linker could optimize the movq to a leaq if possible.
6759 BFD_RELOC_MACH_O_X86_64_PCREL32_1
6761 Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
6763 BFD_RELOC_MACH_O_X86_64_PCREL32_2
6765 Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
6767 BFD_RELOC_MACH_O_X86_64_PCREL32_4
6769 Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
6771 BFD_RELOC_MACH_O_X86_64_TLV
6773 Used when referencing a TLV entry.
6777 BFD_RELOC_MACH_O_ARM64_ADDEND
6779 Addend for PAGE or PAGEOFF.
6781 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21
6783 Relative offset to page of GOT slot.
6785 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12
6787 Relative offset within page of GOT slot.
6789 BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT
6791 Address of a GOT entry.
6794 BFD_RELOC_MICROBLAZE_32_LO
6796 This is a 32 bit reloc for the microblaze that stores the
6797 low 16 bits of a value
6799 BFD_RELOC_MICROBLAZE_32_LO_PCREL
6801 This is a 32 bit pc-relative reloc for the microblaze that
6802 stores the low 16 bits of a value
6804 BFD_RELOC_MICROBLAZE_32_ROSDA
6806 This is a 32 bit reloc for the microblaze that stores a
6807 value relative to the read-only small data area anchor
6809 BFD_RELOC_MICROBLAZE_32_RWSDA
6811 This is a 32 bit reloc for the microblaze that stores a
6812 value relative to the read-write small data area anchor
6814 BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
6816 This is a 32 bit reloc for the microblaze to handle
6817 expressions of the form "Symbol Op Symbol"
6819 BFD_RELOC_MICROBLAZE_64_NONE
6821 This is a 64 bit reloc that stores the 32 bit pc relative
6822 value in two words (with an imm instruction). No relocation is
6823 done here - only used for relaxing
6825 BFD_RELOC_MICROBLAZE_64_GOTPC
6827 This is a 64 bit reloc that stores the 32 bit pc relative
6828 value in two words (with an imm instruction). The relocation is
6829 PC-relative GOT offset
6831 BFD_RELOC_MICROBLAZE_64_GOT
6833 This is a 64 bit reloc that stores the 32 bit pc relative
6834 value in two words (with an imm instruction). The relocation is
6837 BFD_RELOC_MICROBLAZE_64_PLT
6839 This is a 64 bit reloc that stores the 32 bit pc relative
6840 value in two words (with an imm instruction). The relocation is
6841 PC-relative offset into PLT
6843 BFD_RELOC_MICROBLAZE_64_GOTOFF
6845 This is a 64 bit reloc that stores the 32 bit GOT relative
6846 value in two words (with an imm instruction). The relocation is
6847 relative offset from _GLOBAL_OFFSET_TABLE_
6849 BFD_RELOC_MICROBLAZE_32_GOTOFF
6851 This is a 32 bit reloc that stores the 32 bit GOT relative
6852 value in a word. The relocation is relative offset from
6853 _GLOBAL_OFFSET_TABLE_
6855 BFD_RELOC_MICROBLAZE_COPY
6857 This is used to tell the dynamic linker to copy the value out of
6858 the dynamic object into the runtime process image.
6860 BFD_RELOC_MICROBLAZE_64_TLS
6864 BFD_RELOC_MICROBLAZE_64_TLSGD
6866 This is a 64 bit reloc that stores the 32 bit GOT relative value
6867 of the GOT TLS GD info entry in two words (with an imm instruction). The
6868 relocation is GOT offset.
6870 BFD_RELOC_MICROBLAZE_64_TLSLD
6872 This is a 64 bit reloc that stores the 32 bit GOT relative value
6873 of the GOT TLS LD info entry in two words (with an imm instruction). The
6874 relocation is GOT offset.
6876 BFD_RELOC_MICROBLAZE_32_TLSDTPMOD
6878 This is a 32 bit reloc that stores the Module ID to GOT(n).
6880 BFD_RELOC_MICROBLAZE_32_TLSDTPREL
6882 This is a 32 bit reloc that stores TLS offset to GOT(n+1).
6884 BFD_RELOC_MICROBLAZE_64_TLSDTPREL
6886 This is a 32 bit reloc for storing TLS offset to two words (uses imm
6889 BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL
6891 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6892 to two words (uses imm instruction).
6894 BFD_RELOC_MICROBLAZE_64_TLSTPREL
6896 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6897 to two words (uses imm instruction).
6899 BFD_RELOC_MICROBLAZE_64_TEXTPCREL
6901 This is a 64 bit reloc that stores the 32 bit pc relative
6902 value in two words (with an imm instruction). The relocation is
6903 PC-relative offset from start of TEXT.
6905 BFD_RELOC_MICROBLAZE_64_TEXTREL
6907 This is a 64 bit reloc that stores the 32 bit offset
6908 value in two words (with an imm instruction). The relocation is
6909 relative offset from start of TEXT.
6912 BFD_RELOC_AARCH64_RELOC_START
6914 AArch64 pseudo relocation code to mark the start of the AArch64
6915 relocation enumerators. N.B. the order of the enumerators is
6916 important as several tables in the AArch64 bfd backend are indexed
6917 by these enumerators; make sure they are all synced.
6919 BFD_RELOC_AARCH64_NULL
6921 Deprecated AArch64 null relocation code.
6923 BFD_RELOC_AARCH64_NONE
6925 AArch64 null relocation code.
6927 BFD_RELOC_AARCH64_64
6929 BFD_RELOC_AARCH64_32
6931 BFD_RELOC_AARCH64_16
6933 Basic absolute relocations of N bits. These are equivalent to
6934 BFD_RELOC_N and they were added to assist the indexing of the howto
6937 BFD_RELOC_AARCH64_64_PCREL
6939 BFD_RELOC_AARCH64_32_PCREL
6941 BFD_RELOC_AARCH64_16_PCREL
6943 PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
6944 and they were added to assist the indexing of the howto table.
6946 BFD_RELOC_AARCH64_MOVW_G0
6948 AArch64 MOV[NZK] instruction with most significant bits 0 to 15
6949 of an unsigned address/value.
6951 BFD_RELOC_AARCH64_MOVW_G0_NC
6953 AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
6954 an address/value. No overflow checking.
6956 BFD_RELOC_AARCH64_MOVW_G1
6958 AArch64 MOV[NZK] instruction with most significant bits 16 to 31
6959 of an unsigned address/value.
6961 BFD_RELOC_AARCH64_MOVW_G1_NC
6963 AArch64 MOV[NZK] instruction with less significant bits 16 to 31
6964 of an address/value. No overflow checking.
6966 BFD_RELOC_AARCH64_MOVW_G2
6968 AArch64 MOV[NZK] instruction with most significant bits 32 to 47
6969 of an unsigned address/value.
6971 BFD_RELOC_AARCH64_MOVW_G2_NC
6973 AArch64 MOV[NZK] instruction with less significant bits 32 to 47
6974 of an address/value. No overflow checking.
6976 BFD_RELOC_AARCH64_MOVW_G3
6978 AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
6979 of a signed or unsigned address/value.
6981 BFD_RELOC_AARCH64_MOVW_G0_S
6983 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
6984 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6987 BFD_RELOC_AARCH64_MOVW_G1_S
6989 AArch64 MOV[NZ] instruction with most significant bits 16 to 31
6990 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6993 BFD_RELOC_AARCH64_MOVW_G2_S
6995 AArch64 MOV[NZ] instruction with most significant bits 32 to 47
6996 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6999 BFD_RELOC_AARCH64_MOVW_PREL_G0
7001 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
7002 of a signed value. Changes instruction to MOVZ or MOVN depending on the
7005 BFD_RELOC_AARCH64_MOVW_PREL_G0_NC
7007 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
7008 of a signed value. Changes instruction to MOVZ or MOVN depending on the
7011 BFD_RELOC_AARCH64_MOVW_PREL_G1
7013 AArch64 MOVK instruction with most significant bits 16 to 31
7016 BFD_RELOC_AARCH64_MOVW_PREL_G1_NC
7018 AArch64 MOVK instruction with most significant bits 16 to 31
7021 BFD_RELOC_AARCH64_MOVW_PREL_G2
7023 AArch64 MOVK instruction with most significant bits 32 to 47
7026 BFD_RELOC_AARCH64_MOVW_PREL_G2_NC
7028 AArch64 MOVK instruction with most significant bits 32 to 47
7031 BFD_RELOC_AARCH64_MOVW_PREL_G3
7033 AArch64 MOVK instruction with most significant bits 47 to 63
7036 BFD_RELOC_AARCH64_LD_LO19_PCREL
7038 AArch64 Load Literal instruction, holding a 19 bit pc-relative word
7039 offset. The lowest two bits must be zero and are not stored in the
7040 instruction, giving a 21 bit signed byte offset.
7042 BFD_RELOC_AARCH64_ADR_LO21_PCREL
7044 AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
7046 BFD_RELOC_AARCH64_ADR_HI21_PCREL
7048 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
7049 offset, giving a 4KB aligned page base address.
7051 BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
7053 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
7054 offset, giving a 4KB aligned page base address, but with no overflow
7057 BFD_RELOC_AARCH64_ADD_LO12
7059 AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
7060 Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7062 BFD_RELOC_AARCH64_LDST8_LO12
7064 AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
7065 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7067 BFD_RELOC_AARCH64_TSTBR14
7069 AArch64 14 bit pc-relative test bit and branch.
7070 The lowest two bits must be zero and are not stored in the instruction,
7071 giving a 16 bit signed byte offset.
7073 BFD_RELOC_AARCH64_BRANCH19
7075 AArch64 19 bit pc-relative conditional branch and compare & branch.
7076 The lowest two bits must be zero and are not stored in the instruction,
7077 giving a 21 bit signed byte offset.
7079 BFD_RELOC_AARCH64_JUMP26
7081 AArch64 26 bit pc-relative unconditional branch.
7082 The lowest two bits must be zero and are not stored in the instruction,
7083 giving a 28 bit signed byte offset.
7085 BFD_RELOC_AARCH64_CALL26
7087 AArch64 26 bit pc-relative unconditional branch and link.
7088 The lowest two bits must be zero and are not stored in the instruction,
7089 giving a 28 bit signed byte offset.
7091 BFD_RELOC_AARCH64_LDST16_LO12
7093 AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
7094 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7096 BFD_RELOC_AARCH64_LDST32_LO12
7098 AArch64 32-bit load/store instruction, holding bits 0 to 11 of the
7099 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7101 BFD_RELOC_AARCH64_LDST64_LO12
7103 AArch64 64-bit load/store instruction, holding bits 0 to 11 of the
7104 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7106 BFD_RELOC_AARCH64_LDST128_LO12
7108 AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
7109 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7111 BFD_RELOC_AARCH64_GOT_LD_PREL19
7113 AArch64 Load Literal instruction, holding a 19 bit PC relative word
7114 offset of the global offset table entry for a symbol. The lowest two
7115 bits must be zero and are not stored in the instruction, giving a 21
7116 bit signed byte offset. This relocation type requires signed overflow
7119 BFD_RELOC_AARCH64_ADR_GOT_PAGE
7121 Get to the page base of the global offset table entry for a symbol as
7122 part of an ADRP instruction using a 21 bit PC relative value.Used in
7123 conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
7125 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
7127 Unsigned 12 bit byte offset for 64 bit load/store from the page of
7128 the GOT entry for this symbol. Used in conjunction with
7129 BFD_RELOC_AARCH64_ADR_GOT_PAGE. Valid in LP64 ABI only.
7131 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
7133 Unsigned 12 bit byte offset for 32 bit load/store from the page of
7134 the GOT entry for this symbol. Used in conjunction with
7135 BFD_RELOC_AARCH64_ADR_GOT_PAGE. Valid in ILP32 ABI only.
7137 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
7139 Unsigned 16 bit byte offset for 64 bit load/store from the GOT entry
7140 for this symbol. Valid in LP64 ABI only.
7142 BFD_RELOC_AARCH64_MOVW_GOTOFF_G1
7144 Unsigned 16 bit byte higher offset for 64 bit load/store from the GOT entry
7145 for this symbol. Valid in LP64 ABI only.
7147 BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
7149 Unsigned 15 bit byte offset for 64 bit load/store from the page of
7150 the GOT entry for this symbol. Valid in LP64 ABI only.
7152 BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
7154 Scaled 14 bit byte offset to the page base of the global offset table.
7156 BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
7158 Scaled 15 bit byte offset to the page base of the global offset table.
7160 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
7162 Get to the page base of the global offset table entry for a symbols
7163 tls_index structure as part of an adrp instruction using a 21 bit PC
7164 relative value. Used in conjunction with
7165 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
7167 BFD_RELOC_AARCH64_TLSGD_ADR_PREL21
7169 AArch64 TLS General Dynamic
7171 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
7173 Unsigned 12 bit byte offset to global offset table entry for a symbols
7174 tls_index structure. Used in conjunction with
7175 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
7177 BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC
7179 AArch64 TLS General Dynamic relocation.
7181 BFD_RELOC_AARCH64_TLSGD_MOVW_G1
7183 AArch64 TLS General Dynamic relocation.
7185 BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
7187 AArch64 TLS INITIAL EXEC relocation.
7189 BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
7191 AArch64 TLS INITIAL EXEC relocation.
7193 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
7195 AArch64 TLS INITIAL EXEC relocation.
7197 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
7199 AArch64 TLS INITIAL EXEC relocation.
7201 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
7203 AArch64 TLS INITIAL EXEC relocation.
7205 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
7207 AArch64 TLS INITIAL EXEC relocation.
7209 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
7211 bit[23:12] of byte offset to module TLS base address.
7213 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
7215 Unsigned 12 bit byte offset to module TLS base address.
7217 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
7219 No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
7221 BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
7223 Unsigned 12 bit byte offset to global offset table entry for a symbols
7224 tls_index structure. Used in conjunction with
7225 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
7227 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
7229 GOT entry page address for AArch64 TLS Local Dynamic, used with ADRP
7232 BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
7234 GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.
7236 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12
7238 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7241 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC
7243 Similar as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.
7245 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12
7247 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7250 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC
7252 Similar as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.
7254 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12
7256 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7259 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC
7261 Similar as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.
7263 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12
7265 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7268 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC
7270 Similar as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.
7272 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7274 bit[15:0] of byte offset to module TLS base address.
7276 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
7278 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7280 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7282 bit[31:16] of byte offset to module TLS base address.
7284 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
7286 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7288 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
7290 bit[47:32] of byte offset to module TLS base address.
7292 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
7294 AArch64 TLS LOCAL EXEC relocation.
7296 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
7298 AArch64 TLS LOCAL EXEC relocation.
7300 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
7302 AArch64 TLS LOCAL EXEC relocation.
7304 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
7306 AArch64 TLS LOCAL EXEC relocation.
7308 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
7310 AArch64 TLS LOCAL EXEC relocation.
7312 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
7314 AArch64 TLS LOCAL EXEC relocation.
7316 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
7318 AArch64 TLS LOCAL EXEC relocation.
7320 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
7322 AArch64 TLS LOCAL EXEC relocation.
7324 BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12
7326 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7329 BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC
7331 Similar as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check.
7333 BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12
7335 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7338 BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC
7340 Similar as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check.
7342 BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12
7344 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7347 BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC
7349 Similar as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check.
7351 BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12
7353 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7356 BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC
7358 Similar as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check.
7360 BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
7362 AArch64 TLS DESC relocation.
7364 BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
7366 AArch64 TLS DESC relocation.
7368 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
7370 AArch64 TLS DESC relocation.
7372 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12
7374 AArch64 TLS DESC relocation.
7376 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
7378 AArch64 TLS DESC relocation.
7380 BFD_RELOC_AARCH64_TLSDESC_ADD_LO12
7382 AArch64 TLS DESC relocation.
7384 BFD_RELOC_AARCH64_TLSDESC_OFF_G1
7386 AArch64 TLS DESC relocation.
7388 BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
7390 AArch64 TLS DESC relocation.
7392 BFD_RELOC_AARCH64_TLSDESC_LDR
7394 AArch64 TLS DESC relocation.
7396 BFD_RELOC_AARCH64_TLSDESC_ADD
7398 AArch64 TLS DESC relocation.
7400 BFD_RELOC_AARCH64_TLSDESC_CALL
7402 AArch64 TLS DESC relocation.
7404 BFD_RELOC_AARCH64_COPY
7406 AArch64 TLS relocation.
7408 BFD_RELOC_AARCH64_GLOB_DAT
7410 AArch64 TLS relocation.
7412 BFD_RELOC_AARCH64_JUMP_SLOT
7414 AArch64 TLS relocation.
7416 BFD_RELOC_AARCH64_RELATIVE
7418 AArch64 TLS relocation.
7420 BFD_RELOC_AARCH64_TLS_DTPMOD
7422 AArch64 TLS relocation.
7424 BFD_RELOC_AARCH64_TLS_DTPREL
7426 AArch64 TLS relocation.
7428 BFD_RELOC_AARCH64_TLS_TPREL
7430 AArch64 TLS relocation.
7432 BFD_RELOC_AARCH64_TLSDESC
7434 AArch64 TLS relocation.
7436 BFD_RELOC_AARCH64_IRELATIVE
7438 AArch64 support for STT_GNU_IFUNC.
7440 BFD_RELOC_AARCH64_RELOC_END
7442 AArch64 pseudo relocation code to mark the end of the AArch64
7443 relocation enumerators that have direct mapping to ELF reloc codes.
7444 There are a few more enumerators after this one; those are mainly
7445 used by the AArch64 assembler for the internal fixup or to select
7446 one of the above enumerators.
7448 BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
7450 AArch64 pseudo relocation code to be used internally by the AArch64
7451 assembler and not (currently) written to any object files.
7453 BFD_RELOC_AARCH64_LDST_LO12
7455 AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
7456 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7458 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
7460 AArch64 pseudo relocation code for TLS local dynamic mode. It's to be
7461 used internally by the AArch64 assembler and not (currently) written to
7464 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
7466 Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.
7468 BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12
7470 AArch64 pseudo relocation code for TLS local exec mode. It's to be
7471 used internally by the AArch64 assembler and not (currently) written to
7474 BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC
7476 Similar as BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12, but no overflow check.
7478 BFD_RELOC_AARCH64_LD_GOT_LO12_NC
7480 AArch64 pseudo relocation code to be used internally by the AArch64
7481 assembler and not (currently) written to any object files.
7483 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
7485 AArch64 pseudo relocation code to be used internally by the AArch64
7486 assembler and not (currently) written to any object files.
7488 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
7490 AArch64 pseudo relocation code to be used internally by the AArch64
7491 assembler and not (currently) written to any object files.
7493 BFD_RELOC_TILEPRO_COPY
7495 BFD_RELOC_TILEPRO_GLOB_DAT
7497 BFD_RELOC_TILEPRO_JMP_SLOT
7499 BFD_RELOC_TILEPRO_RELATIVE
7501 BFD_RELOC_TILEPRO_BROFF_X1
7503 BFD_RELOC_TILEPRO_JOFFLONG_X1
7505 BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
7507 BFD_RELOC_TILEPRO_IMM8_X0
7509 BFD_RELOC_TILEPRO_IMM8_Y0
7511 BFD_RELOC_TILEPRO_IMM8_X1
7513 BFD_RELOC_TILEPRO_IMM8_Y1
7515 BFD_RELOC_TILEPRO_DEST_IMM8_X1
7517 BFD_RELOC_TILEPRO_MT_IMM15_X1
7519 BFD_RELOC_TILEPRO_MF_IMM15_X1
7521 BFD_RELOC_TILEPRO_IMM16_X0
7523 BFD_RELOC_TILEPRO_IMM16_X1
7525 BFD_RELOC_TILEPRO_IMM16_X0_LO
7527 BFD_RELOC_TILEPRO_IMM16_X1_LO
7529 BFD_RELOC_TILEPRO_IMM16_X0_HI
7531 BFD_RELOC_TILEPRO_IMM16_X1_HI
7533 BFD_RELOC_TILEPRO_IMM16_X0_HA
7535 BFD_RELOC_TILEPRO_IMM16_X1_HA
7537 BFD_RELOC_TILEPRO_IMM16_X0_PCREL
7539 BFD_RELOC_TILEPRO_IMM16_X1_PCREL
7541 BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
7543 BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
7545 BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
7547 BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
7549 BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
7551 BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
7553 BFD_RELOC_TILEPRO_IMM16_X0_GOT
7555 BFD_RELOC_TILEPRO_IMM16_X1_GOT
7557 BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
7559 BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
7561 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
7563 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
7565 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
7567 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
7569 BFD_RELOC_TILEPRO_MMSTART_X0
7571 BFD_RELOC_TILEPRO_MMEND_X0
7573 BFD_RELOC_TILEPRO_MMSTART_X1
7575 BFD_RELOC_TILEPRO_MMEND_X1
7577 BFD_RELOC_TILEPRO_SHAMT_X0
7579 BFD_RELOC_TILEPRO_SHAMT_X1
7581 BFD_RELOC_TILEPRO_SHAMT_Y0
7583 BFD_RELOC_TILEPRO_SHAMT_Y1
7585 BFD_RELOC_TILEPRO_TLS_GD_CALL
7587 BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD
7589 BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD
7591 BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD
7593 BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD
7595 BFD_RELOC_TILEPRO_TLS_IE_LOAD
7597 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
7599 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
7601 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
7603 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
7605 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
7607 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
7609 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
7611 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
7613 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
7615 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
7617 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
7619 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
7621 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
7623 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
7625 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
7627 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
7629 BFD_RELOC_TILEPRO_TLS_DTPMOD32
7631 BFD_RELOC_TILEPRO_TLS_DTPOFF32
7633 BFD_RELOC_TILEPRO_TLS_TPOFF32
7635 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE
7637 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE
7639 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO
7641 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO
7643 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI
7645 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI
7647 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA
7649 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA
7651 Tilera TILEPro Relocations.
7653 BFD_RELOC_TILEGX_HW0
7655 BFD_RELOC_TILEGX_HW1
7657 BFD_RELOC_TILEGX_HW2
7659 BFD_RELOC_TILEGX_HW3
7661 BFD_RELOC_TILEGX_HW0_LAST
7663 BFD_RELOC_TILEGX_HW1_LAST
7665 BFD_RELOC_TILEGX_HW2_LAST
7667 BFD_RELOC_TILEGX_COPY
7669 BFD_RELOC_TILEGX_GLOB_DAT
7671 BFD_RELOC_TILEGX_JMP_SLOT
7673 BFD_RELOC_TILEGX_RELATIVE
7675 BFD_RELOC_TILEGX_BROFF_X1
7677 BFD_RELOC_TILEGX_JUMPOFF_X1
7679 BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
7681 BFD_RELOC_TILEGX_IMM8_X0
7683 BFD_RELOC_TILEGX_IMM8_Y0
7685 BFD_RELOC_TILEGX_IMM8_X1
7687 BFD_RELOC_TILEGX_IMM8_Y1
7689 BFD_RELOC_TILEGX_DEST_IMM8_X1
7691 BFD_RELOC_TILEGX_MT_IMM14_X1
7693 BFD_RELOC_TILEGX_MF_IMM14_X1
7695 BFD_RELOC_TILEGX_MMSTART_X0
7697 BFD_RELOC_TILEGX_MMEND_X0
7699 BFD_RELOC_TILEGX_SHAMT_X0
7701 BFD_RELOC_TILEGX_SHAMT_X1
7703 BFD_RELOC_TILEGX_SHAMT_Y0
7705 BFD_RELOC_TILEGX_SHAMT_Y1
7707 BFD_RELOC_TILEGX_IMM16_X0_HW0
7709 BFD_RELOC_TILEGX_IMM16_X1_HW0
7711 BFD_RELOC_TILEGX_IMM16_X0_HW1
7713 BFD_RELOC_TILEGX_IMM16_X1_HW1
7715 BFD_RELOC_TILEGX_IMM16_X0_HW2
7717 BFD_RELOC_TILEGX_IMM16_X1_HW2
7719 BFD_RELOC_TILEGX_IMM16_X0_HW3
7721 BFD_RELOC_TILEGX_IMM16_X1_HW3
7723 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
7725 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
7727 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
7729 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
7731 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
7733 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
7735 BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
7737 BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
7739 BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
7741 BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
7743 BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
7745 BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
7747 BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
7749 BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
7751 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
7753 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
7755 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
7757 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
7759 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
7761 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
7763 BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
7765 BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
7767 BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL
7769 BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL
7771 BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL
7773 BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL
7775 BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL
7777 BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL
7779 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
7781 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
7783 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
7785 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
7787 BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL
7789 BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL
7791 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
7793 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
7795 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE
7797 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE
7799 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE
7801 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE
7803 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE
7805 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE
7807 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
7809 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
7811 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
7813 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
7815 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
7817 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
7819 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL
7821 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL
7823 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL
7825 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL
7827 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL
7829 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL
7831 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
7833 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
7835 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
7837 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
7839 BFD_RELOC_TILEGX_TLS_DTPMOD64
7841 BFD_RELOC_TILEGX_TLS_DTPOFF64
7843 BFD_RELOC_TILEGX_TLS_TPOFF64
7845 BFD_RELOC_TILEGX_TLS_DTPMOD32
7847 BFD_RELOC_TILEGX_TLS_DTPOFF32
7849 BFD_RELOC_TILEGX_TLS_TPOFF32
7851 BFD_RELOC_TILEGX_TLS_GD_CALL
7853 BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD
7855 BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD
7857 BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD
7859 BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD
7861 BFD_RELOC_TILEGX_TLS_IE_LOAD
7863 BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD
7865 BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD
7867 BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD
7869 BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD
7871 Tilera TILE-Gx Relocations.
7874 BFD_RELOC_EPIPHANY_SIMM8
7876 Adapteva EPIPHANY - 8 bit signed pc-relative displacement
7878 BFD_RELOC_EPIPHANY_SIMM24
7880 Adapteva EPIPHANY - 24 bit signed pc-relative displacement
7882 BFD_RELOC_EPIPHANY_HIGH
7884 Adapteva EPIPHANY - 16 most-significant bits of absolute address
7886 BFD_RELOC_EPIPHANY_LOW
7888 Adapteva EPIPHANY - 16 least-significant bits of absolute address
7890 BFD_RELOC_EPIPHANY_SIMM11
7892 Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
7894 BFD_RELOC_EPIPHANY_IMM11
7896 Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement)
7898 BFD_RELOC_EPIPHANY_IMM8
7900 Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
7903 BFD_RELOC_VISIUM_HI16
7905 BFD_RELOC_VISIUM_LO16
7907 BFD_RELOC_VISIUM_IM16
7909 BFD_RELOC_VISIUM_REL16
7911 BFD_RELOC_VISIUM_HI16_PCREL
7913 BFD_RELOC_VISIUM_LO16_PCREL
7915 BFD_RELOC_VISIUM_IM16_PCREL
7920 BFD_RELOC_WASM32_LEB128
7922 BFD_RELOC_WASM32_LEB128_GOT
7924 BFD_RELOC_WASM32_LEB128_GOT_CODE
7926 BFD_RELOC_WASM32_LEB128_PLT
7928 BFD_RELOC_WASM32_PLT_INDEX
7930 BFD_RELOC_WASM32_ABS32_CODE
7932 BFD_RELOC_WASM32_COPY
7934 BFD_RELOC_WASM32_CODE_POINTER
7936 BFD_RELOC_WASM32_INDEX
7938 BFD_RELOC_WASM32_PLT_SIG
7940 WebAssembly relocations.
7943 BFD_RELOC_CKCORE_NONE
7945 BFD_RELOC_CKCORE_ADDR32
7947 BFD_RELOC_CKCORE_PCREL_IMM8BY4
7949 BFD_RELOC_CKCORE_PCREL_IMM11BY2
7951 BFD_RELOC_CKCORE_PCREL_IMM4BY2
7953 BFD_RELOC_CKCORE_PCREL32
7955 BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2
7957 BFD_RELOC_CKCORE_GNU_VTINHERIT
7959 BFD_RELOC_CKCORE_GNU_VTENTRY
7961 BFD_RELOC_CKCORE_RELATIVE
7963 BFD_RELOC_CKCORE_COPY
7965 BFD_RELOC_CKCORE_GLOB_DAT
7967 BFD_RELOC_CKCORE_JUMP_SLOT
7969 BFD_RELOC_CKCORE_GOTOFF
7971 BFD_RELOC_CKCORE_GOTPC
7973 BFD_RELOC_CKCORE_GOT32
7975 BFD_RELOC_CKCORE_PLT32
7977 BFD_RELOC_CKCORE_ADDRGOT
7979 BFD_RELOC_CKCORE_ADDRPLT
7981 BFD_RELOC_CKCORE_PCREL_IMM26BY2
7983 BFD_RELOC_CKCORE_PCREL_IMM16BY2
7985 BFD_RELOC_CKCORE_PCREL_IMM16BY4
7987 BFD_RELOC_CKCORE_PCREL_IMM10BY2
7989 BFD_RELOC_CKCORE_PCREL_IMM10BY4
7991 BFD_RELOC_CKCORE_ADDR_HI16
7993 BFD_RELOC_CKCORE_ADDR_LO16
7995 BFD_RELOC_CKCORE_GOTPC_HI16
7997 BFD_RELOC_CKCORE_GOTPC_LO16
7999 BFD_RELOC_CKCORE_GOTOFF_HI16
8001 BFD_RELOC_CKCORE_GOTOFF_LO16
8003 BFD_RELOC_CKCORE_GOT12
8005 BFD_RELOC_CKCORE_GOT_HI16
8007 BFD_RELOC_CKCORE_GOT_LO16
8009 BFD_RELOC_CKCORE_PLT12
8011 BFD_RELOC_CKCORE_PLT_HI16
8013 BFD_RELOC_CKCORE_PLT_LO16
8015 BFD_RELOC_CKCORE_ADDRGOT_HI16
8017 BFD_RELOC_CKCORE_ADDRGOT_LO16
8019 BFD_RELOC_CKCORE_ADDRPLT_HI16
8021 BFD_RELOC_CKCORE_ADDRPLT_LO16
8023 BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2
8025 BFD_RELOC_CKCORE_TOFFSET_LO16
8027 BFD_RELOC_CKCORE_DOFFSET_LO16
8029 BFD_RELOC_CKCORE_PCREL_IMM18BY2
8031 BFD_RELOC_CKCORE_DOFFSET_IMM18
8033 BFD_RELOC_CKCORE_DOFFSET_IMM18BY2
8035 BFD_RELOC_CKCORE_DOFFSET_IMM18BY4
8037 BFD_RELOC_CKCORE_GOTOFF_IMM18
8039 BFD_RELOC_CKCORE_GOT_IMM18BY4
8041 BFD_RELOC_CKCORE_PLT_IMM18BY4
8043 BFD_RELOC_CKCORE_PCREL_IMM7BY4
8045 BFD_RELOC_CKCORE_TLS_LE32
8047 BFD_RELOC_CKCORE_TLS_IE32
8049 BFD_RELOC_CKCORE_TLS_GD32
8051 BFD_RELOC_CKCORE_TLS_LDM32
8053 BFD_RELOC_CKCORE_TLS_LDO32
8055 BFD_RELOC_CKCORE_TLS_DTPMOD32
8057 BFD_RELOC_CKCORE_TLS_DTPOFF32
8059 BFD_RELOC_CKCORE_TLS_TPOFF32
8061 BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
8063 BFD_RELOC_CKCORE_NOJSRI
8065 BFD_RELOC_CKCORE_CALLGRAPH
8067 BFD_RELOC_CKCORE_IRELATIVE
8069 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4
8071 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4
8084 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
8089 bfd_reloc_type_lookup
8090 bfd_reloc_name_lookup
8093 reloc_howto_type *bfd_reloc_type_lookup
8094 (bfd *abfd, bfd_reloc_code_real_type code);
8095 reloc_howto_type *bfd_reloc_name_lookup
8096 (bfd *abfd, const char *reloc_name);
8099 Return a pointer to a howto structure which, when
8100 invoked, will perform the relocation @var{code} on data from the
8106 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
8108 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
8112 bfd_reloc_name_lookup (bfd
*abfd
, const char *reloc_name
)
8114 return BFD_SEND (abfd
, reloc_name_lookup
, (abfd
, reloc_name
));
8117 static reloc_howto_type bfd_howto_32
=
8118 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_dont
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
8122 bfd_default_reloc_type_lookup
8125 reloc_howto_type *bfd_default_reloc_type_lookup
8126 (bfd *abfd, bfd_reloc_code_real_type code);
8129 Provides a default relocation lookup routine for any architecture.
8134 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
8138 case BFD_RELOC_CTOR
:
8139 /* The type of reloc used in a ctor, which will be as wide as the
8140 address - so either a 64, 32, or 16 bitter. */
8141 switch (bfd_arch_bits_per_address (abfd
))
8147 return &bfd_howto_32
;
8163 bfd_get_reloc_code_name
8166 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
8169 Provides a printable name for the supplied relocation code.
8170 Useful mainly for printing error messages.
8174 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
8176 if (code
> BFD_RELOC_UNUSED
)
8178 return bfd_reloc_code_real_names
[code
];
8183 bfd_generic_relax_section
8186 bfd_boolean bfd_generic_relax_section
8189 struct bfd_link_info *,
8193 Provides default handling for relaxing for back ends which
8198 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
8199 asection
*section ATTRIBUTE_UNUSED
,
8200 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
8203 if (bfd_link_relocatable (link_info
))
8204 (*link_info
->callbacks
->einfo
)
8205 (_("%P%F: --relax and -r may not be used together\n"));
8213 bfd_generic_gc_sections
8216 bfd_boolean bfd_generic_gc_sections
8217 (bfd *, struct bfd_link_info *);
8220 Provides default handling for relaxing for back ends which
8221 don't do section gc -- i.e., does nothing.
8225 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
8226 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
8233 bfd_generic_lookup_section_flags
8236 bfd_boolean bfd_generic_lookup_section_flags
8237 (struct bfd_link_info *, struct flag_info *, asection *);
8240 Provides default handling for section flags lookup
8241 -- i.e., does nothing.
8242 Returns FALSE if the section should be omitted, otherwise TRUE.
8246 bfd_generic_lookup_section_flags (struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
8247 struct flag_info
*flaginfo
,
8248 asection
*section ATTRIBUTE_UNUSED
)
8250 if (flaginfo
!= NULL
)
8252 _bfd_error_handler (_("INPUT_SECTION_FLAGS are not supported"));
8260 bfd_generic_merge_sections
8263 bfd_boolean bfd_generic_merge_sections
8264 (bfd *, struct bfd_link_info *);
8267 Provides default handling for SEC_MERGE section merging for back ends
8268 which don't have SEC_MERGE support -- i.e., does nothing.
8272 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
8273 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
8280 bfd_generic_get_relocated_section_contents
8283 bfd_byte *bfd_generic_get_relocated_section_contents
8285 struct bfd_link_info *link_info,
8286 struct bfd_link_order *link_order,
8288 bfd_boolean relocatable,
8292 Provides default handling of relocation effort for back ends
8293 which can't be bothered to do it efficiently.
8298 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
8299 struct bfd_link_info
*link_info
,
8300 struct bfd_link_order
*link_order
,
8302 bfd_boolean relocatable
,
8305 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
8306 asection
*input_section
= link_order
->u
.indirect
.section
;
8308 arelent
**reloc_vector
;
8311 reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
8315 /* Read in the section. */
8316 if (!bfd_get_full_section_contents (input_bfd
, input_section
, &data
))
8322 if (reloc_size
== 0)
8325 reloc_vector
= (arelent
**) bfd_malloc (reloc_size
);
8326 if (reloc_vector
== NULL
)
8329 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
8333 if (reloc_count
< 0)
8336 if (reloc_count
> 0)
8340 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
8342 char *error_message
= NULL
;
8344 bfd_reloc_status_type r
;
8346 symbol
= *(*parent
)->sym_ptr_ptr
;
8347 /* PR ld/19628: A specially crafted input file
8348 can result in a NULL symbol pointer here. */
8351 link_info
->callbacks
->einfo
8352 /* xgettext:c-format */
8353 (_("%X%P: %pB(%pA): error: relocation for offset %V has no value\n"),
8354 abfd
, input_section
, (* parent
)->address
);
8358 /* Zap reloc field when the symbol is from a discarded
8359 section, ignoring any addend. Do the same when called
8360 from bfd_simple_get_relocated_section_contents for
8361 undefined symbols in debug sections. This is to keep
8362 debug info reasonably sane, in particular so that
8363 DW_FORM_ref_addr to another file's .debug_info isn't
8364 confused with an offset into the current file's
8366 if ((symbol
->section
!= NULL
&& discarded_section (symbol
->section
))
8367 || (symbol
->section
== bfd_und_section_ptr
8368 && (input_section
->flags
& SEC_DEBUGGING
) != 0
8369 && link_info
->input_bfds
== link_info
->output_bfd
))
8372 static reloc_howto_type none_howto
8373 = HOWTO (0, 0, 0, 0, FALSE
, 0, complain_overflow_dont
, NULL
,
8374 "unused", FALSE
, 0, 0, FALSE
);
8376 off
= (*parent
)->address
* bfd_octets_per_byte (input_bfd
);
8377 _bfd_clear_contents ((*parent
)->howto
, input_bfd
,
8378 input_section
, data
, off
);
8379 (*parent
)->sym_ptr_ptr
= bfd_abs_section_ptr
->symbol_ptr_ptr
;
8380 (*parent
)->addend
= 0;
8381 (*parent
)->howto
= &none_howto
;
8385 r
= bfd_perform_relocation (input_bfd
,
8389 relocatable
? abfd
: NULL
,
8394 asection
*os
= input_section
->output_section
;
8396 /* A partial link, so keep the relocs. */
8397 os
->orelocation
[os
->reloc_count
] = *parent
;
8401 if (r
!= bfd_reloc_ok
)
8405 case bfd_reloc_undefined
:
8406 (*link_info
->callbacks
->undefined_symbol
)
8407 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
8408 input_bfd
, input_section
, (*parent
)->address
, TRUE
);
8410 case bfd_reloc_dangerous
:
8411 BFD_ASSERT (error_message
!= NULL
);
8412 (*link_info
->callbacks
->reloc_dangerous
)
8413 (link_info
, error_message
,
8414 input_bfd
, input_section
, (*parent
)->address
);
8416 case bfd_reloc_overflow
:
8417 (*link_info
->callbacks
->reloc_overflow
)
8419 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
8420 (*parent
)->howto
->name
, (*parent
)->addend
,
8421 input_bfd
, input_section
, (*parent
)->address
);
8423 case bfd_reloc_outofrange
:
8425 This error can result when processing some partially
8426 complete binaries. Do not abort, but issue an error
8428 link_info
->callbacks
->einfo
8429 /* xgettext:c-format */
8430 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
8431 abfd
, input_section
, * parent
);
8434 case bfd_reloc_notsupported
:
8436 This error can result when processing a corrupt binary.
8437 Do not abort. Issue an error message instead. */
8438 link_info
->callbacks
->einfo
8439 /* xgettext:c-format */
8440 (_("%X%P: %pB(%pA): relocation \"%pR\" is not supported\n"),
8441 abfd
, input_section
, * parent
);
8445 /* PR 17512; file: 90c2a92e.
8446 Report unexpected results, without aborting. */
8447 link_info
->callbacks
->einfo
8448 /* xgettext:c-format */
8449 (_("%X%P: %pB(%pA): relocation \"%pR\" returns an unrecognized value %x\n"),
8450 abfd
, input_section
, * parent
, r
);
8458 free (reloc_vector
);
8462 free (reloc_vector
);
8468 _bfd_generic_set_reloc
8471 void _bfd_generic_set_reloc
8475 unsigned int count);
8478 Installs a new set of internal relocations in SECTION.
8482 _bfd_generic_set_reloc (bfd
*abfd ATTRIBUTE_UNUSED
,
8487 section
->orelocation
= relptr
;
8488 section
->reloc_count
= count
;
8493 _bfd_unrecognized_reloc
8496 bfd_boolean _bfd_unrecognized_reloc
8499 unsigned int r_type);
8502 Reports an unrecognized reloc.
8503 Written as a function in order to reduce code duplication.
8504 Returns FALSE so that it can be called from a return statement.
8508 _bfd_unrecognized_reloc (bfd
* abfd
, sec_ptr section
, unsigned int r_type
)
8510 /* xgettext:c-format */
8511 _bfd_error_handler (_("%pB: unrecognized relocation type %#x in section `%pA'"),
8512 abfd
, r_type
, section
);
8514 /* PR 21803: Suggest the most likely cause of this error. */
8515 _bfd_error_handler (_("is this version of the linker - %s - out of date ?"),
8516 BFD_VERSION_STRING
);
8518 bfd_set_error (bfd_error_bad_value
);
8523 _bfd_norelocs_bfd_reloc_type_lookup
8525 bfd_reloc_code_real_type code ATTRIBUTE_UNUSED
)
8527 return (reloc_howto_type
*) _bfd_ptr_bfd_null_error (abfd
);
8531 _bfd_norelocs_bfd_reloc_name_lookup (bfd
*abfd
,
8532 const char *reloc_name ATTRIBUTE_UNUSED
)
8534 return (reloc_howto_type
*) _bfd_ptr_bfd_null_error (abfd
);
8538 _bfd_nodynamic_canonicalize_dynamic_reloc (bfd
*abfd
,
8539 arelent
**relp ATTRIBUTE_UNUSED
,
8540 asymbol
**symp ATTRIBUTE_UNUSED
)
8542 return _bfd_long_bfd_n1_error (abfd
);