1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 BFD maintains relocations in much the same way it maintains
28 symbols: they are left alone until required, then read in
29 en-masse and translated into an internal form. A common
30 routine <<bfd_perform_relocation>> acts upon the
31 canonical form to do the fixup.
33 Relocations are maintained on a per section basis,
34 while symbols are maintained on a per BFD basis.
36 All that a back end has to do to fit the BFD interface is to create
37 a <<struct reloc_cache_entry>> for each relocation
38 in a particular section, and fill in the right bits of the structures.
47 /* DO compile in the reloc_code name table from libbfd.h. */
48 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. *}
71 . {* The relocation was performed, but there was an overflow. *}
74 . {* The address to relocate was not within the section supplied. *}
75 . bfd_reloc_outofrange,
77 . {* Used by special functions. *}
80 . {* Unsupported relocation size requested. *}
81 . bfd_reloc_notsupported,
86 . {* The symbol to relocate against was undefined. *}
87 . bfd_reloc_undefined,
89 . {* The relocation was performed, but may not be ok - presently
90 . generated only when linking i960 coff files with i960 b.out
91 . symbols. If this type is returned, the error_message argument
92 . to bfd_perform_relocation will be set. *}
95 . bfd_reloc_status_type;
98 .typedef struct reloc_cache_entry
100 . {* A pointer into the canonical table of pointers. *}
101 . struct bfd_symbol **sym_ptr_ptr;
103 . {* offset in section. *}
104 . bfd_size_type address;
106 . {* addend for relocation value. *}
109 . {* Pointer to how to perform the required relocation. *}
110 . reloc_howto_type *howto;
120 Here is a description of each of the fields within an <<arelent>>:
124 The symbol table pointer points to a pointer to the symbol
125 associated with the relocation request. It is the pointer
126 into the table returned by the back end's
127 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
128 referenced through a pointer to a pointer so that tools like
129 the linker can fix up all the symbols of the same name by
130 modifying only one pointer. The relocation routine looks in
131 the symbol and uses the base of the section the symbol is
132 attached to and the value of the symbol as the initial
133 relocation offset. If the symbol pointer is zero, then the
134 section provided is looked up.
138 The <<address>> field gives the offset in bytes from the base of
139 the section data which owns the relocation record to the first
140 byte of relocatable information. The actual data relocated
141 will be relative to this point; for example, a relocation
142 type which modifies the bottom two bytes of a four byte word
143 would not touch the first byte pointed to in a big endian
148 The <<addend>> is a value provided by the back end to be added (!)
149 to the relocation offset. Its interpretation is dependent upon
150 the howto. For example, on the 68k the code:
155 | return foo[0x12345678];
158 Could be compiled into:
161 | moveb @@#12345678,d0
166 This could create a reloc pointing to <<foo>>, but leave the
167 offset in the data, something like:
169 |RELOCATION RECORDS FOR [.text]:
173 |00000000 4e56 fffc ; linkw fp,#-4
174 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
175 |0000000a 49c0 ; extbl d0
176 |0000000c 4e5e ; unlk fp
179 Using coff and an 88k, some instructions don't have enough
180 space in them to represent the full address range, and
181 pointers have to be loaded in two parts. So you'd get something like:
183 | or.u r13,r0,hi16(_foo+0x12345678)
184 | ld.b r2,r13,lo16(_foo+0x12345678)
187 This should create two relocs, both pointing to <<_foo>>, and with
188 0x12340000 in their addend field. The data would consist of:
190 |RELOCATION RECORDS FOR [.text]:
192 |00000002 HVRT16 _foo+0x12340000
193 |00000006 LVRT16 _foo+0x12340000
195 |00000000 5da05678 ; or.u r13,r0,0x5678
196 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
197 |00000008 f400c001 ; jmp r1
199 The relocation routine digs out the value from the data, adds
200 it to the addend to get the original offset, and then adds the
201 value of <<_foo>>. Note that all 32 bits have to be kept around
202 somewhere, to cope with carry from bit 15 to bit 16.
204 One further example is the sparc and the a.out format. The
205 sparc has a similar problem to the 88k, in that some
206 instructions don't have room for an entire offset, but on the
207 sparc the parts are created in odd sized lumps. The designers of
208 the a.out format chose to not use the data within the section
209 for storing part of the offset; all the offset is kept within
210 the reloc. Anything in the data should be ignored.
213 | sethi %hi(_foo+0x12345678),%g2
214 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
218 Both relocs contain a pointer to <<foo>>, and the offsets
221 |RELOCATION RECORDS FOR [.text]:
223 |00000004 HI22 _foo+0x12345678
224 |00000008 LO10 _foo+0x12345678
226 |00000000 9de3bf90 ; save %sp,-112,%sp
227 |00000004 05000000 ; sethi %hi(_foo+0),%g2
228 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
229 |0000000c 81c7e008 ; ret
230 |00000010 81e80000 ; restore
234 The <<howto>> field can be imagined as a
235 relocation instruction. It is a pointer to a structure which
236 contains information on what to do with all of the other
237 information in the reloc record and data section. A back end
238 would normally have a relocation instruction set and turn
239 relocations into pointers to the correct structure on input -
240 but it would be possible to create each howto field on demand.
246 <<enum complain_overflow>>
248 Indicates what sort of overflow checking should be done when
249 performing a relocation.
253 .enum complain_overflow
255 . {* Do not complain on overflow. *}
256 . complain_overflow_dont,
258 . {* Complain if the bitfield overflows, whether it is considered
259 . as signed or unsigned. *}
260 . complain_overflow_bitfield,
262 . {* Complain if the value overflows when considered as signed
264 . complain_overflow_signed,
266 . {* Complain if the value overflows when considered as an
267 . unsigned number. *}
268 . complain_overflow_unsigned
277 The <<reloc_howto_type>> is a structure which contains all the
278 information that libbfd needs to know to tie up a back end's data.
281 .struct bfd_symbol; {* Forward declaration. *}
283 .struct reloc_howto_struct
285 . {* The type field has mainly a documentary use - the back end can
286 . do what it wants with it, though normally the back end's
287 . external idea of what a reloc number is stored
288 . in this field. For example, a PC relative word relocation
289 . in a coff environment has the type 023 - because that's
290 . what the outside world calls a R_PCRWORD reloc. *}
293 . {* The value the final relocation is shifted right by. This drops
294 . unwanted data from the relocation. *}
295 . unsigned int rightshift;
297 . {* The size of the item to be relocated. This is *not* a
298 . power-of-two measure. To get the number of bytes operated
299 . on by a type of relocation, use bfd_get_reloc_size. *}
302 . {* The number of bits in the item to be relocated. This is used
303 . when doing overflow checking. *}
304 . unsigned int bitsize;
306 . {* Notes that the relocation is relative to the location in the
307 . data section of the addend. The relocation function will
308 . subtract from the relocation value the address of the location
309 . being relocated. *}
310 . bfd_boolean pc_relative;
312 . {* The bit position of the reloc value in the destination.
313 . The relocated value is left shifted by this amount. *}
314 . unsigned int bitpos;
316 . {* What type of overflow error should be checked for when
318 . enum complain_overflow complain_on_overflow;
320 . {* If this field is non null, then the supplied function is
321 . called rather than the normal function. This allows really
322 . strange relocation methods to be accommodated (e.g., i960 callj
324 . bfd_reloc_status_type (*special_function)
325 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
328 . {* The textual name of the relocation type. *}
331 . {* Some formats record a relocation addend in the section contents
332 . rather than with the relocation. For ELF formats this is the
333 . distinction between USE_REL and USE_RELA (though the code checks
334 . for USE_REL == 1/0). The value of this field is TRUE if the
335 . addend is recorded with the section contents; when performing a
336 . partial link (ld -r) the section contents (the data) will be
337 . modified. The value of this field is FALSE if addends are
338 . recorded with the relocation (in arelent.addend); when performing
339 . a partial link the relocation will be modified.
340 . All relocations for all ELF USE_RELA targets should set this field
341 . to FALSE (values of TRUE should be looked on with suspicion).
342 . However, the converse is not true: not all relocations of all ELF
343 . USE_REL targets set this field to TRUE. Why this is so is peculiar
344 . to each particular target. For relocs that aren't used in partial
345 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
346 . bfd_boolean partial_inplace;
348 . {* src_mask selects the part of the instruction (or data) to be used
349 . in the relocation sum. If the target relocations don't have an
350 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
351 . dst_mask to extract the addend from the section contents. If
352 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
353 . field should be zero. Non-zero values for ELF USE_RELA targets are
354 . bogus as in those cases the value in the dst_mask part of the
355 . section contents should be treated as garbage. *}
358 . {* dst_mask selects which parts of the instruction (or data) are
359 . replaced with a relocated value. *}
362 . {* When some formats create PC relative instructions, they leave
363 . the value of the pc of the place being relocated in the offset
364 . slot of the instruction, so that a PC relative relocation can
365 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
366 . Some formats leave the displacement part of an instruction
367 . empty (e.g., m88k bcs); this flag signals the fact. *}
368 . bfd_boolean pcrel_offset;
378 The HOWTO define is horrible and will go away.
380 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
381 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
384 And will be replaced with the totally magic way. But for the
385 moment, we are compatible, so do it this way.
387 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
388 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
389 . NAME, FALSE, 0, 0, IN)
393 This is used to fill in an empty howto entry in an array.
395 .#define EMPTY_HOWTO(C) \
396 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
397 . NULL, FALSE, 0, 0, FALSE)
401 Helper routine to turn a symbol into a relocation value.
403 .#define HOWTO_PREPARE(relocation, symbol) \
405 . if (symbol != NULL) \
407 . if (bfd_is_com_section (symbol->section)) \
413 . relocation = symbol->value; \
425 unsigned int bfd_get_reloc_size (reloc_howto_type *);
428 For a reloc_howto_type that operates on a fixed number of bytes,
429 this returns the number of bytes operated on.
433 bfd_get_reloc_size (reloc_howto_type
*howto
)
454 How relocs are tied together in an <<asection>>:
456 .typedef struct relent_chain
459 . struct relent_chain *next;
465 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
466 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
473 bfd_reloc_status_type bfd_check_overflow
474 (enum complain_overflow how,
475 unsigned int bitsize,
476 unsigned int rightshift,
477 unsigned int addrsize,
481 Perform overflow checking on @var{relocation} which has
482 @var{bitsize} significant bits and will be shifted right by
483 @var{rightshift} bits, on a machine with addresses containing
484 @var{addrsize} significant bits. The result is either of
485 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
489 bfd_reloc_status_type
490 bfd_check_overflow (enum complain_overflow how
,
491 unsigned int bitsize
,
492 unsigned int rightshift
,
493 unsigned int addrsize
,
496 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
497 bfd_reloc_status_type flag
= bfd_reloc_ok
;
501 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
502 we'll be permissive: extra bits in the field mask will
503 automatically extend the address mask for purposes of the
505 fieldmask
= N_ONES (bitsize
);
506 addrmask
= N_ONES (addrsize
) | fieldmask
;
510 case complain_overflow_dont
:
513 case complain_overflow_signed
:
514 /* If any sign bits are set, all sign bits must be set. That
515 is, A must be a valid negative address after shifting. */
516 a
= (a
& addrmask
) >> rightshift
;
517 signmask
= ~ (fieldmask
>> 1);
519 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
520 flag
= bfd_reloc_overflow
;
523 case complain_overflow_unsigned
:
524 /* We have an overflow if the address does not fit in the field. */
525 a
= (a
& addrmask
) >> rightshift
;
526 if ((a
& ~ fieldmask
) != 0)
527 flag
= bfd_reloc_overflow
;
530 case complain_overflow_bitfield
:
531 /* Bitfields are sometimes signed, sometimes unsigned. We
532 explicitly allow an address wrap too, which means a bitfield
533 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
534 if the value has some, but not all, bits set outside the
537 ss
= a
& ~ fieldmask
;
538 if (ss
!= 0 && ss
!= (((bfd_vma
) -1 >> rightshift
) & ~ fieldmask
))
539 flag
= bfd_reloc_overflow
;
551 bfd_perform_relocation
554 bfd_reloc_status_type bfd_perform_relocation
556 arelent *reloc_entry,
558 asection *input_section,
560 char **error_message);
563 If @var{output_bfd} is supplied to this function, the
564 generated image will be relocatable; the relocations are
565 copied to the output file after they have been changed to
566 reflect the new state of the world. There are two ways of
567 reflecting the results of partial linkage in an output file:
568 by modifying the output data in place, and by modifying the
569 relocation record. Some native formats (e.g., basic a.out and
570 basic coff) have no way of specifying an addend in the
571 relocation type, so the addend has to go in the output data.
572 This is no big deal since in these formats the output data
573 slot will always be big enough for the addend. Complex reloc
574 types with addends were invented to solve just this problem.
575 The @var{error_message} argument is set to an error message if
576 this return @code{bfd_reloc_dangerous}.
580 bfd_reloc_status_type
581 bfd_perform_relocation (bfd
*abfd
,
582 arelent
*reloc_entry
,
584 asection
*input_section
,
586 char **error_message
)
589 bfd_reloc_status_type flag
= bfd_reloc_ok
;
591 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
592 bfd_vma output_base
= 0;
593 reloc_howto_type
*howto
= reloc_entry
->howto
;
594 asection
*reloc_target_output_section
;
597 symbol
= *(reloc_entry
->sym_ptr_ptr
);
598 if (bfd_is_abs_section (symbol
->section
)
599 && output_bfd
!= NULL
)
601 reloc_entry
->address
+= input_section
->output_offset
;
605 /* If we are not producing relocatable output, return an error if
606 the symbol is not defined. An undefined weak symbol is
607 considered to have a value of zero (SVR4 ABI, p. 4-27). */
608 if (bfd_is_und_section (symbol
->section
)
609 && (symbol
->flags
& BSF_WEAK
) == 0
610 && output_bfd
== NULL
)
611 flag
= bfd_reloc_undefined
;
613 /* If there is a function supplied to handle this relocation type,
614 call it. It'll return `bfd_reloc_continue' if further processing
616 if (howto
->special_function
)
618 bfd_reloc_status_type cont
;
619 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
620 input_section
, output_bfd
,
622 if (cont
!= bfd_reloc_continue
)
626 /* Is the address of the relocation really within the section? */
627 sz
= input_section
->rawsize
? input_section
->rawsize
: input_section
->size
;
628 if (reloc_entry
->address
> sz
/ bfd_octets_per_byte (abfd
))
629 return bfd_reloc_outofrange
;
631 /* Work out which section the relocation is targeted at and the
632 initial relocation command value. */
634 /* Get symbol value. (Common symbols are special.) */
635 if (bfd_is_com_section (symbol
->section
))
638 relocation
= symbol
->value
;
640 reloc_target_output_section
= symbol
->section
->output_section
;
642 /* Convert input-section-relative symbol value to absolute. */
643 if ((output_bfd
&& ! howto
->partial_inplace
)
644 || reloc_target_output_section
== NULL
)
647 output_base
= reloc_target_output_section
->vma
;
649 relocation
+= output_base
+ symbol
->section
->output_offset
;
651 /* Add in supplied addend. */
652 relocation
+= reloc_entry
->addend
;
654 /* Here the variable relocation holds the final address of the
655 symbol we are relocating against, plus any addend. */
657 if (howto
->pc_relative
)
659 /* This is a PC relative relocation. We want to set RELOCATION
660 to the distance between the address of the symbol and the
661 location. RELOCATION is already the address of the symbol.
663 We start by subtracting the address of the section containing
666 If pcrel_offset is set, we must further subtract the position
667 of the location within the section. Some targets arrange for
668 the addend to be the negative of the position of the location
669 within the section; for example, i386-aout does this. For
670 i386-aout, pcrel_offset is FALSE. Some other targets do not
671 include the position of the location; for example, m88kbcs,
672 or ELF. For those targets, pcrel_offset is TRUE.
674 If we are producing relocatable output, then we must ensure
675 that this reloc will be correctly computed when the final
676 relocation is done. If pcrel_offset is FALSE we want to wind
677 up with the negative of the location within the section,
678 which means we must adjust the existing addend by the change
679 in the location within the section. If pcrel_offset is TRUE
680 we do not want to adjust the existing addend at all.
682 FIXME: This seems logical to me, but for the case of
683 producing relocatable output it is not what the code
684 actually does. I don't want to change it, because it seems
685 far too likely that something will break. */
688 input_section
->output_section
->vma
+ input_section
->output_offset
;
690 if (howto
->pcrel_offset
)
691 relocation
-= reloc_entry
->address
;
694 if (output_bfd
!= NULL
)
696 if (! howto
->partial_inplace
)
698 /* This is a partial relocation, and we want to apply the relocation
699 to the reloc entry rather than the raw data. Modify the reloc
700 inplace to reflect what we now know. */
701 reloc_entry
->addend
= relocation
;
702 reloc_entry
->address
+= input_section
->output_offset
;
707 /* This is a partial relocation, but inplace, so modify the
710 If we've relocated with a symbol with a section, change
711 into a ref to the section belonging to the symbol. */
713 reloc_entry
->address
+= input_section
->output_offset
;
716 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
717 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
718 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
721 /* For m68k-coff, the addend was being subtracted twice during
722 relocation with -r. Removing the line below this comment
723 fixes that problem; see PR 2953.
725 However, Ian wrote the following, regarding removing the line below,
726 which explains why it is still enabled: --djm
728 If you put a patch like that into BFD you need to check all the COFF
729 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
730 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
731 problem in a different way. There may very well be a reason that the
732 code works as it does.
734 Hmmm. The first obvious point is that bfd_perform_relocation should
735 not have any tests that depend upon the flavour. It's seem like
736 entirely the wrong place for such a thing. The second obvious point
737 is that the current code ignores the reloc addend when producing
738 relocatable output for COFF. That's peculiar. In fact, I really
739 have no idea what the point of the line you want to remove is.
741 A typical COFF reloc subtracts the old value of the symbol and adds in
742 the new value to the location in the object file (if it's a pc
743 relative reloc it adds the difference between the symbol value and the
744 location). When relocating we need to preserve that property.
746 BFD handles this by setting the addend to the negative of the old
747 value of the symbol. Unfortunately it handles common symbols in a
748 non-standard way (it doesn't subtract the old value) but that's a
749 different story (we can't change it without losing backward
750 compatibility with old object files) (coff-i386 does subtract the old
751 value, to be compatible with existing coff-i386 targets, like SCO).
753 So everything works fine when not producing relocatable output. When
754 we are producing relocatable output, logically we should do exactly
755 what we do when not producing relocatable output. Therefore, your
756 patch is correct. In fact, it should probably always just set
757 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
758 add the value into the object file. This won't hurt the COFF code,
759 which doesn't use the addend; I'm not sure what it will do to other
760 formats (the thing to check for would be whether any formats both use
761 the addend and set partial_inplace).
763 When I wanted to make coff-i386 produce relocatable output, I ran
764 into the problem that you are running into: I wanted to remove that
765 line. Rather than risk it, I made the coff-i386 relocs use a special
766 function; it's coff_i386_reloc in coff-i386.c. The function
767 specifically adds the addend field into the object file, knowing that
768 bfd_perform_relocation is not going to. If you remove that line, then
769 coff-i386.c will wind up adding the addend field in twice. It's
770 trivial to fix; it just needs to be done.
772 The problem with removing the line is just that it may break some
773 working code. With BFD it's hard to be sure of anything. The right
774 way to deal with this is simply to build and test at least all the
775 supported COFF targets. It should be straightforward if time and disk
776 space consuming. For each target:
778 2) generate some executable, and link it using -r (I would
779 probably use paranoia.o and link against newlib/libc.a, which
780 for all the supported targets would be available in
781 /usr/cygnus/progressive/H-host/target/lib/libc.a).
782 3) make the change to reloc.c
783 4) rebuild the linker
785 6) if the resulting object files are the same, you have at least
787 7) if they are different you have to figure out which version is
790 relocation
-= reloc_entry
->addend
;
792 reloc_entry
->addend
= 0;
796 reloc_entry
->addend
= relocation
;
802 reloc_entry
->addend
= 0;
805 /* FIXME: This overflow checking is incomplete, because the value
806 might have overflowed before we get here. For a correct check we
807 need to compute the value in a size larger than bitsize, but we
808 can't reasonably do that for a reloc the same size as a host
810 FIXME: We should also do overflow checking on the result after
811 adding in the value contained in the object file. */
812 if (howto
->complain_on_overflow
!= complain_overflow_dont
813 && flag
== bfd_reloc_ok
)
814 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
817 bfd_arch_bits_per_address (abfd
),
820 /* Either we are relocating all the way, or we don't want to apply
821 the relocation to the reloc entry (probably because there isn't
822 any room in the output format to describe addends to relocs). */
824 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
825 (OSF version 1.3, compiler version 3.11). It miscompiles the
839 x <<= (unsigned long) s.i0;
843 printf ("succeeded (%lx)\n", x);
847 relocation
>>= (bfd_vma
) howto
->rightshift
;
849 /* Shift everything up to where it's going to be used. */
850 relocation
<<= (bfd_vma
) howto
->bitpos
;
852 /* Wait for the day when all have the mask in them. */
855 i instruction to be left alone
856 o offset within instruction
857 r relocation offset to apply
866 (( i i i i i o o o o o from bfd_get<size>
867 and S S S S S) to get the size offset we want
868 + r r r r r r r r r r) to get the final value to place
869 and D D D D D to chop to right size
870 -----------------------
873 ( i i i i i o o o o o from bfd_get<size>
874 and N N N N N ) get instruction
875 -----------------------
881 -----------------------
882 = R R R R R R R R R R put into bfd_put<size>
886 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
892 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
894 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
900 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
902 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
907 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
909 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
914 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
915 relocation
= -relocation
;
917 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
923 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
924 relocation
= -relocation
;
926 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
937 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
939 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
946 return bfd_reloc_other
;
954 bfd_install_relocation
957 bfd_reloc_status_type bfd_install_relocation
959 arelent *reloc_entry,
960 void *data, bfd_vma data_start,
961 asection *input_section,
962 char **error_message);
965 This looks remarkably like <<bfd_perform_relocation>>, except it
966 does not expect that the section contents have been filled in.
967 I.e., it's suitable for use when creating, rather than applying
970 For now, this function should be considered reserved for the
974 bfd_reloc_status_type
975 bfd_install_relocation (bfd
*abfd
,
976 arelent
*reloc_entry
,
978 bfd_vma data_start_offset
,
979 asection
*input_section
,
980 char **error_message
)
983 bfd_reloc_status_type flag
= bfd_reloc_ok
;
985 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
986 bfd_vma output_base
= 0;
987 reloc_howto_type
*howto
= reloc_entry
->howto
;
988 asection
*reloc_target_output_section
;
992 symbol
= *(reloc_entry
->sym_ptr_ptr
);
993 if (bfd_is_abs_section (symbol
->section
))
995 reloc_entry
->address
+= input_section
->output_offset
;
999 /* If there is a function supplied to handle this relocation type,
1000 call it. It'll return `bfd_reloc_continue' if further processing
1002 if (howto
->special_function
)
1004 bfd_reloc_status_type cont
;
1006 /* XXX - The special_function calls haven't been fixed up to deal
1007 with creating new relocations and section contents. */
1008 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
1009 /* XXX - Non-portable! */
1010 ((bfd_byte
*) data_start
1011 - data_start_offset
),
1012 input_section
, abfd
, error_message
);
1013 if (cont
!= bfd_reloc_continue
)
1017 /* Is the address of the relocation really within the section? */
1018 sz
= input_section
->rawsize
? input_section
->rawsize
: input_section
->size
;
1019 if (reloc_entry
->address
> sz
/ bfd_octets_per_byte (abfd
))
1020 return bfd_reloc_outofrange
;
1022 /* Work out which section the relocation is targeted at and the
1023 initial relocation command value. */
1025 /* Get symbol value. (Common symbols are special.) */
1026 if (bfd_is_com_section (symbol
->section
))
1029 relocation
= symbol
->value
;
1031 reloc_target_output_section
= symbol
->section
->output_section
;
1033 /* Convert input-section-relative symbol value to absolute. */
1034 if (! howto
->partial_inplace
)
1037 output_base
= reloc_target_output_section
->vma
;
1039 relocation
+= output_base
+ symbol
->section
->output_offset
;
1041 /* Add in supplied addend. */
1042 relocation
+= reloc_entry
->addend
;
1044 /* Here the variable relocation holds the final address of the
1045 symbol we are relocating against, plus any addend. */
1047 if (howto
->pc_relative
)
1049 /* This is a PC relative relocation. We want to set RELOCATION
1050 to the distance between the address of the symbol and the
1051 location. RELOCATION is already the address of the symbol.
1053 We start by subtracting the address of the section containing
1056 If pcrel_offset is set, we must further subtract the position
1057 of the location within the section. Some targets arrange for
1058 the addend to be the negative of the position of the location
1059 within the section; for example, i386-aout does this. For
1060 i386-aout, pcrel_offset is FALSE. Some other targets do not
1061 include the position of the location; for example, m88kbcs,
1062 or ELF. For those targets, pcrel_offset is TRUE.
1064 If we are producing relocatable output, then we must ensure
1065 that this reloc will be correctly computed when the final
1066 relocation is done. If pcrel_offset is FALSE we want to wind
1067 up with the negative of the location within the section,
1068 which means we must adjust the existing addend by the change
1069 in the location within the section. If pcrel_offset is TRUE
1070 we do not want to adjust the existing addend at all.
1072 FIXME: This seems logical to me, but for the case of
1073 producing relocatable output it is not what the code
1074 actually does. I don't want to change it, because it seems
1075 far too likely that something will break. */
1078 input_section
->output_section
->vma
+ input_section
->output_offset
;
1080 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1081 relocation
-= reloc_entry
->address
;
1084 if (! howto
->partial_inplace
)
1086 /* This is a partial relocation, and we want to apply the relocation
1087 to the reloc entry rather than the raw data. Modify the reloc
1088 inplace to reflect what we now know. */
1089 reloc_entry
->addend
= relocation
;
1090 reloc_entry
->address
+= input_section
->output_offset
;
1095 /* This is a partial relocation, but inplace, so modify the
1098 If we've relocated with a symbol with a section, change
1099 into a ref to the section belonging to the symbol. */
1100 reloc_entry
->address
+= input_section
->output_offset
;
1103 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1104 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1105 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1108 /* For m68k-coff, the addend was being subtracted twice during
1109 relocation with -r. Removing the line below this comment
1110 fixes that problem; see PR 2953.
1112 However, Ian wrote the following, regarding removing the line below,
1113 which explains why it is still enabled: --djm
1115 If you put a patch like that into BFD you need to check all the COFF
1116 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1117 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1118 problem in a different way. There may very well be a reason that the
1119 code works as it does.
1121 Hmmm. The first obvious point is that bfd_install_relocation should
1122 not have any tests that depend upon the flavour. It's seem like
1123 entirely the wrong place for such a thing. The second obvious point
1124 is that the current code ignores the reloc addend when producing
1125 relocatable output for COFF. That's peculiar. In fact, I really
1126 have no idea what the point of the line you want to remove is.
1128 A typical COFF reloc subtracts the old value of the symbol and adds in
1129 the new value to the location in the object file (if it's a pc
1130 relative reloc it adds the difference between the symbol value and the
1131 location). When relocating we need to preserve that property.
1133 BFD handles this by setting the addend to the negative of the old
1134 value of the symbol. Unfortunately it handles common symbols in a
1135 non-standard way (it doesn't subtract the old value) but that's a
1136 different story (we can't change it without losing backward
1137 compatibility with old object files) (coff-i386 does subtract the old
1138 value, to be compatible with existing coff-i386 targets, like SCO).
1140 So everything works fine when not producing relocatable output. When
1141 we are producing relocatable output, logically we should do exactly
1142 what we do when not producing relocatable output. Therefore, your
1143 patch is correct. In fact, it should probably always just set
1144 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1145 add the value into the object file. This won't hurt the COFF code,
1146 which doesn't use the addend; I'm not sure what it will do to other
1147 formats (the thing to check for would be whether any formats both use
1148 the addend and set partial_inplace).
1150 When I wanted to make coff-i386 produce relocatable output, I ran
1151 into the problem that you are running into: I wanted to remove that
1152 line. Rather than risk it, I made the coff-i386 relocs use a special
1153 function; it's coff_i386_reloc in coff-i386.c. The function
1154 specifically adds the addend field into the object file, knowing that
1155 bfd_install_relocation is not going to. If you remove that line, then
1156 coff-i386.c will wind up adding the addend field in twice. It's
1157 trivial to fix; it just needs to be done.
1159 The problem with removing the line is just that it may break some
1160 working code. With BFD it's hard to be sure of anything. The right
1161 way to deal with this is simply to build and test at least all the
1162 supported COFF targets. It should be straightforward if time and disk
1163 space consuming. For each target:
1165 2) generate some executable, and link it using -r (I would
1166 probably use paranoia.o and link against newlib/libc.a, which
1167 for all the supported targets would be available in
1168 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1169 3) make the change to reloc.c
1170 4) rebuild the linker
1172 6) if the resulting object files are the same, you have at least
1174 7) if they are different you have to figure out which version is
1176 relocation
-= reloc_entry
->addend
;
1178 reloc_entry
->addend
= 0;
1182 reloc_entry
->addend
= relocation
;
1186 /* FIXME: This overflow checking is incomplete, because the value
1187 might have overflowed before we get here. For a correct check we
1188 need to compute the value in a size larger than bitsize, but we
1189 can't reasonably do that for a reloc the same size as a host
1191 FIXME: We should also do overflow checking on the result after
1192 adding in the value contained in the object file. */
1193 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1194 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1197 bfd_arch_bits_per_address (abfd
),
1200 /* Either we are relocating all the way, or we don't want to apply
1201 the relocation to the reloc entry (probably because there isn't
1202 any room in the output format to describe addends to relocs). */
1204 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1205 (OSF version 1.3, compiler version 3.11). It miscompiles the
1219 x <<= (unsigned long) s.i0;
1221 printf ("failed\n");
1223 printf ("succeeded (%lx)\n", x);
1227 relocation
>>= (bfd_vma
) howto
->rightshift
;
1229 /* Shift everything up to where it's going to be used. */
1230 relocation
<<= (bfd_vma
) howto
->bitpos
;
1232 /* Wait for the day when all have the mask in them. */
1235 i instruction to be left alone
1236 o offset within instruction
1237 r relocation offset to apply
1246 (( i i i i i o o o o o from bfd_get<size>
1247 and S S S S S) to get the size offset we want
1248 + r r r r r r r r r r) to get the final value to place
1249 and D D D D D to chop to right size
1250 -----------------------
1253 ( i i i i i o o o o o from bfd_get<size>
1254 and N N N N N ) get instruction
1255 -----------------------
1261 -----------------------
1262 = R R R R R R R R R R put into bfd_put<size>
1266 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1268 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1270 switch (howto
->size
)
1274 char x
= bfd_get_8 (abfd
, data
);
1276 bfd_put_8 (abfd
, x
, data
);
1282 short x
= bfd_get_16 (abfd
, data
);
1284 bfd_put_16 (abfd
, (bfd_vma
) x
, data
);
1289 long x
= bfd_get_32 (abfd
, data
);
1291 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1296 long x
= bfd_get_32 (abfd
, data
);
1297 relocation
= -relocation
;
1299 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1309 bfd_vma x
= bfd_get_64 (abfd
, data
);
1311 bfd_put_64 (abfd
, x
, data
);
1315 return bfd_reloc_other
;
1321 /* This relocation routine is used by some of the backend linkers.
1322 They do not construct asymbol or arelent structures, so there is no
1323 reason for them to use bfd_perform_relocation. Also,
1324 bfd_perform_relocation is so hacked up it is easier to write a new
1325 function than to try to deal with it.
1327 This routine does a final relocation. Whether it is useful for a
1328 relocatable link depends upon how the object format defines
1331 FIXME: This routine ignores any special_function in the HOWTO,
1332 since the existing special_function values have been written for
1333 bfd_perform_relocation.
1335 HOWTO is the reloc howto information.
1336 INPUT_BFD is the BFD which the reloc applies to.
1337 INPUT_SECTION is the section which the reloc applies to.
1338 CONTENTS is the contents of the section.
1339 ADDRESS is the address of the reloc within INPUT_SECTION.
1340 VALUE is the value of the symbol the reloc refers to.
1341 ADDEND is the addend of the reloc. */
1343 bfd_reloc_status_type
1344 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1346 asection
*input_section
,
1355 /* Sanity check the address. */
1356 sz
= input_section
->rawsize
? input_section
->rawsize
: input_section
->size
;
1358 return bfd_reloc_outofrange
;
1360 /* This function assumes that we are dealing with a basic relocation
1361 against a symbol. We want to compute the value of the symbol to
1362 relocate to. This is just VALUE, the value of the symbol, plus
1363 ADDEND, any addend associated with the reloc. */
1364 relocation
= value
+ addend
;
1366 /* If the relocation is PC relative, we want to set RELOCATION to
1367 the distance between the symbol (currently in RELOCATION) and the
1368 location we are relocating. Some targets (e.g., i386-aout)
1369 arrange for the contents of the section to be the negative of the
1370 offset of the location within the section; for such targets
1371 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1372 simply leave the contents of the section as zero; for such
1373 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1374 need to subtract out the offset of the location within the
1375 section (which is just ADDRESS). */
1376 if (howto
->pc_relative
)
1378 relocation
-= (input_section
->output_section
->vma
1379 + input_section
->output_offset
);
1380 if (howto
->pcrel_offset
)
1381 relocation
-= address
;
1384 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1385 contents
+ address
);
1388 /* Relocate a given location using a given value and howto. */
1390 bfd_reloc_status_type
1391 _bfd_relocate_contents (reloc_howto_type
*howto
,
1398 bfd_reloc_status_type flag
;
1399 unsigned int rightshift
= howto
->rightshift
;
1400 unsigned int bitpos
= howto
->bitpos
;
1402 /* If the size is negative, negate RELOCATION. This isn't very
1404 if (howto
->size
< 0)
1405 relocation
= -relocation
;
1407 /* Get the value we are going to relocate. */
1408 size
= bfd_get_reloc_size (howto
);
1415 x
= bfd_get_8 (input_bfd
, location
);
1418 x
= bfd_get_16 (input_bfd
, location
);
1421 x
= bfd_get_32 (input_bfd
, location
);
1425 x
= bfd_get_64 (input_bfd
, location
);
1432 /* Check for overflow. FIXME: We may drop bits during the addition
1433 which we don't check for. We must either check at every single
1434 operation, which would be tedious, or we must do the computations
1435 in a type larger than bfd_vma, which would be inefficient. */
1436 flag
= bfd_reloc_ok
;
1437 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1439 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1442 /* Get the values to be added together. For signed and unsigned
1443 relocations, we assume that all values should be truncated to
1444 the size of an address. For bitfields, all the bits matter.
1445 See also bfd_check_overflow. */
1446 fieldmask
= N_ONES (howto
->bitsize
);
1447 addrmask
= N_ONES (bfd_arch_bits_per_address (input_bfd
)) | fieldmask
;
1449 b
= x
& howto
->src_mask
;
1451 switch (howto
->complain_on_overflow
)
1453 case complain_overflow_signed
:
1454 a
= (a
& addrmask
) >> rightshift
;
1456 /* If any sign bits are set, all sign bits must be set.
1457 That is, A must be a valid negative address after
1459 signmask
= ~ (fieldmask
>> 1);
1461 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
1462 flag
= bfd_reloc_overflow
;
1464 /* We only need this next bit of code if the sign bit of B
1465 is below the sign bit of A. This would only happen if
1466 SRC_MASK had fewer bits than BITSIZE. Note that if
1467 SRC_MASK has more bits than BITSIZE, we can get into
1468 trouble; we would need to verify that B is in range, as
1469 we do for A above. */
1470 signmask
= ((~ howto
->src_mask
) >> 1) & howto
->src_mask
;
1472 /* Set all the bits above the sign bit. */
1473 b
= (b
^ signmask
) - signmask
;
1475 b
= (b
& addrmask
) >> bitpos
;
1477 /* Now we can do the addition. */
1480 /* See if the result has the correct sign. Bits above the
1481 sign bit are junk now; ignore them. If the sum is
1482 positive, make sure we did not have all negative inputs;
1483 if the sum is negative, make sure we did not have all
1484 positive inputs. The test below looks only at the sign
1485 bits, and it really just
1486 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1488 signmask
= (fieldmask
>> 1) + 1;
1489 if (((~ (a
^ b
)) & (a
^ sum
)) & signmask
)
1490 flag
= bfd_reloc_overflow
;
1494 case complain_overflow_unsigned
:
1495 /* Checking for an unsigned overflow is relatively easy:
1496 trim the addresses and add, and trim the result as well.
1497 Overflow is normally indicated when the result does not
1498 fit in the field. However, we also need to consider the
1499 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1500 input is 0x80000000, and bfd_vma is only 32 bits; then we
1501 will get sum == 0, but there is an overflow, since the
1502 inputs did not fit in the field. Instead of doing a
1503 separate test, we can check for this by or-ing in the
1504 operands when testing for the sum overflowing its final
1506 a
= (a
& addrmask
) >> rightshift
;
1507 b
= (b
& addrmask
) >> bitpos
;
1508 sum
= (a
+ b
) & addrmask
;
1509 if ((a
| b
| sum
) & ~ fieldmask
)
1510 flag
= bfd_reloc_overflow
;
1514 case complain_overflow_bitfield
:
1515 /* Much like the signed check, but for a field one bit
1516 wider, and no trimming inputs with addrmask. We allow a
1517 bitfield to represent numbers in the range -2**n to
1518 2**n-1, where n is the number of bits in the field.
1519 Note that when bfd_vma is 32 bits, a 32-bit reloc can't
1520 overflow, which is exactly what we want. */
1523 signmask
= ~ fieldmask
;
1525 if (ss
!= 0 && ss
!= (((bfd_vma
) -1 >> rightshift
) & signmask
))
1526 flag
= bfd_reloc_overflow
;
1528 signmask
= ((~ howto
->src_mask
) >> 1) & howto
->src_mask
;
1529 b
= (b
^ signmask
) - signmask
;
1535 /* We mask with addrmask here to explicitly allow an address
1536 wrap-around. The Linux kernel relies on it, and it is
1537 the only way to write assembler code which can run when
1538 loaded at a location 0x80000000 away from the location at
1539 which it is linked. */
1540 signmask
= fieldmask
+ 1;
1541 if (((~ (a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1542 flag
= bfd_reloc_overflow
;
1551 /* Put RELOCATION in the right bits. */
1552 relocation
>>= (bfd_vma
) rightshift
;
1553 relocation
<<= (bfd_vma
) bitpos
;
1555 /* Add RELOCATION to the right bits of X. */
1556 x
= ((x
& ~howto
->dst_mask
)
1557 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1559 /* Put the relocated value back in the object file. */
1566 bfd_put_8 (input_bfd
, x
, location
);
1569 bfd_put_16 (input_bfd
, x
, location
);
1572 bfd_put_32 (input_bfd
, x
, location
);
1576 bfd_put_64 (input_bfd
, x
, location
);
1589 howto manager, , typedef arelent, Relocations
1594 When an application wants to create a relocation, but doesn't
1595 know what the target machine might call it, it can find out by
1596 using this bit of code.
1605 The insides of a reloc code. The idea is that, eventually, there
1606 will be one enumerator for every type of relocation we ever do.
1607 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1608 return a howto pointer.
1610 This does mean that the application must determine the correct
1611 enumerator value; you can't get a howto pointer from a random set
1632 Basic absolute relocations of N bits.
1647 PC-relative relocations. Sometimes these are relative to the address
1648 of the relocation itself; sometimes they are relative to the start of
1649 the section containing the relocation. It depends on the specific target.
1651 The 24-bit relocation is used in some Intel 960 configurations.
1656 Section relative relocations. Some targets need this for DWARF2.
1659 BFD_RELOC_32_GOT_PCREL
1661 BFD_RELOC_16_GOT_PCREL
1663 BFD_RELOC_8_GOT_PCREL
1669 BFD_RELOC_LO16_GOTOFF
1671 BFD_RELOC_HI16_GOTOFF
1673 BFD_RELOC_HI16_S_GOTOFF
1677 BFD_RELOC_64_PLT_PCREL
1679 BFD_RELOC_32_PLT_PCREL
1681 BFD_RELOC_24_PLT_PCREL
1683 BFD_RELOC_16_PLT_PCREL
1685 BFD_RELOC_8_PLT_PCREL
1693 BFD_RELOC_LO16_PLTOFF
1695 BFD_RELOC_HI16_PLTOFF
1697 BFD_RELOC_HI16_S_PLTOFF
1704 BFD_RELOC_68K_GLOB_DAT
1706 BFD_RELOC_68K_JMP_SLOT
1708 BFD_RELOC_68K_RELATIVE
1710 Relocations used by 68K ELF.
1713 BFD_RELOC_32_BASEREL
1715 BFD_RELOC_16_BASEREL
1717 BFD_RELOC_LO16_BASEREL
1719 BFD_RELOC_HI16_BASEREL
1721 BFD_RELOC_HI16_S_BASEREL
1727 Linkage-table relative.
1732 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1735 BFD_RELOC_32_PCREL_S2
1737 BFD_RELOC_16_PCREL_S2
1739 BFD_RELOC_23_PCREL_S2
1741 These PC-relative relocations are stored as word displacements --
1742 i.e., byte displacements shifted right two bits. The 30-bit word
1743 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1744 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1745 signed 16-bit displacement is used on the MIPS, and the 23-bit
1746 displacement is used on the Alpha.
1753 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1754 the target word. These are used on the SPARC.
1761 For systems that allocate a Global Pointer register, these are
1762 displacements off that register. These relocation types are
1763 handled specially, because the value the register will have is
1764 decided relatively late.
1767 BFD_RELOC_I960_CALLJ
1769 Reloc types used for i960/b.out.
1774 BFD_RELOC_SPARC_WDISP22
1780 BFD_RELOC_SPARC_GOT10
1782 BFD_RELOC_SPARC_GOT13
1784 BFD_RELOC_SPARC_GOT22
1786 BFD_RELOC_SPARC_PC10
1788 BFD_RELOC_SPARC_PC22
1790 BFD_RELOC_SPARC_WPLT30
1792 BFD_RELOC_SPARC_COPY
1794 BFD_RELOC_SPARC_GLOB_DAT
1796 BFD_RELOC_SPARC_JMP_SLOT
1798 BFD_RELOC_SPARC_RELATIVE
1800 BFD_RELOC_SPARC_UA16
1802 BFD_RELOC_SPARC_UA32
1804 BFD_RELOC_SPARC_UA64
1806 SPARC ELF relocations. There is probably some overlap with other
1807 relocation types already defined.
1810 BFD_RELOC_SPARC_BASE13
1812 BFD_RELOC_SPARC_BASE22
1814 I think these are specific to SPARC a.out (e.g., Sun 4).
1824 BFD_RELOC_SPARC_OLO10
1826 BFD_RELOC_SPARC_HH22
1828 BFD_RELOC_SPARC_HM10
1830 BFD_RELOC_SPARC_LM22
1832 BFD_RELOC_SPARC_PC_HH22
1834 BFD_RELOC_SPARC_PC_HM10
1836 BFD_RELOC_SPARC_PC_LM22
1838 BFD_RELOC_SPARC_WDISP16
1840 BFD_RELOC_SPARC_WDISP19
1848 BFD_RELOC_SPARC_DISP64
1851 BFD_RELOC_SPARC_PLT32
1853 BFD_RELOC_SPARC_PLT64
1855 BFD_RELOC_SPARC_HIX22
1857 BFD_RELOC_SPARC_LOX10
1865 BFD_RELOC_SPARC_REGISTER
1870 BFD_RELOC_SPARC_REV32
1872 SPARC little endian relocation
1874 BFD_RELOC_SPARC_TLS_GD_HI22
1876 BFD_RELOC_SPARC_TLS_GD_LO10
1878 BFD_RELOC_SPARC_TLS_GD_ADD
1880 BFD_RELOC_SPARC_TLS_GD_CALL
1882 BFD_RELOC_SPARC_TLS_LDM_HI22
1884 BFD_RELOC_SPARC_TLS_LDM_LO10
1886 BFD_RELOC_SPARC_TLS_LDM_ADD
1888 BFD_RELOC_SPARC_TLS_LDM_CALL
1890 BFD_RELOC_SPARC_TLS_LDO_HIX22
1892 BFD_RELOC_SPARC_TLS_LDO_LOX10
1894 BFD_RELOC_SPARC_TLS_LDO_ADD
1896 BFD_RELOC_SPARC_TLS_IE_HI22
1898 BFD_RELOC_SPARC_TLS_IE_LO10
1900 BFD_RELOC_SPARC_TLS_IE_LD
1902 BFD_RELOC_SPARC_TLS_IE_LDX
1904 BFD_RELOC_SPARC_TLS_IE_ADD
1906 BFD_RELOC_SPARC_TLS_LE_HIX22
1908 BFD_RELOC_SPARC_TLS_LE_LOX10
1910 BFD_RELOC_SPARC_TLS_DTPMOD32
1912 BFD_RELOC_SPARC_TLS_DTPMOD64
1914 BFD_RELOC_SPARC_TLS_DTPOFF32
1916 BFD_RELOC_SPARC_TLS_DTPOFF64
1918 BFD_RELOC_SPARC_TLS_TPOFF32
1920 BFD_RELOC_SPARC_TLS_TPOFF64
1922 SPARC TLS relocations
1925 BFD_RELOC_ALPHA_GPDISP_HI16
1927 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1928 "addend" in some special way.
1929 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1930 writing; when reading, it will be the absolute section symbol. The
1931 addend is the displacement in bytes of the "lda" instruction from
1932 the "ldah" instruction (which is at the address of this reloc).
1934 BFD_RELOC_ALPHA_GPDISP_LO16
1936 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1937 with GPDISP_HI16 relocs. The addend is ignored when writing the
1938 relocations out, and is filled in with the file's GP value on
1939 reading, for convenience.
1942 BFD_RELOC_ALPHA_GPDISP
1944 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1945 relocation except that there is no accompanying GPDISP_LO16
1949 BFD_RELOC_ALPHA_LITERAL
1951 BFD_RELOC_ALPHA_ELF_LITERAL
1953 BFD_RELOC_ALPHA_LITUSE
1955 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1956 the assembler turns it into a LDQ instruction to load the address of
1957 the symbol, and then fills in a register in the real instruction.
1959 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1960 section symbol. The addend is ignored when writing, but is filled
1961 in with the file's GP value on reading, for convenience, as with the
1964 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1965 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1966 but it generates output not based on the position within the .got
1967 section, but relative to the GP value chosen for the file during the
1970 The LITUSE reloc, on the instruction using the loaded address, gives
1971 information to the linker that it might be able to use to optimize
1972 away some literal section references. The symbol is ignored (read
1973 as the absolute section symbol), and the "addend" indicates the type
1974 of instruction using the register:
1975 1 - "memory" fmt insn
1976 2 - byte-manipulation (byte offset reg)
1977 3 - jsr (target of branch)
1980 BFD_RELOC_ALPHA_HINT
1982 The HINT relocation indicates a value that should be filled into the
1983 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1984 prediction logic which may be provided on some processors.
1987 BFD_RELOC_ALPHA_LINKAGE
1989 The LINKAGE relocation outputs a linkage pair in the object file,
1990 which is filled by the linker.
1993 BFD_RELOC_ALPHA_CODEADDR
1995 The CODEADDR relocation outputs a STO_CA in the object file,
1996 which is filled by the linker.
1999 BFD_RELOC_ALPHA_GPREL_HI16
2001 BFD_RELOC_ALPHA_GPREL_LO16
2003 The GPREL_HI/LO relocations together form a 32-bit offset from the
2007 BFD_RELOC_ALPHA_BRSGP
2009 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2010 share a common GP, and the target address is adjusted for
2011 STO_ALPHA_STD_GPLOAD.
2014 BFD_RELOC_ALPHA_TLSGD
2016 BFD_RELOC_ALPHA_TLSLDM
2018 BFD_RELOC_ALPHA_DTPMOD64
2020 BFD_RELOC_ALPHA_GOTDTPREL16
2022 BFD_RELOC_ALPHA_DTPREL64
2024 BFD_RELOC_ALPHA_DTPREL_HI16
2026 BFD_RELOC_ALPHA_DTPREL_LO16
2028 BFD_RELOC_ALPHA_DTPREL16
2030 BFD_RELOC_ALPHA_GOTTPREL16
2032 BFD_RELOC_ALPHA_TPREL64
2034 BFD_RELOC_ALPHA_TPREL_HI16
2036 BFD_RELOC_ALPHA_TPREL_LO16
2038 BFD_RELOC_ALPHA_TPREL16
2040 Alpha thread-local storage relocations.
2045 Bits 27..2 of the relocation address shifted right 2 bits;
2046 simple reloc otherwise.
2049 BFD_RELOC_MIPS16_JMP
2051 The MIPS16 jump instruction.
2054 BFD_RELOC_MIPS16_GPREL
2056 MIPS16 GP relative reloc.
2061 High 16 bits of 32-bit value; simple reloc.
2065 High 16 bits of 32-bit value but the low 16 bits will be sign
2066 extended and added to form the final result. If the low 16
2067 bits form a negative number, we need to add one to the high value
2068 to compensate for the borrow when the low bits are added.
2075 BFD_RELOC_MIPS_LITERAL
2077 Relocation against a MIPS literal section.
2080 BFD_RELOC_MIPS_GOT16
2082 BFD_RELOC_MIPS_CALL16
2084 BFD_RELOC_MIPS_GOT_HI16
2086 BFD_RELOC_MIPS_GOT_LO16
2088 BFD_RELOC_MIPS_CALL_HI16
2090 BFD_RELOC_MIPS_CALL_LO16
2094 BFD_RELOC_MIPS_GOT_PAGE
2096 BFD_RELOC_MIPS_GOT_OFST
2098 BFD_RELOC_MIPS_GOT_DISP
2100 BFD_RELOC_MIPS_SHIFT5
2102 BFD_RELOC_MIPS_SHIFT6
2104 BFD_RELOC_MIPS_INSERT_A
2106 BFD_RELOC_MIPS_INSERT_B
2108 BFD_RELOC_MIPS_DELETE
2110 BFD_RELOC_MIPS_HIGHEST
2112 BFD_RELOC_MIPS_HIGHER
2114 BFD_RELOC_MIPS_SCN_DISP
2116 BFD_RELOC_MIPS_REL16
2118 BFD_RELOC_MIPS_RELGOT
2122 MIPS ELF relocations.
2126 BFD_RELOC_FRV_LABEL16
2128 BFD_RELOC_FRV_LABEL24
2134 BFD_RELOC_FRV_GPREL12
2136 BFD_RELOC_FRV_GPRELU12
2138 BFD_RELOC_FRV_GPREL32
2140 BFD_RELOC_FRV_GPRELHI
2142 BFD_RELOC_FRV_GPRELLO
2150 BFD_RELOC_FRV_FUNCDESC
2152 BFD_RELOC_FRV_FUNCDESC_GOT12
2154 BFD_RELOC_FRV_FUNCDESC_GOTHI
2156 BFD_RELOC_FRV_FUNCDESC_GOTLO
2158 BFD_RELOC_FRV_FUNCDESC_VALUE
2160 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2162 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2164 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2166 BFD_RELOC_FRV_GOTOFF12
2168 BFD_RELOC_FRV_GOTOFFHI
2170 BFD_RELOC_FRV_GOTOFFLO
2172 Fujitsu Frv Relocations.
2176 BFD_RELOC_MN10300_GOTOFF24
2178 This is a 24bit GOT-relative reloc for the mn10300.
2180 BFD_RELOC_MN10300_GOT32
2182 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2185 BFD_RELOC_MN10300_GOT24
2187 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2190 BFD_RELOC_MN10300_GOT16
2192 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2195 BFD_RELOC_MN10300_COPY
2197 Copy symbol at runtime.
2199 BFD_RELOC_MN10300_GLOB_DAT
2203 BFD_RELOC_MN10300_JMP_SLOT
2207 BFD_RELOC_MN10300_RELATIVE
2209 Adjust by program base.
2219 BFD_RELOC_386_GLOB_DAT
2221 BFD_RELOC_386_JUMP_SLOT
2223 BFD_RELOC_386_RELATIVE
2225 BFD_RELOC_386_GOTOFF
2229 BFD_RELOC_386_TLS_TPOFF
2231 BFD_RELOC_386_TLS_IE
2233 BFD_RELOC_386_TLS_GOTIE
2235 BFD_RELOC_386_TLS_LE
2237 BFD_RELOC_386_TLS_GD
2239 BFD_RELOC_386_TLS_LDM
2241 BFD_RELOC_386_TLS_LDO_32
2243 BFD_RELOC_386_TLS_IE_32
2245 BFD_RELOC_386_TLS_LE_32
2247 BFD_RELOC_386_TLS_DTPMOD32
2249 BFD_RELOC_386_TLS_DTPOFF32
2251 BFD_RELOC_386_TLS_TPOFF32
2253 i386/elf relocations
2256 BFD_RELOC_X86_64_GOT32
2258 BFD_RELOC_X86_64_PLT32
2260 BFD_RELOC_X86_64_COPY
2262 BFD_RELOC_X86_64_GLOB_DAT
2264 BFD_RELOC_X86_64_JUMP_SLOT
2266 BFD_RELOC_X86_64_RELATIVE
2268 BFD_RELOC_X86_64_GOTPCREL
2270 BFD_RELOC_X86_64_32S
2272 BFD_RELOC_X86_64_DTPMOD64
2274 BFD_RELOC_X86_64_DTPOFF64
2276 BFD_RELOC_X86_64_TPOFF64
2278 BFD_RELOC_X86_64_TLSGD
2280 BFD_RELOC_X86_64_TLSLD
2282 BFD_RELOC_X86_64_DTPOFF32
2284 BFD_RELOC_X86_64_GOTTPOFF
2286 BFD_RELOC_X86_64_TPOFF32
2288 x86-64/elf relocations
2291 BFD_RELOC_NS32K_IMM_8
2293 BFD_RELOC_NS32K_IMM_16
2295 BFD_RELOC_NS32K_IMM_32
2297 BFD_RELOC_NS32K_IMM_8_PCREL
2299 BFD_RELOC_NS32K_IMM_16_PCREL
2301 BFD_RELOC_NS32K_IMM_32_PCREL
2303 BFD_RELOC_NS32K_DISP_8
2305 BFD_RELOC_NS32K_DISP_16
2307 BFD_RELOC_NS32K_DISP_32
2309 BFD_RELOC_NS32K_DISP_8_PCREL
2311 BFD_RELOC_NS32K_DISP_16_PCREL
2313 BFD_RELOC_NS32K_DISP_32_PCREL
2318 BFD_RELOC_PDP11_DISP_8_PCREL
2320 BFD_RELOC_PDP11_DISP_6_PCREL
2325 BFD_RELOC_PJ_CODE_HI16
2327 BFD_RELOC_PJ_CODE_LO16
2329 BFD_RELOC_PJ_CODE_DIR16
2331 BFD_RELOC_PJ_CODE_DIR32
2333 BFD_RELOC_PJ_CODE_REL16
2335 BFD_RELOC_PJ_CODE_REL32
2337 Picojava relocs. Not all of these appear in object files.
2348 BFD_RELOC_PPC_B16_BRTAKEN
2350 BFD_RELOC_PPC_B16_BRNTAKEN
2354 BFD_RELOC_PPC_BA16_BRTAKEN
2356 BFD_RELOC_PPC_BA16_BRNTAKEN
2360 BFD_RELOC_PPC_GLOB_DAT
2362 BFD_RELOC_PPC_JMP_SLOT
2364 BFD_RELOC_PPC_RELATIVE
2366 BFD_RELOC_PPC_LOCAL24PC
2368 BFD_RELOC_PPC_EMB_NADDR32
2370 BFD_RELOC_PPC_EMB_NADDR16
2372 BFD_RELOC_PPC_EMB_NADDR16_LO
2374 BFD_RELOC_PPC_EMB_NADDR16_HI
2376 BFD_RELOC_PPC_EMB_NADDR16_HA
2378 BFD_RELOC_PPC_EMB_SDAI16
2380 BFD_RELOC_PPC_EMB_SDA2I16
2382 BFD_RELOC_PPC_EMB_SDA2REL
2384 BFD_RELOC_PPC_EMB_SDA21
2386 BFD_RELOC_PPC_EMB_MRKREF
2388 BFD_RELOC_PPC_EMB_RELSEC16
2390 BFD_RELOC_PPC_EMB_RELST_LO
2392 BFD_RELOC_PPC_EMB_RELST_HI
2394 BFD_RELOC_PPC_EMB_RELST_HA
2396 BFD_RELOC_PPC_EMB_BIT_FLD
2398 BFD_RELOC_PPC_EMB_RELSDA
2400 BFD_RELOC_PPC64_HIGHER
2402 BFD_RELOC_PPC64_HIGHER_S
2404 BFD_RELOC_PPC64_HIGHEST
2406 BFD_RELOC_PPC64_HIGHEST_S
2408 BFD_RELOC_PPC64_TOC16_LO
2410 BFD_RELOC_PPC64_TOC16_HI
2412 BFD_RELOC_PPC64_TOC16_HA
2416 BFD_RELOC_PPC64_PLTGOT16
2418 BFD_RELOC_PPC64_PLTGOT16_LO
2420 BFD_RELOC_PPC64_PLTGOT16_HI
2422 BFD_RELOC_PPC64_PLTGOT16_HA
2424 BFD_RELOC_PPC64_ADDR16_DS
2426 BFD_RELOC_PPC64_ADDR16_LO_DS
2428 BFD_RELOC_PPC64_GOT16_DS
2430 BFD_RELOC_PPC64_GOT16_LO_DS
2432 BFD_RELOC_PPC64_PLT16_LO_DS
2434 BFD_RELOC_PPC64_SECTOFF_DS
2436 BFD_RELOC_PPC64_SECTOFF_LO_DS
2438 BFD_RELOC_PPC64_TOC16_DS
2440 BFD_RELOC_PPC64_TOC16_LO_DS
2442 BFD_RELOC_PPC64_PLTGOT16_DS
2444 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2446 Power(rs6000) and PowerPC relocations.
2451 BFD_RELOC_PPC_DTPMOD
2453 BFD_RELOC_PPC_TPREL16
2455 BFD_RELOC_PPC_TPREL16_LO
2457 BFD_RELOC_PPC_TPREL16_HI
2459 BFD_RELOC_PPC_TPREL16_HA
2463 BFD_RELOC_PPC_DTPREL16
2465 BFD_RELOC_PPC_DTPREL16_LO
2467 BFD_RELOC_PPC_DTPREL16_HI
2469 BFD_RELOC_PPC_DTPREL16_HA
2471 BFD_RELOC_PPC_DTPREL
2473 BFD_RELOC_PPC_GOT_TLSGD16
2475 BFD_RELOC_PPC_GOT_TLSGD16_LO
2477 BFD_RELOC_PPC_GOT_TLSGD16_HI
2479 BFD_RELOC_PPC_GOT_TLSGD16_HA
2481 BFD_RELOC_PPC_GOT_TLSLD16
2483 BFD_RELOC_PPC_GOT_TLSLD16_LO
2485 BFD_RELOC_PPC_GOT_TLSLD16_HI
2487 BFD_RELOC_PPC_GOT_TLSLD16_HA
2489 BFD_RELOC_PPC_GOT_TPREL16
2491 BFD_RELOC_PPC_GOT_TPREL16_LO
2493 BFD_RELOC_PPC_GOT_TPREL16_HI
2495 BFD_RELOC_PPC_GOT_TPREL16_HA
2497 BFD_RELOC_PPC_GOT_DTPREL16
2499 BFD_RELOC_PPC_GOT_DTPREL16_LO
2501 BFD_RELOC_PPC_GOT_DTPREL16_HI
2503 BFD_RELOC_PPC_GOT_DTPREL16_HA
2505 BFD_RELOC_PPC64_TPREL16_DS
2507 BFD_RELOC_PPC64_TPREL16_LO_DS
2509 BFD_RELOC_PPC64_TPREL16_HIGHER
2511 BFD_RELOC_PPC64_TPREL16_HIGHERA
2513 BFD_RELOC_PPC64_TPREL16_HIGHEST
2515 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2517 BFD_RELOC_PPC64_DTPREL16_DS
2519 BFD_RELOC_PPC64_DTPREL16_LO_DS
2521 BFD_RELOC_PPC64_DTPREL16_HIGHER
2523 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2525 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2527 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2529 PowerPC and PowerPC64 thread-local storage relocations.
2534 IBM 370/390 relocations
2539 The type of reloc used to build a constructor table - at the moment
2540 probably a 32 bit wide absolute relocation, but the target can choose.
2541 It generally does map to one of the other relocation types.
2544 BFD_RELOC_ARM_PCREL_BRANCH
2546 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2547 not stored in the instruction.
2549 BFD_RELOC_ARM_PCREL_BLX
2551 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2552 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2553 field in the instruction.
2555 BFD_RELOC_THUMB_PCREL_BLX
2557 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2558 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2559 field in the instruction.
2561 BFD_RELOC_ARM_IMMEDIATE
2563 BFD_RELOC_ARM_ADRL_IMMEDIATE
2565 BFD_RELOC_ARM_OFFSET_IMM
2567 BFD_RELOC_ARM_SHIFT_IMM
2573 BFD_RELOC_ARM_CP_OFF_IMM
2575 BFD_RELOC_ARM_CP_OFF_IMM_S2
2577 BFD_RELOC_ARM_ADR_IMM
2579 BFD_RELOC_ARM_LDR_IMM
2581 BFD_RELOC_ARM_LITERAL
2583 BFD_RELOC_ARM_IN_POOL
2585 BFD_RELOC_ARM_OFFSET_IMM8
2587 BFD_RELOC_ARM_HWLITERAL
2589 BFD_RELOC_ARM_THUMB_ADD
2591 BFD_RELOC_ARM_THUMB_IMM
2593 BFD_RELOC_ARM_THUMB_SHIFT
2595 BFD_RELOC_ARM_THUMB_OFFSET
2601 BFD_RELOC_ARM_JUMP_SLOT
2605 BFD_RELOC_ARM_GLOB_DAT
2609 BFD_RELOC_ARM_RELATIVE
2611 BFD_RELOC_ARM_GOTOFF
2615 These relocs are only used within the ARM assembler. They are not
2616 (at present) written to any object files.
2619 BFD_RELOC_SH_PCDISP8BY2
2621 BFD_RELOC_SH_PCDISP12BY2
2625 BFD_RELOC_SH_IMM4BY2
2627 BFD_RELOC_SH_IMM4BY4
2631 BFD_RELOC_SH_IMM8BY2
2633 BFD_RELOC_SH_IMM8BY4
2635 BFD_RELOC_SH_PCRELIMM8BY2
2637 BFD_RELOC_SH_PCRELIMM8BY4
2639 BFD_RELOC_SH_SWITCH16
2641 BFD_RELOC_SH_SWITCH32
2655 BFD_RELOC_SH_LOOP_START
2657 BFD_RELOC_SH_LOOP_END
2661 BFD_RELOC_SH_GLOB_DAT
2663 BFD_RELOC_SH_JMP_SLOT
2665 BFD_RELOC_SH_RELATIVE
2669 BFD_RELOC_SH_GOT_LOW16
2671 BFD_RELOC_SH_GOT_MEDLOW16
2673 BFD_RELOC_SH_GOT_MEDHI16
2675 BFD_RELOC_SH_GOT_HI16
2677 BFD_RELOC_SH_GOTPLT_LOW16
2679 BFD_RELOC_SH_GOTPLT_MEDLOW16
2681 BFD_RELOC_SH_GOTPLT_MEDHI16
2683 BFD_RELOC_SH_GOTPLT_HI16
2685 BFD_RELOC_SH_PLT_LOW16
2687 BFD_RELOC_SH_PLT_MEDLOW16
2689 BFD_RELOC_SH_PLT_MEDHI16
2691 BFD_RELOC_SH_PLT_HI16
2693 BFD_RELOC_SH_GOTOFF_LOW16
2695 BFD_RELOC_SH_GOTOFF_MEDLOW16
2697 BFD_RELOC_SH_GOTOFF_MEDHI16
2699 BFD_RELOC_SH_GOTOFF_HI16
2701 BFD_RELOC_SH_GOTPC_LOW16
2703 BFD_RELOC_SH_GOTPC_MEDLOW16
2705 BFD_RELOC_SH_GOTPC_MEDHI16
2707 BFD_RELOC_SH_GOTPC_HI16
2711 BFD_RELOC_SH_GLOB_DAT64
2713 BFD_RELOC_SH_JMP_SLOT64
2715 BFD_RELOC_SH_RELATIVE64
2717 BFD_RELOC_SH_GOT10BY4
2719 BFD_RELOC_SH_GOT10BY8
2721 BFD_RELOC_SH_GOTPLT10BY4
2723 BFD_RELOC_SH_GOTPLT10BY8
2725 BFD_RELOC_SH_GOTPLT32
2727 BFD_RELOC_SH_SHMEDIA_CODE
2733 BFD_RELOC_SH_IMMS6BY32
2739 BFD_RELOC_SH_IMMS10BY2
2741 BFD_RELOC_SH_IMMS10BY4
2743 BFD_RELOC_SH_IMMS10BY8
2749 BFD_RELOC_SH_IMM_LOW16
2751 BFD_RELOC_SH_IMM_LOW16_PCREL
2753 BFD_RELOC_SH_IMM_MEDLOW16
2755 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
2757 BFD_RELOC_SH_IMM_MEDHI16
2759 BFD_RELOC_SH_IMM_MEDHI16_PCREL
2761 BFD_RELOC_SH_IMM_HI16
2763 BFD_RELOC_SH_IMM_HI16_PCREL
2767 BFD_RELOC_SH_TLS_GD_32
2769 BFD_RELOC_SH_TLS_LD_32
2771 BFD_RELOC_SH_TLS_LDO_32
2773 BFD_RELOC_SH_TLS_IE_32
2775 BFD_RELOC_SH_TLS_LE_32
2777 BFD_RELOC_SH_TLS_DTPMOD32
2779 BFD_RELOC_SH_TLS_DTPOFF32
2781 BFD_RELOC_SH_TLS_TPOFF32
2783 Renesas / SuperH SH relocs. Not all of these appear in object files.
2786 BFD_RELOC_THUMB_PCREL_BRANCH9
2788 BFD_RELOC_THUMB_PCREL_BRANCH12
2790 BFD_RELOC_THUMB_PCREL_BRANCH23
2792 Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
2793 be zero and is not stored in the instruction.
2796 BFD_RELOC_ARC_B22_PCREL
2799 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
2800 not stored in the instruction. The high 20 bits are installed in bits 26
2801 through 7 of the instruction.
2805 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
2806 stored in the instruction. The high 24 bits are installed in bits 23
2810 BFD_RELOC_D10V_10_PCREL_R
2812 Mitsubishi D10V relocs.
2813 This is a 10-bit reloc with the right 2 bits
2816 BFD_RELOC_D10V_10_PCREL_L
2818 Mitsubishi D10V relocs.
2819 This is a 10-bit reloc with the right 2 bits
2820 assumed to be 0. This is the same as the previous reloc
2821 except it is in the left container, i.e.,
2822 shifted left 15 bits.
2826 This is an 18-bit reloc with the right 2 bits
2829 BFD_RELOC_D10V_18_PCREL
2831 This is an 18-bit reloc with the right 2 bits
2837 Mitsubishi D30V relocs.
2838 This is a 6-bit absolute reloc.
2840 BFD_RELOC_D30V_9_PCREL
2842 This is a 6-bit pc-relative reloc with
2843 the right 3 bits assumed to be 0.
2845 BFD_RELOC_D30V_9_PCREL_R
2847 This is a 6-bit pc-relative reloc with
2848 the right 3 bits assumed to be 0. Same
2849 as the previous reloc but on the right side
2854 This is a 12-bit absolute reloc with the
2855 right 3 bitsassumed to be 0.
2857 BFD_RELOC_D30V_15_PCREL
2859 This is a 12-bit pc-relative reloc with
2860 the right 3 bits assumed to be 0.
2862 BFD_RELOC_D30V_15_PCREL_R
2864 This is a 12-bit pc-relative reloc with
2865 the right 3 bits assumed to be 0. Same
2866 as the previous reloc but on the right side
2871 This is an 18-bit absolute reloc with
2872 the right 3 bits assumed to be 0.
2874 BFD_RELOC_D30V_21_PCREL
2876 This is an 18-bit pc-relative reloc with
2877 the right 3 bits assumed to be 0.
2879 BFD_RELOC_D30V_21_PCREL_R
2881 This is an 18-bit pc-relative reloc with
2882 the right 3 bits assumed to be 0. Same
2883 as the previous reloc but on the right side
2888 This is a 32-bit absolute reloc.
2890 BFD_RELOC_D30V_32_PCREL
2892 This is a 32-bit pc-relative reloc.
2895 BFD_RELOC_DLX_HI16_S
2910 Renesas M32R (formerly Mitsubishi M32R) relocs.
2911 This is a 24 bit absolute address.
2913 BFD_RELOC_M32R_10_PCREL
2915 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
2917 BFD_RELOC_M32R_18_PCREL
2919 This is an 18-bit reloc with the right 2 bits assumed to be 0.
2921 BFD_RELOC_M32R_26_PCREL
2923 This is a 26-bit reloc with the right 2 bits assumed to be 0.
2925 BFD_RELOC_M32R_HI16_ULO
2927 This is a 16-bit reloc containing the high 16 bits of an address
2928 used when the lower 16 bits are treated as unsigned.
2930 BFD_RELOC_M32R_HI16_SLO
2932 This is a 16-bit reloc containing the high 16 bits of an address
2933 used when the lower 16 bits are treated as signed.
2937 This is a 16-bit reloc containing the lower 16 bits of an address.
2939 BFD_RELOC_M32R_SDA16
2941 This is a 16-bit reloc containing the small data area offset for use in
2942 add3, load, and store instructions.
2944 BFD_RELOC_M32R_GOT24
2946 BFD_RELOC_M32R_26_PLTREL
2950 BFD_RELOC_M32R_GLOB_DAT
2952 BFD_RELOC_M32R_JMP_SLOT
2954 BFD_RELOC_M32R_RELATIVE
2956 BFD_RELOC_M32R_GOTOFF
2958 BFD_RELOC_M32R_GOTOFF_HI_ULO
2960 BFD_RELOC_M32R_GOTOFF_HI_SLO
2962 BFD_RELOC_M32R_GOTOFF_LO
2964 BFD_RELOC_M32R_GOTPC24
2966 BFD_RELOC_M32R_GOT16_HI_ULO
2968 BFD_RELOC_M32R_GOT16_HI_SLO
2970 BFD_RELOC_M32R_GOT16_LO
2972 BFD_RELOC_M32R_GOTPC_HI_ULO
2974 BFD_RELOC_M32R_GOTPC_HI_SLO
2976 BFD_RELOC_M32R_GOTPC_LO
2982 BFD_RELOC_V850_9_PCREL
2984 This is a 9-bit reloc
2986 BFD_RELOC_V850_22_PCREL
2988 This is a 22-bit reloc
2991 BFD_RELOC_V850_SDA_16_16_OFFSET
2993 This is a 16 bit offset from the short data area pointer.
2995 BFD_RELOC_V850_SDA_15_16_OFFSET
2997 This is a 16 bit offset (of which only 15 bits are used) from the
2998 short data area pointer.
3000 BFD_RELOC_V850_ZDA_16_16_OFFSET
3002 This is a 16 bit offset from the zero data area pointer.
3004 BFD_RELOC_V850_ZDA_15_16_OFFSET
3006 This is a 16 bit offset (of which only 15 bits are used) from the
3007 zero data area pointer.
3009 BFD_RELOC_V850_TDA_6_8_OFFSET
3011 This is an 8 bit offset (of which only 6 bits are used) from the
3012 tiny data area pointer.
3014 BFD_RELOC_V850_TDA_7_8_OFFSET
3016 This is an 8bit offset (of which only 7 bits are used) from the tiny
3019 BFD_RELOC_V850_TDA_7_7_OFFSET
3021 This is a 7 bit offset from the tiny data area pointer.
3023 BFD_RELOC_V850_TDA_16_16_OFFSET
3025 This is a 16 bit offset from the tiny data area pointer.
3028 BFD_RELOC_V850_TDA_4_5_OFFSET
3030 This is a 5 bit offset (of which only 4 bits are used) from the tiny
3033 BFD_RELOC_V850_TDA_4_4_OFFSET
3035 This is a 4 bit offset from the tiny data area pointer.
3037 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
3039 This is a 16 bit offset from the short data area pointer, with the
3040 bits placed non-contiguously in the instruction.
3042 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
3044 This is a 16 bit offset from the zero data area pointer, with the
3045 bits placed non-contiguously in the instruction.
3047 BFD_RELOC_V850_CALLT_6_7_OFFSET
3049 This is a 6 bit offset from the call table base pointer.
3051 BFD_RELOC_V850_CALLT_16_16_OFFSET
3053 This is a 16 bit offset from the call table base pointer.
3055 BFD_RELOC_V850_LONGCALL
3057 Used for relaxing indirect function calls.
3059 BFD_RELOC_V850_LONGJUMP
3061 Used for relaxing indirect jumps.
3063 BFD_RELOC_V850_ALIGN
3065 Used to maintain alignment whilst relaxing.
3067 BFD_RELOC_MN10300_32_PCREL
3069 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3072 BFD_RELOC_MN10300_16_PCREL
3074 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3080 This is a 8bit DP reloc for the tms320c30, where the most
3081 significant 8 bits of a 24 bit word are placed into the least
3082 significant 8 bits of the opcode.
3085 BFD_RELOC_TIC54X_PARTLS7
3087 This is a 7bit reloc for the tms320c54x, where the least
3088 significant 7 bits of a 16 bit word are placed into the least
3089 significant 7 bits of the opcode.
3092 BFD_RELOC_TIC54X_PARTMS9
3094 This is a 9bit DP reloc for the tms320c54x, where the most
3095 significant 9 bits of a 16 bit word are placed into the least
3096 significant 9 bits of the opcode.
3101 This is an extended address 23-bit reloc for the tms320c54x.
3104 BFD_RELOC_TIC54X_16_OF_23
3106 This is a 16-bit reloc for the tms320c54x, where the least
3107 significant 16 bits of a 23-bit extended address are placed into
3111 BFD_RELOC_TIC54X_MS7_OF_23
3113 This is a reloc for the tms320c54x, where the most
3114 significant 7 bits of a 23-bit extended address are placed into
3120 This is a 48 bit reloc for the FR30 that stores 32 bits.
3124 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3127 BFD_RELOC_FR30_6_IN_4
3129 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3132 BFD_RELOC_FR30_8_IN_8
3134 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3137 BFD_RELOC_FR30_9_IN_8
3139 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3142 BFD_RELOC_FR30_10_IN_8
3144 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3147 BFD_RELOC_FR30_9_PCREL
3149 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3150 short offset into 8 bits.
3152 BFD_RELOC_FR30_12_PCREL
3154 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3155 short offset into 11 bits.
3158 BFD_RELOC_MCORE_PCREL_IMM8BY4
3160 BFD_RELOC_MCORE_PCREL_IMM11BY2
3162 BFD_RELOC_MCORE_PCREL_IMM4BY2
3164 BFD_RELOC_MCORE_PCREL_32
3166 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3170 Motorola Mcore relocations.
3175 BFD_RELOC_MMIX_GETA_1
3177 BFD_RELOC_MMIX_GETA_2
3179 BFD_RELOC_MMIX_GETA_3
3181 These are relocations for the GETA instruction.
3183 BFD_RELOC_MMIX_CBRANCH
3185 BFD_RELOC_MMIX_CBRANCH_J
3187 BFD_RELOC_MMIX_CBRANCH_1
3189 BFD_RELOC_MMIX_CBRANCH_2
3191 BFD_RELOC_MMIX_CBRANCH_3
3193 These are relocations for a conditional branch instruction.
3195 BFD_RELOC_MMIX_PUSHJ
3197 BFD_RELOC_MMIX_PUSHJ_1
3199 BFD_RELOC_MMIX_PUSHJ_2
3201 BFD_RELOC_MMIX_PUSHJ_3
3203 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
3205 These are relocations for the PUSHJ instruction.
3209 BFD_RELOC_MMIX_JMP_1
3211 BFD_RELOC_MMIX_JMP_2
3213 BFD_RELOC_MMIX_JMP_3
3215 These are relocations for the JMP instruction.
3217 BFD_RELOC_MMIX_ADDR19
3219 This is a relocation for a relative address as in a GETA instruction or
3222 BFD_RELOC_MMIX_ADDR27
3224 This is a relocation for a relative address as in a JMP instruction.
3226 BFD_RELOC_MMIX_REG_OR_BYTE
3228 This is a relocation for an instruction field that may be a general
3229 register or a value 0..255.
3233 This is a relocation for an instruction field that may be a general
3236 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3238 This is a relocation for two instruction fields holding a register and
3239 an offset, the equivalent of the relocation.
3241 BFD_RELOC_MMIX_LOCAL
3243 This relocation is an assertion that the expression is not allocated as
3244 a global register. It does not modify contents.
3247 BFD_RELOC_AVR_7_PCREL
3249 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3250 short offset into 7 bits.
3252 BFD_RELOC_AVR_13_PCREL
3254 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3255 short offset into 12 bits.
3259 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3260 program memory address) into 16 bits.
3262 BFD_RELOC_AVR_LO8_LDI
3264 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3265 data memory address) into 8 bit immediate value of LDI insn.
3267 BFD_RELOC_AVR_HI8_LDI
3269 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3270 of data memory address) into 8 bit immediate value of LDI insn.
3272 BFD_RELOC_AVR_HH8_LDI
3274 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3275 of program memory address) into 8 bit immediate value of LDI insn.
3277 BFD_RELOC_AVR_LO8_LDI_NEG
3279 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3280 (usually data memory address) into 8 bit immediate value of SUBI insn.
3282 BFD_RELOC_AVR_HI8_LDI_NEG
3284 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3285 (high 8 bit of data memory address) into 8 bit immediate value of
3288 BFD_RELOC_AVR_HH8_LDI_NEG
3290 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3291 (most high 8 bit of program memory address) into 8 bit immediate value
3292 of LDI or SUBI insn.
3294 BFD_RELOC_AVR_LO8_LDI_PM
3296 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3297 command address) into 8 bit immediate value of LDI insn.
3299 BFD_RELOC_AVR_HI8_LDI_PM
3301 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3302 of command address) into 8 bit immediate value of LDI insn.
3304 BFD_RELOC_AVR_HH8_LDI_PM
3306 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3307 of command address) into 8 bit immediate value of LDI insn.
3309 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3311 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3312 (usually command address) into 8 bit immediate value of SUBI insn.
3314 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3316 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3317 (high 8 bit of 16 bit command address) into 8 bit immediate value
3320 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3322 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3323 (high 6 bit of 22 bit command address) into 8 bit immediate
3328 This is a 32 bit reloc for the AVR that stores 23 bit value
3342 32 bit PC relative PLT address.
3346 Copy symbol at runtime.
3348 BFD_RELOC_390_GLOB_DAT
3352 BFD_RELOC_390_JMP_SLOT
3356 BFD_RELOC_390_RELATIVE
3358 Adjust by program base.
3362 32 bit PC relative offset to GOT.
3368 BFD_RELOC_390_PC16DBL
3370 PC relative 16 bit shifted by 1.
3372 BFD_RELOC_390_PLT16DBL
3374 16 bit PC rel. PLT shifted by 1.
3376 BFD_RELOC_390_PC32DBL
3378 PC relative 32 bit shifted by 1.
3380 BFD_RELOC_390_PLT32DBL
3382 32 bit PC rel. PLT shifted by 1.
3384 BFD_RELOC_390_GOTPCDBL
3386 32 bit PC rel. GOT shifted by 1.
3394 64 bit PC relative PLT address.
3396 BFD_RELOC_390_GOTENT
3398 32 bit rel. offset to GOT entry.
3400 BFD_RELOC_390_GOTOFF64
3402 64 bit offset to GOT.
3404 BFD_RELOC_390_GOTPLT12
3406 12-bit offset to symbol-entry within GOT, with PLT handling.
3408 BFD_RELOC_390_GOTPLT16
3410 16-bit offset to symbol-entry within GOT, with PLT handling.
3412 BFD_RELOC_390_GOTPLT32
3414 32-bit offset to symbol-entry within GOT, with PLT handling.
3416 BFD_RELOC_390_GOTPLT64
3418 64-bit offset to symbol-entry within GOT, with PLT handling.
3420 BFD_RELOC_390_GOTPLTENT
3422 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
3424 BFD_RELOC_390_PLTOFF16
3426 16-bit rel. offset from the GOT to a PLT entry.
3428 BFD_RELOC_390_PLTOFF32
3430 32-bit rel. offset from the GOT to a PLT entry.
3432 BFD_RELOC_390_PLTOFF64
3434 64-bit rel. offset from the GOT to a PLT entry.
3437 BFD_RELOC_390_TLS_LOAD
3439 BFD_RELOC_390_TLS_GDCALL
3441 BFD_RELOC_390_TLS_LDCALL
3443 BFD_RELOC_390_TLS_GD32
3445 BFD_RELOC_390_TLS_GD64
3447 BFD_RELOC_390_TLS_GOTIE12
3449 BFD_RELOC_390_TLS_GOTIE32
3451 BFD_RELOC_390_TLS_GOTIE64
3453 BFD_RELOC_390_TLS_LDM32
3455 BFD_RELOC_390_TLS_LDM64
3457 BFD_RELOC_390_TLS_IE32
3459 BFD_RELOC_390_TLS_IE64
3461 BFD_RELOC_390_TLS_IEENT
3463 BFD_RELOC_390_TLS_LE32
3465 BFD_RELOC_390_TLS_LE64
3467 BFD_RELOC_390_TLS_LDO32
3469 BFD_RELOC_390_TLS_LDO64
3471 BFD_RELOC_390_TLS_DTPMOD
3473 BFD_RELOC_390_TLS_DTPOFF
3475 BFD_RELOC_390_TLS_TPOFF
3477 s390 tls relocations.
3484 BFD_RELOC_390_GOTPLT20
3486 BFD_RELOC_390_TLS_GOTIE20
3488 Long displacement extension.
3493 Scenix IP2K - 9-bit register number / data address
3497 Scenix IP2K - 4-bit register/data bank number
3499 BFD_RELOC_IP2K_ADDR16CJP
3501 Scenix IP2K - low 13 bits of instruction word address
3503 BFD_RELOC_IP2K_PAGE3
3505 Scenix IP2K - high 3 bits of instruction word address
3507 BFD_RELOC_IP2K_LO8DATA
3509 BFD_RELOC_IP2K_HI8DATA
3511 BFD_RELOC_IP2K_EX8DATA
3513 Scenix IP2K - ext/low/high 8 bits of data address
3515 BFD_RELOC_IP2K_LO8INSN
3517 BFD_RELOC_IP2K_HI8INSN
3519 Scenix IP2K - low/high 8 bits of instruction word address
3521 BFD_RELOC_IP2K_PC_SKIP
3523 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
3527 Scenix IP2K - 16 bit word address in text section.
3529 BFD_RELOC_IP2K_FR_OFFSET
3531 Scenix IP2K - 7-bit sp or dp offset
3533 BFD_RELOC_VPE4KMATH_DATA
3535 BFD_RELOC_VPE4KMATH_INSN
3537 Scenix VPE4K coprocessor - data/insn-space addressing
3540 BFD_RELOC_VTABLE_INHERIT
3542 BFD_RELOC_VTABLE_ENTRY
3544 These two relocations are used by the linker to determine which of
3545 the entries in a C++ virtual function table are actually used. When
3546 the --gc-sections option is given, the linker will zero out the entries
3547 that are not used, so that the code for those functions need not be
3548 included in the output.
3550 VTABLE_INHERIT is a zero-space relocation used to describe to the
3551 linker the inheritance tree of a C++ virtual function table. The
3552 relocation's symbol should be the parent class' vtable, and the
3553 relocation should be located at the child vtable.
3555 VTABLE_ENTRY is a zero-space relocation that describes the use of a
3556 virtual function table entry. The reloc's symbol should refer to the
3557 table of the class mentioned in the code. Off of that base, an offset
3558 describes the entry that is being used. For Rela hosts, this offset
3559 is stored in the reloc's addend. For Rel hosts, we are forced to put
3560 this offset in the reloc's section offset.
3563 BFD_RELOC_IA64_IMM14
3565 BFD_RELOC_IA64_IMM22
3567 BFD_RELOC_IA64_IMM64
3569 BFD_RELOC_IA64_DIR32MSB
3571 BFD_RELOC_IA64_DIR32LSB
3573 BFD_RELOC_IA64_DIR64MSB
3575 BFD_RELOC_IA64_DIR64LSB
3577 BFD_RELOC_IA64_GPREL22
3579 BFD_RELOC_IA64_GPREL64I
3581 BFD_RELOC_IA64_GPREL32MSB
3583 BFD_RELOC_IA64_GPREL32LSB
3585 BFD_RELOC_IA64_GPREL64MSB
3587 BFD_RELOC_IA64_GPREL64LSB
3589 BFD_RELOC_IA64_LTOFF22
3591 BFD_RELOC_IA64_LTOFF64I
3593 BFD_RELOC_IA64_PLTOFF22
3595 BFD_RELOC_IA64_PLTOFF64I
3597 BFD_RELOC_IA64_PLTOFF64MSB
3599 BFD_RELOC_IA64_PLTOFF64LSB
3601 BFD_RELOC_IA64_FPTR64I
3603 BFD_RELOC_IA64_FPTR32MSB
3605 BFD_RELOC_IA64_FPTR32LSB
3607 BFD_RELOC_IA64_FPTR64MSB
3609 BFD_RELOC_IA64_FPTR64LSB
3611 BFD_RELOC_IA64_PCREL21B
3613 BFD_RELOC_IA64_PCREL21BI
3615 BFD_RELOC_IA64_PCREL21M
3617 BFD_RELOC_IA64_PCREL21F
3619 BFD_RELOC_IA64_PCREL22
3621 BFD_RELOC_IA64_PCREL60B
3623 BFD_RELOC_IA64_PCREL64I
3625 BFD_RELOC_IA64_PCREL32MSB
3627 BFD_RELOC_IA64_PCREL32LSB
3629 BFD_RELOC_IA64_PCREL64MSB
3631 BFD_RELOC_IA64_PCREL64LSB
3633 BFD_RELOC_IA64_LTOFF_FPTR22
3635 BFD_RELOC_IA64_LTOFF_FPTR64I
3637 BFD_RELOC_IA64_LTOFF_FPTR32MSB
3639 BFD_RELOC_IA64_LTOFF_FPTR32LSB
3641 BFD_RELOC_IA64_LTOFF_FPTR64MSB
3643 BFD_RELOC_IA64_LTOFF_FPTR64LSB
3645 BFD_RELOC_IA64_SEGREL32MSB
3647 BFD_RELOC_IA64_SEGREL32LSB
3649 BFD_RELOC_IA64_SEGREL64MSB
3651 BFD_RELOC_IA64_SEGREL64LSB
3653 BFD_RELOC_IA64_SECREL32MSB
3655 BFD_RELOC_IA64_SECREL32LSB
3657 BFD_RELOC_IA64_SECREL64MSB
3659 BFD_RELOC_IA64_SECREL64LSB
3661 BFD_RELOC_IA64_REL32MSB
3663 BFD_RELOC_IA64_REL32LSB
3665 BFD_RELOC_IA64_REL64MSB
3667 BFD_RELOC_IA64_REL64LSB
3669 BFD_RELOC_IA64_LTV32MSB
3671 BFD_RELOC_IA64_LTV32LSB
3673 BFD_RELOC_IA64_LTV64MSB
3675 BFD_RELOC_IA64_LTV64LSB
3677 BFD_RELOC_IA64_IPLTMSB
3679 BFD_RELOC_IA64_IPLTLSB
3683 BFD_RELOC_IA64_LTOFF22X
3685 BFD_RELOC_IA64_LDXMOV
3687 BFD_RELOC_IA64_TPREL14
3689 BFD_RELOC_IA64_TPREL22
3691 BFD_RELOC_IA64_TPREL64I
3693 BFD_RELOC_IA64_TPREL64MSB
3695 BFD_RELOC_IA64_TPREL64LSB
3697 BFD_RELOC_IA64_LTOFF_TPREL22
3699 BFD_RELOC_IA64_DTPMOD64MSB
3701 BFD_RELOC_IA64_DTPMOD64LSB
3703 BFD_RELOC_IA64_LTOFF_DTPMOD22
3705 BFD_RELOC_IA64_DTPREL14
3707 BFD_RELOC_IA64_DTPREL22
3709 BFD_RELOC_IA64_DTPREL64I
3711 BFD_RELOC_IA64_DTPREL32MSB
3713 BFD_RELOC_IA64_DTPREL32LSB
3715 BFD_RELOC_IA64_DTPREL64MSB
3717 BFD_RELOC_IA64_DTPREL64LSB
3719 BFD_RELOC_IA64_LTOFF_DTPREL22
3721 Intel IA64 Relocations.
3724 BFD_RELOC_M68HC11_HI8
3726 Motorola 68HC11 reloc.
3727 This is the 8 bit high part of an absolute address.
3729 BFD_RELOC_M68HC11_LO8
3731 Motorola 68HC11 reloc.
3732 This is the 8 bit low part of an absolute address.
3734 BFD_RELOC_M68HC11_3B
3736 Motorola 68HC11 reloc.
3737 This is the 3 bit of a value.
3739 BFD_RELOC_M68HC11_RL_JUMP
3741 Motorola 68HC11 reloc.
3742 This reloc marks the beginning of a jump/call instruction.
3743 It is used for linker relaxation to correctly identify beginning
3744 of instruction and change some branches to use PC-relative
3747 BFD_RELOC_M68HC11_RL_GROUP
3749 Motorola 68HC11 reloc.
3750 This reloc marks a group of several instructions that gcc generates
3751 and for which the linker relaxation pass can modify and/or remove
3754 BFD_RELOC_M68HC11_LO16
3756 Motorola 68HC11 reloc.
3757 This is the 16-bit lower part of an address. It is used for 'call'
3758 instruction to specify the symbol address without any special
3759 transformation (due to memory bank window).
3761 BFD_RELOC_M68HC11_PAGE
3763 Motorola 68HC11 reloc.
3764 This is a 8-bit reloc that specifies the page number of an address.
3765 It is used by 'call' instruction to specify the page number of
3768 BFD_RELOC_M68HC11_24
3770 Motorola 68HC11 reloc.
3771 This is a 24-bit reloc that represents the address with a 16-bit
3772 value and a 8-bit page number. The symbol address is transformed
3773 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
3775 BFD_RELOC_M68HC12_5B
3777 Motorola 68HC12 reloc.
3778 This is the 5 bits of a value.
3783 BFD_RELOC_16C_NUM08_C
3787 BFD_RELOC_16C_NUM16_C
3791 BFD_RELOC_16C_NUM32_C
3793 BFD_RELOC_16C_DISP04
3795 BFD_RELOC_16C_DISP04_C
3797 BFD_RELOC_16C_DISP08
3799 BFD_RELOC_16C_DISP08_C
3801 BFD_RELOC_16C_DISP16
3803 BFD_RELOC_16C_DISP16_C
3805 BFD_RELOC_16C_DISP24
3807 BFD_RELOC_16C_DISP24_C
3809 BFD_RELOC_16C_DISP24a
3811 BFD_RELOC_16C_DISP24a_C
3815 BFD_RELOC_16C_REG04_C
3817 BFD_RELOC_16C_REG04a
3819 BFD_RELOC_16C_REG04a_C
3823 BFD_RELOC_16C_REG14_C
3827 BFD_RELOC_16C_REG16_C
3831 BFD_RELOC_16C_REG20_C
3835 BFD_RELOC_16C_ABS20_C
3839 BFD_RELOC_16C_ABS24_C
3843 BFD_RELOC_16C_IMM04_C
3847 BFD_RELOC_16C_IMM16_C
3851 BFD_RELOC_16C_IMM20_C
3855 BFD_RELOC_16C_IMM24_C
3859 BFD_RELOC_16C_IMM32_C
3861 NS CR16C Relocations.
3864 BFD_RELOC_CRIS_BDISP8
3866 BFD_RELOC_CRIS_UNSIGNED_5
3868 BFD_RELOC_CRIS_SIGNED_6
3870 BFD_RELOC_CRIS_UNSIGNED_6
3872 BFD_RELOC_CRIS_UNSIGNED_4
3874 These relocs are only used within the CRIS assembler. They are not
3875 (at present) written to any object files.
3879 BFD_RELOC_CRIS_GLOB_DAT
3881 BFD_RELOC_CRIS_JUMP_SLOT
3883 BFD_RELOC_CRIS_RELATIVE
3885 Relocs used in ELF shared libraries for CRIS.
3887 BFD_RELOC_CRIS_32_GOT
3889 32-bit offset to symbol-entry within GOT.
3891 BFD_RELOC_CRIS_16_GOT
3893 16-bit offset to symbol-entry within GOT.
3895 BFD_RELOC_CRIS_32_GOTPLT
3897 32-bit offset to symbol-entry within GOT, with PLT handling.
3899 BFD_RELOC_CRIS_16_GOTPLT
3901 16-bit offset to symbol-entry within GOT, with PLT handling.
3903 BFD_RELOC_CRIS_32_GOTREL
3905 32-bit offset to symbol, relative to GOT.
3907 BFD_RELOC_CRIS_32_PLT_GOTREL
3909 32-bit offset to symbol with PLT entry, relative to GOT.
3911 BFD_RELOC_CRIS_32_PLT_PCREL
3913 32-bit offset to symbol with PLT entry, relative to this relocation.
3918 BFD_RELOC_860_GLOB_DAT
3920 BFD_RELOC_860_JUMP_SLOT
3922 BFD_RELOC_860_RELATIVE
3932 BFD_RELOC_860_SPLIT0
3936 BFD_RELOC_860_SPLIT1
3940 BFD_RELOC_860_SPLIT2
3944 BFD_RELOC_860_LOGOT0
3946 BFD_RELOC_860_SPGOT0
3948 BFD_RELOC_860_LOGOT1
3950 BFD_RELOC_860_SPGOT1
3952 BFD_RELOC_860_LOGOTOFF0
3954 BFD_RELOC_860_SPGOTOFF0
3956 BFD_RELOC_860_LOGOTOFF1
3958 BFD_RELOC_860_SPGOTOFF1
3960 BFD_RELOC_860_LOGOTOFF2
3962 BFD_RELOC_860_LOGOTOFF3
3966 BFD_RELOC_860_HIGHADJ
3970 BFD_RELOC_860_HAGOTOFF
3978 BFD_RELOC_860_HIGOTOFF
3980 Intel i860 Relocations.
3983 BFD_RELOC_OPENRISC_ABS_26
3985 BFD_RELOC_OPENRISC_REL_26
3987 OpenRISC Relocations.
3990 BFD_RELOC_H8_DIR16A8
3992 BFD_RELOC_H8_DIR16R8
3994 BFD_RELOC_H8_DIR24A8
3996 BFD_RELOC_H8_DIR24R8
3998 BFD_RELOC_H8_DIR32A16
4003 BFD_RELOC_XSTORMY16_REL_12
4005 BFD_RELOC_XSTORMY16_12
4007 BFD_RELOC_XSTORMY16_24
4009 BFD_RELOC_XSTORMY16_FPTR16
4011 Sony Xstormy16 Relocations.
4014 BFD_RELOC_VAX_GLOB_DAT
4016 BFD_RELOC_VAX_JMP_SLOT
4018 BFD_RELOC_VAX_RELATIVE
4020 Relocations used by VAX ELF.
4023 BFD_RELOC_MSP430_10_PCREL
4025 BFD_RELOC_MSP430_16_PCREL
4029 BFD_RELOC_MSP430_16_PCREL_BYTE
4031 BFD_RELOC_MSP430_16_BYTE
4033 msp430 specific relocation codes
4036 BFD_RELOC_IQ2000_OFFSET_16
4038 BFD_RELOC_IQ2000_OFFSET_21
4040 BFD_RELOC_IQ2000_UHI16
4045 BFD_RELOC_XTENSA_RTLD
4047 Special Xtensa relocation used only by PLT entries in ELF shared
4048 objects to indicate that the runtime linker should set the value
4049 to one of its own internal functions or data structures.
4051 BFD_RELOC_XTENSA_GLOB_DAT
4053 BFD_RELOC_XTENSA_JMP_SLOT
4055 BFD_RELOC_XTENSA_RELATIVE
4057 Xtensa relocations for ELF shared objects.
4059 BFD_RELOC_XTENSA_PLT
4061 Xtensa relocation used in ELF object files for symbols that may require
4062 PLT entries. Otherwise, this is just a generic 32-bit relocation.
4064 BFD_RELOC_XTENSA_OP0
4066 BFD_RELOC_XTENSA_OP1
4068 BFD_RELOC_XTENSA_OP2
4070 Generic Xtensa relocations. Only the operand number is encoded
4071 in the relocation. The details are determined by extracting the
4074 BFD_RELOC_XTENSA_ASM_EXPAND
4076 Xtensa relocation to mark that the assembler expanded the
4077 instructions from an original target. The expansion size is
4078 encoded in the reloc size.
4080 BFD_RELOC_XTENSA_ASM_SIMPLIFY
4082 Xtensa relocation to mark that the linker should simplify
4083 assembler-expanded instructions. This is commonly used
4084 internally by the linker after analysis of a
4085 BFD_RELOC_XTENSA_ASM_EXPAND.
4091 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
4096 bfd_reloc_type_lookup
4099 reloc_howto_type *bfd_reloc_type_lookup
4100 (bfd *abfd, bfd_reloc_code_real_type code);
4103 Return a pointer to a howto structure which, when
4104 invoked, will perform the relocation @var{code} on data from the
4110 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
4112 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
4115 static reloc_howto_type bfd_howto_32
=
4116 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_bitfield
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
4120 bfd_default_reloc_type_lookup
4123 reloc_howto_type *bfd_default_reloc_type_lookup
4124 (bfd *abfd, bfd_reloc_code_real_type code);
4127 Provides a default relocation lookup routine for any architecture.
4132 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
4136 case BFD_RELOC_CTOR
:
4137 /* The type of reloc used in a ctor, which will be as wide as the
4138 address - so either a 64, 32, or 16 bitter. */
4139 switch (bfd_get_arch_info (abfd
)->bits_per_address
)
4144 return &bfd_howto_32
;
4158 bfd_get_reloc_code_name
4161 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
4164 Provides a printable name for the supplied relocation code.
4165 Useful mainly for printing error messages.
4169 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
4171 if (code
> BFD_RELOC_UNUSED
)
4173 return bfd_reloc_code_real_names
[code
];
4178 bfd_generic_relax_section
4181 bfd_boolean bfd_generic_relax_section
4184 struct bfd_link_info *,
4188 Provides default handling for relaxing for back ends which
4193 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
4194 asection
*section ATTRIBUTE_UNUSED
,
4195 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
4204 bfd_generic_gc_sections
4207 bfd_boolean bfd_generic_gc_sections
4208 (bfd *, struct bfd_link_info *);
4211 Provides default handling for relaxing for back ends which
4212 don't do section gc -- i.e., does nothing.
4216 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
4217 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
4224 bfd_generic_merge_sections
4227 bfd_boolean bfd_generic_merge_sections
4228 (bfd *, struct bfd_link_info *);
4231 Provides default handling for SEC_MERGE section merging for back ends
4232 which don't have SEC_MERGE support -- i.e., does nothing.
4236 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
4237 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
4244 bfd_generic_get_relocated_section_contents
4247 bfd_byte *bfd_generic_get_relocated_section_contents
4249 struct bfd_link_info *link_info,
4250 struct bfd_link_order *link_order,
4252 bfd_boolean relocatable,
4256 Provides default handling of relocation effort for back ends
4257 which can't be bothered to do it efficiently.
4262 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
4263 struct bfd_link_info
*link_info
,
4264 struct bfd_link_order
*link_order
,
4266 bfd_boolean relocatable
,
4269 /* Get enough memory to hold the stuff. */
4270 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
4271 asection
*input_section
= link_order
->u
.indirect
.section
;
4273 long reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
4274 arelent
**reloc_vector
= NULL
;
4281 reloc_vector
= bfd_malloc (reloc_size
);
4282 if (reloc_vector
== NULL
&& reloc_size
!= 0)
4285 /* Read in the section. */
4286 sz
= input_section
->rawsize
? input_section
->rawsize
: input_section
->size
;
4287 if (!bfd_get_section_contents (input_bfd
, input_section
, data
, 0, sz
))
4290 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
4294 if (reloc_count
< 0)
4297 if (reloc_count
> 0)
4300 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
4302 char *error_message
= NULL
;
4303 bfd_reloc_status_type r
=
4304 bfd_perform_relocation (input_bfd
,
4308 relocatable
? abfd
: NULL
,
4313 asection
*os
= input_section
->output_section
;
4315 /* A partial link, so keep the relocs. */
4316 os
->orelocation
[os
->reloc_count
] = *parent
;
4320 if (r
!= bfd_reloc_ok
)
4324 case bfd_reloc_undefined
:
4325 if (!((*link_info
->callbacks
->undefined_symbol
)
4326 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
4327 input_bfd
, input_section
, (*parent
)->address
,
4331 case bfd_reloc_dangerous
:
4332 BFD_ASSERT (error_message
!= NULL
);
4333 if (!((*link_info
->callbacks
->reloc_dangerous
)
4334 (link_info
, error_message
, input_bfd
, input_section
,
4335 (*parent
)->address
)))
4338 case bfd_reloc_overflow
:
4339 if (!((*link_info
->callbacks
->reloc_overflow
)
4340 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
4341 (*parent
)->howto
->name
, (*parent
)->addend
,
4342 input_bfd
, input_section
, (*parent
)->address
)))
4345 case bfd_reloc_outofrange
:
4354 if (reloc_vector
!= NULL
)
4355 free (reloc_vector
);
4359 if (reloc_vector
!= NULL
)
4360 free (reloc_vector
);