1 /* Print m68k instructions for objdump
2 Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
5 This file is part of the binutils.
7 The binutils are free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 The binutils are distributed in the hope that they will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with the binutils; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 Revision 1.6 1991/12/01 02:58:34 sac
24 Updated to point to where the header files are now
26 * Revision 1.5 1991/11/03 22:58:44 bothner
27 * * Makefile.in ($(DIST_NAME).tar.Z), TODO: Various fixes.
28 * * ar.c (get_pos_bfd): Fix to handling of before/after
29 * positioning options.
30 * * bucomm.c (fatal): MISSING_VFPRINTF is no longer an issue,
31 * since libiberty contains vfprintf etc if otherwise missing.
32 * * m68k-pinsn.c (print_insn_arg): Support BB/BW/BL
33 * type operands, as used by branch instructions.
34 * * nm.c: Delegate printing of symbols to BFD,
35 * by using bfd_print_symbol to do the formatting.
37 * Revision 1.4 1991/10/16 18:56:56 bothner
38 * * Makefile.in, ar.c, bucomm.c, copy.c, cplus-dem.c, filemode.c,
39 * i960-pinsn.c, m68k-pinsn.c, nm.c, objdump.c, size.c, sparc-pinsn.c,
40 * * strip.c: Add or update Copyright notice.
41 * * TODO: Add note on 'nm -a'.
42 * * version.c: Update version number to 1.90.
43 * * Makefile.in: Fix making of documentation for dist.
45 * Revision 1.3 1991/10/11 11:22:00 gnu
46 * Include bfd.h before sysdep.h, so ansidecl and PROTO() get defined first.
48 * Revision 1.2 1991/06/14 22:54:44 steve
49 * *** empty log message ***
51 * Revision 1.1.1.1 1991/03/21 21:26:46 gumby
52 * Back from Intel with Steve
54 * Revision 1.1 1991/03/21 21:26:45 gumby
57 * Revision 1.1 1991/03/13 00:34:06 chrisb
60 * Revision 1.4 1991/03/09 04:36:34 rich
62 * sparc-pinsn.c ostrip.c objdump.c m68k-pinsn.c i960-pinsn.c
65 * Pulled sysdep.h out of bfd.h.
67 * Revision 1.3 1991/03/08 21:54:45 rich
69 * Makefile ar.c binutils.h bucomm.c copy.c cplus-dem.c getopt.c
70 * i960-pinsn.c m68k-pinsn.c nm.c objdump.c sparc-opcode.h
71 * sparc-pinsn.c strip.c
73 * Verifying Portland tree with steve's last changes. Also, some partial
76 * Revision 1.2 1991/03/08 07:46:24 sac
77 * Added -l option to disassembly - prints line numbers too.
79 * Revision 1.1 1991/02/22 16:48:02 sac
86 #include "opcode/m68k.h"
89 extern void print_address();
91 /* 68k instructions are never longer than this many bytes. */
94 /* Number of elements in the opcode table. */
95 #define NOPCODES (sizeof m68k_opcodes / sizeof m68k_opcodes[0])
97 extern char *reg_names
[];
98 char *fpcr_names
[] = { "", "fpiar", "fpsr", "fpiar/fpsr", "fpcr",
99 "fpiar/fpcr", "fpsr/fpcr", "fpiar-fpcr"};
101 char *reg_names
[] = {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp", "ps", "pc"};
102 static unsigned char *print_insn_arg ();
103 static unsigned char *print_indexed ();
104 static void print_base ();
105 static int fetch_arg ();
107 #define NEXTBYTE(p) (p += 2, ((char *)p)[-1])
109 #define NEXTWORD(p) \
110 (p += 2, ((((char *)p)[-2]) << 8) + p[-1])
112 #define NEXTLONG(p) \
113 (p += 4, (((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])
115 #define NEXTSINGLE(p) \
116 (p += 4, *((float *)(p - 4)))
118 #define NEXTDOUBLE(p) \
119 (p += 8, *((double *)(p - 8)))
121 #define NEXTEXTEND(p) \
122 (p += 12, 0.0) /* Need a function to convert from extended to double
125 #define NEXTPACKED(p) \
126 (p += 12, 0.0) /* Need a function to convert from packed to double
127 precision. Actually, it's easier to print a
128 packed number than a double anyway, so maybe
129 there should be a special case to handle this... */
131 /* Print the m68k instruction at address MEMADDR in debugged memory,
132 on STREAM. Returns length of the instruction, in bytes. */
135 print_insn_m68k(addr
, buffer
, stream
)
137 unsigned char *buffer
;
140 register unsigned int i
;
141 register unsigned char *p
;
143 register unsigned int bestmask
;
150 for (i
= 0; i
< NOPCODES
; i
++)
152 register unsigned int opcode
= m68k_opcodes
[i
].opcode
;
153 register unsigned int match
= m68k_opcodes
[i
].match
;
154 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
155 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
156 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
157 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
159 /* Don't use for printout the variants of divul and divsl
160 that have the same register number in two places.
161 The more general variants will match instead. */
162 for (d
= m68k_opcodes
[i
].args
; *d
; d
+= 2)
166 /* Don't use for printout the variants of most floating
167 point coprocessor instructions which use the same
168 register number in two places, as above. */
170 for (d
= m68k_opcodes
[i
].args
; *d
; d
+= 2)
174 if (*d
== 0 && match
> bestmask
)
182 /* Handle undefined instructions. */
185 fprintf (stream
, "0%o", (unsigned) (buffer
[0] << 8) + buffer
[1]);
189 fprintf (stream
, "%s", m68k_opcodes
[best
].name
);
191 /* Point at first word of argument data,
192 and at descriptor for first argument. */
195 /* Why do this this way? -MelloN */
196 for (d
= m68k_opcodes
[best
].args
; *d
; d
+= 2)
200 if (d
[1] == 'l' && p
- buffer
< 6)
202 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8' )
205 if (d
[1] >= '1' && d
[1] <= '3' && p
- buffer
< 4)
207 if (d
[1] >= '4' && d
[1] <= '6' && p
- buffer
< 6)
209 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
213 d
= m68k_opcodes
[best
].args
;
220 p
= print_insn_arg (d
, buffer
, p
, addr
+ p
- buffer
, stream
);
222 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
228 static unsigned char *
229 print_insn_arg (d
, buffer
, p
, addr
, stream
)
231 unsigned char *buffer
;
232 register unsigned char *p
;
233 bfd_vma addr
; /* PC for this arg to be relative to */
237 register int place
= d
[1];
239 register char *regname
;
240 register unsigned char *p1
;
241 register double flval
;
247 fprintf (stream
, "ccr");
251 fprintf (stream
, "sr");
255 fprintf (stream
, "usp");
260 static struct { char *name
; int value
; } names
[]
261 = {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
262 {"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
263 {"msp", 0x803}, {"isp", 0x804}};
265 val
= fetch_arg (buffer
, place
, 12);
266 for (regno
= sizeof names
/ sizeof names
[0] - 1; regno
>= 0; regno
--)
267 if (names
[regno
].value
== val
)
269 fprintf (stream
, names
[regno
].name
);
273 fprintf (stream
, "%d", val
);
278 val
= fetch_arg (buffer
, place
, 3);
279 if (val
== 0) val
= 8;
280 fprintf (stream
, "#%d", val
);
284 val
= fetch_arg (buffer
, place
, 8);
287 fprintf (stream
, "#%d", val
);
291 val
= fetch_arg (buffer
, place
, 4);
292 fprintf (stream
, "#%d", val
);
296 fprintf (stream
, "%s", reg_names
[fetch_arg (buffer
, place
, 3)]);
300 fprintf (stream
, "%s",
301 reg_names
[fetch_arg (buffer
, place
, 3) + 010]);
305 fprintf (stream
, "%s", reg_names
[fetch_arg (buffer
, place
, 4)]);
309 fprintf (stream
, "fp%d", fetch_arg (buffer
, place
, 3));
313 val
= fetch_arg (buffer
, place
, 6);
315 fprintf (stream
, "%s", reg_names
[val
& 7]);
317 fprintf (stream
, "%d", val
);
321 fprintf (stream
, "%s@+",
322 reg_names
[fetch_arg (buffer
, place
, 3) + 8]);
326 fprintf (stream
, "%s@-",
327 reg_names
[fetch_arg (buffer
, place
, 3) + 8]);
332 fprintf (stream
, "{%s}", reg_names
[fetch_arg (buffer
, place
, 3)]);
333 else if (place
== 'C')
335 val
= fetch_arg (buffer
, place
, 7);
336 if ( val
> 63 ) /* This is a signed constant. */
338 fprintf (stream
, "{#%d}", val
);
341 fprintf(stderr
, "Invalid arg format in opcode table: \"%c%c\".",
347 p1
= buffer
+ (*d
== '#' ? 2 : 4);
349 val
= fetch_arg (buffer
, place
, 4);
350 else if (place
== 'C')
351 val
= fetch_arg (buffer
, place
, 7);
352 else if (place
== '8')
353 val
= fetch_arg (buffer
, place
, 3);
354 else if (place
== '3')
355 val
= fetch_arg (buffer
, place
, 8);
356 else if (place
== 'b')
358 else if (place
== 'w')
360 else if (place
== 'l')
363 fprintf(stderr
, "Invalid arg format in opcode table: \"%c%c\".",
365 fprintf (stream
, "#%d", val
);
371 else if (place
== 'B')
373 else if (place
== 'w' || place
== 'W')
375 else if (place
== 'l' || place
== 'L')
377 else if (place
== 'g')
379 val
= ((char *)buffer
)[1];
385 else if (place
== 'c')
387 if (buffer
[1] & 0x40) /* If bit six is one, long offset */
393 fprintf(stderr
, "Invalid arg format in opcode table: \"%c%c\".",
395 print_address (addr
+ val
, stream
);
400 fprintf (stream
, "%s@(%d)",
401 reg_names
[fetch_arg (buffer
, place
, 3)], val
);
405 fprintf (stream
, "%s",
406 fpcr_names
[fetch_arg (buffer
, place
, 3)]);
410 val
= fetch_arg (buffer
, 'd', 3); /* Get coprocessor ID... */
411 if (val
!= 1) /* Unusual coprocessor ID? */
412 fprintf (stream
, "(cpid=%d) ", val
);
414 p
+= 2; /* Skip coprocessor extended operands */
430 val
= fetch_arg (buffer
, 'x', 6);
431 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
434 val
= fetch_arg (buffer
, 's', 6);
436 /* Get register number assuming address register. */
437 regno
= (val
& 7) + 8;
438 regname
= reg_names
[regno
];
442 fprintf (stream
, "%s", reg_names
[val
]);
446 fprintf (stream
, "%s", regname
);
450 fprintf (stream
, "%s@", regname
);
454 fprintf (stream
, "%s@+", regname
);
458 fprintf (stream
, "%s@-", regname
);
463 fprintf (stream
, "%s@(%d)", regname
, val
);
467 p
= print_indexed (regno
, p
, addr
, stream
);
475 fprintf (stream
, "@#");
476 print_address (val
, stream
);
481 fprintf (stream
, "@#");
482 print_address (val
, stream
);
487 print_address (addr
+ val
, stream
);
491 p
= print_indexed (-1, p
, addr
, stream
);
495 flt_p
= 1; /* Assume it's a float... */
514 flval
= NEXTSINGLE(p
);
518 flval
= NEXTDOUBLE(p
);
522 flval
= NEXTEXTEND(p
);
526 flval
= NEXTPACKED(p
);
530 fprintf(stderr
, "Invalid arg format in opcode table: \"%c%c\".",
533 if ( flt_p
) /* Print a float? */
534 fprintf (stream
, "#%g", flval
);
536 fprintf (stream
, "#%d", val
);
540 fprintf (stream
, "<invalid address mode 0%o>", (unsigned) val
);
552 /* Move the pointer ahead if this point is farther ahead
557 fputs ("#0", stream
);
562 register int newval
= 0;
563 for (regno
= 0; regno
< 16; ++regno
)
564 if (val
& (0x8000 >> regno
))
565 newval
|= 1 << regno
;
570 for (regno
= 0; regno
< 16; ++regno
)
571 if (val
& (1 << regno
))
577 fprintf (stream
, "%s", reg_names
[regno
]);
579 while (val
& (1 << (regno
+ 1)))
581 if (regno
> first_regno
)
582 fprintf (stream
, "-%s", reg_names
[regno
]);
585 else if (place
== '3')
589 val
= fetch_arg (buffer
, place
, 8);
592 fputs ("#0", stream
);
597 register int newval
= 0;
598 for (regno
= 0; regno
< 8; ++regno
)
599 if (val
& (0x80 >> regno
))
600 newval
|= 1 << regno
;
605 for (regno
= 0; regno
< 8; ++regno
)
606 if (val
& (1 << regno
))
612 fprintf (stream
, "fp%d", regno
);
614 while (val
& (1 << (regno
+ 1)))
616 if (regno
> first_regno
)
617 fprintf (stream
, "-fp%d", regno
);
625 fprintf(stderr
, "Invalid arg format in opcode table: \"%c\".", *d
);
628 return (unsigned char *) p
;
631 /* Fetch BITS bits from a position in the instruction specified by CODE.
632 CODE is a "place to put an argument", or 'x' for a destination
633 that is a general address (mode and register).
634 BUFFER contains the instruction. */
637 fetch_arg (buffer
, code
, bits
)
638 unsigned char *buffer
;
649 case 'd': /* Destination, for register or quick. */
650 val
= (buffer
[0] << 8) + buffer
[1];
654 case 'x': /* Destination, for general arg */
655 val
= (buffer
[0] << 8) + buffer
[1];
660 val
= (buffer
[3] >> 4);
668 val
= (buffer
[2] << 8) + buffer
[3];
673 val
= (buffer
[2] << 8) + buffer
[3];
679 val
= (buffer
[2] << 8) + buffer
[3];
683 val
= (buffer
[4] << 8) + buffer
[5];
688 val
= (buffer
[4] << 8) + buffer
[5];
693 val
= (buffer
[4] << 8) + buffer
[5];
697 val
= (buffer
[2] << 8) + buffer
[3];
702 val
= (buffer
[2] << 8) + buffer
[3];
732 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
733 P points to extension word, in buffer.
734 ADDR is the nominal core address of that extension word. */
736 static unsigned char *
737 print_indexed (basereg
, p
, addr
, stream
)
744 static char *scales
[] = {"", "*2", "*4", "*8"};
745 register int base_disp
;
746 register int outer_disp
;
751 /* Generate the text for the index register.
752 Where this will be output is not yet determined. */
753 sprintf (buf
, "[%s.%c%s]",
754 reg_names
[(word
>> 12) & 0xf],
755 (word
& 0x800) ? 'l' : 'w',
756 scales
[(word
>> 9) & 3]);
758 /* Handle the 68000 style of indexing. */
760 if ((word
& 0x100) == 0)
763 ((word
& 0x80) ? word
| 0xff00 : word
& 0xff)
764 + ((basereg
== -1) ? addr
: 0),
770 /* Handle the generalized kind. */
771 /* First, compute the displacement to add to the base register. */
778 switch ((word
>> 4) & 3)
781 base_disp
= NEXTWORD (p
);
784 base_disp
= NEXTLONG (p
);
789 /* Handle single-level case (not indirect) */
793 print_base (basereg
, base_disp
, stream
);
798 /* Two level. Compute displacement to add after indirection. */
804 outer_disp
= NEXTWORD (p
);
807 outer_disp
= NEXTLONG (p
);
810 fprintf (stream
, "%d(", outer_disp
);
811 print_base (basereg
, base_disp
, stream
);
813 /* If postindexed, print the closeparen before the index. */
815 fprintf (stream
, ")%s", buf
);
816 /* If preindexed, print the closeparen after the index. */
818 fprintf (stream
, "%s)", buf
);
823 /* Print a base register REGNO and displacement DISP, on STREAM.
824 REGNO = -1 for pc, -2 for none (suppressed). */
827 print_base (regno
, disp
, stream
)
833 fprintf (stream
, "%d", disp
);
834 else if (regno
== -1)
835 fprintf (stream
, "0x%x", (unsigned) disp
);
837 fprintf (stream
, "%d(%s)", disp
, reg_names
[regno
]);
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