cpu/ChangeLog

   1 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
   2
   3         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
   4         explicit 'dst' argument.
   5
   6 2019-06-13  Stafford Horne  <shorne@gmail.com>
   7
   8         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
   9
  10 2019-06-13  Stafford Horne  <shorne@gmail.com>
  11
  12         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
  13         (l-adrp): Improve comment.
  14
  15 2019-06-13  Stafford Horne  <shorne@gmail.com>
  16
  17         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
  18         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
  19         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
  20         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
  21         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
  22         float-setflag-unordered-symantics): New pmacro for instruction
  23         symantics.
  24         (float-setflag-insn): Update to use float-setflag-insn-base.
  25         (float-setflag-unordered-insn): New pmacro for generating instructions.
  26
  27 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
  28             Stafford Horne  <shorne@gmail.com>
  29
  30         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
  31         (ORFPX-MACHS): Removed pmacro.
  32         * or1k.opc (or1k_cgen_insn_supported): New function.
  33         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
  34         (parse_regpair, print_regpair): New functions.
  35         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
  36         and add comments.
  37         (h-fdr): Update comment to indicate or64.
  38         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
  39         (h-fd32r): New hardware for 64-bit fpu registers.
  40         (h-i64r): New hardware for 64-bit int registers.
  41         * or1korbis.cpu (f-resv-8-1): New field.
  42         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
  43         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
  44         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
  45         (h-roff1): New hardware.
  46         (double-field-and-ops mnemonic): New pmacro to generate operations
  47         rDD32F, rAD32F, rBD32F, rDDI and rADI.
  48         (float-regreg-insn): Update single precision generator to MACH
  49         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  50         (float-setflag-insn): Update single precision generator to MACH
  51         ORFPX32-MACHS.  Fix double instructions from single to double
  52         precision.  Add generator for or32 64-bit instructions.
  53         (float-cust-insn cust-num): Update single precision generator to MACH
  54         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  55         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
  56         ORFPX32-MACHS.
  57         (lf-rem-d): Fix operation from mod to rem.
  58         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
  59         (lf-itof-d): Fix operands from single to double.
  60         (lf-ftoi-d): Update operand mode from DI to WI.
  61
  62 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
  63
  64         * bpf.cpu: New file.
  65         * bpf.opc: Likewise.
  66
  67 2018-06-24  Nick Clifton  <nickc@redhat.com>
  68
  69         2.32 branch created.
  70
  71 2018-10-05  Richard Henderson  <rth@twiddle.net>
  72             Stafford Horne  <shorne@gmail.com>
  73
  74         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
  75         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
  76         (l-mul): Fix overflow support and indentation.
  77         (l-mulu): Fix overflow support and indentation.
  78         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
  79         (l-div); Remove incorrect carry behavior.
  80         (l-divu): Fix carry and overflow behavior.
  81         (l-mac): Add overflow support.
  82         (l-msb, l-msbu): Add carry and overflow support.
  83
  84 2018-10-05  Richard Henderson  <rth@twiddle.net>
  85
  86         * or1k.opc (parse_disp26): Add support for plta() relocations.
  87         (parse_disp21): New function.
  88         (or1k_rclass): New enum.
  89         (or1k_rtype): New enum.
  90         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
  91         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
  92         (parse_imm16): Add support for the new 21bit and 13bit relocations.
  93         * or1korbis.cpu (f-disp26): Don't assume SI.
  94         (f-disp21): New pc-relative 21-bit 13 shifted to right.
  95         (insn-opcode): Add ADRP.
  96         (l-adrp): New instruction.
  97
  98 2018-10-05  Richard Henderson  <rth@twiddle.net>
  99
 100         * or1k.opc: Add RTYPE_ enum.
 101         (INVALID_STORE_RELOC): New string.
 102         (or1k_imm16_relocs): New array array.
 103         (parse_reloc): New static function that just does the parsing.
 104         (parse_imm16): New static function for generic parsing.
 105         (parse_simm16): Change to just call parse_imm16.
 106         (parse_simm16_split): New function.
 107         (parse_uimm16): Change to call parse_imm16.
 108         (parse_uimm16_split): New function.
 109         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 110         (uimm16-split): Change to use new uimm16_split.
 111
 112 2018-07-24  Alan Modra  <amodra@gmail.com>
 113
 114         PR 23430
 115         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 116
 117 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 118
 119         * or1kcommon.cpu (spr-reg-info): Typo fix.
 120
 121 2018-03-03  Alan Modra  <amodra@gmail.com>
 122
 123         * frv.opc: Include opintl.h.
 124         (add_next_to_vliw): Use opcodes_error_handler to print error.
 125         Standardize error message.
 126         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 127
 128 2018-01-13  Nick Clifton  <nickc@redhat.com>
 129
 130         2.30 branch created.
 131
 132 2017-03-15  Stafford Horne  <shorne@gmail.com>
 133
 134         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 135
 136 2016-10-06  Alan Modra  <amodra@gmail.com>
 137
 138         * mep.opc (expand_string): Add fall through comment.
 139
 140 2016-03-03  Alan Modra  <amodra@gmail.com>
 141
 142         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 143         at what is really going on.
 144
 145 2016-03-02  Alan Modra  <amodra@gmail.com>
 146
 147         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 148
 149 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 150
 151         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 152         a constant to better align disassembler output.
 153
 154 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 155
 156         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 157
 158 2014-06-12  Alan Modra  <amodra@gmail.com>
 159
 160         * or1k.opc: Whitespace fixes.
 161
 162 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 163
 164         * or1korbis.cpu (h-atomic-reserve): New hardware.
 165         (h-atomic-address): Likewise.
 166         (insn-opcode): Add opcodes for LWA and SWA.
 167         (atomic-reserve): New operand.
 168         (atomic-address): Likewise.
 169         (l-lwa, l-swa): New instructions.
 170         (l-lbs): Fix typo in comment.
 171         (store-insn): Clear atomic reserve on store to atomic-address.
 172         Fix register names in fmt field.
 173
 174 2014-04-22  Christian Svensson  <blue@cmd.nu>
 175
 176         * openrisc.cpu: Delete.
 177         * openrisc.opc: Delete.
 178         * or1k.cpu: New file.
 179         * or1k.opc: New file.
 180         * or1kcommon.cpu: New file.
 181         * or1korbis.cpu: New file.
 182         * or1korfpx.cpu: New file.
 183
 184 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 185
 186         * epiphany.opc: Remove +x file mode.
 187
 188 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 189
 190         PR binutils/15241
 191         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 192         TLBVADDR, TLBPADDR and TLBBADVADDR.
 193
 194 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 195             Joern Rennecke  <joern.rennecke@embecosm.com>
 196
 197         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 198         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 199         (testset-insn): Add NO_DIS attribute to t.l.
 200         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 201         (move-insns): Add NO-DIS attribute to cmov.l.
 202         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 203         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 204         (op-rrr): Add NO-DIS attribute to .l.
 205         (shift-rrr): Add NO-DIS attribute to .l.
 206         (op-shift-rri): Add NO-DIS attribute to i32.l.
 207         (bitrl, movtl): Add NO-DIS attribute.
 208         (op-iextrrr): Add NO-DIS attribute to .l
 209         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 210         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 211
 212 2012-02-27  Alan Modra  <amodra@gmail.com>
 213
 214         * mt.opc (print_dollarhex): Trim values to 32 bits.
 215
 216 2011-12-15  Nick Clifton  <nickc@redhat.com>
 217
 218         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 219         hosts.
 220
 221 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 222
 223         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 224         Cast value before printing it as a long.
 225         (parse_postindex): Fix type of valuep.
 226
 227 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 228
 229         * cpu/epiphany.cpu: New file.
 230         * cpu/epiphany.opc: New file.
 231
 232 2011-08-22  Nick Clifton  <nickc@redhat.com>
 233
 234         * fr30.cpu: Newly contributed file.
 235         * fr30.opc: Likewise.
 236         * ip2k.cpu: Likewise.
 237         * ip2k.opc: Likewise.
 238         * mep-avc.cpu: Likewise.
 239         * mep-avc2.cpu: Likewise.
 240         * mep-c5.cpu: Likewise.
 241         * mep-core.cpu: Likewise.
 242         * mep-default.cpu: Likewise.
 243         * mep-ext-cop.cpu: Likewise.
 244         * mep-fmax.cpu: Likewise.
 245         * mep-h1.cpu: Likewise.
 246         * mep-ivc2.cpu: Likewise.
 247         * mep-rhcop.cpu: Likewise.
 248         * mep-sample-ucidsp.cpu: Likewise.
 249         * mep.cpu: Likewise.
 250         * mep.opc: Likewise.
 251         * openrisc.cpu: Likewise.
 252         * openrisc.opc: Likewise.
 253         * xstormy16.cpu: Likewise.
 254         * xstormy16.opc: Likewise.
 255
 256 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 257
 258         * frv.opc: #undef DEBUG.
 259
 260 2010-07-03  DJ Delorie  <dj@delorie.com>
 261
 262         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 263
 264 2010-02-11  Doug Evans  <dje@sebabeach.org>
 265
 266         * m32r.cpu (HASH-PREFIX): Delete.
 267         (duhpo, dshpo): New pmacros.
 268         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 269         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 270         attribute, define with dshpo.
 271         (uimm24): Delete HASH-PREFIX attribute.
 272         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 273         (print_signed_with_hash_prefix): New function.
 274         (print_unsigned_with_hash_prefix): New function.
 275         * xc16x.cpu (dowh): New pmacro.
 276         (upof16): Define with dowh, specify print handler.
 277         (qbit, qlobit, qhibit): Ditto.
 278         (upag16): Ditto.
 279         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 280         (print_with_dot_prefix): New functions.
 281         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 282
 283 2010-01-24  Doug Evans  <dje@sebabeach.org>
 284
 285         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 286         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 287         conditional-floating-point-conversion, ne-floating-point-conversion,
 288         float-parallel-mul-add-double-semantics): Ditto.
 289
 290 2010-01-05  Doug Evans  <dje@sebabeach.org>
 291
 292         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 293         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 294
 295 2010-01-02  Doug Evans  <dje@sebabeach.org>
 296
 297         * m32c.opc (parse_signed16): Fix typo.
 298
 299 2009-12-11  Nick Clifton  <nickc@redhat.com>
 300
 301         * frv.opc: Fix shadowed variable warnings.
 302         * m32c.opc: Fix shadowed variable warnings.
 303
 304 2009-11-14  Doug Evans  <dje@sebabeach.org>
 305
 306         Must use VOID expression in VOID context.
 307         * xc16x.cpu (mov4): Fix mode of `sequence'.
 308         (mov9, mov10): Ditto.
 309         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 310         (callr, callseg, calls, trap, rets, reti): Ditto.
 311         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 312         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 313         (exts, exts1, extsr, extsr1, prior): Ditto.
 314
 315 2009-10-23  Doug Evans  <dje@sebabeach.org>
 316
 317         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 318         cgen-ops.h -> cgen/basic-ops.h.
 319
 320 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 321
 322         * m32r.cpu (stb-plus): Typo fix.
 323
 324 2009-09-23  Doug Evans  <dje@sebabeach.org>
 325
 326         * m32r.cpu (sth-plus): Fix address mode and calculation.
 327         (stb-plus): Ditto.
 328         (clrpsw): Fix mask calculation.
 329         (bset, bclr, btst): Make mode in bit calculation match expression.
 330
 331         * xc16x.cpu (rtl-version): Set to 0.8.
 332         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 333         make uppercase.  Remove unnecessary name-prefix spec.
 334         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 335         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 336         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 337         (h-cr): New hardware.
 338         (muls): Comment out parts that won't compile, add fixme.
 339         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 340         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 341         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 342
 343 2009-07-16  Doug Evans  <dje@sebabeach.org>
 344
 345         * cpu/simplify.inc (*): One line doc strings don't need \n.
 346         (df): Invoke define-full-ifield instead of claiming it's an alias.
 347         (dno): Define.
 348         (dnop): Mark as deprecated.
 349
 350 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 351
 352         * m32c.opc (parse_lab_5_3): Use correct enum.
 353
 354 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 355
 356         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 357         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 358         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 359         arguments of "operation" to DI using "mode" and the new pmacros.
 360
 361 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 362
 363         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 364         of number 2, PID.
 365
 366 2008-12-23  Jon Beniston <jon@beniston.com>
 367
 368         * lm32.cpu: New file.
 369         * lm32.opc: New file.
 370
 371 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 372
 373         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 374         to source.
 375
 376 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 377
 378         * cris.cpu (movs, movu): Use result of extension operation when
 379         updating flags.
 380
 381 2007-07-04  Nick Clifton  <nickc@redhat.com>
 382
 383         * cris.cpu: Update copyright notice to refer to GPLv3.
 384         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 385         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 386         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 387         xc16x.opc: Likewise.
 388         * iq2000.cpu: Fix copyright notice to refer to FSF.
 389
 390 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 391
 392         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 393
 394 2007-04-20  Nick Clifton  <nickc@redhat.com>
 395
 396         * xc16x.cpu: Restore after accidentally overwriting this file with
 397         xc16x.opc.
 398
 399 2007-03-29  DJ Delorie  <dj@redhat.com>
 400
 401         * m32c.cpu (Imm-8-s4n): Fix print hook.
 402         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 403         (arith-jnz-imm4-dst-defn): Make relaxable.
 404         (arith-jnz16-imm4-dst-defn): Fix encodings.
 405
 406 2007-03-20  DJ Delorie  <dj@redhat.com>
 407
 408         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 409         mem20): New.
 410         (src16-16-20-An-relative-*): New.
 411         (dst16-*-20-An-relative-*): New.
 412         (dst16-16-16sa-*): New
 413         (dst16-16-16ar-*): New
 414         (dst32-16-16sa-Unprefixed-*): New
 415         (jsri): Fix operands.
 416         (setzx): Fix encoding.
 417
 418 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 419
 420         * m32r.opc: Formatting.
 421
 422 2006-05-22  Nick Clifton  <nickc@redhat.com>
 423
 424         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 425
 426 2006-04-10  DJ Delorie  <dj@redhat.com>
 427
 428         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 429         decides if this function accepts symbolic constants or not.
 430         (parse_signed_bitbase): Likewise.
 431         (parse_unsigned_bitbase8): Pass the new parameter.
 432         (parse_unsigned_bitbase11): Likewise.
 433         (parse_unsigned_bitbase16): Likewise.
 434         (parse_unsigned_bitbase19): Likewise.
 435         (parse_unsigned_bitbase27): Likewise.
 436         (parse_signed_bitbase8): Likewise.
 437         (parse_signed_bitbase11): Likewise.
 438         (parse_signed_bitbase19): Likewise.
 439
 440 2006-03-13  DJ Delorie  <dj@redhat.com>
 441
 442         * m32c.cpu (Bit3-S): New.
 443         (btst:s): New.
 444         * m32c.opc (parse_bit3_S): New.
 445
 446         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 447         (btst): Add optional :G suffix for MACH32.
 448         (or.b:S): New.
 449         (pop.w:G): Add optional :G suffix for MACH16.
 450         (push.b.imm): Fix syntax.
 451
 452 2006-03-10  DJ Delorie  <dj@redhat.com>
 453
 454         * m32c.cpu (mul.l): New.
 455         (mulu.l): New.
 456
 457 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 458
 459         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 460         an error message otherwise.
 461         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 462         Fix up comments to correctly describe the functions.
 463
 464 2006-02-24  DJ Delorie  <dj@redhat.com>
 465
 466         * m32c.cpu (RL_TYPE): New attribute, with macros.
 467         (Lab-8-24): Add RELAX.
 468         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 469         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 470         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 471         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 472         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 473         attribute.
 474         (jsri16, jsri32): Add 1ADDR attribute.
 475         (jsr32.w, jsr32.a): Add JUMP attribute.
 476
 477 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 478             Anil Paranjape   <anilp1@kpitcummins.com>
 479             Shilin Shakti    <shilins@kpitcummins.com>
 480
 481         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 482         description.
 483         * xc16x.opc: New file containing supporting XC16C routines.
 484
 485 2006-02-10  Nick Clifton  <nickc@redhat.com>
 486
 487         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 488
 489 2006-01-06  DJ Delorie  <dj@redhat.com>
 490
 491         * m32c.cpu (mov.w:q): Fix mode.
 492         (push32.b.imm): Likewise, for the comment.
 493
 494 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 495
 496         Second part of ms1 to mt renaming.
 497         * mt.cpu (define-arch, define-isa): Set name to mt.
 498         (define-mach): Adjust.
 499         * mt.opc (CGEN_ASM_HASH): Update.
 500         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 501         (parse_loopsize, parse_imm16): Adjust.
 502
 503 2005-12-13  DJ Delorie  <dj@redhat.com>
 504
 505         * m32c.cpu (jsri): Fix order so register names aren't treated as
 506         symbols.
 507         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 508         indexwd, indexws): Fix encodings.
 509
 510 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 511
 512         * mt.cpu: Rename from ms1.cpu.
 513         * mt.opc: Rename from ms1.opc.
 514
 515 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 516
 517         * cris.cpu (simplecris-common-writable-specregs)
 518         (simplecris-common-readable-specregs): Split from
 519         simplecris-common-specregs.  All users changed.
 520         (cris-implemented-writable-specregs-v0)
 521         (cris-implemented-readable-specregs-v0): Similar from
 522         cris-implemented-specregs-v0.
 523         (cris-implemented-writable-specregs-v3)
 524         (cris-implemented-readable-specregs-v3)
 525         (cris-implemented-writable-specregs-v8)
 526         (cris-implemented-readable-specregs-v8)
 527         (cris-implemented-writable-specregs-v10)
 528         (cris-implemented-readable-specregs-v10)
 529         (cris-implemented-writable-specregs-v32)
 530         (cris-implemented-readable-specregs-v32): Similar.
 531         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 532         insns and specializations.
 533
 534 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 535
 536         Add ms2
 537         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 538         model.
 539         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 540         f-cb2incr, f-rc3): New fields.
 541         (LOOP): New instruction.
 542         (JAL-HAZARD): New hazard.
 543         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 544         New operands.
 545         (mul, muli, dbnz, iflush): Enable for ms2
 546         (jal, reti): Has JAL-HAZARD.
 547         (ldctxt, ldfb, stfb): Only ms1.
 548         (fbcb): Only ms1,ms1-003.
 549         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 550         fbcbincrs, mfbcbincrs): Enable for ms2.
 551         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 552         * ms1.opc (parse_loopsize): New.
 553         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 554         (print_pcrel): New.
 555
 556 2005-10-28  Dave Brolley  <brolley@redhat.com>
 557
 558         Contribute the following change:
 559         2003-09-24  Dave Brolley  <brolley@redhat.com>
 560
 561         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 562         CGEN_ATTR_VALUE_TYPE.
 563         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 564         Use cgen_bitset_intersect_p.
 565
 566 2005-10-27  DJ Delorie  <dj@redhat.com>
 567
 568         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 569         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 570         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 571         imm operand is needed.
 572         (adjnz, sbjnz): Pass the right operands.
 573         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 574         unary-insn): Add -g variants for opcodes that need to support :G.
 575         (not.BW:G, push.BW:G): Call it.
 576         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 577         stzx16-imm8-imm8-abs16): Fix operand typos.
 578         * m32c.opc (m32c_asm_hash): Support bnCND.
 579         (parse_signed4n, print_signed4n): New.
 580
 581 2005-10-26  DJ Delorie  <dj@redhat.com>
 582
 583         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 584         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 585         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 586         dsp8[sp] is signed.
 587         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 588         (mov.BW:S r0,r1): Fix typo r1l->r1.
 589         (tst): Allow :G suffix.
 590         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 591
 592 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 593
 594         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 595
 596 2005-10-25  DJ Delorie  <dj@redhat.com>
 597
 598         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 599         making one a macro of the other.
 600
 601 2005-10-21  DJ Delorie  <dj@redhat.com>
 602
 603         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 604         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 605         indexld, indexls): .w variants have `1' bit.
 606         (rot32.b): QI, not SI.
 607         (rot32.w): HI, not SI.
 608         (xchg16): HI for .w variant.
 609
 610 2005-10-19  Nick Clifton  <nickc@redhat.com>
 611
 612         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 613
 614 2005-10-18  Andreas Schwab  <schwab@suse.de>
 615
 616         * m32r.opc (parse_slo16): Better version of previous patch.
 617
 618 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 619
 620         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 621         size.
 622
 623 2005-07-25  DJ Delorie  <dj@redhat.com>
 624
 625         * m32c.opc (parse_unsigned8): Add %dsp8().
 626         (parse_signed8): Add %hi8().
 627         (parse_unsigned16): Add %dsp16().
 628         (parse_signed16): Add %lo16() and %hi16().
 629         (parse_lab_5_3): Make valuep a bfd_vma *.
 630
 631 2005-07-18  Nick Clifton  <nickc@redhat.com>
 632
 633         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 634         components.
 635         (f-lab32-jmp-s): Fix insertion sequence.
 636         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 637         (Dsp-40-s8): Make parameter be signed.
 638         (Dsp-40-s16): Likewise.
 639         (Dsp-48-s8): Likewise.
 640         (Dsp-48-s16): Likewise.
 641         (Imm-13-u3): Likewise. (Despite its name!)
 642         (BitBase16-16-s8): Make the parameter be unsigned.
 643         (BitBase16-8-u11-S): Likewise.
 644         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 645         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 646         relaxation.
 647
 648         * m32c.opc: Fix formatting.
 649         Use safe-ctype.h instead of ctype.h
 650         Move duplicated code sequences into a macro.
 651         Fix compile time warnings about signedness mismatches.
 652         Remove dead code.
 653         (parse_lab_5_3): New parser function.
 654
 655 2005-07-16  Jim Blandy  <jimb@redhat.com>
 656
 657         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 658         to represent isa sets.
 659
 660 2005-07-15  Jim Blandy  <jimb@redhat.com>
 661
 662         * m32c.cpu, m32c.opc: Fix copyright.
 663
 664 2005-07-14  Jim Blandy  <jimb@redhat.com>
 665
 666         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 667
 668 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 669
 670         * ms1.opc (print_dollarhex): Correct format string.
 671
 672 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 673
 674         * iq2000.cpu: Include from binutils cpu dir.
 675
 676 2005-07-05  Nick Clifton  <nickc@redhat.com>
 677
 678         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 679         unsigned in order to avoid compile time warnings about sign
 680         conflicts.
 681
 682         * ms1.opc (parse_*): Likewise.
 683         (parse_imm16): Use a "void *" as it is passed both signed and
 684         unsigned arguments.
 685
 686 2005-07-01  Nick Clifton  <nickc@redhat.com>
 687
 688         * frv.opc: Update to ISO C90 function declaration style.
 689         * iq2000.opc: Likewise.
 690         * m32r.opc: Likewise.
 691         * sh.opc: Likewise.
 692
 693 2005-06-15  Dave Brolley  <brolley@redhat.com>
 694
 695         Contributed by Red Hat.
 696         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 697         * ms1.opc: New file.  Written by Stan Cox.
 698
 699 2005-05-10  Nick Clifton  <nickc@redhat.com>
 700
 701         * Update the address and phone number of the FSF organization in
 702         the GPL notices in the following files:
 703         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 704         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 705         sh64-media.cpu, simplify.inc
 706
 707 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 708
 709         * frv.opc (parse_A): Warning fix.
 710
 711 2005-02-23  Nick Clifton  <nickc@redhat.com>
 712
 713         * frv.opc: Fixed compile time warnings about differing signed'ness
 714         of pointers passed to functions.
 715         * m32r.opc: Likewise.
 716
 717 2005-02-11  Nick Clifton  <nickc@redhat.com>
 718
 719         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 720         'bfd_vma *' in order avoid compile time warning message.
 721
 722 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 723
 724         * cris.cpu (mstep): Add missing insn.
 725
 726 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 727
 728         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 729         * frv.cpu: Add support for TLS annotations in loads and calll.
 730         * frv.opc (parse_symbolic_address): New.
 731         (parse_ldd_annotation): New.
 732         (parse_call_annotation): New.
 733         (parse_ld_annotation): New.
 734         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 735         Introduce TLS relocations.
 736         (parse_d12, parse_s12, parse_u12): Likewise.
 737         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 738         (parse_call_label, print_at): New.
 739
 740 2004-12-21  Mikael Starvik  <starvik@axis.com>
 741
 742         * cris.cpu (cris-set-mem): Correct integral write semantics.
 743
 744 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 745
 746         * cris.cpu: New file.
 747
 748 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 749
 750         * iq2000.cpu: Added quotes around macro arguments so that they
 751         will work with newer versions of guile.
 752
 753 2004-10-27  Nick Clifton  <nickc@redhat.com>
 754
 755         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 756         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 757         operand.
 758         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 759         with guile.
 760
 761 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 762
 763         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 764
 765 2004-05-15  Nick Clifton  <nickc@redhat.com>
 766
 767         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 768
 769 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 770
 771         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 772
 773 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 774
 775         * frv.cpu (define-arch frv): Add fr450 mach.
 776         (define-mach fr450): New.
 777         (define-model fr450): New.  Add profile units to every fr450 insn.
 778         (define-attr UNIT): Add MDCUTSSI.
 779         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 780         (define-attr AUDIO): New boolean.
 781         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 782         (f-LRA-null, f-TLBPR-null): New fields.
 783         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 784         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 785         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 786         (LRA-null, TLBPR-null): New macros.
 787         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 788         (load-real-address): New macro.
 789         (lrai, lrad, tlbpr): New instructions.
 790         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 791         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 792         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 793         (media-low-clear-semantics, media-scope-limit-semantics)
 794         (media-quad-limit, media-quad-shift): New macros.
 795         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 796         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 797         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 798         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 799         (fr450_unit_mapping): New array.
 800         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 801         for new MDCUTSSI unit.
 802         (fr450_check_insn_major_constraints): New function.
 803         (check_insn_major_constraints): Use it.
 804
 805 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 806
 807         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 808         (scutss): Change unit to I0.
 809         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 810         (mqsaths): Fix FR400-MAJOR categorization.
 811         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 812         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 813         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 814         combinations.
 815
 816 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 817
 818         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 819         (rstb, rsth, rst, rstd, rstq): Delete.
 820         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 821
 822 2004-02-23  Nick Clifton  <nickc@redhat.com>
 823
 824         * Apply these patches from Renesas:
 825
 826         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 827
 828         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 829         disassembling codes for 0x*2 addresses.
 830
 831         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 832
 833         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 834
 835         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 836
 837         * cpu/m32r.cpu : Add new model m32r2.
 838         Add new instructions.
 839         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 840         Changed PIPE attr of push from O to OS.
 841         Care for Little-endian of M32R.
 842         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 843         Care for Little-endian of M32R.
 844         (parse_slo16): signed extension for value.
 845
 846 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 847
 848         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 849         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 850
 851         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 852         written by Ben Elliston.
 853
 854 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 855
 856         * frv.cpu (UNIT): Add IACC.
 857         (iacc-multiply-r-r): Use it.
 858         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 859         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 860
 861 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 862
 863         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 864         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 865         cut&paste errors in shifting/truncating numerical operands.
 866         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 867         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 868         (parse_uslo16): Likewise.
 869         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 870         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 871         (parse_s12): Likewise.
 872         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 873         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 874         (parse_uslo16): Likewise.
 875         (parse_uhi16): Parse gothi and gotfuncdeschi.
 876         (parse_d12): Parse got12 and gotfuncdesc12.
 877         (parse_s12): Likewise.
 878
 879 2003-10-10  Dave Brolley  <brolley@redhat.com>
 880
 881         * frv.cpu (dnpmop): New p-macro.
 882         (GRdoublek): Use dnpmop.
 883         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 884         (store-double-r-r): Use (.sym regtype doublek).
 885         (r-store-double): Ditto.
 886         (store-double-r-r-u): Ditto.
 887         (conditional-store-double): Ditto.
 888         (conditional-store-double-u): Ditto.
 889         (store-double-r-simm): Ditto.
 890         (fmovs): Assign to UNIT FMALL.
 891
 892 2003-10-06  Dave Brolley  <brolley@redhat.com>
 893
 894         * frv.cpu, frv.opc: Add support for fr550.
 895
 896 2003-09-24  Dave Brolley  <brolley@redhat.com>
 897
 898         * frv.cpu (u-commit): New modelling unit for fr500.
 899         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 900         (commit-r): Use u-commit model for fr500.
 901         (commit): Ditto.
 902         (conditional-float-binary-op): Take profiling data as an argument.
 903         Update callers.
 904         (ne-float-binary-op): Ditto.
 905
 906 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 907
 908         * frv.cpu (nldqi): Delete unimplemented instruction.
 909
 910 2003-09-12  Dave Brolley  <brolley@redhat.com>
 911
 912         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 913         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 914         frv_ref_SI to get input register referenced for profiling.
 915         (clear-ne-flag-all): Pass insn profiling in as an argument.
 916         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 917
 918 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 919
 920         * frv.cpu: Typographical corrections.
 921
 922 2003-09-09  Dave Brolley  <brolley@redhat.com>
 923
 924         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 925         (conditional-media-dual-complex, media-quad-complex): Likewise.
 926
 927 2003-09-04  Dave Brolley  <brolley@redhat.com>
 928
 929         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 930         Update all callers.
 931         (conditional-register-transfer): Ditto.
 932         (cache-preload): Ditto.
 933         (floating-point-conversion): Ditto.
 934         (floating-point-neg): Ditto.
 935         (float-abs): Ditto.
 936         (float-binary-op-s): Ditto.
 937         (conditional-float-binary-op): Ditto.
 938         (ne-float-binary-op): Ditto.
 939         (float-dual-arith): Ditto.
 940         (ne-float-dual-arith): Ditto.
 941
 942 2003-09-03  Dave Brolley  <brolley@redhat.com>
 943
 944         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 945         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 946         MCLRACC-1.
 947         (A): Removed operand.
 948         (A0,A1): New operands replace operand A.
 949         (mnop): Now a real insn
 950         (mclracc): Removed insn.
 951         (mclracc-0, mclracc-1): New insns replace mclracc.
 952         (all insns): Use new UNIT attributes.
 953
 954 2003-08-21  Nick Clifton  <nickc@redhat.com>
 955
 956         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 957         and u-media-dual-btoh with output parameter.
 958         (cmbtoh): Add profiling hack.
 959
 960 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 961
 962         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
 963
 964 2003-06-10  Doug Evans  <dje@sebabeach.org>
 965
 966         * frv.cpu: Add IDOC attribute.
 967
 968 2003-06-06  Andrew Cagney  <cagney@redhat.com>
 969
 970         Contributed by Red Hat.
 971         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
 972         Stan Cox, and Frank Ch. Eigler.
 973         * iq2000.opc: New file.  Written by Ben Elliston, Frank
 974         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
 975         * iq2000m.cpu: New file.  Written by Jeff Johnston.
 976         * iq10.cpu: New file.  Written by Jeff Johnston.
 977
 978 2003-06-05  Nick Clifton  <nickc@redhat.com>
 979
 980         * frv.cpu (FRintieven): New operand.  An even-numbered only
 981         version of the FRinti operand.
 982         (FRintjeven): Likewise for FRintj.
 983         (FRintkeven): Likewise for FRintk.
 984         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
 985         media-quad-arith-sat-semantics, media-quad-arith-sat,
 986         conditional-media-quad-arith-sat, mdunpackh,
 987         media-quad-multiply-semantics, media-quad-multiply,
 988         conditional-media-quad-multiply, media-quad-complex-i,
 989         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
 990         conditional-media-quad-multiply-acc, munpackh,
 991         media-quad-multiply-cross-acc-semantics, mdpackh,
 992         media-quad-multiply-cross-acc, mbtoh-semantics,
 993         media-quad-cross-multiply-cross-acc-semantics,
 994         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
 995         media-quad-cross-multiply-acc-semantics, cmbtoh,
 996         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
 997         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
 998         cmhtob): Use new operands.
 999         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1000         (parse_even_register): New function.
1001
1002 2003-06-03  Nick Clifton  <nickc@redhat.com>
1003
1004         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1005         immediate value not unsigned.
1006
1007 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1008
1009         Contributed by Red Hat.
1010         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1011         and Eric Christopher.
1012         * frv.opc: New file.  Written by Catherine Moore, and Dave
1013         Brolley.
1014         * simplify.inc: New file.  Written by Doug Evans.
1015
1016 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1017
1018         * New file.
1019
1020 \f
1021 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1022
1023 Copying and distribution of this file, with or without modification,
1024 are permitted in any medium without royalty provided the copyright
1025 notice and this notice are preserved.
1026
1027 Local Variables:
1028 mode: change-log
1029 left-margin: 8
1030 fill-column: 74
1031 version-control: never
1032 End: