1 2008-12-23 Jon Beniston <jon@beniston.com>
6 2008-01-29 Alan Modra <amodra@bigpond.net.au>
8 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
11 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
13 * cris.cpu (movs, movu): Use result of extension operation when
16 2007-07-04 Nick Clifton <nickc@redhat.com>
18 * cris.cpu: Update copyright notice to refer to GPLv3.
19 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
20 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
21 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
23 * iq2000.cpu: Fix copyright notice to refer to FSF.
25 2007-04-30 Mark Salter <msalter@sadr.localdomain>
27 * frv.cpu (spr-names): Support new coprocessor SPR registers.
29 2007-04-20 Nick Clifton <nickc@redhat.com>
31 * xc16x.cpu: Restore after accidentally overwriting this file with
34 2007-03-29 DJ Delorie <dj@redhat.com>
36 * m32c.cpu (Imm-8-s4n): Fix print hook.
37 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
38 (arith-jnz-imm4-dst-defn): Make relaxable.
39 (arith-jnz16-imm4-dst-defn): Fix encodings.
41 2007-03-20 DJ Delorie <dj@redhat.com>
43 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
45 (src16-16-20-An-relative-*): New.
46 (dst16-*-20-An-relative-*): New.
47 (dst16-16-16sa-*): New
48 (dst16-16-16ar-*): New
49 (dst32-16-16sa-Unprefixed-*): New
51 (setzx): Fix encoding.
53 2007-03-08 Alan Modra <amodra@bigpond.net.au>
55 * m32r.opc: Formatting.
57 2006-05-22 Nick Clifton <nickc@redhat.com>
59 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
61 2006-04-10 DJ Delorie <dj@redhat.com>
63 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
64 decides if this function accepts symbolic constants or not.
65 (parse_signed_bitbase): Likewise.
66 (parse_unsigned_bitbase8): Pass the new parameter.
67 (parse_unsigned_bitbase11): Likewise.
68 (parse_unsigned_bitbase16): Likewise.
69 (parse_unsigned_bitbase19): Likewise.
70 (parse_unsigned_bitbase27): Likewise.
71 (parse_signed_bitbase8): Likewise.
72 (parse_signed_bitbase11): Likewise.
73 (parse_signed_bitbase19): Likewise.
75 2006-03-13 DJ Delorie <dj@redhat.com>
77 * m32c.cpu (Bit3-S): New.
79 * m32c.opc (parse_bit3_S): New.
81 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
82 (btst): Add optional :G suffix for MACH32.
84 (pop.w:G): Add optional :G suffix for MACH16.
85 (push.b.imm): Fix syntax.
87 2006-03-10 DJ Delorie <dj@redhat.com>
89 * m32c.cpu (mul.l): New.
92 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
94 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
95 an error message otherwise.
96 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
97 Fix up comments to correctly describe the functions.
99 2006-02-24 DJ Delorie <dj@redhat.com>
101 * m32c.cpu (RL_TYPE): New attribute, with macros.
102 (Lab-8-24): Add RELAX.
103 (unary-insn-defn-g, binary-arith-imm-dst-defn,
104 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
105 (binary-arith-src-dst-defn): Add 2ADDR attribute.
106 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
107 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
109 (jsri16, jsri32): Add 1ADDR attribute.
110 (jsr32.w, jsr32.a): Add JUMP attribute.
112 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
113 Anil Paranjape <anilp1@kpitcummins.com>
114 Shilin Shakti <shilins@kpitcummins.com>
116 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
118 * xc16x.opc: New file containing supporting XC16C routines.
120 2006-02-10 Nick Clifton <nickc@redhat.com>
122 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
124 2006-01-06 DJ Delorie <dj@redhat.com>
126 * m32c.cpu (mov.w:q): Fix mode.
127 (push32.b.imm): Likewise, for the comment.
129 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
131 Second part of ms1 to mt renaming.
132 * mt.cpu (define-arch, define-isa): Set name to mt.
133 (define-mach): Adjust.
134 * mt.opc (CGEN_ASM_HASH): Update.
135 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
136 (parse_loopsize, parse_imm16): Adjust.
138 2005-12-13 DJ Delorie <dj@redhat.com>
140 * m32c.cpu (jsri): Fix order so register names aren't treated as
142 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
143 indexwd, indexws): Fix encodings.
145 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
147 * mt.cpu: Rename from ms1.cpu.
148 * mt.opc: Rename from ms1.opc.
150 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
152 * cris.cpu (simplecris-common-writable-specregs)
153 (simplecris-common-readable-specregs): Split from
154 simplecris-common-specregs. All users changed.
155 (cris-implemented-writable-specregs-v0)
156 (cris-implemented-readable-specregs-v0): Similar from
157 cris-implemented-specregs-v0.
158 (cris-implemented-writable-specregs-v3)
159 (cris-implemented-readable-specregs-v3)
160 (cris-implemented-writable-specregs-v8)
161 (cris-implemented-readable-specregs-v8)
162 (cris-implemented-writable-specregs-v10)
163 (cris-implemented-readable-specregs-v10)
164 (cris-implemented-writable-specregs-v32)
165 (cris-implemented-readable-specregs-v32): Similar.
166 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
167 insns and specializations.
169 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
172 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
174 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
175 f-cb2incr, f-rc3): New fields.
176 (LOOP): New instruction.
177 (JAL-HAZARD): New hazard.
178 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
180 (mul, muli, dbnz, iflush): Enable for ms2
181 (jal, reti): Has JAL-HAZARD.
182 (ldctxt, ldfb, stfb): Only ms1.
183 (fbcb): Only ms1,ms1-003.
184 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
185 fbcbincrs, mfbcbincrs): Enable for ms2.
186 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
187 * ms1.opc (parse_loopsize): New.
188 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
191 2005-10-28 Dave Brolley <brolley@redhat.com>
193 Contribute the following change:
194 2003-09-24 Dave Brolley <brolley@redhat.com>
196 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
197 CGEN_ATTR_VALUE_TYPE.
198 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
199 Use cgen_bitset_intersect_p.
201 2005-10-27 DJ Delorie <dj@redhat.com>
203 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
204 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
205 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
206 imm operand is needed.
207 (adjnz, sbjnz): Pass the right operands.
208 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
209 unary-insn): Add -g variants for opcodes that need to support :G.
210 (not.BW:G, push.BW:G): Call it.
211 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
212 stzx16-imm8-imm8-abs16): Fix operand typos.
213 * m32c.opc (m32c_asm_hash): Support bnCND.
214 (parse_signed4n, print_signed4n): New.
216 2005-10-26 DJ Delorie <dj@redhat.com>
218 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
219 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
220 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
222 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
223 (mov.BW:S r0,r1): Fix typo r1l->r1.
224 (tst): Allow :G suffix.
225 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
227 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
229 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
231 2005-10-25 DJ Delorie <dj@redhat.com>
233 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
234 making one a macro of the other.
236 2005-10-21 DJ Delorie <dj@redhat.com>
238 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
239 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
240 indexld, indexls): .w variants have `1' bit.
241 (rot32.b): QI, not SI.
242 (rot32.w): HI, not SI.
243 (xchg16): HI for .w variant.
245 2005-10-19 Nick Clifton <nickc@redhat.com>
247 * m32r.opc (parse_slo16): Fix bad application of previous patch.
249 2005-10-18 Andreas Schwab <schwab@suse.de>
251 * m32r.opc (parse_slo16): Better version of previous patch.
253 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
255 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
258 2005-07-25 DJ Delorie <dj@redhat.com>
260 * m32c.opc (parse_unsigned8): Add %dsp8().
261 (parse_signed8): Add %hi8().
262 (parse_unsigned16): Add %dsp16().
263 (parse_signed16): Add %lo16() and %hi16().
264 (parse_lab_5_3): Make valuep a bfd_vma *.
266 2005-07-18 Nick Clifton <nickc@redhat.com>
268 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
270 (f-lab32-jmp-s): Fix insertion sequence.
271 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
272 (Dsp-40-s8): Make parameter be signed.
273 (Dsp-40-s16): Likewise.
274 (Dsp-48-s8): Likewise.
275 (Dsp-48-s16): Likewise.
276 (Imm-13-u3): Likewise. (Despite its name!)
277 (BitBase16-16-s8): Make the parameter be unsigned.
278 (BitBase16-8-u11-S): Likewise.
279 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
280 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
283 * m32c.opc: Fix formatting.
284 Use safe-ctype.h instead of ctype.h
285 Move duplicated code sequences into a macro.
286 Fix compile time warnings about signedness mismatches.
288 (parse_lab_5_3): New parser function.
290 2005-07-16 Jim Blandy <jimb@redhat.com>
292 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
293 to represent isa sets.
295 2005-07-15 Jim Blandy <jimb@redhat.com>
297 * m32c.cpu, m32c.opc: Fix copyright.
299 2005-07-14 Jim Blandy <jimb@redhat.com>
301 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
303 2005-07-14 Alan Modra <amodra@bigpond.net.au>
305 * ms1.opc (print_dollarhex): Correct format string.
307 2005-07-06 Alan Modra <amodra@bigpond.net.au>
309 * iq2000.cpu: Include from binutils cpu dir.
311 2005-07-05 Nick Clifton <nickc@redhat.com>
313 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
314 unsigned in order to avoid compile time warnings about sign
317 * ms1.opc (parse_*): Likewise.
318 (parse_imm16): Use a "void *" as it is passed both signed and
321 2005-07-01 Nick Clifton <nickc@redhat.com>
323 * frv.opc: Update to ISO C90 function declaration style.
324 * iq2000.opc: Likewise.
325 * m32r.opc: Likewise.
328 2005-06-15 Dave Brolley <brolley@redhat.com>
330 Contributed by Red Hat.
331 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
332 * ms1.opc: New file. Written by Stan Cox.
334 2005-05-10 Nick Clifton <nickc@redhat.com>
336 * Update the address and phone number of the FSF organization in
337 the GPL notices in the following files:
338 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
339 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
340 sh64-media.cpu, simplify.inc
342 2005-02-24 Alan Modra <amodra@bigpond.net.au>
344 * frv.opc (parse_A): Warning fix.
346 2005-02-23 Nick Clifton <nickc@redhat.com>
348 * frv.opc: Fixed compile time warnings about differing signed'ness
349 of pointers passed to functions.
350 * m32r.opc: Likewise.
352 2005-02-11 Nick Clifton <nickc@redhat.com>
354 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
355 'bfd_vma *' in order avoid compile time warning message.
357 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
359 * cris.cpu (mstep): Add missing insn.
361 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
363 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
364 * frv.cpu: Add support for TLS annotations in loads and calll.
365 * frv.opc (parse_symbolic_address): New.
366 (parse_ldd_annotation): New.
367 (parse_call_annotation): New.
368 (parse_ld_annotation): New.
369 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
370 Introduce TLS relocations.
371 (parse_d12, parse_s12, parse_u12): Likewise.
372 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
373 (parse_call_label, print_at): New.
375 2004-12-21 Mikael Starvik <starvik@axis.com>
377 * cris.cpu (cris-set-mem): Correct integral write semantics.
379 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
381 * cris.cpu: New file.
383 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
385 * iq2000.cpu: Added quotes around macro arguments so that they
386 will work with newer versions of guile.
388 2004-10-27 Nick Clifton <nickc@redhat.com>
390 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
391 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
393 * iq2000.cpu (dnop index): Rename to _index to avoid complications
396 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
398 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
400 2004-05-15 Nick Clifton <nickc@redhat.com>
402 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
404 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
406 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
408 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
410 * frv.cpu (define-arch frv): Add fr450 mach.
411 (define-mach fr450): New.
412 (define-model fr450): New. Add profile units to every fr450 insn.
413 (define-attr UNIT): Add MDCUTSSI.
414 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
415 (define-attr AUDIO): New boolean.
416 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
417 (f-LRA-null, f-TLBPR-null): New fields.
418 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
419 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
420 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
421 (LRA-null, TLBPR-null): New macros.
422 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
423 (load-real-address): New macro.
424 (lrai, lrad, tlbpr): New instructions.
425 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
426 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
427 (mdcutssi): Change UNIT attribute to MDCUTSSI.
428 (media-low-clear-semantics, media-scope-limit-semantics)
429 (media-quad-limit, media-quad-shift): New macros.
430 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
431 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
432 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
433 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
434 (fr450_unit_mapping): New array.
435 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
436 for new MDCUTSSI unit.
437 (fr450_check_insn_major_constraints): New function.
438 (check_insn_major_constraints): Use it.
440 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
442 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
443 (scutss): Change unit to I0.
444 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
445 (mqsaths): Fix FR400-MAJOR categorization.
446 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
447 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
448 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
451 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
453 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
454 (rstb, rsth, rst, rstd, rstq): Delete.
455 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
457 2004-02-23 Nick Clifton <nickc@redhat.com>
459 * Apply these patches from Renesas:
461 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
463 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
464 disassembling codes for 0x*2 addresses.
466 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
468 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
470 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
472 * cpu/m32r.cpu : Add new model m32r2.
473 Add new instructions.
474 Replace occurrances of 'Mitsubishi' with 'Renesas'.
475 Changed PIPE attr of push from O to OS.
476 Care for Little-endian of M32R.
477 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
478 Care for Little-endian of M32R.
479 (parse_slo16): signed extension for value.
481 2004-02-20 Andrew Cagney <cagney@redhat.com>
483 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
484 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
486 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
487 written by Ben Elliston.
489 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
491 * frv.cpu (UNIT): Add IACC.
492 (iacc-multiply-r-r): Use it.
493 * frv.opc (fr400_unit_mapping): Add entry for IACC.
494 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
496 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
498 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
499 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
500 cut&paste errors in shifting/truncating numerical operands.
501 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
502 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
503 (parse_uslo16): Likewise.
504 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
505 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
506 (parse_s12): Likewise.
507 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
508 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
509 (parse_uslo16): Likewise.
510 (parse_uhi16): Parse gothi and gotfuncdeschi.
511 (parse_d12): Parse got12 and gotfuncdesc12.
512 (parse_s12): Likewise.
514 2003-10-10 Dave Brolley <brolley@redhat.com>
516 * frv.cpu (dnpmop): New p-macro.
517 (GRdoublek): Use dnpmop.
518 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
519 (store-double-r-r): Use (.sym regtype doublek).
520 (r-store-double): Ditto.
521 (store-double-r-r-u): Ditto.
522 (conditional-store-double): Ditto.
523 (conditional-store-double-u): Ditto.
524 (store-double-r-simm): Ditto.
525 (fmovs): Assign to UNIT FMALL.
527 2003-10-06 Dave Brolley <brolley@redhat.com>
529 * frv.cpu, frv.opc: Add support for fr550.
531 2003-09-24 Dave Brolley <brolley@redhat.com>
533 * frv.cpu (u-commit): New modelling unit for fr500.
534 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
535 (commit-r): Use u-commit model for fr500.
537 (conditional-float-binary-op): Take profiling data as an argument.
539 (ne-float-binary-op): Ditto.
541 2003-09-19 Michael Snyder <msnyder@redhat.com>
543 * frv.cpu (nldqi): Delete unimplemented instruction.
545 2003-09-12 Dave Brolley <brolley@redhat.com>
547 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
548 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
549 frv_ref_SI to get input register referenced for profiling.
550 (clear-ne-flag-all): Pass insn profiling in as an argument.
551 (clrgr,clrfr,clrga,clrfa): Add profiling information.
553 2003-09-11 Michael Snyder <msnyder@redhat.com>
555 * frv.cpu: Typographical corrections.
557 2003-09-09 Dave Brolley <brolley@redhat.com>
559 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
560 (conditional-media-dual-complex, media-quad-complex): Likewise.
562 2003-09-04 Dave Brolley <brolley@redhat.com>
564 * frv.cpu (register-transfer): Pass in all attributes in on argument.
566 (conditional-register-transfer): Ditto.
567 (cache-preload): Ditto.
568 (floating-point-conversion): Ditto.
569 (floating-point-neg): Ditto.
571 (float-binary-op-s): Ditto.
572 (conditional-float-binary-op): Ditto.
573 (ne-float-binary-op): Ditto.
574 (float-dual-arith): Ditto.
575 (ne-float-dual-arith): Ditto.
577 2003-09-03 Dave Brolley <brolley@redhat.com>
579 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
580 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
582 (A): Removed operand.
583 (A0,A1): New operands replace operand A.
584 (mnop): Now a real insn
585 (mclracc): Removed insn.
586 (mclracc-0, mclracc-1): New insns replace mclracc.
587 (all insns): Use new UNIT attributes.
589 2003-08-21 Nick Clifton <nickc@redhat.com>
591 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
592 and u-media-dual-btoh with output parameter.
593 (cmbtoh): Add profiling hack.
595 2003-08-19 Michael Snyder <msnyder@redhat.com>
597 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
599 2003-06-10 Doug Evans <dje@sebabeach.org>
601 * frv.cpu: Add IDOC attribute.
603 2003-06-06 Andrew Cagney <cagney@redhat.com>
605 Contributed by Red Hat.
606 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
607 Stan Cox, and Frank Ch. Eigler.
608 * iq2000.opc: New file. Written by Ben Elliston, Frank
609 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
610 * iq2000m.cpu: New file. Written by Jeff Johnston.
611 * iq10.cpu: New file. Written by Jeff Johnston.
613 2003-06-05 Nick Clifton <nickc@redhat.com>
615 * frv.cpu (FRintieven): New operand. An even-numbered only
616 version of the FRinti operand.
617 (FRintjeven): Likewise for FRintj.
618 (FRintkeven): Likewise for FRintk.
619 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
620 media-quad-arith-sat-semantics, media-quad-arith-sat,
621 conditional-media-quad-arith-sat, mdunpackh,
622 media-quad-multiply-semantics, media-quad-multiply,
623 conditional-media-quad-multiply, media-quad-complex-i,
624 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
625 conditional-media-quad-multiply-acc, munpackh,
626 media-quad-multiply-cross-acc-semantics, mdpackh,
627 media-quad-multiply-cross-acc, mbtoh-semantics,
628 media-quad-cross-multiply-cross-acc-semantics,
629 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
630 media-quad-cross-multiply-acc-semantics, cmbtoh,
631 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
632 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
633 cmhtob): Use new operands.
634 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
635 (parse_even_register): New function.
637 2003-06-03 Nick Clifton <nickc@redhat.com>
639 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
640 immediate value not unsigned.
642 2003-06-03 Andrew Cagney <cagney@redhat.com>
644 Contributed by Red Hat.
645 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
646 and Eric Christopher.
647 * frv.opc: New file. Written by Catherine Moore, and Dave
649 * simplify.inc: New file. Written by Doug Evans.
651 2003-05-02 Andrew Cagney <cagney@redhat.com>
660 version-control: never