1 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
3 * or1kcommon.cpu (spr-reg-info): Typo fix.
5 2018-03-03 Alan Modra <amodra@gmail.com>
7 * frv.opc: Include opintl.h.
8 (add_next_to_vliw): Use opcodes_error_handler to print error.
9 Standardize error message.
10 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
12 2018-01-13 Nick Clifton <nickc@redhat.com>
16 2017-03-15 Stafford Horne <shorne@gmail.com>
18 * or1kcommon.cpu: Add pc set semantics to also update ppc.
20 2016-10-06 Alan Modra <amodra@gmail.com>
22 * mep.opc (expand_string): Add fall through comment.
24 2016-03-03 Alan Modra <amodra@gmail.com>
26 * fr30.cpu (f-m4): Replace bogus comment with a better guess
27 at what is really going on.
29 2016-03-02 Alan Modra <amodra@gmail.com>
31 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
33 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
35 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
36 a constant to better align disassembler output.
38 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
40 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
42 2014-06-12 Alan Modra <amodra@gmail.com>
44 * or1k.opc: Whitespace fixes.
46 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
48 * or1korbis.cpu (h-atomic-reserve): New hardware.
49 (h-atomic-address): Likewise.
50 (insn-opcode): Add opcodes for LWA and SWA.
51 (atomic-reserve): New operand.
52 (atomic-address): Likewise.
53 (l-lwa, l-swa): New instructions.
54 (l-lbs): Fix typo in comment.
55 (store-insn): Clear atomic reserve on store to atomic-address.
56 Fix register names in fmt field.
58 2014-04-22 Christian Svensson <blue@cmd.nu>
60 * openrisc.cpu: Delete.
61 * openrisc.opc: Delete.
64 * or1kcommon.cpu: New file.
65 * or1korbis.cpu: New file.
66 * or1korfpx.cpu: New file.
68 2013-12-07 Mike Frysinger <vapier@gentoo.org>
70 * epiphany.opc: Remove +x file mode.
72 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
75 * lm32.cpu (Control and status registers): Add CFG2, PSW,
76 TLBVADDR, TLBPADDR and TLBBADVADDR.
78 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
79 Joern Rennecke <joern.rennecke@embecosm.com>
81 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
82 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
83 (testset-insn): Add NO_DIS attribute to t.l.
84 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
85 (move-insns): Add NO-DIS attribute to cmov.l.
86 (op-mmr-movts): Add NO-DIS attribute to movts.l.
87 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
88 (op-rrr): Add NO-DIS attribute to .l.
89 (shift-rrr): Add NO-DIS attribute to .l.
90 (op-shift-rri): Add NO-DIS attribute to i32.l.
91 (bitrl, movtl): Add NO-DIS attribute.
92 (op-iextrrr): Add NO-DIS attribute to .l
93 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
94 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
96 2012-02-27 Alan Modra <amodra@gmail.com>
98 * mt.opc (print_dollarhex): Trim values to 32 bits.
100 2011-12-15 Nick Clifton <nickc@redhat.com>
102 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
105 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
107 * epiphany.opc (parse_branch_addr): Fix type of valuep.
108 Cast value before printing it as a long.
109 (parse_postindex): Fix type of valuep.
111 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
113 * cpu/epiphany.cpu: New file.
114 * cpu/epiphany.opc: New file.
116 2011-08-22 Nick Clifton <nickc@redhat.com>
118 * fr30.cpu: Newly contributed file.
119 * fr30.opc: Likewise.
120 * ip2k.cpu: Likewise.
121 * ip2k.opc: Likewise.
122 * mep-avc.cpu: Likewise.
123 * mep-avc2.cpu: Likewise.
124 * mep-c5.cpu: Likewise.
125 * mep-core.cpu: Likewise.
126 * mep-default.cpu: Likewise.
127 * mep-ext-cop.cpu: Likewise.
128 * mep-fmax.cpu: Likewise.
129 * mep-h1.cpu: Likewise.
130 * mep-ivc2.cpu: Likewise.
131 * mep-rhcop.cpu: Likewise.
132 * mep-sample-ucidsp.cpu: Likewise.
135 * openrisc.cpu: Likewise.
136 * openrisc.opc: Likewise.
137 * xstormy16.cpu: Likewise.
138 * xstormy16.opc: Likewise.
140 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
142 * frv.opc: #undef DEBUG.
144 2010-07-03 DJ Delorie <dj@delorie.com>
146 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
148 2010-02-11 Doug Evans <dje@sebabeach.org>
150 * m32r.cpu (HASH-PREFIX): Delete.
151 (duhpo, dshpo): New pmacros.
152 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
153 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
154 attribute, define with dshpo.
155 (uimm24): Delete HASH-PREFIX attribute.
156 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
157 (print_signed_with_hash_prefix): New function.
158 (print_unsigned_with_hash_prefix): New function.
159 * xc16x.cpu (dowh): New pmacro.
160 (upof16): Define with dowh, specify print handler.
161 (qbit, qlobit, qhibit): Ditto.
163 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
164 (print_with_dot_prefix): New functions.
165 (print_with_pof_prefix, print_with_pag_prefix): New functions.
167 2010-01-24 Doug Evans <dje@sebabeach.org>
169 * frv.cpu (floating-point-conversion): Update call to fp conv op.
170 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
171 conditional-floating-point-conversion, ne-floating-point-conversion,
172 float-parallel-mul-add-double-semantics): Ditto.
174 2010-01-05 Doug Evans <dje@sebabeach.org>
176 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
177 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
179 2010-01-02 Doug Evans <dje@sebabeach.org>
181 * m32c.opc (parse_signed16): Fix typo.
183 2009-12-11 Nick Clifton <nickc@redhat.com>
185 * frv.opc: Fix shadowed variable warnings.
186 * m32c.opc: Fix shadowed variable warnings.
188 2009-11-14 Doug Evans <dje@sebabeach.org>
190 Must use VOID expression in VOID context.
191 * xc16x.cpu (mov4): Fix mode of `sequence'.
192 (mov9, mov10): Ditto.
193 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
194 (callr, callseg, calls, trap, rets, reti): Ditto.
195 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
196 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
197 (exts, exts1, extsr, extsr1, prior): Ditto.
199 2009-10-23 Doug Evans <dje@sebabeach.org>
201 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
202 cgen-ops.h -> cgen/basic-ops.h.
204 2009-09-25 Alan Modra <amodra@bigpond.net.au>
206 * m32r.cpu (stb-plus): Typo fix.
208 2009-09-23 Doug Evans <dje@sebabeach.org>
210 * m32r.cpu (sth-plus): Fix address mode and calculation.
212 (clrpsw): Fix mask calculation.
213 (bset, bclr, btst): Make mode in bit calculation match expression.
215 * xc16x.cpu (rtl-version): Set to 0.8.
216 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
217 make uppercase. Remove unnecessary name-prefix spec.
218 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
219 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
220 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
221 (h-cr): New hardware.
222 (muls): Comment out parts that won't compile, add fixme.
223 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
224 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
225 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
227 2009-07-16 Doug Evans <dje@sebabeach.org>
229 * cpu/simplify.inc (*): One line doc strings don't need \n.
230 (df): Invoke define-full-ifield instead of claiming it's an alias.
232 (dnop): Mark as deprecated.
234 2009-06-22 Alan Modra <amodra@bigpond.net.au>
236 * m32c.opc (parse_lab_5_3): Use correct enum.
238 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
240 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
241 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
242 (media-arith-sat-semantics): Explicitly sign- or zero-extend
243 arguments of "operation" to DI using "mode" and the new pmacros.
245 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
247 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
250 2008-12-23 Jon Beniston <jon@beniston.com>
252 * lm32.cpu: New file.
253 * lm32.opc: New file.
255 2008-01-29 Alan Modra <amodra@bigpond.net.au>
257 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
260 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
262 * cris.cpu (movs, movu): Use result of extension operation when
265 2007-07-04 Nick Clifton <nickc@redhat.com>
267 * cris.cpu: Update copyright notice to refer to GPLv3.
268 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
269 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
270 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
272 * iq2000.cpu: Fix copyright notice to refer to FSF.
274 2007-04-30 Mark Salter <msalter@sadr.localdomain>
276 * frv.cpu (spr-names): Support new coprocessor SPR registers.
278 2007-04-20 Nick Clifton <nickc@redhat.com>
280 * xc16x.cpu: Restore after accidentally overwriting this file with
283 2007-03-29 DJ Delorie <dj@redhat.com>
285 * m32c.cpu (Imm-8-s4n): Fix print hook.
286 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
287 (arith-jnz-imm4-dst-defn): Make relaxable.
288 (arith-jnz16-imm4-dst-defn): Fix encodings.
290 2007-03-20 DJ Delorie <dj@redhat.com>
292 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
294 (src16-16-20-An-relative-*): New.
295 (dst16-*-20-An-relative-*): New.
296 (dst16-16-16sa-*): New
297 (dst16-16-16ar-*): New
298 (dst32-16-16sa-Unprefixed-*): New
299 (jsri): Fix operands.
300 (setzx): Fix encoding.
302 2007-03-08 Alan Modra <amodra@bigpond.net.au>
304 * m32r.opc: Formatting.
306 2006-05-22 Nick Clifton <nickc@redhat.com>
308 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
310 2006-04-10 DJ Delorie <dj@redhat.com>
312 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
313 decides if this function accepts symbolic constants or not.
314 (parse_signed_bitbase): Likewise.
315 (parse_unsigned_bitbase8): Pass the new parameter.
316 (parse_unsigned_bitbase11): Likewise.
317 (parse_unsigned_bitbase16): Likewise.
318 (parse_unsigned_bitbase19): Likewise.
319 (parse_unsigned_bitbase27): Likewise.
320 (parse_signed_bitbase8): Likewise.
321 (parse_signed_bitbase11): Likewise.
322 (parse_signed_bitbase19): Likewise.
324 2006-03-13 DJ Delorie <dj@redhat.com>
326 * m32c.cpu (Bit3-S): New.
328 * m32c.opc (parse_bit3_S): New.
330 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
331 (btst): Add optional :G suffix for MACH32.
333 (pop.w:G): Add optional :G suffix for MACH16.
334 (push.b.imm): Fix syntax.
336 2006-03-10 DJ Delorie <dj@redhat.com>
338 * m32c.cpu (mul.l): New.
341 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
343 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
344 an error message otherwise.
345 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
346 Fix up comments to correctly describe the functions.
348 2006-02-24 DJ Delorie <dj@redhat.com>
350 * m32c.cpu (RL_TYPE): New attribute, with macros.
351 (Lab-8-24): Add RELAX.
352 (unary-insn-defn-g, binary-arith-imm-dst-defn,
353 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
354 (binary-arith-src-dst-defn): Add 2ADDR attribute.
355 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
356 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
358 (jsri16, jsri32): Add 1ADDR attribute.
359 (jsr32.w, jsr32.a): Add JUMP attribute.
361 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
362 Anil Paranjape <anilp1@kpitcummins.com>
363 Shilin Shakti <shilins@kpitcummins.com>
365 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
367 * xc16x.opc: New file containing supporting XC16C routines.
369 2006-02-10 Nick Clifton <nickc@redhat.com>
371 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
373 2006-01-06 DJ Delorie <dj@redhat.com>
375 * m32c.cpu (mov.w:q): Fix mode.
376 (push32.b.imm): Likewise, for the comment.
378 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
380 Second part of ms1 to mt renaming.
381 * mt.cpu (define-arch, define-isa): Set name to mt.
382 (define-mach): Adjust.
383 * mt.opc (CGEN_ASM_HASH): Update.
384 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
385 (parse_loopsize, parse_imm16): Adjust.
387 2005-12-13 DJ Delorie <dj@redhat.com>
389 * m32c.cpu (jsri): Fix order so register names aren't treated as
391 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
392 indexwd, indexws): Fix encodings.
394 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
396 * mt.cpu: Rename from ms1.cpu.
397 * mt.opc: Rename from ms1.opc.
399 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
401 * cris.cpu (simplecris-common-writable-specregs)
402 (simplecris-common-readable-specregs): Split from
403 simplecris-common-specregs. All users changed.
404 (cris-implemented-writable-specregs-v0)
405 (cris-implemented-readable-specregs-v0): Similar from
406 cris-implemented-specregs-v0.
407 (cris-implemented-writable-specregs-v3)
408 (cris-implemented-readable-specregs-v3)
409 (cris-implemented-writable-specregs-v8)
410 (cris-implemented-readable-specregs-v8)
411 (cris-implemented-writable-specregs-v10)
412 (cris-implemented-readable-specregs-v10)
413 (cris-implemented-writable-specregs-v32)
414 (cris-implemented-readable-specregs-v32): Similar.
415 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
416 insns and specializations.
418 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
421 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
423 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
424 f-cb2incr, f-rc3): New fields.
425 (LOOP): New instruction.
426 (JAL-HAZARD): New hazard.
427 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
429 (mul, muli, dbnz, iflush): Enable for ms2
430 (jal, reti): Has JAL-HAZARD.
431 (ldctxt, ldfb, stfb): Only ms1.
432 (fbcb): Only ms1,ms1-003.
433 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
434 fbcbincrs, mfbcbincrs): Enable for ms2.
435 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
436 * ms1.opc (parse_loopsize): New.
437 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
440 2005-10-28 Dave Brolley <brolley@redhat.com>
442 Contribute the following change:
443 2003-09-24 Dave Brolley <brolley@redhat.com>
445 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
446 CGEN_ATTR_VALUE_TYPE.
447 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
448 Use cgen_bitset_intersect_p.
450 2005-10-27 DJ Delorie <dj@redhat.com>
452 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
453 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
454 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
455 imm operand is needed.
456 (adjnz, sbjnz): Pass the right operands.
457 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
458 unary-insn): Add -g variants for opcodes that need to support :G.
459 (not.BW:G, push.BW:G): Call it.
460 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
461 stzx16-imm8-imm8-abs16): Fix operand typos.
462 * m32c.opc (m32c_asm_hash): Support bnCND.
463 (parse_signed4n, print_signed4n): New.
465 2005-10-26 DJ Delorie <dj@redhat.com>
467 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
468 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
469 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
471 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
472 (mov.BW:S r0,r1): Fix typo r1l->r1.
473 (tst): Allow :G suffix.
474 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
476 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
478 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
480 2005-10-25 DJ Delorie <dj@redhat.com>
482 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
483 making one a macro of the other.
485 2005-10-21 DJ Delorie <dj@redhat.com>
487 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
488 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
489 indexld, indexls): .w variants have `1' bit.
490 (rot32.b): QI, not SI.
491 (rot32.w): HI, not SI.
492 (xchg16): HI for .w variant.
494 2005-10-19 Nick Clifton <nickc@redhat.com>
496 * m32r.opc (parse_slo16): Fix bad application of previous patch.
498 2005-10-18 Andreas Schwab <schwab@suse.de>
500 * m32r.opc (parse_slo16): Better version of previous patch.
502 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
504 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
507 2005-07-25 DJ Delorie <dj@redhat.com>
509 * m32c.opc (parse_unsigned8): Add %dsp8().
510 (parse_signed8): Add %hi8().
511 (parse_unsigned16): Add %dsp16().
512 (parse_signed16): Add %lo16() and %hi16().
513 (parse_lab_5_3): Make valuep a bfd_vma *.
515 2005-07-18 Nick Clifton <nickc@redhat.com>
517 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
519 (f-lab32-jmp-s): Fix insertion sequence.
520 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
521 (Dsp-40-s8): Make parameter be signed.
522 (Dsp-40-s16): Likewise.
523 (Dsp-48-s8): Likewise.
524 (Dsp-48-s16): Likewise.
525 (Imm-13-u3): Likewise. (Despite its name!)
526 (BitBase16-16-s8): Make the parameter be unsigned.
527 (BitBase16-8-u11-S): Likewise.
528 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
529 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
532 * m32c.opc: Fix formatting.
533 Use safe-ctype.h instead of ctype.h
534 Move duplicated code sequences into a macro.
535 Fix compile time warnings about signedness mismatches.
537 (parse_lab_5_3): New parser function.
539 2005-07-16 Jim Blandy <jimb@redhat.com>
541 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
542 to represent isa sets.
544 2005-07-15 Jim Blandy <jimb@redhat.com>
546 * m32c.cpu, m32c.opc: Fix copyright.
548 2005-07-14 Jim Blandy <jimb@redhat.com>
550 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
552 2005-07-14 Alan Modra <amodra@bigpond.net.au>
554 * ms1.opc (print_dollarhex): Correct format string.
556 2005-07-06 Alan Modra <amodra@bigpond.net.au>
558 * iq2000.cpu: Include from binutils cpu dir.
560 2005-07-05 Nick Clifton <nickc@redhat.com>
562 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
563 unsigned in order to avoid compile time warnings about sign
566 * ms1.opc (parse_*): Likewise.
567 (parse_imm16): Use a "void *" as it is passed both signed and
570 2005-07-01 Nick Clifton <nickc@redhat.com>
572 * frv.opc: Update to ISO C90 function declaration style.
573 * iq2000.opc: Likewise.
574 * m32r.opc: Likewise.
577 2005-06-15 Dave Brolley <brolley@redhat.com>
579 Contributed by Red Hat.
580 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
581 * ms1.opc: New file. Written by Stan Cox.
583 2005-05-10 Nick Clifton <nickc@redhat.com>
585 * Update the address and phone number of the FSF organization in
586 the GPL notices in the following files:
587 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
588 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
589 sh64-media.cpu, simplify.inc
591 2005-02-24 Alan Modra <amodra@bigpond.net.au>
593 * frv.opc (parse_A): Warning fix.
595 2005-02-23 Nick Clifton <nickc@redhat.com>
597 * frv.opc: Fixed compile time warnings about differing signed'ness
598 of pointers passed to functions.
599 * m32r.opc: Likewise.
601 2005-02-11 Nick Clifton <nickc@redhat.com>
603 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
604 'bfd_vma *' in order avoid compile time warning message.
606 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
608 * cris.cpu (mstep): Add missing insn.
610 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
612 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
613 * frv.cpu: Add support for TLS annotations in loads and calll.
614 * frv.opc (parse_symbolic_address): New.
615 (parse_ldd_annotation): New.
616 (parse_call_annotation): New.
617 (parse_ld_annotation): New.
618 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
619 Introduce TLS relocations.
620 (parse_d12, parse_s12, parse_u12): Likewise.
621 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
622 (parse_call_label, print_at): New.
624 2004-12-21 Mikael Starvik <starvik@axis.com>
626 * cris.cpu (cris-set-mem): Correct integral write semantics.
628 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
630 * cris.cpu: New file.
632 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
634 * iq2000.cpu: Added quotes around macro arguments so that they
635 will work with newer versions of guile.
637 2004-10-27 Nick Clifton <nickc@redhat.com>
639 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
640 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
642 * iq2000.cpu (dnop index): Rename to _index to avoid complications
645 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
647 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
649 2004-05-15 Nick Clifton <nickc@redhat.com>
651 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
653 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
655 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
657 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
659 * frv.cpu (define-arch frv): Add fr450 mach.
660 (define-mach fr450): New.
661 (define-model fr450): New. Add profile units to every fr450 insn.
662 (define-attr UNIT): Add MDCUTSSI.
663 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
664 (define-attr AUDIO): New boolean.
665 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
666 (f-LRA-null, f-TLBPR-null): New fields.
667 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
668 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
669 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
670 (LRA-null, TLBPR-null): New macros.
671 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
672 (load-real-address): New macro.
673 (lrai, lrad, tlbpr): New instructions.
674 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
675 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
676 (mdcutssi): Change UNIT attribute to MDCUTSSI.
677 (media-low-clear-semantics, media-scope-limit-semantics)
678 (media-quad-limit, media-quad-shift): New macros.
679 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
680 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
681 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
682 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
683 (fr450_unit_mapping): New array.
684 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
685 for new MDCUTSSI unit.
686 (fr450_check_insn_major_constraints): New function.
687 (check_insn_major_constraints): Use it.
689 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
691 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
692 (scutss): Change unit to I0.
693 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
694 (mqsaths): Fix FR400-MAJOR categorization.
695 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
696 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
697 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
700 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
702 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
703 (rstb, rsth, rst, rstd, rstq): Delete.
704 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
706 2004-02-23 Nick Clifton <nickc@redhat.com>
708 * Apply these patches from Renesas:
710 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
712 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
713 disassembling codes for 0x*2 addresses.
715 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
717 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
719 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
721 * cpu/m32r.cpu : Add new model m32r2.
722 Add new instructions.
723 Replace occurrances of 'Mitsubishi' with 'Renesas'.
724 Changed PIPE attr of push from O to OS.
725 Care for Little-endian of M32R.
726 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
727 Care for Little-endian of M32R.
728 (parse_slo16): signed extension for value.
730 2004-02-20 Andrew Cagney <cagney@redhat.com>
732 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
733 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
735 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
736 written by Ben Elliston.
738 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
740 * frv.cpu (UNIT): Add IACC.
741 (iacc-multiply-r-r): Use it.
742 * frv.opc (fr400_unit_mapping): Add entry for IACC.
743 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
745 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
747 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
748 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
749 cut&paste errors in shifting/truncating numerical operands.
750 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
751 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
752 (parse_uslo16): Likewise.
753 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
754 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
755 (parse_s12): Likewise.
756 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
757 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
758 (parse_uslo16): Likewise.
759 (parse_uhi16): Parse gothi and gotfuncdeschi.
760 (parse_d12): Parse got12 and gotfuncdesc12.
761 (parse_s12): Likewise.
763 2003-10-10 Dave Brolley <brolley@redhat.com>
765 * frv.cpu (dnpmop): New p-macro.
766 (GRdoublek): Use dnpmop.
767 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
768 (store-double-r-r): Use (.sym regtype doublek).
769 (r-store-double): Ditto.
770 (store-double-r-r-u): Ditto.
771 (conditional-store-double): Ditto.
772 (conditional-store-double-u): Ditto.
773 (store-double-r-simm): Ditto.
774 (fmovs): Assign to UNIT FMALL.
776 2003-10-06 Dave Brolley <brolley@redhat.com>
778 * frv.cpu, frv.opc: Add support for fr550.
780 2003-09-24 Dave Brolley <brolley@redhat.com>
782 * frv.cpu (u-commit): New modelling unit for fr500.
783 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
784 (commit-r): Use u-commit model for fr500.
786 (conditional-float-binary-op): Take profiling data as an argument.
788 (ne-float-binary-op): Ditto.
790 2003-09-19 Michael Snyder <msnyder@redhat.com>
792 * frv.cpu (nldqi): Delete unimplemented instruction.
794 2003-09-12 Dave Brolley <brolley@redhat.com>
796 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
797 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
798 frv_ref_SI to get input register referenced for profiling.
799 (clear-ne-flag-all): Pass insn profiling in as an argument.
800 (clrgr,clrfr,clrga,clrfa): Add profiling information.
802 2003-09-11 Michael Snyder <msnyder@redhat.com>
804 * frv.cpu: Typographical corrections.
806 2003-09-09 Dave Brolley <brolley@redhat.com>
808 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
809 (conditional-media-dual-complex, media-quad-complex): Likewise.
811 2003-09-04 Dave Brolley <brolley@redhat.com>
813 * frv.cpu (register-transfer): Pass in all attributes in on argument.
815 (conditional-register-transfer): Ditto.
816 (cache-preload): Ditto.
817 (floating-point-conversion): Ditto.
818 (floating-point-neg): Ditto.
820 (float-binary-op-s): Ditto.
821 (conditional-float-binary-op): Ditto.
822 (ne-float-binary-op): Ditto.
823 (float-dual-arith): Ditto.
824 (ne-float-dual-arith): Ditto.
826 2003-09-03 Dave Brolley <brolley@redhat.com>
828 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
829 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
831 (A): Removed operand.
832 (A0,A1): New operands replace operand A.
833 (mnop): Now a real insn
834 (mclracc): Removed insn.
835 (mclracc-0, mclracc-1): New insns replace mclracc.
836 (all insns): Use new UNIT attributes.
838 2003-08-21 Nick Clifton <nickc@redhat.com>
840 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
841 and u-media-dual-btoh with output parameter.
842 (cmbtoh): Add profiling hack.
844 2003-08-19 Michael Snyder <msnyder@redhat.com>
846 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
848 2003-06-10 Doug Evans <dje@sebabeach.org>
850 * frv.cpu: Add IDOC attribute.
852 2003-06-06 Andrew Cagney <cagney@redhat.com>
854 Contributed by Red Hat.
855 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
856 Stan Cox, and Frank Ch. Eigler.
857 * iq2000.opc: New file. Written by Ben Elliston, Frank
858 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
859 * iq2000m.cpu: New file. Written by Jeff Johnston.
860 * iq10.cpu: New file. Written by Jeff Johnston.
862 2003-06-05 Nick Clifton <nickc@redhat.com>
864 * frv.cpu (FRintieven): New operand. An even-numbered only
865 version of the FRinti operand.
866 (FRintjeven): Likewise for FRintj.
867 (FRintkeven): Likewise for FRintk.
868 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
869 media-quad-arith-sat-semantics, media-quad-arith-sat,
870 conditional-media-quad-arith-sat, mdunpackh,
871 media-quad-multiply-semantics, media-quad-multiply,
872 conditional-media-quad-multiply, media-quad-complex-i,
873 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
874 conditional-media-quad-multiply-acc, munpackh,
875 media-quad-multiply-cross-acc-semantics, mdpackh,
876 media-quad-multiply-cross-acc, mbtoh-semantics,
877 media-quad-cross-multiply-cross-acc-semantics,
878 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
879 media-quad-cross-multiply-acc-semantics, cmbtoh,
880 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
881 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
882 cmhtob): Use new operands.
883 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
884 (parse_even_register): New function.
886 2003-06-03 Nick Clifton <nickc@redhat.com>
888 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
889 immediate value not unsigned.
891 2003-06-03 Andrew Cagney <cagney@redhat.com>
893 Contributed by Red Hat.
894 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
895 and Eric Christopher.
896 * frv.opc: New file. Written by Catherine Moore, and Dave
898 * simplify.inc: New file. Written by Doug Evans.
900 2003-05-02 Andrew Cagney <cagney@redhat.com>
905 Copyright (C) 2003-2012 Free Software Foundation, Inc.
907 Copying and distribution of this file, with or without modification,
908 are permitted in any medium without royalty provided the copyright
909 notice and this notice are preserved.
915 version-control: never