cpu/ChangeLog

   1 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
   2
   3         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
   4         (neg and neg32) use OP_SRC_K even if they operate only in
   5         registers.
   6
   7 2020-01-18  Nick Clifton  <nickc@redhat.com>
   8
   9         Binutils 2.34 branch created.
  10
  11 2020-01-13  Alan Modra  <amodra@gmail.com>
  12
  13         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
  14         left shift signed values.
  15
  16 2020-01-06  Alan Modra  <amodra@gmail.com>
  17
  18         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
  19         bits before shifting rather than masking after shifting.
  20         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
  21         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
  22         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
  23         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
  24
  25 2020-01-04  Alan Modra  <amodra@gmail.com>
  26
  27         * m32r.cpu (f-disp8): Avoid left shift of negative values.
  28         (f-disp16, f-disp24): Likewise.
  29
  30 2019-12-23  Alan Modra  <amodra@gmail.com>
  31
  32         * iq2000.cpu (f-offset): Avoid left shift of negative values.
  33
  34 2019-12-20  Alan Modra  <amodra@gmail.com>
  35
  36         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
  37
  38 2019-12-17  Alan Modra  <amodra@gmail.com>
  39
  40         * bpf.cpu (f-imm64): Avoid signed overflow.
  41
  42 2019-12-16  Alan Modra  <amodra@gmail.com>
  43
  44         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
  45
  46 2019-12-11  Alan Modra  <amodra@gmail.com>
  47
  48         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
  49         * lm32.cpu (f-branch, f-vall): Likewise.
  50         * m32.cpu (f-lab-8-16): Likewise.
  51
  52 2019-12-11  Alan Modra  <amodra@gmail.com>
  53
  54         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
  55         shift left to avoid UB on left shift of negative values.
  56
  57 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
  58
  59         * bpf.cpu: Fix comment describing the 128-bit instruction format.
  60
  61 2019-09-09  Phil Blundell  <pb@pbcl.net>
  62
  63         binutils 2.33 branch created.
  64
  65 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
  66
  67         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
  68         %a and %ctx.
  69
  70 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
  71
  72         * bpf.cpu (dlabs): New pmacro.
  73         (dlind): Likewise.
  74
  75 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
  76
  77         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
  78         explicit 'dst' argument.
  79
  80 2019-06-13  Stafford Horne  <shorne@gmail.com>
  81
  82         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
  83
  84 2019-06-13  Stafford Horne  <shorne@gmail.com>
  85
  86         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
  87         (l-adrp): Improve comment.
  88
  89 2019-06-13  Stafford Horne  <shorne@gmail.com>
  90
  91         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
  92         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
  93         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
  94         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
  95         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
  96         float-setflag-unordered-symantics): New pmacro for instruction
  97         symantics.
  98         (float-setflag-insn): Update to use float-setflag-insn-base.
  99         (float-setflag-unordered-insn): New pmacro for generating instructions.
 100
 101 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 102             Stafford Horne  <shorne@gmail.com>
 103
 104         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 105         (ORFPX-MACHS): Removed pmacro.
 106         * or1k.opc (or1k_cgen_insn_supported): New function.
 107         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 108         (parse_regpair, print_regpair): New functions.
 109         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 110         and add comments.
 111         (h-fdr): Update comment to indicate or64.
 112         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 113         (h-fd32r): New hardware for 64-bit fpu registers.
 114         (h-i64r): New hardware for 64-bit int registers.
 115         * or1korbis.cpu (f-resv-8-1): New field.
 116         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 117         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 118         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 119         (h-roff1): New hardware.
 120         (double-field-and-ops mnemonic): New pmacro to generate operations
 121         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 122         (float-regreg-insn): Update single precision generator to MACH
 123         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 124         (float-setflag-insn): Update single precision generator to MACH
 125         ORFPX32-MACHS.  Fix double instructions from single to double
 126         precision.  Add generator for or32 64-bit instructions.
 127         (float-cust-insn cust-num): Update single precision generator to MACH
 128         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 129         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 130         ORFPX32-MACHS.
 131         (lf-rem-d): Fix operation from mod to rem.
 132         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 133         (lf-itof-d): Fix operands from single to double.
 134         (lf-ftoi-d): Update operand mode from DI to WI.
 135
 136 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 137
 138         * bpf.cpu: New file.
 139         * bpf.opc: Likewise.
 140
 141 2018-06-24  Nick Clifton  <nickc@redhat.com>
 142
 143         2.32 branch created.
 144
 145 2018-10-05  Richard Henderson  <rth@twiddle.net>
 146             Stafford Horne  <shorne@gmail.com>
 147
 148         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 149         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 150         (l-mul): Fix overflow support and indentation.
 151         (l-mulu): Fix overflow support and indentation.
 152         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 153         (l-div); Remove incorrect carry behavior.
 154         (l-divu): Fix carry and overflow behavior.
 155         (l-mac): Add overflow support.
 156         (l-msb, l-msbu): Add carry and overflow support.
 157
 158 2018-10-05  Richard Henderson  <rth@twiddle.net>
 159
 160         * or1k.opc (parse_disp26): Add support for plta() relocations.
 161         (parse_disp21): New function.
 162         (or1k_rclass): New enum.
 163         (or1k_rtype): New enum.
 164         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 165         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 166         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 167         * or1korbis.cpu (f-disp26): Don't assume SI.
 168         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 169         (insn-opcode): Add ADRP.
 170         (l-adrp): New instruction.
 171
 172 2018-10-05  Richard Henderson  <rth@twiddle.net>
 173
 174         * or1k.opc: Add RTYPE_ enum.
 175         (INVALID_STORE_RELOC): New string.
 176         (or1k_imm16_relocs): New array array.
 177         (parse_reloc): New static function that just does the parsing.
 178         (parse_imm16): New static function for generic parsing.
 179         (parse_simm16): Change to just call parse_imm16.
 180         (parse_simm16_split): New function.
 181         (parse_uimm16): Change to call parse_imm16.
 182         (parse_uimm16_split): New function.
 183         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 184         (uimm16-split): Change to use new uimm16_split.
 185
 186 2018-07-24  Alan Modra  <amodra@gmail.com>
 187
 188         PR 23430
 189         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 190
 191 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 192
 193         * or1kcommon.cpu (spr-reg-info): Typo fix.
 194
 195 2018-03-03  Alan Modra  <amodra@gmail.com>
 196
 197         * frv.opc: Include opintl.h.
 198         (add_next_to_vliw): Use opcodes_error_handler to print error.
 199         Standardize error message.
 200         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 201
 202 2018-01-13  Nick Clifton  <nickc@redhat.com>
 203
 204         2.30 branch created.
 205
 206 2017-03-15  Stafford Horne  <shorne@gmail.com>
 207
 208         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 209
 210 2016-10-06  Alan Modra  <amodra@gmail.com>
 211
 212         * mep.opc (expand_string): Add fall through comment.
 213
 214 2016-03-03  Alan Modra  <amodra@gmail.com>
 215
 216         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 217         at what is really going on.
 218
 219 2016-03-02  Alan Modra  <amodra@gmail.com>
 220
 221         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 222
 223 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 224
 225         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 226         a constant to better align disassembler output.
 227
 228 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 229
 230         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 231
 232 2014-06-12  Alan Modra  <amodra@gmail.com>
 233
 234         * or1k.opc: Whitespace fixes.
 235
 236 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 237
 238         * or1korbis.cpu (h-atomic-reserve): New hardware.
 239         (h-atomic-address): Likewise.
 240         (insn-opcode): Add opcodes for LWA and SWA.
 241         (atomic-reserve): New operand.
 242         (atomic-address): Likewise.
 243         (l-lwa, l-swa): New instructions.
 244         (l-lbs): Fix typo in comment.
 245         (store-insn): Clear atomic reserve on store to atomic-address.
 246         Fix register names in fmt field.
 247
 248 2014-04-22  Christian Svensson  <blue@cmd.nu>
 249
 250         * openrisc.cpu: Delete.
 251         * openrisc.opc: Delete.
 252         * or1k.cpu: New file.
 253         * or1k.opc: New file.
 254         * or1kcommon.cpu: New file.
 255         * or1korbis.cpu: New file.
 256         * or1korfpx.cpu: New file.
 257
 258 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 259
 260         * epiphany.opc: Remove +x file mode.
 261
 262 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 263
 264         PR binutils/15241
 265         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 266         TLBVADDR, TLBPADDR and TLBBADVADDR.
 267
 268 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 269             Joern Rennecke  <joern.rennecke@embecosm.com>
 270
 271         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 272         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 273         (testset-insn): Add NO_DIS attribute to t.l.
 274         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 275         (move-insns): Add NO-DIS attribute to cmov.l.
 276         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 277         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 278         (op-rrr): Add NO-DIS attribute to .l.
 279         (shift-rrr): Add NO-DIS attribute to .l.
 280         (op-shift-rri): Add NO-DIS attribute to i32.l.
 281         (bitrl, movtl): Add NO-DIS attribute.
 282         (op-iextrrr): Add NO-DIS attribute to .l
 283         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 284         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 285
 286 2012-02-27  Alan Modra  <amodra@gmail.com>
 287
 288         * mt.opc (print_dollarhex): Trim values to 32 bits.
 289
 290 2011-12-15  Nick Clifton  <nickc@redhat.com>
 291
 292         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 293         hosts.
 294
 295 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 296
 297         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 298         Cast value before printing it as a long.
 299         (parse_postindex): Fix type of valuep.
 300
 301 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 302
 303         * cpu/epiphany.cpu: New file.
 304         * cpu/epiphany.opc: New file.
 305
 306 2011-08-22  Nick Clifton  <nickc@redhat.com>
 307
 308         * fr30.cpu: Newly contributed file.
 309         * fr30.opc: Likewise.
 310         * ip2k.cpu: Likewise.
 311         * ip2k.opc: Likewise.
 312         * mep-avc.cpu: Likewise.
 313         * mep-avc2.cpu: Likewise.
 314         * mep-c5.cpu: Likewise.
 315         * mep-core.cpu: Likewise.
 316         * mep-default.cpu: Likewise.
 317         * mep-ext-cop.cpu: Likewise.
 318         * mep-fmax.cpu: Likewise.
 319         * mep-h1.cpu: Likewise.
 320         * mep-ivc2.cpu: Likewise.
 321         * mep-rhcop.cpu: Likewise.
 322         * mep-sample-ucidsp.cpu: Likewise.
 323         * mep.cpu: Likewise.
 324         * mep.opc: Likewise.
 325         * openrisc.cpu: Likewise.
 326         * openrisc.opc: Likewise.
 327         * xstormy16.cpu: Likewise.
 328         * xstormy16.opc: Likewise.
 329
 330 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 331
 332         * frv.opc: #undef DEBUG.
 333
 334 2010-07-03  DJ Delorie  <dj@delorie.com>
 335
 336         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 337
 338 2010-02-11  Doug Evans  <dje@sebabeach.org>
 339
 340         * m32r.cpu (HASH-PREFIX): Delete.
 341         (duhpo, dshpo): New pmacros.
 342         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 343         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 344         attribute, define with dshpo.
 345         (uimm24): Delete HASH-PREFIX attribute.
 346         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 347         (print_signed_with_hash_prefix): New function.
 348         (print_unsigned_with_hash_prefix): New function.
 349         * xc16x.cpu (dowh): New pmacro.
 350         (upof16): Define with dowh, specify print handler.
 351         (qbit, qlobit, qhibit): Ditto.
 352         (upag16): Ditto.
 353         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 354         (print_with_dot_prefix): New functions.
 355         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 356
 357 2010-01-24  Doug Evans  <dje@sebabeach.org>
 358
 359         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 360         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 361         conditional-floating-point-conversion, ne-floating-point-conversion,
 362         float-parallel-mul-add-double-semantics): Ditto.
 363
 364 2010-01-05  Doug Evans  <dje@sebabeach.org>
 365
 366         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 367         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 368
 369 2010-01-02  Doug Evans  <dje@sebabeach.org>
 370
 371         * m32c.opc (parse_signed16): Fix typo.
 372
 373 2009-12-11  Nick Clifton  <nickc@redhat.com>
 374
 375         * frv.opc: Fix shadowed variable warnings.
 376         * m32c.opc: Fix shadowed variable warnings.
 377
 378 2009-11-14  Doug Evans  <dje@sebabeach.org>
 379
 380         Must use VOID expression in VOID context.
 381         * xc16x.cpu (mov4): Fix mode of `sequence'.
 382         (mov9, mov10): Ditto.
 383         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 384         (callr, callseg, calls, trap, rets, reti): Ditto.
 385         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 386         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 387         (exts, exts1, extsr, extsr1, prior): Ditto.
 388
 389 2009-10-23  Doug Evans  <dje@sebabeach.org>
 390
 391         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 392         cgen-ops.h -> cgen/basic-ops.h.
 393
 394 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 395
 396         * m32r.cpu (stb-plus): Typo fix.
 397
 398 2009-09-23  Doug Evans  <dje@sebabeach.org>
 399
 400         * m32r.cpu (sth-plus): Fix address mode and calculation.
 401         (stb-plus): Ditto.
 402         (clrpsw): Fix mask calculation.
 403         (bset, bclr, btst): Make mode in bit calculation match expression.
 404
 405         * xc16x.cpu (rtl-version): Set to 0.8.
 406         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 407         make uppercase.  Remove unnecessary name-prefix spec.
 408         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 409         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 410         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 411         (h-cr): New hardware.
 412         (muls): Comment out parts that won't compile, add fixme.
 413         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 414         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 415         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 416
 417 2009-07-16  Doug Evans  <dje@sebabeach.org>
 418
 419         * cpu/simplify.inc (*): One line doc strings don't need \n.
 420         (df): Invoke define-full-ifield instead of claiming it's an alias.
 421         (dno): Define.
 422         (dnop): Mark as deprecated.
 423
 424 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 425
 426         * m32c.opc (parse_lab_5_3): Use correct enum.
 427
 428 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 429
 430         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 431         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 432         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 433         arguments of "operation" to DI using "mode" and the new pmacros.
 434
 435 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 436
 437         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 438         of number 2, PID.
 439
 440 2008-12-23  Jon Beniston <jon@beniston.com>
 441
 442         * lm32.cpu: New file.
 443         * lm32.opc: New file.
 444
 445 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 446
 447         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 448         to source.
 449
 450 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 451
 452         * cris.cpu (movs, movu): Use result of extension operation when
 453         updating flags.
 454
 455 2007-07-04  Nick Clifton  <nickc@redhat.com>
 456
 457         * cris.cpu: Update copyright notice to refer to GPLv3.
 458         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 459         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 460         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 461         xc16x.opc: Likewise.
 462         * iq2000.cpu: Fix copyright notice to refer to FSF.
 463
 464 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 465
 466         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 467
 468 2007-04-20  Nick Clifton  <nickc@redhat.com>
 469
 470         * xc16x.cpu: Restore after accidentally overwriting this file with
 471         xc16x.opc.
 472
 473 2007-03-29  DJ Delorie  <dj@redhat.com>
 474
 475         * m32c.cpu (Imm-8-s4n): Fix print hook.
 476         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 477         (arith-jnz-imm4-dst-defn): Make relaxable.
 478         (arith-jnz16-imm4-dst-defn): Fix encodings.
 479
 480 2007-03-20  DJ Delorie  <dj@redhat.com>
 481
 482         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 483         mem20): New.
 484         (src16-16-20-An-relative-*): New.
 485         (dst16-*-20-An-relative-*): New.
 486         (dst16-16-16sa-*): New
 487         (dst16-16-16ar-*): New
 488         (dst32-16-16sa-Unprefixed-*): New
 489         (jsri): Fix operands.
 490         (setzx): Fix encoding.
 491
 492 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 493
 494         * m32r.opc: Formatting.
 495
 496 2006-05-22  Nick Clifton  <nickc@redhat.com>
 497
 498         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 499
 500 2006-04-10  DJ Delorie  <dj@redhat.com>
 501
 502         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 503         decides if this function accepts symbolic constants or not.
 504         (parse_signed_bitbase): Likewise.
 505         (parse_unsigned_bitbase8): Pass the new parameter.
 506         (parse_unsigned_bitbase11): Likewise.
 507         (parse_unsigned_bitbase16): Likewise.
 508         (parse_unsigned_bitbase19): Likewise.
 509         (parse_unsigned_bitbase27): Likewise.
 510         (parse_signed_bitbase8): Likewise.
 511         (parse_signed_bitbase11): Likewise.
 512         (parse_signed_bitbase19): Likewise.
 513
 514 2006-03-13  DJ Delorie  <dj@redhat.com>
 515
 516         * m32c.cpu (Bit3-S): New.
 517         (btst:s): New.
 518         * m32c.opc (parse_bit3_S): New.
 519
 520         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 521         (btst): Add optional :G suffix for MACH32.
 522         (or.b:S): New.
 523         (pop.w:G): Add optional :G suffix for MACH16.
 524         (push.b.imm): Fix syntax.
 525
 526 2006-03-10  DJ Delorie  <dj@redhat.com>
 527
 528         * m32c.cpu (mul.l): New.
 529         (mulu.l): New.
 530
 531 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 532
 533         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 534         an error message otherwise.
 535         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 536         Fix up comments to correctly describe the functions.
 537
 538 2006-02-24  DJ Delorie  <dj@redhat.com>
 539
 540         * m32c.cpu (RL_TYPE): New attribute, with macros.
 541         (Lab-8-24): Add RELAX.
 542         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 543         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 544         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 545         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 546         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 547         attribute.
 548         (jsri16, jsri32): Add 1ADDR attribute.
 549         (jsr32.w, jsr32.a): Add JUMP attribute.
 550
 551 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 552             Anil Paranjape   <anilp1@kpitcummins.com>
 553             Shilin Shakti    <shilins@kpitcummins.com>
 554
 555         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 556         description.
 557         * xc16x.opc: New file containing supporting XC16C routines.
 558
 559 2006-02-10  Nick Clifton  <nickc@redhat.com>
 560
 561         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 562
 563 2006-01-06  DJ Delorie  <dj@redhat.com>
 564
 565         * m32c.cpu (mov.w:q): Fix mode.
 566         (push32.b.imm): Likewise, for the comment.
 567
 568 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 569
 570         Second part of ms1 to mt renaming.
 571         * mt.cpu (define-arch, define-isa): Set name to mt.
 572         (define-mach): Adjust.
 573         * mt.opc (CGEN_ASM_HASH): Update.
 574         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 575         (parse_loopsize, parse_imm16): Adjust.
 576
 577 2005-12-13  DJ Delorie  <dj@redhat.com>
 578
 579         * m32c.cpu (jsri): Fix order so register names aren't treated as
 580         symbols.
 581         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 582         indexwd, indexws): Fix encodings.
 583
 584 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 585
 586         * mt.cpu: Rename from ms1.cpu.
 587         * mt.opc: Rename from ms1.opc.
 588
 589 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 590
 591         * cris.cpu (simplecris-common-writable-specregs)
 592         (simplecris-common-readable-specregs): Split from
 593         simplecris-common-specregs.  All users changed.
 594         (cris-implemented-writable-specregs-v0)
 595         (cris-implemented-readable-specregs-v0): Similar from
 596         cris-implemented-specregs-v0.
 597         (cris-implemented-writable-specregs-v3)
 598         (cris-implemented-readable-specregs-v3)
 599         (cris-implemented-writable-specregs-v8)
 600         (cris-implemented-readable-specregs-v8)
 601         (cris-implemented-writable-specregs-v10)
 602         (cris-implemented-readable-specregs-v10)
 603         (cris-implemented-writable-specregs-v32)
 604         (cris-implemented-readable-specregs-v32): Similar.
 605         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 606         insns and specializations.
 607
 608 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 609
 610         Add ms2
 611         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 612         model.
 613         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 614         f-cb2incr, f-rc3): New fields.
 615         (LOOP): New instruction.
 616         (JAL-HAZARD): New hazard.
 617         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 618         New operands.
 619         (mul, muli, dbnz, iflush): Enable for ms2
 620         (jal, reti): Has JAL-HAZARD.
 621         (ldctxt, ldfb, stfb): Only ms1.
 622         (fbcb): Only ms1,ms1-003.
 623         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 624         fbcbincrs, mfbcbincrs): Enable for ms2.
 625         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 626         * ms1.opc (parse_loopsize): New.
 627         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 628         (print_pcrel): New.
 629
 630 2005-10-28  Dave Brolley  <brolley@redhat.com>
 631
 632         Contribute the following change:
 633         2003-09-24  Dave Brolley  <brolley@redhat.com>
 634
 635         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 636         CGEN_ATTR_VALUE_TYPE.
 637         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 638         Use cgen_bitset_intersect_p.
 639
 640 2005-10-27  DJ Delorie  <dj@redhat.com>
 641
 642         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 643         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 644         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 645         imm operand is needed.
 646         (adjnz, sbjnz): Pass the right operands.
 647         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 648         unary-insn): Add -g variants for opcodes that need to support :G.
 649         (not.BW:G, push.BW:G): Call it.
 650         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 651         stzx16-imm8-imm8-abs16): Fix operand typos.
 652         * m32c.opc (m32c_asm_hash): Support bnCND.
 653         (parse_signed4n, print_signed4n): New.
 654
 655 2005-10-26  DJ Delorie  <dj@redhat.com>
 656
 657         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 658         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 659         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 660         dsp8[sp] is signed.
 661         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 662         (mov.BW:S r0,r1): Fix typo r1l->r1.
 663         (tst): Allow :G suffix.
 664         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 665
 666 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 667
 668         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 669
 670 2005-10-25  DJ Delorie  <dj@redhat.com>
 671
 672         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 673         making one a macro of the other.
 674
 675 2005-10-21  DJ Delorie  <dj@redhat.com>
 676
 677         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 678         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 679         indexld, indexls): .w variants have `1' bit.
 680         (rot32.b): QI, not SI.
 681         (rot32.w): HI, not SI.
 682         (xchg16): HI for .w variant.
 683
 684 2005-10-19  Nick Clifton  <nickc@redhat.com>
 685
 686         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 687
 688 2005-10-18  Andreas Schwab  <schwab@suse.de>
 689
 690         * m32r.opc (parse_slo16): Better version of previous patch.
 691
 692 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 693
 694         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 695         size.
 696
 697 2005-07-25  DJ Delorie  <dj@redhat.com>
 698
 699         * m32c.opc (parse_unsigned8): Add %dsp8().
 700         (parse_signed8): Add %hi8().
 701         (parse_unsigned16): Add %dsp16().
 702         (parse_signed16): Add %lo16() and %hi16().
 703         (parse_lab_5_3): Make valuep a bfd_vma *.
 704
 705 2005-07-18  Nick Clifton  <nickc@redhat.com>
 706
 707         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 708         components.
 709         (f-lab32-jmp-s): Fix insertion sequence.
 710         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 711         (Dsp-40-s8): Make parameter be signed.
 712         (Dsp-40-s16): Likewise.
 713         (Dsp-48-s8): Likewise.
 714         (Dsp-48-s16): Likewise.
 715         (Imm-13-u3): Likewise. (Despite its name!)
 716         (BitBase16-16-s8): Make the parameter be unsigned.
 717         (BitBase16-8-u11-S): Likewise.
 718         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 719         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 720         relaxation.
 721
 722         * m32c.opc: Fix formatting.
 723         Use safe-ctype.h instead of ctype.h
 724         Move duplicated code sequences into a macro.
 725         Fix compile time warnings about signedness mismatches.
 726         Remove dead code.
 727         (parse_lab_5_3): New parser function.
 728
 729 2005-07-16  Jim Blandy  <jimb@redhat.com>
 730
 731         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 732         to represent isa sets.
 733
 734 2005-07-15  Jim Blandy  <jimb@redhat.com>
 735
 736         * m32c.cpu, m32c.opc: Fix copyright.
 737
 738 2005-07-14  Jim Blandy  <jimb@redhat.com>
 739
 740         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 741
 742 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 743
 744         * ms1.opc (print_dollarhex): Correct format string.
 745
 746 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 747
 748         * iq2000.cpu: Include from binutils cpu dir.
 749
 750 2005-07-05  Nick Clifton  <nickc@redhat.com>
 751
 752         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 753         unsigned in order to avoid compile time warnings about sign
 754         conflicts.
 755
 756         * ms1.opc (parse_*): Likewise.
 757         (parse_imm16): Use a "void *" as it is passed both signed and
 758         unsigned arguments.
 759
 760 2005-07-01  Nick Clifton  <nickc@redhat.com>
 761
 762         * frv.opc: Update to ISO C90 function declaration style.
 763         * iq2000.opc: Likewise.
 764         * m32r.opc: Likewise.
 765         * sh.opc: Likewise.
 766
 767 2005-06-15  Dave Brolley  <brolley@redhat.com>
 768
 769         Contributed by Red Hat.
 770         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 771         * ms1.opc: New file.  Written by Stan Cox.
 772
 773 2005-05-10  Nick Clifton  <nickc@redhat.com>
 774
 775         * Update the address and phone number of the FSF organization in
 776         the GPL notices in the following files:
 777         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 778         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 779         sh64-media.cpu, simplify.inc
 780
 781 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 782
 783         * frv.opc (parse_A): Warning fix.
 784
 785 2005-02-23  Nick Clifton  <nickc@redhat.com>
 786
 787         * frv.opc: Fixed compile time warnings about differing signed'ness
 788         of pointers passed to functions.
 789         * m32r.opc: Likewise.
 790
 791 2005-02-11  Nick Clifton  <nickc@redhat.com>
 792
 793         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 794         'bfd_vma *' in order avoid compile time warning message.
 795
 796 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 797
 798         * cris.cpu (mstep): Add missing insn.
 799
 800 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 801
 802         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 803         * frv.cpu: Add support for TLS annotations in loads and calll.
 804         * frv.opc (parse_symbolic_address): New.
 805         (parse_ldd_annotation): New.
 806         (parse_call_annotation): New.
 807         (parse_ld_annotation): New.
 808         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 809         Introduce TLS relocations.
 810         (parse_d12, parse_s12, parse_u12): Likewise.
 811         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 812         (parse_call_label, print_at): New.
 813
 814 2004-12-21  Mikael Starvik  <starvik@axis.com>
 815
 816         * cris.cpu (cris-set-mem): Correct integral write semantics.
 817
 818 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 819
 820         * cris.cpu: New file.
 821
 822 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 823
 824         * iq2000.cpu: Added quotes around macro arguments so that they
 825         will work with newer versions of guile.
 826
 827 2004-10-27  Nick Clifton  <nickc@redhat.com>
 828
 829         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 830         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 831         operand.
 832         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 833         with guile.
 834
 835 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 836
 837         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 838
 839 2004-05-15  Nick Clifton  <nickc@redhat.com>
 840
 841         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 842
 843 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 844
 845         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 846
 847 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 848
 849         * frv.cpu (define-arch frv): Add fr450 mach.
 850         (define-mach fr450): New.
 851         (define-model fr450): New.  Add profile units to every fr450 insn.
 852         (define-attr UNIT): Add MDCUTSSI.
 853         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 854         (define-attr AUDIO): New boolean.
 855         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 856         (f-LRA-null, f-TLBPR-null): New fields.
 857         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 858         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 859         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 860         (LRA-null, TLBPR-null): New macros.
 861         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 862         (load-real-address): New macro.
 863         (lrai, lrad, tlbpr): New instructions.
 864         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 865         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 866         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 867         (media-low-clear-semantics, media-scope-limit-semantics)
 868         (media-quad-limit, media-quad-shift): New macros.
 869         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 870         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 871         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 872         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 873         (fr450_unit_mapping): New array.
 874         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 875         for new MDCUTSSI unit.
 876         (fr450_check_insn_major_constraints): New function.
 877         (check_insn_major_constraints): Use it.
 878
 879 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 880
 881         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 882         (scutss): Change unit to I0.
 883         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 884         (mqsaths): Fix FR400-MAJOR categorization.
 885         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 886         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 887         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 888         combinations.
 889
 890 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 891
 892         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 893         (rstb, rsth, rst, rstd, rstq): Delete.
 894         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 895
 896 2004-02-23  Nick Clifton  <nickc@redhat.com>
 897
 898         * Apply these patches from Renesas:
 899
 900         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 901
 902         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 903         disassembling codes for 0x*2 addresses.
 904
 905         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 906
 907         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 908
 909         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 910
 911         * cpu/m32r.cpu : Add new model m32r2.
 912         Add new instructions.
 913         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 914         Changed PIPE attr of push from O to OS.
 915         Care for Little-endian of M32R.
 916         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 917         Care for Little-endian of M32R.
 918         (parse_slo16): signed extension for value.
 919
 920 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 921
 922         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 923         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 924
 925         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 926         written by Ben Elliston.
 927
 928 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 929
 930         * frv.cpu (UNIT): Add IACC.
 931         (iacc-multiply-r-r): Use it.
 932         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 933         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 934
 935 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 936
 937         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 938         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 939         cut&paste errors in shifting/truncating numerical operands.
 940         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 941         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 942         (parse_uslo16): Likewise.
 943         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 944         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 945         (parse_s12): Likewise.
 946         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 947         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 948         (parse_uslo16): Likewise.
 949         (parse_uhi16): Parse gothi and gotfuncdeschi.
 950         (parse_d12): Parse got12 and gotfuncdesc12.
 951         (parse_s12): Likewise.
 952
 953 2003-10-10  Dave Brolley  <brolley@redhat.com>
 954
 955         * frv.cpu (dnpmop): New p-macro.
 956         (GRdoublek): Use dnpmop.
 957         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 958         (store-double-r-r): Use (.sym regtype doublek).
 959         (r-store-double): Ditto.
 960         (store-double-r-r-u): Ditto.
 961         (conditional-store-double): Ditto.
 962         (conditional-store-double-u): Ditto.
 963         (store-double-r-simm): Ditto.
 964         (fmovs): Assign to UNIT FMALL.
 965
 966 2003-10-06  Dave Brolley  <brolley@redhat.com>
 967
 968         * frv.cpu, frv.opc: Add support for fr550.
 969
 970 2003-09-24  Dave Brolley  <brolley@redhat.com>
 971
 972         * frv.cpu (u-commit): New modelling unit for fr500.
 973         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 974         (commit-r): Use u-commit model for fr500.
 975         (commit): Ditto.
 976         (conditional-float-binary-op): Take profiling data as an argument.
 977         Update callers.
 978         (ne-float-binary-op): Ditto.
 979
 980 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 981
 982         * frv.cpu (nldqi): Delete unimplemented instruction.
 983
 984 2003-09-12  Dave Brolley  <brolley@redhat.com>
 985
 986         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 987         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 988         frv_ref_SI to get input register referenced for profiling.
 989         (clear-ne-flag-all): Pass insn profiling in as an argument.
 990         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 991
 992 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 993
 994         * frv.cpu: Typographical corrections.
 995
 996 2003-09-09  Dave Brolley  <brolley@redhat.com>
 997
 998         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 999         (conditional-media-dual-complex, media-quad-complex): Likewise.
1000
1001 2003-09-04  Dave Brolley  <brolley@redhat.com>
1002
1003         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1004         Update all callers.
1005         (conditional-register-transfer): Ditto.
1006         (cache-preload): Ditto.
1007         (floating-point-conversion): Ditto.
1008         (floating-point-neg): Ditto.
1009         (float-abs): Ditto.
1010         (float-binary-op-s): Ditto.
1011         (conditional-float-binary-op): Ditto.
1012         (ne-float-binary-op): Ditto.
1013         (float-dual-arith): Ditto.
1014         (ne-float-dual-arith): Ditto.
1015
1016 2003-09-03  Dave Brolley  <brolley@redhat.com>
1017
1018         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1019         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1020         MCLRACC-1.
1021         (A): Removed operand.
1022         (A0,A1): New operands replace operand A.
1023         (mnop): Now a real insn
1024         (mclracc): Removed insn.
1025         (mclracc-0, mclracc-1): New insns replace mclracc.
1026         (all insns): Use new UNIT attributes.
1027
1028 2003-08-21  Nick Clifton  <nickc@redhat.com>
1029
1030         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1031         and u-media-dual-btoh with output parameter.
1032         (cmbtoh): Add profiling hack.
1033
1034 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1035
1036         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1037
1038 2003-06-10  Doug Evans  <dje@sebabeach.org>
1039
1040         * frv.cpu: Add IDOC attribute.
1041
1042 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1043
1044         Contributed by Red Hat.
1045         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1046         Stan Cox, and Frank Ch. Eigler.
1047         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1048         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1049         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1050         * iq10.cpu: New file.  Written by Jeff Johnston.
1051
1052 2003-06-05  Nick Clifton  <nickc@redhat.com>
1053
1054         * frv.cpu (FRintieven): New operand.  An even-numbered only
1055         version of the FRinti operand.
1056         (FRintjeven): Likewise for FRintj.
1057         (FRintkeven): Likewise for FRintk.
1058         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1059         media-quad-arith-sat-semantics, media-quad-arith-sat,
1060         conditional-media-quad-arith-sat, mdunpackh,
1061         media-quad-multiply-semantics, media-quad-multiply,
1062         conditional-media-quad-multiply, media-quad-complex-i,
1063         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1064         conditional-media-quad-multiply-acc, munpackh,
1065         media-quad-multiply-cross-acc-semantics, mdpackh,
1066         media-quad-multiply-cross-acc, mbtoh-semantics,
1067         media-quad-cross-multiply-cross-acc-semantics,
1068         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1069         media-quad-cross-multiply-acc-semantics, cmbtoh,
1070         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1071         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1072         cmhtob): Use new operands.
1073         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1074         (parse_even_register): New function.
1075
1076 2003-06-03  Nick Clifton  <nickc@redhat.com>
1077
1078         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1079         immediate value not unsigned.
1080
1081 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1082
1083         Contributed by Red Hat.
1084         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1085         and Eric Christopher.
1086         * frv.opc: New file.  Written by Catherine Moore, and Dave
1087         Brolley.
1088         * simplify.inc: New file.  Written by Doug Evans.
1089
1090 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1091
1092         * New file.
1093
1094 \f
1095 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1096
1097 Copying and distribution of this file, with or without modification,
1098 are permitted in any medium without royalty provided the copyright
1099 notice and this notice are preserved.
1100
1101 Local Variables:
1102 mode: change-log
1103 left-margin: 8
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1105 version-control: never
1106 End: