1 2018-10-05 Richard Henderson <rth@twiddle.net>
2 Stafford Horne <shorne@gmail.com>
4 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
5 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
6 (l-mul): Fix overflow support and indentation.
7 (l-mulu): Fix overflow support and indentation.
8 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
9 (l-div); Remove incorrect carry behavior.
10 (l-divu): Fix carry and overflow behavior.
11 (l-mac): Add overflow support.
12 (l-msb, l-msbu): Add carry and overflow support.
14 2018-10-05 Richard Henderson <rth@twiddle.net>
16 * or1k.opc (parse_disp26): Add support for plta() relocations.
17 (parse_disp21): New function.
18 (or1k_rclass): New enum.
19 (or1k_rtype): New enum.
20 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
21 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
22 (parse_imm16): Add support for the new 21bit and 13bit relocations.
23 * or1korbis.cpu (f-disp26): Don't assume SI.
24 (f-disp21): New pc-relative 21-bit 13 shifted to right.
25 (insn-opcode): Add ADRP.
26 (l-adrp): New instruction.
28 2018-10-05 Richard Henderson <rth@twiddle.net>
30 * or1k.opc: Add RTYPE_ enum.
31 (INVALID_STORE_RELOC): New string.
32 (or1k_imm16_relocs): New array array.
33 (parse_reloc): New static function that just does the parsing.
34 (parse_imm16): New static function for generic parsing.
35 (parse_simm16): Change to just call parse_imm16.
36 (parse_simm16_split): New function.
37 (parse_uimm16): Change to call parse_imm16.
38 (parse_uimm16_split): New function.
39 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
40 (uimm16-split): Change to use new uimm16_split.
42 2018-07-24 Alan Modra <amodra@gmail.com>
45 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
47 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
49 * or1kcommon.cpu (spr-reg-info): Typo fix.
51 2018-03-03 Alan Modra <amodra@gmail.com>
53 * frv.opc: Include opintl.h.
54 (add_next_to_vliw): Use opcodes_error_handler to print error.
55 Standardize error message.
56 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
58 2018-01-13 Nick Clifton <nickc@redhat.com>
62 2017-03-15 Stafford Horne <shorne@gmail.com>
64 * or1kcommon.cpu: Add pc set semantics to also update ppc.
66 2016-10-06 Alan Modra <amodra@gmail.com>
68 * mep.opc (expand_string): Add fall through comment.
70 2016-03-03 Alan Modra <amodra@gmail.com>
72 * fr30.cpu (f-m4): Replace bogus comment with a better guess
73 at what is really going on.
75 2016-03-02 Alan Modra <amodra@gmail.com>
77 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
79 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
81 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
82 a constant to better align disassembler output.
84 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
86 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
88 2014-06-12 Alan Modra <amodra@gmail.com>
90 * or1k.opc: Whitespace fixes.
92 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
94 * or1korbis.cpu (h-atomic-reserve): New hardware.
95 (h-atomic-address): Likewise.
96 (insn-opcode): Add opcodes for LWA and SWA.
97 (atomic-reserve): New operand.
98 (atomic-address): Likewise.
99 (l-lwa, l-swa): New instructions.
100 (l-lbs): Fix typo in comment.
101 (store-insn): Clear atomic reserve on store to atomic-address.
102 Fix register names in fmt field.
104 2014-04-22 Christian Svensson <blue@cmd.nu>
106 * openrisc.cpu: Delete.
107 * openrisc.opc: Delete.
108 * or1k.cpu: New file.
109 * or1k.opc: New file.
110 * or1kcommon.cpu: New file.
111 * or1korbis.cpu: New file.
112 * or1korfpx.cpu: New file.
114 2013-12-07 Mike Frysinger <vapier@gentoo.org>
116 * epiphany.opc: Remove +x file mode.
118 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
121 * lm32.cpu (Control and status registers): Add CFG2, PSW,
122 TLBVADDR, TLBPADDR and TLBBADVADDR.
124 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
125 Joern Rennecke <joern.rennecke@embecosm.com>
127 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
128 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
129 (testset-insn): Add NO_DIS attribute to t.l.
130 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
131 (move-insns): Add NO-DIS attribute to cmov.l.
132 (op-mmr-movts): Add NO-DIS attribute to movts.l.
133 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
134 (op-rrr): Add NO-DIS attribute to .l.
135 (shift-rrr): Add NO-DIS attribute to .l.
136 (op-shift-rri): Add NO-DIS attribute to i32.l.
137 (bitrl, movtl): Add NO-DIS attribute.
138 (op-iextrrr): Add NO-DIS attribute to .l
139 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
140 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
142 2012-02-27 Alan Modra <amodra@gmail.com>
144 * mt.opc (print_dollarhex): Trim values to 32 bits.
146 2011-12-15 Nick Clifton <nickc@redhat.com>
148 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
151 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
153 * epiphany.opc (parse_branch_addr): Fix type of valuep.
154 Cast value before printing it as a long.
155 (parse_postindex): Fix type of valuep.
157 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
159 * cpu/epiphany.cpu: New file.
160 * cpu/epiphany.opc: New file.
162 2011-08-22 Nick Clifton <nickc@redhat.com>
164 * fr30.cpu: Newly contributed file.
165 * fr30.opc: Likewise.
166 * ip2k.cpu: Likewise.
167 * ip2k.opc: Likewise.
168 * mep-avc.cpu: Likewise.
169 * mep-avc2.cpu: Likewise.
170 * mep-c5.cpu: Likewise.
171 * mep-core.cpu: Likewise.
172 * mep-default.cpu: Likewise.
173 * mep-ext-cop.cpu: Likewise.
174 * mep-fmax.cpu: Likewise.
175 * mep-h1.cpu: Likewise.
176 * mep-ivc2.cpu: Likewise.
177 * mep-rhcop.cpu: Likewise.
178 * mep-sample-ucidsp.cpu: Likewise.
181 * openrisc.cpu: Likewise.
182 * openrisc.opc: Likewise.
183 * xstormy16.cpu: Likewise.
184 * xstormy16.opc: Likewise.
186 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
188 * frv.opc: #undef DEBUG.
190 2010-07-03 DJ Delorie <dj@delorie.com>
192 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
194 2010-02-11 Doug Evans <dje@sebabeach.org>
196 * m32r.cpu (HASH-PREFIX): Delete.
197 (duhpo, dshpo): New pmacros.
198 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
199 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
200 attribute, define with dshpo.
201 (uimm24): Delete HASH-PREFIX attribute.
202 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
203 (print_signed_with_hash_prefix): New function.
204 (print_unsigned_with_hash_prefix): New function.
205 * xc16x.cpu (dowh): New pmacro.
206 (upof16): Define with dowh, specify print handler.
207 (qbit, qlobit, qhibit): Ditto.
209 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
210 (print_with_dot_prefix): New functions.
211 (print_with_pof_prefix, print_with_pag_prefix): New functions.
213 2010-01-24 Doug Evans <dje@sebabeach.org>
215 * frv.cpu (floating-point-conversion): Update call to fp conv op.
216 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
217 conditional-floating-point-conversion, ne-floating-point-conversion,
218 float-parallel-mul-add-double-semantics): Ditto.
220 2010-01-05 Doug Evans <dje@sebabeach.org>
222 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
223 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
225 2010-01-02 Doug Evans <dje@sebabeach.org>
227 * m32c.opc (parse_signed16): Fix typo.
229 2009-12-11 Nick Clifton <nickc@redhat.com>
231 * frv.opc: Fix shadowed variable warnings.
232 * m32c.opc: Fix shadowed variable warnings.
234 2009-11-14 Doug Evans <dje@sebabeach.org>
236 Must use VOID expression in VOID context.
237 * xc16x.cpu (mov4): Fix mode of `sequence'.
238 (mov9, mov10): Ditto.
239 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
240 (callr, callseg, calls, trap, rets, reti): Ditto.
241 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
242 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
243 (exts, exts1, extsr, extsr1, prior): Ditto.
245 2009-10-23 Doug Evans <dje@sebabeach.org>
247 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
248 cgen-ops.h -> cgen/basic-ops.h.
250 2009-09-25 Alan Modra <amodra@bigpond.net.au>
252 * m32r.cpu (stb-plus): Typo fix.
254 2009-09-23 Doug Evans <dje@sebabeach.org>
256 * m32r.cpu (sth-plus): Fix address mode and calculation.
258 (clrpsw): Fix mask calculation.
259 (bset, bclr, btst): Make mode in bit calculation match expression.
261 * xc16x.cpu (rtl-version): Set to 0.8.
262 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
263 make uppercase. Remove unnecessary name-prefix spec.
264 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
265 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
266 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
267 (h-cr): New hardware.
268 (muls): Comment out parts that won't compile, add fixme.
269 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
270 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
271 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
273 2009-07-16 Doug Evans <dje@sebabeach.org>
275 * cpu/simplify.inc (*): One line doc strings don't need \n.
276 (df): Invoke define-full-ifield instead of claiming it's an alias.
278 (dnop): Mark as deprecated.
280 2009-06-22 Alan Modra <amodra@bigpond.net.au>
282 * m32c.opc (parse_lab_5_3): Use correct enum.
284 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
286 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
287 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
288 (media-arith-sat-semantics): Explicitly sign- or zero-extend
289 arguments of "operation" to DI using "mode" and the new pmacros.
291 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
293 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
296 2008-12-23 Jon Beniston <jon@beniston.com>
298 * lm32.cpu: New file.
299 * lm32.opc: New file.
301 2008-01-29 Alan Modra <amodra@bigpond.net.au>
303 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
306 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
308 * cris.cpu (movs, movu): Use result of extension operation when
311 2007-07-04 Nick Clifton <nickc@redhat.com>
313 * cris.cpu: Update copyright notice to refer to GPLv3.
314 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
315 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
316 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
318 * iq2000.cpu: Fix copyright notice to refer to FSF.
320 2007-04-30 Mark Salter <msalter@sadr.localdomain>
322 * frv.cpu (spr-names): Support new coprocessor SPR registers.
324 2007-04-20 Nick Clifton <nickc@redhat.com>
326 * xc16x.cpu: Restore after accidentally overwriting this file with
329 2007-03-29 DJ Delorie <dj@redhat.com>
331 * m32c.cpu (Imm-8-s4n): Fix print hook.
332 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
333 (arith-jnz-imm4-dst-defn): Make relaxable.
334 (arith-jnz16-imm4-dst-defn): Fix encodings.
336 2007-03-20 DJ Delorie <dj@redhat.com>
338 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
340 (src16-16-20-An-relative-*): New.
341 (dst16-*-20-An-relative-*): New.
342 (dst16-16-16sa-*): New
343 (dst16-16-16ar-*): New
344 (dst32-16-16sa-Unprefixed-*): New
345 (jsri): Fix operands.
346 (setzx): Fix encoding.
348 2007-03-08 Alan Modra <amodra@bigpond.net.au>
350 * m32r.opc: Formatting.
352 2006-05-22 Nick Clifton <nickc@redhat.com>
354 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
356 2006-04-10 DJ Delorie <dj@redhat.com>
358 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
359 decides if this function accepts symbolic constants or not.
360 (parse_signed_bitbase): Likewise.
361 (parse_unsigned_bitbase8): Pass the new parameter.
362 (parse_unsigned_bitbase11): Likewise.
363 (parse_unsigned_bitbase16): Likewise.
364 (parse_unsigned_bitbase19): Likewise.
365 (parse_unsigned_bitbase27): Likewise.
366 (parse_signed_bitbase8): Likewise.
367 (parse_signed_bitbase11): Likewise.
368 (parse_signed_bitbase19): Likewise.
370 2006-03-13 DJ Delorie <dj@redhat.com>
372 * m32c.cpu (Bit3-S): New.
374 * m32c.opc (parse_bit3_S): New.
376 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
377 (btst): Add optional :G suffix for MACH32.
379 (pop.w:G): Add optional :G suffix for MACH16.
380 (push.b.imm): Fix syntax.
382 2006-03-10 DJ Delorie <dj@redhat.com>
384 * m32c.cpu (mul.l): New.
387 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
389 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
390 an error message otherwise.
391 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
392 Fix up comments to correctly describe the functions.
394 2006-02-24 DJ Delorie <dj@redhat.com>
396 * m32c.cpu (RL_TYPE): New attribute, with macros.
397 (Lab-8-24): Add RELAX.
398 (unary-insn-defn-g, binary-arith-imm-dst-defn,
399 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
400 (binary-arith-src-dst-defn): Add 2ADDR attribute.
401 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
402 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
404 (jsri16, jsri32): Add 1ADDR attribute.
405 (jsr32.w, jsr32.a): Add JUMP attribute.
407 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
408 Anil Paranjape <anilp1@kpitcummins.com>
409 Shilin Shakti <shilins@kpitcummins.com>
411 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
413 * xc16x.opc: New file containing supporting XC16C routines.
415 2006-02-10 Nick Clifton <nickc@redhat.com>
417 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
419 2006-01-06 DJ Delorie <dj@redhat.com>
421 * m32c.cpu (mov.w:q): Fix mode.
422 (push32.b.imm): Likewise, for the comment.
424 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
426 Second part of ms1 to mt renaming.
427 * mt.cpu (define-arch, define-isa): Set name to mt.
428 (define-mach): Adjust.
429 * mt.opc (CGEN_ASM_HASH): Update.
430 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
431 (parse_loopsize, parse_imm16): Adjust.
433 2005-12-13 DJ Delorie <dj@redhat.com>
435 * m32c.cpu (jsri): Fix order so register names aren't treated as
437 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
438 indexwd, indexws): Fix encodings.
440 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
442 * mt.cpu: Rename from ms1.cpu.
443 * mt.opc: Rename from ms1.opc.
445 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
447 * cris.cpu (simplecris-common-writable-specregs)
448 (simplecris-common-readable-specregs): Split from
449 simplecris-common-specregs. All users changed.
450 (cris-implemented-writable-specregs-v0)
451 (cris-implemented-readable-specregs-v0): Similar from
452 cris-implemented-specregs-v0.
453 (cris-implemented-writable-specregs-v3)
454 (cris-implemented-readable-specregs-v3)
455 (cris-implemented-writable-specregs-v8)
456 (cris-implemented-readable-specregs-v8)
457 (cris-implemented-writable-specregs-v10)
458 (cris-implemented-readable-specregs-v10)
459 (cris-implemented-writable-specregs-v32)
460 (cris-implemented-readable-specregs-v32): Similar.
461 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
462 insns and specializations.
464 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
467 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
469 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
470 f-cb2incr, f-rc3): New fields.
471 (LOOP): New instruction.
472 (JAL-HAZARD): New hazard.
473 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
475 (mul, muli, dbnz, iflush): Enable for ms2
476 (jal, reti): Has JAL-HAZARD.
477 (ldctxt, ldfb, stfb): Only ms1.
478 (fbcb): Only ms1,ms1-003.
479 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
480 fbcbincrs, mfbcbincrs): Enable for ms2.
481 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
482 * ms1.opc (parse_loopsize): New.
483 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
486 2005-10-28 Dave Brolley <brolley@redhat.com>
488 Contribute the following change:
489 2003-09-24 Dave Brolley <brolley@redhat.com>
491 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
492 CGEN_ATTR_VALUE_TYPE.
493 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
494 Use cgen_bitset_intersect_p.
496 2005-10-27 DJ Delorie <dj@redhat.com>
498 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
499 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
500 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
501 imm operand is needed.
502 (adjnz, sbjnz): Pass the right operands.
503 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
504 unary-insn): Add -g variants for opcodes that need to support :G.
505 (not.BW:G, push.BW:G): Call it.
506 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
507 stzx16-imm8-imm8-abs16): Fix operand typos.
508 * m32c.opc (m32c_asm_hash): Support bnCND.
509 (parse_signed4n, print_signed4n): New.
511 2005-10-26 DJ Delorie <dj@redhat.com>
513 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
514 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
515 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
517 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
518 (mov.BW:S r0,r1): Fix typo r1l->r1.
519 (tst): Allow :G suffix.
520 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
522 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
524 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
526 2005-10-25 DJ Delorie <dj@redhat.com>
528 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
529 making one a macro of the other.
531 2005-10-21 DJ Delorie <dj@redhat.com>
533 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
534 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
535 indexld, indexls): .w variants have `1' bit.
536 (rot32.b): QI, not SI.
537 (rot32.w): HI, not SI.
538 (xchg16): HI for .w variant.
540 2005-10-19 Nick Clifton <nickc@redhat.com>
542 * m32r.opc (parse_slo16): Fix bad application of previous patch.
544 2005-10-18 Andreas Schwab <schwab@suse.de>
546 * m32r.opc (parse_slo16): Better version of previous patch.
548 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
550 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
553 2005-07-25 DJ Delorie <dj@redhat.com>
555 * m32c.opc (parse_unsigned8): Add %dsp8().
556 (parse_signed8): Add %hi8().
557 (parse_unsigned16): Add %dsp16().
558 (parse_signed16): Add %lo16() and %hi16().
559 (parse_lab_5_3): Make valuep a bfd_vma *.
561 2005-07-18 Nick Clifton <nickc@redhat.com>
563 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
565 (f-lab32-jmp-s): Fix insertion sequence.
566 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
567 (Dsp-40-s8): Make parameter be signed.
568 (Dsp-40-s16): Likewise.
569 (Dsp-48-s8): Likewise.
570 (Dsp-48-s16): Likewise.
571 (Imm-13-u3): Likewise. (Despite its name!)
572 (BitBase16-16-s8): Make the parameter be unsigned.
573 (BitBase16-8-u11-S): Likewise.
574 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
575 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
578 * m32c.opc: Fix formatting.
579 Use safe-ctype.h instead of ctype.h
580 Move duplicated code sequences into a macro.
581 Fix compile time warnings about signedness mismatches.
583 (parse_lab_5_3): New parser function.
585 2005-07-16 Jim Blandy <jimb@redhat.com>
587 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
588 to represent isa sets.
590 2005-07-15 Jim Blandy <jimb@redhat.com>
592 * m32c.cpu, m32c.opc: Fix copyright.
594 2005-07-14 Jim Blandy <jimb@redhat.com>
596 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
598 2005-07-14 Alan Modra <amodra@bigpond.net.au>
600 * ms1.opc (print_dollarhex): Correct format string.
602 2005-07-06 Alan Modra <amodra@bigpond.net.au>
604 * iq2000.cpu: Include from binutils cpu dir.
606 2005-07-05 Nick Clifton <nickc@redhat.com>
608 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
609 unsigned in order to avoid compile time warnings about sign
612 * ms1.opc (parse_*): Likewise.
613 (parse_imm16): Use a "void *" as it is passed both signed and
616 2005-07-01 Nick Clifton <nickc@redhat.com>
618 * frv.opc: Update to ISO C90 function declaration style.
619 * iq2000.opc: Likewise.
620 * m32r.opc: Likewise.
623 2005-06-15 Dave Brolley <brolley@redhat.com>
625 Contributed by Red Hat.
626 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
627 * ms1.opc: New file. Written by Stan Cox.
629 2005-05-10 Nick Clifton <nickc@redhat.com>
631 * Update the address and phone number of the FSF organization in
632 the GPL notices in the following files:
633 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
634 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
635 sh64-media.cpu, simplify.inc
637 2005-02-24 Alan Modra <amodra@bigpond.net.au>
639 * frv.opc (parse_A): Warning fix.
641 2005-02-23 Nick Clifton <nickc@redhat.com>
643 * frv.opc: Fixed compile time warnings about differing signed'ness
644 of pointers passed to functions.
645 * m32r.opc: Likewise.
647 2005-02-11 Nick Clifton <nickc@redhat.com>
649 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
650 'bfd_vma *' in order avoid compile time warning message.
652 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
654 * cris.cpu (mstep): Add missing insn.
656 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
658 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
659 * frv.cpu: Add support for TLS annotations in loads and calll.
660 * frv.opc (parse_symbolic_address): New.
661 (parse_ldd_annotation): New.
662 (parse_call_annotation): New.
663 (parse_ld_annotation): New.
664 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
665 Introduce TLS relocations.
666 (parse_d12, parse_s12, parse_u12): Likewise.
667 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
668 (parse_call_label, print_at): New.
670 2004-12-21 Mikael Starvik <starvik@axis.com>
672 * cris.cpu (cris-set-mem): Correct integral write semantics.
674 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
676 * cris.cpu: New file.
678 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
680 * iq2000.cpu: Added quotes around macro arguments so that they
681 will work with newer versions of guile.
683 2004-10-27 Nick Clifton <nickc@redhat.com>
685 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
686 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
688 * iq2000.cpu (dnop index): Rename to _index to avoid complications
691 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
693 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
695 2004-05-15 Nick Clifton <nickc@redhat.com>
697 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
699 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
701 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
703 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
705 * frv.cpu (define-arch frv): Add fr450 mach.
706 (define-mach fr450): New.
707 (define-model fr450): New. Add profile units to every fr450 insn.
708 (define-attr UNIT): Add MDCUTSSI.
709 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
710 (define-attr AUDIO): New boolean.
711 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
712 (f-LRA-null, f-TLBPR-null): New fields.
713 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
714 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
715 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
716 (LRA-null, TLBPR-null): New macros.
717 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
718 (load-real-address): New macro.
719 (lrai, lrad, tlbpr): New instructions.
720 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
721 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
722 (mdcutssi): Change UNIT attribute to MDCUTSSI.
723 (media-low-clear-semantics, media-scope-limit-semantics)
724 (media-quad-limit, media-quad-shift): New macros.
725 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
726 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
727 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
728 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
729 (fr450_unit_mapping): New array.
730 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
731 for new MDCUTSSI unit.
732 (fr450_check_insn_major_constraints): New function.
733 (check_insn_major_constraints): Use it.
735 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
737 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
738 (scutss): Change unit to I0.
739 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
740 (mqsaths): Fix FR400-MAJOR categorization.
741 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
742 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
743 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
746 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
748 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
749 (rstb, rsth, rst, rstd, rstq): Delete.
750 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
752 2004-02-23 Nick Clifton <nickc@redhat.com>
754 * Apply these patches from Renesas:
756 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
758 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
759 disassembling codes for 0x*2 addresses.
761 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
763 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
765 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
767 * cpu/m32r.cpu : Add new model m32r2.
768 Add new instructions.
769 Replace occurrances of 'Mitsubishi' with 'Renesas'.
770 Changed PIPE attr of push from O to OS.
771 Care for Little-endian of M32R.
772 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
773 Care for Little-endian of M32R.
774 (parse_slo16): signed extension for value.
776 2004-02-20 Andrew Cagney <cagney@redhat.com>
778 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
779 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
781 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
782 written by Ben Elliston.
784 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
786 * frv.cpu (UNIT): Add IACC.
787 (iacc-multiply-r-r): Use it.
788 * frv.opc (fr400_unit_mapping): Add entry for IACC.
789 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
791 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
793 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
794 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
795 cut&paste errors in shifting/truncating numerical operands.
796 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
797 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
798 (parse_uslo16): Likewise.
799 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
800 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
801 (parse_s12): Likewise.
802 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
803 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
804 (parse_uslo16): Likewise.
805 (parse_uhi16): Parse gothi and gotfuncdeschi.
806 (parse_d12): Parse got12 and gotfuncdesc12.
807 (parse_s12): Likewise.
809 2003-10-10 Dave Brolley <brolley@redhat.com>
811 * frv.cpu (dnpmop): New p-macro.
812 (GRdoublek): Use dnpmop.
813 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
814 (store-double-r-r): Use (.sym regtype doublek).
815 (r-store-double): Ditto.
816 (store-double-r-r-u): Ditto.
817 (conditional-store-double): Ditto.
818 (conditional-store-double-u): Ditto.
819 (store-double-r-simm): Ditto.
820 (fmovs): Assign to UNIT FMALL.
822 2003-10-06 Dave Brolley <brolley@redhat.com>
824 * frv.cpu, frv.opc: Add support for fr550.
826 2003-09-24 Dave Brolley <brolley@redhat.com>
828 * frv.cpu (u-commit): New modelling unit for fr500.
829 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
830 (commit-r): Use u-commit model for fr500.
832 (conditional-float-binary-op): Take profiling data as an argument.
834 (ne-float-binary-op): Ditto.
836 2003-09-19 Michael Snyder <msnyder@redhat.com>
838 * frv.cpu (nldqi): Delete unimplemented instruction.
840 2003-09-12 Dave Brolley <brolley@redhat.com>
842 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
843 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
844 frv_ref_SI to get input register referenced for profiling.
845 (clear-ne-flag-all): Pass insn profiling in as an argument.
846 (clrgr,clrfr,clrga,clrfa): Add profiling information.
848 2003-09-11 Michael Snyder <msnyder@redhat.com>
850 * frv.cpu: Typographical corrections.
852 2003-09-09 Dave Brolley <brolley@redhat.com>
854 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
855 (conditional-media-dual-complex, media-quad-complex): Likewise.
857 2003-09-04 Dave Brolley <brolley@redhat.com>
859 * frv.cpu (register-transfer): Pass in all attributes in on argument.
861 (conditional-register-transfer): Ditto.
862 (cache-preload): Ditto.
863 (floating-point-conversion): Ditto.
864 (floating-point-neg): Ditto.
866 (float-binary-op-s): Ditto.
867 (conditional-float-binary-op): Ditto.
868 (ne-float-binary-op): Ditto.
869 (float-dual-arith): Ditto.
870 (ne-float-dual-arith): Ditto.
872 2003-09-03 Dave Brolley <brolley@redhat.com>
874 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
875 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
877 (A): Removed operand.
878 (A0,A1): New operands replace operand A.
879 (mnop): Now a real insn
880 (mclracc): Removed insn.
881 (mclracc-0, mclracc-1): New insns replace mclracc.
882 (all insns): Use new UNIT attributes.
884 2003-08-21 Nick Clifton <nickc@redhat.com>
886 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
887 and u-media-dual-btoh with output parameter.
888 (cmbtoh): Add profiling hack.
890 2003-08-19 Michael Snyder <msnyder@redhat.com>
892 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
894 2003-06-10 Doug Evans <dje@sebabeach.org>
896 * frv.cpu: Add IDOC attribute.
898 2003-06-06 Andrew Cagney <cagney@redhat.com>
900 Contributed by Red Hat.
901 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
902 Stan Cox, and Frank Ch. Eigler.
903 * iq2000.opc: New file. Written by Ben Elliston, Frank
904 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
905 * iq2000m.cpu: New file. Written by Jeff Johnston.
906 * iq10.cpu: New file. Written by Jeff Johnston.
908 2003-06-05 Nick Clifton <nickc@redhat.com>
910 * frv.cpu (FRintieven): New operand. An even-numbered only
911 version of the FRinti operand.
912 (FRintjeven): Likewise for FRintj.
913 (FRintkeven): Likewise for FRintk.
914 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
915 media-quad-arith-sat-semantics, media-quad-arith-sat,
916 conditional-media-quad-arith-sat, mdunpackh,
917 media-quad-multiply-semantics, media-quad-multiply,
918 conditional-media-quad-multiply, media-quad-complex-i,
919 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
920 conditional-media-quad-multiply-acc, munpackh,
921 media-quad-multiply-cross-acc-semantics, mdpackh,
922 media-quad-multiply-cross-acc, mbtoh-semantics,
923 media-quad-cross-multiply-cross-acc-semantics,
924 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
925 media-quad-cross-multiply-acc-semantics, cmbtoh,
926 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
927 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
928 cmhtob): Use new operands.
929 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
930 (parse_even_register): New function.
932 2003-06-03 Nick Clifton <nickc@redhat.com>
934 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
935 immediate value not unsigned.
937 2003-06-03 Andrew Cagney <cagney@redhat.com>
939 Contributed by Red Hat.
940 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
941 and Eric Christopher.
942 * frv.opc: New file. Written by Catherine Moore, and Dave
944 * simplify.inc: New file. Written by Doug Evans.
946 2003-05-02 Andrew Cagney <cagney@redhat.com>
951 Copyright (C) 2003-2012 Free Software Foundation, Inc.
953 Copying and distribution of this file, with or without modification,
954 are permitted in any medium without royalty provided the copyright
955 notice and this notice are preserved.
961 version-control: never