cpu/ChangeLog

   1 2021-03-31  Alan Modra  <amodra@gmail.com>
   2
   3         * frv.opc: Replace bfd_boolean with bool, FALSE with false, and
   4         TRUE with true throughout.
   5
   6 2021-03-29  Alan Modra  <amodra@gmail.com>
   7
   8         * frv.opc (frv_is_branch_major, frv_is_float_major),
   9         (frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
  10         (frv_is_media_insn, spr_valid): Correct prototypes.
  11
  12 2021-01-09  Nick Clifton  <nickc@redhat.com>
  13
  14         * 2.36 release branch crated.
  15
  16 2020-10-05  Samanta Navarro  <ferivoz@riseup.net>
  17
  18         * m32r.cpu: Fix spelling mistakes.
  19
  20 2020-09-18  David Faust  <david.faust@oracle.com>
  21
  22         * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
  23         (define-alu-insn-bin, daib): Take ISAs as an argument.
  24         (define-alu-instructions): Update calls to daib pmacro with
  25         ISAs; add sdiv and smod.
  26
  27 2020-09-08  David Faust  <david.faust@oracle.com>
  28
  29         * bpf.cpu (define-alu-instructions): Correct semantic operators
  30         for div, mod to unsigned versions.
  31
  32 2020-09-01  Alan Modra  <amodra@gmail.com>
  33
  34         * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
  35         value by two rather than shifting left.
  36         (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
  37
  38 2020-08-26  David Faust  <david.faust@oracle.com>
  39
  40         * bpf.cpu (arch bpf): Add xbpf mach and isas.
  41         (define-xbpf-isa) New pmacro.
  42         (all-isas) Add xbpfle,xbpfbe.
  43         (endian-isas): New pmacro.
  44         (mach xbpf): New.
  45         (model xbpf-def): Likewise.
  46         (h-gpr): Add xbpf mach.
  47         (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
  48         (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
  49         (define-alu-insn-un): Use new endian-isas pmacro.
  50         (define-alu-insn-bin, define-alu-insn-mov): Likewise.
  51         (define-endian-insn, define-lddw): Likewise.
  52         (dlind, dxli, dxsi, dsti): Likewise.
  53         (define-cond-jump-insn, define-call-insn): Likewise.
  54         (define-atomic-insns): Likewise.
  55
  56 2020-07-04  Nick Clifton  <nickc@redhat.com>
  57
  58         Binutils 2.35 branch created.
  59
  60 2020-06-25 David Faust  <david.faust@oracle.com>
  61
  62         * bpf.cpu (f-offset16): Change type from INT to HI.
  63         (dxli): Simplify memory access.
  64         (dxsi): Likewise.
  65         (define-endian-insn): Update c-call in semantics.
  66         (dlabs) Likewise.
  67         (dlind) Likewise.
  68
  69 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  70
  71         * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
  72         * bpf.opc (bpf_print_insn): Do not set endian_code here.
  73
  74 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  75
  76         * mep.opc (print_slot_insn): Pass the insn endianness to
  77         cgen_get_insn_value.
  78
  79 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
  80             David Faust <david.faust@oracle.com>
  81
  82         * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
  83         (define-alu-insn-mov): Likewise.
  84         (daib): Likewise.
  85         (define-alu-instructions): Likewise.
  86         (define-endian-insn): Likewise.
  87         (define-lddw): Likewise.
  88         (dlabs): Likewise.
  89         (dlind): Likewise.
  90         (dxli): Likewise.
  91         (dxsi): Likewise.
  92         (dsti): Likewise.
  93         (define-ldstx-insns): Likewise.
  94         (define-st-insns): Likewise.
  95         (define-cond-jump-insn): Likewise.
  96         (dcji): Likewise.
  97         (define-condjump-insns): Likewise.
  98         (define-call-insn): Likewise.
  99         (ja): Likewise.
 100         ("exit"): Likewise.
 101         (define-atomic-insns): Likewise.
 102         (sem-exchange-and-add): New macro.
 103         * bpf.cpu ("brkpt"): New instruction.
 104         (bpfbf): Set word-bitsize to 32 and insn-endian big.
 105         (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
 106         (h-pc): Expand definition.
 107         * bpf.opc (bpf_print_insn): Set endian_code to BIG.
 108
 109 2020-05-21  Alan Modra  <amodra@gmail.com>
 110
 111         * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
 112         "if (x) free (x)" with "free (x)".
 113
 114 2020-05-19  Stafford Horne  <shorne@gmail.com>
 115
 116         PR 25184
 117         * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
 118         (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
 119         (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
 120         * or1kcommon.cpu (h-fdr): Remove hardware.
 121         * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
 122         (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
 123         (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
 124         (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
 125         (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
 126
 127 2020-02-16  David Faust  <david.faust@oracle.com>
 128
 129         * bpf.cpu (define-cond-jump-insn): Renamed from djci.
 130         (dcji) New version with support for JMP32
 131
 132 2020-02-03  Alan Modra  <amodra@gmail.com>
 133
 134         * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
 135
 136 2020-02-01  Alan Modra  <amodra@gmail.com>
 137
 138         * frv.cpu (f-u12): Multiply rather than left shift signed values.
 139         (f-label16, f-label24): Likewise.
 140
 141 2020-01-30  Alan Modra  <amodra@gmail.com>
 142
 143         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
 144         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
 145         (f-dst32-rn-prefixed-QI): Likewise.
 146         (f-dsp-32-s32): Mask before shifting left.
 147         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
 148         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
 149         shifting left.
 150         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
 151         (h-gr-SI): Mask before shifting.
 152
 153 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
 154
 155         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
 156         (neg and neg32) use OP_SRC_K even if they operate only in
 157         registers.
 158
 159 2020-01-18  Nick Clifton  <nickc@redhat.com>
 160
 161         Binutils 2.34 branch created.
 162
 163 2020-01-13  Alan Modra  <amodra@gmail.com>
 164
 165         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
 166         left shift signed values.
 167
 168 2020-01-06  Alan Modra  <amodra@gmail.com>
 169
 170         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
 171         bits before shifting rather than masking after shifting.
 172         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
 173         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
 174         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
 175         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
 176
 177 2020-01-04  Alan Modra  <amodra@gmail.com>
 178
 179         * m32r.cpu (f-disp8): Avoid left shift of negative values.
 180         (f-disp16, f-disp24): Likewise.
 181
 182 2019-12-23  Alan Modra  <amodra@gmail.com>
 183
 184         * iq2000.cpu (f-offset): Avoid left shift of negative values.
 185
 186 2019-12-20  Alan Modra  <amodra@gmail.com>
 187
 188         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
 189
 190 2019-12-17  Alan Modra  <amodra@gmail.com>
 191
 192         * bpf.cpu (f-imm64): Avoid signed overflow.
 193
 194 2019-12-16  Alan Modra  <amodra@gmail.com>
 195
 196         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
 197
 198 2019-12-11  Alan Modra  <amodra@gmail.com>
 199
 200         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
 201         * lm32.cpu (f-branch, f-vall): Likewise.
 202         * m32.cpu (f-lab-8-16): Likewise.
 203
 204 2019-12-11  Alan Modra  <amodra@gmail.com>
 205
 206         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
 207         shift left to avoid UB on left shift of negative values.
 208
 209 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
 210
 211         * bpf.cpu: Fix comment describing the 128-bit instruction format.
 212
 213 2019-09-09  Phil Blundell  <pb@pbcl.net>
 214
 215         binutils 2.33 branch created.
 216
 217 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 218
 219         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
 220         %a and %ctx.
 221
 222 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
 223
 224         * bpf.cpu (dlabs): New pmacro.
 225         (dlind): Likewise.
 226
 227 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 228
 229         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
 230         explicit 'dst' argument.
 231
 232 2019-06-13  Stafford Horne  <shorne@gmail.com>
 233
 234         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 235
 236 2019-06-13  Stafford Horne  <shorne@gmail.com>
 237
 238         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 239         (l-adrp): Improve comment.
 240
 241 2019-06-13  Stafford Horne  <shorne@gmail.com>
 242
 243         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 244         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 245         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 246         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 247         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 248         float-setflag-unordered-symantics): New pmacro for instruction
 249         symantics.
 250         (float-setflag-insn): Update to use float-setflag-insn-base.
 251         (float-setflag-unordered-insn): New pmacro for generating instructions.
 252
 253 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 254             Stafford Horne  <shorne@gmail.com>
 255
 256         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 257         (ORFPX-MACHS): Removed pmacro.
 258         * or1k.opc (or1k_cgen_insn_supported): New function.
 259         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 260         (parse_regpair, print_regpair): New functions.
 261         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 262         and add comments.
 263         (h-fdr): Update comment to indicate or64.
 264         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 265         (h-fd32r): New hardware for 64-bit fpu registers.
 266         (h-i64r): New hardware for 64-bit int registers.
 267         * or1korbis.cpu (f-resv-8-1): New field.
 268         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 269         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 270         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 271         (h-roff1): New hardware.
 272         (double-field-and-ops mnemonic): New pmacro to generate operations
 273         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 274         (float-regreg-insn): Update single precision generator to MACH
 275         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 276         (float-setflag-insn): Update single precision generator to MACH
 277         ORFPX32-MACHS.  Fix double instructions from single to double
 278         precision.  Add generator for or32 64-bit instructions.
 279         (float-cust-insn cust-num): Update single precision generator to MACH
 280         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 281         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 282         ORFPX32-MACHS.
 283         (lf-rem-d): Fix operation from mod to rem.
 284         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 285         (lf-itof-d): Fix operands from single to double.
 286         (lf-ftoi-d): Update operand mode from DI to WI.
 287
 288 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 289
 290         * bpf.cpu: New file.
 291         * bpf.opc: Likewise.
 292
 293 2018-06-24  Nick Clifton  <nickc@redhat.com>
 294
 295         2.32 branch created.
 296
 297 2018-10-05  Richard Henderson  <rth@twiddle.net>
 298             Stafford Horne  <shorne@gmail.com>
 299
 300         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 301         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 302         (l-mul): Fix overflow support and indentation.
 303         (l-mulu): Fix overflow support and indentation.
 304         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 305         (l-div); Remove incorrect carry behavior.
 306         (l-divu): Fix carry and overflow behavior.
 307         (l-mac): Add overflow support.
 308         (l-msb, l-msbu): Add carry and overflow support.
 309
 310 2018-10-05  Richard Henderson  <rth@twiddle.net>
 311
 312         * or1k.opc (parse_disp26): Add support for plta() relocations.
 313         (parse_disp21): New function.
 314         (or1k_rclass): New enum.
 315         (or1k_rtype): New enum.
 316         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 317         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 318         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 319         * or1korbis.cpu (f-disp26): Don't assume SI.
 320         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 321         (insn-opcode): Add ADRP.
 322         (l-adrp): New instruction.
 323
 324 2018-10-05  Richard Henderson  <rth@twiddle.net>
 325
 326         * or1k.opc: Add RTYPE_ enum.
 327         (INVALID_STORE_RELOC): New string.
 328         (or1k_imm16_relocs): New array array.
 329         (parse_reloc): New static function that just does the parsing.
 330         (parse_imm16): New static function for generic parsing.
 331         (parse_simm16): Change to just call parse_imm16.
 332         (parse_simm16_split): New function.
 333         (parse_uimm16): Change to call parse_imm16.
 334         (parse_uimm16_split): New function.
 335         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 336         (uimm16-split): Change to use new uimm16_split.
 337
 338 2018-07-24  Alan Modra  <amodra@gmail.com>
 339
 340         PR 23430
 341         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 342
 343 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 344
 345         * or1kcommon.cpu (spr-reg-info): Typo fix.
 346
 347 2018-03-03  Alan Modra  <amodra@gmail.com>
 348
 349         * frv.opc: Include opintl.h.
 350         (add_next_to_vliw): Use opcodes_error_handler to print error.
 351         Standardize error message.
 352         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 353
 354 2018-01-13  Nick Clifton  <nickc@redhat.com>
 355
 356         2.30 branch created.
 357
 358 2017-03-15  Stafford Horne  <shorne@gmail.com>
 359
 360         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 361
 362 2016-10-06  Alan Modra  <amodra@gmail.com>
 363
 364         * mep.opc (expand_string): Add fall through comment.
 365
 366 2016-03-03  Alan Modra  <amodra@gmail.com>
 367
 368         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 369         at what is really going on.
 370
 371 2016-03-02  Alan Modra  <amodra@gmail.com>
 372
 373         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 374
 375 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 376
 377         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 378         a constant to better align disassembler output.
 379
 380 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 381
 382         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 383
 384 2014-06-12  Alan Modra  <amodra@gmail.com>
 385
 386         * or1k.opc: Whitespace fixes.
 387
 388 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 389
 390         * or1korbis.cpu (h-atomic-reserve): New hardware.
 391         (h-atomic-address): Likewise.
 392         (insn-opcode): Add opcodes for LWA and SWA.
 393         (atomic-reserve): New operand.
 394         (atomic-address): Likewise.
 395         (l-lwa, l-swa): New instructions.
 396         (l-lbs): Fix typo in comment.
 397         (store-insn): Clear atomic reserve on store to atomic-address.
 398         Fix register names in fmt field.
 399
 400 2014-04-22  Christian Svensson  <blue@cmd.nu>
 401
 402         * openrisc.cpu: Delete.
 403         * openrisc.opc: Delete.
 404         * or1k.cpu: New file.
 405         * or1k.opc: New file.
 406         * or1kcommon.cpu: New file.
 407         * or1korbis.cpu: New file.
 408         * or1korfpx.cpu: New file.
 409
 410 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 411
 412         * epiphany.opc: Remove +x file mode.
 413
 414 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 415
 416         PR binutils/15241
 417         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 418         TLBVADDR, TLBPADDR and TLBBADVADDR.
 419
 420 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 421             Joern Rennecke  <joern.rennecke@embecosm.com>
 422
 423         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 424         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 425         (testset-insn): Add NO_DIS attribute to t.l.
 426         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 427         (move-insns): Add NO-DIS attribute to cmov.l.
 428         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 429         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 430         (op-rrr): Add NO-DIS attribute to .l.
 431         (shift-rrr): Add NO-DIS attribute to .l.
 432         (op-shift-rri): Add NO-DIS attribute to i32.l.
 433         (bitrl, movtl): Add NO-DIS attribute.
 434         (op-iextrrr): Add NO-DIS attribute to .l
 435         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 436         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 437
 438 2012-02-27  Alan Modra  <amodra@gmail.com>
 439
 440         * mt.opc (print_dollarhex): Trim values to 32 bits.
 441
 442 2011-12-15  Nick Clifton  <nickc@redhat.com>
 443
 444         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 445         hosts.
 446
 447 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 448
 449         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 450         Cast value before printing it as a long.
 451         (parse_postindex): Fix type of valuep.
 452
 453 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 454
 455         * cpu/epiphany.cpu: New file.
 456         * cpu/epiphany.opc: New file.
 457
 458 2011-08-22  Nick Clifton  <nickc@redhat.com>
 459
 460         * fr30.cpu: Newly contributed file.
 461         * fr30.opc: Likewise.
 462         * ip2k.cpu: Likewise.
 463         * ip2k.opc: Likewise.
 464         * mep-avc.cpu: Likewise.
 465         * mep-avc2.cpu: Likewise.
 466         * mep-c5.cpu: Likewise.
 467         * mep-core.cpu: Likewise.
 468         * mep-default.cpu: Likewise.
 469         * mep-ext-cop.cpu: Likewise.
 470         * mep-fmax.cpu: Likewise.
 471         * mep-h1.cpu: Likewise.
 472         * mep-ivc2.cpu: Likewise.
 473         * mep-rhcop.cpu: Likewise.
 474         * mep-sample-ucidsp.cpu: Likewise.
 475         * mep.cpu: Likewise.
 476         * mep.opc: Likewise.
 477         * openrisc.cpu: Likewise.
 478         * openrisc.opc: Likewise.
 479         * xstormy16.cpu: Likewise.
 480         * xstormy16.opc: Likewise.
 481
 482 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 483
 484         * frv.opc: #undef DEBUG.
 485
 486 2010-07-03  DJ Delorie  <dj@delorie.com>
 487
 488         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 489
 490 2010-02-11  Doug Evans  <dje@sebabeach.org>
 491
 492         * m32r.cpu (HASH-PREFIX): Delete.
 493         (duhpo, dshpo): New pmacros.
 494         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 495         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 496         attribute, define with dshpo.
 497         (uimm24): Delete HASH-PREFIX attribute.
 498         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 499         (print_signed_with_hash_prefix): New function.
 500         (print_unsigned_with_hash_prefix): New function.
 501         * xc16x.cpu (dowh): New pmacro.
 502         (upof16): Define with dowh, specify print handler.
 503         (qbit, qlobit, qhibit): Ditto.
 504         (upag16): Ditto.
 505         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 506         (print_with_dot_prefix): New functions.
 507         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 508
 509 2010-01-24  Doug Evans  <dje@sebabeach.org>
 510
 511         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 512         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 513         conditional-floating-point-conversion, ne-floating-point-conversion,
 514         float-parallel-mul-add-double-semantics): Ditto.
 515
 516 2010-01-05  Doug Evans  <dje@sebabeach.org>
 517
 518         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 519         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 520
 521 2010-01-02  Doug Evans  <dje@sebabeach.org>
 522
 523         * m32c.opc (parse_signed16): Fix typo.
 524
 525 2009-12-11  Nick Clifton  <nickc@redhat.com>
 526
 527         * frv.opc: Fix shadowed variable warnings.
 528         * m32c.opc: Fix shadowed variable warnings.
 529
 530 2009-11-14  Doug Evans  <dje@sebabeach.org>
 531
 532         Must use VOID expression in VOID context.
 533         * xc16x.cpu (mov4): Fix mode of `sequence'.
 534         (mov9, mov10): Ditto.
 535         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 536         (callr, callseg, calls, trap, rets, reti): Ditto.
 537         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 538         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 539         (exts, exts1, extsr, extsr1, prior): Ditto.
 540
 541 2009-10-23  Doug Evans  <dje@sebabeach.org>
 542
 543         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 544         cgen-ops.h -> cgen/basic-ops.h.
 545
 546 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 547
 548         * m32r.cpu (stb-plus): Typo fix.
 549
 550 2009-09-23  Doug Evans  <dje@sebabeach.org>
 551
 552         * m32r.cpu (sth-plus): Fix address mode and calculation.
 553         (stb-plus): Ditto.
 554         (clrpsw): Fix mask calculation.
 555         (bset, bclr, btst): Make mode in bit calculation match expression.
 556
 557         * xc16x.cpu (rtl-version): Set to 0.8.
 558         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 559         make uppercase.  Remove unnecessary name-prefix spec.
 560         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 561         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 562         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 563         (h-cr): New hardware.
 564         (muls): Comment out parts that won't compile, add fixme.
 565         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 566         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 567         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 568
 569 2009-07-16  Doug Evans  <dje@sebabeach.org>
 570
 571         * cpu/simplify.inc (*): One line doc strings don't need \n.
 572         (df): Invoke define-full-ifield instead of claiming it's an alias.
 573         (dno): Define.
 574         (dnop): Mark as deprecated.
 575
 576 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 577
 578         * m32c.opc (parse_lab_5_3): Use correct enum.
 579
 580 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 581
 582         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 583         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 584         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 585         arguments of "operation" to DI using "mode" and the new pmacros.
 586
 587 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 588
 589         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 590         of number 2, PID.
 591
 592 2008-12-23  Jon Beniston <jon@beniston.com>
 593
 594         * lm32.cpu: New file.
 595         * lm32.opc: New file.
 596
 597 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 598
 599         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 600         to source.
 601
 602 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 603
 604         * cris.cpu (movs, movu): Use result of extension operation when
 605         updating flags.
 606
 607 2007-07-04  Nick Clifton  <nickc@redhat.com>
 608
 609         * cris.cpu: Update copyright notice to refer to GPLv3.
 610         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 611         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 612         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 613         xc16x.opc: Likewise.
 614         * iq2000.cpu: Fix copyright notice to refer to FSF.
 615
 616 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 617
 618         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 619
 620 2007-04-20  Nick Clifton  <nickc@redhat.com>
 621
 622         * xc16x.cpu: Restore after accidentally overwriting this file with
 623         xc16x.opc.
 624
 625 2007-03-29  DJ Delorie  <dj@redhat.com>
 626
 627         * m32c.cpu (Imm-8-s4n): Fix print hook.
 628         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 629         (arith-jnz-imm4-dst-defn): Make relaxable.
 630         (arith-jnz16-imm4-dst-defn): Fix encodings.
 631
 632 2007-03-20  DJ Delorie  <dj@redhat.com>
 633
 634         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 635         mem20): New.
 636         (src16-16-20-An-relative-*): New.
 637         (dst16-*-20-An-relative-*): New.
 638         (dst16-16-16sa-*): New
 639         (dst16-16-16ar-*): New
 640         (dst32-16-16sa-Unprefixed-*): New
 641         (jsri): Fix operands.
 642         (setzx): Fix encoding.
 643
 644 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 645
 646         * m32r.opc: Formatting.
 647
 648 2006-05-22  Nick Clifton  <nickc@redhat.com>
 649
 650         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 651
 652 2006-04-10  DJ Delorie  <dj@redhat.com>
 653
 654         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 655         decides if this function accepts symbolic constants or not.
 656         (parse_signed_bitbase): Likewise.
 657         (parse_unsigned_bitbase8): Pass the new parameter.
 658         (parse_unsigned_bitbase11): Likewise.
 659         (parse_unsigned_bitbase16): Likewise.
 660         (parse_unsigned_bitbase19): Likewise.
 661         (parse_unsigned_bitbase27): Likewise.
 662         (parse_signed_bitbase8): Likewise.
 663         (parse_signed_bitbase11): Likewise.
 664         (parse_signed_bitbase19): Likewise.
 665
 666 2006-03-13  DJ Delorie  <dj@redhat.com>
 667
 668         * m32c.cpu (Bit3-S): New.
 669         (btst:s): New.
 670         * m32c.opc (parse_bit3_S): New.
 671
 672         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 673         (btst): Add optional :G suffix for MACH32.
 674         (or.b:S): New.
 675         (pop.w:G): Add optional :G suffix for MACH16.
 676         (push.b.imm): Fix syntax.
 677
 678 2006-03-10  DJ Delorie  <dj@redhat.com>
 679
 680         * m32c.cpu (mul.l): New.
 681         (mulu.l): New.
 682
 683 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 684
 685         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 686         an error message otherwise.
 687         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 688         Fix up comments to correctly describe the functions.
 689
 690 2006-02-24  DJ Delorie  <dj@redhat.com>
 691
 692         * m32c.cpu (RL_TYPE): New attribute, with macros.
 693         (Lab-8-24): Add RELAX.
 694         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 695         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 696         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 697         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 698         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 699         attribute.
 700         (jsri16, jsri32): Add 1ADDR attribute.
 701         (jsr32.w, jsr32.a): Add JUMP attribute.
 702
 703 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 704             Anil Paranjape   <anilp1@kpitcummins.com>
 705             Shilin Shakti    <shilins@kpitcummins.com>
 706
 707         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 708         description.
 709         * xc16x.opc: New file containing supporting XC16C routines.
 710
 711 2006-02-10  Nick Clifton  <nickc@redhat.com>
 712
 713         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 714
 715 2006-01-06  DJ Delorie  <dj@redhat.com>
 716
 717         * m32c.cpu (mov.w:q): Fix mode.
 718         (push32.b.imm): Likewise, for the comment.
 719
 720 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 721
 722         Second part of ms1 to mt renaming.
 723         * mt.cpu (define-arch, define-isa): Set name to mt.
 724         (define-mach): Adjust.
 725         * mt.opc (CGEN_ASM_HASH): Update.
 726         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 727         (parse_loopsize, parse_imm16): Adjust.
 728
 729 2005-12-13  DJ Delorie  <dj@redhat.com>
 730
 731         * m32c.cpu (jsri): Fix order so register names aren't treated as
 732         symbols.
 733         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 734         indexwd, indexws): Fix encodings.
 735
 736 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 737
 738         * mt.cpu: Rename from ms1.cpu.
 739         * mt.opc: Rename from ms1.opc.
 740
 741 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 742
 743         * cris.cpu (simplecris-common-writable-specregs)
 744         (simplecris-common-readable-specregs): Split from
 745         simplecris-common-specregs.  All users changed.
 746         (cris-implemented-writable-specregs-v0)
 747         (cris-implemented-readable-specregs-v0): Similar from
 748         cris-implemented-specregs-v0.
 749         (cris-implemented-writable-specregs-v3)
 750         (cris-implemented-readable-specregs-v3)
 751         (cris-implemented-writable-specregs-v8)
 752         (cris-implemented-readable-specregs-v8)
 753         (cris-implemented-writable-specregs-v10)
 754         (cris-implemented-readable-specregs-v10)
 755         (cris-implemented-writable-specregs-v32)
 756         (cris-implemented-readable-specregs-v32): Similar.
 757         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 758         insns and specializations.
 759
 760 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 761
 762         Add ms2
 763         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 764         model.
 765         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 766         f-cb2incr, f-rc3): New fields.
 767         (LOOP): New instruction.
 768         (JAL-HAZARD): New hazard.
 769         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 770         New operands.
 771         (mul, muli, dbnz, iflush): Enable for ms2
 772         (jal, reti): Has JAL-HAZARD.
 773         (ldctxt, ldfb, stfb): Only ms1.
 774         (fbcb): Only ms1,ms1-003.
 775         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 776         fbcbincrs, mfbcbincrs): Enable for ms2.
 777         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 778         * ms1.opc (parse_loopsize): New.
 779         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 780         (print_pcrel): New.
 781
 782 2005-10-28  Dave Brolley  <brolley@redhat.com>
 783
 784         Contribute the following change:
 785         2003-09-24  Dave Brolley  <brolley@redhat.com>
 786
 787         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 788         CGEN_ATTR_VALUE_TYPE.
 789         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 790         Use cgen_bitset_intersect_p.
 791
 792 2005-10-27  DJ Delorie  <dj@redhat.com>
 793
 794         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 795         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 796         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 797         imm operand is needed.
 798         (adjnz, sbjnz): Pass the right operands.
 799         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 800         unary-insn): Add -g variants for opcodes that need to support :G.
 801         (not.BW:G, push.BW:G): Call it.
 802         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 803         stzx16-imm8-imm8-abs16): Fix operand typos.
 804         * m32c.opc (m32c_asm_hash): Support bnCND.
 805         (parse_signed4n, print_signed4n): New.
 806
 807 2005-10-26  DJ Delorie  <dj@redhat.com>
 808
 809         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 810         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 811         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 812         dsp8[sp] is signed.
 813         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 814         (mov.BW:S r0,r1): Fix typo r1l->r1.
 815         (tst): Allow :G suffix.
 816         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 817
 818 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 819
 820         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 821
 822 2005-10-25  DJ Delorie  <dj@redhat.com>
 823
 824         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 825         making one a macro of the other.
 826
 827 2005-10-21  DJ Delorie  <dj@redhat.com>
 828
 829         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 830         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 831         indexld, indexls): .w variants have `1' bit.
 832         (rot32.b): QI, not SI.
 833         (rot32.w): HI, not SI.
 834         (xchg16): HI for .w variant.
 835
 836 2005-10-19  Nick Clifton  <nickc@redhat.com>
 837
 838         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 839
 840 2005-10-18  Andreas Schwab  <schwab@suse.de>
 841
 842         * m32r.opc (parse_slo16): Better version of previous patch.
 843
 844 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 845
 846         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 847         size.
 848
 849 2005-07-25  DJ Delorie  <dj@redhat.com>
 850
 851         * m32c.opc (parse_unsigned8): Add %dsp8().
 852         (parse_signed8): Add %hi8().
 853         (parse_unsigned16): Add %dsp16().
 854         (parse_signed16): Add %lo16() and %hi16().
 855         (parse_lab_5_3): Make valuep a bfd_vma *.
 856
 857 2005-07-18  Nick Clifton  <nickc@redhat.com>
 858
 859         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 860         components.
 861         (f-lab32-jmp-s): Fix insertion sequence.
 862         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 863         (Dsp-40-s8): Make parameter be signed.
 864         (Dsp-40-s16): Likewise.
 865         (Dsp-48-s8): Likewise.
 866         (Dsp-48-s16): Likewise.
 867         (Imm-13-u3): Likewise. (Despite its name!)
 868         (BitBase16-16-s8): Make the parameter be unsigned.
 869         (BitBase16-8-u11-S): Likewise.
 870         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 871         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 872         relaxation.
 873
 874         * m32c.opc: Fix formatting.
 875         Use safe-ctype.h instead of ctype.h
 876         Move duplicated code sequences into a macro.
 877         Fix compile time warnings about signedness mismatches.
 878         Remove dead code.
 879         (parse_lab_5_3): New parser function.
 880
 881 2005-07-16  Jim Blandy  <jimb@redhat.com>
 882
 883         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 884         to represent isa sets.
 885
 886 2005-07-15  Jim Blandy  <jimb@redhat.com>
 887
 888         * m32c.cpu, m32c.opc: Fix copyright.
 889
 890 2005-07-14  Jim Blandy  <jimb@redhat.com>
 891
 892         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 893
 894 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 895
 896         * ms1.opc (print_dollarhex): Correct format string.
 897
 898 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 899
 900         * iq2000.cpu: Include from binutils cpu dir.
 901
 902 2005-07-05  Nick Clifton  <nickc@redhat.com>
 903
 904         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 905         unsigned in order to avoid compile time warnings about sign
 906         conflicts.
 907
 908         * ms1.opc (parse_*): Likewise.
 909         (parse_imm16): Use a "void *" as it is passed both signed and
 910         unsigned arguments.
 911
 912 2005-07-01  Nick Clifton  <nickc@redhat.com>
 913
 914         * frv.opc: Update to ISO C90 function declaration style.
 915         * iq2000.opc: Likewise.
 916         * m32r.opc: Likewise.
 917         * sh.opc: Likewise.
 918
 919 2005-06-15  Dave Brolley  <brolley@redhat.com>
 920
 921         Contributed by Red Hat.
 922         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 923         * ms1.opc: New file.  Written by Stan Cox.
 924
 925 2005-05-10  Nick Clifton  <nickc@redhat.com>
 926
 927         * Update the address and phone number of the FSF organization in
 928         the GPL notices in the following files:
 929         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 930         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 931         sh64-media.cpu, simplify.inc
 932
 933 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 934
 935         * frv.opc (parse_A): Warning fix.
 936
 937 2005-02-23  Nick Clifton  <nickc@redhat.com>
 938
 939         * frv.opc: Fixed compile time warnings about differing signed'ness
 940         of pointers passed to functions.
 941         * m32r.opc: Likewise.
 942
 943 2005-02-11  Nick Clifton  <nickc@redhat.com>
 944
 945         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 946         'bfd_vma *' in order avoid compile time warning message.
 947
 948 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 949
 950         * cris.cpu (mstep): Add missing insn.
 951
 952 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 953
 954         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 955         * frv.cpu: Add support for TLS annotations in loads and calll.
 956         * frv.opc (parse_symbolic_address): New.
 957         (parse_ldd_annotation): New.
 958         (parse_call_annotation): New.
 959         (parse_ld_annotation): New.
 960         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 961         Introduce TLS relocations.
 962         (parse_d12, parse_s12, parse_u12): Likewise.
 963         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 964         (parse_call_label, print_at): New.
 965
 966 2004-12-21  Mikael Starvik  <starvik@axis.com>
 967
 968         * cris.cpu (cris-set-mem): Correct integral write semantics.
 969
 970 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 971
 972         * cris.cpu: New file.
 973
 974 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 975
 976         * iq2000.cpu: Added quotes around macro arguments so that they
 977         will work with newer versions of guile.
 978
 979 2004-10-27  Nick Clifton  <nickc@redhat.com>
 980
 981         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 982         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 983         operand.
 984         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 985         with guile.
 986
 987 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 988
 989         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 990
 991 2004-05-15  Nick Clifton  <nickc@redhat.com>
 992
 993         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 994
 995 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 996
 997         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 998
 999 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1000
1001         * frv.cpu (define-arch frv): Add fr450 mach.
1002         (define-mach fr450): New.
1003         (define-model fr450): New.  Add profile units to every fr450 insn.
1004         (define-attr UNIT): Add MDCUTSSI.
1005         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
1006         (define-attr AUDIO): New boolean.
1007         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
1008         (f-LRA-null, f-TLBPR-null): New fields.
1009         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
1010         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
1011         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
1012         (LRA-null, TLBPR-null): New macros.
1013         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
1014         (load-real-address): New macro.
1015         (lrai, lrad, tlbpr): New instructions.
1016         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
1017         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
1018         (mdcutssi): Change UNIT attribute to MDCUTSSI.
1019         (media-low-clear-semantics, media-scope-limit-semantics)
1020         (media-quad-limit, media-quad-shift): New macros.
1021         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
1022         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
1023         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
1024         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
1025         (fr450_unit_mapping): New array.
1026         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
1027         for new MDCUTSSI unit.
1028         (fr450_check_insn_major_constraints): New function.
1029         (check_insn_major_constraints): Use it.
1030
1031 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1032
1033         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1034         (scutss): Change unit to I0.
1035         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1036         (mqsaths): Fix FR400-MAJOR categorization.
1037         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1038         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1039         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1040         combinations.
1041
1042 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1043
1044         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1045         (rstb, rsth, rst, rstd, rstq): Delete.
1046         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1047
1048 2004-02-23  Nick Clifton  <nickc@redhat.com>
1049
1050         * Apply these patches from Renesas:
1051
1052         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1053
1054         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1055         disassembling codes for 0x*2 addresses.
1056
1057         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1058
1059         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1060
1061         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1062
1063         * cpu/m32r.cpu : Add new model m32r2.
1064         Add new instructions.
1065         Replace occurrances of 'Mitsubishi' with 'Renesas'.
1066         Changed PIPE attr of push from O to OS.
1067         Care for Little-endian of M32R.
1068         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1069         Care for Little-endian of M32R.
1070         (parse_slo16): signed extension for value.
1071
1072 2004-02-20  Andrew Cagney  <cagney@redhat.com>
1073
1074         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
1075         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1076
1077         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1078         written by Ben Elliston.
1079
1080 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1081
1082         * frv.cpu (UNIT): Add IACC.
1083         (iacc-multiply-r-r): Use it.
1084         * frv.opc (fr400_unit_mapping): Add entry for IACC.
1085         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1086
1087 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1088
1089         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1090         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1091         cut&paste errors in shifting/truncating numerical operands.
1092         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
1093         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1094         (parse_uslo16): Likewise.
1095         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1096         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1097         (parse_s12): Likewise.
1098         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1099         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1100         (parse_uslo16): Likewise.
1101         (parse_uhi16): Parse gothi and gotfuncdeschi.
1102         (parse_d12): Parse got12 and gotfuncdesc12.
1103         (parse_s12): Likewise.
1104
1105 2003-10-10  Dave Brolley  <brolley@redhat.com>
1106
1107         * frv.cpu (dnpmop): New p-macro.
1108         (GRdoublek): Use dnpmop.
1109         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1110         (store-double-r-r): Use (.sym regtype doublek).
1111         (r-store-double): Ditto.
1112         (store-double-r-r-u): Ditto.
1113         (conditional-store-double): Ditto.
1114         (conditional-store-double-u): Ditto.
1115         (store-double-r-simm): Ditto.
1116         (fmovs): Assign to UNIT FMALL.
1117
1118 2003-10-06  Dave Brolley  <brolley@redhat.com>
1119
1120         * frv.cpu, frv.opc: Add support for fr550.
1121
1122 2003-09-24  Dave Brolley  <brolley@redhat.com>
1123
1124         * frv.cpu (u-commit): New modelling unit for fr500.
1125         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1126         (commit-r): Use u-commit model for fr500.
1127         (commit): Ditto.
1128         (conditional-float-binary-op): Take profiling data as an argument.
1129         Update callers.
1130         (ne-float-binary-op): Ditto.
1131
1132 2003-09-19  Michael Snyder  <msnyder@redhat.com>
1133
1134         * frv.cpu (nldqi): Delete unimplemented instruction.
1135
1136 2003-09-12  Dave Brolley  <brolley@redhat.com>
1137
1138         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1139         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1140         frv_ref_SI to get input register referenced for profiling.
1141         (clear-ne-flag-all): Pass insn profiling in as an argument.
1142         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1143
1144 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1145
1146         * frv.cpu: Typographical corrections.
1147
1148 2003-09-09  Dave Brolley  <brolley@redhat.com>
1149
1150         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1151         (conditional-media-dual-complex, media-quad-complex): Likewise.
1152
1153 2003-09-04  Dave Brolley  <brolley@redhat.com>
1154
1155         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1156         Update all callers.
1157         (conditional-register-transfer): Ditto.
1158         (cache-preload): Ditto.
1159         (floating-point-conversion): Ditto.
1160         (floating-point-neg): Ditto.
1161         (float-abs): Ditto.
1162         (float-binary-op-s): Ditto.
1163         (conditional-float-binary-op): Ditto.
1164         (ne-float-binary-op): Ditto.
1165         (float-dual-arith): Ditto.
1166         (ne-float-dual-arith): Ditto.
1167
1168 2003-09-03  Dave Brolley  <brolley@redhat.com>
1169
1170         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1171         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1172         MCLRACC-1.
1173         (A): Removed operand.
1174         (A0,A1): New operands replace operand A.
1175         (mnop): Now a real insn
1176         (mclracc): Removed insn.
1177         (mclracc-0, mclracc-1): New insns replace mclracc.
1178         (all insns): Use new UNIT attributes.
1179
1180 2003-08-21  Nick Clifton  <nickc@redhat.com>
1181
1182         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1183         and u-media-dual-btoh with output parameter.
1184         (cmbtoh): Add profiling hack.
1185
1186 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1187
1188         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1189
1190 2003-06-10  Doug Evans  <dje@sebabeach.org>
1191
1192         * frv.cpu: Add IDOC attribute.
1193
1194 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1195
1196         Contributed by Red Hat.
1197         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1198         Stan Cox, and Frank Ch. Eigler.
1199         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1200         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1201         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1202         * iq10.cpu: New file.  Written by Jeff Johnston.
1203
1204 2003-06-05  Nick Clifton  <nickc@redhat.com>
1205
1206         * frv.cpu (FRintieven): New operand.  An even-numbered only
1207         version of the FRinti operand.
1208         (FRintjeven): Likewise for FRintj.
1209         (FRintkeven): Likewise for FRintk.
1210         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1211         media-quad-arith-sat-semantics, media-quad-arith-sat,
1212         conditional-media-quad-arith-sat, mdunpackh,
1213         media-quad-multiply-semantics, media-quad-multiply,
1214         conditional-media-quad-multiply, media-quad-complex-i,
1215         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1216         conditional-media-quad-multiply-acc, munpackh,
1217         media-quad-multiply-cross-acc-semantics, mdpackh,
1218         media-quad-multiply-cross-acc, mbtoh-semantics,
1219         media-quad-cross-multiply-cross-acc-semantics,
1220         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1221         media-quad-cross-multiply-acc-semantics, cmbtoh,
1222         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1223         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1224         cmhtob): Use new operands.
1225         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1226         (parse_even_register): New function.
1227
1228 2003-06-03  Nick Clifton  <nickc@redhat.com>
1229
1230         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1231         immediate value not unsigned.
1232
1233 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1234
1235         Contributed by Red Hat.
1236         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1237         and Eric Christopher.
1238         * frv.opc: New file.  Written by Catherine Moore, and Dave
1239         Brolley.
1240         * simplify.inc: New file.  Written by Doug Evans.
1241
1242 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1243
1244         * New file.
1245
1246 \f
1247 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1248
1249 Copying and distribution of this file, with or without modification,
1250 are permitted in any medium without royalty provided the copyright
1251 notice and this notice are preserved.
1252
1253 Local Variables:
1254 mode: change-log
1255 left-margin: 8
1256 fill-column: 74
1257 version-control: never
1258 End: