1 2020-05-21 Alan Modra <amodra@gmail.com>
3 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
4 "if (x) free (x)" with "free (x)".
6 2020-05-19 Stafford Horne <shorne@gmail.com>
9 * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
10 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
11 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
12 * or1kcommon.cpu (h-fdr): Remove hardware.
13 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
14 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
15 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
16 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
17 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
19 2020-02-16 David Faust <david.faust@oracle.com>
21 * bpf.cpu (define-cond-jump-insn): Renamed from djci.
22 (dcji) New version with support for JMP32
24 2020-02-03 Alan Modra <amodra@gmail.com>
26 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
28 2020-02-01 Alan Modra <amodra@gmail.com>
30 * frv.cpu (f-u12): Multiply rather than left shift signed values.
31 (f-label16, f-label24): Likewise.
33 2020-01-30 Alan Modra <amodra@gmail.com>
35 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
36 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
37 (f-dst32-rn-prefixed-QI): Likewise.
38 (f-dsp-32-s32): Mask before shifting left.
39 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
40 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
42 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
43 (h-gr-SI): Mask before shifting.
45 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
47 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
48 (neg and neg32) use OP_SRC_K even if they operate only in
51 2020-01-18 Nick Clifton <nickc@redhat.com>
53 Binutils 2.34 branch created.
55 2020-01-13 Alan Modra <amodra@gmail.com>
57 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
58 left shift signed values.
60 2020-01-06 Alan Modra <amodra@gmail.com>
62 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
63 bits before shifting rather than masking after shifting.
64 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
65 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
66 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
67 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
69 2020-01-04 Alan Modra <amodra@gmail.com>
71 * m32r.cpu (f-disp8): Avoid left shift of negative values.
72 (f-disp16, f-disp24): Likewise.
74 2019-12-23 Alan Modra <amodra@gmail.com>
76 * iq2000.cpu (f-offset): Avoid left shift of negative values.
78 2019-12-20 Alan Modra <amodra@gmail.com>
80 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
82 2019-12-17 Alan Modra <amodra@gmail.com>
84 * bpf.cpu (f-imm64): Avoid signed overflow.
86 2019-12-16 Alan Modra <amodra@gmail.com>
88 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
90 2019-12-11 Alan Modra <amodra@gmail.com>
92 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
93 * lm32.cpu (f-branch, f-vall): Likewise.
94 * m32.cpu (f-lab-8-16): Likewise.
96 2019-12-11 Alan Modra <amodra@gmail.com>
98 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
99 shift left to avoid UB on left shift of negative values.
101 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
103 * bpf.cpu: Fix comment describing the 128-bit instruction format.
105 2019-09-09 Phil Blundell <pb@pbcl.net>
107 binutils 2.33 branch created.
109 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
111 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
114 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
116 * bpf.cpu (dlabs): New pmacro.
119 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
121 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
122 explicit 'dst' argument.
124 2019-06-13 Stafford Horne <shorne@gmail.com>
126 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
128 2019-06-13 Stafford Horne <shorne@gmail.com>
130 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
131 (l-adrp): Improve comment.
133 2019-06-13 Stafford Horne <shorne@gmail.com>
135 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
136 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
137 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
138 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
139 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
140 float-setflag-unordered-symantics): New pmacro for instruction
142 (float-setflag-insn): Update to use float-setflag-insn-base.
143 (float-setflag-unordered-insn): New pmacro for generating instructions.
145 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
146 Stafford Horne <shorne@gmail.com>
148 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
149 (ORFPX-MACHS): Removed pmacro.
150 * or1k.opc (or1k_cgen_insn_supported): New function.
151 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
152 (parse_regpair, print_regpair): New functions.
153 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
155 (h-fdr): Update comment to indicate or64.
156 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
157 (h-fd32r): New hardware for 64-bit fpu registers.
158 (h-i64r): New hardware for 64-bit int registers.
159 * or1korbis.cpu (f-resv-8-1): New field.
160 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
161 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
162 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
163 (h-roff1): New hardware.
164 (double-field-and-ops mnemonic): New pmacro to generate operations
165 rDD32F, rAD32F, rBD32F, rDDI and rADI.
166 (float-regreg-insn): Update single precision generator to MACH
167 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
168 (float-setflag-insn): Update single precision generator to MACH
169 ORFPX32-MACHS. Fix double instructions from single to double
170 precision. Add generator for or32 64-bit instructions.
171 (float-cust-insn cust-num): Update single precision generator to MACH
172 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
173 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
175 (lf-rem-d): Fix operation from mod to rem.
176 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
177 (lf-itof-d): Fix operands from single to double.
178 (lf-ftoi-d): Update operand mode from DI to WI.
180 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
185 2018-06-24 Nick Clifton <nickc@redhat.com>
189 2018-10-05 Richard Henderson <rth@twiddle.net>
190 Stafford Horne <shorne@gmail.com>
192 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
193 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
194 (l-mul): Fix overflow support and indentation.
195 (l-mulu): Fix overflow support and indentation.
196 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
197 (l-div); Remove incorrect carry behavior.
198 (l-divu): Fix carry and overflow behavior.
199 (l-mac): Add overflow support.
200 (l-msb, l-msbu): Add carry and overflow support.
202 2018-10-05 Richard Henderson <rth@twiddle.net>
204 * or1k.opc (parse_disp26): Add support for plta() relocations.
205 (parse_disp21): New function.
206 (or1k_rclass): New enum.
207 (or1k_rtype): New enum.
208 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
209 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
210 (parse_imm16): Add support for the new 21bit and 13bit relocations.
211 * or1korbis.cpu (f-disp26): Don't assume SI.
212 (f-disp21): New pc-relative 21-bit 13 shifted to right.
213 (insn-opcode): Add ADRP.
214 (l-adrp): New instruction.
216 2018-10-05 Richard Henderson <rth@twiddle.net>
218 * or1k.opc: Add RTYPE_ enum.
219 (INVALID_STORE_RELOC): New string.
220 (or1k_imm16_relocs): New array array.
221 (parse_reloc): New static function that just does the parsing.
222 (parse_imm16): New static function for generic parsing.
223 (parse_simm16): Change to just call parse_imm16.
224 (parse_simm16_split): New function.
225 (parse_uimm16): Change to call parse_imm16.
226 (parse_uimm16_split): New function.
227 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
228 (uimm16-split): Change to use new uimm16_split.
230 2018-07-24 Alan Modra <amodra@gmail.com>
233 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
235 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
237 * or1kcommon.cpu (spr-reg-info): Typo fix.
239 2018-03-03 Alan Modra <amodra@gmail.com>
241 * frv.opc: Include opintl.h.
242 (add_next_to_vliw): Use opcodes_error_handler to print error.
243 Standardize error message.
244 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
246 2018-01-13 Nick Clifton <nickc@redhat.com>
250 2017-03-15 Stafford Horne <shorne@gmail.com>
252 * or1kcommon.cpu: Add pc set semantics to also update ppc.
254 2016-10-06 Alan Modra <amodra@gmail.com>
256 * mep.opc (expand_string): Add fall through comment.
258 2016-03-03 Alan Modra <amodra@gmail.com>
260 * fr30.cpu (f-m4): Replace bogus comment with a better guess
261 at what is really going on.
263 2016-03-02 Alan Modra <amodra@gmail.com>
265 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
267 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
269 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
270 a constant to better align disassembler output.
272 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
274 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
276 2014-06-12 Alan Modra <amodra@gmail.com>
278 * or1k.opc: Whitespace fixes.
280 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
282 * or1korbis.cpu (h-atomic-reserve): New hardware.
283 (h-atomic-address): Likewise.
284 (insn-opcode): Add opcodes for LWA and SWA.
285 (atomic-reserve): New operand.
286 (atomic-address): Likewise.
287 (l-lwa, l-swa): New instructions.
288 (l-lbs): Fix typo in comment.
289 (store-insn): Clear atomic reserve on store to atomic-address.
290 Fix register names in fmt field.
292 2014-04-22 Christian Svensson <blue@cmd.nu>
294 * openrisc.cpu: Delete.
295 * openrisc.opc: Delete.
296 * or1k.cpu: New file.
297 * or1k.opc: New file.
298 * or1kcommon.cpu: New file.
299 * or1korbis.cpu: New file.
300 * or1korfpx.cpu: New file.
302 2013-12-07 Mike Frysinger <vapier@gentoo.org>
304 * epiphany.opc: Remove +x file mode.
306 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
309 * lm32.cpu (Control and status registers): Add CFG2, PSW,
310 TLBVADDR, TLBPADDR and TLBBADVADDR.
312 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
313 Joern Rennecke <joern.rennecke@embecosm.com>
315 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
316 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
317 (testset-insn): Add NO_DIS attribute to t.l.
318 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
319 (move-insns): Add NO-DIS attribute to cmov.l.
320 (op-mmr-movts): Add NO-DIS attribute to movts.l.
321 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
322 (op-rrr): Add NO-DIS attribute to .l.
323 (shift-rrr): Add NO-DIS attribute to .l.
324 (op-shift-rri): Add NO-DIS attribute to i32.l.
325 (bitrl, movtl): Add NO-DIS attribute.
326 (op-iextrrr): Add NO-DIS attribute to .l
327 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
328 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
330 2012-02-27 Alan Modra <amodra@gmail.com>
332 * mt.opc (print_dollarhex): Trim values to 32 bits.
334 2011-12-15 Nick Clifton <nickc@redhat.com>
336 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
339 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
341 * epiphany.opc (parse_branch_addr): Fix type of valuep.
342 Cast value before printing it as a long.
343 (parse_postindex): Fix type of valuep.
345 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
347 * cpu/epiphany.cpu: New file.
348 * cpu/epiphany.opc: New file.
350 2011-08-22 Nick Clifton <nickc@redhat.com>
352 * fr30.cpu: Newly contributed file.
353 * fr30.opc: Likewise.
354 * ip2k.cpu: Likewise.
355 * ip2k.opc: Likewise.
356 * mep-avc.cpu: Likewise.
357 * mep-avc2.cpu: Likewise.
358 * mep-c5.cpu: Likewise.
359 * mep-core.cpu: Likewise.
360 * mep-default.cpu: Likewise.
361 * mep-ext-cop.cpu: Likewise.
362 * mep-fmax.cpu: Likewise.
363 * mep-h1.cpu: Likewise.
364 * mep-ivc2.cpu: Likewise.
365 * mep-rhcop.cpu: Likewise.
366 * mep-sample-ucidsp.cpu: Likewise.
369 * openrisc.cpu: Likewise.
370 * openrisc.opc: Likewise.
371 * xstormy16.cpu: Likewise.
372 * xstormy16.opc: Likewise.
374 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
376 * frv.opc: #undef DEBUG.
378 2010-07-03 DJ Delorie <dj@delorie.com>
380 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
382 2010-02-11 Doug Evans <dje@sebabeach.org>
384 * m32r.cpu (HASH-PREFIX): Delete.
385 (duhpo, dshpo): New pmacros.
386 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
387 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
388 attribute, define with dshpo.
389 (uimm24): Delete HASH-PREFIX attribute.
390 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
391 (print_signed_with_hash_prefix): New function.
392 (print_unsigned_with_hash_prefix): New function.
393 * xc16x.cpu (dowh): New pmacro.
394 (upof16): Define with dowh, specify print handler.
395 (qbit, qlobit, qhibit): Ditto.
397 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
398 (print_with_dot_prefix): New functions.
399 (print_with_pof_prefix, print_with_pag_prefix): New functions.
401 2010-01-24 Doug Evans <dje@sebabeach.org>
403 * frv.cpu (floating-point-conversion): Update call to fp conv op.
404 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
405 conditional-floating-point-conversion, ne-floating-point-conversion,
406 float-parallel-mul-add-double-semantics): Ditto.
408 2010-01-05 Doug Evans <dje@sebabeach.org>
410 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
411 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
413 2010-01-02 Doug Evans <dje@sebabeach.org>
415 * m32c.opc (parse_signed16): Fix typo.
417 2009-12-11 Nick Clifton <nickc@redhat.com>
419 * frv.opc: Fix shadowed variable warnings.
420 * m32c.opc: Fix shadowed variable warnings.
422 2009-11-14 Doug Evans <dje@sebabeach.org>
424 Must use VOID expression in VOID context.
425 * xc16x.cpu (mov4): Fix mode of `sequence'.
426 (mov9, mov10): Ditto.
427 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
428 (callr, callseg, calls, trap, rets, reti): Ditto.
429 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
430 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
431 (exts, exts1, extsr, extsr1, prior): Ditto.
433 2009-10-23 Doug Evans <dje@sebabeach.org>
435 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
436 cgen-ops.h -> cgen/basic-ops.h.
438 2009-09-25 Alan Modra <amodra@bigpond.net.au>
440 * m32r.cpu (stb-plus): Typo fix.
442 2009-09-23 Doug Evans <dje@sebabeach.org>
444 * m32r.cpu (sth-plus): Fix address mode and calculation.
446 (clrpsw): Fix mask calculation.
447 (bset, bclr, btst): Make mode in bit calculation match expression.
449 * xc16x.cpu (rtl-version): Set to 0.8.
450 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
451 make uppercase. Remove unnecessary name-prefix spec.
452 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
453 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
454 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
455 (h-cr): New hardware.
456 (muls): Comment out parts that won't compile, add fixme.
457 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
458 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
459 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
461 2009-07-16 Doug Evans <dje@sebabeach.org>
463 * cpu/simplify.inc (*): One line doc strings don't need \n.
464 (df): Invoke define-full-ifield instead of claiming it's an alias.
466 (dnop): Mark as deprecated.
468 2009-06-22 Alan Modra <amodra@bigpond.net.au>
470 * m32c.opc (parse_lab_5_3): Use correct enum.
472 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
474 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
475 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
476 (media-arith-sat-semantics): Explicitly sign- or zero-extend
477 arguments of "operation" to DI using "mode" and the new pmacros.
479 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
481 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
484 2008-12-23 Jon Beniston <jon@beniston.com>
486 * lm32.cpu: New file.
487 * lm32.opc: New file.
489 2008-01-29 Alan Modra <amodra@bigpond.net.au>
491 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
494 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
496 * cris.cpu (movs, movu): Use result of extension operation when
499 2007-07-04 Nick Clifton <nickc@redhat.com>
501 * cris.cpu: Update copyright notice to refer to GPLv3.
502 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
503 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
504 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
506 * iq2000.cpu: Fix copyright notice to refer to FSF.
508 2007-04-30 Mark Salter <msalter@sadr.localdomain>
510 * frv.cpu (spr-names): Support new coprocessor SPR registers.
512 2007-04-20 Nick Clifton <nickc@redhat.com>
514 * xc16x.cpu: Restore after accidentally overwriting this file with
517 2007-03-29 DJ Delorie <dj@redhat.com>
519 * m32c.cpu (Imm-8-s4n): Fix print hook.
520 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
521 (arith-jnz-imm4-dst-defn): Make relaxable.
522 (arith-jnz16-imm4-dst-defn): Fix encodings.
524 2007-03-20 DJ Delorie <dj@redhat.com>
526 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
528 (src16-16-20-An-relative-*): New.
529 (dst16-*-20-An-relative-*): New.
530 (dst16-16-16sa-*): New
531 (dst16-16-16ar-*): New
532 (dst32-16-16sa-Unprefixed-*): New
533 (jsri): Fix operands.
534 (setzx): Fix encoding.
536 2007-03-08 Alan Modra <amodra@bigpond.net.au>
538 * m32r.opc: Formatting.
540 2006-05-22 Nick Clifton <nickc@redhat.com>
542 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
544 2006-04-10 DJ Delorie <dj@redhat.com>
546 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
547 decides if this function accepts symbolic constants or not.
548 (parse_signed_bitbase): Likewise.
549 (parse_unsigned_bitbase8): Pass the new parameter.
550 (parse_unsigned_bitbase11): Likewise.
551 (parse_unsigned_bitbase16): Likewise.
552 (parse_unsigned_bitbase19): Likewise.
553 (parse_unsigned_bitbase27): Likewise.
554 (parse_signed_bitbase8): Likewise.
555 (parse_signed_bitbase11): Likewise.
556 (parse_signed_bitbase19): Likewise.
558 2006-03-13 DJ Delorie <dj@redhat.com>
560 * m32c.cpu (Bit3-S): New.
562 * m32c.opc (parse_bit3_S): New.
564 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
565 (btst): Add optional :G suffix for MACH32.
567 (pop.w:G): Add optional :G suffix for MACH16.
568 (push.b.imm): Fix syntax.
570 2006-03-10 DJ Delorie <dj@redhat.com>
572 * m32c.cpu (mul.l): New.
575 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
577 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
578 an error message otherwise.
579 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
580 Fix up comments to correctly describe the functions.
582 2006-02-24 DJ Delorie <dj@redhat.com>
584 * m32c.cpu (RL_TYPE): New attribute, with macros.
585 (Lab-8-24): Add RELAX.
586 (unary-insn-defn-g, binary-arith-imm-dst-defn,
587 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
588 (binary-arith-src-dst-defn): Add 2ADDR attribute.
589 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
590 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
592 (jsri16, jsri32): Add 1ADDR attribute.
593 (jsr32.w, jsr32.a): Add JUMP attribute.
595 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
596 Anil Paranjape <anilp1@kpitcummins.com>
597 Shilin Shakti <shilins@kpitcummins.com>
599 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
601 * xc16x.opc: New file containing supporting XC16C routines.
603 2006-02-10 Nick Clifton <nickc@redhat.com>
605 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
607 2006-01-06 DJ Delorie <dj@redhat.com>
609 * m32c.cpu (mov.w:q): Fix mode.
610 (push32.b.imm): Likewise, for the comment.
612 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
614 Second part of ms1 to mt renaming.
615 * mt.cpu (define-arch, define-isa): Set name to mt.
616 (define-mach): Adjust.
617 * mt.opc (CGEN_ASM_HASH): Update.
618 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
619 (parse_loopsize, parse_imm16): Adjust.
621 2005-12-13 DJ Delorie <dj@redhat.com>
623 * m32c.cpu (jsri): Fix order so register names aren't treated as
625 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
626 indexwd, indexws): Fix encodings.
628 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
630 * mt.cpu: Rename from ms1.cpu.
631 * mt.opc: Rename from ms1.opc.
633 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
635 * cris.cpu (simplecris-common-writable-specregs)
636 (simplecris-common-readable-specregs): Split from
637 simplecris-common-specregs. All users changed.
638 (cris-implemented-writable-specregs-v0)
639 (cris-implemented-readable-specregs-v0): Similar from
640 cris-implemented-specregs-v0.
641 (cris-implemented-writable-specregs-v3)
642 (cris-implemented-readable-specregs-v3)
643 (cris-implemented-writable-specregs-v8)
644 (cris-implemented-readable-specregs-v8)
645 (cris-implemented-writable-specregs-v10)
646 (cris-implemented-readable-specregs-v10)
647 (cris-implemented-writable-specregs-v32)
648 (cris-implemented-readable-specregs-v32): Similar.
649 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
650 insns and specializations.
652 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
655 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
657 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
658 f-cb2incr, f-rc3): New fields.
659 (LOOP): New instruction.
660 (JAL-HAZARD): New hazard.
661 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
663 (mul, muli, dbnz, iflush): Enable for ms2
664 (jal, reti): Has JAL-HAZARD.
665 (ldctxt, ldfb, stfb): Only ms1.
666 (fbcb): Only ms1,ms1-003.
667 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
668 fbcbincrs, mfbcbincrs): Enable for ms2.
669 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
670 * ms1.opc (parse_loopsize): New.
671 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
674 2005-10-28 Dave Brolley <brolley@redhat.com>
676 Contribute the following change:
677 2003-09-24 Dave Brolley <brolley@redhat.com>
679 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
680 CGEN_ATTR_VALUE_TYPE.
681 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
682 Use cgen_bitset_intersect_p.
684 2005-10-27 DJ Delorie <dj@redhat.com>
686 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
687 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
688 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
689 imm operand is needed.
690 (adjnz, sbjnz): Pass the right operands.
691 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
692 unary-insn): Add -g variants for opcodes that need to support :G.
693 (not.BW:G, push.BW:G): Call it.
694 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
695 stzx16-imm8-imm8-abs16): Fix operand typos.
696 * m32c.opc (m32c_asm_hash): Support bnCND.
697 (parse_signed4n, print_signed4n): New.
699 2005-10-26 DJ Delorie <dj@redhat.com>
701 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
702 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
703 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
705 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
706 (mov.BW:S r0,r1): Fix typo r1l->r1.
707 (tst): Allow :G suffix.
708 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
710 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
712 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
714 2005-10-25 DJ Delorie <dj@redhat.com>
716 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
717 making one a macro of the other.
719 2005-10-21 DJ Delorie <dj@redhat.com>
721 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
722 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
723 indexld, indexls): .w variants have `1' bit.
724 (rot32.b): QI, not SI.
725 (rot32.w): HI, not SI.
726 (xchg16): HI for .w variant.
728 2005-10-19 Nick Clifton <nickc@redhat.com>
730 * m32r.opc (parse_slo16): Fix bad application of previous patch.
732 2005-10-18 Andreas Schwab <schwab@suse.de>
734 * m32r.opc (parse_slo16): Better version of previous patch.
736 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
738 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
741 2005-07-25 DJ Delorie <dj@redhat.com>
743 * m32c.opc (parse_unsigned8): Add %dsp8().
744 (parse_signed8): Add %hi8().
745 (parse_unsigned16): Add %dsp16().
746 (parse_signed16): Add %lo16() and %hi16().
747 (parse_lab_5_3): Make valuep a bfd_vma *.
749 2005-07-18 Nick Clifton <nickc@redhat.com>
751 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
753 (f-lab32-jmp-s): Fix insertion sequence.
754 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
755 (Dsp-40-s8): Make parameter be signed.
756 (Dsp-40-s16): Likewise.
757 (Dsp-48-s8): Likewise.
758 (Dsp-48-s16): Likewise.
759 (Imm-13-u3): Likewise. (Despite its name!)
760 (BitBase16-16-s8): Make the parameter be unsigned.
761 (BitBase16-8-u11-S): Likewise.
762 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
763 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
766 * m32c.opc: Fix formatting.
767 Use safe-ctype.h instead of ctype.h
768 Move duplicated code sequences into a macro.
769 Fix compile time warnings about signedness mismatches.
771 (parse_lab_5_3): New parser function.
773 2005-07-16 Jim Blandy <jimb@redhat.com>
775 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
776 to represent isa sets.
778 2005-07-15 Jim Blandy <jimb@redhat.com>
780 * m32c.cpu, m32c.opc: Fix copyright.
782 2005-07-14 Jim Blandy <jimb@redhat.com>
784 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
786 2005-07-14 Alan Modra <amodra@bigpond.net.au>
788 * ms1.opc (print_dollarhex): Correct format string.
790 2005-07-06 Alan Modra <amodra@bigpond.net.au>
792 * iq2000.cpu: Include from binutils cpu dir.
794 2005-07-05 Nick Clifton <nickc@redhat.com>
796 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
797 unsigned in order to avoid compile time warnings about sign
800 * ms1.opc (parse_*): Likewise.
801 (parse_imm16): Use a "void *" as it is passed both signed and
804 2005-07-01 Nick Clifton <nickc@redhat.com>
806 * frv.opc: Update to ISO C90 function declaration style.
807 * iq2000.opc: Likewise.
808 * m32r.opc: Likewise.
811 2005-06-15 Dave Brolley <brolley@redhat.com>
813 Contributed by Red Hat.
814 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
815 * ms1.opc: New file. Written by Stan Cox.
817 2005-05-10 Nick Clifton <nickc@redhat.com>
819 * Update the address and phone number of the FSF organization in
820 the GPL notices in the following files:
821 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
822 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
823 sh64-media.cpu, simplify.inc
825 2005-02-24 Alan Modra <amodra@bigpond.net.au>
827 * frv.opc (parse_A): Warning fix.
829 2005-02-23 Nick Clifton <nickc@redhat.com>
831 * frv.opc: Fixed compile time warnings about differing signed'ness
832 of pointers passed to functions.
833 * m32r.opc: Likewise.
835 2005-02-11 Nick Clifton <nickc@redhat.com>
837 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
838 'bfd_vma *' in order avoid compile time warning message.
840 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
842 * cris.cpu (mstep): Add missing insn.
844 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
846 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
847 * frv.cpu: Add support for TLS annotations in loads and calll.
848 * frv.opc (parse_symbolic_address): New.
849 (parse_ldd_annotation): New.
850 (parse_call_annotation): New.
851 (parse_ld_annotation): New.
852 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
853 Introduce TLS relocations.
854 (parse_d12, parse_s12, parse_u12): Likewise.
855 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
856 (parse_call_label, print_at): New.
858 2004-12-21 Mikael Starvik <starvik@axis.com>
860 * cris.cpu (cris-set-mem): Correct integral write semantics.
862 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
864 * cris.cpu: New file.
866 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
868 * iq2000.cpu: Added quotes around macro arguments so that they
869 will work with newer versions of guile.
871 2004-10-27 Nick Clifton <nickc@redhat.com>
873 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
874 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
876 * iq2000.cpu (dnop index): Rename to _index to avoid complications
879 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
881 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
883 2004-05-15 Nick Clifton <nickc@redhat.com>
885 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
887 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
889 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
891 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
893 * frv.cpu (define-arch frv): Add fr450 mach.
894 (define-mach fr450): New.
895 (define-model fr450): New. Add profile units to every fr450 insn.
896 (define-attr UNIT): Add MDCUTSSI.
897 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
898 (define-attr AUDIO): New boolean.
899 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
900 (f-LRA-null, f-TLBPR-null): New fields.
901 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
902 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
903 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
904 (LRA-null, TLBPR-null): New macros.
905 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
906 (load-real-address): New macro.
907 (lrai, lrad, tlbpr): New instructions.
908 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
909 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
910 (mdcutssi): Change UNIT attribute to MDCUTSSI.
911 (media-low-clear-semantics, media-scope-limit-semantics)
912 (media-quad-limit, media-quad-shift): New macros.
913 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
914 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
915 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
916 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
917 (fr450_unit_mapping): New array.
918 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
919 for new MDCUTSSI unit.
920 (fr450_check_insn_major_constraints): New function.
921 (check_insn_major_constraints): Use it.
923 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
925 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
926 (scutss): Change unit to I0.
927 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
928 (mqsaths): Fix FR400-MAJOR categorization.
929 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
930 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
931 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
934 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
936 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
937 (rstb, rsth, rst, rstd, rstq): Delete.
938 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
940 2004-02-23 Nick Clifton <nickc@redhat.com>
942 * Apply these patches from Renesas:
944 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
946 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
947 disassembling codes for 0x*2 addresses.
949 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
951 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
953 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
955 * cpu/m32r.cpu : Add new model m32r2.
956 Add new instructions.
957 Replace occurrances of 'Mitsubishi' with 'Renesas'.
958 Changed PIPE attr of push from O to OS.
959 Care for Little-endian of M32R.
960 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
961 Care for Little-endian of M32R.
962 (parse_slo16): signed extension for value.
964 2004-02-20 Andrew Cagney <cagney@redhat.com>
966 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
967 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
969 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
970 written by Ben Elliston.
972 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
974 * frv.cpu (UNIT): Add IACC.
975 (iacc-multiply-r-r): Use it.
976 * frv.opc (fr400_unit_mapping): Add entry for IACC.
977 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
979 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
981 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
982 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
983 cut&paste errors in shifting/truncating numerical operands.
984 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
985 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
986 (parse_uslo16): Likewise.
987 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
988 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
989 (parse_s12): Likewise.
990 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
991 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
992 (parse_uslo16): Likewise.
993 (parse_uhi16): Parse gothi and gotfuncdeschi.
994 (parse_d12): Parse got12 and gotfuncdesc12.
995 (parse_s12): Likewise.
997 2003-10-10 Dave Brolley <brolley@redhat.com>
999 * frv.cpu (dnpmop): New p-macro.
1000 (GRdoublek): Use dnpmop.
1001 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1002 (store-double-r-r): Use (.sym regtype doublek).
1003 (r-store-double): Ditto.
1004 (store-double-r-r-u): Ditto.
1005 (conditional-store-double): Ditto.
1006 (conditional-store-double-u): Ditto.
1007 (store-double-r-simm): Ditto.
1008 (fmovs): Assign to UNIT FMALL.
1010 2003-10-06 Dave Brolley <brolley@redhat.com>
1012 * frv.cpu, frv.opc: Add support for fr550.
1014 2003-09-24 Dave Brolley <brolley@redhat.com>
1016 * frv.cpu (u-commit): New modelling unit for fr500.
1017 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1018 (commit-r): Use u-commit model for fr500.
1020 (conditional-float-binary-op): Take profiling data as an argument.
1022 (ne-float-binary-op): Ditto.
1024 2003-09-19 Michael Snyder <msnyder@redhat.com>
1026 * frv.cpu (nldqi): Delete unimplemented instruction.
1028 2003-09-12 Dave Brolley <brolley@redhat.com>
1030 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1031 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1032 frv_ref_SI to get input register referenced for profiling.
1033 (clear-ne-flag-all): Pass insn profiling in as an argument.
1034 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1036 2003-09-11 Michael Snyder <msnyder@redhat.com>
1038 * frv.cpu: Typographical corrections.
1040 2003-09-09 Dave Brolley <brolley@redhat.com>
1042 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1043 (conditional-media-dual-complex, media-quad-complex): Likewise.
1045 2003-09-04 Dave Brolley <brolley@redhat.com>
1047 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1049 (conditional-register-transfer): Ditto.
1050 (cache-preload): Ditto.
1051 (floating-point-conversion): Ditto.
1052 (floating-point-neg): Ditto.
1054 (float-binary-op-s): Ditto.
1055 (conditional-float-binary-op): Ditto.
1056 (ne-float-binary-op): Ditto.
1057 (float-dual-arith): Ditto.
1058 (ne-float-dual-arith): Ditto.
1060 2003-09-03 Dave Brolley <brolley@redhat.com>
1062 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1063 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1065 (A): Removed operand.
1066 (A0,A1): New operands replace operand A.
1067 (mnop): Now a real insn
1068 (mclracc): Removed insn.
1069 (mclracc-0, mclracc-1): New insns replace mclracc.
1070 (all insns): Use new UNIT attributes.
1072 2003-08-21 Nick Clifton <nickc@redhat.com>
1074 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1075 and u-media-dual-btoh with output parameter.
1076 (cmbtoh): Add profiling hack.
1078 2003-08-19 Michael Snyder <msnyder@redhat.com>
1080 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1082 2003-06-10 Doug Evans <dje@sebabeach.org>
1084 * frv.cpu: Add IDOC attribute.
1086 2003-06-06 Andrew Cagney <cagney@redhat.com>
1088 Contributed by Red Hat.
1089 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1090 Stan Cox, and Frank Ch. Eigler.
1091 * iq2000.opc: New file. Written by Ben Elliston, Frank
1092 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1093 * iq2000m.cpu: New file. Written by Jeff Johnston.
1094 * iq10.cpu: New file. Written by Jeff Johnston.
1096 2003-06-05 Nick Clifton <nickc@redhat.com>
1098 * frv.cpu (FRintieven): New operand. An even-numbered only
1099 version of the FRinti operand.
1100 (FRintjeven): Likewise for FRintj.
1101 (FRintkeven): Likewise for FRintk.
1102 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1103 media-quad-arith-sat-semantics, media-quad-arith-sat,
1104 conditional-media-quad-arith-sat, mdunpackh,
1105 media-quad-multiply-semantics, media-quad-multiply,
1106 conditional-media-quad-multiply, media-quad-complex-i,
1107 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1108 conditional-media-quad-multiply-acc, munpackh,
1109 media-quad-multiply-cross-acc-semantics, mdpackh,
1110 media-quad-multiply-cross-acc, mbtoh-semantics,
1111 media-quad-cross-multiply-cross-acc-semantics,
1112 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1113 media-quad-cross-multiply-acc-semantics, cmbtoh,
1114 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1115 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1116 cmhtob): Use new operands.
1117 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1118 (parse_even_register): New function.
1120 2003-06-03 Nick Clifton <nickc@redhat.com>
1122 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1123 immediate value not unsigned.
1125 2003-06-03 Andrew Cagney <cagney@redhat.com>
1127 Contributed by Red Hat.
1128 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1129 and Eric Christopher.
1130 * frv.opc: New file. Written by Catherine Moore, and Dave
1132 * simplify.inc: New file. Written by Doug Evans.
1134 2003-05-02 Andrew Cagney <cagney@redhat.com>
1139 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1141 Copying and distribution of this file, with or without modification,
1142 are permitted in any medium without royalty provided the copyright
1143 notice and this notice are preserved.
1149 version-control: never