1 2019-12-11 Alan Modra <amodra@gmail.com>
3 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
4 shift left to avoid UB on left shift of negative values.
6 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
8 * bpf.cpu: Fix comment describing the 128-bit instruction format.
10 2019-09-09 Phil Blundell <pb@pbcl.net>
12 binutils 2.33 branch created.
14 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
16 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
19 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
21 * bpf.cpu (dlabs): New pmacro.
24 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
26 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
27 explicit 'dst' argument.
29 2019-06-13 Stafford Horne <shorne@gmail.com>
31 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
33 2019-06-13 Stafford Horne <shorne@gmail.com>
35 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
36 (l-adrp): Improve comment.
38 2019-06-13 Stafford Horne <shorne@gmail.com>
40 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
41 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
42 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
43 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
44 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
45 float-setflag-unordered-symantics): New pmacro for instruction
47 (float-setflag-insn): Update to use float-setflag-insn-base.
48 (float-setflag-unordered-insn): New pmacro for generating instructions.
50 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
51 Stafford Horne <shorne@gmail.com>
53 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
54 (ORFPX-MACHS): Removed pmacro.
55 * or1k.opc (or1k_cgen_insn_supported): New function.
56 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
57 (parse_regpair, print_regpair): New functions.
58 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
60 (h-fdr): Update comment to indicate or64.
61 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
62 (h-fd32r): New hardware for 64-bit fpu registers.
63 (h-i64r): New hardware for 64-bit int registers.
64 * or1korbis.cpu (f-resv-8-1): New field.
65 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
66 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
67 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
68 (h-roff1): New hardware.
69 (double-field-and-ops mnemonic): New pmacro to generate operations
70 rDD32F, rAD32F, rBD32F, rDDI and rADI.
71 (float-regreg-insn): Update single precision generator to MACH
72 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
73 (float-setflag-insn): Update single precision generator to MACH
74 ORFPX32-MACHS. Fix double instructions from single to double
75 precision. Add generator for or32 64-bit instructions.
76 (float-cust-insn cust-num): Update single precision generator to MACH
77 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
78 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
80 (lf-rem-d): Fix operation from mod to rem.
81 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
82 (lf-itof-d): Fix operands from single to double.
83 (lf-ftoi-d): Update operand mode from DI to WI.
85 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
90 2018-06-24 Nick Clifton <nickc@redhat.com>
94 2018-10-05 Richard Henderson <rth@twiddle.net>
95 Stafford Horne <shorne@gmail.com>
97 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
98 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
99 (l-mul): Fix overflow support and indentation.
100 (l-mulu): Fix overflow support and indentation.
101 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
102 (l-div); Remove incorrect carry behavior.
103 (l-divu): Fix carry and overflow behavior.
104 (l-mac): Add overflow support.
105 (l-msb, l-msbu): Add carry and overflow support.
107 2018-10-05 Richard Henderson <rth@twiddle.net>
109 * or1k.opc (parse_disp26): Add support for plta() relocations.
110 (parse_disp21): New function.
111 (or1k_rclass): New enum.
112 (or1k_rtype): New enum.
113 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
114 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
115 (parse_imm16): Add support for the new 21bit and 13bit relocations.
116 * or1korbis.cpu (f-disp26): Don't assume SI.
117 (f-disp21): New pc-relative 21-bit 13 shifted to right.
118 (insn-opcode): Add ADRP.
119 (l-adrp): New instruction.
121 2018-10-05 Richard Henderson <rth@twiddle.net>
123 * or1k.opc: Add RTYPE_ enum.
124 (INVALID_STORE_RELOC): New string.
125 (or1k_imm16_relocs): New array array.
126 (parse_reloc): New static function that just does the parsing.
127 (parse_imm16): New static function for generic parsing.
128 (parse_simm16): Change to just call parse_imm16.
129 (parse_simm16_split): New function.
130 (parse_uimm16): Change to call parse_imm16.
131 (parse_uimm16_split): New function.
132 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
133 (uimm16-split): Change to use new uimm16_split.
135 2018-07-24 Alan Modra <amodra@gmail.com>
138 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
140 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
142 * or1kcommon.cpu (spr-reg-info): Typo fix.
144 2018-03-03 Alan Modra <amodra@gmail.com>
146 * frv.opc: Include opintl.h.
147 (add_next_to_vliw): Use opcodes_error_handler to print error.
148 Standardize error message.
149 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
151 2018-01-13 Nick Clifton <nickc@redhat.com>
155 2017-03-15 Stafford Horne <shorne@gmail.com>
157 * or1kcommon.cpu: Add pc set semantics to also update ppc.
159 2016-10-06 Alan Modra <amodra@gmail.com>
161 * mep.opc (expand_string): Add fall through comment.
163 2016-03-03 Alan Modra <amodra@gmail.com>
165 * fr30.cpu (f-m4): Replace bogus comment with a better guess
166 at what is really going on.
168 2016-03-02 Alan Modra <amodra@gmail.com>
170 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
172 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
174 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
175 a constant to better align disassembler output.
177 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
179 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
181 2014-06-12 Alan Modra <amodra@gmail.com>
183 * or1k.opc: Whitespace fixes.
185 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
187 * or1korbis.cpu (h-atomic-reserve): New hardware.
188 (h-atomic-address): Likewise.
189 (insn-opcode): Add opcodes for LWA and SWA.
190 (atomic-reserve): New operand.
191 (atomic-address): Likewise.
192 (l-lwa, l-swa): New instructions.
193 (l-lbs): Fix typo in comment.
194 (store-insn): Clear atomic reserve on store to atomic-address.
195 Fix register names in fmt field.
197 2014-04-22 Christian Svensson <blue@cmd.nu>
199 * openrisc.cpu: Delete.
200 * openrisc.opc: Delete.
201 * or1k.cpu: New file.
202 * or1k.opc: New file.
203 * or1kcommon.cpu: New file.
204 * or1korbis.cpu: New file.
205 * or1korfpx.cpu: New file.
207 2013-12-07 Mike Frysinger <vapier@gentoo.org>
209 * epiphany.opc: Remove +x file mode.
211 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
214 * lm32.cpu (Control and status registers): Add CFG2, PSW,
215 TLBVADDR, TLBPADDR and TLBBADVADDR.
217 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
218 Joern Rennecke <joern.rennecke@embecosm.com>
220 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
221 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
222 (testset-insn): Add NO_DIS attribute to t.l.
223 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
224 (move-insns): Add NO-DIS attribute to cmov.l.
225 (op-mmr-movts): Add NO-DIS attribute to movts.l.
226 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
227 (op-rrr): Add NO-DIS attribute to .l.
228 (shift-rrr): Add NO-DIS attribute to .l.
229 (op-shift-rri): Add NO-DIS attribute to i32.l.
230 (bitrl, movtl): Add NO-DIS attribute.
231 (op-iextrrr): Add NO-DIS attribute to .l
232 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
233 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
235 2012-02-27 Alan Modra <amodra@gmail.com>
237 * mt.opc (print_dollarhex): Trim values to 32 bits.
239 2011-12-15 Nick Clifton <nickc@redhat.com>
241 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
244 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
246 * epiphany.opc (parse_branch_addr): Fix type of valuep.
247 Cast value before printing it as a long.
248 (parse_postindex): Fix type of valuep.
250 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
252 * cpu/epiphany.cpu: New file.
253 * cpu/epiphany.opc: New file.
255 2011-08-22 Nick Clifton <nickc@redhat.com>
257 * fr30.cpu: Newly contributed file.
258 * fr30.opc: Likewise.
259 * ip2k.cpu: Likewise.
260 * ip2k.opc: Likewise.
261 * mep-avc.cpu: Likewise.
262 * mep-avc2.cpu: Likewise.
263 * mep-c5.cpu: Likewise.
264 * mep-core.cpu: Likewise.
265 * mep-default.cpu: Likewise.
266 * mep-ext-cop.cpu: Likewise.
267 * mep-fmax.cpu: Likewise.
268 * mep-h1.cpu: Likewise.
269 * mep-ivc2.cpu: Likewise.
270 * mep-rhcop.cpu: Likewise.
271 * mep-sample-ucidsp.cpu: Likewise.
274 * openrisc.cpu: Likewise.
275 * openrisc.opc: Likewise.
276 * xstormy16.cpu: Likewise.
277 * xstormy16.opc: Likewise.
279 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
281 * frv.opc: #undef DEBUG.
283 2010-07-03 DJ Delorie <dj@delorie.com>
285 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
287 2010-02-11 Doug Evans <dje@sebabeach.org>
289 * m32r.cpu (HASH-PREFIX): Delete.
290 (duhpo, dshpo): New pmacros.
291 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
292 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
293 attribute, define with dshpo.
294 (uimm24): Delete HASH-PREFIX attribute.
295 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
296 (print_signed_with_hash_prefix): New function.
297 (print_unsigned_with_hash_prefix): New function.
298 * xc16x.cpu (dowh): New pmacro.
299 (upof16): Define with dowh, specify print handler.
300 (qbit, qlobit, qhibit): Ditto.
302 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
303 (print_with_dot_prefix): New functions.
304 (print_with_pof_prefix, print_with_pag_prefix): New functions.
306 2010-01-24 Doug Evans <dje@sebabeach.org>
308 * frv.cpu (floating-point-conversion): Update call to fp conv op.
309 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
310 conditional-floating-point-conversion, ne-floating-point-conversion,
311 float-parallel-mul-add-double-semantics): Ditto.
313 2010-01-05 Doug Evans <dje@sebabeach.org>
315 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
316 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
318 2010-01-02 Doug Evans <dje@sebabeach.org>
320 * m32c.opc (parse_signed16): Fix typo.
322 2009-12-11 Nick Clifton <nickc@redhat.com>
324 * frv.opc: Fix shadowed variable warnings.
325 * m32c.opc: Fix shadowed variable warnings.
327 2009-11-14 Doug Evans <dje@sebabeach.org>
329 Must use VOID expression in VOID context.
330 * xc16x.cpu (mov4): Fix mode of `sequence'.
331 (mov9, mov10): Ditto.
332 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
333 (callr, callseg, calls, trap, rets, reti): Ditto.
334 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
335 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
336 (exts, exts1, extsr, extsr1, prior): Ditto.
338 2009-10-23 Doug Evans <dje@sebabeach.org>
340 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
341 cgen-ops.h -> cgen/basic-ops.h.
343 2009-09-25 Alan Modra <amodra@bigpond.net.au>
345 * m32r.cpu (stb-plus): Typo fix.
347 2009-09-23 Doug Evans <dje@sebabeach.org>
349 * m32r.cpu (sth-plus): Fix address mode and calculation.
351 (clrpsw): Fix mask calculation.
352 (bset, bclr, btst): Make mode in bit calculation match expression.
354 * xc16x.cpu (rtl-version): Set to 0.8.
355 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
356 make uppercase. Remove unnecessary name-prefix spec.
357 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
358 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
359 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
360 (h-cr): New hardware.
361 (muls): Comment out parts that won't compile, add fixme.
362 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
363 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
364 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
366 2009-07-16 Doug Evans <dje@sebabeach.org>
368 * cpu/simplify.inc (*): One line doc strings don't need \n.
369 (df): Invoke define-full-ifield instead of claiming it's an alias.
371 (dnop): Mark as deprecated.
373 2009-06-22 Alan Modra <amodra@bigpond.net.au>
375 * m32c.opc (parse_lab_5_3): Use correct enum.
377 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
379 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
380 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
381 (media-arith-sat-semantics): Explicitly sign- or zero-extend
382 arguments of "operation" to DI using "mode" and the new pmacros.
384 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
386 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
389 2008-12-23 Jon Beniston <jon@beniston.com>
391 * lm32.cpu: New file.
392 * lm32.opc: New file.
394 2008-01-29 Alan Modra <amodra@bigpond.net.au>
396 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
399 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
401 * cris.cpu (movs, movu): Use result of extension operation when
404 2007-07-04 Nick Clifton <nickc@redhat.com>
406 * cris.cpu: Update copyright notice to refer to GPLv3.
407 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
408 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
409 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
411 * iq2000.cpu: Fix copyright notice to refer to FSF.
413 2007-04-30 Mark Salter <msalter@sadr.localdomain>
415 * frv.cpu (spr-names): Support new coprocessor SPR registers.
417 2007-04-20 Nick Clifton <nickc@redhat.com>
419 * xc16x.cpu: Restore after accidentally overwriting this file with
422 2007-03-29 DJ Delorie <dj@redhat.com>
424 * m32c.cpu (Imm-8-s4n): Fix print hook.
425 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
426 (arith-jnz-imm4-dst-defn): Make relaxable.
427 (arith-jnz16-imm4-dst-defn): Fix encodings.
429 2007-03-20 DJ Delorie <dj@redhat.com>
431 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
433 (src16-16-20-An-relative-*): New.
434 (dst16-*-20-An-relative-*): New.
435 (dst16-16-16sa-*): New
436 (dst16-16-16ar-*): New
437 (dst32-16-16sa-Unprefixed-*): New
438 (jsri): Fix operands.
439 (setzx): Fix encoding.
441 2007-03-08 Alan Modra <amodra@bigpond.net.au>
443 * m32r.opc: Formatting.
445 2006-05-22 Nick Clifton <nickc@redhat.com>
447 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
449 2006-04-10 DJ Delorie <dj@redhat.com>
451 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
452 decides if this function accepts symbolic constants or not.
453 (parse_signed_bitbase): Likewise.
454 (parse_unsigned_bitbase8): Pass the new parameter.
455 (parse_unsigned_bitbase11): Likewise.
456 (parse_unsigned_bitbase16): Likewise.
457 (parse_unsigned_bitbase19): Likewise.
458 (parse_unsigned_bitbase27): Likewise.
459 (parse_signed_bitbase8): Likewise.
460 (parse_signed_bitbase11): Likewise.
461 (parse_signed_bitbase19): Likewise.
463 2006-03-13 DJ Delorie <dj@redhat.com>
465 * m32c.cpu (Bit3-S): New.
467 * m32c.opc (parse_bit3_S): New.
469 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
470 (btst): Add optional :G suffix for MACH32.
472 (pop.w:G): Add optional :G suffix for MACH16.
473 (push.b.imm): Fix syntax.
475 2006-03-10 DJ Delorie <dj@redhat.com>
477 * m32c.cpu (mul.l): New.
480 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
482 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
483 an error message otherwise.
484 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
485 Fix up comments to correctly describe the functions.
487 2006-02-24 DJ Delorie <dj@redhat.com>
489 * m32c.cpu (RL_TYPE): New attribute, with macros.
490 (Lab-8-24): Add RELAX.
491 (unary-insn-defn-g, binary-arith-imm-dst-defn,
492 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
493 (binary-arith-src-dst-defn): Add 2ADDR attribute.
494 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
495 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
497 (jsri16, jsri32): Add 1ADDR attribute.
498 (jsr32.w, jsr32.a): Add JUMP attribute.
500 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
501 Anil Paranjape <anilp1@kpitcummins.com>
502 Shilin Shakti <shilins@kpitcummins.com>
504 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
506 * xc16x.opc: New file containing supporting XC16C routines.
508 2006-02-10 Nick Clifton <nickc@redhat.com>
510 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
512 2006-01-06 DJ Delorie <dj@redhat.com>
514 * m32c.cpu (mov.w:q): Fix mode.
515 (push32.b.imm): Likewise, for the comment.
517 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
519 Second part of ms1 to mt renaming.
520 * mt.cpu (define-arch, define-isa): Set name to mt.
521 (define-mach): Adjust.
522 * mt.opc (CGEN_ASM_HASH): Update.
523 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
524 (parse_loopsize, parse_imm16): Adjust.
526 2005-12-13 DJ Delorie <dj@redhat.com>
528 * m32c.cpu (jsri): Fix order so register names aren't treated as
530 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
531 indexwd, indexws): Fix encodings.
533 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
535 * mt.cpu: Rename from ms1.cpu.
536 * mt.opc: Rename from ms1.opc.
538 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
540 * cris.cpu (simplecris-common-writable-specregs)
541 (simplecris-common-readable-specregs): Split from
542 simplecris-common-specregs. All users changed.
543 (cris-implemented-writable-specregs-v0)
544 (cris-implemented-readable-specregs-v0): Similar from
545 cris-implemented-specregs-v0.
546 (cris-implemented-writable-specregs-v3)
547 (cris-implemented-readable-specregs-v3)
548 (cris-implemented-writable-specregs-v8)
549 (cris-implemented-readable-specregs-v8)
550 (cris-implemented-writable-specregs-v10)
551 (cris-implemented-readable-specregs-v10)
552 (cris-implemented-writable-specregs-v32)
553 (cris-implemented-readable-specregs-v32): Similar.
554 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
555 insns and specializations.
557 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
560 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
562 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
563 f-cb2incr, f-rc3): New fields.
564 (LOOP): New instruction.
565 (JAL-HAZARD): New hazard.
566 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
568 (mul, muli, dbnz, iflush): Enable for ms2
569 (jal, reti): Has JAL-HAZARD.
570 (ldctxt, ldfb, stfb): Only ms1.
571 (fbcb): Only ms1,ms1-003.
572 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
573 fbcbincrs, mfbcbincrs): Enable for ms2.
574 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
575 * ms1.opc (parse_loopsize): New.
576 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
579 2005-10-28 Dave Brolley <brolley@redhat.com>
581 Contribute the following change:
582 2003-09-24 Dave Brolley <brolley@redhat.com>
584 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
585 CGEN_ATTR_VALUE_TYPE.
586 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
587 Use cgen_bitset_intersect_p.
589 2005-10-27 DJ Delorie <dj@redhat.com>
591 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
592 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
593 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
594 imm operand is needed.
595 (adjnz, sbjnz): Pass the right operands.
596 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
597 unary-insn): Add -g variants for opcodes that need to support :G.
598 (not.BW:G, push.BW:G): Call it.
599 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
600 stzx16-imm8-imm8-abs16): Fix operand typos.
601 * m32c.opc (m32c_asm_hash): Support bnCND.
602 (parse_signed4n, print_signed4n): New.
604 2005-10-26 DJ Delorie <dj@redhat.com>
606 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
607 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
608 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
610 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
611 (mov.BW:S r0,r1): Fix typo r1l->r1.
612 (tst): Allow :G suffix.
613 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
615 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
617 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
619 2005-10-25 DJ Delorie <dj@redhat.com>
621 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
622 making one a macro of the other.
624 2005-10-21 DJ Delorie <dj@redhat.com>
626 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
627 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
628 indexld, indexls): .w variants have `1' bit.
629 (rot32.b): QI, not SI.
630 (rot32.w): HI, not SI.
631 (xchg16): HI for .w variant.
633 2005-10-19 Nick Clifton <nickc@redhat.com>
635 * m32r.opc (parse_slo16): Fix bad application of previous patch.
637 2005-10-18 Andreas Schwab <schwab@suse.de>
639 * m32r.opc (parse_slo16): Better version of previous patch.
641 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
643 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
646 2005-07-25 DJ Delorie <dj@redhat.com>
648 * m32c.opc (parse_unsigned8): Add %dsp8().
649 (parse_signed8): Add %hi8().
650 (parse_unsigned16): Add %dsp16().
651 (parse_signed16): Add %lo16() and %hi16().
652 (parse_lab_5_3): Make valuep a bfd_vma *.
654 2005-07-18 Nick Clifton <nickc@redhat.com>
656 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
658 (f-lab32-jmp-s): Fix insertion sequence.
659 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
660 (Dsp-40-s8): Make parameter be signed.
661 (Dsp-40-s16): Likewise.
662 (Dsp-48-s8): Likewise.
663 (Dsp-48-s16): Likewise.
664 (Imm-13-u3): Likewise. (Despite its name!)
665 (BitBase16-16-s8): Make the parameter be unsigned.
666 (BitBase16-8-u11-S): Likewise.
667 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
668 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
671 * m32c.opc: Fix formatting.
672 Use safe-ctype.h instead of ctype.h
673 Move duplicated code sequences into a macro.
674 Fix compile time warnings about signedness mismatches.
676 (parse_lab_5_3): New parser function.
678 2005-07-16 Jim Blandy <jimb@redhat.com>
680 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
681 to represent isa sets.
683 2005-07-15 Jim Blandy <jimb@redhat.com>
685 * m32c.cpu, m32c.opc: Fix copyright.
687 2005-07-14 Jim Blandy <jimb@redhat.com>
689 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
691 2005-07-14 Alan Modra <amodra@bigpond.net.au>
693 * ms1.opc (print_dollarhex): Correct format string.
695 2005-07-06 Alan Modra <amodra@bigpond.net.au>
697 * iq2000.cpu: Include from binutils cpu dir.
699 2005-07-05 Nick Clifton <nickc@redhat.com>
701 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
702 unsigned in order to avoid compile time warnings about sign
705 * ms1.opc (parse_*): Likewise.
706 (parse_imm16): Use a "void *" as it is passed both signed and
709 2005-07-01 Nick Clifton <nickc@redhat.com>
711 * frv.opc: Update to ISO C90 function declaration style.
712 * iq2000.opc: Likewise.
713 * m32r.opc: Likewise.
716 2005-06-15 Dave Brolley <brolley@redhat.com>
718 Contributed by Red Hat.
719 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
720 * ms1.opc: New file. Written by Stan Cox.
722 2005-05-10 Nick Clifton <nickc@redhat.com>
724 * Update the address and phone number of the FSF organization in
725 the GPL notices in the following files:
726 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
727 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
728 sh64-media.cpu, simplify.inc
730 2005-02-24 Alan Modra <amodra@bigpond.net.au>
732 * frv.opc (parse_A): Warning fix.
734 2005-02-23 Nick Clifton <nickc@redhat.com>
736 * frv.opc: Fixed compile time warnings about differing signed'ness
737 of pointers passed to functions.
738 * m32r.opc: Likewise.
740 2005-02-11 Nick Clifton <nickc@redhat.com>
742 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
743 'bfd_vma *' in order avoid compile time warning message.
745 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
747 * cris.cpu (mstep): Add missing insn.
749 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
751 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
752 * frv.cpu: Add support for TLS annotations in loads and calll.
753 * frv.opc (parse_symbolic_address): New.
754 (parse_ldd_annotation): New.
755 (parse_call_annotation): New.
756 (parse_ld_annotation): New.
757 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
758 Introduce TLS relocations.
759 (parse_d12, parse_s12, parse_u12): Likewise.
760 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
761 (parse_call_label, print_at): New.
763 2004-12-21 Mikael Starvik <starvik@axis.com>
765 * cris.cpu (cris-set-mem): Correct integral write semantics.
767 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
769 * cris.cpu: New file.
771 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
773 * iq2000.cpu: Added quotes around macro arguments so that they
774 will work with newer versions of guile.
776 2004-10-27 Nick Clifton <nickc@redhat.com>
778 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
779 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
781 * iq2000.cpu (dnop index): Rename to _index to avoid complications
784 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
786 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
788 2004-05-15 Nick Clifton <nickc@redhat.com>
790 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
792 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
794 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
796 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
798 * frv.cpu (define-arch frv): Add fr450 mach.
799 (define-mach fr450): New.
800 (define-model fr450): New. Add profile units to every fr450 insn.
801 (define-attr UNIT): Add MDCUTSSI.
802 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
803 (define-attr AUDIO): New boolean.
804 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
805 (f-LRA-null, f-TLBPR-null): New fields.
806 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
807 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
808 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
809 (LRA-null, TLBPR-null): New macros.
810 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
811 (load-real-address): New macro.
812 (lrai, lrad, tlbpr): New instructions.
813 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
814 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
815 (mdcutssi): Change UNIT attribute to MDCUTSSI.
816 (media-low-clear-semantics, media-scope-limit-semantics)
817 (media-quad-limit, media-quad-shift): New macros.
818 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
819 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
820 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
821 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
822 (fr450_unit_mapping): New array.
823 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
824 for new MDCUTSSI unit.
825 (fr450_check_insn_major_constraints): New function.
826 (check_insn_major_constraints): Use it.
828 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
830 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
831 (scutss): Change unit to I0.
832 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
833 (mqsaths): Fix FR400-MAJOR categorization.
834 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
835 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
836 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
839 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
841 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
842 (rstb, rsth, rst, rstd, rstq): Delete.
843 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
845 2004-02-23 Nick Clifton <nickc@redhat.com>
847 * Apply these patches from Renesas:
849 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
851 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
852 disassembling codes for 0x*2 addresses.
854 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
856 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
858 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
860 * cpu/m32r.cpu : Add new model m32r2.
861 Add new instructions.
862 Replace occurrances of 'Mitsubishi' with 'Renesas'.
863 Changed PIPE attr of push from O to OS.
864 Care for Little-endian of M32R.
865 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
866 Care for Little-endian of M32R.
867 (parse_slo16): signed extension for value.
869 2004-02-20 Andrew Cagney <cagney@redhat.com>
871 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
872 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
874 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
875 written by Ben Elliston.
877 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
879 * frv.cpu (UNIT): Add IACC.
880 (iacc-multiply-r-r): Use it.
881 * frv.opc (fr400_unit_mapping): Add entry for IACC.
882 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
884 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
886 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
887 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
888 cut&paste errors in shifting/truncating numerical operands.
889 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
890 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
891 (parse_uslo16): Likewise.
892 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
893 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
894 (parse_s12): Likewise.
895 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
896 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
897 (parse_uslo16): Likewise.
898 (parse_uhi16): Parse gothi and gotfuncdeschi.
899 (parse_d12): Parse got12 and gotfuncdesc12.
900 (parse_s12): Likewise.
902 2003-10-10 Dave Brolley <brolley@redhat.com>
904 * frv.cpu (dnpmop): New p-macro.
905 (GRdoublek): Use dnpmop.
906 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
907 (store-double-r-r): Use (.sym regtype doublek).
908 (r-store-double): Ditto.
909 (store-double-r-r-u): Ditto.
910 (conditional-store-double): Ditto.
911 (conditional-store-double-u): Ditto.
912 (store-double-r-simm): Ditto.
913 (fmovs): Assign to UNIT FMALL.
915 2003-10-06 Dave Brolley <brolley@redhat.com>
917 * frv.cpu, frv.opc: Add support for fr550.
919 2003-09-24 Dave Brolley <brolley@redhat.com>
921 * frv.cpu (u-commit): New modelling unit for fr500.
922 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
923 (commit-r): Use u-commit model for fr500.
925 (conditional-float-binary-op): Take profiling data as an argument.
927 (ne-float-binary-op): Ditto.
929 2003-09-19 Michael Snyder <msnyder@redhat.com>
931 * frv.cpu (nldqi): Delete unimplemented instruction.
933 2003-09-12 Dave Brolley <brolley@redhat.com>
935 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
936 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
937 frv_ref_SI to get input register referenced for profiling.
938 (clear-ne-flag-all): Pass insn profiling in as an argument.
939 (clrgr,clrfr,clrga,clrfa): Add profiling information.
941 2003-09-11 Michael Snyder <msnyder@redhat.com>
943 * frv.cpu: Typographical corrections.
945 2003-09-09 Dave Brolley <brolley@redhat.com>
947 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
948 (conditional-media-dual-complex, media-quad-complex): Likewise.
950 2003-09-04 Dave Brolley <brolley@redhat.com>
952 * frv.cpu (register-transfer): Pass in all attributes in on argument.
954 (conditional-register-transfer): Ditto.
955 (cache-preload): Ditto.
956 (floating-point-conversion): Ditto.
957 (floating-point-neg): Ditto.
959 (float-binary-op-s): Ditto.
960 (conditional-float-binary-op): Ditto.
961 (ne-float-binary-op): Ditto.
962 (float-dual-arith): Ditto.
963 (ne-float-dual-arith): Ditto.
965 2003-09-03 Dave Brolley <brolley@redhat.com>
967 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
968 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
970 (A): Removed operand.
971 (A0,A1): New operands replace operand A.
972 (mnop): Now a real insn
973 (mclracc): Removed insn.
974 (mclracc-0, mclracc-1): New insns replace mclracc.
975 (all insns): Use new UNIT attributes.
977 2003-08-21 Nick Clifton <nickc@redhat.com>
979 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
980 and u-media-dual-btoh with output parameter.
981 (cmbtoh): Add profiling hack.
983 2003-08-19 Michael Snyder <msnyder@redhat.com>
985 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
987 2003-06-10 Doug Evans <dje@sebabeach.org>
989 * frv.cpu: Add IDOC attribute.
991 2003-06-06 Andrew Cagney <cagney@redhat.com>
993 Contributed by Red Hat.
994 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
995 Stan Cox, and Frank Ch. Eigler.
996 * iq2000.opc: New file. Written by Ben Elliston, Frank
997 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
998 * iq2000m.cpu: New file. Written by Jeff Johnston.
999 * iq10.cpu: New file. Written by Jeff Johnston.
1001 2003-06-05 Nick Clifton <nickc@redhat.com>
1003 * frv.cpu (FRintieven): New operand. An even-numbered only
1004 version of the FRinti operand.
1005 (FRintjeven): Likewise for FRintj.
1006 (FRintkeven): Likewise for FRintk.
1007 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1008 media-quad-arith-sat-semantics, media-quad-arith-sat,
1009 conditional-media-quad-arith-sat, mdunpackh,
1010 media-quad-multiply-semantics, media-quad-multiply,
1011 conditional-media-quad-multiply, media-quad-complex-i,
1012 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1013 conditional-media-quad-multiply-acc, munpackh,
1014 media-quad-multiply-cross-acc-semantics, mdpackh,
1015 media-quad-multiply-cross-acc, mbtoh-semantics,
1016 media-quad-cross-multiply-cross-acc-semantics,
1017 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1018 media-quad-cross-multiply-acc-semantics, cmbtoh,
1019 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1020 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1021 cmhtob): Use new operands.
1022 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1023 (parse_even_register): New function.
1025 2003-06-03 Nick Clifton <nickc@redhat.com>
1027 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1028 immediate value not unsigned.
1030 2003-06-03 Andrew Cagney <cagney@redhat.com>
1032 Contributed by Red Hat.
1033 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1034 and Eric Christopher.
1035 * frv.opc: New file. Written by Catherine Moore, and Dave
1037 * simplify.inc: New file. Written by Doug Evans.
1039 2003-05-02 Andrew Cagney <cagney@redhat.com>
1044 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1046 Copying and distribution of this file, with or without modification,
1047 are permitted in any medium without royalty provided the copyright
1048 notice and this notice are preserved.
1054 version-control: never