1 2019-12-11 Alan Modra <amodra@gmail.com>
3 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
4 * lm32.cpu (f-branch, f-vall): Likewise.
5 * m32.cpu (f-lab-8-16): Likewise.
7 2019-12-11 Alan Modra <amodra@gmail.com>
9 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
10 shift left to avoid UB on left shift of negative values.
12 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
14 * bpf.cpu: Fix comment describing the 128-bit instruction format.
16 2019-09-09 Phil Blundell <pb@pbcl.net>
18 binutils 2.33 branch created.
20 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
22 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
25 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
27 * bpf.cpu (dlabs): New pmacro.
30 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
32 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
33 explicit 'dst' argument.
35 2019-06-13 Stafford Horne <shorne@gmail.com>
37 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
39 2019-06-13 Stafford Horne <shorne@gmail.com>
41 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
42 (l-adrp): Improve comment.
44 2019-06-13 Stafford Horne <shorne@gmail.com>
46 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
47 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
48 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
49 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
50 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
51 float-setflag-unordered-symantics): New pmacro for instruction
53 (float-setflag-insn): Update to use float-setflag-insn-base.
54 (float-setflag-unordered-insn): New pmacro for generating instructions.
56 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
57 Stafford Horne <shorne@gmail.com>
59 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
60 (ORFPX-MACHS): Removed pmacro.
61 * or1k.opc (or1k_cgen_insn_supported): New function.
62 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
63 (parse_regpair, print_regpair): New functions.
64 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
66 (h-fdr): Update comment to indicate or64.
67 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
68 (h-fd32r): New hardware for 64-bit fpu registers.
69 (h-i64r): New hardware for 64-bit int registers.
70 * or1korbis.cpu (f-resv-8-1): New field.
71 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
72 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
73 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
74 (h-roff1): New hardware.
75 (double-field-and-ops mnemonic): New pmacro to generate operations
76 rDD32F, rAD32F, rBD32F, rDDI and rADI.
77 (float-regreg-insn): Update single precision generator to MACH
78 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
79 (float-setflag-insn): Update single precision generator to MACH
80 ORFPX32-MACHS. Fix double instructions from single to double
81 precision. Add generator for or32 64-bit instructions.
82 (float-cust-insn cust-num): Update single precision generator to MACH
83 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
84 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
86 (lf-rem-d): Fix operation from mod to rem.
87 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
88 (lf-itof-d): Fix operands from single to double.
89 (lf-ftoi-d): Update operand mode from DI to WI.
91 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
96 2018-06-24 Nick Clifton <nickc@redhat.com>
100 2018-10-05 Richard Henderson <rth@twiddle.net>
101 Stafford Horne <shorne@gmail.com>
103 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
104 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
105 (l-mul): Fix overflow support and indentation.
106 (l-mulu): Fix overflow support and indentation.
107 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
108 (l-div); Remove incorrect carry behavior.
109 (l-divu): Fix carry and overflow behavior.
110 (l-mac): Add overflow support.
111 (l-msb, l-msbu): Add carry and overflow support.
113 2018-10-05 Richard Henderson <rth@twiddle.net>
115 * or1k.opc (parse_disp26): Add support for plta() relocations.
116 (parse_disp21): New function.
117 (or1k_rclass): New enum.
118 (or1k_rtype): New enum.
119 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
120 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
121 (parse_imm16): Add support for the new 21bit and 13bit relocations.
122 * or1korbis.cpu (f-disp26): Don't assume SI.
123 (f-disp21): New pc-relative 21-bit 13 shifted to right.
124 (insn-opcode): Add ADRP.
125 (l-adrp): New instruction.
127 2018-10-05 Richard Henderson <rth@twiddle.net>
129 * or1k.opc: Add RTYPE_ enum.
130 (INVALID_STORE_RELOC): New string.
131 (or1k_imm16_relocs): New array array.
132 (parse_reloc): New static function that just does the parsing.
133 (parse_imm16): New static function for generic parsing.
134 (parse_simm16): Change to just call parse_imm16.
135 (parse_simm16_split): New function.
136 (parse_uimm16): Change to call parse_imm16.
137 (parse_uimm16_split): New function.
138 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
139 (uimm16-split): Change to use new uimm16_split.
141 2018-07-24 Alan Modra <amodra@gmail.com>
144 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
146 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
148 * or1kcommon.cpu (spr-reg-info): Typo fix.
150 2018-03-03 Alan Modra <amodra@gmail.com>
152 * frv.opc: Include opintl.h.
153 (add_next_to_vliw): Use opcodes_error_handler to print error.
154 Standardize error message.
155 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
157 2018-01-13 Nick Clifton <nickc@redhat.com>
161 2017-03-15 Stafford Horne <shorne@gmail.com>
163 * or1kcommon.cpu: Add pc set semantics to also update ppc.
165 2016-10-06 Alan Modra <amodra@gmail.com>
167 * mep.opc (expand_string): Add fall through comment.
169 2016-03-03 Alan Modra <amodra@gmail.com>
171 * fr30.cpu (f-m4): Replace bogus comment with a better guess
172 at what is really going on.
174 2016-03-02 Alan Modra <amodra@gmail.com>
176 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
178 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
180 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
181 a constant to better align disassembler output.
183 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
185 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
187 2014-06-12 Alan Modra <amodra@gmail.com>
189 * or1k.opc: Whitespace fixes.
191 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
193 * or1korbis.cpu (h-atomic-reserve): New hardware.
194 (h-atomic-address): Likewise.
195 (insn-opcode): Add opcodes for LWA and SWA.
196 (atomic-reserve): New operand.
197 (atomic-address): Likewise.
198 (l-lwa, l-swa): New instructions.
199 (l-lbs): Fix typo in comment.
200 (store-insn): Clear atomic reserve on store to atomic-address.
201 Fix register names in fmt field.
203 2014-04-22 Christian Svensson <blue@cmd.nu>
205 * openrisc.cpu: Delete.
206 * openrisc.opc: Delete.
207 * or1k.cpu: New file.
208 * or1k.opc: New file.
209 * or1kcommon.cpu: New file.
210 * or1korbis.cpu: New file.
211 * or1korfpx.cpu: New file.
213 2013-12-07 Mike Frysinger <vapier@gentoo.org>
215 * epiphany.opc: Remove +x file mode.
217 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
220 * lm32.cpu (Control and status registers): Add CFG2, PSW,
221 TLBVADDR, TLBPADDR and TLBBADVADDR.
223 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
224 Joern Rennecke <joern.rennecke@embecosm.com>
226 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
227 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
228 (testset-insn): Add NO_DIS attribute to t.l.
229 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
230 (move-insns): Add NO-DIS attribute to cmov.l.
231 (op-mmr-movts): Add NO-DIS attribute to movts.l.
232 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
233 (op-rrr): Add NO-DIS attribute to .l.
234 (shift-rrr): Add NO-DIS attribute to .l.
235 (op-shift-rri): Add NO-DIS attribute to i32.l.
236 (bitrl, movtl): Add NO-DIS attribute.
237 (op-iextrrr): Add NO-DIS attribute to .l
238 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
239 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
241 2012-02-27 Alan Modra <amodra@gmail.com>
243 * mt.opc (print_dollarhex): Trim values to 32 bits.
245 2011-12-15 Nick Clifton <nickc@redhat.com>
247 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
250 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
252 * epiphany.opc (parse_branch_addr): Fix type of valuep.
253 Cast value before printing it as a long.
254 (parse_postindex): Fix type of valuep.
256 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
258 * cpu/epiphany.cpu: New file.
259 * cpu/epiphany.opc: New file.
261 2011-08-22 Nick Clifton <nickc@redhat.com>
263 * fr30.cpu: Newly contributed file.
264 * fr30.opc: Likewise.
265 * ip2k.cpu: Likewise.
266 * ip2k.opc: Likewise.
267 * mep-avc.cpu: Likewise.
268 * mep-avc2.cpu: Likewise.
269 * mep-c5.cpu: Likewise.
270 * mep-core.cpu: Likewise.
271 * mep-default.cpu: Likewise.
272 * mep-ext-cop.cpu: Likewise.
273 * mep-fmax.cpu: Likewise.
274 * mep-h1.cpu: Likewise.
275 * mep-ivc2.cpu: Likewise.
276 * mep-rhcop.cpu: Likewise.
277 * mep-sample-ucidsp.cpu: Likewise.
280 * openrisc.cpu: Likewise.
281 * openrisc.opc: Likewise.
282 * xstormy16.cpu: Likewise.
283 * xstormy16.opc: Likewise.
285 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
287 * frv.opc: #undef DEBUG.
289 2010-07-03 DJ Delorie <dj@delorie.com>
291 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
293 2010-02-11 Doug Evans <dje@sebabeach.org>
295 * m32r.cpu (HASH-PREFIX): Delete.
296 (duhpo, dshpo): New pmacros.
297 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
298 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
299 attribute, define with dshpo.
300 (uimm24): Delete HASH-PREFIX attribute.
301 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
302 (print_signed_with_hash_prefix): New function.
303 (print_unsigned_with_hash_prefix): New function.
304 * xc16x.cpu (dowh): New pmacro.
305 (upof16): Define with dowh, specify print handler.
306 (qbit, qlobit, qhibit): Ditto.
308 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
309 (print_with_dot_prefix): New functions.
310 (print_with_pof_prefix, print_with_pag_prefix): New functions.
312 2010-01-24 Doug Evans <dje@sebabeach.org>
314 * frv.cpu (floating-point-conversion): Update call to fp conv op.
315 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
316 conditional-floating-point-conversion, ne-floating-point-conversion,
317 float-parallel-mul-add-double-semantics): Ditto.
319 2010-01-05 Doug Evans <dje@sebabeach.org>
321 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
322 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
324 2010-01-02 Doug Evans <dje@sebabeach.org>
326 * m32c.opc (parse_signed16): Fix typo.
328 2009-12-11 Nick Clifton <nickc@redhat.com>
330 * frv.opc: Fix shadowed variable warnings.
331 * m32c.opc: Fix shadowed variable warnings.
333 2009-11-14 Doug Evans <dje@sebabeach.org>
335 Must use VOID expression in VOID context.
336 * xc16x.cpu (mov4): Fix mode of `sequence'.
337 (mov9, mov10): Ditto.
338 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
339 (callr, callseg, calls, trap, rets, reti): Ditto.
340 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
341 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
342 (exts, exts1, extsr, extsr1, prior): Ditto.
344 2009-10-23 Doug Evans <dje@sebabeach.org>
346 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
347 cgen-ops.h -> cgen/basic-ops.h.
349 2009-09-25 Alan Modra <amodra@bigpond.net.au>
351 * m32r.cpu (stb-plus): Typo fix.
353 2009-09-23 Doug Evans <dje@sebabeach.org>
355 * m32r.cpu (sth-plus): Fix address mode and calculation.
357 (clrpsw): Fix mask calculation.
358 (bset, bclr, btst): Make mode in bit calculation match expression.
360 * xc16x.cpu (rtl-version): Set to 0.8.
361 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
362 make uppercase. Remove unnecessary name-prefix spec.
363 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
364 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
365 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
366 (h-cr): New hardware.
367 (muls): Comment out parts that won't compile, add fixme.
368 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
369 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
370 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
372 2009-07-16 Doug Evans <dje@sebabeach.org>
374 * cpu/simplify.inc (*): One line doc strings don't need \n.
375 (df): Invoke define-full-ifield instead of claiming it's an alias.
377 (dnop): Mark as deprecated.
379 2009-06-22 Alan Modra <amodra@bigpond.net.au>
381 * m32c.opc (parse_lab_5_3): Use correct enum.
383 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
385 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
386 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
387 (media-arith-sat-semantics): Explicitly sign- or zero-extend
388 arguments of "operation" to DI using "mode" and the new pmacros.
390 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
392 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
395 2008-12-23 Jon Beniston <jon@beniston.com>
397 * lm32.cpu: New file.
398 * lm32.opc: New file.
400 2008-01-29 Alan Modra <amodra@bigpond.net.au>
402 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
405 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
407 * cris.cpu (movs, movu): Use result of extension operation when
410 2007-07-04 Nick Clifton <nickc@redhat.com>
412 * cris.cpu: Update copyright notice to refer to GPLv3.
413 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
414 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
415 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
417 * iq2000.cpu: Fix copyright notice to refer to FSF.
419 2007-04-30 Mark Salter <msalter@sadr.localdomain>
421 * frv.cpu (spr-names): Support new coprocessor SPR registers.
423 2007-04-20 Nick Clifton <nickc@redhat.com>
425 * xc16x.cpu: Restore after accidentally overwriting this file with
428 2007-03-29 DJ Delorie <dj@redhat.com>
430 * m32c.cpu (Imm-8-s4n): Fix print hook.
431 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
432 (arith-jnz-imm4-dst-defn): Make relaxable.
433 (arith-jnz16-imm4-dst-defn): Fix encodings.
435 2007-03-20 DJ Delorie <dj@redhat.com>
437 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
439 (src16-16-20-An-relative-*): New.
440 (dst16-*-20-An-relative-*): New.
441 (dst16-16-16sa-*): New
442 (dst16-16-16ar-*): New
443 (dst32-16-16sa-Unprefixed-*): New
444 (jsri): Fix operands.
445 (setzx): Fix encoding.
447 2007-03-08 Alan Modra <amodra@bigpond.net.au>
449 * m32r.opc: Formatting.
451 2006-05-22 Nick Clifton <nickc@redhat.com>
453 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
455 2006-04-10 DJ Delorie <dj@redhat.com>
457 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
458 decides if this function accepts symbolic constants or not.
459 (parse_signed_bitbase): Likewise.
460 (parse_unsigned_bitbase8): Pass the new parameter.
461 (parse_unsigned_bitbase11): Likewise.
462 (parse_unsigned_bitbase16): Likewise.
463 (parse_unsigned_bitbase19): Likewise.
464 (parse_unsigned_bitbase27): Likewise.
465 (parse_signed_bitbase8): Likewise.
466 (parse_signed_bitbase11): Likewise.
467 (parse_signed_bitbase19): Likewise.
469 2006-03-13 DJ Delorie <dj@redhat.com>
471 * m32c.cpu (Bit3-S): New.
473 * m32c.opc (parse_bit3_S): New.
475 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
476 (btst): Add optional :G suffix for MACH32.
478 (pop.w:G): Add optional :G suffix for MACH16.
479 (push.b.imm): Fix syntax.
481 2006-03-10 DJ Delorie <dj@redhat.com>
483 * m32c.cpu (mul.l): New.
486 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
488 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
489 an error message otherwise.
490 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
491 Fix up comments to correctly describe the functions.
493 2006-02-24 DJ Delorie <dj@redhat.com>
495 * m32c.cpu (RL_TYPE): New attribute, with macros.
496 (Lab-8-24): Add RELAX.
497 (unary-insn-defn-g, binary-arith-imm-dst-defn,
498 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
499 (binary-arith-src-dst-defn): Add 2ADDR attribute.
500 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
501 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
503 (jsri16, jsri32): Add 1ADDR attribute.
504 (jsr32.w, jsr32.a): Add JUMP attribute.
506 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
507 Anil Paranjape <anilp1@kpitcummins.com>
508 Shilin Shakti <shilins@kpitcummins.com>
510 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
512 * xc16x.opc: New file containing supporting XC16C routines.
514 2006-02-10 Nick Clifton <nickc@redhat.com>
516 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
518 2006-01-06 DJ Delorie <dj@redhat.com>
520 * m32c.cpu (mov.w:q): Fix mode.
521 (push32.b.imm): Likewise, for the comment.
523 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
525 Second part of ms1 to mt renaming.
526 * mt.cpu (define-arch, define-isa): Set name to mt.
527 (define-mach): Adjust.
528 * mt.opc (CGEN_ASM_HASH): Update.
529 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
530 (parse_loopsize, parse_imm16): Adjust.
532 2005-12-13 DJ Delorie <dj@redhat.com>
534 * m32c.cpu (jsri): Fix order so register names aren't treated as
536 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
537 indexwd, indexws): Fix encodings.
539 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
541 * mt.cpu: Rename from ms1.cpu.
542 * mt.opc: Rename from ms1.opc.
544 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
546 * cris.cpu (simplecris-common-writable-specregs)
547 (simplecris-common-readable-specregs): Split from
548 simplecris-common-specregs. All users changed.
549 (cris-implemented-writable-specregs-v0)
550 (cris-implemented-readable-specregs-v0): Similar from
551 cris-implemented-specregs-v0.
552 (cris-implemented-writable-specregs-v3)
553 (cris-implemented-readable-specregs-v3)
554 (cris-implemented-writable-specregs-v8)
555 (cris-implemented-readable-specregs-v8)
556 (cris-implemented-writable-specregs-v10)
557 (cris-implemented-readable-specregs-v10)
558 (cris-implemented-writable-specregs-v32)
559 (cris-implemented-readable-specregs-v32): Similar.
560 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
561 insns and specializations.
563 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
566 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
568 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
569 f-cb2incr, f-rc3): New fields.
570 (LOOP): New instruction.
571 (JAL-HAZARD): New hazard.
572 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
574 (mul, muli, dbnz, iflush): Enable for ms2
575 (jal, reti): Has JAL-HAZARD.
576 (ldctxt, ldfb, stfb): Only ms1.
577 (fbcb): Only ms1,ms1-003.
578 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
579 fbcbincrs, mfbcbincrs): Enable for ms2.
580 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
581 * ms1.opc (parse_loopsize): New.
582 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
585 2005-10-28 Dave Brolley <brolley@redhat.com>
587 Contribute the following change:
588 2003-09-24 Dave Brolley <brolley@redhat.com>
590 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
591 CGEN_ATTR_VALUE_TYPE.
592 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
593 Use cgen_bitset_intersect_p.
595 2005-10-27 DJ Delorie <dj@redhat.com>
597 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
598 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
599 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
600 imm operand is needed.
601 (adjnz, sbjnz): Pass the right operands.
602 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
603 unary-insn): Add -g variants for opcodes that need to support :G.
604 (not.BW:G, push.BW:G): Call it.
605 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
606 stzx16-imm8-imm8-abs16): Fix operand typos.
607 * m32c.opc (m32c_asm_hash): Support bnCND.
608 (parse_signed4n, print_signed4n): New.
610 2005-10-26 DJ Delorie <dj@redhat.com>
612 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
613 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
614 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
616 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
617 (mov.BW:S r0,r1): Fix typo r1l->r1.
618 (tst): Allow :G suffix.
619 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
621 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
623 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
625 2005-10-25 DJ Delorie <dj@redhat.com>
627 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
628 making one a macro of the other.
630 2005-10-21 DJ Delorie <dj@redhat.com>
632 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
633 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
634 indexld, indexls): .w variants have `1' bit.
635 (rot32.b): QI, not SI.
636 (rot32.w): HI, not SI.
637 (xchg16): HI for .w variant.
639 2005-10-19 Nick Clifton <nickc@redhat.com>
641 * m32r.opc (parse_slo16): Fix bad application of previous patch.
643 2005-10-18 Andreas Schwab <schwab@suse.de>
645 * m32r.opc (parse_slo16): Better version of previous patch.
647 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
649 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
652 2005-07-25 DJ Delorie <dj@redhat.com>
654 * m32c.opc (parse_unsigned8): Add %dsp8().
655 (parse_signed8): Add %hi8().
656 (parse_unsigned16): Add %dsp16().
657 (parse_signed16): Add %lo16() and %hi16().
658 (parse_lab_5_3): Make valuep a bfd_vma *.
660 2005-07-18 Nick Clifton <nickc@redhat.com>
662 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
664 (f-lab32-jmp-s): Fix insertion sequence.
665 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
666 (Dsp-40-s8): Make parameter be signed.
667 (Dsp-40-s16): Likewise.
668 (Dsp-48-s8): Likewise.
669 (Dsp-48-s16): Likewise.
670 (Imm-13-u3): Likewise. (Despite its name!)
671 (BitBase16-16-s8): Make the parameter be unsigned.
672 (BitBase16-8-u11-S): Likewise.
673 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
674 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
677 * m32c.opc: Fix formatting.
678 Use safe-ctype.h instead of ctype.h
679 Move duplicated code sequences into a macro.
680 Fix compile time warnings about signedness mismatches.
682 (parse_lab_5_3): New parser function.
684 2005-07-16 Jim Blandy <jimb@redhat.com>
686 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
687 to represent isa sets.
689 2005-07-15 Jim Blandy <jimb@redhat.com>
691 * m32c.cpu, m32c.opc: Fix copyright.
693 2005-07-14 Jim Blandy <jimb@redhat.com>
695 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
697 2005-07-14 Alan Modra <amodra@bigpond.net.au>
699 * ms1.opc (print_dollarhex): Correct format string.
701 2005-07-06 Alan Modra <amodra@bigpond.net.au>
703 * iq2000.cpu: Include from binutils cpu dir.
705 2005-07-05 Nick Clifton <nickc@redhat.com>
707 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
708 unsigned in order to avoid compile time warnings about sign
711 * ms1.opc (parse_*): Likewise.
712 (parse_imm16): Use a "void *" as it is passed both signed and
715 2005-07-01 Nick Clifton <nickc@redhat.com>
717 * frv.opc: Update to ISO C90 function declaration style.
718 * iq2000.opc: Likewise.
719 * m32r.opc: Likewise.
722 2005-06-15 Dave Brolley <brolley@redhat.com>
724 Contributed by Red Hat.
725 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
726 * ms1.opc: New file. Written by Stan Cox.
728 2005-05-10 Nick Clifton <nickc@redhat.com>
730 * Update the address and phone number of the FSF organization in
731 the GPL notices in the following files:
732 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
733 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
734 sh64-media.cpu, simplify.inc
736 2005-02-24 Alan Modra <amodra@bigpond.net.au>
738 * frv.opc (parse_A): Warning fix.
740 2005-02-23 Nick Clifton <nickc@redhat.com>
742 * frv.opc: Fixed compile time warnings about differing signed'ness
743 of pointers passed to functions.
744 * m32r.opc: Likewise.
746 2005-02-11 Nick Clifton <nickc@redhat.com>
748 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
749 'bfd_vma *' in order avoid compile time warning message.
751 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
753 * cris.cpu (mstep): Add missing insn.
755 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
757 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
758 * frv.cpu: Add support for TLS annotations in loads and calll.
759 * frv.opc (parse_symbolic_address): New.
760 (parse_ldd_annotation): New.
761 (parse_call_annotation): New.
762 (parse_ld_annotation): New.
763 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
764 Introduce TLS relocations.
765 (parse_d12, parse_s12, parse_u12): Likewise.
766 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
767 (parse_call_label, print_at): New.
769 2004-12-21 Mikael Starvik <starvik@axis.com>
771 * cris.cpu (cris-set-mem): Correct integral write semantics.
773 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
775 * cris.cpu: New file.
777 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
779 * iq2000.cpu: Added quotes around macro arguments so that they
780 will work with newer versions of guile.
782 2004-10-27 Nick Clifton <nickc@redhat.com>
784 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
785 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
787 * iq2000.cpu (dnop index): Rename to _index to avoid complications
790 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
792 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
794 2004-05-15 Nick Clifton <nickc@redhat.com>
796 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
798 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
800 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
802 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
804 * frv.cpu (define-arch frv): Add fr450 mach.
805 (define-mach fr450): New.
806 (define-model fr450): New. Add profile units to every fr450 insn.
807 (define-attr UNIT): Add MDCUTSSI.
808 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
809 (define-attr AUDIO): New boolean.
810 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
811 (f-LRA-null, f-TLBPR-null): New fields.
812 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
813 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
814 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
815 (LRA-null, TLBPR-null): New macros.
816 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
817 (load-real-address): New macro.
818 (lrai, lrad, tlbpr): New instructions.
819 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
820 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
821 (mdcutssi): Change UNIT attribute to MDCUTSSI.
822 (media-low-clear-semantics, media-scope-limit-semantics)
823 (media-quad-limit, media-quad-shift): New macros.
824 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
825 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
826 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
827 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
828 (fr450_unit_mapping): New array.
829 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
830 for new MDCUTSSI unit.
831 (fr450_check_insn_major_constraints): New function.
832 (check_insn_major_constraints): Use it.
834 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
836 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
837 (scutss): Change unit to I0.
838 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
839 (mqsaths): Fix FR400-MAJOR categorization.
840 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
841 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
842 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
845 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
847 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
848 (rstb, rsth, rst, rstd, rstq): Delete.
849 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
851 2004-02-23 Nick Clifton <nickc@redhat.com>
853 * Apply these patches from Renesas:
855 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
857 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
858 disassembling codes for 0x*2 addresses.
860 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
862 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
864 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
866 * cpu/m32r.cpu : Add new model m32r2.
867 Add new instructions.
868 Replace occurrances of 'Mitsubishi' with 'Renesas'.
869 Changed PIPE attr of push from O to OS.
870 Care for Little-endian of M32R.
871 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
872 Care for Little-endian of M32R.
873 (parse_slo16): signed extension for value.
875 2004-02-20 Andrew Cagney <cagney@redhat.com>
877 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
878 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
880 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
881 written by Ben Elliston.
883 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
885 * frv.cpu (UNIT): Add IACC.
886 (iacc-multiply-r-r): Use it.
887 * frv.opc (fr400_unit_mapping): Add entry for IACC.
888 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
890 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
892 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
893 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
894 cut&paste errors in shifting/truncating numerical operands.
895 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
896 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
897 (parse_uslo16): Likewise.
898 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
899 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
900 (parse_s12): Likewise.
901 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
902 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
903 (parse_uslo16): Likewise.
904 (parse_uhi16): Parse gothi and gotfuncdeschi.
905 (parse_d12): Parse got12 and gotfuncdesc12.
906 (parse_s12): Likewise.
908 2003-10-10 Dave Brolley <brolley@redhat.com>
910 * frv.cpu (dnpmop): New p-macro.
911 (GRdoublek): Use dnpmop.
912 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
913 (store-double-r-r): Use (.sym regtype doublek).
914 (r-store-double): Ditto.
915 (store-double-r-r-u): Ditto.
916 (conditional-store-double): Ditto.
917 (conditional-store-double-u): Ditto.
918 (store-double-r-simm): Ditto.
919 (fmovs): Assign to UNIT FMALL.
921 2003-10-06 Dave Brolley <brolley@redhat.com>
923 * frv.cpu, frv.opc: Add support for fr550.
925 2003-09-24 Dave Brolley <brolley@redhat.com>
927 * frv.cpu (u-commit): New modelling unit for fr500.
928 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
929 (commit-r): Use u-commit model for fr500.
931 (conditional-float-binary-op): Take profiling data as an argument.
933 (ne-float-binary-op): Ditto.
935 2003-09-19 Michael Snyder <msnyder@redhat.com>
937 * frv.cpu (nldqi): Delete unimplemented instruction.
939 2003-09-12 Dave Brolley <brolley@redhat.com>
941 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
942 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
943 frv_ref_SI to get input register referenced for profiling.
944 (clear-ne-flag-all): Pass insn profiling in as an argument.
945 (clrgr,clrfr,clrga,clrfa): Add profiling information.
947 2003-09-11 Michael Snyder <msnyder@redhat.com>
949 * frv.cpu: Typographical corrections.
951 2003-09-09 Dave Brolley <brolley@redhat.com>
953 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
954 (conditional-media-dual-complex, media-quad-complex): Likewise.
956 2003-09-04 Dave Brolley <brolley@redhat.com>
958 * frv.cpu (register-transfer): Pass in all attributes in on argument.
960 (conditional-register-transfer): Ditto.
961 (cache-preload): Ditto.
962 (floating-point-conversion): Ditto.
963 (floating-point-neg): Ditto.
965 (float-binary-op-s): Ditto.
966 (conditional-float-binary-op): Ditto.
967 (ne-float-binary-op): Ditto.
968 (float-dual-arith): Ditto.
969 (ne-float-dual-arith): Ditto.
971 2003-09-03 Dave Brolley <brolley@redhat.com>
973 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
974 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
976 (A): Removed operand.
977 (A0,A1): New operands replace operand A.
978 (mnop): Now a real insn
979 (mclracc): Removed insn.
980 (mclracc-0, mclracc-1): New insns replace mclracc.
981 (all insns): Use new UNIT attributes.
983 2003-08-21 Nick Clifton <nickc@redhat.com>
985 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
986 and u-media-dual-btoh with output parameter.
987 (cmbtoh): Add profiling hack.
989 2003-08-19 Michael Snyder <msnyder@redhat.com>
991 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
993 2003-06-10 Doug Evans <dje@sebabeach.org>
995 * frv.cpu: Add IDOC attribute.
997 2003-06-06 Andrew Cagney <cagney@redhat.com>
999 Contributed by Red Hat.
1000 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1001 Stan Cox, and Frank Ch. Eigler.
1002 * iq2000.opc: New file. Written by Ben Elliston, Frank
1003 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1004 * iq2000m.cpu: New file. Written by Jeff Johnston.
1005 * iq10.cpu: New file. Written by Jeff Johnston.
1007 2003-06-05 Nick Clifton <nickc@redhat.com>
1009 * frv.cpu (FRintieven): New operand. An even-numbered only
1010 version of the FRinti operand.
1011 (FRintjeven): Likewise for FRintj.
1012 (FRintkeven): Likewise for FRintk.
1013 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1014 media-quad-arith-sat-semantics, media-quad-arith-sat,
1015 conditional-media-quad-arith-sat, mdunpackh,
1016 media-quad-multiply-semantics, media-quad-multiply,
1017 conditional-media-quad-multiply, media-quad-complex-i,
1018 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1019 conditional-media-quad-multiply-acc, munpackh,
1020 media-quad-multiply-cross-acc-semantics, mdpackh,
1021 media-quad-multiply-cross-acc, mbtoh-semantics,
1022 media-quad-cross-multiply-cross-acc-semantics,
1023 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1024 media-quad-cross-multiply-acc-semantics, cmbtoh,
1025 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1026 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1027 cmhtob): Use new operands.
1028 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1029 (parse_even_register): New function.
1031 2003-06-03 Nick Clifton <nickc@redhat.com>
1033 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1034 immediate value not unsigned.
1036 2003-06-03 Andrew Cagney <cagney@redhat.com>
1038 Contributed by Red Hat.
1039 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1040 and Eric Christopher.
1041 * frv.opc: New file. Written by Catherine Moore, and Dave
1043 * simplify.inc: New file. Written by Doug Evans.
1045 2003-05-02 Andrew Cagney <cagney@redhat.com>
1050 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1052 Copying and distribution of this file, with or without modification,
1053 are permitted in any medium without royalty provided the copyright
1054 notice and this notice are preserved.
1060 version-control: never