ACPICA: Support for custom ACPICA build for ACPI 5 reduced hardware
[deliverable/linux.git] / drivers / acpi / acpica / hwregs.c
1
2 /*******************************************************************************
3 *
4 * Module Name: hwregs - Read/write access functions for the various ACPI
5 * control and status registers.
6 *
7 ******************************************************************************/
8
9 /*
10 * Copyright (C) 2000 - 2012, Intel Corp.
11 * All rights reserved.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions, and the following disclaimer,
18 * without modification.
19 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
20 * substantially similar to the "NO WARRANTY" disclaimer below
21 * ("Disclaimer") and any redistribution must be conditioned upon
22 * including a substantially similar Disclaimer requirement for further
23 * binary redistribution.
24 * 3. Neither the names of the above-listed copyright holders nor the names
25 * of any contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * Alternatively, this software may be distributed under the terms of the
29 * GNU General Public License ("GPL") version 2 as published by the Free
30 * Software Foundation.
31 *
32 * NO WARRANTY
33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
34 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
35 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
36 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
37 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
42 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43 * POSSIBILITY OF SUCH DAMAGES.
44 */
45
46 #include <acpi/acpi.h>
47 #include "accommon.h"
48 #include "acnamesp.h"
49 #include "acevents.h"
50
51 #define _COMPONENT ACPI_HARDWARE
52 ACPI_MODULE_NAME("hwregs")
53
54 #if (!ACPI_REDUCED_HARDWARE)
55 /* Local Prototypes */
56 static acpi_status
57 acpi_hw_read_multiple(u32 *value,
58 struct acpi_generic_address *register_a,
59 struct acpi_generic_address *register_b);
60
61 static acpi_status
62 acpi_hw_write_multiple(u32 value,
63 struct acpi_generic_address *register_a,
64 struct acpi_generic_address *register_b);
65
66 #endif /* !ACPI_REDUCED_HARDWARE */
67
68 /******************************************************************************
69 *
70 * FUNCTION: acpi_hw_validate_register
71 *
72 * PARAMETERS: Reg - GAS register structure
73 * max_bit_width - Max bit_width supported (32 or 64)
74 * Address - Pointer to where the gas->address
75 * is returned
76 *
77 * RETURN: Status
78 *
79 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
80 * pointer, Address, space_id, bit_width, and bit_offset.
81 *
82 ******************************************************************************/
83
84 acpi_status
85 acpi_hw_validate_register(struct acpi_generic_address *reg,
86 u8 max_bit_width, u64 *address)
87 {
88
89 /* Must have a valid pointer to a GAS structure */
90
91 if (!reg) {
92 return (AE_BAD_PARAMETER);
93 }
94
95 /*
96 * Copy the target address. This handles possible alignment issues.
97 * Address must not be null. A null address also indicates an optional
98 * ACPI register that is not supported, so no error message.
99 */
100 ACPI_MOVE_64_TO_64(address, &reg->address);
101 if (!(*address)) {
102 return (AE_BAD_ADDRESS);
103 }
104
105 /* Validate the space_iD */
106
107 if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
108 (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
109 ACPI_ERROR((AE_INFO,
110 "Unsupported address space: 0x%X", reg->space_id));
111 return (AE_SUPPORT);
112 }
113
114 /* Validate the bit_width */
115
116 if ((reg->bit_width != 8) &&
117 (reg->bit_width != 16) &&
118 (reg->bit_width != 32) && (reg->bit_width != max_bit_width)) {
119 ACPI_ERROR((AE_INFO,
120 "Unsupported register bit width: 0x%X",
121 reg->bit_width));
122 return (AE_SUPPORT);
123 }
124
125 /* Validate the bit_offset. Just a warning for now. */
126
127 if (reg->bit_offset != 0) {
128 ACPI_WARNING((AE_INFO,
129 "Unsupported register bit offset: 0x%X",
130 reg->bit_offset));
131 }
132
133 return (AE_OK);
134 }
135
136 /******************************************************************************
137 *
138 * FUNCTION: acpi_hw_read
139 *
140 * PARAMETERS: Value - Where the value is returned
141 * Reg - GAS register structure
142 *
143 * RETURN: Status
144 *
145 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
146 * version of acpi_read, used internally since the overhead of
147 * 64-bit values is not needed.
148 *
149 * LIMITATIONS: <These limitations also apply to acpi_hw_write>
150 * bit_width must be exactly 8, 16, or 32.
151 * space_iD must be system_memory or system_iO.
152 * bit_offset and access_width are currently ignored, as there has
153 * not been a need to implement these.
154 *
155 ******************************************************************************/
156
157 acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
158 {
159 u64 address;
160 acpi_status status;
161
162 ACPI_FUNCTION_NAME(hw_read);
163
164 /* Validate contents of the GAS register */
165
166 status = acpi_hw_validate_register(reg, 32, &address);
167 if (ACPI_FAILURE(status)) {
168 return (status);
169 }
170
171 /* Initialize entire 32-bit return value to zero */
172
173 *value = 0;
174
175 /*
176 * Two address spaces supported: Memory or IO. PCI_Config is
177 * not supported here because the GAS structure is insufficient
178 */
179 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
180 status = acpi_os_read_memory((acpi_physical_address)
181 address, value, reg->bit_width);
182 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
183
184 status = acpi_hw_read_port((acpi_io_address)
185 address, value, reg->bit_width);
186 }
187
188 ACPI_DEBUG_PRINT((ACPI_DB_IO,
189 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
190 *value, reg->bit_width, ACPI_FORMAT_UINT64(address),
191 acpi_ut_get_region_name(reg->space_id)));
192
193 return (status);
194 }
195
196 /******************************************************************************
197 *
198 * FUNCTION: acpi_hw_write
199 *
200 * PARAMETERS: Value - Value to be written
201 * Reg - GAS register structure
202 *
203 * RETURN: Status
204 *
205 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
206 * version of acpi_write, used internally since the overhead of
207 * 64-bit values is not needed.
208 *
209 ******************************************************************************/
210
211 acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
212 {
213 u64 address;
214 acpi_status status;
215
216 ACPI_FUNCTION_NAME(hw_write);
217
218 /* Validate contents of the GAS register */
219
220 status = acpi_hw_validate_register(reg, 32, &address);
221 if (ACPI_FAILURE(status)) {
222 return (status);
223 }
224
225 /*
226 * Two address spaces supported: Memory or IO. PCI_Config is
227 * not supported here because the GAS structure is insufficient
228 */
229 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
230 status = acpi_os_write_memory((acpi_physical_address)
231 address, value, reg->bit_width);
232 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
233
234 status = acpi_hw_write_port((acpi_io_address)
235 address, value, reg->bit_width);
236 }
237
238 ACPI_DEBUG_PRINT((ACPI_DB_IO,
239 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
240 value, reg->bit_width, ACPI_FORMAT_UINT64(address),
241 acpi_ut_get_region_name(reg->space_id)));
242
243 return (status);
244 }
245
246 #if (!ACPI_REDUCED_HARDWARE)
247 /*******************************************************************************
248 *
249 * FUNCTION: acpi_hw_clear_acpi_status
250 *
251 * PARAMETERS: None
252 *
253 * RETURN: Status
254 *
255 * DESCRIPTION: Clears all fixed and general purpose status bits
256 *
257 ******************************************************************************/
258
259 acpi_status acpi_hw_clear_acpi_status(void)
260 {
261 acpi_status status;
262 acpi_cpu_flags lock_flags = 0;
263
264 ACPI_FUNCTION_TRACE(hw_clear_acpi_status);
265
266 ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
267 ACPI_BITMASK_ALL_FIXED_STATUS,
268 ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address)));
269
270 lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
271
272 /* Clear the fixed events in PM1 A/B */
273
274 status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
275 ACPI_BITMASK_ALL_FIXED_STATUS);
276
277 acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags);
278
279 if (ACPI_FAILURE(status))
280 goto exit;
281
282 /* Clear the GPE Bits in all GPE registers in all GPE blocks */
283
284 status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL);
285
286 exit:
287 return_ACPI_STATUS(status);
288 }
289
290 /*******************************************************************************
291 *
292 * FUNCTION: acpi_hw_get_bit_register_info
293 *
294 * PARAMETERS: register_id - Index of ACPI Register to access
295 *
296 * RETURN: The bitmask to be used when accessing the register
297 *
298 * DESCRIPTION: Map register_id into a register bitmask.
299 *
300 ******************************************************************************/
301
302 struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
303 {
304 ACPI_FUNCTION_ENTRY();
305
306 if (register_id > ACPI_BITREG_MAX) {
307 ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X",
308 register_id));
309 return (NULL);
310 }
311
312 return (&acpi_gbl_bit_register_info[register_id]);
313 }
314
315 /******************************************************************************
316 *
317 * FUNCTION: acpi_hw_write_pm1_control
318 *
319 * PARAMETERS: pm1a_control - Value to be written to PM1A control
320 * pm1b_control - Value to be written to PM1B control
321 *
322 * RETURN: Status
323 *
324 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
325 * different than than the PM1 A/B status and enable registers
326 * in that different values can be written to the A/B registers.
327 * Most notably, the SLP_TYP bits can be different, as per the
328 * values returned from the _Sx predefined methods.
329 *
330 ******************************************************************************/
331
332 acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
333 {
334 acpi_status status;
335
336 ACPI_FUNCTION_TRACE(hw_write_pm1_control);
337
338 status =
339 acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
340 if (ACPI_FAILURE(status)) {
341 return_ACPI_STATUS(status);
342 }
343
344 if (acpi_gbl_FADT.xpm1b_control_block.address) {
345 status =
346 acpi_hw_write(pm1b_control,
347 &acpi_gbl_FADT.xpm1b_control_block);
348 }
349 return_ACPI_STATUS(status);
350 }
351
352 /******************************************************************************
353 *
354 * FUNCTION: acpi_hw_register_read
355 *
356 * PARAMETERS: register_id - ACPI Register ID
357 * return_value - Where the register value is returned
358 *
359 * RETURN: Status and the value read.
360 *
361 * DESCRIPTION: Read from the specified ACPI register
362 *
363 ******************************************************************************/
364 acpi_status
365 acpi_hw_register_read(u32 register_id, u32 * return_value)
366 {
367 u32 value = 0;
368 acpi_status status;
369
370 ACPI_FUNCTION_TRACE(hw_register_read);
371
372 switch (register_id) {
373 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
374
375 status = acpi_hw_read_multiple(&value,
376 &acpi_gbl_xpm1a_status,
377 &acpi_gbl_xpm1b_status);
378 break;
379
380 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
381
382 status = acpi_hw_read_multiple(&value,
383 &acpi_gbl_xpm1a_enable,
384 &acpi_gbl_xpm1b_enable);
385 break;
386
387 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
388
389 status = acpi_hw_read_multiple(&value,
390 &acpi_gbl_FADT.
391 xpm1a_control_block,
392 &acpi_gbl_FADT.
393 xpm1b_control_block);
394
395 /*
396 * Zero the write-only bits. From the ACPI specification, "Hardware
397 * Write-Only Bits": "Upon reads to registers with write-only bits,
398 * software masks out all write-only bits."
399 */
400 value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
401 break;
402
403 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
404
405 status =
406 acpi_hw_read(&value, &acpi_gbl_FADT.xpm2_control_block);
407 break;
408
409 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
410
411 status = acpi_hw_read(&value, &acpi_gbl_FADT.xpm_timer_block);
412 break;
413
414 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
415
416 status =
417 acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
418 break;
419
420 default:
421 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
422 status = AE_BAD_PARAMETER;
423 break;
424 }
425
426 if (ACPI_SUCCESS(status)) {
427 *return_value = value;
428 }
429
430 return_ACPI_STATUS(status);
431 }
432
433 /******************************************************************************
434 *
435 * FUNCTION: acpi_hw_register_write
436 *
437 * PARAMETERS: register_id - ACPI Register ID
438 * Value - The value to write
439 *
440 * RETURN: Status
441 *
442 * DESCRIPTION: Write to the specified ACPI register
443 *
444 * NOTE: In accordance with the ACPI specification, this function automatically
445 * preserves the value of the following bits, meaning that these bits cannot be
446 * changed via this interface:
447 *
448 * PM1_CONTROL[0] = SCI_EN
449 * PM1_CONTROL[9]
450 * PM1_STATUS[11]
451 *
452 * ACPI References:
453 * 1) Hardware Ignored Bits: When software writes to a register with ignored
454 * bit fields, it preserves the ignored bit fields
455 * 2) SCI_EN: OSPM always preserves this bit position
456 *
457 ******************************************************************************/
458
459 acpi_status acpi_hw_register_write(u32 register_id, u32 value)
460 {
461 acpi_status status;
462 u32 read_value;
463
464 ACPI_FUNCTION_TRACE(hw_register_write);
465
466 switch (register_id) {
467 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
468 /*
469 * Handle the "ignored" bit in PM1 Status. According to the ACPI
470 * specification, ignored bits are to be preserved when writing.
471 * Normally, this would mean a read/modify/write sequence. However,
472 * preserving a bit in the status register is different. Writing a
473 * one clears the status, and writing a zero preserves the status.
474 * Therefore, we must always write zero to the ignored bit.
475 *
476 * This behavior is clarified in the ACPI 4.0 specification.
477 */
478 value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
479
480 status = acpi_hw_write_multiple(value,
481 &acpi_gbl_xpm1a_status,
482 &acpi_gbl_xpm1b_status);
483 break;
484
485 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access */
486
487 status = acpi_hw_write_multiple(value,
488 &acpi_gbl_xpm1a_enable,
489 &acpi_gbl_xpm1b_enable);
490 break;
491
492 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
493
494 /*
495 * Perform a read first to preserve certain bits (per ACPI spec)
496 * Note: This includes SCI_EN, we never want to change this bit
497 */
498 status = acpi_hw_read_multiple(&read_value,
499 &acpi_gbl_FADT.
500 xpm1a_control_block,
501 &acpi_gbl_FADT.
502 xpm1b_control_block);
503 if (ACPI_FAILURE(status)) {
504 goto exit;
505 }
506
507 /* Insert the bits to be preserved */
508
509 ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS,
510 read_value);
511
512 /* Now we can write the data */
513
514 status = acpi_hw_write_multiple(value,
515 &acpi_gbl_FADT.
516 xpm1a_control_block,
517 &acpi_gbl_FADT.
518 xpm1b_control_block);
519 break;
520
521 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
522
523 /*
524 * For control registers, all reserved bits must be preserved,
525 * as per the ACPI spec.
526 */
527 status =
528 acpi_hw_read(&read_value,
529 &acpi_gbl_FADT.xpm2_control_block);
530 if (ACPI_FAILURE(status)) {
531 goto exit;
532 }
533
534 /* Insert the bits to be preserved */
535
536 ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS,
537 read_value);
538
539 status =
540 acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block);
541 break;
542
543 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
544
545 status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block);
546 break;
547
548 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
549
550 /* SMI_CMD is currently always in IO space */
551
552 status =
553 acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
554 break;
555
556 default:
557 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
558 status = AE_BAD_PARAMETER;
559 break;
560 }
561
562 exit:
563 return_ACPI_STATUS(status);
564 }
565
566 /******************************************************************************
567 *
568 * FUNCTION: acpi_hw_read_multiple
569 *
570 * PARAMETERS: Value - Where the register value is returned
571 * register_a - First ACPI register (required)
572 * register_b - Second ACPI register (optional)
573 *
574 * RETURN: Status
575 *
576 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
577 *
578 ******************************************************************************/
579
580 static acpi_status
581 acpi_hw_read_multiple(u32 *value,
582 struct acpi_generic_address *register_a,
583 struct acpi_generic_address *register_b)
584 {
585 u32 value_a = 0;
586 u32 value_b = 0;
587 acpi_status status;
588
589 /* The first register is always required */
590
591 status = acpi_hw_read(&value_a, register_a);
592 if (ACPI_FAILURE(status)) {
593 return (status);
594 }
595
596 /* Second register is optional */
597
598 if (register_b->address) {
599 status = acpi_hw_read(&value_b, register_b);
600 if (ACPI_FAILURE(status)) {
601 return (status);
602 }
603 }
604
605 /*
606 * OR the two return values together. No shifting or masking is necessary,
607 * because of how the PM1 registers are defined in the ACPI specification:
608 *
609 * "Although the bits can be split between the two register blocks (each
610 * register block has a unique pointer within the FADT), the bit positions
611 * are maintained. The register block with unimplemented bits (that is,
612 * those implemented in the other register block) always returns zeros,
613 * and writes have no side effects"
614 */
615 *value = (value_a | value_b);
616 return (AE_OK);
617 }
618
619 /******************************************************************************
620 *
621 * FUNCTION: acpi_hw_write_multiple
622 *
623 * PARAMETERS: Value - The value to write
624 * register_a - First ACPI register (required)
625 * register_b - Second ACPI register (optional)
626 *
627 * RETURN: Status
628 *
629 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
630 *
631 ******************************************************************************/
632
633 static acpi_status
634 acpi_hw_write_multiple(u32 value,
635 struct acpi_generic_address *register_a,
636 struct acpi_generic_address *register_b)
637 {
638 acpi_status status;
639
640 /* The first register is always required */
641
642 status = acpi_hw_write(value, register_a);
643 if (ACPI_FAILURE(status)) {
644 return (status);
645 }
646
647 /*
648 * Second register is optional
649 *
650 * No bit shifting or clearing is necessary, because of how the PM1
651 * registers are defined in the ACPI specification:
652 *
653 * "Although the bits can be split between the two register blocks (each
654 * register block has a unique pointer within the FADT), the bit positions
655 * are maintained. The register block with unimplemented bits (that is,
656 * those implemented in the other register block) always returns zeros,
657 * and writes have no side effects"
658 */
659 if (register_b->address) {
660 status = acpi_hw_write(value, register_b);
661 }
662
663 return (status);
664 }
665
666 #endif /* !ACPI_REDUCED_HARDWARE */
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