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Merge remote-tracking branch 'asoc/fix/ux500' into asoc-linus
[deliverable/linux.git] / drivers / acpi / processor_idle.c
1 /*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
31 #include <linux/module.h>
32 #include <linux/acpi.h>
33 #include <linux/dmi.h>
34 #include <linux/sched.h> /* need_resched() */
35 #include <linux/clockchips.h>
36 #include <linux/cpuidle.h>
37
38 /*
39 * Include the apic definitions for x86 to have the APIC timer related defines
40 * available also for UP (on SMP it gets magically included via linux/smp.h).
41 * asm/acpi.h is not an option, as it would require more include magic. Also
42 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
43 */
44 #ifdef CONFIG_X86
45 #include <asm/apic.h>
46 #endif
47
48 #include <acpi/acpi_bus.h>
49 #include <acpi/processor.h>
50
51 #define PREFIX "ACPI: "
52
53 #define ACPI_PROCESSOR_CLASS "processor"
54 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
55 ACPI_MODULE_NAME("processor_idle");
56
57 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
58 module_param(max_cstate, uint, 0000);
59 static unsigned int nocst __read_mostly;
60 module_param(nocst, uint, 0000);
61 static int bm_check_disable __read_mostly;
62 module_param(bm_check_disable, uint, 0000);
63
64 static unsigned int latency_factor __read_mostly = 2;
65 module_param(latency_factor, uint, 0644);
66
67 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
68
69 static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX],
70 acpi_cstate);
71
72 static int disabled_by_idle_boot_param(void)
73 {
74 return boot_option_idle_override == IDLE_POLL ||
75 boot_option_idle_override == IDLE_HALT;
76 }
77
78 /*
79 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
80 * For now disable this. Probably a bug somewhere else.
81 *
82 * To skip this limit, boot/load with a large max_cstate limit.
83 */
84 static int set_max_cstate(const struct dmi_system_id *id)
85 {
86 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
87 return 0;
88
89 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
90 " Override with \"processor.max_cstate=%d\"\n", id->ident,
91 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
92
93 max_cstate = (long)id->driver_data;
94
95 return 0;
96 }
97
98 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
99 callers to only run once -AK */
100 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
101 { set_max_cstate, "Clevo 5600D", {
102 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
103 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
104 (void *)2},
105 { set_max_cstate, "Pavilion zv5000", {
106 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
107 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
108 (void *)1},
109 { set_max_cstate, "Asus L8400B", {
110 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
111 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
112 (void *)1},
113 {},
114 };
115
116
117 /*
118 * Callers should disable interrupts before the call and enable
119 * interrupts after return.
120 */
121 static void acpi_safe_halt(void)
122 {
123 current_thread_info()->status &= ~TS_POLLING;
124 /*
125 * TS_POLLING-cleared state must be visible before we
126 * test NEED_RESCHED:
127 */
128 smp_mb();
129 if (!need_resched()) {
130 safe_halt();
131 local_irq_disable();
132 }
133 current_thread_info()->status |= TS_POLLING;
134 }
135
136 #ifdef ARCH_APICTIMER_STOPS_ON_C3
137
138 /*
139 * Some BIOS implementations switch to C3 in the published C2 state.
140 * This seems to be a common problem on AMD boxen, but other vendors
141 * are affected too. We pick the most conservative approach: we assume
142 * that the local APIC stops in both C2 and C3.
143 */
144 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
145 struct acpi_processor_cx *cx)
146 {
147 struct acpi_processor_power *pwr = &pr->power;
148 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
149
150 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
151 return;
152
153 if (amd_e400_c1e_detected)
154 type = ACPI_STATE_C1;
155
156 /*
157 * Check, if one of the previous states already marked the lapic
158 * unstable
159 */
160 if (pwr->timer_broadcast_on_state < state)
161 return;
162
163 if (cx->type >= type)
164 pr->power.timer_broadcast_on_state = state;
165 }
166
167 static void __lapic_timer_propagate_broadcast(void *arg)
168 {
169 struct acpi_processor *pr = (struct acpi_processor *) arg;
170 unsigned long reason;
171
172 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
173 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
174
175 clockevents_notify(reason, &pr->id);
176 }
177
178 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
179 {
180 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
181 (void *)pr, 1);
182 }
183
184 /* Power(C) State timer broadcast control */
185 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
186 struct acpi_processor_cx *cx,
187 int broadcast)
188 {
189 int state = cx - pr->power.states;
190
191 if (state >= pr->power.timer_broadcast_on_state) {
192 unsigned long reason;
193
194 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
195 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
196 clockevents_notify(reason, &pr->id);
197 }
198 }
199
200 #else
201
202 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
203 struct acpi_processor_cx *cstate) { }
204 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
205 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
206 struct acpi_processor_cx *cx,
207 int broadcast)
208 {
209 }
210
211 #endif
212
213 static u32 saved_bm_rld;
214
215 static void acpi_idle_bm_rld_save(void)
216 {
217 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
218 }
219 static void acpi_idle_bm_rld_restore(void)
220 {
221 u32 resumed_bm_rld;
222
223 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
224
225 if (resumed_bm_rld != saved_bm_rld)
226 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
227 }
228
229 int acpi_processor_suspend(struct device *dev)
230 {
231 acpi_idle_bm_rld_save();
232 return 0;
233 }
234
235 int acpi_processor_resume(struct device *dev)
236 {
237 acpi_idle_bm_rld_restore();
238 return 0;
239 }
240
241 #if defined(CONFIG_X86)
242 static void tsc_check_state(int state)
243 {
244 switch (boot_cpu_data.x86_vendor) {
245 case X86_VENDOR_AMD:
246 case X86_VENDOR_INTEL:
247 /*
248 * AMD Fam10h TSC will tick in all
249 * C/P/S0/S1 states when this bit is set.
250 */
251 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
252 return;
253
254 /*FALL THROUGH*/
255 default:
256 /* TSC could halt in idle, so notify users */
257 if (state > ACPI_STATE_C1)
258 mark_tsc_unstable("TSC halts in idle");
259 }
260 }
261 #else
262 static void tsc_check_state(int state) { return; }
263 #endif
264
265 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
266 {
267
268 if (!pr)
269 return -EINVAL;
270
271 if (!pr->pblk)
272 return -ENODEV;
273
274 /* if info is obtained from pblk/fadt, type equals state */
275 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
276 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
277
278 #ifndef CONFIG_HOTPLUG_CPU
279 /*
280 * Check for P_LVL2_UP flag before entering C2 and above on
281 * an SMP system.
282 */
283 if ((num_online_cpus() > 1) &&
284 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
285 return -ENODEV;
286 #endif
287
288 /* determine C2 and C3 address from pblk */
289 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
290 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
291
292 /* determine latencies from FADT */
293 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
294 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
295
296 /*
297 * FADT specified C2 latency must be less than or equal to
298 * 100 microseconds.
299 */
300 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
301 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
302 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
303 /* invalidate C2 */
304 pr->power.states[ACPI_STATE_C2].address = 0;
305 }
306
307 /*
308 * FADT supplied C3 latency must be less than or equal to
309 * 1000 microseconds.
310 */
311 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
312 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
313 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
314 /* invalidate C3 */
315 pr->power.states[ACPI_STATE_C3].address = 0;
316 }
317
318 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
319 "lvl2[0x%08x] lvl3[0x%08x]\n",
320 pr->power.states[ACPI_STATE_C2].address,
321 pr->power.states[ACPI_STATE_C3].address));
322
323 return 0;
324 }
325
326 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
327 {
328 if (!pr->power.states[ACPI_STATE_C1].valid) {
329 /* set the first C-State to C1 */
330 /* all processors need to support C1 */
331 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
332 pr->power.states[ACPI_STATE_C1].valid = 1;
333 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
334 }
335 /* the C0 state only exists as a filler in our array */
336 pr->power.states[ACPI_STATE_C0].valid = 1;
337 return 0;
338 }
339
340 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
341 {
342 acpi_status status = 0;
343 u64 count;
344 int current_count;
345 int i;
346 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
347 union acpi_object *cst;
348
349
350 if (nocst)
351 return -ENODEV;
352
353 current_count = 0;
354
355 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
356 if (ACPI_FAILURE(status)) {
357 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
358 return -ENODEV;
359 }
360
361 cst = buffer.pointer;
362
363 /* There must be at least 2 elements */
364 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
365 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
366 status = -EFAULT;
367 goto end;
368 }
369
370 count = cst->package.elements[0].integer.value;
371
372 /* Validate number of power states. */
373 if (count < 1 || count != cst->package.count - 1) {
374 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
375 status = -EFAULT;
376 goto end;
377 }
378
379 /* Tell driver that at least _CST is supported. */
380 pr->flags.has_cst = 1;
381
382 for (i = 1; i <= count; i++) {
383 union acpi_object *element;
384 union acpi_object *obj;
385 struct acpi_power_register *reg;
386 struct acpi_processor_cx cx;
387
388 memset(&cx, 0, sizeof(cx));
389
390 element = &(cst->package.elements[i]);
391 if (element->type != ACPI_TYPE_PACKAGE)
392 continue;
393
394 if (element->package.count != 4)
395 continue;
396
397 obj = &(element->package.elements[0]);
398
399 if (obj->type != ACPI_TYPE_BUFFER)
400 continue;
401
402 reg = (struct acpi_power_register *)obj->buffer.pointer;
403
404 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
405 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
406 continue;
407
408 /* There should be an easy way to extract an integer... */
409 obj = &(element->package.elements[1]);
410 if (obj->type != ACPI_TYPE_INTEGER)
411 continue;
412
413 cx.type = obj->integer.value;
414 /*
415 * Some buggy BIOSes won't list C1 in _CST -
416 * Let acpi_processor_get_power_info_default() handle them later
417 */
418 if (i == 1 && cx.type != ACPI_STATE_C1)
419 current_count++;
420
421 cx.address = reg->address;
422 cx.index = current_count + 1;
423
424 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
425 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
426 if (acpi_processor_ffh_cstate_probe
427 (pr->id, &cx, reg) == 0) {
428 cx.entry_method = ACPI_CSTATE_FFH;
429 } else if (cx.type == ACPI_STATE_C1) {
430 /*
431 * C1 is a special case where FIXED_HARDWARE
432 * can be handled in non-MWAIT way as well.
433 * In that case, save this _CST entry info.
434 * Otherwise, ignore this info and continue.
435 */
436 cx.entry_method = ACPI_CSTATE_HALT;
437 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
438 } else {
439 continue;
440 }
441 if (cx.type == ACPI_STATE_C1 &&
442 (boot_option_idle_override == IDLE_NOMWAIT)) {
443 /*
444 * In most cases the C1 space_id obtained from
445 * _CST object is FIXED_HARDWARE access mode.
446 * But when the option of idle=halt is added,
447 * the entry_method type should be changed from
448 * CSTATE_FFH to CSTATE_HALT.
449 * When the option of idle=nomwait is added,
450 * the C1 entry_method type should be
451 * CSTATE_HALT.
452 */
453 cx.entry_method = ACPI_CSTATE_HALT;
454 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
455 }
456 } else {
457 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
458 cx.address);
459 }
460
461 if (cx.type == ACPI_STATE_C1) {
462 cx.valid = 1;
463 }
464
465 obj = &(element->package.elements[2]);
466 if (obj->type != ACPI_TYPE_INTEGER)
467 continue;
468
469 cx.latency = obj->integer.value;
470
471 obj = &(element->package.elements[3]);
472 if (obj->type != ACPI_TYPE_INTEGER)
473 continue;
474
475 current_count++;
476 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
477
478 /*
479 * We support total ACPI_PROCESSOR_MAX_POWER - 1
480 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
481 */
482 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
483 printk(KERN_WARNING
484 "Limiting number of power states to max (%d)\n",
485 ACPI_PROCESSOR_MAX_POWER);
486 printk(KERN_WARNING
487 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
488 break;
489 }
490 }
491
492 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
493 current_count));
494
495 /* Validate number of power states discovered */
496 if (current_count < 2)
497 status = -EFAULT;
498
499 end:
500 kfree(buffer.pointer);
501
502 return status;
503 }
504
505 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
506 struct acpi_processor_cx *cx)
507 {
508 static int bm_check_flag = -1;
509 static int bm_control_flag = -1;
510
511
512 if (!cx->address)
513 return;
514
515 /*
516 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
517 * DMA transfers are used by any ISA device to avoid livelock.
518 * Note that we could disable Type-F DMA (as recommended by
519 * the erratum), but this is known to disrupt certain ISA
520 * devices thus we take the conservative approach.
521 */
522 else if (errata.piix4.fdma) {
523 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
524 "C3 not supported on PIIX4 with Type-F DMA\n"));
525 return;
526 }
527
528 /* All the logic here assumes flags.bm_check is same across all CPUs */
529 if (bm_check_flag == -1) {
530 /* Determine whether bm_check is needed based on CPU */
531 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
532 bm_check_flag = pr->flags.bm_check;
533 bm_control_flag = pr->flags.bm_control;
534 } else {
535 pr->flags.bm_check = bm_check_flag;
536 pr->flags.bm_control = bm_control_flag;
537 }
538
539 if (pr->flags.bm_check) {
540 if (!pr->flags.bm_control) {
541 if (pr->flags.has_cst != 1) {
542 /* bus mastering control is necessary */
543 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
544 "C3 support requires BM control\n"));
545 return;
546 } else {
547 /* Here we enter C3 without bus mastering */
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
549 "C3 support without BM control\n"));
550 }
551 }
552 } else {
553 /*
554 * WBINVD should be set in fadt, for C3 state to be
555 * supported on when bm_check is not required.
556 */
557 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
558 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
559 "Cache invalidation should work properly"
560 " for C3 to be enabled on SMP systems\n"));
561 return;
562 }
563 }
564
565 /*
566 * Otherwise we've met all of our C3 requirements.
567 * Normalize the C3 latency to expidite policy. Enable
568 * checking of bus mastering status (bm_check) so we can
569 * use this in our C3 policy
570 */
571 cx->valid = 1;
572
573 /*
574 * On older chipsets, BM_RLD needs to be set
575 * in order for Bus Master activity to wake the
576 * system from C3. Newer chipsets handle DMA
577 * during C3 automatically and BM_RLD is a NOP.
578 * In either case, the proper way to
579 * handle BM_RLD is to set it and leave it set.
580 */
581 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
582
583 return;
584 }
585
586 static int acpi_processor_power_verify(struct acpi_processor *pr)
587 {
588 unsigned int i;
589 unsigned int working = 0;
590
591 pr->power.timer_broadcast_on_state = INT_MAX;
592
593 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
594 struct acpi_processor_cx *cx = &pr->power.states[i];
595
596 switch (cx->type) {
597 case ACPI_STATE_C1:
598 cx->valid = 1;
599 break;
600
601 case ACPI_STATE_C2:
602 if (!cx->address)
603 break;
604 cx->valid = 1;
605 break;
606
607 case ACPI_STATE_C3:
608 acpi_processor_power_verify_c3(pr, cx);
609 break;
610 }
611 if (!cx->valid)
612 continue;
613
614 lapic_timer_check_state(i, pr, cx);
615 tsc_check_state(cx->type);
616 working++;
617 }
618
619 lapic_timer_propagate_broadcast(pr);
620
621 return (working);
622 }
623
624 static int acpi_processor_get_power_info(struct acpi_processor *pr)
625 {
626 unsigned int i;
627 int result;
628
629
630 /* NOTE: the idle thread may not be running while calling
631 * this function */
632
633 /* Zero initialize all the C-states info. */
634 memset(pr->power.states, 0, sizeof(pr->power.states));
635
636 result = acpi_processor_get_power_info_cst(pr);
637 if (result == -ENODEV)
638 result = acpi_processor_get_power_info_fadt(pr);
639
640 if (result)
641 return result;
642
643 acpi_processor_get_power_info_default(pr);
644
645 pr->power.count = acpi_processor_power_verify(pr);
646
647 /*
648 * if one state of type C2 or C3 is available, mark this
649 * CPU as being "idle manageable"
650 */
651 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
652 if (pr->power.states[i].valid) {
653 pr->power.count = i;
654 if (pr->power.states[i].type >= ACPI_STATE_C2)
655 pr->flags.power = 1;
656 }
657 }
658
659 return 0;
660 }
661
662 /**
663 * acpi_idle_bm_check - checks if bus master activity was detected
664 */
665 static int acpi_idle_bm_check(void)
666 {
667 u32 bm_status = 0;
668
669 if (bm_check_disable)
670 return 0;
671
672 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
673 if (bm_status)
674 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
675 /*
676 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
677 * the true state of bus mastering activity; forcing us to
678 * manually check the BMIDEA bit of each IDE channel.
679 */
680 else if (errata.piix4.bmisx) {
681 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
682 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
683 bm_status = 1;
684 }
685 return bm_status;
686 }
687
688 /**
689 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
690 * @cx: cstate data
691 *
692 * Caller disables interrupt before call and enables interrupt after return.
693 */
694 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
695 {
696 /* Don't trace irqs off for idle */
697 stop_critical_timings();
698 if (cx->entry_method == ACPI_CSTATE_FFH) {
699 /* Call into architectural FFH based C-state */
700 acpi_processor_ffh_cstate_enter(cx);
701 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
702 acpi_safe_halt();
703 } else {
704 /* IO port based C-state */
705 inb(cx->address);
706 /* Dummy wait op - must do something useless after P_LVL2 read
707 because chipsets cannot guarantee that STPCLK# signal
708 gets asserted in time to freeze execution properly. */
709 inl(acpi_gbl_FADT.xpm_timer_block.address);
710 }
711 start_critical_timings();
712 }
713
714 /**
715 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
716 * @dev: the target CPU
717 * @drv: cpuidle driver containing cpuidle state info
718 * @index: index of target state
719 *
720 * This is equivalent to the HALT instruction.
721 */
722 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
723 struct cpuidle_driver *drv, int index)
724 {
725 struct acpi_processor *pr;
726 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
727
728 pr = __this_cpu_read(processors);
729
730 if (unlikely(!pr))
731 return -EINVAL;
732
733 lapic_timer_state_broadcast(pr, cx, 1);
734 acpi_idle_do_entry(cx);
735
736 lapic_timer_state_broadcast(pr, cx, 0);
737
738 return index;
739 }
740
741
742 /**
743 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
744 * @dev: the target CPU
745 * @index: the index of suggested state
746 */
747 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
748 {
749 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
750
751 ACPI_FLUSH_CPU_CACHE();
752
753 while (1) {
754
755 if (cx->entry_method == ACPI_CSTATE_HALT)
756 safe_halt();
757 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
758 inb(cx->address);
759 /* See comment in acpi_idle_do_entry() */
760 inl(acpi_gbl_FADT.xpm_timer_block.address);
761 } else
762 return -ENODEV;
763 }
764
765 /* Never reached */
766 return 0;
767 }
768
769 /**
770 * acpi_idle_enter_simple - enters an ACPI state without BM handling
771 * @dev: the target CPU
772 * @drv: cpuidle driver with cpuidle state information
773 * @index: the index of suggested state
774 */
775 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
776 struct cpuidle_driver *drv, int index)
777 {
778 struct acpi_processor *pr;
779 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
780
781 pr = __this_cpu_read(processors);
782
783 if (unlikely(!pr))
784 return -EINVAL;
785
786 if (cx->entry_method != ACPI_CSTATE_FFH) {
787 current_thread_info()->status &= ~TS_POLLING;
788 /*
789 * TS_POLLING-cleared state must be visible before we test
790 * NEED_RESCHED:
791 */
792 smp_mb();
793
794 if (unlikely(need_resched())) {
795 current_thread_info()->status |= TS_POLLING;
796 return -EINVAL;
797 }
798 }
799
800 /*
801 * Must be done before busmaster disable as we might need to
802 * access HPET !
803 */
804 lapic_timer_state_broadcast(pr, cx, 1);
805
806 if (cx->type == ACPI_STATE_C3)
807 ACPI_FLUSH_CPU_CACHE();
808
809 /* Tell the scheduler that we are going deep-idle: */
810 sched_clock_idle_sleep_event();
811 acpi_idle_do_entry(cx);
812
813 sched_clock_idle_wakeup_event(0);
814
815 if (cx->entry_method != ACPI_CSTATE_FFH)
816 current_thread_info()->status |= TS_POLLING;
817
818 lapic_timer_state_broadcast(pr, cx, 0);
819 return index;
820 }
821
822 static int c3_cpu_count;
823 static DEFINE_RAW_SPINLOCK(c3_lock);
824
825 /**
826 * acpi_idle_enter_bm - enters C3 with proper BM handling
827 * @dev: the target CPU
828 * @drv: cpuidle driver containing state data
829 * @index: the index of suggested state
830 *
831 * If BM is detected, the deepest non-C3 idle state is entered instead.
832 */
833 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
834 struct cpuidle_driver *drv, int index)
835 {
836 struct acpi_processor *pr;
837 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
838
839 pr = __this_cpu_read(processors);
840
841 if (unlikely(!pr))
842 return -EINVAL;
843
844 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
845 if (drv->safe_state_index >= 0) {
846 return drv->states[drv->safe_state_index].enter(dev,
847 drv, drv->safe_state_index);
848 } else {
849 acpi_safe_halt();
850 return -EBUSY;
851 }
852 }
853
854 if (cx->entry_method != ACPI_CSTATE_FFH) {
855 current_thread_info()->status &= ~TS_POLLING;
856 /*
857 * TS_POLLING-cleared state must be visible before we test
858 * NEED_RESCHED:
859 */
860 smp_mb();
861
862 if (unlikely(need_resched())) {
863 current_thread_info()->status |= TS_POLLING;
864 return -EINVAL;
865 }
866 }
867
868 acpi_unlazy_tlb(smp_processor_id());
869
870 /* Tell the scheduler that we are going deep-idle: */
871 sched_clock_idle_sleep_event();
872 /*
873 * Must be done before busmaster disable as we might need to
874 * access HPET !
875 */
876 lapic_timer_state_broadcast(pr, cx, 1);
877
878 /*
879 * disable bus master
880 * bm_check implies we need ARB_DIS
881 * !bm_check implies we need cache flush
882 * bm_control implies whether we can do ARB_DIS
883 *
884 * That leaves a case where bm_check is set and bm_control is
885 * not set. In that case we cannot do much, we enter C3
886 * without doing anything.
887 */
888 if (pr->flags.bm_check && pr->flags.bm_control) {
889 raw_spin_lock(&c3_lock);
890 c3_cpu_count++;
891 /* Disable bus master arbitration when all CPUs are in C3 */
892 if (c3_cpu_count == num_online_cpus())
893 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
894 raw_spin_unlock(&c3_lock);
895 } else if (!pr->flags.bm_check) {
896 ACPI_FLUSH_CPU_CACHE();
897 }
898
899 acpi_idle_do_entry(cx);
900
901 /* Re-enable bus master arbitration */
902 if (pr->flags.bm_check && pr->flags.bm_control) {
903 raw_spin_lock(&c3_lock);
904 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
905 c3_cpu_count--;
906 raw_spin_unlock(&c3_lock);
907 }
908
909 sched_clock_idle_wakeup_event(0);
910
911 if (cx->entry_method != ACPI_CSTATE_FFH)
912 current_thread_info()->status |= TS_POLLING;
913
914 lapic_timer_state_broadcast(pr, cx, 0);
915 return index;
916 }
917
918 struct cpuidle_driver acpi_idle_driver = {
919 .name = "acpi_idle",
920 .owner = THIS_MODULE,
921 };
922
923 /**
924 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
925 * device i.e. per-cpu data
926 *
927 * @pr: the ACPI processor
928 * @dev : the cpuidle device
929 */
930 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
931 struct cpuidle_device *dev)
932 {
933 int i, count = CPUIDLE_DRIVER_STATE_START;
934 struct acpi_processor_cx *cx;
935
936 if (!pr->flags.power_setup_done)
937 return -EINVAL;
938
939 if (pr->flags.power == 0) {
940 return -EINVAL;
941 }
942
943 if (!dev)
944 return -EINVAL;
945
946 dev->cpu = pr->id;
947
948 if (max_cstate == 0)
949 max_cstate = 1;
950
951 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
952 cx = &pr->power.states[i];
953
954 if (!cx->valid)
955 continue;
956
957 #ifdef CONFIG_HOTPLUG_CPU
958 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
959 !pr->flags.has_cst &&
960 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
961 continue;
962 #endif
963 per_cpu(acpi_cstate[count], dev->cpu) = cx;
964
965 count++;
966 if (count == CPUIDLE_STATE_MAX)
967 break;
968 }
969
970 dev->state_count = count;
971
972 if (!count)
973 return -EINVAL;
974
975 return 0;
976 }
977
978 /**
979 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
980 * global state data i.e. idle routines
981 *
982 * @pr: the ACPI processor
983 */
984 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
985 {
986 int i, count = CPUIDLE_DRIVER_STATE_START;
987 struct acpi_processor_cx *cx;
988 struct cpuidle_state *state;
989 struct cpuidle_driver *drv = &acpi_idle_driver;
990
991 if (!pr->flags.power_setup_done)
992 return -EINVAL;
993
994 if (pr->flags.power == 0)
995 return -EINVAL;
996
997 drv->safe_state_index = -1;
998 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
999 drv->states[i].name[0] = '\0';
1000 drv->states[i].desc[0] = '\0';
1001 }
1002
1003 if (max_cstate == 0)
1004 max_cstate = 1;
1005
1006 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1007 cx = &pr->power.states[i];
1008
1009 if (!cx->valid)
1010 continue;
1011
1012 #ifdef CONFIG_HOTPLUG_CPU
1013 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1014 !pr->flags.has_cst &&
1015 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1016 continue;
1017 #endif
1018
1019 state = &drv->states[count];
1020 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1021 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1022 state->exit_latency = cx->latency;
1023 state->target_residency = cx->latency * latency_factor;
1024
1025 state->flags = 0;
1026 switch (cx->type) {
1027 case ACPI_STATE_C1:
1028 if (cx->entry_method == ACPI_CSTATE_FFH)
1029 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1030
1031 state->enter = acpi_idle_enter_c1;
1032 state->enter_dead = acpi_idle_play_dead;
1033 drv->safe_state_index = count;
1034 break;
1035
1036 case ACPI_STATE_C2:
1037 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1038 state->enter = acpi_idle_enter_simple;
1039 state->enter_dead = acpi_idle_play_dead;
1040 drv->safe_state_index = count;
1041 break;
1042
1043 case ACPI_STATE_C3:
1044 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1045 state->enter = pr->flags.bm_check ?
1046 acpi_idle_enter_bm :
1047 acpi_idle_enter_simple;
1048 break;
1049 }
1050
1051 count++;
1052 if (count == CPUIDLE_STATE_MAX)
1053 break;
1054 }
1055
1056 drv->state_count = count;
1057
1058 if (!count)
1059 return -EINVAL;
1060
1061 return 0;
1062 }
1063
1064 int acpi_processor_hotplug(struct acpi_processor *pr)
1065 {
1066 int ret = 0;
1067 struct cpuidle_device *dev;
1068
1069 if (disabled_by_idle_boot_param())
1070 return 0;
1071
1072 if (!pr)
1073 return -EINVAL;
1074
1075 if (nocst) {
1076 return -ENODEV;
1077 }
1078
1079 if (!pr->flags.power_setup_done)
1080 return -ENODEV;
1081
1082 dev = per_cpu(acpi_cpuidle_device, pr->id);
1083 cpuidle_pause_and_lock();
1084 cpuidle_disable_device(dev);
1085 acpi_processor_get_power_info(pr);
1086 if (pr->flags.power) {
1087 acpi_processor_setup_cpuidle_cx(pr, dev);
1088 ret = cpuidle_enable_device(dev);
1089 }
1090 cpuidle_resume_and_unlock();
1091
1092 return ret;
1093 }
1094
1095 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1096 {
1097 int cpu;
1098 struct acpi_processor *_pr;
1099 struct cpuidle_device *dev;
1100
1101 if (disabled_by_idle_boot_param())
1102 return 0;
1103
1104 if (!pr)
1105 return -EINVAL;
1106
1107 if (nocst)
1108 return -ENODEV;
1109
1110 if (!pr->flags.power_setup_done)
1111 return -ENODEV;
1112
1113 /*
1114 * FIXME: Design the ACPI notification to make it once per
1115 * system instead of once per-cpu. This condition is a hack
1116 * to make the code that updates C-States be called once.
1117 */
1118
1119 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1120
1121 cpuidle_pause_and_lock();
1122 /* Protect against cpu-hotplug */
1123 get_online_cpus();
1124
1125 /* Disable all cpuidle devices */
1126 for_each_online_cpu(cpu) {
1127 _pr = per_cpu(processors, cpu);
1128 if (!_pr || !_pr->flags.power_setup_done)
1129 continue;
1130 dev = per_cpu(acpi_cpuidle_device, cpu);
1131 cpuidle_disable_device(dev);
1132 }
1133
1134 /* Populate Updated C-state information */
1135 acpi_processor_get_power_info(pr);
1136 acpi_processor_setup_cpuidle_states(pr);
1137
1138 /* Enable all cpuidle devices */
1139 for_each_online_cpu(cpu) {
1140 _pr = per_cpu(processors, cpu);
1141 if (!_pr || !_pr->flags.power_setup_done)
1142 continue;
1143 acpi_processor_get_power_info(_pr);
1144 if (_pr->flags.power) {
1145 dev = per_cpu(acpi_cpuidle_device, cpu);
1146 acpi_processor_setup_cpuidle_cx(_pr, dev);
1147 cpuidle_enable_device(dev);
1148 }
1149 }
1150 put_online_cpus();
1151 cpuidle_resume_and_unlock();
1152 }
1153
1154 return 0;
1155 }
1156
1157 static int acpi_processor_registered;
1158
1159 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr)
1160 {
1161 acpi_status status = 0;
1162 int retval;
1163 struct cpuidle_device *dev;
1164 static int first_run;
1165
1166 if (disabled_by_idle_boot_param())
1167 return 0;
1168
1169 if (!first_run) {
1170 dmi_check_system(processor_power_dmi_table);
1171 max_cstate = acpi_processor_cstate_check(max_cstate);
1172 if (max_cstate < ACPI_C_STATES_MAX)
1173 printk(KERN_NOTICE
1174 "ACPI: processor limited to max C-state %d\n",
1175 max_cstate);
1176 first_run++;
1177 }
1178
1179 if (!pr)
1180 return -EINVAL;
1181
1182 if (acpi_gbl_FADT.cst_control && !nocst) {
1183 status =
1184 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1185 if (ACPI_FAILURE(status)) {
1186 ACPI_EXCEPTION((AE_INFO, status,
1187 "Notifying BIOS of _CST ability failed"));
1188 }
1189 }
1190
1191 acpi_processor_get_power_info(pr);
1192 pr->flags.power_setup_done = 1;
1193
1194 /*
1195 * Install the idle handler if processor power management is supported.
1196 * Note that we use previously set idle handler will be used on
1197 * platforms that only support C1.
1198 */
1199 if (pr->flags.power) {
1200 /* Register acpi_idle_driver if not already registered */
1201 if (!acpi_processor_registered) {
1202 acpi_processor_setup_cpuidle_states(pr);
1203 retval = cpuidle_register_driver(&acpi_idle_driver);
1204 if (retval)
1205 return retval;
1206 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
1207 acpi_idle_driver.name);
1208 }
1209
1210 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1211 if (!dev)
1212 return -ENOMEM;
1213 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1214
1215 acpi_processor_setup_cpuidle_cx(pr, dev);
1216
1217 /* Register per-cpu cpuidle_device. Cpuidle driver
1218 * must already be registered before registering device
1219 */
1220 retval = cpuidle_register_device(dev);
1221 if (retval) {
1222 if (acpi_processor_registered == 0)
1223 cpuidle_unregister_driver(&acpi_idle_driver);
1224 return retval;
1225 }
1226 acpi_processor_registered++;
1227 }
1228 return 0;
1229 }
1230
1231 int acpi_processor_power_exit(struct acpi_processor *pr)
1232 {
1233 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1234
1235 if (disabled_by_idle_boot_param())
1236 return 0;
1237
1238 if (pr->flags.power) {
1239 cpuidle_unregister_device(dev);
1240 acpi_processor_registered--;
1241 if (acpi_processor_registered == 0)
1242 cpuidle_unregister_driver(&acpi_idle_driver);
1243 }
1244
1245 pr->flags.power_setup_done = 0;
1246 return 0;
1247 }
Linux kernel - Deliverables
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