libata: make reset related methods proper port operations
[deliverable/linux.git] / drivers / ata / libata-core.c
1 /*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 * Standards documents from:
34 * http://www.t13.org (ATA standards, PCI DMA IDE spec)
35 * http://www.t10.org (SCSI MMC - for ATAPI MMC)
36 * http://www.sata-io.org (SATA)
37 * http://www.compactflash.org (CF)
38 * http://www.qic.org (QIC157 - Tape and DSC)
39 * http://www.ce-ata.org (CE-ATA: not supported)
40 *
41 */
42
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/pci.h>
46 #include <linux/init.h>
47 #include <linux/list.h>
48 #include <linux/mm.h>
49 #include <linux/highmem.h>
50 #include <linux/spinlock.h>
51 #include <linux/blkdev.h>
52 #include <linux/delay.h>
53 #include <linux/timer.h>
54 #include <linux/interrupt.h>
55 #include <linux/completion.h>
56 #include <linux/suspend.h>
57 #include <linux/workqueue.h>
58 #include <linux/jiffies.h>
59 #include <linux/scatterlist.h>
60 #include <linux/io.h>
61 #include <scsi/scsi.h>
62 #include <scsi/scsi_cmnd.h>
63 #include <scsi/scsi_host.h>
64 #include <linux/libata.h>
65 #include <asm/semaphore.h>
66 #include <asm/byteorder.h>
67 #include <linux/cdrom.h>
68
69 #include "libata.h"
70
71
72 /* debounce timing parameters in msecs { interval, duration, timeout } */
73 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
74 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
75 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
76
77 const struct ata_port_operations ata_base_port_ops = {
78 .irq_clear = ata_noop_irq_clear,
79 .prereset = ata_std_prereset,
80 .hardreset = sata_std_hardreset,
81 .postreset = ata_std_postreset,
82 .error_handler = ata_std_error_handler,
83 };
84
85 const struct ata_port_operations sata_port_ops = {
86 .inherits = &ata_base_port_ops,
87
88 .qc_defer = ata_std_qc_defer,
89 .dev_select = ata_noop_dev_select,
90 };
91
92 const struct ata_port_operations sata_pmp_port_ops = {
93 .inherits = &sata_port_ops,
94
95 .pmp_prereset = sata_pmp_std_prereset,
96 .pmp_hardreset = sata_pmp_std_hardreset,
97 .pmp_postreset = sata_pmp_std_postreset,
98 .error_handler = sata_pmp_error_handler,
99 };
100
101 const struct ata_port_operations ata_sff_port_ops = {
102 .inherits = &ata_base_port_ops,
103
104 .qc_prep = ata_qc_prep,
105 .qc_issue = ata_qc_issue_prot,
106
107 .freeze = ata_bmdma_freeze,
108 .thaw = ata_bmdma_thaw,
109 .softreset = ata_std_softreset,
110 .error_handler = ata_bmdma_error_handler,
111 .post_internal_cmd = ata_bmdma_post_internal_cmd,
112
113 .dev_select = ata_std_dev_select,
114 .check_status = ata_check_status,
115 .tf_load = ata_tf_load,
116 .tf_read = ata_tf_read,
117 .exec_command = ata_exec_command,
118 .data_xfer = ata_data_xfer,
119 .irq_on = ata_irq_on,
120
121 .port_start = ata_sff_port_start,
122 };
123
124 const struct ata_port_operations ata_bmdma_port_ops = {
125 .inherits = &ata_sff_port_ops,
126
127 .mode_filter = ata_pci_default_filter,
128
129 .bmdma_setup = ata_bmdma_setup,
130 .bmdma_start = ata_bmdma_start,
131 .bmdma_stop = ata_bmdma_stop,
132 .bmdma_status = ata_bmdma_status,
133 .irq_clear = ata_bmdma_irq_clear,
134 };
135
136 static unsigned int ata_dev_init_params(struct ata_device *dev,
137 u16 heads, u16 sectors);
138 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
139 static unsigned int ata_dev_set_feature(struct ata_device *dev,
140 u8 enable, u8 feature);
141 static void ata_dev_xfermask(struct ata_device *dev);
142 static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
143
144 unsigned int ata_print_id = 1;
145 static struct workqueue_struct *ata_wq;
146
147 struct workqueue_struct *ata_aux_wq;
148
149 struct ata_force_param {
150 const char *name;
151 unsigned int cbl;
152 int spd_limit;
153 unsigned long xfer_mask;
154 unsigned int horkage_on;
155 unsigned int horkage_off;
156 };
157
158 struct ata_force_ent {
159 int port;
160 int device;
161 struct ata_force_param param;
162 };
163
164 static struct ata_force_ent *ata_force_tbl;
165 static int ata_force_tbl_size;
166
167 static char ata_force_param_buf[PAGE_SIZE] __initdata;
168 /* param_buf is thrown away after initialization, disallow read */
169 module_param_string(force, ata_force_param_buf, sizeof(ata_force_param_buf), 0);
170 MODULE_PARM_DESC(force, "Force ATA configurations including cable type, link speed and transfer mode (see Documentation/kernel-parameters.txt for details)");
171
172 int atapi_enabled = 1;
173 module_param(atapi_enabled, int, 0444);
174 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
175
176 static int atapi_dmadir = 0;
177 module_param(atapi_dmadir, int, 0444);
178 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
179
180 int atapi_passthru16 = 1;
181 module_param(atapi_passthru16, int, 0444);
182 MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)");
183
184 int libata_fua = 0;
185 module_param_named(fua, libata_fua, int, 0444);
186 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
187
188 static int ata_ignore_hpa;
189 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
190 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
191
192 static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
193 module_param_named(dma, libata_dma_mask, int, 0444);
194 MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
195
196 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
197 module_param(ata_probe_timeout, int, 0444);
198 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
199
200 int libata_noacpi = 0;
201 module_param_named(noacpi, libata_noacpi, int, 0444);
202 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set");
203
204 int libata_allow_tpm = 0;
205 module_param_named(allow_tpm, libata_allow_tpm, int, 0444);
206 MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands");
207
208 MODULE_AUTHOR("Jeff Garzik");
209 MODULE_DESCRIPTION("Library module for ATA devices");
210 MODULE_LICENSE("GPL");
211 MODULE_VERSION(DRV_VERSION);
212
213
214 /**
215 * ata_force_cbl - force cable type according to libata.force
216 * @ap: ATA port of interest
217 *
218 * Force cable type according to libata.force and whine about it.
219 * The last entry which has matching port number is used, so it
220 * can be specified as part of device force parameters. For
221 * example, both "a:40c,1.00:udma4" and "1.00:40c,udma4" have the
222 * same effect.
223 *
224 * LOCKING:
225 * EH context.
226 */
227 void ata_force_cbl(struct ata_port *ap)
228 {
229 int i;
230
231 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
232 const struct ata_force_ent *fe = &ata_force_tbl[i];
233
234 if (fe->port != -1 && fe->port != ap->print_id)
235 continue;
236
237 if (fe->param.cbl == ATA_CBL_NONE)
238 continue;
239
240 ap->cbl = fe->param.cbl;
241 ata_port_printk(ap, KERN_NOTICE,
242 "FORCE: cable set to %s\n", fe->param.name);
243 return;
244 }
245 }
246
247 /**
248 * ata_force_spd_limit - force SATA spd limit according to libata.force
249 * @link: ATA link of interest
250 *
251 * Force SATA spd limit according to libata.force and whine about
252 * it. When only the port part is specified (e.g. 1:), the limit
253 * applies to all links connected to both the host link and all
254 * fan-out ports connected via PMP. If the device part is
255 * specified as 0 (e.g. 1.00:), it specifies the first fan-out
256 * link not the host link. Device number 15 always points to the
257 * host link whether PMP is attached or not.
258 *
259 * LOCKING:
260 * EH context.
261 */
262 static void ata_force_spd_limit(struct ata_link *link)
263 {
264 int linkno, i;
265
266 if (ata_is_host_link(link))
267 linkno = 15;
268 else
269 linkno = link->pmp;
270
271 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
272 const struct ata_force_ent *fe = &ata_force_tbl[i];
273
274 if (fe->port != -1 && fe->port != link->ap->print_id)
275 continue;
276
277 if (fe->device != -1 && fe->device != linkno)
278 continue;
279
280 if (!fe->param.spd_limit)
281 continue;
282
283 link->hw_sata_spd_limit = (1 << fe->param.spd_limit) - 1;
284 ata_link_printk(link, KERN_NOTICE,
285 "FORCE: PHY spd limit set to %s\n", fe->param.name);
286 return;
287 }
288 }
289
290 /**
291 * ata_force_xfermask - force xfermask according to libata.force
292 * @dev: ATA device of interest
293 *
294 * Force xfer_mask according to libata.force and whine about it.
295 * For consistency with link selection, device number 15 selects
296 * the first device connected to the host link.
297 *
298 * LOCKING:
299 * EH context.
300 */
301 static void ata_force_xfermask(struct ata_device *dev)
302 {
303 int devno = dev->link->pmp + dev->devno;
304 int alt_devno = devno;
305 int i;
306
307 /* allow n.15 for the first device attached to host port */
308 if (ata_is_host_link(dev->link) && devno == 0)
309 alt_devno = 15;
310
311 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
312 const struct ata_force_ent *fe = &ata_force_tbl[i];
313 unsigned long pio_mask, mwdma_mask, udma_mask;
314
315 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
316 continue;
317
318 if (fe->device != -1 && fe->device != devno &&
319 fe->device != alt_devno)
320 continue;
321
322 if (!fe->param.xfer_mask)
323 continue;
324
325 ata_unpack_xfermask(fe->param.xfer_mask,
326 &pio_mask, &mwdma_mask, &udma_mask);
327 if (udma_mask)
328 dev->udma_mask = udma_mask;
329 else if (mwdma_mask) {
330 dev->udma_mask = 0;
331 dev->mwdma_mask = mwdma_mask;
332 } else {
333 dev->udma_mask = 0;
334 dev->mwdma_mask = 0;
335 dev->pio_mask = pio_mask;
336 }
337
338 ata_dev_printk(dev, KERN_NOTICE,
339 "FORCE: xfer_mask set to %s\n", fe->param.name);
340 return;
341 }
342 }
343
344 /**
345 * ata_force_horkage - force horkage according to libata.force
346 * @dev: ATA device of interest
347 *
348 * Force horkage according to libata.force and whine about it.
349 * For consistency with link selection, device number 15 selects
350 * the first device connected to the host link.
351 *
352 * LOCKING:
353 * EH context.
354 */
355 static void ata_force_horkage(struct ata_device *dev)
356 {
357 int devno = dev->link->pmp + dev->devno;
358 int alt_devno = devno;
359 int i;
360
361 /* allow n.15 for the first device attached to host port */
362 if (ata_is_host_link(dev->link) && devno == 0)
363 alt_devno = 15;
364
365 for (i = 0; i < ata_force_tbl_size; i++) {
366 const struct ata_force_ent *fe = &ata_force_tbl[i];
367
368 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
369 continue;
370
371 if (fe->device != -1 && fe->device != devno &&
372 fe->device != alt_devno)
373 continue;
374
375 if (!(~dev->horkage & fe->param.horkage_on) &&
376 !(dev->horkage & fe->param.horkage_off))
377 continue;
378
379 dev->horkage |= fe->param.horkage_on;
380 dev->horkage &= ~fe->param.horkage_off;
381
382 ata_dev_printk(dev, KERN_NOTICE,
383 "FORCE: horkage modified (%s)\n", fe->param.name);
384 }
385 }
386
387 /**
388 * atapi_cmd_type - Determine ATAPI command type from SCSI opcode
389 * @opcode: SCSI opcode
390 *
391 * Determine ATAPI command type from @opcode.
392 *
393 * LOCKING:
394 * None.
395 *
396 * RETURNS:
397 * ATAPI_{READ|WRITE|READ_CD|PASS_THRU|MISC}
398 */
399 int atapi_cmd_type(u8 opcode)
400 {
401 switch (opcode) {
402 case GPCMD_READ_10:
403 case GPCMD_READ_12:
404 return ATAPI_READ;
405
406 case GPCMD_WRITE_10:
407 case GPCMD_WRITE_12:
408 case GPCMD_WRITE_AND_VERIFY_10:
409 return ATAPI_WRITE;
410
411 case GPCMD_READ_CD:
412 case GPCMD_READ_CD_MSF:
413 return ATAPI_READ_CD;
414
415 case ATA_16:
416 case ATA_12:
417 if (atapi_passthru16)
418 return ATAPI_PASS_THRU;
419 /* fall thru */
420 default:
421 return ATAPI_MISC;
422 }
423 }
424
425 /**
426 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
427 * @tf: Taskfile to convert
428 * @pmp: Port multiplier port
429 * @is_cmd: This FIS is for command
430 * @fis: Buffer into which data will output
431 *
432 * Converts a standard ATA taskfile to a Serial ATA
433 * FIS structure (Register - Host to Device).
434 *
435 * LOCKING:
436 * Inherited from caller.
437 */
438 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
439 {
440 fis[0] = 0x27; /* Register - Host to Device FIS */
441 fis[1] = pmp & 0xf; /* Port multiplier number*/
442 if (is_cmd)
443 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
444
445 fis[2] = tf->command;
446 fis[3] = tf->feature;
447
448 fis[4] = tf->lbal;
449 fis[5] = tf->lbam;
450 fis[6] = tf->lbah;
451 fis[7] = tf->device;
452
453 fis[8] = tf->hob_lbal;
454 fis[9] = tf->hob_lbam;
455 fis[10] = tf->hob_lbah;
456 fis[11] = tf->hob_feature;
457
458 fis[12] = tf->nsect;
459 fis[13] = tf->hob_nsect;
460 fis[14] = 0;
461 fis[15] = tf->ctl;
462
463 fis[16] = 0;
464 fis[17] = 0;
465 fis[18] = 0;
466 fis[19] = 0;
467 }
468
469 /**
470 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
471 * @fis: Buffer from which data will be input
472 * @tf: Taskfile to output
473 *
474 * Converts a serial ATA FIS structure to a standard ATA taskfile.
475 *
476 * LOCKING:
477 * Inherited from caller.
478 */
479
480 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
481 {
482 tf->command = fis[2]; /* status */
483 tf->feature = fis[3]; /* error */
484
485 tf->lbal = fis[4];
486 tf->lbam = fis[5];
487 tf->lbah = fis[6];
488 tf->device = fis[7];
489
490 tf->hob_lbal = fis[8];
491 tf->hob_lbam = fis[9];
492 tf->hob_lbah = fis[10];
493
494 tf->nsect = fis[12];
495 tf->hob_nsect = fis[13];
496 }
497
498 static const u8 ata_rw_cmds[] = {
499 /* pio multi */
500 ATA_CMD_READ_MULTI,
501 ATA_CMD_WRITE_MULTI,
502 ATA_CMD_READ_MULTI_EXT,
503 ATA_CMD_WRITE_MULTI_EXT,
504 0,
505 0,
506 0,
507 ATA_CMD_WRITE_MULTI_FUA_EXT,
508 /* pio */
509 ATA_CMD_PIO_READ,
510 ATA_CMD_PIO_WRITE,
511 ATA_CMD_PIO_READ_EXT,
512 ATA_CMD_PIO_WRITE_EXT,
513 0,
514 0,
515 0,
516 0,
517 /* dma */
518 ATA_CMD_READ,
519 ATA_CMD_WRITE,
520 ATA_CMD_READ_EXT,
521 ATA_CMD_WRITE_EXT,
522 0,
523 0,
524 0,
525 ATA_CMD_WRITE_FUA_EXT
526 };
527
528 /**
529 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
530 * @tf: command to examine and configure
531 * @dev: device tf belongs to
532 *
533 * Examine the device configuration and tf->flags to calculate
534 * the proper read/write commands and protocol to use.
535 *
536 * LOCKING:
537 * caller.
538 */
539 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
540 {
541 u8 cmd;
542
543 int index, fua, lba48, write;
544
545 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
546 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
547 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
548
549 if (dev->flags & ATA_DFLAG_PIO) {
550 tf->protocol = ATA_PROT_PIO;
551 index = dev->multi_count ? 0 : 8;
552 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
553 /* Unable to use DMA due to host limitation */
554 tf->protocol = ATA_PROT_PIO;
555 index = dev->multi_count ? 0 : 8;
556 } else {
557 tf->protocol = ATA_PROT_DMA;
558 index = 16;
559 }
560
561 cmd = ata_rw_cmds[index + fua + lba48 + write];
562 if (cmd) {
563 tf->command = cmd;
564 return 0;
565 }
566 return -1;
567 }
568
569 /**
570 * ata_tf_read_block - Read block address from ATA taskfile
571 * @tf: ATA taskfile of interest
572 * @dev: ATA device @tf belongs to
573 *
574 * LOCKING:
575 * None.
576 *
577 * Read block address from @tf. This function can handle all
578 * three address formats - LBA, LBA48 and CHS. tf->protocol and
579 * flags select the address format to use.
580 *
581 * RETURNS:
582 * Block address read from @tf.
583 */
584 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
585 {
586 u64 block = 0;
587
588 if (tf->flags & ATA_TFLAG_LBA) {
589 if (tf->flags & ATA_TFLAG_LBA48) {
590 block |= (u64)tf->hob_lbah << 40;
591 block |= (u64)tf->hob_lbam << 32;
592 block |= tf->hob_lbal << 24;
593 } else
594 block |= (tf->device & 0xf) << 24;
595
596 block |= tf->lbah << 16;
597 block |= tf->lbam << 8;
598 block |= tf->lbal;
599 } else {
600 u32 cyl, head, sect;
601
602 cyl = tf->lbam | (tf->lbah << 8);
603 head = tf->device & 0xf;
604 sect = tf->lbal;
605
606 block = (cyl * dev->heads + head) * dev->sectors + sect;
607 }
608
609 return block;
610 }
611
612 /**
613 * ata_build_rw_tf - Build ATA taskfile for given read/write request
614 * @tf: Target ATA taskfile
615 * @dev: ATA device @tf belongs to
616 * @block: Block address
617 * @n_block: Number of blocks
618 * @tf_flags: RW/FUA etc...
619 * @tag: tag
620 *
621 * LOCKING:
622 * None.
623 *
624 * Build ATA taskfile @tf for read/write request described by
625 * @block, @n_block, @tf_flags and @tag on @dev.
626 *
627 * RETURNS:
628 *
629 * 0 on success, -ERANGE if the request is too large for @dev,
630 * -EINVAL if the request is invalid.
631 */
632 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
633 u64 block, u32 n_block, unsigned int tf_flags,
634 unsigned int tag)
635 {
636 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
637 tf->flags |= tf_flags;
638
639 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
640 /* yay, NCQ */
641 if (!lba_48_ok(block, n_block))
642 return -ERANGE;
643
644 tf->protocol = ATA_PROT_NCQ;
645 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
646
647 if (tf->flags & ATA_TFLAG_WRITE)
648 tf->command = ATA_CMD_FPDMA_WRITE;
649 else
650 tf->command = ATA_CMD_FPDMA_READ;
651
652 tf->nsect = tag << 3;
653 tf->hob_feature = (n_block >> 8) & 0xff;
654 tf->feature = n_block & 0xff;
655
656 tf->hob_lbah = (block >> 40) & 0xff;
657 tf->hob_lbam = (block >> 32) & 0xff;
658 tf->hob_lbal = (block >> 24) & 0xff;
659 tf->lbah = (block >> 16) & 0xff;
660 tf->lbam = (block >> 8) & 0xff;
661 tf->lbal = block & 0xff;
662
663 tf->device = 1 << 6;
664 if (tf->flags & ATA_TFLAG_FUA)
665 tf->device |= 1 << 7;
666 } else if (dev->flags & ATA_DFLAG_LBA) {
667 tf->flags |= ATA_TFLAG_LBA;
668
669 if (lba_28_ok(block, n_block)) {
670 /* use LBA28 */
671 tf->device |= (block >> 24) & 0xf;
672 } else if (lba_48_ok(block, n_block)) {
673 if (!(dev->flags & ATA_DFLAG_LBA48))
674 return -ERANGE;
675
676 /* use LBA48 */
677 tf->flags |= ATA_TFLAG_LBA48;
678
679 tf->hob_nsect = (n_block >> 8) & 0xff;
680
681 tf->hob_lbah = (block >> 40) & 0xff;
682 tf->hob_lbam = (block >> 32) & 0xff;
683 tf->hob_lbal = (block >> 24) & 0xff;
684 } else
685 /* request too large even for LBA48 */
686 return -ERANGE;
687
688 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
689 return -EINVAL;
690
691 tf->nsect = n_block & 0xff;
692
693 tf->lbah = (block >> 16) & 0xff;
694 tf->lbam = (block >> 8) & 0xff;
695 tf->lbal = block & 0xff;
696
697 tf->device |= ATA_LBA;
698 } else {
699 /* CHS */
700 u32 sect, head, cyl, track;
701
702 /* The request -may- be too large for CHS addressing. */
703 if (!lba_28_ok(block, n_block))
704 return -ERANGE;
705
706 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
707 return -EINVAL;
708
709 /* Convert LBA to CHS */
710 track = (u32)block / dev->sectors;
711 cyl = track / dev->heads;
712 head = track % dev->heads;
713 sect = (u32)block % dev->sectors + 1;
714
715 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
716 (u32)block, track, cyl, head, sect);
717
718 /* Check whether the converted CHS can fit.
719 Cylinder: 0-65535
720 Head: 0-15
721 Sector: 1-255*/
722 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
723 return -ERANGE;
724
725 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
726 tf->lbal = sect;
727 tf->lbam = cyl;
728 tf->lbah = cyl >> 8;
729 tf->device |= head;
730 }
731
732 return 0;
733 }
734
735 /**
736 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
737 * @pio_mask: pio_mask
738 * @mwdma_mask: mwdma_mask
739 * @udma_mask: udma_mask
740 *
741 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
742 * unsigned int xfer_mask.
743 *
744 * LOCKING:
745 * None.
746 *
747 * RETURNS:
748 * Packed xfer_mask.
749 */
750 unsigned long ata_pack_xfermask(unsigned long pio_mask,
751 unsigned long mwdma_mask,
752 unsigned long udma_mask)
753 {
754 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
755 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
756 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
757 }
758
759 /**
760 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
761 * @xfer_mask: xfer_mask to unpack
762 * @pio_mask: resulting pio_mask
763 * @mwdma_mask: resulting mwdma_mask
764 * @udma_mask: resulting udma_mask
765 *
766 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
767 * Any NULL distination masks will be ignored.
768 */
769 void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask,
770 unsigned long *mwdma_mask, unsigned long *udma_mask)
771 {
772 if (pio_mask)
773 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
774 if (mwdma_mask)
775 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
776 if (udma_mask)
777 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
778 }
779
780 static const struct ata_xfer_ent {
781 int shift, bits;
782 u8 base;
783 } ata_xfer_tbl[] = {
784 { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 },
785 { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 },
786 { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 },
787 { -1, },
788 };
789
790 /**
791 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
792 * @xfer_mask: xfer_mask of interest
793 *
794 * Return matching XFER_* value for @xfer_mask. Only the highest
795 * bit of @xfer_mask is considered.
796 *
797 * LOCKING:
798 * None.
799 *
800 * RETURNS:
801 * Matching XFER_* value, 0xff if no match found.
802 */
803 u8 ata_xfer_mask2mode(unsigned long xfer_mask)
804 {
805 int highbit = fls(xfer_mask) - 1;
806 const struct ata_xfer_ent *ent;
807
808 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
809 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
810 return ent->base + highbit - ent->shift;
811 return 0xff;
812 }
813
814 /**
815 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
816 * @xfer_mode: XFER_* of interest
817 *
818 * Return matching xfer_mask for @xfer_mode.
819 *
820 * LOCKING:
821 * None.
822 *
823 * RETURNS:
824 * Matching xfer_mask, 0 if no match found.
825 */
826 unsigned long ata_xfer_mode2mask(u8 xfer_mode)
827 {
828 const struct ata_xfer_ent *ent;
829
830 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
831 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
832 return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)
833 & ~((1 << ent->shift) - 1);
834 return 0;
835 }
836
837 /**
838 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
839 * @xfer_mode: XFER_* of interest
840 *
841 * Return matching xfer_shift for @xfer_mode.
842 *
843 * LOCKING:
844 * None.
845 *
846 * RETURNS:
847 * Matching xfer_shift, -1 if no match found.
848 */
849 int ata_xfer_mode2shift(unsigned long xfer_mode)
850 {
851 const struct ata_xfer_ent *ent;
852
853 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
854 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
855 return ent->shift;
856 return -1;
857 }
858
859 /**
860 * ata_mode_string - convert xfer_mask to string
861 * @xfer_mask: mask of bits supported; only highest bit counts.
862 *
863 * Determine string which represents the highest speed
864 * (highest bit in @modemask).
865 *
866 * LOCKING:
867 * None.
868 *
869 * RETURNS:
870 * Constant C string representing highest speed listed in
871 * @mode_mask, or the constant C string "<n/a>".
872 */
873 const char *ata_mode_string(unsigned long xfer_mask)
874 {
875 static const char * const xfer_mode_str[] = {
876 "PIO0",
877 "PIO1",
878 "PIO2",
879 "PIO3",
880 "PIO4",
881 "PIO5",
882 "PIO6",
883 "MWDMA0",
884 "MWDMA1",
885 "MWDMA2",
886 "MWDMA3",
887 "MWDMA4",
888 "UDMA/16",
889 "UDMA/25",
890 "UDMA/33",
891 "UDMA/44",
892 "UDMA/66",
893 "UDMA/100",
894 "UDMA/133",
895 "UDMA7",
896 };
897 int highbit;
898
899 highbit = fls(xfer_mask) - 1;
900 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
901 return xfer_mode_str[highbit];
902 return "<n/a>";
903 }
904
905 static const char *sata_spd_string(unsigned int spd)
906 {
907 static const char * const spd_str[] = {
908 "1.5 Gbps",
909 "3.0 Gbps",
910 };
911
912 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
913 return "<unknown>";
914 return spd_str[spd - 1];
915 }
916
917 void ata_dev_disable(struct ata_device *dev)
918 {
919 if (ata_dev_enabled(dev)) {
920 if (ata_msg_drv(dev->link->ap))
921 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
922 ata_acpi_on_disable(dev);
923 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
924 ATA_DNXFER_QUIET);
925 dev->class++;
926 }
927 }
928
929 static int ata_dev_set_dipm(struct ata_device *dev, enum link_pm policy)
930 {
931 struct ata_link *link = dev->link;
932 struct ata_port *ap = link->ap;
933 u32 scontrol;
934 unsigned int err_mask;
935 int rc;
936
937 /*
938 * disallow DIPM for drivers which haven't set
939 * ATA_FLAG_IPM. This is because when DIPM is enabled,
940 * phy ready will be set in the interrupt status on
941 * state changes, which will cause some drivers to
942 * think there are errors - additionally drivers will
943 * need to disable hot plug.
944 */
945 if (!(ap->flags & ATA_FLAG_IPM) || !ata_dev_enabled(dev)) {
946 ap->pm_policy = NOT_AVAILABLE;
947 return -EINVAL;
948 }
949
950 /*
951 * For DIPM, we will only enable it for the
952 * min_power setting.
953 *
954 * Why? Because Disks are too stupid to know that
955 * If the host rejects a request to go to SLUMBER
956 * they should retry at PARTIAL, and instead it
957 * just would give up. So, for medium_power to
958 * work at all, we need to only allow HIPM.
959 */
960 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
961 if (rc)
962 return rc;
963
964 switch (policy) {
965 case MIN_POWER:
966 /* no restrictions on IPM transitions */
967 scontrol &= ~(0x3 << 8);
968 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
969 if (rc)
970 return rc;
971
972 /* enable DIPM */
973 if (dev->flags & ATA_DFLAG_DIPM)
974 err_mask = ata_dev_set_feature(dev,
975 SETFEATURES_SATA_ENABLE, SATA_DIPM);
976 break;
977 case MEDIUM_POWER:
978 /* allow IPM to PARTIAL */
979 scontrol &= ~(0x1 << 8);
980 scontrol |= (0x2 << 8);
981 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
982 if (rc)
983 return rc;
984
985 /*
986 * we don't have to disable DIPM since IPM flags
987 * disallow transitions to SLUMBER, which effectively
988 * disable DIPM if it does not support PARTIAL
989 */
990 break;
991 case NOT_AVAILABLE:
992 case MAX_PERFORMANCE:
993 /* disable all IPM transitions */
994 scontrol |= (0x3 << 8);
995 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
996 if (rc)
997 return rc;
998
999 /*
1000 * we don't have to disable DIPM since IPM flags
1001 * disallow all transitions which effectively
1002 * disable DIPM anyway.
1003 */
1004 break;
1005 }
1006
1007 /* FIXME: handle SET FEATURES failure */
1008 (void) err_mask;
1009
1010 return 0;
1011 }
1012
1013 /**
1014 * ata_dev_enable_pm - enable SATA interface power management
1015 * @dev: device to enable power management
1016 * @policy: the link power management policy
1017 *
1018 * Enable SATA Interface power management. This will enable
1019 * Device Interface Power Management (DIPM) for min_power
1020 * policy, and then call driver specific callbacks for
1021 * enabling Host Initiated Power management.
1022 *
1023 * Locking: Caller.
1024 * Returns: -EINVAL if IPM is not supported, 0 otherwise.
1025 */
1026 void ata_dev_enable_pm(struct ata_device *dev, enum link_pm policy)
1027 {
1028 int rc = 0;
1029 struct ata_port *ap = dev->link->ap;
1030
1031 /* set HIPM first, then DIPM */
1032 if (ap->ops->enable_pm)
1033 rc = ap->ops->enable_pm(ap, policy);
1034 if (rc)
1035 goto enable_pm_out;
1036 rc = ata_dev_set_dipm(dev, policy);
1037
1038 enable_pm_out:
1039 if (rc)
1040 ap->pm_policy = MAX_PERFORMANCE;
1041 else
1042 ap->pm_policy = policy;
1043 return /* rc */; /* hopefully we can use 'rc' eventually */
1044 }
1045
1046 #ifdef CONFIG_PM
1047 /**
1048 * ata_dev_disable_pm - disable SATA interface power management
1049 * @dev: device to disable power management
1050 *
1051 * Disable SATA Interface power management. This will disable
1052 * Device Interface Power Management (DIPM) without changing
1053 * policy, call driver specific callbacks for disabling Host
1054 * Initiated Power management.
1055 *
1056 * Locking: Caller.
1057 * Returns: void
1058 */
1059 static void ata_dev_disable_pm(struct ata_device *dev)
1060 {
1061 struct ata_port *ap = dev->link->ap;
1062
1063 ata_dev_set_dipm(dev, MAX_PERFORMANCE);
1064 if (ap->ops->disable_pm)
1065 ap->ops->disable_pm(ap);
1066 }
1067 #endif /* CONFIG_PM */
1068
1069 void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy)
1070 {
1071 ap->pm_policy = policy;
1072 ap->link.eh_info.action |= ATA_EH_LPM;
1073 ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY;
1074 ata_port_schedule_eh(ap);
1075 }
1076
1077 #ifdef CONFIG_PM
1078 static void ata_lpm_enable(struct ata_host *host)
1079 {
1080 struct ata_link *link;
1081 struct ata_port *ap;
1082 struct ata_device *dev;
1083 int i;
1084
1085 for (i = 0; i < host->n_ports; i++) {
1086 ap = host->ports[i];
1087 ata_port_for_each_link(link, ap) {
1088 ata_link_for_each_dev(dev, link)
1089 ata_dev_disable_pm(dev);
1090 }
1091 }
1092 }
1093
1094 static void ata_lpm_disable(struct ata_host *host)
1095 {
1096 int i;
1097
1098 for (i = 0; i < host->n_ports; i++) {
1099 struct ata_port *ap = host->ports[i];
1100 ata_lpm_schedule(ap, ap->pm_policy);
1101 }
1102 }
1103 #endif /* CONFIG_PM */
1104
1105
1106 /**
1107 * ata_devchk - PATA device presence detection
1108 * @ap: ATA channel to examine
1109 * @device: Device to examine (starting at zero)
1110 *
1111 * This technique was originally described in
1112 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1113 * later found its way into the ATA/ATAPI spec.
1114 *
1115 * Write a pattern to the ATA shadow registers,
1116 * and if a device is present, it will respond by
1117 * correctly storing and echoing back the
1118 * ATA shadow register contents.
1119 *
1120 * LOCKING:
1121 * caller.
1122 */
1123
1124 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1125 {
1126 struct ata_ioports *ioaddr = &ap->ioaddr;
1127 u8 nsect, lbal;
1128
1129 ap->ops->dev_select(ap, device);
1130
1131 iowrite8(0x55, ioaddr->nsect_addr);
1132 iowrite8(0xaa, ioaddr->lbal_addr);
1133
1134 iowrite8(0xaa, ioaddr->nsect_addr);
1135 iowrite8(0x55, ioaddr->lbal_addr);
1136
1137 iowrite8(0x55, ioaddr->nsect_addr);
1138 iowrite8(0xaa, ioaddr->lbal_addr);
1139
1140 nsect = ioread8(ioaddr->nsect_addr);
1141 lbal = ioread8(ioaddr->lbal_addr);
1142
1143 if ((nsect == 0x55) && (lbal == 0xaa))
1144 return 1; /* we found a device */
1145
1146 return 0; /* nothing found */
1147 }
1148
1149 /**
1150 * ata_dev_classify - determine device type based on ATA-spec signature
1151 * @tf: ATA taskfile register set for device to be identified
1152 *
1153 * Determine from taskfile register contents whether a device is
1154 * ATA or ATAPI, as per "Signature and persistence" section
1155 * of ATA/PI spec (volume 1, sect 5.14).
1156 *
1157 * LOCKING:
1158 * None.
1159 *
1160 * RETURNS:
1161 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
1162 * %ATA_DEV_UNKNOWN the event of failure.
1163 */
1164 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1165 {
1166 /* Apple's open source Darwin code hints that some devices only
1167 * put a proper signature into the LBA mid/high registers,
1168 * So, we only check those. It's sufficient for uniqueness.
1169 *
1170 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
1171 * signatures for ATA and ATAPI devices attached on SerialATA,
1172 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
1173 * spec has never mentioned about using different signatures
1174 * for ATA/ATAPI devices. Then, Serial ATA II: Port
1175 * Multiplier specification began to use 0x69/0x96 to identify
1176 * port multpliers and 0x3c/0xc3 to identify SEMB device.
1177 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
1178 * 0x69/0x96 shortly and described them as reserved for
1179 * SerialATA.
1180 *
1181 * We follow the current spec and consider that 0x69/0x96
1182 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
1183 */
1184 if ((tf->lbam == 0) && (tf->lbah == 0)) {
1185 DPRINTK("found ATA device by sig\n");
1186 return ATA_DEV_ATA;
1187 }
1188
1189 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
1190 DPRINTK("found ATAPI device by sig\n");
1191 return ATA_DEV_ATAPI;
1192 }
1193
1194 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
1195 DPRINTK("found PMP device by sig\n");
1196 return ATA_DEV_PMP;
1197 }
1198
1199 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
1200 printk(KERN_INFO "ata: SEMB device ignored\n");
1201 return ATA_DEV_SEMB_UNSUP; /* not yet */
1202 }
1203
1204 DPRINTK("unknown device\n");
1205 return ATA_DEV_UNKNOWN;
1206 }
1207
1208 /**
1209 * ata_dev_try_classify - Parse returned ATA device signature
1210 * @dev: ATA device to classify (starting at zero)
1211 * @present: device seems present
1212 * @r_err: Value of error register on completion
1213 *
1214 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1215 * an ATA/ATAPI-defined set of values is placed in the ATA
1216 * shadow registers, indicating the results of device detection
1217 * and diagnostics.
1218 *
1219 * Select the ATA device, and read the values from the ATA shadow
1220 * registers. Then parse according to the Error register value,
1221 * and the spec-defined values examined by ata_dev_classify().
1222 *
1223 * LOCKING:
1224 * caller.
1225 *
1226 * RETURNS:
1227 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1228 */
1229 unsigned int ata_dev_try_classify(struct ata_device *dev, int present,
1230 u8 *r_err)
1231 {
1232 struct ata_port *ap = dev->link->ap;
1233 struct ata_taskfile tf;
1234 unsigned int class;
1235 u8 err;
1236
1237 ap->ops->dev_select(ap, dev->devno);
1238
1239 memset(&tf, 0, sizeof(tf));
1240
1241 ap->ops->tf_read(ap, &tf);
1242 err = tf.feature;
1243 if (r_err)
1244 *r_err = err;
1245
1246 /* see if device passed diags: continue and warn later */
1247 if (err == 0)
1248 /* diagnostic fail : do nothing _YET_ */
1249 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
1250 else if (err == 1)
1251 /* do nothing */ ;
1252 else if ((dev->devno == 0) && (err == 0x81))
1253 /* do nothing */ ;
1254 else
1255 return ATA_DEV_NONE;
1256
1257 /* determine if device is ATA or ATAPI */
1258 class = ata_dev_classify(&tf);
1259
1260 if (class == ATA_DEV_UNKNOWN) {
1261 /* If the device failed diagnostic, it's likely to
1262 * have reported incorrect device signature too.
1263 * Assume ATA device if the device seems present but
1264 * device signature is invalid with diagnostic
1265 * failure.
1266 */
1267 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
1268 class = ATA_DEV_ATA;
1269 else
1270 class = ATA_DEV_NONE;
1271 } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
1272 class = ATA_DEV_NONE;
1273
1274 return class;
1275 }
1276
1277 /**
1278 * ata_id_string - Convert IDENTIFY DEVICE page into string
1279 * @id: IDENTIFY DEVICE results we will examine
1280 * @s: string into which data is output
1281 * @ofs: offset into identify device page
1282 * @len: length of string to return. must be an even number.
1283 *
1284 * The strings in the IDENTIFY DEVICE page are broken up into
1285 * 16-bit chunks. Run through the string, and output each
1286 * 8-bit chunk linearly, regardless of platform.
1287 *
1288 * LOCKING:
1289 * caller.
1290 */
1291
1292 void ata_id_string(const u16 *id, unsigned char *s,
1293 unsigned int ofs, unsigned int len)
1294 {
1295 unsigned int c;
1296
1297 while (len > 0) {
1298 c = id[ofs] >> 8;
1299 *s = c;
1300 s++;
1301
1302 c = id[ofs] & 0xff;
1303 *s = c;
1304 s++;
1305
1306 ofs++;
1307 len -= 2;
1308 }
1309 }
1310
1311 /**
1312 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
1313 * @id: IDENTIFY DEVICE results we will examine
1314 * @s: string into which data is output
1315 * @ofs: offset into identify device page
1316 * @len: length of string to return. must be an odd number.
1317 *
1318 * This function is identical to ata_id_string except that it
1319 * trims trailing spaces and terminates the resulting string with
1320 * null. @len must be actual maximum length (even number) + 1.
1321 *
1322 * LOCKING:
1323 * caller.
1324 */
1325 void ata_id_c_string(const u16 *id, unsigned char *s,
1326 unsigned int ofs, unsigned int len)
1327 {
1328 unsigned char *p;
1329
1330 WARN_ON(!(len & 1));
1331
1332 ata_id_string(id, s, ofs, len - 1);
1333
1334 p = s + strnlen(s, len - 1);
1335 while (p > s && p[-1] == ' ')
1336 p--;
1337 *p = '\0';
1338 }
1339
1340 static u64 ata_id_n_sectors(const u16 *id)
1341 {
1342 if (ata_id_has_lba(id)) {
1343 if (ata_id_has_lba48(id))
1344 return ata_id_u64(id, 100);
1345 else
1346 return ata_id_u32(id, 60);
1347 } else {
1348 if (ata_id_current_chs_valid(id))
1349 return ata_id_u32(id, 57);
1350 else
1351 return id[1] * id[3] * id[6];
1352 }
1353 }
1354
1355 static u64 ata_tf_to_lba48(struct ata_taskfile *tf)
1356 {
1357 u64 sectors = 0;
1358
1359 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
1360 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
1361 sectors |= (tf->hob_lbal & 0xff) << 24;
1362 sectors |= (tf->lbah & 0xff) << 16;
1363 sectors |= (tf->lbam & 0xff) << 8;
1364 sectors |= (tf->lbal & 0xff);
1365
1366 return ++sectors;
1367 }
1368
1369 static u64 ata_tf_to_lba(struct ata_taskfile *tf)
1370 {
1371 u64 sectors = 0;
1372
1373 sectors |= (tf->device & 0x0f) << 24;
1374 sectors |= (tf->lbah & 0xff) << 16;
1375 sectors |= (tf->lbam & 0xff) << 8;
1376 sectors |= (tf->lbal & 0xff);
1377
1378 return ++sectors;
1379 }
1380
1381 /**
1382 * ata_read_native_max_address - Read native max address
1383 * @dev: target device
1384 * @max_sectors: out parameter for the result native max address
1385 *
1386 * Perform an LBA48 or LBA28 native size query upon the device in
1387 * question.
1388 *
1389 * RETURNS:
1390 * 0 on success, -EACCES if command is aborted by the drive.
1391 * -EIO on other errors.
1392 */
1393 static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
1394 {
1395 unsigned int err_mask;
1396 struct ata_taskfile tf;
1397 int lba48 = ata_id_has_lba48(dev->id);
1398
1399 ata_tf_init(dev, &tf);
1400
1401 /* always clear all address registers */
1402 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1403
1404 if (lba48) {
1405 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
1406 tf.flags |= ATA_TFLAG_LBA48;
1407 } else
1408 tf.command = ATA_CMD_READ_NATIVE_MAX;
1409
1410 tf.protocol |= ATA_PROT_NODATA;
1411 tf.device |= ATA_LBA;
1412
1413 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1414 if (err_mask) {
1415 ata_dev_printk(dev, KERN_WARNING, "failed to read native "
1416 "max address (err_mask=0x%x)\n", err_mask);
1417 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1418 return -EACCES;
1419 return -EIO;
1420 }
1421
1422 if (lba48)
1423 *max_sectors = ata_tf_to_lba48(&tf);
1424 else
1425 *max_sectors = ata_tf_to_lba(&tf);
1426 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
1427 (*max_sectors)--;
1428 return 0;
1429 }
1430
1431 /**
1432 * ata_set_max_sectors - Set max sectors
1433 * @dev: target device
1434 * @new_sectors: new max sectors value to set for the device
1435 *
1436 * Set max sectors of @dev to @new_sectors.
1437 *
1438 * RETURNS:
1439 * 0 on success, -EACCES if command is aborted or denied (due to
1440 * previous non-volatile SET_MAX) by the drive. -EIO on other
1441 * errors.
1442 */
1443 static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
1444 {
1445 unsigned int err_mask;
1446 struct ata_taskfile tf;
1447 int lba48 = ata_id_has_lba48(dev->id);
1448
1449 new_sectors--;
1450
1451 ata_tf_init(dev, &tf);
1452
1453 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1454
1455 if (lba48) {
1456 tf.command = ATA_CMD_SET_MAX_EXT;
1457 tf.flags |= ATA_TFLAG_LBA48;
1458
1459 tf.hob_lbal = (new_sectors >> 24) & 0xff;
1460 tf.hob_lbam = (new_sectors >> 32) & 0xff;
1461 tf.hob_lbah = (new_sectors >> 40) & 0xff;
1462 } else {
1463 tf.command = ATA_CMD_SET_MAX;
1464
1465 tf.device |= (new_sectors >> 24) & 0xf;
1466 }
1467
1468 tf.protocol |= ATA_PROT_NODATA;
1469 tf.device |= ATA_LBA;
1470
1471 tf.lbal = (new_sectors >> 0) & 0xff;
1472 tf.lbam = (new_sectors >> 8) & 0xff;
1473 tf.lbah = (new_sectors >> 16) & 0xff;
1474
1475 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1476 if (err_mask) {
1477 ata_dev_printk(dev, KERN_WARNING, "failed to set "
1478 "max address (err_mask=0x%x)\n", err_mask);
1479 if (err_mask == AC_ERR_DEV &&
1480 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1481 return -EACCES;
1482 return -EIO;
1483 }
1484
1485 return 0;
1486 }
1487
1488 /**
1489 * ata_hpa_resize - Resize a device with an HPA set
1490 * @dev: Device to resize
1491 *
1492 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1493 * it if required to the full size of the media. The caller must check
1494 * the drive has the HPA feature set enabled.
1495 *
1496 * RETURNS:
1497 * 0 on success, -errno on failure.
1498 */
1499 static int ata_hpa_resize(struct ata_device *dev)
1500 {
1501 struct ata_eh_context *ehc = &dev->link->eh_context;
1502 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1503 u64 sectors = ata_id_n_sectors(dev->id);
1504 u64 native_sectors;
1505 int rc;
1506
1507 /* do we need to do it? */
1508 if (dev->class != ATA_DEV_ATA ||
1509 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1510 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
1511 return 0;
1512
1513 /* read native max address */
1514 rc = ata_read_native_max_address(dev, &native_sectors);
1515 if (rc) {
1516 /* If device aborted the command or HPA isn't going to
1517 * be unlocked, skip HPA resizing.
1518 */
1519 if (rc == -EACCES || !ata_ignore_hpa) {
1520 ata_dev_printk(dev, KERN_WARNING, "HPA support seems "
1521 "broken, skipping HPA handling\n");
1522 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1523
1524 /* we can continue if device aborted the command */
1525 if (rc == -EACCES)
1526 rc = 0;
1527 }
1528
1529 return rc;
1530 }
1531
1532 /* nothing to do? */
1533 if (native_sectors <= sectors || !ata_ignore_hpa) {
1534 if (!print_info || native_sectors == sectors)
1535 return 0;
1536
1537 if (native_sectors > sectors)
1538 ata_dev_printk(dev, KERN_INFO,
1539 "HPA detected: current %llu, native %llu\n",
1540 (unsigned long long)sectors,
1541 (unsigned long long)native_sectors);
1542 else if (native_sectors < sectors)
1543 ata_dev_printk(dev, KERN_WARNING,
1544 "native sectors (%llu) is smaller than "
1545 "sectors (%llu)\n",
1546 (unsigned long long)native_sectors,
1547 (unsigned long long)sectors);
1548 return 0;
1549 }
1550
1551 /* let's unlock HPA */
1552 rc = ata_set_max_sectors(dev, native_sectors);
1553 if (rc == -EACCES) {
1554 /* if device aborted the command, skip HPA resizing */
1555 ata_dev_printk(dev, KERN_WARNING, "device aborted resize "
1556 "(%llu -> %llu), skipping HPA handling\n",
1557 (unsigned long long)sectors,
1558 (unsigned long long)native_sectors);
1559 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1560 return 0;
1561 } else if (rc)
1562 return rc;
1563
1564 /* re-read IDENTIFY data */
1565 rc = ata_dev_reread_id(dev, 0);
1566 if (rc) {
1567 ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY "
1568 "data after HPA resizing\n");
1569 return rc;
1570 }
1571
1572 if (print_info) {
1573 u64 new_sectors = ata_id_n_sectors(dev->id);
1574 ata_dev_printk(dev, KERN_INFO,
1575 "HPA unlocked: %llu -> %llu, native %llu\n",
1576 (unsigned long long)sectors,
1577 (unsigned long long)new_sectors,
1578 (unsigned long long)native_sectors);
1579 }
1580
1581 return 0;
1582 }
1583
1584 /**
1585 * ata_noop_dev_select - Select device 0/1 on ATA bus
1586 * @ap: ATA channel to manipulate
1587 * @device: ATA device (numbered from zero) to select
1588 *
1589 * This function performs no actual function.
1590 *
1591 * May be used as the dev_select() entry in ata_port_operations.
1592 *
1593 * LOCKING:
1594 * caller.
1595 */
1596 void ata_noop_dev_select(struct ata_port *ap, unsigned int device)
1597 {
1598 }
1599
1600
1601 /**
1602 * ata_std_dev_select - Select device 0/1 on ATA bus
1603 * @ap: ATA channel to manipulate
1604 * @device: ATA device (numbered from zero) to select
1605 *
1606 * Use the method defined in the ATA specification to
1607 * make either device 0, or device 1, active on the
1608 * ATA channel. Works with both PIO and MMIO.
1609 *
1610 * May be used as the dev_select() entry in ata_port_operations.
1611 *
1612 * LOCKING:
1613 * caller.
1614 */
1615
1616 void ata_std_dev_select(struct ata_port *ap, unsigned int device)
1617 {
1618 u8 tmp;
1619
1620 if (device == 0)
1621 tmp = ATA_DEVICE_OBS;
1622 else
1623 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1624
1625 iowrite8(tmp, ap->ioaddr.device_addr);
1626 ata_pause(ap); /* needed; also flushes, for mmio */
1627 }
1628
1629 /**
1630 * ata_dev_select - Select device 0/1 on ATA bus
1631 * @ap: ATA channel to manipulate
1632 * @device: ATA device (numbered from zero) to select
1633 * @wait: non-zero to wait for Status register BSY bit to clear
1634 * @can_sleep: non-zero if context allows sleeping
1635 *
1636 * Use the method defined in the ATA specification to
1637 * make either device 0, or device 1, active on the
1638 * ATA channel.
1639 *
1640 * This is a high-level version of ata_std_dev_select(),
1641 * which additionally provides the services of inserting
1642 * the proper pauses and status polling, where needed.
1643 *
1644 * LOCKING:
1645 * caller.
1646 */
1647
1648 void ata_dev_select(struct ata_port *ap, unsigned int device,
1649 unsigned int wait, unsigned int can_sleep)
1650 {
1651 if (ata_msg_probe(ap))
1652 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
1653 "device %u, wait %u\n", device, wait);
1654
1655 if (wait)
1656 ata_wait_idle(ap);
1657
1658 ap->ops->dev_select(ap, device);
1659
1660 if (wait) {
1661 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
1662 msleep(150);
1663 ata_wait_idle(ap);
1664 }
1665 }
1666
1667 /**
1668 * ata_dump_id - IDENTIFY DEVICE info debugging output
1669 * @id: IDENTIFY DEVICE page to dump
1670 *
1671 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1672 * page.
1673 *
1674 * LOCKING:
1675 * caller.
1676 */
1677
1678 static inline void ata_dump_id(const u16 *id)
1679 {
1680 DPRINTK("49==0x%04x "
1681 "53==0x%04x "
1682 "63==0x%04x "
1683 "64==0x%04x "
1684 "75==0x%04x \n",
1685 id[49],
1686 id[53],
1687 id[63],
1688 id[64],
1689 id[75]);
1690 DPRINTK("80==0x%04x "
1691 "81==0x%04x "
1692 "82==0x%04x "
1693 "83==0x%04x "
1694 "84==0x%04x \n",
1695 id[80],
1696 id[81],
1697 id[82],
1698 id[83],
1699 id[84]);
1700 DPRINTK("88==0x%04x "
1701 "93==0x%04x\n",
1702 id[88],
1703 id[93]);
1704 }
1705
1706 /**
1707 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1708 * @id: IDENTIFY data to compute xfer mask from
1709 *
1710 * Compute the xfermask for this device. This is not as trivial
1711 * as it seems if we must consider early devices correctly.
1712 *
1713 * FIXME: pre IDE drive timing (do we care ?).
1714 *
1715 * LOCKING:
1716 * None.
1717 *
1718 * RETURNS:
1719 * Computed xfermask
1720 */
1721 unsigned long ata_id_xfermask(const u16 *id)
1722 {
1723 unsigned long pio_mask, mwdma_mask, udma_mask;
1724
1725 /* Usual case. Word 53 indicates word 64 is valid */
1726 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1727 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1728 pio_mask <<= 3;
1729 pio_mask |= 0x7;
1730 } else {
1731 /* If word 64 isn't valid then Word 51 high byte holds
1732 * the PIO timing number for the maximum. Turn it into
1733 * a mask.
1734 */
1735 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
1736 if (mode < 5) /* Valid PIO range */
1737 pio_mask = (2 << mode) - 1;
1738 else
1739 pio_mask = 1;
1740
1741 /* But wait.. there's more. Design your standards by
1742 * committee and you too can get a free iordy field to
1743 * process. However its the speeds not the modes that
1744 * are supported... Note drivers using the timing API
1745 * will get this right anyway
1746 */
1747 }
1748
1749 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
1750
1751 if (ata_id_is_cfa(id)) {
1752 /*
1753 * Process compact flash extended modes
1754 */
1755 int pio = id[163] & 0x7;
1756 int dma = (id[163] >> 3) & 7;
1757
1758 if (pio)
1759 pio_mask |= (1 << 5);
1760 if (pio > 1)
1761 pio_mask |= (1 << 6);
1762 if (dma)
1763 mwdma_mask |= (1 << 3);
1764 if (dma > 1)
1765 mwdma_mask |= (1 << 4);
1766 }
1767
1768 udma_mask = 0;
1769 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1770 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1771
1772 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1773 }
1774
1775 /**
1776 * ata_pio_queue_task - Queue port_task
1777 * @ap: The ata_port to queue port_task for
1778 * @fn: workqueue function to be scheduled
1779 * @data: data for @fn to use
1780 * @delay: delay time for workqueue function
1781 *
1782 * Schedule @fn(@data) for execution after @delay jiffies using
1783 * port_task. There is one port_task per port and it's the
1784 * user(low level driver)'s responsibility to make sure that only
1785 * one task is active at any given time.
1786 *
1787 * libata core layer takes care of synchronization between
1788 * port_task and EH. ata_pio_queue_task() may be ignored for EH
1789 * synchronization.
1790 *
1791 * LOCKING:
1792 * Inherited from caller.
1793 */
1794 static void ata_pio_queue_task(struct ata_port *ap, void *data,
1795 unsigned long delay)
1796 {
1797 ap->port_task_data = data;
1798
1799 /* may fail if ata_port_flush_task() in progress */
1800 queue_delayed_work(ata_wq, &ap->port_task, delay);
1801 }
1802
1803 /**
1804 * ata_port_flush_task - Flush port_task
1805 * @ap: The ata_port to flush port_task for
1806 *
1807 * After this function completes, port_task is guranteed not to
1808 * be running or scheduled.
1809 *
1810 * LOCKING:
1811 * Kernel thread context (may sleep)
1812 */
1813 void ata_port_flush_task(struct ata_port *ap)
1814 {
1815 DPRINTK("ENTER\n");
1816
1817 cancel_rearming_delayed_work(&ap->port_task);
1818
1819 if (ata_msg_ctl(ap))
1820 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __func__);
1821 }
1822
1823 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1824 {
1825 struct completion *waiting = qc->private_data;
1826
1827 complete(waiting);
1828 }
1829
1830 /**
1831 * ata_exec_internal_sg - execute libata internal command
1832 * @dev: Device to which the command is sent
1833 * @tf: Taskfile registers for the command and the result
1834 * @cdb: CDB for packet command
1835 * @dma_dir: Data tranfer direction of the command
1836 * @sgl: sg list for the data buffer of the command
1837 * @n_elem: Number of sg entries
1838 * @timeout: Timeout in msecs (0 for default)
1839 *
1840 * Executes libata internal command with timeout. @tf contains
1841 * command on entry and result on return. Timeout and error
1842 * conditions are reported via return value. No recovery action
1843 * is taken after a command times out. It's caller's duty to
1844 * clean up after timeout.
1845 *
1846 * LOCKING:
1847 * None. Should be called with kernel context, might sleep.
1848 *
1849 * RETURNS:
1850 * Zero on success, AC_ERR_* mask on failure
1851 */
1852 unsigned ata_exec_internal_sg(struct ata_device *dev,
1853 struct ata_taskfile *tf, const u8 *cdb,
1854 int dma_dir, struct scatterlist *sgl,
1855 unsigned int n_elem, unsigned long timeout)
1856 {
1857 struct ata_link *link = dev->link;
1858 struct ata_port *ap = link->ap;
1859 u8 command = tf->command;
1860 struct ata_queued_cmd *qc;
1861 unsigned int tag, preempted_tag;
1862 u32 preempted_sactive, preempted_qc_active;
1863 int preempted_nr_active_links;
1864 DECLARE_COMPLETION_ONSTACK(wait);
1865 unsigned long flags;
1866 unsigned int err_mask;
1867 int rc;
1868
1869 spin_lock_irqsave(ap->lock, flags);
1870
1871 /* no internal command while frozen */
1872 if (ap->pflags & ATA_PFLAG_FROZEN) {
1873 spin_unlock_irqrestore(ap->lock, flags);
1874 return AC_ERR_SYSTEM;
1875 }
1876
1877 /* initialize internal qc */
1878
1879 /* XXX: Tag 0 is used for drivers with legacy EH as some
1880 * drivers choke if any other tag is given. This breaks
1881 * ata_tag_internal() test for those drivers. Don't use new
1882 * EH stuff without converting to it.
1883 */
1884 if (ap->ops->error_handler)
1885 tag = ATA_TAG_INTERNAL;
1886 else
1887 tag = 0;
1888
1889 if (test_and_set_bit(tag, &ap->qc_allocated))
1890 BUG();
1891 qc = __ata_qc_from_tag(ap, tag);
1892
1893 qc->tag = tag;
1894 qc->scsicmd = NULL;
1895 qc->ap = ap;
1896 qc->dev = dev;
1897 ata_qc_reinit(qc);
1898
1899 preempted_tag = link->active_tag;
1900 preempted_sactive = link->sactive;
1901 preempted_qc_active = ap->qc_active;
1902 preempted_nr_active_links = ap->nr_active_links;
1903 link->active_tag = ATA_TAG_POISON;
1904 link->sactive = 0;
1905 ap->qc_active = 0;
1906 ap->nr_active_links = 0;
1907
1908 /* prepare & issue qc */
1909 qc->tf = *tf;
1910 if (cdb)
1911 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1912 qc->flags |= ATA_QCFLAG_RESULT_TF;
1913 qc->dma_dir = dma_dir;
1914 if (dma_dir != DMA_NONE) {
1915 unsigned int i, buflen = 0;
1916 struct scatterlist *sg;
1917
1918 for_each_sg(sgl, sg, n_elem, i)
1919 buflen += sg->length;
1920
1921 ata_sg_init(qc, sgl, n_elem);
1922 qc->nbytes = buflen;
1923 }
1924
1925 qc->private_data = &wait;
1926 qc->complete_fn = ata_qc_complete_internal;
1927
1928 ata_qc_issue(qc);
1929
1930 spin_unlock_irqrestore(ap->lock, flags);
1931
1932 if (!timeout)
1933 timeout = ata_probe_timeout * 1000 / HZ;
1934
1935 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
1936
1937 ata_port_flush_task(ap);
1938
1939 if (!rc) {
1940 spin_lock_irqsave(ap->lock, flags);
1941
1942 /* We're racing with irq here. If we lose, the
1943 * following test prevents us from completing the qc
1944 * twice. If we win, the port is frozen and will be
1945 * cleaned up by ->post_internal_cmd().
1946 */
1947 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1948 qc->err_mask |= AC_ERR_TIMEOUT;
1949
1950 if (ap->ops->error_handler)
1951 ata_port_freeze(ap);
1952 else
1953 ata_qc_complete(qc);
1954
1955 if (ata_msg_warn(ap))
1956 ata_dev_printk(dev, KERN_WARNING,
1957 "qc timeout (cmd 0x%x)\n", command);
1958 }
1959
1960 spin_unlock_irqrestore(ap->lock, flags);
1961 }
1962
1963 /* do post_internal_cmd */
1964 if (ap->ops->post_internal_cmd)
1965 ap->ops->post_internal_cmd(qc);
1966
1967 /* perform minimal error analysis */
1968 if (qc->flags & ATA_QCFLAG_FAILED) {
1969 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1970 qc->err_mask |= AC_ERR_DEV;
1971
1972 if (!qc->err_mask)
1973 qc->err_mask |= AC_ERR_OTHER;
1974
1975 if (qc->err_mask & ~AC_ERR_OTHER)
1976 qc->err_mask &= ~AC_ERR_OTHER;
1977 }
1978
1979 /* finish up */
1980 spin_lock_irqsave(ap->lock, flags);
1981
1982 *tf = qc->result_tf;
1983 err_mask = qc->err_mask;
1984
1985 ata_qc_free(qc);
1986 link->active_tag = preempted_tag;
1987 link->sactive = preempted_sactive;
1988 ap->qc_active = preempted_qc_active;
1989 ap->nr_active_links = preempted_nr_active_links;
1990
1991 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1992 * Until those drivers are fixed, we detect the condition
1993 * here, fail the command with AC_ERR_SYSTEM and reenable the
1994 * port.
1995 *
1996 * Note that this doesn't change any behavior as internal
1997 * command failure results in disabling the device in the
1998 * higher layer for LLDDs without new reset/EH callbacks.
1999 *
2000 * Kill the following code as soon as those drivers are fixed.
2001 */
2002 if (ap->flags & ATA_FLAG_DISABLED) {
2003 err_mask |= AC_ERR_SYSTEM;
2004 ata_port_probe(ap);
2005 }
2006
2007 spin_unlock_irqrestore(ap->lock, flags);
2008
2009 return err_mask;
2010 }
2011
2012 /**
2013 * ata_exec_internal - execute libata internal command
2014 * @dev: Device to which the command is sent
2015 * @tf: Taskfile registers for the command and the result
2016 * @cdb: CDB for packet command
2017 * @dma_dir: Data tranfer direction of the command
2018 * @buf: Data buffer of the command
2019 * @buflen: Length of data buffer
2020 * @timeout: Timeout in msecs (0 for default)
2021 *
2022 * Wrapper around ata_exec_internal_sg() which takes simple
2023 * buffer instead of sg list.
2024 *
2025 * LOCKING:
2026 * None. Should be called with kernel context, might sleep.
2027 *
2028 * RETURNS:
2029 * Zero on success, AC_ERR_* mask on failure
2030 */
2031 unsigned ata_exec_internal(struct ata_device *dev,
2032 struct ata_taskfile *tf, const u8 *cdb,
2033 int dma_dir, void *buf, unsigned int buflen,
2034 unsigned long timeout)
2035 {
2036 struct scatterlist *psg = NULL, sg;
2037 unsigned int n_elem = 0;
2038
2039 if (dma_dir != DMA_NONE) {
2040 WARN_ON(!buf);
2041 sg_init_one(&sg, buf, buflen);
2042 psg = &sg;
2043 n_elem++;
2044 }
2045
2046 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
2047 timeout);
2048 }
2049
2050 /**
2051 * ata_do_simple_cmd - execute simple internal command
2052 * @dev: Device to which the command is sent
2053 * @cmd: Opcode to execute
2054 *
2055 * Execute a 'simple' command, that only consists of the opcode
2056 * 'cmd' itself, without filling any other registers
2057 *
2058 * LOCKING:
2059 * Kernel thread context (may sleep).
2060 *
2061 * RETURNS:
2062 * Zero on success, AC_ERR_* mask on failure
2063 */
2064 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
2065 {
2066 struct ata_taskfile tf;
2067
2068 ata_tf_init(dev, &tf);
2069
2070 tf.command = cmd;
2071 tf.flags |= ATA_TFLAG_DEVICE;
2072 tf.protocol = ATA_PROT_NODATA;
2073
2074 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
2075 }
2076
2077 /**
2078 * ata_pio_need_iordy - check if iordy needed
2079 * @adev: ATA device
2080 *
2081 * Check if the current speed of the device requires IORDY. Used
2082 * by various controllers for chip configuration.
2083 */
2084
2085 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
2086 {
2087 /* Controller doesn't support IORDY. Probably a pointless check
2088 as the caller should know this */
2089 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
2090 return 0;
2091 /* PIO3 and higher it is mandatory */
2092 if (adev->pio_mode > XFER_PIO_2)
2093 return 1;
2094 /* We turn it on when possible */
2095 if (ata_id_has_iordy(adev->id))
2096 return 1;
2097 return 0;
2098 }
2099
2100 /**
2101 * ata_pio_mask_no_iordy - Return the non IORDY mask
2102 * @adev: ATA device
2103 *
2104 * Compute the highest mode possible if we are not using iordy. Return
2105 * -1 if no iordy mode is available.
2106 */
2107
2108 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
2109 {
2110 /* If we have no drive specific rule, then PIO 2 is non IORDY */
2111 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
2112 u16 pio = adev->id[ATA_ID_EIDE_PIO];
2113 /* Is the speed faster than the drive allows non IORDY ? */
2114 if (pio) {
2115 /* This is cycle times not frequency - watch the logic! */
2116 if (pio > 240) /* PIO2 is 240nS per cycle */
2117 return 3 << ATA_SHIFT_PIO;
2118 return 7 << ATA_SHIFT_PIO;
2119 }
2120 }
2121 return 3 << ATA_SHIFT_PIO;
2122 }
2123
2124 /**
2125 * ata_dev_read_id - Read ID data from the specified device
2126 * @dev: target device
2127 * @p_class: pointer to class of the target device (may be changed)
2128 * @flags: ATA_READID_* flags
2129 * @id: buffer to read IDENTIFY data into
2130 *
2131 * Read ID data from the specified device. ATA_CMD_ID_ATA is
2132 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
2133 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
2134 * for pre-ATA4 drives.
2135 *
2136 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
2137 * now we abort if we hit that case.
2138 *
2139 * LOCKING:
2140 * Kernel thread context (may sleep)
2141 *
2142 * RETURNS:
2143 * 0 on success, -errno otherwise.
2144 */
2145 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
2146 unsigned int flags, u16 *id)
2147 {
2148 struct ata_port *ap = dev->link->ap;
2149 unsigned int class = *p_class;
2150 struct ata_taskfile tf;
2151 unsigned int err_mask = 0;
2152 const char *reason;
2153 int may_fallback = 1, tried_spinup = 0;
2154 int rc;
2155
2156 if (ata_msg_ctl(ap))
2157 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __func__);
2158
2159 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
2160 retry:
2161 ata_tf_init(dev, &tf);
2162
2163 switch (class) {
2164 case ATA_DEV_ATA:
2165 tf.command = ATA_CMD_ID_ATA;
2166 break;
2167 case ATA_DEV_ATAPI:
2168 tf.command = ATA_CMD_ID_ATAPI;
2169 break;
2170 default:
2171 rc = -ENODEV;
2172 reason = "unsupported class";
2173 goto err_out;
2174 }
2175
2176 tf.protocol = ATA_PROT_PIO;
2177
2178 /* Some devices choke if TF registers contain garbage. Make
2179 * sure those are properly initialized.
2180 */
2181 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2182
2183 /* Device presence detection is unreliable on some
2184 * controllers. Always poll IDENTIFY if available.
2185 */
2186 tf.flags |= ATA_TFLAG_POLLING;
2187
2188 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
2189 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
2190 if (err_mask) {
2191 if (err_mask & AC_ERR_NODEV_HINT) {
2192 ata_dev_printk(dev, KERN_DEBUG,
2193 "NODEV after polling detection\n");
2194 return -ENOENT;
2195 }
2196
2197 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
2198 /* Device or controller might have reported
2199 * the wrong device class. Give a shot at the
2200 * other IDENTIFY if the current one is
2201 * aborted by the device.
2202 */
2203 if (may_fallback) {
2204 may_fallback = 0;
2205
2206 if (class == ATA_DEV_ATA)
2207 class = ATA_DEV_ATAPI;
2208 else
2209 class = ATA_DEV_ATA;
2210 goto retry;
2211 }
2212
2213 /* Control reaches here iff the device aborted
2214 * both flavors of IDENTIFYs which happens
2215 * sometimes with phantom devices.
2216 */
2217 ata_dev_printk(dev, KERN_DEBUG,
2218 "both IDENTIFYs aborted, assuming NODEV\n");
2219 return -ENOENT;
2220 }
2221
2222 rc = -EIO;
2223 reason = "I/O error";
2224 goto err_out;
2225 }
2226
2227 /* Falling back doesn't make sense if ID data was read
2228 * successfully at least once.
2229 */
2230 may_fallback = 0;
2231
2232 swap_buf_le16(id, ATA_ID_WORDS);
2233
2234 /* sanity check */
2235 rc = -EINVAL;
2236 reason = "device reports invalid type";
2237
2238 if (class == ATA_DEV_ATA) {
2239 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
2240 goto err_out;
2241 } else {
2242 if (ata_id_is_ata(id))
2243 goto err_out;
2244 }
2245
2246 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
2247 tried_spinup = 1;
2248 /*
2249 * Drive powered-up in standby mode, and requires a specific
2250 * SET_FEATURES spin-up subcommand before it will accept
2251 * anything other than the original IDENTIFY command.
2252 */
2253 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
2254 if (err_mask && id[2] != 0x738c) {
2255 rc = -EIO;
2256 reason = "SPINUP failed";
2257 goto err_out;
2258 }
2259 /*
2260 * If the drive initially returned incomplete IDENTIFY info,
2261 * we now must reissue the IDENTIFY command.
2262 */
2263 if (id[2] == 0x37c8)
2264 goto retry;
2265 }
2266
2267 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
2268 /*
2269 * The exact sequence expected by certain pre-ATA4 drives is:
2270 * SRST RESET
2271 * IDENTIFY (optional in early ATA)
2272 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
2273 * anything else..
2274 * Some drives were very specific about that exact sequence.
2275 *
2276 * Note that ATA4 says lba is mandatory so the second check
2277 * shoud never trigger.
2278 */
2279 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
2280 err_mask = ata_dev_init_params(dev, id[3], id[6]);
2281 if (err_mask) {
2282 rc = -EIO;
2283 reason = "INIT_DEV_PARAMS failed";
2284 goto err_out;
2285 }
2286
2287 /* current CHS translation info (id[53-58]) might be
2288 * changed. reread the identify device info.
2289 */
2290 flags &= ~ATA_READID_POSTRESET;
2291 goto retry;
2292 }
2293 }
2294
2295 *p_class = class;
2296
2297 return 0;
2298
2299 err_out:
2300 if (ata_msg_warn(ap))
2301 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
2302 "(%s, err_mask=0x%x)\n", reason, err_mask);
2303 return rc;
2304 }
2305
2306 static inline u8 ata_dev_knobble(struct ata_device *dev)
2307 {
2308 struct ata_port *ap = dev->link->ap;
2309 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
2310 }
2311
2312 static void ata_dev_config_ncq(struct ata_device *dev,
2313 char *desc, size_t desc_sz)
2314 {
2315 struct ata_port *ap = dev->link->ap;
2316 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
2317
2318 if (!ata_id_has_ncq(dev->id)) {
2319 desc[0] = '\0';
2320 return;
2321 }
2322 if (dev->horkage & ATA_HORKAGE_NONCQ) {
2323 snprintf(desc, desc_sz, "NCQ (not used)");
2324 return;
2325 }
2326 if (ap->flags & ATA_FLAG_NCQ) {
2327 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
2328 dev->flags |= ATA_DFLAG_NCQ;
2329 }
2330
2331 if (hdepth >= ddepth)
2332 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
2333 else
2334 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
2335 }
2336
2337 /**
2338 * ata_dev_configure - Configure the specified ATA/ATAPI device
2339 * @dev: Target device to configure
2340 *
2341 * Configure @dev according to @dev->id. Generic and low-level
2342 * driver specific fixups are also applied.
2343 *
2344 * LOCKING:
2345 * Kernel thread context (may sleep)
2346 *
2347 * RETURNS:
2348 * 0 on success, -errno otherwise
2349 */
2350 int ata_dev_configure(struct ata_device *dev)
2351 {
2352 struct ata_port *ap = dev->link->ap;
2353 struct ata_eh_context *ehc = &dev->link->eh_context;
2354 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
2355 const u16 *id = dev->id;
2356 unsigned long xfer_mask;
2357 char revbuf[7]; /* XYZ-99\0 */
2358 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
2359 char modelbuf[ATA_ID_PROD_LEN+1];
2360 int rc;
2361
2362 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
2363 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
2364 __func__);
2365 return 0;
2366 }
2367
2368 if (ata_msg_probe(ap))
2369 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __func__);
2370
2371 /* set horkage */
2372 dev->horkage |= ata_dev_blacklisted(dev);
2373 ata_force_horkage(dev);
2374
2375 /* let ACPI work its magic */
2376 rc = ata_acpi_on_devcfg(dev);
2377 if (rc)
2378 return rc;
2379
2380 /* massage HPA, do it early as it might change IDENTIFY data */
2381 rc = ata_hpa_resize(dev);
2382 if (rc)
2383 return rc;
2384
2385 /* print device capabilities */
2386 if (ata_msg_probe(ap))
2387 ata_dev_printk(dev, KERN_DEBUG,
2388 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
2389 "85:%04x 86:%04x 87:%04x 88:%04x\n",
2390 __func__,
2391 id[49], id[82], id[83], id[84],
2392 id[85], id[86], id[87], id[88]);
2393
2394 /* initialize to-be-configured parameters */
2395 dev->flags &= ~ATA_DFLAG_CFG_MASK;
2396 dev->max_sectors = 0;
2397 dev->cdb_len = 0;
2398 dev->n_sectors = 0;
2399 dev->cylinders = 0;
2400 dev->heads = 0;
2401 dev->sectors = 0;
2402
2403 /*
2404 * common ATA, ATAPI feature tests
2405 */
2406
2407 /* find max transfer mode; for printk only */
2408 xfer_mask = ata_id_xfermask(id);
2409
2410 if (ata_msg_probe(ap))
2411 ata_dump_id(id);
2412
2413 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
2414 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
2415 sizeof(fwrevbuf));
2416
2417 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
2418 sizeof(modelbuf));
2419
2420 /* ATA-specific feature tests */
2421 if (dev->class == ATA_DEV_ATA) {
2422 if (ata_id_is_cfa(id)) {
2423 if (id[162] & 1) /* CPRM may make this media unusable */
2424 ata_dev_printk(dev, KERN_WARNING,
2425 "supports DRM functions and may "
2426 "not be fully accessable.\n");
2427 snprintf(revbuf, 7, "CFA");
2428 } else {
2429 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
2430 /* Warn the user if the device has TPM extensions */
2431 if (ata_id_has_tpm(id))
2432 ata_dev_printk(dev, KERN_WARNING,
2433 "supports DRM functions and may "
2434 "not be fully accessable.\n");
2435 }
2436
2437 dev->n_sectors = ata_id_n_sectors(id);
2438
2439 if (dev->id[59] & 0x100)
2440 dev->multi_count = dev->id[59] & 0xff;
2441
2442 if (ata_id_has_lba(id)) {
2443 const char *lba_desc;
2444 char ncq_desc[20];
2445
2446 lba_desc = "LBA";
2447 dev->flags |= ATA_DFLAG_LBA;
2448 if (ata_id_has_lba48(id)) {
2449 dev->flags |= ATA_DFLAG_LBA48;
2450 lba_desc = "LBA48";
2451
2452 if (dev->n_sectors >= (1UL << 28) &&
2453 ata_id_has_flush_ext(id))
2454 dev->flags |= ATA_DFLAG_FLUSH_EXT;
2455 }
2456
2457 /* config NCQ */
2458 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2459
2460 /* print device info to dmesg */
2461 if (ata_msg_drv(ap) && print_info) {
2462 ata_dev_printk(dev, KERN_INFO,
2463 "%s: %s, %s, max %s\n",
2464 revbuf, modelbuf, fwrevbuf,
2465 ata_mode_string(xfer_mask));
2466 ata_dev_printk(dev, KERN_INFO,
2467 "%Lu sectors, multi %u: %s %s\n",
2468 (unsigned long long)dev->n_sectors,
2469 dev->multi_count, lba_desc, ncq_desc);
2470 }
2471 } else {
2472 /* CHS */
2473
2474 /* Default translation */
2475 dev->cylinders = id[1];
2476 dev->heads = id[3];
2477 dev->sectors = id[6];
2478
2479 if (ata_id_current_chs_valid(id)) {
2480 /* Current CHS translation is valid. */
2481 dev->cylinders = id[54];
2482 dev->heads = id[55];
2483 dev->sectors = id[56];
2484 }
2485
2486 /* print device info to dmesg */
2487 if (ata_msg_drv(ap) && print_info) {
2488 ata_dev_printk(dev, KERN_INFO,
2489 "%s: %s, %s, max %s\n",
2490 revbuf, modelbuf, fwrevbuf,
2491 ata_mode_string(xfer_mask));
2492 ata_dev_printk(dev, KERN_INFO,
2493 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
2494 (unsigned long long)dev->n_sectors,
2495 dev->multi_count, dev->cylinders,
2496 dev->heads, dev->sectors);
2497 }
2498 }
2499
2500 dev->cdb_len = 16;
2501 }
2502
2503 /* ATAPI-specific feature tests */
2504 else if (dev->class == ATA_DEV_ATAPI) {
2505 const char *cdb_intr_string = "";
2506 const char *atapi_an_string = "";
2507 const char *dma_dir_string = "";
2508 u32 sntf;
2509
2510 rc = atapi_cdb_len(id);
2511 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
2512 if (ata_msg_warn(ap))
2513 ata_dev_printk(dev, KERN_WARNING,
2514 "unsupported CDB len\n");
2515 rc = -EINVAL;
2516 goto err_out_nosup;
2517 }
2518 dev->cdb_len = (unsigned int) rc;
2519
2520 /* Enable ATAPI AN if both the host and device have
2521 * the support. If PMP is attached, SNTF is required
2522 * to enable ATAPI AN to discern between PHY status
2523 * changed notifications and ATAPI ANs.
2524 */
2525 if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
2526 (!ap->nr_pmp_links ||
2527 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
2528 unsigned int err_mask;
2529
2530 /* issue SET feature command to turn this on */
2531 err_mask = ata_dev_set_feature(dev,
2532 SETFEATURES_SATA_ENABLE, SATA_AN);
2533 if (err_mask)
2534 ata_dev_printk(dev, KERN_ERR,
2535 "failed to enable ATAPI AN "
2536 "(err_mask=0x%x)\n", err_mask);
2537 else {
2538 dev->flags |= ATA_DFLAG_AN;
2539 atapi_an_string = ", ATAPI AN";
2540 }
2541 }
2542
2543 if (ata_id_cdb_intr(dev->id)) {
2544 dev->flags |= ATA_DFLAG_CDB_INTR;
2545 cdb_intr_string = ", CDB intr";
2546 }
2547
2548 if (atapi_dmadir || atapi_id_dmadir(dev->id)) {
2549 dev->flags |= ATA_DFLAG_DMADIR;
2550 dma_dir_string = ", DMADIR";
2551 }
2552
2553 /* print device info to dmesg */
2554 if (ata_msg_drv(ap) && print_info)
2555 ata_dev_printk(dev, KERN_INFO,
2556 "ATAPI: %s, %s, max %s%s%s%s\n",
2557 modelbuf, fwrevbuf,
2558 ata_mode_string(xfer_mask),
2559 cdb_intr_string, atapi_an_string,
2560 dma_dir_string);
2561 }
2562
2563 /* determine max_sectors */
2564 dev->max_sectors = ATA_MAX_SECTORS;
2565 if (dev->flags & ATA_DFLAG_LBA48)
2566 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2567
2568 if (!(dev->horkage & ATA_HORKAGE_IPM)) {
2569 if (ata_id_has_hipm(dev->id))
2570 dev->flags |= ATA_DFLAG_HIPM;
2571 if (ata_id_has_dipm(dev->id))
2572 dev->flags |= ATA_DFLAG_DIPM;
2573 }
2574
2575 /* Limit PATA drive on SATA cable bridge transfers to udma5,
2576 200 sectors */
2577 if (ata_dev_knobble(dev)) {
2578 if (ata_msg_drv(ap) && print_info)
2579 ata_dev_printk(dev, KERN_INFO,
2580 "applying bridge limits\n");
2581 dev->udma_mask &= ATA_UDMA5;
2582 dev->max_sectors = ATA_MAX_SECTORS;
2583 }
2584
2585 if ((dev->class == ATA_DEV_ATAPI) &&
2586 (atapi_command_packet_set(id) == TYPE_TAPE)) {
2587 dev->max_sectors = ATA_MAX_SECTORS_TAPE;
2588 dev->horkage |= ATA_HORKAGE_STUCK_ERR;
2589 }
2590
2591 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
2592 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2593 dev->max_sectors);
2594
2595 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_IPM) {
2596 dev->horkage |= ATA_HORKAGE_IPM;
2597
2598 /* reset link pm_policy for this port to no pm */
2599 ap->pm_policy = MAX_PERFORMANCE;
2600 }
2601
2602 if (ap->ops->dev_config)
2603 ap->ops->dev_config(dev);
2604
2605 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2606 /* Let the user know. We don't want to disallow opens for
2607 rescue purposes, or in case the vendor is just a blithering
2608 idiot. Do this after the dev_config call as some controllers
2609 with buggy firmware may want to avoid reporting false device
2610 bugs */
2611
2612 if (print_info) {
2613 ata_dev_printk(dev, KERN_WARNING,
2614 "Drive reports diagnostics failure. This may indicate a drive\n");
2615 ata_dev_printk(dev, KERN_WARNING,
2616 "fault or invalid emulation. Contact drive vendor for information.\n");
2617 }
2618 }
2619
2620 if (ata_msg_probe(ap))
2621 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
2622 __func__, ata_chk_status(ap));
2623 return 0;
2624
2625 err_out_nosup:
2626 if (ata_msg_probe(ap))
2627 ata_dev_printk(dev, KERN_DEBUG,
2628 "%s: EXIT, err\n", __func__);
2629 return rc;
2630 }
2631
2632 /**
2633 * ata_cable_40wire - return 40 wire cable type
2634 * @ap: port
2635 *
2636 * Helper method for drivers which want to hardwire 40 wire cable
2637 * detection.
2638 */
2639
2640 int ata_cable_40wire(struct ata_port *ap)
2641 {
2642 return ATA_CBL_PATA40;
2643 }
2644
2645 /**
2646 * ata_cable_80wire - return 80 wire cable type
2647 * @ap: port
2648 *
2649 * Helper method for drivers which want to hardwire 80 wire cable
2650 * detection.
2651 */
2652
2653 int ata_cable_80wire(struct ata_port *ap)
2654 {
2655 return ATA_CBL_PATA80;
2656 }
2657
2658 /**
2659 * ata_cable_unknown - return unknown PATA cable.
2660 * @ap: port
2661 *
2662 * Helper method for drivers which have no PATA cable detection.
2663 */
2664
2665 int ata_cable_unknown(struct ata_port *ap)
2666 {
2667 return ATA_CBL_PATA_UNK;
2668 }
2669
2670 /**
2671 * ata_cable_ignore - return ignored PATA cable.
2672 * @ap: port
2673 *
2674 * Helper method for drivers which don't use cable type to limit
2675 * transfer mode.
2676 */
2677 int ata_cable_ignore(struct ata_port *ap)
2678 {
2679 return ATA_CBL_PATA_IGN;
2680 }
2681
2682 /**
2683 * ata_cable_sata - return SATA cable type
2684 * @ap: port
2685 *
2686 * Helper method for drivers which have SATA cables
2687 */
2688
2689 int ata_cable_sata(struct ata_port *ap)
2690 {
2691 return ATA_CBL_SATA;
2692 }
2693
2694 /**
2695 * ata_bus_probe - Reset and probe ATA bus
2696 * @ap: Bus to probe
2697 *
2698 * Master ATA bus probing function. Initiates a hardware-dependent
2699 * bus reset, then attempts to identify any devices found on
2700 * the bus.
2701 *
2702 * LOCKING:
2703 * PCI/etc. bus probe sem.
2704 *
2705 * RETURNS:
2706 * Zero on success, negative errno otherwise.
2707 */
2708
2709 int ata_bus_probe(struct ata_port *ap)
2710 {
2711 unsigned int classes[ATA_MAX_DEVICES];
2712 int tries[ATA_MAX_DEVICES];
2713 int rc;
2714 struct ata_device *dev;
2715
2716 ata_port_probe(ap);
2717
2718 ata_link_for_each_dev(dev, &ap->link)
2719 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
2720
2721 retry:
2722 ata_link_for_each_dev(dev, &ap->link) {
2723 /* If we issue an SRST then an ATA drive (not ATAPI)
2724 * may change configuration and be in PIO0 timing. If
2725 * we do a hard reset (or are coming from power on)
2726 * this is true for ATA or ATAPI. Until we've set a
2727 * suitable controller mode we should not touch the
2728 * bus as we may be talking too fast.
2729 */
2730 dev->pio_mode = XFER_PIO_0;
2731
2732 /* If the controller has a pio mode setup function
2733 * then use it to set the chipset to rights. Don't
2734 * touch the DMA setup as that will be dealt with when
2735 * configuring devices.
2736 */
2737 if (ap->ops->set_piomode)
2738 ap->ops->set_piomode(ap, dev);
2739 }
2740
2741 /* reset and determine device classes */
2742 ap->ops->phy_reset(ap);
2743
2744 ata_link_for_each_dev(dev, &ap->link) {
2745 if (!(ap->flags & ATA_FLAG_DISABLED) &&
2746 dev->class != ATA_DEV_UNKNOWN)
2747 classes[dev->devno] = dev->class;
2748 else
2749 classes[dev->devno] = ATA_DEV_NONE;
2750
2751 dev->class = ATA_DEV_UNKNOWN;
2752 }
2753
2754 ata_port_probe(ap);
2755
2756 /* read IDENTIFY page and configure devices. We have to do the identify
2757 specific sequence bass-ackwards so that PDIAG- is released by
2758 the slave device */
2759
2760 ata_link_for_each_dev_reverse(dev, &ap->link) {
2761 if (tries[dev->devno])
2762 dev->class = classes[dev->devno];
2763
2764 if (!ata_dev_enabled(dev))
2765 continue;
2766
2767 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2768 dev->id);
2769 if (rc)
2770 goto fail;
2771 }
2772
2773 /* Now ask for the cable type as PDIAG- should have been released */
2774 if (ap->ops->cable_detect)
2775 ap->cbl = ap->ops->cable_detect(ap);
2776
2777 /* We may have SATA bridge glue hiding here irrespective of the
2778 reported cable types and sensed types */
2779 ata_link_for_each_dev(dev, &ap->link) {
2780 if (!ata_dev_enabled(dev))
2781 continue;
2782 /* SATA drives indicate we have a bridge. We don't know which
2783 end of the link the bridge is which is a problem */
2784 if (ata_id_is_sata(dev->id))
2785 ap->cbl = ATA_CBL_SATA;
2786 }
2787
2788 /* After the identify sequence we can now set up the devices. We do
2789 this in the normal order so that the user doesn't get confused */
2790
2791 ata_link_for_each_dev(dev, &ap->link) {
2792 if (!ata_dev_enabled(dev))
2793 continue;
2794
2795 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
2796 rc = ata_dev_configure(dev);
2797 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
2798 if (rc)
2799 goto fail;
2800 }
2801
2802 /* configure transfer mode */
2803 rc = ata_set_mode(&ap->link, &dev);
2804 if (rc)
2805 goto fail;
2806
2807 ata_link_for_each_dev(dev, &ap->link)
2808 if (ata_dev_enabled(dev))
2809 return 0;
2810
2811 /* no device present, disable port */
2812 ata_port_disable(ap);
2813 return -ENODEV;
2814
2815 fail:
2816 tries[dev->devno]--;
2817
2818 switch (rc) {
2819 case -EINVAL:
2820 /* eeek, something went very wrong, give up */
2821 tries[dev->devno] = 0;
2822 break;
2823
2824 case -ENODEV:
2825 /* give it just one more chance */
2826 tries[dev->devno] = min(tries[dev->devno], 1);
2827 case -EIO:
2828 if (tries[dev->devno] == 1) {
2829 /* This is the last chance, better to slow
2830 * down than lose it.
2831 */
2832 sata_down_spd_limit(&ap->link);
2833 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2834 }
2835 }
2836
2837 if (!tries[dev->devno])
2838 ata_dev_disable(dev);
2839
2840 goto retry;
2841 }
2842
2843 /**
2844 * ata_port_probe - Mark port as enabled
2845 * @ap: Port for which we indicate enablement
2846 *
2847 * Modify @ap data structure such that the system
2848 * thinks that the entire port is enabled.
2849 *
2850 * LOCKING: host lock, or some other form of
2851 * serialization.
2852 */
2853
2854 void ata_port_probe(struct ata_port *ap)
2855 {
2856 ap->flags &= ~ATA_FLAG_DISABLED;
2857 }
2858
2859 /**
2860 * sata_print_link_status - Print SATA link status
2861 * @link: SATA link to printk link status about
2862 *
2863 * This function prints link speed and status of a SATA link.
2864 *
2865 * LOCKING:
2866 * None.
2867 */
2868 void sata_print_link_status(struct ata_link *link)
2869 {
2870 u32 sstatus, scontrol, tmp;
2871
2872 if (sata_scr_read(link, SCR_STATUS, &sstatus))
2873 return;
2874 sata_scr_read(link, SCR_CONTROL, &scontrol);
2875
2876 if (ata_link_online(link)) {
2877 tmp = (sstatus >> 4) & 0xf;
2878 ata_link_printk(link, KERN_INFO,
2879 "SATA link up %s (SStatus %X SControl %X)\n",
2880 sata_spd_string(tmp), sstatus, scontrol);
2881 } else {
2882 ata_link_printk(link, KERN_INFO,
2883 "SATA link down (SStatus %X SControl %X)\n",
2884 sstatus, scontrol);
2885 }
2886 }
2887
2888 /**
2889 * ata_dev_pair - return other device on cable
2890 * @adev: device
2891 *
2892 * Obtain the other device on the same cable, or if none is
2893 * present NULL is returned
2894 */
2895
2896 struct ata_device *ata_dev_pair(struct ata_device *adev)
2897 {
2898 struct ata_link *link = adev->link;
2899 struct ata_device *pair = &link->device[1 - adev->devno];
2900 if (!ata_dev_enabled(pair))
2901 return NULL;
2902 return pair;
2903 }
2904
2905 /**
2906 * ata_port_disable - Disable port.
2907 * @ap: Port to be disabled.
2908 *
2909 * Modify @ap data structure such that the system
2910 * thinks that the entire port is disabled, and should
2911 * never attempt to probe or communicate with devices
2912 * on this port.
2913 *
2914 * LOCKING: host lock, or some other form of
2915 * serialization.
2916 */
2917
2918 void ata_port_disable(struct ata_port *ap)
2919 {
2920 ap->link.device[0].class = ATA_DEV_NONE;
2921 ap->link.device[1].class = ATA_DEV_NONE;
2922 ap->flags |= ATA_FLAG_DISABLED;
2923 }
2924
2925 /**
2926 * sata_down_spd_limit - adjust SATA spd limit downward
2927 * @link: Link to adjust SATA spd limit for
2928 *
2929 * Adjust SATA spd limit of @link downward. Note that this
2930 * function only adjusts the limit. The change must be applied
2931 * using sata_set_spd().
2932 *
2933 * LOCKING:
2934 * Inherited from caller.
2935 *
2936 * RETURNS:
2937 * 0 on success, negative errno on failure
2938 */
2939 int sata_down_spd_limit(struct ata_link *link)
2940 {
2941 u32 sstatus, spd, mask;
2942 int rc, highbit;
2943
2944 if (!sata_scr_valid(link))
2945 return -EOPNOTSUPP;
2946
2947 /* If SCR can be read, use it to determine the current SPD.
2948 * If not, use cached value in link->sata_spd.
2949 */
2950 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
2951 if (rc == 0)
2952 spd = (sstatus >> 4) & 0xf;
2953 else
2954 spd = link->sata_spd;
2955
2956 mask = link->sata_spd_limit;
2957 if (mask <= 1)
2958 return -EINVAL;
2959
2960 /* unconditionally mask off the highest bit */
2961 highbit = fls(mask) - 1;
2962 mask &= ~(1 << highbit);
2963
2964 /* Mask off all speeds higher than or equal to the current
2965 * one. Force 1.5Gbps if current SPD is not available.
2966 */
2967 if (spd > 1)
2968 mask &= (1 << (spd - 1)) - 1;
2969 else
2970 mask &= 1;
2971
2972 /* were we already at the bottom? */
2973 if (!mask)
2974 return -EINVAL;
2975
2976 link->sata_spd_limit = mask;
2977
2978 ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n",
2979 sata_spd_string(fls(mask)));
2980
2981 return 0;
2982 }
2983
2984 static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
2985 {
2986 struct ata_link *host_link = &link->ap->link;
2987 u32 limit, target, spd;
2988
2989 limit = link->sata_spd_limit;
2990
2991 /* Don't configure downstream link faster than upstream link.
2992 * It doesn't speed up anything and some PMPs choke on such
2993 * configuration.
2994 */
2995 if (!ata_is_host_link(link) && host_link->sata_spd)
2996 limit &= (1 << host_link->sata_spd) - 1;
2997
2998 if (limit == UINT_MAX)
2999 target = 0;
3000 else
3001 target = fls(limit);
3002
3003 spd = (*scontrol >> 4) & 0xf;
3004 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
3005
3006 return spd != target;
3007 }
3008
3009 /**
3010 * sata_set_spd_needed - is SATA spd configuration needed
3011 * @link: Link in question
3012 *
3013 * Test whether the spd limit in SControl matches
3014 * @link->sata_spd_limit. This function is used to determine
3015 * whether hardreset is necessary to apply SATA spd
3016 * configuration.
3017 *
3018 * LOCKING:
3019 * Inherited from caller.
3020 *
3021 * RETURNS:
3022 * 1 if SATA spd configuration is needed, 0 otherwise.
3023 */
3024 int sata_set_spd_needed(struct ata_link *link)
3025 {
3026 u32 scontrol;
3027
3028 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
3029 return 1;
3030
3031 return __sata_set_spd_needed(link, &scontrol);
3032 }
3033
3034 /**
3035 * sata_set_spd - set SATA spd according to spd limit
3036 * @link: Link to set SATA spd for
3037 *
3038 * Set SATA spd of @link according to sata_spd_limit.
3039 *
3040 * LOCKING:
3041 * Inherited from caller.
3042 *
3043 * RETURNS:
3044 * 0 if spd doesn't need to be changed, 1 if spd has been
3045 * changed. Negative errno if SCR registers are inaccessible.
3046 */
3047 int sata_set_spd(struct ata_link *link)
3048 {
3049 u32 scontrol;
3050 int rc;
3051
3052 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3053 return rc;
3054
3055 if (!__sata_set_spd_needed(link, &scontrol))
3056 return 0;
3057
3058 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3059 return rc;
3060
3061 return 1;
3062 }
3063
3064 /*
3065 * This mode timing computation functionality is ported over from
3066 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
3067 */
3068 /*
3069 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
3070 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
3071 * for UDMA6, which is currently supported only by Maxtor drives.
3072 *
3073 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
3074 */
3075
3076 static const struct ata_timing ata_timing[] = {
3077 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
3078 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
3079 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
3080 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
3081 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
3082 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
3083 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
3084 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
3085
3086 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
3087 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
3088 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
3089
3090 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
3091 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
3092 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
3093 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
3094 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
3095
3096 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
3097 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
3098 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
3099 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
3100 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
3101 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
3102 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
3103 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
3104
3105 { 0xFF }
3106 };
3107
3108 #define ENOUGH(v, unit) (((v)-1)/(unit)+1)
3109 #define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
3110
3111 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
3112 {
3113 q->setup = EZ(t->setup * 1000, T);
3114 q->act8b = EZ(t->act8b * 1000, T);
3115 q->rec8b = EZ(t->rec8b * 1000, T);
3116 q->cyc8b = EZ(t->cyc8b * 1000, T);
3117 q->active = EZ(t->active * 1000, T);
3118 q->recover = EZ(t->recover * 1000, T);
3119 q->cycle = EZ(t->cycle * 1000, T);
3120 q->udma = EZ(t->udma * 1000, UT);
3121 }
3122
3123 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
3124 struct ata_timing *m, unsigned int what)
3125 {
3126 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
3127 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
3128 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
3129 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
3130 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
3131 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
3132 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
3133 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
3134 }
3135
3136 const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
3137 {
3138 const struct ata_timing *t = ata_timing;
3139
3140 while (xfer_mode > t->mode)
3141 t++;
3142
3143 if (xfer_mode == t->mode)
3144 return t;
3145 return NULL;
3146 }
3147
3148 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
3149 struct ata_timing *t, int T, int UT)
3150 {
3151 const struct ata_timing *s;
3152 struct ata_timing p;
3153
3154 /*
3155 * Find the mode.
3156 */
3157
3158 if (!(s = ata_timing_find_mode(speed)))
3159 return -EINVAL;
3160
3161 memcpy(t, s, sizeof(*s));
3162
3163 /*
3164 * If the drive is an EIDE drive, it can tell us it needs extended
3165 * PIO/MW_DMA cycle timing.
3166 */
3167
3168 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
3169 memset(&p, 0, sizeof(p));
3170 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
3171 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
3172 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
3173 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
3174 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
3175 }
3176 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
3177 }
3178
3179 /*
3180 * Convert the timing to bus clock counts.
3181 */
3182
3183 ata_timing_quantize(t, t, T, UT);
3184
3185 /*
3186 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
3187 * S.M.A.R.T * and some other commands. We have to ensure that the
3188 * DMA cycle timing is slower/equal than the fastest PIO timing.
3189 */
3190
3191 if (speed > XFER_PIO_6) {
3192 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
3193 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
3194 }
3195
3196 /*
3197 * Lengthen active & recovery time so that cycle time is correct.
3198 */
3199
3200 if (t->act8b + t->rec8b < t->cyc8b) {
3201 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
3202 t->rec8b = t->cyc8b - t->act8b;
3203 }
3204
3205 if (t->active + t->recover < t->cycle) {
3206 t->active += (t->cycle - (t->active + t->recover)) / 2;
3207 t->recover = t->cycle - t->active;
3208 }
3209
3210 /* In a few cases quantisation may produce enough errors to
3211 leave t->cycle too low for the sum of active and recovery
3212 if so we must correct this */
3213 if (t->active + t->recover > t->cycle)
3214 t->cycle = t->active + t->recover;
3215
3216 return 0;
3217 }
3218
3219 /**
3220 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration
3221 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
3222 * @cycle: cycle duration in ns
3223 *
3224 * Return matching xfer mode for @cycle. The returned mode is of
3225 * the transfer type specified by @xfer_shift. If @cycle is too
3226 * slow for @xfer_shift, 0xff is returned. If @cycle is faster
3227 * than the fastest known mode, the fasted mode is returned.
3228 *
3229 * LOCKING:
3230 * None.
3231 *
3232 * RETURNS:
3233 * Matching xfer_mode, 0xff if no match found.
3234 */
3235 u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle)
3236 {
3237 u8 base_mode = 0xff, last_mode = 0xff;
3238 const struct ata_xfer_ent *ent;
3239 const struct ata_timing *t;
3240
3241 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
3242 if (ent->shift == xfer_shift)
3243 base_mode = ent->base;
3244
3245 for (t = ata_timing_find_mode(base_mode);
3246 t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) {
3247 unsigned short this_cycle;
3248
3249 switch (xfer_shift) {
3250 case ATA_SHIFT_PIO:
3251 case ATA_SHIFT_MWDMA:
3252 this_cycle = t->cycle;
3253 break;
3254 case ATA_SHIFT_UDMA:
3255 this_cycle = t->udma;
3256 break;
3257 default:
3258 return 0xff;
3259 }
3260
3261 if (cycle > this_cycle)
3262 break;
3263
3264 last_mode = t->mode;
3265 }
3266
3267 return last_mode;
3268 }
3269
3270 /**
3271 * ata_down_xfermask_limit - adjust dev xfer masks downward
3272 * @dev: Device to adjust xfer masks
3273 * @sel: ATA_DNXFER_* selector
3274 *
3275 * Adjust xfer masks of @dev downward. Note that this function
3276 * does not apply the change. Invoking ata_set_mode() afterwards
3277 * will apply the limit.
3278 *
3279 * LOCKING:
3280 * Inherited from caller.
3281 *
3282 * RETURNS:
3283 * 0 on success, negative errno on failure
3284 */
3285 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
3286 {
3287 char buf[32];
3288 unsigned long orig_mask, xfer_mask;
3289 unsigned long pio_mask, mwdma_mask, udma_mask;
3290 int quiet, highbit;
3291
3292 quiet = !!(sel & ATA_DNXFER_QUIET);
3293 sel &= ~ATA_DNXFER_QUIET;
3294
3295 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
3296 dev->mwdma_mask,
3297 dev->udma_mask);
3298 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
3299
3300 switch (sel) {
3301 case ATA_DNXFER_PIO:
3302 highbit = fls(pio_mask) - 1;
3303 pio_mask &= ~(1 << highbit);
3304 break;
3305
3306 case ATA_DNXFER_DMA:
3307 if (udma_mask) {
3308 highbit = fls(udma_mask) - 1;
3309 udma_mask &= ~(1 << highbit);
3310 if (!udma_mask)
3311 return -ENOENT;
3312 } else if (mwdma_mask) {
3313 highbit = fls(mwdma_mask) - 1;
3314 mwdma_mask &= ~(1 << highbit);
3315 if (!mwdma_mask)
3316 return -ENOENT;
3317 }
3318 break;
3319
3320 case ATA_DNXFER_40C:
3321 udma_mask &= ATA_UDMA_MASK_40C;
3322 break;
3323
3324 case ATA_DNXFER_FORCE_PIO0:
3325 pio_mask &= 1;
3326 case ATA_DNXFER_FORCE_PIO:
3327 mwdma_mask = 0;
3328 udma_mask = 0;
3329 break;
3330
3331 default:
3332 BUG();
3333 }
3334
3335 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
3336
3337 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
3338 return -ENOENT;
3339
3340 if (!quiet) {
3341 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
3342 snprintf(buf, sizeof(buf), "%s:%s",
3343 ata_mode_string(xfer_mask),
3344 ata_mode_string(xfer_mask & ATA_MASK_PIO));
3345 else
3346 snprintf(buf, sizeof(buf), "%s",
3347 ata_mode_string(xfer_mask));
3348
3349 ata_dev_printk(dev, KERN_WARNING,
3350 "limiting speed to %s\n", buf);
3351 }
3352
3353 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
3354 &dev->udma_mask);
3355
3356 return 0;
3357 }
3358
3359 static int ata_dev_set_mode(struct ata_device *dev)
3360 {
3361 struct ata_eh_context *ehc = &dev->link->eh_context;
3362 const char *dev_err_whine = "";
3363 int ign_dev_err = 0;
3364 unsigned int err_mask;
3365 int rc;
3366
3367 dev->flags &= ~ATA_DFLAG_PIO;
3368 if (dev->xfer_shift == ATA_SHIFT_PIO)
3369 dev->flags |= ATA_DFLAG_PIO;
3370
3371 err_mask = ata_dev_set_xfermode(dev);
3372
3373 if (err_mask & ~AC_ERR_DEV)
3374 goto fail;
3375
3376 /* revalidate */
3377 ehc->i.flags |= ATA_EHI_POST_SETMODE;
3378 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
3379 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
3380 if (rc)
3381 return rc;
3382
3383 /* Old CFA may refuse this command, which is just fine */
3384 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
3385 ign_dev_err = 1;
3386
3387 /* Some very old devices and some bad newer ones fail any kind of
3388 SET_XFERMODE request but support PIO0-2 timings and no IORDY */
3389 if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) &&
3390 dev->pio_mode <= XFER_PIO_2)
3391 ign_dev_err = 1;
3392
3393 /* Early MWDMA devices do DMA but don't allow DMA mode setting.
3394 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
3395 if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
3396 dev->dma_mode == XFER_MW_DMA_0 &&
3397 (dev->id[63] >> 8) & 1)
3398 ign_dev_err = 1;
3399
3400 /* if the device is actually configured correctly, ignore dev err */
3401 if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id)))
3402 ign_dev_err = 1;
3403
3404 if (err_mask & AC_ERR_DEV) {
3405 if (!ign_dev_err)
3406 goto fail;
3407 else
3408 dev_err_whine = " (device error ignored)";
3409 }
3410
3411 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
3412 dev->xfer_shift, (int)dev->xfer_mode);
3413
3414 ata_dev_printk(dev, KERN_INFO, "configured for %s%s\n",
3415 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)),
3416 dev_err_whine);
3417
3418 return 0;
3419
3420 fail:
3421 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
3422 "(err_mask=0x%x)\n", err_mask);
3423 return -EIO;
3424 }
3425
3426 /**
3427 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
3428 * @link: link on which timings will be programmed
3429 * @r_failed_dev: out parameter for failed device
3430 *
3431 * Standard implementation of the function used to tune and set
3432 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3433 * ata_dev_set_mode() fails, pointer to the failing device is
3434 * returned in @r_failed_dev.
3435 *
3436 * LOCKING:
3437 * PCI/etc. bus probe sem.
3438 *
3439 * RETURNS:
3440 * 0 on success, negative errno otherwise
3441 */
3442
3443 int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
3444 {
3445 struct ata_port *ap = link->ap;
3446 struct ata_device *dev;
3447 int rc = 0, used_dma = 0, found = 0;
3448
3449 /* step 1: calculate xfer_mask */
3450 ata_link_for_each_dev(dev, link) {
3451 unsigned long pio_mask, dma_mask;
3452 unsigned int mode_mask;
3453
3454 if (!ata_dev_enabled(dev))
3455 continue;
3456
3457 mode_mask = ATA_DMA_MASK_ATA;
3458 if (dev->class == ATA_DEV_ATAPI)
3459 mode_mask = ATA_DMA_MASK_ATAPI;
3460 else if (ata_id_is_cfa(dev->id))
3461 mode_mask = ATA_DMA_MASK_CFA;
3462
3463 ata_dev_xfermask(dev);
3464 ata_force_xfermask(dev);
3465
3466 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
3467 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
3468
3469 if (libata_dma_mask & mode_mask)
3470 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
3471 else
3472 dma_mask = 0;
3473
3474 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
3475 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
3476
3477 found = 1;
3478 if (dev->dma_mode != 0xff)
3479 used_dma = 1;
3480 }
3481 if (!found)
3482 goto out;
3483
3484 /* step 2: always set host PIO timings */
3485 ata_link_for_each_dev(dev, link) {
3486 if (!ata_dev_enabled(dev))
3487 continue;
3488
3489 if (dev->pio_mode == 0xff) {
3490 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
3491 rc = -EINVAL;
3492 goto out;
3493 }
3494
3495 dev->xfer_mode = dev->pio_mode;
3496 dev->xfer_shift = ATA_SHIFT_PIO;
3497 if (ap->ops->set_piomode)
3498 ap->ops->set_piomode(ap, dev);
3499 }
3500
3501 /* step 3: set host DMA timings */
3502 ata_link_for_each_dev(dev, link) {
3503 if (!ata_dev_enabled(dev) || dev->dma_mode == 0xff)
3504 continue;
3505
3506 dev->xfer_mode = dev->dma_mode;
3507 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
3508 if (ap->ops->set_dmamode)
3509 ap->ops->set_dmamode(ap, dev);
3510 }
3511
3512 /* step 4: update devices' xfer mode */
3513 ata_link_for_each_dev(dev, link) {
3514 /* don't update suspended devices' xfer mode */
3515 if (!ata_dev_enabled(dev))
3516 continue;
3517
3518 rc = ata_dev_set_mode(dev);
3519 if (rc)
3520 goto out;
3521 }
3522
3523 /* Record simplex status. If we selected DMA then the other
3524 * host channels are not permitted to do so.
3525 */
3526 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
3527 ap->host->simplex_claimed = ap;
3528
3529 out:
3530 if (rc)
3531 *r_failed_dev = dev;
3532 return rc;
3533 }
3534
3535 /**
3536 * ata_tf_to_host - issue ATA taskfile to host controller
3537 * @ap: port to which command is being issued
3538 * @tf: ATA taskfile register set
3539 *
3540 * Issues ATA taskfile register set to ATA host controller,
3541 * with proper synchronization with interrupt handler and
3542 * other threads.
3543 *
3544 * LOCKING:
3545 * spin_lock_irqsave(host lock)
3546 */
3547
3548 static inline void ata_tf_to_host(struct ata_port *ap,
3549 const struct ata_taskfile *tf)
3550 {
3551 ap->ops->tf_load(ap, tf);
3552 ap->ops->exec_command(ap, tf);
3553 }
3554
3555 /**
3556 * ata_busy_sleep - sleep until BSY clears, or timeout
3557 * @ap: port containing status register to be polled
3558 * @tmout_pat: impatience timeout
3559 * @tmout: overall timeout
3560 *
3561 * Sleep until ATA Status register bit BSY clears,
3562 * or a timeout occurs.
3563 *
3564 * LOCKING:
3565 * Kernel thread context (may sleep).
3566 *
3567 * RETURNS:
3568 * 0 on success, -errno otherwise.
3569 */
3570 int ata_busy_sleep(struct ata_port *ap,
3571 unsigned long tmout_pat, unsigned long tmout)
3572 {
3573 unsigned long timer_start, timeout;
3574 u8 status;
3575
3576 status = ata_busy_wait(ap, ATA_BUSY, 300);
3577 timer_start = jiffies;
3578 timeout = timer_start + tmout_pat;
3579 while (status != 0xff && (status & ATA_BUSY) &&
3580 time_before(jiffies, timeout)) {
3581 msleep(50);
3582 status = ata_busy_wait(ap, ATA_BUSY, 3);
3583 }
3584
3585 if (status != 0xff && (status & ATA_BUSY))
3586 ata_port_printk(ap, KERN_WARNING,
3587 "port is slow to respond, please be patient "
3588 "(Status 0x%x)\n", status);
3589
3590 timeout = timer_start + tmout;
3591 while (status != 0xff && (status & ATA_BUSY) &&
3592 time_before(jiffies, timeout)) {
3593 msleep(50);
3594 status = ata_chk_status(ap);
3595 }
3596
3597 if (status == 0xff)
3598 return -ENODEV;
3599
3600 if (status & ATA_BUSY) {
3601 ata_port_printk(ap, KERN_ERR, "port failed to respond "
3602 "(%lu secs, Status 0x%x)\n",
3603 tmout / HZ, status);
3604 return -EBUSY;
3605 }
3606
3607 return 0;
3608 }
3609
3610 /**
3611 * ata_wait_after_reset - wait before checking status after reset
3612 * @ap: port containing status register to be polled
3613 * @deadline: deadline jiffies for the operation
3614 *
3615 * After reset, we need to pause a while before reading status.
3616 * Also, certain combination of controller and device report 0xff
3617 * for some duration (e.g. until SATA PHY is up and running)
3618 * which is interpreted as empty port in ATA world. This
3619 * function also waits for such devices to get out of 0xff
3620 * status.
3621 *
3622 * LOCKING:
3623 * Kernel thread context (may sleep).
3624 */
3625 void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline)
3626 {
3627 unsigned long until = jiffies + ATA_TMOUT_FF_WAIT;
3628
3629 if (time_before(until, deadline))
3630 deadline = until;
3631
3632 /* Spec mandates ">= 2ms" before checking status. We wait
3633 * 150ms, because that was the magic delay used for ATAPI
3634 * devices in Hale Landis's ATADRVR, for the period of time
3635 * between when the ATA command register is written, and then
3636 * status is checked. Because waiting for "a while" before
3637 * checking status is fine, post SRST, we perform this magic
3638 * delay here as well.
3639 *
3640 * Old drivers/ide uses the 2mS rule and then waits for ready.
3641 */
3642 msleep(150);
3643
3644 /* Wait for 0xff to clear. Some SATA devices take a long time
3645 * to clear 0xff after reset. For example, HHD424020F7SV00
3646 * iVDR needs >= 800ms while. Quantum GoVault needs even more
3647 * than that.
3648 *
3649 * Note that some PATA controllers (pata_ali) explode if
3650 * status register is read more than once when there's no
3651 * device attached.
3652 */
3653 if (ap->flags & ATA_FLAG_SATA) {
3654 while (1) {
3655 u8 status = ata_chk_status(ap);
3656
3657 if (status != 0xff || time_after(jiffies, deadline))
3658 return;
3659
3660 msleep(50);
3661 }
3662 }
3663 }
3664
3665 /**
3666 * ata_wait_ready - sleep until BSY clears, or timeout
3667 * @ap: port containing status register to be polled
3668 * @deadline: deadline jiffies for the operation
3669 *
3670 * Sleep until ATA Status register bit BSY clears, or timeout
3671 * occurs.
3672 *
3673 * LOCKING:
3674 * Kernel thread context (may sleep).
3675 *
3676 * RETURNS:
3677 * 0 on success, -errno otherwise.
3678 */
3679 int ata_wait_ready(struct ata_port *ap, unsigned long deadline)
3680 {
3681 unsigned long start = jiffies;
3682 int warned = 0;
3683
3684 while (1) {
3685 u8 status = ata_chk_status(ap);
3686 unsigned long now = jiffies;
3687
3688 if (!(status & ATA_BUSY))
3689 return 0;
3690 if (!ata_link_online(&ap->link) && status == 0xff)
3691 return -ENODEV;
3692 if (time_after(now, deadline))
3693 return -EBUSY;
3694
3695 if (!warned && time_after(now, start + 5 * HZ) &&
3696 (deadline - now > 3 * HZ)) {
3697 ata_port_printk(ap, KERN_WARNING,
3698 "port is slow to respond, please be patient "
3699 "(Status 0x%x)\n", status);
3700 warned = 1;
3701 }
3702
3703 msleep(50);
3704 }
3705 }
3706
3707 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
3708 unsigned long deadline)
3709 {
3710 struct ata_ioports *ioaddr = &ap->ioaddr;
3711 unsigned int dev0 = devmask & (1 << 0);
3712 unsigned int dev1 = devmask & (1 << 1);
3713 int rc, ret = 0;
3714
3715 /* if device 0 was found in ata_devchk, wait for its
3716 * BSY bit to clear
3717 */
3718 if (dev0) {
3719 rc = ata_wait_ready(ap, deadline);
3720 if (rc) {
3721 if (rc != -ENODEV)
3722 return rc;
3723 ret = rc;
3724 }
3725 }
3726
3727 /* if device 1 was found in ata_devchk, wait for register
3728 * access briefly, then wait for BSY to clear.
3729 */
3730 if (dev1) {
3731 int i;
3732
3733 ap->ops->dev_select(ap, 1);
3734
3735 /* Wait for register access. Some ATAPI devices fail
3736 * to set nsect/lbal after reset, so don't waste too
3737 * much time on it. We're gonna wait for !BSY anyway.
3738 */
3739 for (i = 0; i < 2; i++) {
3740 u8 nsect, lbal;
3741
3742 nsect = ioread8(ioaddr->nsect_addr);
3743 lbal = ioread8(ioaddr->lbal_addr);
3744 if ((nsect == 1) && (lbal == 1))
3745 break;
3746 msleep(50); /* give drive a breather */
3747 }
3748
3749 rc = ata_wait_ready(ap, deadline);
3750 if (rc) {
3751 if (rc != -ENODEV)
3752 return rc;
3753 ret = rc;
3754 }
3755 }
3756
3757 /* is all this really necessary? */
3758 ap->ops->dev_select(ap, 0);
3759 if (dev1)
3760 ap->ops->dev_select(ap, 1);
3761 if (dev0)
3762 ap->ops->dev_select(ap, 0);
3763
3764 return ret;
3765 }
3766
3767 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
3768 unsigned long deadline)
3769 {
3770 struct ata_ioports *ioaddr = &ap->ioaddr;
3771
3772 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
3773
3774 /* software reset. causes dev0 to be selected */
3775 iowrite8(ap->ctl, ioaddr->ctl_addr);
3776 udelay(20); /* FIXME: flush */
3777 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
3778 udelay(20); /* FIXME: flush */
3779 iowrite8(ap->ctl, ioaddr->ctl_addr);
3780
3781 /* wait a while before checking status */
3782 ata_wait_after_reset(ap, deadline);
3783
3784 /* Before we perform post reset processing we want to see if
3785 * the bus shows 0xFF because the odd clown forgets the D7
3786 * pulldown resistor.
3787 */
3788 if (ata_chk_status(ap) == 0xFF)
3789 return -ENODEV;
3790
3791 return ata_bus_post_reset(ap, devmask, deadline);
3792 }
3793
3794 /**
3795 * ata_bus_reset - reset host port and associated ATA channel
3796 * @ap: port to reset
3797 *
3798 * This is typically the first time we actually start issuing
3799 * commands to the ATA channel. We wait for BSY to clear, then
3800 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
3801 * result. Determine what devices, if any, are on the channel
3802 * by looking at the device 0/1 error register. Look at the signature
3803 * stored in each device's taskfile registers, to determine if
3804 * the device is ATA or ATAPI.
3805 *
3806 * LOCKING:
3807 * PCI/etc. bus probe sem.
3808 * Obtains host lock.
3809 *
3810 * SIDE EFFECTS:
3811 * Sets ATA_FLAG_DISABLED if bus reset fails.
3812 */
3813
3814 void ata_bus_reset(struct ata_port *ap)
3815 {
3816 struct ata_device *device = ap->link.device;
3817 struct ata_ioports *ioaddr = &ap->ioaddr;
3818 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3819 u8 err;
3820 unsigned int dev0, dev1 = 0, devmask = 0;
3821 int rc;
3822
3823 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
3824
3825 /* determine if device 0/1 are present */
3826 if (ap->flags & ATA_FLAG_SATA_RESET)
3827 dev0 = 1;
3828 else {
3829 dev0 = ata_devchk(ap, 0);
3830 if (slave_possible)
3831 dev1 = ata_devchk(ap, 1);
3832 }
3833
3834 if (dev0)
3835 devmask |= (1 << 0);
3836 if (dev1)
3837 devmask |= (1 << 1);
3838
3839 /* select device 0 again */
3840 ap->ops->dev_select(ap, 0);
3841
3842 /* issue bus reset */
3843 if (ap->flags & ATA_FLAG_SRST) {
3844 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
3845 if (rc && rc != -ENODEV)
3846 goto err_out;
3847 }
3848
3849 /*
3850 * determine by signature whether we have ATA or ATAPI devices
3851 */
3852 device[0].class = ata_dev_try_classify(&device[0], dev0, &err);
3853 if ((slave_possible) && (err != 0x81))
3854 device[1].class = ata_dev_try_classify(&device[1], dev1, &err);
3855
3856 /* is double-select really necessary? */
3857 if (device[1].class != ATA_DEV_NONE)
3858 ap->ops->dev_select(ap, 1);
3859 if (device[0].class != ATA_DEV_NONE)
3860 ap->ops->dev_select(ap, 0);
3861
3862 /* if no devices were detected, disable this port */
3863 if ((device[0].class == ATA_DEV_NONE) &&
3864 (device[1].class == ATA_DEV_NONE))
3865 goto err_out;
3866
3867 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
3868 /* set up device control for ATA_FLAG_SATA_RESET */
3869 iowrite8(ap->ctl, ioaddr->ctl_addr);
3870 }
3871
3872 DPRINTK("EXIT\n");
3873 return;
3874
3875 err_out:
3876 ata_port_printk(ap, KERN_ERR, "disabling port\n");
3877 ata_port_disable(ap);
3878
3879 DPRINTK("EXIT\n");
3880 }
3881
3882 /**
3883 * sata_link_debounce - debounce SATA phy status
3884 * @link: ATA link to debounce SATA phy status for
3885 * @params: timing parameters { interval, duratinon, timeout } in msec
3886 * @deadline: deadline jiffies for the operation
3887 *
3888 * Make sure SStatus of @link reaches stable state, determined by
3889 * holding the same value where DET is not 1 for @duration polled
3890 * every @interval, before @timeout. Timeout constraints the
3891 * beginning of the stable state. Because DET gets stuck at 1 on
3892 * some controllers after hot unplugging, this functions waits
3893 * until timeout then returns 0 if DET is stable at 1.
3894 *
3895 * @timeout is further limited by @deadline. The sooner of the
3896 * two is used.
3897 *
3898 * LOCKING:
3899 * Kernel thread context (may sleep)
3900 *
3901 * RETURNS:
3902 * 0 on success, -errno on failure.
3903 */
3904 int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3905 unsigned long deadline)
3906 {
3907 unsigned long interval_msec = params[0];
3908 unsigned long duration = msecs_to_jiffies(params[1]);
3909 unsigned long last_jiffies, t;
3910 u32 last, cur;
3911 int rc;
3912
3913 t = jiffies + msecs_to_jiffies(params[2]);
3914 if (time_before(t, deadline))
3915 deadline = t;
3916
3917 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3918 return rc;
3919 cur &= 0xf;
3920
3921 last = cur;
3922 last_jiffies = jiffies;
3923
3924 while (1) {
3925 msleep(interval_msec);
3926 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3927 return rc;
3928 cur &= 0xf;
3929
3930 /* DET stable? */
3931 if (cur == last) {
3932 if (cur == 1 && time_before(jiffies, deadline))
3933 continue;
3934 if (time_after(jiffies, last_jiffies + duration))
3935 return 0;
3936 continue;
3937 }
3938
3939 /* unstable, start over */
3940 last = cur;
3941 last_jiffies = jiffies;
3942
3943 /* Check deadline. If debouncing failed, return
3944 * -EPIPE to tell upper layer to lower link speed.
3945 */
3946 if (time_after(jiffies, deadline))
3947 return -EPIPE;
3948 }
3949 }
3950
3951 /**
3952 * sata_link_resume - resume SATA link
3953 * @link: ATA link to resume SATA
3954 * @params: timing parameters { interval, duratinon, timeout } in msec
3955 * @deadline: deadline jiffies for the operation
3956 *
3957 * Resume SATA phy @link and debounce it.
3958 *
3959 * LOCKING:
3960 * Kernel thread context (may sleep)
3961 *
3962 * RETURNS:
3963 * 0 on success, -errno on failure.
3964 */
3965 int sata_link_resume(struct ata_link *link, const unsigned long *params,
3966 unsigned long deadline)
3967 {
3968 u32 scontrol;
3969 int rc;
3970
3971 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3972 return rc;
3973
3974 scontrol = (scontrol & 0x0f0) | 0x300;
3975
3976 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3977 return rc;
3978
3979 /* Some PHYs react badly if SStatus is pounded immediately
3980 * after resuming. Delay 200ms before debouncing.
3981 */
3982 msleep(200);
3983
3984 return sata_link_debounce(link, params, deadline);
3985 }
3986
3987 /**
3988 * ata_std_prereset - prepare for reset
3989 * @link: ATA link to be reset
3990 * @deadline: deadline jiffies for the operation
3991 *
3992 * @link is about to be reset. Initialize it. Failure from
3993 * prereset makes libata abort whole reset sequence and give up
3994 * that port, so prereset should be best-effort. It does its
3995 * best to prepare for reset sequence but if things go wrong, it
3996 * should just whine, not fail.
3997 *
3998 * LOCKING:
3999 * Kernel thread context (may sleep)
4000 *
4001 * RETURNS:
4002 * 0 on success, -errno otherwise.
4003 */
4004 int ata_std_prereset(struct ata_link *link, unsigned long deadline)
4005 {
4006 struct ata_port *ap = link->ap;
4007 struct ata_eh_context *ehc = &link->eh_context;
4008 const unsigned long *timing = sata_ehc_deb_timing(ehc);
4009 int rc;
4010
4011 /* if we're about to do hardreset, nothing more to do */
4012 if (ehc->i.action & ATA_EH_HARDRESET)
4013 return 0;
4014
4015 /* if SATA, resume link */
4016 if (ap->flags & ATA_FLAG_SATA) {
4017 rc = sata_link_resume(link, timing, deadline);
4018 /* whine about phy resume failure but proceed */
4019 if (rc && rc != -EOPNOTSUPP)
4020 ata_link_printk(link, KERN_WARNING, "failed to resume "
4021 "link for reset (errno=%d)\n", rc);
4022 }
4023
4024 /* wait for !BSY if we don't know that no device is attached */
4025 if (!ata_link_offline(link)) {
4026 rc = ata_wait_ready(ap, deadline);
4027 if (rc && rc != -ENODEV) {
4028 ata_link_printk(link, KERN_WARNING, "device not ready "
4029 "(errno=%d), forcing hardreset\n", rc);
4030 ehc->i.action |= ATA_EH_HARDRESET;
4031 }
4032 }
4033
4034 return 0;
4035 }
4036
4037 /**
4038 * ata_std_softreset - reset host port via ATA SRST
4039 * @link: ATA link to reset
4040 * @classes: resulting classes of attached devices
4041 * @deadline: deadline jiffies for the operation
4042 *
4043 * Reset host port using ATA SRST.
4044 *
4045 * LOCKING:
4046 * Kernel thread context (may sleep)
4047 *
4048 * RETURNS:
4049 * 0 on success, -errno otherwise.
4050 */
4051 int ata_std_softreset(struct ata_link *link, unsigned int *classes,
4052 unsigned long deadline)
4053 {
4054 struct ata_port *ap = link->ap;
4055 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
4056 unsigned int devmask = 0;
4057 int rc;
4058 u8 err;
4059
4060 DPRINTK("ENTER\n");
4061
4062 if (ata_link_offline(link)) {
4063 classes[0] = ATA_DEV_NONE;
4064 goto out;
4065 }
4066
4067 /* determine if device 0/1 are present */
4068 if (ata_devchk(ap, 0))
4069 devmask |= (1 << 0);
4070 if (slave_possible && ata_devchk(ap, 1))
4071 devmask |= (1 << 1);
4072
4073 /* select device 0 again */
4074 ap->ops->dev_select(ap, 0);
4075
4076 /* issue bus reset */
4077 DPRINTK("about to softreset, devmask=%x\n", devmask);
4078 rc = ata_bus_softreset(ap, devmask, deadline);
4079 /* if link is occupied, -ENODEV too is an error */
4080 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
4081 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
4082 return rc;
4083 }
4084
4085 /* determine by signature whether we have ATA or ATAPI devices */
4086 classes[0] = ata_dev_try_classify(&link->device[0],
4087 devmask & (1 << 0), &err);
4088 if (slave_possible && err != 0x81)
4089 classes[1] = ata_dev_try_classify(&link->device[1],
4090 devmask & (1 << 1), &err);
4091
4092 out:
4093 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
4094 return 0;
4095 }
4096
4097 /**
4098 * sata_link_hardreset - reset link via SATA phy reset
4099 * @link: link to reset
4100 * @timing: timing parameters { interval, duratinon, timeout } in msec
4101 * @deadline: deadline jiffies for the operation
4102 *
4103 * SATA phy-reset @link using DET bits of SControl register.
4104 *
4105 * LOCKING:
4106 * Kernel thread context (may sleep)
4107 *
4108 * RETURNS:
4109 * 0 on success, -errno otherwise.
4110 */
4111 int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
4112 unsigned long deadline)
4113 {
4114 u32 scontrol;
4115 int rc;
4116
4117 DPRINTK("ENTER\n");
4118
4119 if (sata_set_spd_needed(link)) {
4120 /* SATA spec says nothing about how to reconfigure
4121 * spd. To be on the safe side, turn off phy during
4122 * reconfiguration. This works for at least ICH7 AHCI
4123 * and Sil3124.
4124 */
4125 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
4126 goto out;
4127
4128 scontrol = (scontrol & 0x0f0) | 0x304;
4129
4130 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
4131 goto out;
4132
4133 sata_set_spd(link);
4134 }
4135
4136 /* issue phy wake/reset */
4137 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
4138 goto out;
4139
4140 scontrol = (scontrol & 0x0f0) | 0x301;
4141
4142 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
4143 goto out;
4144
4145 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
4146 * 10.4.2 says at least 1 ms.
4147 */
4148 msleep(1);
4149
4150 /* bring link back */
4151 rc = sata_link_resume(link, timing, deadline);
4152 out:
4153 DPRINTK("EXIT, rc=%d\n", rc);
4154 return rc;
4155 }
4156
4157 /**
4158 * sata_std_hardreset - reset host port via SATA phy reset
4159 * @link: link to reset
4160 * @class: resulting class of attached device
4161 * @deadline: deadline jiffies for the operation
4162 *
4163 * SATA phy-reset host port using DET bits of SControl register,
4164 * wait for !BSY and classify the attached device.
4165 *
4166 * LOCKING:
4167 * Kernel thread context (may sleep)
4168 *
4169 * RETURNS:
4170 * 0 on success, -errno otherwise.
4171 */
4172 int sata_std_hardreset(struct ata_link *link, unsigned int *class,
4173 unsigned long deadline)
4174 {
4175 struct ata_port *ap = link->ap;
4176 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
4177 int rc;
4178
4179 DPRINTK("ENTER\n");
4180
4181 /* do hardreset */
4182 rc = sata_link_hardreset(link, timing, deadline);
4183 if (rc) {
4184 ata_link_printk(link, KERN_ERR,
4185 "COMRESET failed (errno=%d)\n", rc);
4186 return rc;
4187 }
4188
4189 /* TODO: phy layer with polling, timeouts, etc. */
4190 if (ata_link_offline(link)) {
4191 *class = ATA_DEV_NONE;
4192 DPRINTK("EXIT, link offline\n");
4193 return 0;
4194 }
4195
4196 /* wait a while before checking status */
4197 ata_wait_after_reset(ap, deadline);
4198
4199 /* If PMP is supported, we have to do follow-up SRST. Note
4200 * that some PMPs don't send D2H Reg FIS after hardreset at
4201 * all if the first port is empty. Wait for it just for a
4202 * second and request follow-up SRST.
4203 */
4204 if (ap->flags & ATA_FLAG_PMP) {
4205 ata_wait_ready(ap, jiffies + HZ);
4206 return -EAGAIN;
4207 }
4208
4209 rc = ata_wait_ready(ap, deadline);
4210 /* link occupied, -ENODEV too is an error */
4211 if (rc) {
4212 ata_link_printk(link, KERN_ERR,
4213 "COMRESET failed (errno=%d)\n", rc);
4214 return rc;
4215 }
4216
4217 ap->ops->dev_select(ap, 0); /* probably unnecessary */
4218
4219 *class = ata_dev_try_classify(link->device, 1, NULL);
4220
4221 DPRINTK("EXIT, class=%u\n", *class);
4222 return 0;
4223 }
4224
4225 /**
4226 * ata_std_postreset - standard postreset callback
4227 * @link: the target ata_link
4228 * @classes: classes of attached devices
4229 *
4230 * This function is invoked after a successful reset. Note that
4231 * the device might have been reset more than once using
4232 * different reset methods before postreset is invoked.
4233 *
4234 * LOCKING:
4235 * Kernel thread context (may sleep)
4236 */
4237 void ata_std_postreset(struct ata_link *link, unsigned int *classes)
4238 {
4239 struct ata_port *ap = link->ap;
4240 u32 serror;
4241
4242 DPRINTK("ENTER\n");
4243
4244 /* print link status */
4245 sata_print_link_status(link);
4246
4247 /* clear SError */
4248 if (sata_scr_read(link, SCR_ERROR, &serror) == 0)
4249 sata_scr_write(link, SCR_ERROR, serror);
4250 link->eh_info.serror = 0;
4251
4252 /* is double-select really necessary? */
4253 if (classes[0] != ATA_DEV_NONE)
4254 ap->ops->dev_select(ap, 1);
4255 if (classes[1] != ATA_DEV_NONE)
4256 ap->ops->dev_select(ap, 0);
4257
4258 /* bail out if no device is present */
4259 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
4260 DPRINTK("EXIT, no device\n");
4261 return;
4262 }
4263
4264 /* set up device control */
4265 if (ap->ioaddr.ctl_addr)
4266 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
4267
4268 DPRINTK("EXIT\n");
4269 }
4270
4271 /**
4272 * ata_dev_same_device - Determine whether new ID matches configured device
4273 * @dev: device to compare against
4274 * @new_class: class of the new device
4275 * @new_id: IDENTIFY page of the new device
4276 *
4277 * Compare @new_class and @new_id against @dev and determine
4278 * whether @dev is the device indicated by @new_class and
4279 * @new_id.
4280 *
4281 * LOCKING:
4282 * None.
4283 *
4284 * RETURNS:
4285 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
4286 */
4287 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
4288 const u16 *new_id)
4289 {
4290 const u16 *old_id = dev->id;
4291 unsigned char model[2][ATA_ID_PROD_LEN + 1];
4292 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
4293
4294 if (dev->class != new_class) {
4295 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
4296 dev->class, new_class);
4297 return 0;
4298 }
4299
4300 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
4301 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
4302 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
4303 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
4304
4305 if (strcmp(model[0], model[1])) {
4306 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
4307 "'%s' != '%s'\n", model[0], model[1]);
4308 return 0;
4309 }
4310
4311 if (strcmp(serial[0], serial[1])) {
4312 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
4313 "'%s' != '%s'\n", serial[0], serial[1]);
4314 return 0;
4315 }
4316
4317 return 1;
4318 }
4319
4320 /**
4321 * ata_dev_reread_id - Re-read IDENTIFY data
4322 * @dev: target ATA device
4323 * @readid_flags: read ID flags
4324 *
4325 * Re-read IDENTIFY page and make sure @dev is still attached to
4326 * the port.
4327 *
4328 * LOCKING:
4329 * Kernel thread context (may sleep)
4330 *
4331 * RETURNS:
4332 * 0 on success, negative errno otherwise
4333 */
4334 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
4335 {
4336 unsigned int class = dev->class;
4337 u16 *id = (void *)dev->link->ap->sector_buf;
4338 int rc;
4339
4340 /* read ID data */
4341 rc = ata_dev_read_id(dev, &class, readid_flags, id);
4342 if (rc)
4343 return rc;
4344
4345 /* is the device still there? */
4346 if (!ata_dev_same_device(dev, class, id))
4347 return -ENODEV;
4348
4349 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
4350 return 0;
4351 }
4352
4353 /**
4354 * ata_dev_revalidate - Revalidate ATA device
4355 * @dev: device to revalidate
4356 * @new_class: new class code
4357 * @readid_flags: read ID flags
4358 *
4359 * Re-read IDENTIFY page, make sure @dev is still attached to the
4360 * port and reconfigure it according to the new IDENTIFY page.
4361 *
4362 * LOCKING:
4363 * Kernel thread context (may sleep)
4364 *
4365 * RETURNS:
4366 * 0 on success, negative errno otherwise
4367 */
4368 int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
4369 unsigned int readid_flags)
4370 {
4371 u64 n_sectors = dev->n_sectors;
4372 int rc;
4373
4374 if (!ata_dev_enabled(dev))
4375 return -ENODEV;
4376
4377 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
4378 if (ata_class_enabled(new_class) &&
4379 new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) {
4380 ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n",
4381 dev->class, new_class);
4382 rc = -ENODEV;
4383 goto fail;
4384 }
4385
4386 /* re-read ID */
4387 rc = ata_dev_reread_id(dev, readid_flags);
4388 if (rc)
4389 goto fail;
4390
4391 /* configure device according to the new ID */
4392 rc = ata_dev_configure(dev);
4393 if (rc)
4394 goto fail;
4395
4396 /* verify n_sectors hasn't changed */
4397 if (dev->class == ATA_DEV_ATA && n_sectors &&
4398 dev->n_sectors != n_sectors) {
4399 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
4400 "%llu != %llu\n",
4401 (unsigned long long)n_sectors,
4402 (unsigned long long)dev->n_sectors);
4403
4404 /* restore original n_sectors */
4405 dev->n_sectors = n_sectors;
4406
4407 rc = -ENODEV;
4408 goto fail;
4409 }
4410
4411 return 0;
4412
4413 fail:
4414 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
4415 return rc;
4416 }
4417
4418 struct ata_blacklist_entry {
4419 const char *model_num;
4420 const char *model_rev;
4421 unsigned long horkage;
4422 };
4423
4424 static const struct ata_blacklist_entry ata_device_blacklist [] = {
4425 /* Devices with DMA related problems under Linux */
4426 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
4427 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
4428 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
4429 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
4430 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
4431 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
4432 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
4433 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
4434 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
4435 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
4436 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
4437 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
4438 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
4439 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
4440 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
4441 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
4442 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
4443 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
4444 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
4445 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
4446 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
4447 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
4448 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
4449 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
4450 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
4451 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
4452 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
4453 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
4454 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
4455 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
4456 /* Odd clown on sil3726/4726 PMPs */
4457 { "Config Disk", NULL, ATA_HORKAGE_NODMA |
4458 ATA_HORKAGE_SKIP_PM },
4459
4460 /* Weird ATAPI devices */
4461 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
4462
4463 /* Devices we expect to fail diagnostics */
4464
4465 /* Devices where NCQ should be avoided */
4466 /* NCQ is slow */
4467 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
4468 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
4469 /* http://thread.gmane.org/gmane.linux.ide/14907 */
4470 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
4471 /* NCQ is broken */
4472 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
4473 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
4474 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
4475 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ },
4476
4477 /* Blacklist entries taken from Silicon Image 3124/3132
4478 Windows driver .inf file - also several Linux problem reports */
4479 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
4480 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4481 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
4482
4483 /* devices which puke on READ_NATIVE_MAX */
4484 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4485 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
4486 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4487 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
4488
4489 /* Devices which report 1 sector over size HPA */
4490 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4491 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
4492 { "ST310211A", NULL, ATA_HORKAGE_HPA_SIZE, },
4493
4494 /* Devices which get the IVB wrong */
4495 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
4496 { "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, },
4497 { "TSSTcorp CDDVDW SH-S202J", "SB01", ATA_HORKAGE_IVB, },
4498 { "TSSTcorp CDDVDW SH-S202N", "SB00", ATA_HORKAGE_IVB, },
4499 { "TSSTcorp CDDVDW SH-S202N", "SB01", ATA_HORKAGE_IVB, },
4500
4501 /* End Marker */
4502 { }
4503 };
4504
4505 static int strn_pattern_cmp(const char *patt, const char *name, int wildchar)
4506 {
4507 const char *p;
4508 int len;
4509
4510 /*
4511 * check for trailing wildcard: *\0
4512 */
4513 p = strchr(patt, wildchar);
4514 if (p && ((*(p + 1)) == 0))
4515 len = p - patt;
4516 else {
4517 len = strlen(name);
4518 if (!len) {
4519 if (!*patt)
4520 return 0;
4521 return -1;
4522 }
4523 }
4524
4525 return strncmp(patt, name, len);
4526 }
4527
4528 static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
4529 {
4530 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4531 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
4532 const struct ata_blacklist_entry *ad = ata_device_blacklist;
4533
4534 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4535 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
4536
4537 while (ad->model_num) {
4538 if (!strn_pattern_cmp(ad->model_num, model_num, '*')) {
4539 if (ad->model_rev == NULL)
4540 return ad->horkage;
4541 if (!strn_pattern_cmp(ad->model_rev, model_rev, '*'))
4542 return ad->horkage;
4543 }
4544 ad++;
4545 }
4546 return 0;
4547 }
4548
4549 static int ata_dma_blacklisted(const struct ata_device *dev)
4550 {
4551 /* We don't support polling DMA.
4552 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4553 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4554 */
4555 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
4556 (dev->flags & ATA_DFLAG_CDB_INTR))
4557 return 1;
4558 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
4559 }
4560
4561 /**
4562 * ata_is_40wire - check drive side detection
4563 * @dev: device
4564 *
4565 * Perform drive side detection decoding, allowing for device vendors
4566 * who can't follow the documentation.
4567 */
4568
4569 static int ata_is_40wire(struct ata_device *dev)
4570 {
4571 if (dev->horkage & ATA_HORKAGE_IVB)
4572 return ata_drive_40wire_relaxed(dev->id);
4573 return ata_drive_40wire(dev->id);
4574 }
4575
4576 /**
4577 * ata_dev_xfermask - Compute supported xfermask of the given device
4578 * @dev: Device to compute xfermask for
4579 *
4580 * Compute supported xfermask of @dev and store it in
4581 * dev->*_mask. This function is responsible for applying all
4582 * known limits including host controller limits, device
4583 * blacklist, etc...
4584 *
4585 * LOCKING:
4586 * None.
4587 */
4588 static void ata_dev_xfermask(struct ata_device *dev)
4589 {
4590 struct ata_link *link = dev->link;
4591 struct ata_port *ap = link->ap;
4592 struct ata_host *host = ap->host;
4593 unsigned long xfer_mask;
4594
4595 /* controller modes available */
4596 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4597 ap->mwdma_mask, ap->udma_mask);
4598
4599 /* drive modes available */
4600 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4601 dev->mwdma_mask, dev->udma_mask);
4602 xfer_mask &= ata_id_xfermask(dev->id);
4603
4604 /*
4605 * CFA Advanced TrueIDE timings are not allowed on a shared
4606 * cable
4607 */
4608 if (ata_dev_pair(dev)) {
4609 /* No PIO5 or PIO6 */
4610 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4611 /* No MWDMA3 or MWDMA 4 */
4612 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4613 }
4614
4615 if (ata_dma_blacklisted(dev)) {
4616 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
4617 ata_dev_printk(dev, KERN_WARNING,
4618 "device is on DMA blacklist, disabling DMA\n");
4619 }
4620
4621 if ((host->flags & ATA_HOST_SIMPLEX) &&
4622 host->simplex_claimed && host->simplex_claimed != ap) {
4623 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
4624 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
4625 "other device, disabling DMA\n");
4626 }
4627
4628 if (ap->flags & ATA_FLAG_NO_IORDY)
4629 xfer_mask &= ata_pio_mask_no_iordy(dev);
4630
4631 if (ap->ops->mode_filter)
4632 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
4633
4634 /* Apply cable rule here. Don't apply it early because when
4635 * we handle hot plug the cable type can itself change.
4636 * Check this last so that we know if the transfer rate was
4637 * solely limited by the cable.
4638 * Unknown or 80 wire cables reported host side are checked
4639 * drive side as well. Cases where we know a 40wire cable
4640 * is used safely for 80 are not checked here.
4641 */
4642 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4643 /* UDMA/44 or higher would be available */
4644 if ((ap->cbl == ATA_CBL_PATA40) ||
4645 (ata_is_40wire(dev) &&
4646 (ap->cbl == ATA_CBL_PATA_UNK ||
4647 ap->cbl == ATA_CBL_PATA80))) {
4648 ata_dev_printk(dev, KERN_WARNING,
4649 "limited to UDMA/33 due to 40-wire cable\n");
4650 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4651 }
4652
4653 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4654 &dev->mwdma_mask, &dev->udma_mask);
4655 }
4656
4657 /**
4658 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
4659 * @dev: Device to which command will be sent
4660 *
4661 * Issue SET FEATURES - XFER MODE command to device @dev
4662 * on port @ap.
4663 *
4664 * LOCKING:
4665 * PCI/etc. bus probe sem.
4666 *
4667 * RETURNS:
4668 * 0 on success, AC_ERR_* mask otherwise.
4669 */
4670
4671 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
4672 {
4673 struct ata_taskfile tf;
4674 unsigned int err_mask;
4675
4676 /* set up set-features taskfile */
4677 DPRINTK("set features - xfer mode\n");
4678
4679 /* Some controllers and ATAPI devices show flaky interrupt
4680 * behavior after setting xfer mode. Use polling instead.
4681 */
4682 ata_tf_init(dev, &tf);
4683 tf.command = ATA_CMD_SET_FEATURES;
4684 tf.feature = SETFEATURES_XFER;
4685 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
4686 tf.protocol = ATA_PROT_NODATA;
4687 /* If we are using IORDY we must send the mode setting command */
4688 if (ata_pio_need_iordy(dev))
4689 tf.nsect = dev->xfer_mode;
4690 /* If the device has IORDY and the controller does not - turn it off */
4691 else if (ata_id_has_iordy(dev->id))
4692 tf.nsect = 0x01;
4693 else /* In the ancient relic department - skip all of this */
4694 return 0;
4695
4696 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4697
4698 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4699 return err_mask;
4700 }
4701 /**
4702 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
4703 * @dev: Device to which command will be sent
4704 * @enable: Whether to enable or disable the feature
4705 * @feature: The sector count represents the feature to set
4706 *
4707 * Issue SET FEATURES - SATA FEATURES command to device @dev
4708 * on port @ap with sector count
4709 *
4710 * LOCKING:
4711 * PCI/etc. bus probe sem.
4712 *
4713 * RETURNS:
4714 * 0 on success, AC_ERR_* mask otherwise.
4715 */
4716 static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable,
4717 u8 feature)
4718 {
4719 struct ata_taskfile tf;
4720 unsigned int err_mask;
4721
4722 /* set up set-features taskfile */
4723 DPRINTK("set features - SATA features\n");
4724
4725 ata_tf_init(dev, &tf);
4726 tf.command = ATA_CMD_SET_FEATURES;
4727 tf.feature = enable;
4728 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4729 tf.protocol = ATA_PROT_NODATA;
4730 tf.nsect = feature;
4731
4732 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4733
4734 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4735 return err_mask;
4736 }
4737
4738 /**
4739 * ata_dev_init_params - Issue INIT DEV PARAMS command
4740 * @dev: Device to which command will be sent
4741 * @heads: Number of heads (taskfile parameter)
4742 * @sectors: Number of sectors (taskfile parameter)
4743 *
4744 * LOCKING:
4745 * Kernel thread context (may sleep)
4746 *
4747 * RETURNS:
4748 * 0 on success, AC_ERR_* mask otherwise.
4749 */
4750 static unsigned int ata_dev_init_params(struct ata_device *dev,
4751 u16 heads, u16 sectors)
4752 {
4753 struct ata_taskfile tf;
4754 unsigned int err_mask;
4755
4756 /* Number of sectors per track 1-255. Number of heads 1-16 */
4757 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
4758 return AC_ERR_INVALID;
4759
4760 /* set up init dev params taskfile */
4761 DPRINTK("init dev params \n");
4762
4763 ata_tf_init(dev, &tf);
4764 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4765 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4766 tf.protocol = ATA_PROT_NODATA;
4767 tf.nsect = sectors;
4768 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
4769
4770 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4771 /* A clean abort indicates an original or just out of spec drive
4772 and we should continue as we issue the setup based on the
4773 drive reported working geometry */
4774 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4775 err_mask = 0;
4776
4777 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4778 return err_mask;
4779 }
4780
4781 /**
4782 * ata_sg_clean - Unmap DMA memory associated with command
4783 * @qc: Command containing DMA memory to be released
4784 *
4785 * Unmap all mapped DMA memory associated with this command.
4786 *
4787 * LOCKING:
4788 * spin_lock_irqsave(host lock)
4789 */
4790 void ata_sg_clean(struct ata_queued_cmd *qc)
4791 {
4792 struct ata_port *ap = qc->ap;
4793 struct scatterlist *sg = qc->sg;
4794 int dir = qc->dma_dir;
4795
4796 WARN_ON(sg == NULL);
4797
4798 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
4799
4800 if (qc->n_elem)
4801 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
4802
4803 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4804 qc->sg = NULL;
4805 }
4806
4807 /**
4808 * ata_fill_sg - Fill PCI IDE PRD table
4809 * @qc: Metadata associated with taskfile to be transferred
4810 *
4811 * Fill PCI IDE PRD (scatter-gather) table with segments
4812 * associated with the current disk command.
4813 *
4814 * LOCKING:
4815 * spin_lock_irqsave(host lock)
4816 *
4817 */
4818 static void ata_fill_sg(struct ata_queued_cmd *qc)
4819 {
4820 struct ata_port *ap = qc->ap;
4821 struct scatterlist *sg;
4822 unsigned int si, pi;
4823
4824 pi = 0;
4825 for_each_sg(qc->sg, sg, qc->n_elem, si) {
4826 u32 addr, offset;
4827 u32 sg_len, len;
4828
4829 /* determine if physical DMA addr spans 64K boundary.
4830 * Note h/w doesn't support 64-bit, so we unconditionally
4831 * truncate dma_addr_t to u32.
4832 */
4833 addr = (u32) sg_dma_address(sg);
4834 sg_len = sg_dma_len(sg);
4835
4836 while (sg_len) {
4837 offset = addr & 0xffff;
4838 len = sg_len;
4839 if ((offset + sg_len) > 0x10000)
4840 len = 0x10000 - offset;
4841
4842 ap->prd[pi].addr = cpu_to_le32(addr);
4843 ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff);
4844 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
4845
4846 pi++;
4847 sg_len -= len;
4848 addr += len;
4849 }
4850 }
4851
4852 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4853 }
4854
4855 /**
4856 * ata_fill_sg_dumb - Fill PCI IDE PRD table
4857 * @qc: Metadata associated with taskfile to be transferred
4858 *
4859 * Fill PCI IDE PRD (scatter-gather) table with segments
4860 * associated with the current disk command. Perform the fill
4861 * so that we avoid writing any length 64K records for
4862 * controllers that don't follow the spec.
4863 *
4864 * LOCKING:
4865 * spin_lock_irqsave(host lock)
4866 *
4867 */
4868 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
4869 {
4870 struct ata_port *ap = qc->ap;
4871 struct scatterlist *sg;
4872 unsigned int si, pi;
4873
4874 pi = 0;
4875 for_each_sg(qc->sg, sg, qc->n_elem, si) {
4876 u32 addr, offset;
4877 u32 sg_len, len, blen;
4878
4879 /* determine if physical DMA addr spans 64K boundary.
4880 * Note h/w doesn't support 64-bit, so we unconditionally
4881 * truncate dma_addr_t to u32.
4882 */
4883 addr = (u32) sg_dma_address(sg);
4884 sg_len = sg_dma_len(sg);
4885
4886 while (sg_len) {
4887 offset = addr & 0xffff;
4888 len = sg_len;
4889 if ((offset + sg_len) > 0x10000)
4890 len = 0x10000 - offset;
4891
4892 blen = len & 0xffff;
4893 ap->prd[pi].addr = cpu_to_le32(addr);
4894 if (blen == 0) {
4895 /* Some PATA chipsets like the CS5530 can't
4896 cope with 0x0000 meaning 64K as the spec says */
4897 ap->prd[pi].flags_len = cpu_to_le32(0x8000);
4898 blen = 0x8000;
4899 ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000);
4900 }
4901 ap->prd[pi].flags_len = cpu_to_le32(blen);
4902 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
4903
4904 pi++;
4905 sg_len -= len;
4906 addr += len;
4907 }
4908 }
4909
4910 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4911 }
4912
4913 /**
4914 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
4915 * @qc: Metadata associated with taskfile to check
4916 *
4917 * Allow low-level driver to filter ATA PACKET commands, returning
4918 * a status indicating whether or not it is OK to use DMA for the
4919 * supplied PACKET command.
4920 *
4921 * LOCKING:
4922 * spin_lock_irqsave(host lock)
4923 *
4924 * RETURNS: 0 when ATAPI DMA can be used
4925 * nonzero otherwise
4926 */
4927 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
4928 {
4929 struct ata_port *ap = qc->ap;
4930
4931 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4932 * few ATAPI devices choke on such DMA requests.
4933 */
4934 if (unlikely(qc->nbytes & 15))
4935 return 1;
4936
4937 if (ap->ops->check_atapi_dma)
4938 return ap->ops->check_atapi_dma(qc);
4939
4940 return 0;
4941 }
4942
4943 /**
4944 * ata_std_qc_defer - Check whether a qc needs to be deferred
4945 * @qc: ATA command in question
4946 *
4947 * Non-NCQ commands cannot run with any other command, NCQ or
4948 * not. As upper layer only knows the queue depth, we are
4949 * responsible for maintaining exclusion. This function checks
4950 * whether a new command @qc can be issued.
4951 *
4952 * LOCKING:
4953 * spin_lock_irqsave(host lock)
4954 *
4955 * RETURNS:
4956 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4957 */
4958 int ata_std_qc_defer(struct ata_queued_cmd *qc)
4959 {
4960 struct ata_link *link = qc->dev->link;
4961
4962 if (qc->tf.protocol == ATA_PROT_NCQ) {
4963 if (!ata_tag_valid(link->active_tag))
4964 return 0;
4965 } else {
4966 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4967 return 0;
4968 }
4969
4970 return ATA_DEFER_LINK;
4971 }
4972
4973 /**
4974 * ata_qc_prep - Prepare taskfile for submission
4975 * @qc: Metadata associated with taskfile to be prepared
4976 *
4977 * Prepare ATA taskfile for submission.
4978 *
4979 * LOCKING:
4980 * spin_lock_irqsave(host lock)
4981 */
4982 void ata_qc_prep(struct ata_queued_cmd *qc)
4983 {
4984 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4985 return;
4986
4987 ata_fill_sg(qc);
4988 }
4989
4990 /**
4991 * ata_dumb_qc_prep - Prepare taskfile for submission
4992 * @qc: Metadata associated with taskfile to be prepared
4993 *
4994 * Prepare ATA taskfile for submission.
4995 *
4996 * LOCKING:
4997 * spin_lock_irqsave(host lock)
4998 */
4999 void ata_dumb_qc_prep(struct ata_queued_cmd *qc)
5000 {
5001 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
5002 return;
5003
5004 ata_fill_sg_dumb(qc);
5005 }
5006
5007 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
5008
5009 /**
5010 * ata_sg_init - Associate command with scatter-gather table.
5011 * @qc: Command to be associated
5012 * @sg: Scatter-gather table.
5013 * @n_elem: Number of elements in s/g table.
5014 *
5015 * Initialize the data-related elements of queued_cmd @qc
5016 * to point to a scatter-gather table @sg, containing @n_elem
5017 * elements.
5018 *
5019 * LOCKING:
5020 * spin_lock_irqsave(host lock)
5021 */
5022 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
5023 unsigned int n_elem)
5024 {
5025 qc->sg = sg;
5026 qc->n_elem = n_elem;
5027 qc->cursg = qc->sg;
5028 }
5029
5030 /**
5031 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
5032 * @qc: Command with scatter-gather table to be mapped.
5033 *
5034 * DMA-map the scatter-gather table associated with queued_cmd @qc.
5035 *
5036 * LOCKING:
5037 * spin_lock_irqsave(host lock)
5038 *
5039 * RETURNS:
5040 * Zero on success, negative on error.
5041 *
5042 */
5043 static int ata_sg_setup(struct ata_queued_cmd *qc)
5044 {
5045 struct ata_port *ap = qc->ap;
5046 unsigned int n_elem;
5047
5048 VPRINTK("ENTER, ata%u\n", ap->print_id);
5049
5050 n_elem = dma_map_sg(ap->dev, qc->sg, qc->n_elem, qc->dma_dir);
5051 if (n_elem < 1)
5052 return -1;
5053
5054 DPRINTK("%d sg elements mapped\n", n_elem);
5055
5056 qc->n_elem = n_elem;
5057 qc->flags |= ATA_QCFLAG_DMAMAP;
5058
5059 return 0;
5060 }
5061
5062 /**
5063 * swap_buf_le16 - swap halves of 16-bit words in place
5064 * @buf: Buffer to swap
5065 * @buf_words: Number of 16-bit words in buffer.
5066 *
5067 * Swap halves of 16-bit words if needed to convert from
5068 * little-endian byte order to native cpu byte order, or
5069 * vice-versa.
5070 *
5071 * LOCKING:
5072 * Inherited from caller.
5073 */
5074 void swap_buf_le16(u16 *buf, unsigned int buf_words)
5075 {
5076 #ifdef __BIG_ENDIAN
5077 unsigned int i;
5078
5079 for (i = 0; i < buf_words; i++)
5080 buf[i] = le16_to_cpu(buf[i]);
5081 #endif /* __BIG_ENDIAN */
5082 }
5083
5084 /**
5085 * ata_data_xfer - Transfer data by PIO
5086 * @dev: device to target
5087 * @buf: data buffer
5088 * @buflen: buffer length
5089 * @rw: read/write
5090 *
5091 * Transfer data from/to the device data register by PIO.
5092 *
5093 * LOCKING:
5094 * Inherited from caller.
5095 *
5096 * RETURNS:
5097 * Bytes consumed.
5098 */
5099 unsigned int ata_data_xfer(struct ata_device *dev, unsigned char *buf,
5100 unsigned int buflen, int rw)
5101 {
5102 struct ata_port *ap = dev->link->ap;
5103 void __iomem *data_addr = ap->ioaddr.data_addr;
5104 unsigned int words = buflen >> 1;
5105
5106 /* Transfer multiple of 2 bytes */
5107 if (rw == READ)
5108 ioread16_rep(data_addr, buf, words);
5109 else
5110 iowrite16_rep(data_addr, buf, words);
5111
5112 /* Transfer trailing 1 byte, if any. */
5113 if (unlikely(buflen & 0x01)) {
5114 __le16 align_buf[1] = { 0 };
5115 unsigned char *trailing_buf = buf + buflen - 1;
5116
5117 if (rw == READ) {
5118 align_buf[0] = cpu_to_le16(ioread16(data_addr));
5119 memcpy(trailing_buf, align_buf, 1);
5120 } else {
5121 memcpy(align_buf, trailing_buf, 1);
5122 iowrite16(le16_to_cpu(align_buf[0]), data_addr);
5123 }
5124 words++;
5125 }
5126
5127 return words << 1;
5128 }
5129
5130 /**
5131 * ata_data_xfer_noirq - Transfer data by PIO
5132 * @dev: device to target
5133 * @buf: data buffer
5134 * @buflen: buffer length
5135 * @rw: read/write
5136 *
5137 * Transfer data from/to the device data register by PIO. Do the
5138 * transfer with interrupts disabled.
5139 *
5140 * LOCKING:
5141 * Inherited from caller.
5142 *
5143 * RETURNS:
5144 * Bytes consumed.
5145 */
5146 unsigned int ata_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
5147 unsigned int buflen, int rw)
5148 {
5149 unsigned long flags;
5150 unsigned int consumed;
5151
5152 local_irq_save(flags);
5153 consumed = ata_data_xfer(dev, buf, buflen, rw);
5154 local_irq_restore(flags);
5155
5156 return consumed;
5157 }
5158
5159
5160 /**
5161 * ata_pio_sector - Transfer a sector of data.
5162 * @qc: Command on going
5163 *
5164 * Transfer qc->sect_size bytes of data from/to the ATA device.
5165 *
5166 * LOCKING:
5167 * Inherited from caller.
5168 */
5169
5170 static void ata_pio_sector(struct ata_queued_cmd *qc)
5171 {
5172 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
5173 struct ata_port *ap = qc->ap;
5174 struct page *page;
5175 unsigned int offset;
5176 unsigned char *buf;
5177
5178 if (qc->curbytes == qc->nbytes - qc->sect_size)
5179 ap->hsm_task_state = HSM_ST_LAST;
5180
5181 page = sg_page(qc->cursg);
5182 offset = qc->cursg->offset + qc->cursg_ofs;
5183
5184 /* get the current page and offset */
5185 page = nth_page(page, (offset >> PAGE_SHIFT));
5186 offset %= PAGE_SIZE;
5187
5188 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
5189
5190 if (PageHighMem(page)) {
5191 unsigned long flags;
5192
5193 /* FIXME: use a bounce buffer */
5194 local_irq_save(flags);
5195 buf = kmap_atomic(page, KM_IRQ0);
5196
5197 /* do the actual data transfer */
5198 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
5199
5200 kunmap_atomic(buf, KM_IRQ0);
5201 local_irq_restore(flags);
5202 } else {
5203 buf = page_address(page);
5204 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
5205 }
5206
5207 qc->curbytes += qc->sect_size;
5208 qc->cursg_ofs += qc->sect_size;
5209
5210 if (qc->cursg_ofs == qc->cursg->length) {
5211 qc->cursg = sg_next(qc->cursg);
5212 qc->cursg_ofs = 0;
5213 }
5214 }
5215
5216 /**
5217 * ata_pio_sectors - Transfer one or many sectors.
5218 * @qc: Command on going
5219 *
5220 * Transfer one or many sectors of data from/to the
5221 * ATA device for the DRQ request.
5222 *
5223 * LOCKING:
5224 * Inherited from caller.
5225 */
5226
5227 static void ata_pio_sectors(struct ata_queued_cmd *qc)
5228 {
5229 if (is_multi_taskfile(&qc->tf)) {
5230 /* READ/WRITE MULTIPLE */
5231 unsigned int nsect;
5232
5233 WARN_ON(qc->dev->multi_count == 0);
5234
5235 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
5236 qc->dev->multi_count);
5237 while (nsect--)
5238 ata_pio_sector(qc);
5239 } else
5240 ata_pio_sector(qc);
5241
5242 ata_altstatus(qc->ap); /* flush */
5243 }
5244
5245 /**
5246 * atapi_send_cdb - Write CDB bytes to hardware
5247 * @ap: Port to which ATAPI device is attached.
5248 * @qc: Taskfile currently active
5249 *
5250 * When device has indicated its readiness to accept
5251 * a CDB, this function is called. Send the CDB.
5252 *
5253 * LOCKING:
5254 * caller.
5255 */
5256
5257 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
5258 {
5259 /* send SCSI cdb */
5260 DPRINTK("send cdb\n");
5261 WARN_ON(qc->dev->cdb_len < 12);
5262
5263 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
5264 ata_altstatus(ap); /* flush */
5265
5266 switch (qc->tf.protocol) {
5267 case ATAPI_PROT_PIO:
5268 ap->hsm_task_state = HSM_ST;
5269 break;
5270 case ATAPI_PROT_NODATA:
5271 ap->hsm_task_state = HSM_ST_LAST;
5272 break;
5273 case ATAPI_PROT_DMA:
5274 ap->hsm_task_state = HSM_ST_LAST;
5275 /* initiate bmdma */
5276 ap->ops->bmdma_start(qc);
5277 break;
5278 }
5279 }
5280
5281 /**
5282 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
5283 * @qc: Command on going
5284 * @bytes: number of bytes
5285 *
5286 * Transfer Transfer data from/to the ATAPI device.
5287 *
5288 * LOCKING:
5289 * Inherited from caller.
5290 *
5291 */
5292 static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
5293 {
5294 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
5295 struct ata_port *ap = qc->ap;
5296 struct ata_device *dev = qc->dev;
5297 struct ata_eh_info *ehi = &dev->link->eh_info;
5298 struct scatterlist *sg;
5299 struct page *page;
5300 unsigned char *buf;
5301 unsigned int offset, count, consumed;
5302
5303 next_sg:
5304 sg = qc->cursg;
5305 if (unlikely(!sg)) {
5306 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
5307 "buf=%u cur=%u bytes=%u",
5308 qc->nbytes, qc->curbytes, bytes);
5309 return -1;
5310 }
5311
5312 page = sg_page(sg);
5313 offset = sg->offset + qc->cursg_ofs;
5314
5315 /* get the current page and offset */
5316 page = nth_page(page, (offset >> PAGE_SHIFT));
5317 offset %= PAGE_SIZE;
5318
5319 /* don't overrun current sg */
5320 count = min(sg->length - qc->cursg_ofs, bytes);
5321
5322 /* don't cross page boundaries */
5323 count = min(count, (unsigned int)PAGE_SIZE - offset);
5324
5325 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
5326
5327 if (PageHighMem(page)) {
5328 unsigned long flags;
5329
5330 /* FIXME: use bounce buffer */
5331 local_irq_save(flags);
5332 buf = kmap_atomic(page, KM_IRQ0);
5333
5334 /* do the actual data transfer */
5335 consumed = ap->ops->data_xfer(dev, buf + offset, count, rw);
5336
5337 kunmap_atomic(buf, KM_IRQ0);
5338 local_irq_restore(flags);
5339 } else {
5340 buf = page_address(page);
5341 consumed = ap->ops->data_xfer(dev, buf + offset, count, rw);
5342 }
5343
5344 bytes -= min(bytes, consumed);
5345 qc->curbytes += count;
5346 qc->cursg_ofs += count;
5347
5348 if (qc->cursg_ofs == sg->length) {
5349 qc->cursg = sg_next(qc->cursg);
5350 qc->cursg_ofs = 0;
5351 }
5352
5353 /* consumed can be larger than count only for the last transfer */
5354 WARN_ON(qc->cursg && count != consumed);
5355
5356 if (bytes)
5357 goto next_sg;
5358 return 0;
5359 }
5360
5361 /**
5362 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
5363 * @qc: Command on going
5364 *
5365 * Transfer Transfer data from/to the ATAPI device.
5366 *
5367 * LOCKING:
5368 * Inherited from caller.
5369 */
5370
5371 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
5372 {
5373 struct ata_port *ap = qc->ap;
5374 struct ata_device *dev = qc->dev;
5375 struct ata_eh_info *ehi = &dev->link->eh_info;
5376 unsigned int ireason, bc_lo, bc_hi, bytes;
5377 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
5378
5379 /* Abuse qc->result_tf for temp storage of intermediate TF
5380 * here to save some kernel stack usage.
5381 * For normal completion, qc->result_tf is not relevant. For
5382 * error, qc->result_tf is later overwritten by ata_qc_complete().
5383 * So, the correctness of qc->result_tf is not affected.
5384 */
5385 ap->ops->tf_read(ap, &qc->result_tf);
5386 ireason = qc->result_tf.nsect;
5387 bc_lo = qc->result_tf.lbam;
5388 bc_hi = qc->result_tf.lbah;
5389 bytes = (bc_hi << 8) | bc_lo;
5390
5391 /* shall be cleared to zero, indicating xfer of data */
5392 if (unlikely(ireason & (1 << 0)))
5393 goto atapi_check;
5394
5395 /* make sure transfer direction matches expected */
5396 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
5397 if (unlikely(do_write != i_write))
5398 goto atapi_check;
5399
5400 if (unlikely(!bytes))
5401 goto atapi_check;
5402
5403 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
5404
5405 if (unlikely(__atapi_pio_bytes(qc, bytes)))
5406 goto err_out;
5407 ata_altstatus(ap); /* flush */
5408
5409 return;
5410
5411 atapi_check:
5412 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
5413 ireason, bytes);
5414 err_out:
5415 qc->err_mask |= AC_ERR_HSM;
5416 ap->hsm_task_state = HSM_ST_ERR;
5417 }
5418
5419 /**
5420 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
5421 * @ap: the target ata_port
5422 * @qc: qc on going
5423 *
5424 * RETURNS:
5425 * 1 if ok in workqueue, 0 otherwise.
5426 */
5427
5428 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
5429 {
5430 if (qc->tf.flags & ATA_TFLAG_POLLING)
5431 return 1;
5432
5433 if (ap->hsm_task_state == HSM_ST_FIRST) {
5434 if (qc->tf.protocol == ATA_PROT_PIO &&
5435 (qc->tf.flags & ATA_TFLAG_WRITE))
5436 return 1;
5437
5438 if (ata_is_atapi(qc->tf.protocol) &&
5439 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5440 return 1;
5441 }
5442
5443 return 0;
5444 }
5445
5446 /**
5447 * ata_hsm_qc_complete - finish a qc running on standard HSM
5448 * @qc: Command to complete
5449 * @in_wq: 1 if called from workqueue, 0 otherwise
5450 *
5451 * Finish @qc which is running on standard HSM.
5452 *
5453 * LOCKING:
5454 * If @in_wq is zero, spin_lock_irqsave(host lock).
5455 * Otherwise, none on entry and grabs host lock.
5456 */
5457 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
5458 {
5459 struct ata_port *ap = qc->ap;
5460 unsigned long flags;
5461
5462 if (ap->ops->error_handler) {
5463 if (in_wq) {
5464 spin_lock_irqsave(ap->lock, flags);
5465
5466 /* EH might have kicked in while host lock is
5467 * released.
5468 */
5469 qc = ata_qc_from_tag(ap, qc->tag);
5470 if (qc) {
5471 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
5472 ap->ops->irq_on(ap);
5473 ata_qc_complete(qc);
5474 } else
5475 ata_port_freeze(ap);
5476 }
5477
5478 spin_unlock_irqrestore(ap->lock, flags);
5479 } else {
5480 if (likely(!(qc->err_mask & AC_ERR_HSM)))
5481 ata_qc_complete(qc);
5482 else
5483 ata_port_freeze(ap);
5484 }
5485 } else {
5486 if (in_wq) {
5487 spin_lock_irqsave(ap->lock, flags);
5488 ap->ops->irq_on(ap);
5489 ata_qc_complete(qc);
5490 spin_unlock_irqrestore(ap->lock, flags);
5491 } else
5492 ata_qc_complete(qc);
5493 }
5494 }
5495
5496 /**
5497 * ata_hsm_move - move the HSM to the next state.
5498 * @ap: the target ata_port
5499 * @qc: qc on going
5500 * @status: current device status
5501 * @in_wq: 1 if called from workqueue, 0 otherwise
5502 *
5503 * RETURNS:
5504 * 1 when poll next status needed, 0 otherwise.
5505 */
5506 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
5507 u8 status, int in_wq)
5508 {
5509 unsigned long flags = 0;
5510 int poll_next;
5511
5512 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
5513
5514 /* Make sure ata_qc_issue_prot() does not throw things
5515 * like DMA polling into the workqueue. Notice that
5516 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
5517 */
5518 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
5519
5520 fsm_start:
5521 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
5522 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
5523
5524 switch (ap->hsm_task_state) {
5525 case HSM_ST_FIRST:
5526 /* Send first data block or PACKET CDB */
5527
5528 /* If polling, we will stay in the work queue after
5529 * sending the data. Otherwise, interrupt handler
5530 * takes over after sending the data.
5531 */
5532 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
5533
5534 /* check device status */
5535 if (unlikely((status & ATA_DRQ) == 0)) {
5536 /* handle BSY=0, DRQ=0 as error */
5537 if (likely(status & (ATA_ERR | ATA_DF)))
5538 /* device stops HSM for abort/error */
5539 qc->err_mask |= AC_ERR_DEV;
5540 else
5541 /* HSM violation. Let EH handle this */
5542 qc->err_mask |= AC_ERR_HSM;
5543
5544 ap->hsm_task_state = HSM_ST_ERR;
5545 goto fsm_start;
5546 }
5547
5548 /* Device should not ask for data transfer (DRQ=1)
5549 * when it finds something wrong.
5550 * We ignore DRQ here and stop the HSM by
5551 * changing hsm_task_state to HSM_ST_ERR and
5552 * let the EH abort the command or reset the device.
5553 */
5554 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5555 /* Some ATAPI tape drives forget to clear the ERR bit
5556 * when doing the next command (mostly request sense).
5557 * We ignore ERR here to workaround and proceed sending
5558 * the CDB.
5559 */
5560 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
5561 ata_port_printk(ap, KERN_WARNING,
5562 "DRQ=1 with device error, "
5563 "dev_stat 0x%X\n", status);
5564 qc->err_mask |= AC_ERR_HSM;
5565 ap->hsm_task_state = HSM_ST_ERR;
5566 goto fsm_start;
5567 }
5568 }
5569
5570 /* Send the CDB (atapi) or the first data block (ata pio out).
5571 * During the state transition, interrupt handler shouldn't
5572 * be invoked before the data transfer is complete and
5573 * hsm_task_state is changed. Hence, the following locking.
5574 */
5575 if (in_wq)
5576 spin_lock_irqsave(ap->lock, flags);
5577
5578 if (qc->tf.protocol == ATA_PROT_PIO) {
5579 /* PIO data out protocol.
5580 * send first data block.
5581 */
5582
5583 /* ata_pio_sectors() might change the state
5584 * to HSM_ST_LAST. so, the state is changed here
5585 * before ata_pio_sectors().
5586 */
5587 ap->hsm_task_state = HSM_ST;
5588 ata_pio_sectors(qc);
5589 } else
5590 /* send CDB */
5591 atapi_send_cdb(ap, qc);
5592
5593 if (in_wq)
5594 spin_unlock_irqrestore(ap->lock, flags);
5595
5596 /* if polling, ata_pio_task() handles the rest.
5597 * otherwise, interrupt handler takes over from here.
5598 */
5599 break;
5600
5601 case HSM_ST:
5602 /* complete command or read/write the data register */
5603 if (qc->tf.protocol == ATAPI_PROT_PIO) {
5604 /* ATAPI PIO protocol */
5605 if ((status & ATA_DRQ) == 0) {
5606 /* No more data to transfer or device error.
5607 * Device error will be tagged in HSM_ST_LAST.
5608 */
5609 ap->hsm_task_state = HSM_ST_LAST;
5610 goto fsm_start;
5611 }
5612
5613 /* Device should not ask for data transfer (DRQ=1)
5614 * when it finds something wrong.
5615 * We ignore DRQ here and stop the HSM by
5616 * changing hsm_task_state to HSM_ST_ERR and
5617 * let the EH abort the command or reset the device.
5618 */
5619 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5620 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
5621 "device error, dev_stat 0x%X\n",
5622 status);
5623 qc->err_mask |= AC_ERR_HSM;
5624 ap->hsm_task_state = HSM_ST_ERR;
5625 goto fsm_start;
5626 }
5627
5628 atapi_pio_bytes(qc);
5629
5630 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
5631 /* bad ireason reported by device */
5632 goto fsm_start;
5633
5634 } else {
5635 /* ATA PIO protocol */
5636 if (unlikely((status & ATA_DRQ) == 0)) {
5637 /* handle BSY=0, DRQ=0 as error */
5638 if (likely(status & (ATA_ERR | ATA_DF)))
5639 /* device stops HSM for abort/error */
5640 qc->err_mask |= AC_ERR_DEV;
5641 else
5642 /* HSM violation. Let EH handle this.
5643 * Phantom devices also trigger this
5644 * condition. Mark hint.
5645 */
5646 qc->err_mask |= AC_ERR_HSM |
5647 AC_ERR_NODEV_HINT;
5648
5649 ap->hsm_task_state = HSM_ST_ERR;
5650 goto fsm_start;
5651 }
5652
5653 /* For PIO reads, some devices may ask for
5654 * data transfer (DRQ=1) alone with ERR=1.
5655 * We respect DRQ here and transfer one
5656 * block of junk data before changing the
5657 * hsm_task_state to HSM_ST_ERR.
5658 *
5659 * For PIO writes, ERR=1 DRQ=1 doesn't make
5660 * sense since the data block has been
5661 * transferred to the device.
5662 */
5663 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5664 /* data might be corrputed */
5665 qc->err_mask |= AC_ERR_DEV;
5666
5667 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
5668 ata_pio_sectors(qc);
5669 status = ata_wait_idle(ap);
5670 }
5671
5672 if (status & (ATA_BUSY | ATA_DRQ))
5673 qc->err_mask |= AC_ERR_HSM;
5674
5675 /* ata_pio_sectors() might change the
5676 * state to HSM_ST_LAST. so, the state
5677 * is changed after ata_pio_sectors().
5678 */
5679 ap->hsm_task_state = HSM_ST_ERR;
5680 goto fsm_start;
5681 }
5682
5683 ata_pio_sectors(qc);
5684
5685 if (ap->hsm_task_state == HSM_ST_LAST &&
5686 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
5687 /* all data read */
5688 status = ata_wait_idle(ap);
5689 goto fsm_start;
5690 }
5691 }
5692
5693 poll_next = 1;
5694 break;
5695
5696 case HSM_ST_LAST:
5697 if (unlikely(!ata_ok(status))) {
5698 qc->err_mask |= __ac_err_mask(status);
5699 ap->hsm_task_state = HSM_ST_ERR;
5700 goto fsm_start;
5701 }
5702
5703 /* no more data to transfer */
5704 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
5705 ap->print_id, qc->dev->devno, status);
5706
5707 WARN_ON(qc->err_mask);
5708
5709 ap->hsm_task_state = HSM_ST_IDLE;
5710
5711 /* complete taskfile transaction */
5712 ata_hsm_qc_complete(qc, in_wq);
5713
5714 poll_next = 0;
5715 break;
5716
5717 case HSM_ST_ERR:
5718 /* make sure qc->err_mask is available to
5719 * know what's wrong and recover
5720 */
5721 WARN_ON(qc->err_mask == 0);
5722
5723 ap->hsm_task_state = HSM_ST_IDLE;
5724
5725 /* complete taskfile transaction */
5726 ata_hsm_qc_complete(qc, in_wq);
5727
5728 poll_next = 0;
5729 break;
5730 default:
5731 poll_next = 0;
5732 BUG();
5733 }
5734
5735 return poll_next;
5736 }
5737
5738 static void ata_pio_task(struct work_struct *work)
5739 {
5740 struct ata_port *ap =
5741 container_of(work, struct ata_port, port_task.work);
5742 struct ata_queued_cmd *qc = ap->port_task_data;
5743 u8 status;
5744 int poll_next;
5745
5746 fsm_start:
5747 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
5748
5749 /*
5750 * This is purely heuristic. This is a fast path.
5751 * Sometimes when we enter, BSY will be cleared in
5752 * a chk-status or two. If not, the drive is probably seeking
5753 * or something. Snooze for a couple msecs, then
5754 * chk-status again. If still busy, queue delayed work.
5755 */
5756 status = ata_busy_wait(ap, ATA_BUSY, 5);
5757 if (status & ATA_BUSY) {
5758 msleep(2);
5759 status = ata_busy_wait(ap, ATA_BUSY, 10);
5760 if (status & ATA_BUSY) {
5761 ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE);
5762 return;
5763 }
5764 }
5765
5766 /* move the HSM */
5767 poll_next = ata_hsm_move(ap, qc, status, 1);
5768
5769 /* another command or interrupt handler
5770 * may be running at this point.
5771 */
5772 if (poll_next)
5773 goto fsm_start;
5774 }
5775
5776 /**
5777 * ata_qc_new - Request an available ATA command, for queueing
5778 * @ap: Port associated with device @dev
5779 * @dev: Device from whom we request an available command structure
5780 *
5781 * LOCKING:
5782 * None.
5783 */
5784
5785 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
5786 {
5787 struct ata_queued_cmd *qc = NULL;
5788 unsigned int i;
5789
5790 /* no command while frozen */
5791 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
5792 return NULL;
5793
5794 /* the last tag is reserved for internal command. */
5795 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
5796 if (!test_and_set_bit(i, &ap->qc_allocated)) {
5797 qc = __ata_qc_from_tag(ap, i);
5798 break;
5799 }
5800
5801 if (qc)
5802 qc->tag = i;
5803
5804 return qc;
5805 }
5806
5807 /**
5808 * ata_qc_new_init - Request an available ATA command, and initialize it
5809 * @dev: Device from whom we request an available command structure
5810 *
5811 * LOCKING:
5812 * None.
5813 */
5814
5815 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
5816 {
5817 struct ata_port *ap = dev->link->ap;
5818 struct ata_queued_cmd *qc;
5819
5820 qc = ata_qc_new(ap);
5821 if (qc) {
5822 qc->scsicmd = NULL;
5823 qc->ap = ap;
5824 qc->dev = dev;
5825
5826 ata_qc_reinit(qc);
5827 }
5828
5829 return qc;
5830 }
5831
5832 /**
5833 * ata_qc_free - free unused ata_queued_cmd
5834 * @qc: Command to complete
5835 *
5836 * Designed to free unused ata_queued_cmd object
5837 * in case something prevents using it.
5838 *
5839 * LOCKING:
5840 * spin_lock_irqsave(host lock)
5841 */
5842 void ata_qc_free(struct ata_queued_cmd *qc)
5843 {
5844 struct ata_port *ap = qc->ap;
5845 unsigned int tag;
5846
5847 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5848
5849 qc->flags = 0;
5850 tag = qc->tag;
5851 if (likely(ata_tag_valid(tag))) {
5852 qc->tag = ATA_TAG_POISON;
5853 clear_bit(tag, &ap->qc_allocated);
5854 }
5855 }
5856
5857 void __ata_qc_complete(struct ata_queued_cmd *qc)
5858 {
5859 struct ata_port *ap = qc->ap;
5860 struct ata_link *link = qc->dev->link;
5861
5862 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5863 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
5864
5865 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
5866 ata_sg_clean(qc);
5867
5868 /* command should be marked inactive atomically with qc completion */
5869 if (qc->tf.protocol == ATA_PROT_NCQ) {
5870 link->sactive &= ~(1 << qc->tag);
5871 if (!link->sactive)
5872 ap->nr_active_links--;
5873 } else {
5874 link->active_tag = ATA_TAG_POISON;
5875 ap->nr_active_links--;
5876 }
5877
5878 /* clear exclusive status */
5879 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
5880 ap->excl_link == link))
5881 ap->excl_link = NULL;
5882
5883 /* atapi: mark qc as inactive to prevent the interrupt handler
5884 * from completing the command twice later, before the error handler
5885 * is called. (when rc != 0 and atapi request sense is needed)
5886 */
5887 qc->flags &= ~ATA_QCFLAG_ACTIVE;
5888 ap->qc_active &= ~(1 << qc->tag);
5889
5890 /* call completion callback */
5891 qc->complete_fn(qc);
5892 }
5893
5894 static void fill_result_tf(struct ata_queued_cmd *qc)
5895 {
5896 struct ata_port *ap = qc->ap;
5897
5898 qc->result_tf.flags = qc->tf.flags;
5899 ap->ops->tf_read(ap, &qc->result_tf);
5900 }
5901
5902 static void ata_verify_xfer(struct ata_queued_cmd *qc)
5903 {
5904 struct ata_device *dev = qc->dev;
5905
5906 if (ata_tag_internal(qc->tag))
5907 return;
5908
5909 if (ata_is_nodata(qc->tf.protocol))
5910 return;
5911
5912 if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol))
5913 return;
5914
5915 dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER;
5916 }
5917
5918 /**
5919 * ata_qc_complete - Complete an active ATA command
5920 * @qc: Command to complete
5921 * @err_mask: ATA Status register contents
5922 *
5923 * Indicate to the mid and upper layers that an ATA
5924 * command has completed, with either an ok or not-ok status.
5925 *
5926 * LOCKING:
5927 * spin_lock_irqsave(host lock)
5928 */
5929 void ata_qc_complete(struct ata_queued_cmd *qc)
5930 {
5931 struct ata_port *ap = qc->ap;
5932
5933 /* XXX: New EH and old EH use different mechanisms to
5934 * synchronize EH with regular execution path.
5935 *
5936 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
5937 * Normal execution path is responsible for not accessing a
5938 * failed qc. libata core enforces the rule by returning NULL
5939 * from ata_qc_from_tag() for failed qcs.
5940 *
5941 * Old EH depends on ata_qc_complete() nullifying completion
5942 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
5943 * not synchronize with interrupt handler. Only PIO task is
5944 * taken care of.
5945 */
5946 if (ap->ops->error_handler) {
5947 struct ata_device *dev = qc->dev;
5948 struct ata_eh_info *ehi = &dev->link->eh_info;
5949
5950 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
5951
5952 if (unlikely(qc->err_mask))
5953 qc->flags |= ATA_QCFLAG_FAILED;
5954
5955 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
5956 if (!ata_tag_internal(qc->tag)) {
5957 /* always fill result TF for failed qc */
5958 fill_result_tf(qc);
5959 ata_qc_schedule_eh(qc);
5960 return;
5961 }
5962 }
5963
5964 /* read result TF if requested */
5965 if (qc->flags & ATA_QCFLAG_RESULT_TF)
5966 fill_result_tf(qc);
5967
5968 /* Some commands need post-processing after successful
5969 * completion.
5970 */
5971 switch (qc->tf.command) {
5972 case ATA_CMD_SET_FEATURES:
5973 if (qc->tf.feature != SETFEATURES_WC_ON &&
5974 qc->tf.feature != SETFEATURES_WC_OFF)
5975 break;
5976 /* fall through */
5977 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
5978 case ATA_CMD_SET_MULTI: /* multi_count changed */
5979 /* revalidate device */
5980 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
5981 ata_port_schedule_eh(ap);
5982 break;
5983
5984 case ATA_CMD_SLEEP:
5985 dev->flags |= ATA_DFLAG_SLEEPING;
5986 break;
5987 }
5988
5989 if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER))
5990 ata_verify_xfer(qc);
5991
5992 __ata_qc_complete(qc);
5993 } else {
5994 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
5995 return;
5996
5997 /* read result TF if failed or requested */
5998 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
5999 fill_result_tf(qc);
6000
6001 __ata_qc_complete(qc);
6002 }
6003 }
6004
6005 /**
6006 * ata_qc_complete_multiple - Complete multiple qcs successfully
6007 * @ap: port in question
6008 * @qc_active: new qc_active mask
6009 * @finish_qc: LLDD callback invoked before completing a qc
6010 *
6011 * Complete in-flight commands. This functions is meant to be
6012 * called from low-level driver's interrupt routine to complete
6013 * requests normally. ap->qc_active and @qc_active is compared
6014 * and commands are completed accordingly.
6015 *
6016 * LOCKING:
6017 * spin_lock_irqsave(host lock)
6018 *
6019 * RETURNS:
6020 * Number of completed commands on success, -errno otherwise.
6021 */
6022 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
6023 void (*finish_qc)(struct ata_queued_cmd *))
6024 {
6025 int nr_done = 0;
6026 u32 done_mask;
6027 int i;
6028
6029 done_mask = ap->qc_active ^ qc_active;
6030
6031 if (unlikely(done_mask & qc_active)) {
6032 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
6033 "(%08x->%08x)\n", ap->qc_active, qc_active);
6034 return -EINVAL;
6035 }
6036
6037 for (i = 0; i < ATA_MAX_QUEUE; i++) {
6038 struct ata_queued_cmd *qc;
6039
6040 if (!(done_mask & (1 << i)))
6041 continue;
6042
6043 if ((qc = ata_qc_from_tag(ap, i))) {
6044 if (finish_qc)
6045 finish_qc(qc);
6046 ata_qc_complete(qc);
6047 nr_done++;
6048 }
6049 }
6050
6051 return nr_done;
6052 }
6053
6054 /**
6055 * ata_qc_issue - issue taskfile to device
6056 * @qc: command to issue to device
6057 *
6058 * Prepare an ATA command to submission to device.
6059 * This includes mapping the data into a DMA-able
6060 * area, filling in the S/G table, and finally
6061 * writing the taskfile to hardware, starting the command.
6062 *
6063 * LOCKING:
6064 * spin_lock_irqsave(host lock)
6065 */
6066 void ata_qc_issue(struct ata_queued_cmd *qc)
6067 {
6068 struct ata_port *ap = qc->ap;
6069 struct ata_link *link = qc->dev->link;
6070 u8 prot = qc->tf.protocol;
6071
6072 /* Make sure only one non-NCQ command is outstanding. The
6073 * check is skipped for old EH because it reuses active qc to
6074 * request ATAPI sense.
6075 */
6076 WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag));
6077
6078 if (ata_is_ncq(prot)) {
6079 WARN_ON(link->sactive & (1 << qc->tag));
6080
6081 if (!link->sactive)
6082 ap->nr_active_links++;
6083 link->sactive |= 1 << qc->tag;
6084 } else {
6085 WARN_ON(link->sactive);
6086
6087 ap->nr_active_links++;
6088 link->active_tag = qc->tag;
6089 }
6090
6091 qc->flags |= ATA_QCFLAG_ACTIVE;
6092 ap->qc_active |= 1 << qc->tag;
6093
6094 /* We guarantee to LLDs that they will have at least one
6095 * non-zero sg if the command is a data command.
6096 */
6097 BUG_ON(ata_is_data(prot) && (!qc->sg || !qc->n_elem || !qc->nbytes));
6098
6099 if (ata_is_dma(prot) || (ata_is_pio(prot) &&
6100 (ap->flags & ATA_FLAG_PIO_DMA)))
6101 if (ata_sg_setup(qc))
6102 goto sg_err;
6103
6104 /* if device is sleeping, schedule reset and abort the link */
6105 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
6106 link->eh_info.action |= ATA_EH_RESET;
6107 ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
6108 ata_link_abort(link);
6109 return;
6110 }
6111
6112 ap->ops->qc_prep(qc);
6113
6114 qc->err_mask |= ap->ops->qc_issue(qc);
6115 if (unlikely(qc->err_mask))
6116 goto err;
6117 return;
6118
6119 sg_err:
6120 qc->err_mask |= AC_ERR_SYSTEM;
6121 err:
6122 ata_qc_complete(qc);
6123 }
6124
6125 /**
6126 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
6127 * @qc: command to issue to device
6128 *
6129 * Using various libata functions and hooks, this function
6130 * starts an ATA command. ATA commands are grouped into
6131 * classes called "protocols", and issuing each type of protocol
6132 * is slightly different.
6133 *
6134 * May be used as the qc_issue() entry in ata_port_operations.
6135 *
6136 * LOCKING:
6137 * spin_lock_irqsave(host lock)
6138 *
6139 * RETURNS:
6140 * Zero on success, AC_ERR_* mask on failure
6141 */
6142
6143 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
6144 {
6145 struct ata_port *ap = qc->ap;
6146
6147 /* Use polling pio if the LLD doesn't handle
6148 * interrupt driven pio and atapi CDB interrupt.
6149 */
6150 if (ap->flags & ATA_FLAG_PIO_POLLING) {
6151 switch (qc->tf.protocol) {
6152 case ATA_PROT_PIO:
6153 case ATA_PROT_NODATA:
6154 case ATAPI_PROT_PIO:
6155 case ATAPI_PROT_NODATA:
6156 qc->tf.flags |= ATA_TFLAG_POLLING;
6157 break;
6158 case ATAPI_PROT_DMA:
6159 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
6160 /* see ata_dma_blacklisted() */
6161 BUG();
6162 break;
6163 default:
6164 break;
6165 }
6166 }
6167
6168 /* select the device */
6169 ata_dev_select(ap, qc->dev->devno, 1, 0);
6170
6171 /* start the command */
6172 switch (qc->tf.protocol) {
6173 case ATA_PROT_NODATA:
6174 if (qc->tf.flags & ATA_TFLAG_POLLING)
6175 ata_qc_set_polling(qc);
6176
6177 ata_tf_to_host(ap, &qc->tf);
6178 ap->hsm_task_state = HSM_ST_LAST;
6179
6180 if (qc->tf.flags & ATA_TFLAG_POLLING)
6181 ata_pio_queue_task(ap, qc, 0);
6182
6183 break;
6184
6185 case ATA_PROT_DMA:
6186 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
6187
6188 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
6189 ap->ops->bmdma_setup(qc); /* set up bmdma */
6190 ap->ops->bmdma_start(qc); /* initiate bmdma */
6191 ap->hsm_task_state = HSM_ST_LAST;
6192 break;
6193
6194 case ATA_PROT_PIO:
6195 if (qc->tf.flags & ATA_TFLAG_POLLING)
6196 ata_qc_set_polling(qc);
6197
6198 ata_tf_to_host(ap, &qc->tf);
6199
6200 if (qc->tf.flags & ATA_TFLAG_WRITE) {
6201 /* PIO data out protocol */
6202 ap->hsm_task_state = HSM_ST_FIRST;
6203 ata_pio_queue_task(ap, qc, 0);
6204
6205 /* always send first data block using
6206 * the ata_pio_task() codepath.
6207 */
6208 } else {
6209 /* PIO data in protocol */
6210 ap->hsm_task_state = HSM_ST;
6211
6212 if (qc->tf.flags & ATA_TFLAG_POLLING)
6213 ata_pio_queue_task(ap, qc, 0);
6214
6215 /* if polling, ata_pio_task() handles the rest.
6216 * otherwise, interrupt handler takes over from here.
6217 */
6218 }
6219
6220 break;
6221
6222 case ATAPI_PROT_PIO:
6223 case ATAPI_PROT_NODATA:
6224 if (qc->tf.flags & ATA_TFLAG_POLLING)
6225 ata_qc_set_polling(qc);
6226
6227 ata_tf_to_host(ap, &qc->tf);
6228
6229 ap->hsm_task_state = HSM_ST_FIRST;
6230
6231 /* send cdb by polling if no cdb interrupt */
6232 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
6233 (qc->tf.flags & ATA_TFLAG_POLLING))
6234 ata_pio_queue_task(ap, qc, 0);
6235 break;
6236
6237 case ATAPI_PROT_DMA:
6238 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
6239
6240 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
6241 ap->ops->bmdma_setup(qc); /* set up bmdma */
6242 ap->hsm_task_state = HSM_ST_FIRST;
6243
6244 /* send cdb by polling if no cdb interrupt */
6245 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
6246 ata_pio_queue_task(ap, qc, 0);
6247 break;
6248
6249 default:
6250 WARN_ON(1);
6251 return AC_ERR_SYSTEM;
6252 }
6253
6254 return 0;
6255 }
6256
6257 /**
6258 * ata_host_intr - Handle host interrupt for given (port, task)
6259 * @ap: Port on which interrupt arrived (possibly...)
6260 * @qc: Taskfile currently active in engine
6261 *
6262 * Handle host interrupt for given queued command. Currently,
6263 * only DMA interrupts are handled. All other commands are
6264 * handled via polling with interrupts disabled (nIEN bit).
6265 *
6266 * LOCKING:
6267 * spin_lock_irqsave(host lock)
6268 *
6269 * RETURNS:
6270 * One if interrupt was handled, zero if not (shared irq).
6271 */
6272
6273 inline unsigned int ata_host_intr(struct ata_port *ap,
6274 struct ata_queued_cmd *qc)
6275 {
6276 struct ata_eh_info *ehi = &ap->link.eh_info;
6277 u8 status, host_stat = 0;
6278
6279 VPRINTK("ata%u: protocol %d task_state %d\n",
6280 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
6281
6282 /* Check whether we are expecting interrupt in this state */
6283 switch (ap->hsm_task_state) {
6284 case HSM_ST_FIRST:
6285 /* Some pre-ATAPI-4 devices assert INTRQ
6286 * at this state when ready to receive CDB.
6287 */
6288
6289 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
6290 * The flag was turned on only for atapi devices. No
6291 * need to check ata_is_atapi(qc->tf.protocol) again.
6292 */
6293 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
6294 goto idle_irq;
6295 break;
6296 case HSM_ST_LAST:
6297 if (qc->tf.protocol == ATA_PROT_DMA ||
6298 qc->tf.protocol == ATAPI_PROT_DMA) {
6299 /* check status of DMA engine */
6300 host_stat = ap->ops->bmdma_status(ap);
6301 VPRINTK("ata%u: host_stat 0x%X\n",
6302 ap->print_id, host_stat);
6303
6304 /* if it's not our irq... */
6305 if (!(host_stat & ATA_DMA_INTR))
6306 goto idle_irq;
6307
6308 /* before we do anything else, clear DMA-Start bit */
6309 ap->ops->bmdma_stop(qc);
6310
6311 if (unlikely(host_stat & ATA_DMA_ERR)) {
6312 /* error when transfering data to/from memory */
6313 qc->err_mask |= AC_ERR_HOST_BUS;
6314 ap->hsm_task_state = HSM_ST_ERR;
6315 }
6316 }
6317 break;
6318 case HSM_ST:
6319 break;
6320 default:
6321 goto idle_irq;
6322 }
6323
6324 /* check altstatus */
6325 status = ata_altstatus(ap);
6326 if (status & ATA_BUSY)
6327 goto idle_irq;
6328
6329 /* check main status, clearing INTRQ */
6330 status = ata_chk_status(ap);
6331 if (unlikely(status & ATA_BUSY))
6332 goto idle_irq;
6333
6334 /* ack bmdma irq events */
6335 ap->ops->irq_clear(ap);
6336
6337 ata_hsm_move(ap, qc, status, 0);
6338
6339 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
6340 qc->tf.protocol == ATAPI_PROT_DMA))
6341 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
6342
6343 return 1; /* irq handled */
6344
6345 idle_irq:
6346 ap->stats.idle_irq++;
6347
6348 #ifdef ATA_IRQ_TRAP
6349 if ((ap->stats.idle_irq % 1000) == 0) {
6350 ata_chk_status(ap);
6351 ap->ops->irq_clear(ap);
6352 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
6353 return 1;
6354 }
6355 #endif
6356 return 0; /* irq not handled */
6357 }
6358
6359 /**
6360 * ata_interrupt - Default ATA host interrupt handler
6361 * @irq: irq line (unused)
6362 * @dev_instance: pointer to our ata_host information structure
6363 *
6364 * Default interrupt handler for PCI IDE devices. Calls
6365 * ata_host_intr() for each port that is not disabled.
6366 *
6367 * LOCKING:
6368 * Obtains host lock during operation.
6369 *
6370 * RETURNS:
6371 * IRQ_NONE or IRQ_HANDLED.
6372 */
6373
6374 irqreturn_t ata_interrupt(int irq, void *dev_instance)
6375 {
6376 struct ata_host *host = dev_instance;
6377 unsigned int i;
6378 unsigned int handled = 0;
6379 unsigned long flags;
6380
6381 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
6382 spin_lock_irqsave(&host->lock, flags);
6383
6384 for (i = 0; i < host->n_ports; i++) {
6385 struct ata_port *ap;
6386
6387 ap = host->ports[i];
6388 if (ap &&
6389 !(ap->flags & ATA_FLAG_DISABLED)) {
6390 struct ata_queued_cmd *qc;
6391
6392 qc = ata_qc_from_tag(ap, ap->link.active_tag);
6393 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
6394 (qc->flags & ATA_QCFLAG_ACTIVE))
6395 handled |= ata_host_intr(ap, qc);
6396 }
6397 }
6398
6399 spin_unlock_irqrestore(&host->lock, flags);
6400
6401 return IRQ_RETVAL(handled);
6402 }
6403
6404 /**
6405 * sata_scr_valid - test whether SCRs are accessible
6406 * @link: ATA link to test SCR accessibility for
6407 *
6408 * Test whether SCRs are accessible for @link.
6409 *
6410 * LOCKING:
6411 * None.
6412 *
6413 * RETURNS:
6414 * 1 if SCRs are accessible, 0 otherwise.
6415 */
6416 int sata_scr_valid(struct ata_link *link)
6417 {
6418 struct ata_port *ap = link->ap;
6419
6420 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
6421 }
6422
6423 /**
6424 * sata_scr_read - read SCR register of the specified port
6425 * @link: ATA link to read SCR for
6426 * @reg: SCR to read
6427 * @val: Place to store read value
6428 *
6429 * Read SCR register @reg of @link into *@val. This function is
6430 * guaranteed to succeed if @link is ap->link, the cable type of
6431 * the port is SATA and the port implements ->scr_read.
6432 *
6433 * LOCKING:
6434 * None if @link is ap->link. Kernel thread context otherwise.
6435 *
6436 * RETURNS:
6437 * 0 on success, negative errno on failure.
6438 */
6439 int sata_scr_read(struct ata_link *link, int reg, u32 *val)
6440 {
6441 if (ata_is_host_link(link)) {
6442 struct ata_port *ap = link->ap;
6443
6444 if (sata_scr_valid(link))
6445 return ap->ops->scr_read(ap, reg, val);
6446 return -EOPNOTSUPP;
6447 }
6448
6449 return sata_pmp_scr_read(link, reg, val);
6450 }
6451
6452 /**
6453 * sata_scr_write - write SCR register of the specified port
6454 * @link: ATA link to write SCR for
6455 * @reg: SCR to write
6456 * @val: value to write
6457 *
6458 * Write @val to SCR register @reg of @link. This function is
6459 * guaranteed to succeed if @link is ap->link, the cable type of
6460 * the port is SATA and the port implements ->scr_read.
6461 *
6462 * LOCKING:
6463 * None if @link is ap->link. Kernel thread context otherwise.
6464 *
6465 * RETURNS:
6466 * 0 on success, negative errno on failure.
6467 */
6468 int sata_scr_write(struct ata_link *link, int reg, u32 val)
6469 {
6470 if (ata_is_host_link(link)) {
6471 struct ata_port *ap = link->ap;
6472
6473 if (sata_scr_valid(link))
6474 return ap->ops->scr_write(ap, reg, val);
6475 return -EOPNOTSUPP;
6476 }
6477
6478 return sata_pmp_scr_write(link, reg, val);
6479 }
6480
6481 /**
6482 * sata_scr_write_flush - write SCR register of the specified port and flush
6483 * @link: ATA link to write SCR for
6484 * @reg: SCR to write
6485 * @val: value to write
6486 *
6487 * This function is identical to sata_scr_write() except that this
6488 * function performs flush after writing to the register.
6489 *
6490 * LOCKING:
6491 * None if @link is ap->link. Kernel thread context otherwise.
6492 *
6493 * RETURNS:
6494 * 0 on success, negative errno on failure.
6495 */
6496 int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
6497 {
6498 if (ata_is_host_link(link)) {
6499 struct ata_port *ap = link->ap;
6500 int rc;
6501
6502 if (sata_scr_valid(link)) {
6503 rc = ap->ops->scr_write(ap, reg, val);
6504 if (rc == 0)
6505 rc = ap->ops->scr_read(ap, reg, &val);
6506 return rc;
6507 }
6508 return -EOPNOTSUPP;
6509 }
6510
6511 return sata_pmp_scr_write(link, reg, val);
6512 }
6513
6514 /**
6515 * ata_link_online - test whether the given link is online
6516 * @link: ATA link to test
6517 *
6518 * Test whether @link is online. Note that this function returns
6519 * 0 if online status of @link cannot be obtained, so
6520 * ata_link_online(link) != !ata_link_offline(link).
6521 *
6522 * LOCKING:
6523 * None.
6524 *
6525 * RETURNS:
6526 * 1 if the port online status is available and online.
6527 */
6528 int ata_link_online(struct ata_link *link)
6529 {
6530 u32 sstatus;
6531
6532 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
6533 (sstatus & 0xf) == 0x3)
6534 return 1;
6535 return 0;
6536 }
6537
6538 /**
6539 * ata_link_offline - test whether the given link is offline
6540 * @link: ATA link to test
6541 *
6542 * Test whether @link is offline. Note that this function
6543 * returns 0 if offline status of @link cannot be obtained, so
6544 * ata_link_online(link) != !ata_link_offline(link).
6545 *
6546 * LOCKING:
6547 * None.
6548 *
6549 * RETURNS:
6550 * 1 if the port offline status is available and offline.
6551 */
6552 int ata_link_offline(struct ata_link *link)
6553 {
6554 u32 sstatus;
6555
6556 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
6557 (sstatus & 0xf) != 0x3)
6558 return 1;
6559 return 0;
6560 }
6561
6562 int ata_flush_cache(struct ata_device *dev)
6563 {
6564 unsigned int err_mask;
6565 u8 cmd;
6566
6567 if (!ata_try_flush_cache(dev))
6568 return 0;
6569
6570 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
6571 cmd = ATA_CMD_FLUSH_EXT;
6572 else
6573 cmd = ATA_CMD_FLUSH;
6574
6575 /* This is wrong. On a failed flush we get back the LBA of the lost
6576 sector and we should (assuming it wasn't aborted as unknown) issue
6577 a further flush command to continue the writeback until it
6578 does not error */
6579 err_mask = ata_do_simple_cmd(dev, cmd);
6580 if (err_mask) {
6581 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
6582 return -EIO;
6583 }
6584
6585 return 0;
6586 }
6587
6588 #ifdef CONFIG_PM
6589 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
6590 unsigned int action, unsigned int ehi_flags,
6591 int wait)
6592 {
6593 unsigned long flags;
6594 int i, rc;
6595
6596 for (i = 0; i < host->n_ports; i++) {
6597 struct ata_port *ap = host->ports[i];
6598 struct ata_link *link;
6599
6600 /* Previous resume operation might still be in
6601 * progress. Wait for PM_PENDING to clear.
6602 */
6603 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
6604 ata_port_wait_eh(ap);
6605 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6606 }
6607
6608 /* request PM ops to EH */
6609 spin_lock_irqsave(ap->lock, flags);
6610
6611 ap->pm_mesg = mesg;
6612 if (wait) {
6613 rc = 0;
6614 ap->pm_result = &rc;
6615 }
6616
6617 ap->pflags |= ATA_PFLAG_PM_PENDING;
6618 __ata_port_for_each_link(link, ap) {
6619 link->eh_info.action |= action;
6620 link->eh_info.flags |= ehi_flags;
6621 }
6622
6623 ata_port_schedule_eh(ap);
6624
6625 spin_unlock_irqrestore(ap->lock, flags);
6626
6627 /* wait and check result */
6628 if (wait) {
6629 ata_port_wait_eh(ap);
6630 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6631 if (rc)
6632 return rc;
6633 }
6634 }
6635
6636 return 0;
6637 }
6638
6639 /**
6640 * ata_host_suspend - suspend host
6641 * @host: host to suspend
6642 * @mesg: PM message
6643 *
6644 * Suspend @host. Actual operation is performed by EH. This
6645 * function requests EH to perform PM operations and waits for EH
6646 * to finish.
6647 *
6648 * LOCKING:
6649 * Kernel thread context (may sleep).
6650 *
6651 * RETURNS:
6652 * 0 on success, -errno on failure.
6653 */
6654 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
6655 {
6656 int rc;
6657
6658 /*
6659 * disable link pm on all ports before requesting
6660 * any pm activity
6661 */
6662 ata_lpm_enable(host);
6663
6664 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
6665 if (rc == 0)
6666 host->dev->power.power_state = mesg;
6667 return rc;
6668 }
6669
6670 /**
6671 * ata_host_resume - resume host
6672 * @host: host to resume
6673 *
6674 * Resume @host. Actual operation is performed by EH. This
6675 * function requests EH to perform PM operations and returns.
6676 * Note that all resume operations are performed parallely.
6677 *
6678 * LOCKING:
6679 * Kernel thread context (may sleep).
6680 */
6681 void ata_host_resume(struct ata_host *host)
6682 {
6683 ata_host_request_pm(host, PMSG_ON, ATA_EH_RESET,
6684 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
6685 host->dev->power.power_state = PMSG_ON;
6686
6687 /* reenable link pm */
6688 ata_lpm_disable(host);
6689 }
6690 #endif
6691
6692 /**
6693 * ata_port_start - Set port up for dma.
6694 * @ap: Port to initialize
6695 *
6696 * Called just after data structures for each port are
6697 * initialized. Allocates space for PRD table.
6698 *
6699 * May be used as the port_start() entry in ata_port_operations.
6700 *
6701 * LOCKING:
6702 * Inherited from caller.
6703 */
6704 int ata_port_start(struct ata_port *ap)
6705 {
6706 struct device *dev = ap->dev;
6707
6708 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
6709 GFP_KERNEL);
6710 if (!ap->prd)
6711 return -ENOMEM;
6712
6713 return 0;
6714 }
6715
6716 /**
6717 * ata_dev_init - Initialize an ata_device structure
6718 * @dev: Device structure to initialize
6719 *
6720 * Initialize @dev in preparation for probing.
6721 *
6722 * LOCKING:
6723 * Inherited from caller.
6724 */
6725 void ata_dev_init(struct ata_device *dev)
6726 {
6727 struct ata_link *link = dev->link;
6728 struct ata_port *ap = link->ap;
6729 unsigned long flags;
6730
6731 /* SATA spd limit is bound to the first device */
6732 link->sata_spd_limit = link->hw_sata_spd_limit;
6733 link->sata_spd = 0;
6734
6735 /* High bits of dev->flags are used to record warm plug
6736 * requests which occur asynchronously. Synchronize using
6737 * host lock.
6738 */
6739 spin_lock_irqsave(ap->lock, flags);
6740 dev->flags &= ~ATA_DFLAG_INIT_MASK;
6741 dev->horkage = 0;
6742 spin_unlock_irqrestore(ap->lock, flags);
6743
6744 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
6745 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
6746 dev->pio_mask = UINT_MAX;
6747 dev->mwdma_mask = UINT_MAX;
6748 dev->udma_mask = UINT_MAX;
6749 }
6750
6751 /**
6752 * ata_link_init - Initialize an ata_link structure
6753 * @ap: ATA port link is attached to
6754 * @link: Link structure to initialize
6755 * @pmp: Port multiplier port number
6756 *
6757 * Initialize @link.
6758 *
6759 * LOCKING:
6760 * Kernel thread context (may sleep)
6761 */
6762 void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
6763 {
6764 int i;
6765
6766 /* clear everything except for devices */
6767 memset(link, 0, offsetof(struct ata_link, device[0]));
6768
6769 link->ap = ap;
6770 link->pmp = pmp;
6771 link->active_tag = ATA_TAG_POISON;
6772 link->hw_sata_spd_limit = UINT_MAX;
6773
6774 /* can't use iterator, ap isn't initialized yet */
6775 for (i = 0; i < ATA_MAX_DEVICES; i++) {
6776 struct ata_device *dev = &link->device[i];
6777
6778 dev->link = link;
6779 dev->devno = dev - link->device;
6780 ata_dev_init(dev);
6781 }
6782 }
6783
6784 /**
6785 * sata_link_init_spd - Initialize link->sata_spd_limit
6786 * @link: Link to configure sata_spd_limit for
6787 *
6788 * Initialize @link->[hw_]sata_spd_limit to the currently
6789 * configured value.
6790 *
6791 * LOCKING:
6792 * Kernel thread context (may sleep).
6793 *
6794 * RETURNS:
6795 * 0 on success, -errno on failure.
6796 */
6797 int sata_link_init_spd(struct ata_link *link)
6798 {
6799 u32 scontrol;
6800 u8 spd;
6801 int rc;
6802
6803 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
6804 if (rc)
6805 return rc;
6806
6807 spd = (scontrol >> 4) & 0xf;
6808 if (spd)
6809 link->hw_sata_spd_limit &= (1 << spd) - 1;
6810
6811 ata_force_spd_limit(link);
6812
6813 link->sata_spd_limit = link->hw_sata_spd_limit;
6814
6815 return 0;
6816 }
6817
6818 /**
6819 * ata_port_alloc - allocate and initialize basic ATA port resources
6820 * @host: ATA host this allocated port belongs to
6821 *
6822 * Allocate and initialize basic ATA port resources.
6823 *
6824 * RETURNS:
6825 * Allocate ATA port on success, NULL on failure.
6826 *
6827 * LOCKING:
6828 * Inherited from calling layer (may sleep).
6829 */
6830 struct ata_port *ata_port_alloc(struct ata_host *host)
6831 {
6832 struct ata_port *ap;
6833
6834 DPRINTK("ENTER\n");
6835
6836 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
6837 if (!ap)
6838 return NULL;
6839
6840 ap->pflags |= ATA_PFLAG_INITIALIZING;
6841 ap->lock = &host->lock;
6842 ap->flags = ATA_FLAG_DISABLED;
6843 ap->print_id = -1;
6844 ap->ctl = ATA_DEVCTL_OBS;
6845 ap->host = host;
6846 ap->dev = host->dev;
6847 ap->last_ctl = 0xFF;
6848
6849 #if defined(ATA_VERBOSE_DEBUG)
6850 /* turn on all debugging levels */
6851 ap->msg_enable = 0x00FF;
6852 #elif defined(ATA_DEBUG)
6853 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
6854 #else
6855 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
6856 #endif
6857
6858 INIT_DELAYED_WORK(&ap->port_task, ata_pio_task);
6859 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
6860 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
6861 INIT_LIST_HEAD(&ap->eh_done_q);
6862 init_waitqueue_head(&ap->eh_wait_q);
6863 init_timer_deferrable(&ap->fastdrain_timer);
6864 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
6865 ap->fastdrain_timer.data = (unsigned long)ap;
6866
6867 ap->cbl = ATA_CBL_NONE;
6868
6869 ata_link_init(ap, &ap->link, 0);
6870
6871 #ifdef ATA_IRQ_TRAP
6872 ap->stats.unhandled_irq = 1;
6873 ap->stats.idle_irq = 1;
6874 #endif
6875 return ap;
6876 }
6877
6878 static void ata_host_release(struct device *gendev, void *res)
6879 {
6880 struct ata_host *host = dev_get_drvdata(gendev);
6881 int i;
6882
6883 for (i = 0; i < host->n_ports; i++) {
6884 struct ata_port *ap = host->ports[i];
6885
6886 if (!ap)
6887 continue;
6888
6889 if (ap->scsi_host)
6890 scsi_host_put(ap->scsi_host);
6891
6892 kfree(ap->pmp_link);
6893 kfree(ap);
6894 host->ports[i] = NULL;
6895 }
6896
6897 dev_set_drvdata(gendev, NULL);
6898 }
6899
6900 /**
6901 * ata_host_alloc - allocate and init basic ATA host resources
6902 * @dev: generic device this host is associated with
6903 * @max_ports: maximum number of ATA ports associated with this host
6904 *
6905 * Allocate and initialize basic ATA host resources. LLD calls
6906 * this function to allocate a host, initializes it fully and
6907 * attaches it using ata_host_register().
6908 *
6909 * @max_ports ports are allocated and host->n_ports is
6910 * initialized to @max_ports. The caller is allowed to decrease
6911 * host->n_ports before calling ata_host_register(). The unused
6912 * ports will be automatically freed on registration.
6913 *
6914 * RETURNS:
6915 * Allocate ATA host on success, NULL on failure.
6916 *
6917 * LOCKING:
6918 * Inherited from calling layer (may sleep).
6919 */
6920 struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
6921 {
6922 struct ata_host *host;
6923 size_t sz;
6924 int i;
6925
6926 DPRINTK("ENTER\n");
6927
6928 if (!devres_open_group(dev, NULL, GFP_KERNEL))
6929 return NULL;
6930
6931 /* alloc a container for our list of ATA ports (buses) */
6932 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
6933 /* alloc a container for our list of ATA ports (buses) */
6934 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
6935 if (!host)
6936 goto err_out;
6937
6938 devres_add(dev, host);
6939 dev_set_drvdata(dev, host);
6940
6941 spin_lock_init(&host->lock);
6942 host->dev = dev;
6943 host->n_ports = max_ports;
6944
6945 /* allocate ports bound to this host */
6946 for (i = 0; i < max_ports; i++) {
6947 struct ata_port *ap;
6948
6949 ap = ata_port_alloc(host);
6950 if (!ap)
6951 goto err_out;
6952
6953 ap->port_no = i;
6954 host->ports[i] = ap;
6955 }
6956
6957 devres_remove_group(dev, NULL);
6958 return host;
6959
6960 err_out:
6961 devres_release_group(dev, NULL);
6962 return NULL;
6963 }
6964
6965 /**
6966 * ata_host_alloc_pinfo - alloc host and init with port_info array
6967 * @dev: generic device this host is associated with
6968 * @ppi: array of ATA port_info to initialize host with
6969 * @n_ports: number of ATA ports attached to this host
6970 *
6971 * Allocate ATA host and initialize with info from @ppi. If NULL
6972 * terminated, @ppi may contain fewer entries than @n_ports. The
6973 * last entry will be used for the remaining ports.
6974 *
6975 * RETURNS:
6976 * Allocate ATA host on success, NULL on failure.
6977 *
6978 * LOCKING:
6979 * Inherited from calling layer (may sleep).
6980 */
6981 struct ata_host *ata_host_alloc_pinfo(struct device *dev,
6982 const struct ata_port_info * const * ppi,
6983 int n_ports)
6984 {
6985 const struct ata_port_info *pi;
6986 struct ata_host *host;
6987 int i, j;
6988
6989 host = ata_host_alloc(dev, n_ports);
6990 if (!host)
6991 return NULL;
6992
6993 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
6994 struct ata_port *ap = host->ports[i];
6995
6996 if (ppi[j])
6997 pi = ppi[j++];
6998
6999 ap->pio_mask = pi->pio_mask;
7000 ap->mwdma_mask = pi->mwdma_mask;
7001 ap->udma_mask = pi->udma_mask;
7002 ap->flags |= pi->flags;
7003 ap->link.flags |= pi->link_flags;
7004 ap->ops = pi->port_ops;
7005
7006 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
7007 host->ops = pi->port_ops;
7008 }
7009
7010 return host;
7011 }
7012
7013 static void ata_host_stop(struct device *gendev, void *res)
7014 {
7015 struct ata_host *host = dev_get_drvdata(gendev);
7016 int i;
7017
7018 WARN_ON(!(host->flags & ATA_HOST_STARTED));
7019
7020 for (i = 0; i < host->n_ports; i++) {
7021 struct ata_port *ap = host->ports[i];
7022
7023 if (ap->ops->port_stop)
7024 ap->ops->port_stop(ap);
7025 }
7026
7027 if (host->ops->host_stop)
7028 host->ops->host_stop(host);
7029 }
7030
7031 /**
7032 * ata_finalize_port_ops - finalize ata_port_operations
7033 * @ops: ata_port_operations to finalize
7034 *
7035 * An ata_port_operations can inherit from another ops and that
7036 * ops can again inherit from another. This can go on as many
7037 * times as necessary as long as there is no loop in the
7038 * inheritance chain.
7039 *
7040 * Ops tables are finalized when the host is started. NULL or
7041 * unspecified entries are inherited from the closet ancestor
7042 * which has the method and the entry is populated with it.
7043 * After finalization, the ops table directly points to all the
7044 * methods and ->inherits is no longer necessary and cleared.
7045 *
7046 * Using ATA_OP_NULL, inheriting ops can force a method to NULL.
7047 *
7048 * LOCKING:
7049 * None.
7050 */
7051 static void ata_finalize_port_ops(struct ata_port_operations *ops)
7052 {
7053 static spinlock_t lock = SPIN_LOCK_UNLOCKED;
7054 const struct ata_port_operations *cur;
7055 void **begin = (void **)ops;
7056 void **end = (void **)&ops->inherits;
7057 void **pp;
7058
7059 if (!ops || !ops->inherits)
7060 return;
7061
7062 spin_lock(&lock);
7063
7064 for (cur = ops->inherits; cur; cur = cur->inherits) {
7065 void **inherit = (void **)cur;
7066
7067 for (pp = begin; pp < end; pp++, inherit++)
7068 if (!*pp)
7069 *pp = *inherit;
7070 }
7071
7072 for (pp = begin; pp < end; pp++)
7073 if (IS_ERR(*pp))
7074 *pp = NULL;
7075
7076 ops->inherits = NULL;
7077
7078 spin_unlock(&lock);
7079 }
7080
7081 /**
7082 * ata_host_start - start and freeze ports of an ATA host
7083 * @host: ATA host to start ports for
7084 *
7085 * Start and then freeze ports of @host. Started status is
7086 * recorded in host->flags, so this function can be called
7087 * multiple times. Ports are guaranteed to get started only
7088 * once. If host->ops isn't initialized yet, its set to the
7089 * first non-dummy port ops.
7090 *
7091 * LOCKING:
7092 * Inherited from calling layer (may sleep).
7093 *
7094 * RETURNS:
7095 * 0 if all ports are started successfully, -errno otherwise.
7096 */
7097 int ata_host_start(struct ata_host *host)
7098 {
7099 int have_stop = 0;
7100 void *start_dr = NULL;
7101 int i, rc;
7102
7103 if (host->flags & ATA_HOST_STARTED)
7104 return 0;
7105
7106 ata_finalize_port_ops(host->ops);
7107
7108 for (i = 0; i < host->n_ports; i++) {
7109 struct ata_port *ap = host->ports[i];
7110
7111 ata_finalize_port_ops(ap->ops);
7112
7113 if (!host->ops && !ata_port_is_dummy(ap))
7114 host->ops = ap->ops;
7115
7116 if (ap->ops->port_stop)
7117 have_stop = 1;
7118 }
7119
7120 if (host->ops->host_stop)
7121 have_stop = 1;
7122
7123 if (have_stop) {
7124 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
7125 if (!start_dr)
7126 return -ENOMEM;
7127 }
7128
7129 for (i = 0; i < host->n_ports; i++) {
7130 struct ata_port *ap = host->ports[i];
7131
7132 if (ap->ops->port_start) {
7133 rc = ap->ops->port_start(ap);
7134 if (rc) {
7135 if (rc != -ENODEV)
7136 dev_printk(KERN_ERR, host->dev,
7137 "failed to start port %d "
7138 "(errno=%d)\n", i, rc);
7139 goto err_out;
7140 }
7141 }
7142 ata_eh_freeze_port(ap);
7143 }
7144
7145 if (start_dr)
7146 devres_add(host->dev, start_dr);
7147 host->flags |= ATA_HOST_STARTED;
7148 return 0;
7149
7150 err_out:
7151 while (--i >= 0) {
7152 struct ata_port *ap = host->ports[i];
7153
7154 if (ap->ops->port_stop)
7155 ap->ops->port_stop(ap);
7156 }
7157 devres_free(start_dr);
7158 return rc;
7159 }
7160
7161 /**
7162 * ata_sas_host_init - Initialize a host struct
7163 * @host: host to initialize
7164 * @dev: device host is attached to
7165 * @flags: host flags
7166 * @ops: port_ops
7167 *
7168 * LOCKING:
7169 * PCI/etc. bus probe sem.
7170 *
7171 */
7172 /* KILLME - the only user left is ipr */
7173 void ata_host_init(struct ata_host *host, struct device *dev,
7174 unsigned long flags, struct ata_port_operations *ops)
7175 {
7176 spin_lock_init(&host->lock);
7177 host->dev = dev;
7178 host->flags = flags;
7179 host->ops = ops;
7180 }
7181
7182 /**
7183 * ata_host_register - register initialized ATA host
7184 * @host: ATA host to register
7185 * @sht: template for SCSI host
7186 *
7187 * Register initialized ATA host. @host is allocated using
7188 * ata_host_alloc() and fully initialized by LLD. This function
7189 * starts ports, registers @host with ATA and SCSI layers and
7190 * probe registered devices.
7191 *
7192 * LOCKING:
7193 * Inherited from calling layer (may sleep).
7194 *
7195 * RETURNS:
7196 * 0 on success, -errno otherwise.
7197 */
7198 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
7199 {
7200 int i, rc;
7201
7202 /* host must have been started */
7203 if (!(host->flags & ATA_HOST_STARTED)) {
7204 dev_printk(KERN_ERR, host->dev,
7205 "BUG: trying to register unstarted host\n");
7206 WARN_ON(1);
7207 return -EINVAL;
7208 }
7209
7210 /* Blow away unused ports. This happens when LLD can't
7211 * determine the exact number of ports to allocate at
7212 * allocation time.
7213 */
7214 for (i = host->n_ports; host->ports[i]; i++)
7215 kfree(host->ports[i]);
7216
7217 /* give ports names and add SCSI hosts */
7218 for (i = 0; i < host->n_ports; i++)
7219 host->ports[i]->print_id = ata_print_id++;
7220
7221 rc = ata_scsi_add_hosts(host, sht);
7222 if (rc)
7223 return rc;
7224
7225 /* associate with ACPI nodes */
7226 ata_acpi_associate(host);
7227
7228 /* set cable, sata_spd_limit and report */
7229 for (i = 0; i < host->n_ports; i++) {
7230 struct ata_port *ap = host->ports[i];
7231 unsigned long xfer_mask;
7232
7233 /* set SATA cable type if still unset */
7234 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
7235 ap->cbl = ATA_CBL_SATA;
7236
7237 /* init sata_spd_limit to the current value */
7238 sata_link_init_spd(&ap->link);
7239
7240 /* print per-port info to dmesg */
7241 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
7242 ap->udma_mask);
7243
7244 if (!ata_port_is_dummy(ap)) {
7245 ata_port_printk(ap, KERN_INFO,
7246 "%cATA max %s %s\n",
7247 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
7248 ata_mode_string(xfer_mask),
7249 ap->link.eh_info.desc);
7250 ata_ehi_clear_desc(&ap->link.eh_info);
7251 } else
7252 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
7253 }
7254
7255 /* perform each probe synchronously */
7256 DPRINTK("probe begin\n");
7257 for (i = 0; i < host->n_ports; i++) {
7258 struct ata_port *ap = host->ports[i];
7259
7260 /* probe */
7261 if (ap->ops->error_handler) {
7262 struct ata_eh_info *ehi = &ap->link.eh_info;
7263 unsigned long flags;
7264
7265 ata_port_probe(ap);
7266
7267 /* kick EH for boot probing */
7268 spin_lock_irqsave(ap->lock, flags);
7269
7270 ehi->probe_mask |= ATA_ALL_DEVICES;
7271 ehi->action |= ATA_EH_RESET;
7272 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
7273
7274 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
7275 ap->pflags |= ATA_PFLAG_LOADING;
7276 ata_port_schedule_eh(ap);
7277
7278 spin_unlock_irqrestore(ap->lock, flags);
7279
7280 /* wait for EH to finish */
7281 ata_port_wait_eh(ap);
7282 } else {
7283 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
7284 rc = ata_bus_probe(ap);
7285 DPRINTK("ata%u: bus probe end\n", ap->print_id);
7286
7287 if (rc) {
7288 /* FIXME: do something useful here?
7289 * Current libata behavior will
7290 * tear down everything when
7291 * the module is removed
7292 * or the h/w is unplugged.
7293 */
7294 }
7295 }
7296 }
7297
7298 /* probes are done, now scan each port's disk(s) */
7299 DPRINTK("host probe begin\n");
7300 for (i = 0; i < host->n_ports; i++) {
7301 struct ata_port *ap = host->ports[i];
7302
7303 ata_scsi_scan_host(ap, 1);
7304 ata_lpm_schedule(ap, ap->pm_policy);
7305 }
7306
7307 return 0;
7308 }
7309
7310 /**
7311 * ata_host_activate - start host, request IRQ and register it
7312 * @host: target ATA host
7313 * @irq: IRQ to request
7314 * @irq_handler: irq_handler used when requesting IRQ
7315 * @irq_flags: irq_flags used when requesting IRQ
7316 * @sht: scsi_host_template to use when registering the host
7317 *
7318 * After allocating an ATA host and initializing it, most libata
7319 * LLDs perform three steps to activate the host - start host,
7320 * request IRQ and register it. This helper takes necessasry
7321 * arguments and performs the three steps in one go.
7322 *
7323 * An invalid IRQ skips the IRQ registration and expects the host to
7324 * have set polling mode on the port. In this case, @irq_handler
7325 * should be NULL.
7326 *
7327 * LOCKING:
7328 * Inherited from calling layer (may sleep).
7329 *
7330 * RETURNS:
7331 * 0 on success, -errno otherwise.
7332 */
7333 int ata_host_activate(struct ata_host *host, int irq,
7334 irq_handler_t irq_handler, unsigned long irq_flags,
7335 struct scsi_host_template *sht)
7336 {
7337 int i, rc;
7338
7339 rc = ata_host_start(host);
7340 if (rc)
7341 return rc;
7342
7343 /* Special case for polling mode */
7344 if (!irq) {
7345 WARN_ON(irq_handler);
7346 return ata_host_register(host, sht);
7347 }
7348
7349 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
7350 dev_driver_string(host->dev), host);
7351 if (rc)
7352 return rc;
7353
7354 for (i = 0; i < host->n_ports; i++)
7355 ata_port_desc(host->ports[i], "irq %d", irq);
7356
7357 rc = ata_host_register(host, sht);
7358 /* if failed, just free the IRQ and leave ports alone */
7359 if (rc)
7360 devm_free_irq(host->dev, irq, host);
7361
7362 return rc;
7363 }
7364
7365 /**
7366 * ata_port_detach - Detach ATA port in prepration of device removal
7367 * @ap: ATA port to be detached
7368 *
7369 * Detach all ATA devices and the associated SCSI devices of @ap;
7370 * then, remove the associated SCSI host. @ap is guaranteed to
7371 * be quiescent on return from this function.
7372 *
7373 * LOCKING:
7374 * Kernel thread context (may sleep).
7375 */
7376 static void ata_port_detach(struct ata_port *ap)
7377 {
7378 unsigned long flags;
7379 struct ata_link *link;
7380 struct ata_device *dev;
7381
7382 if (!ap->ops->error_handler)
7383 goto skip_eh;
7384
7385 /* tell EH we're leaving & flush EH */
7386 spin_lock_irqsave(ap->lock, flags);
7387 ap->pflags |= ATA_PFLAG_UNLOADING;
7388 spin_unlock_irqrestore(ap->lock, flags);
7389
7390 ata_port_wait_eh(ap);
7391
7392 /* EH is now guaranteed to see UNLOADING - EH context belongs
7393 * to us. Disable all existing devices.
7394 */
7395 ata_port_for_each_link(link, ap) {
7396 ata_link_for_each_dev(dev, link)
7397 ata_dev_disable(dev);
7398 }
7399
7400 /* Final freeze & EH. All in-flight commands are aborted. EH
7401 * will be skipped and retrials will be terminated with bad
7402 * target.
7403 */
7404 spin_lock_irqsave(ap->lock, flags);
7405 ata_port_freeze(ap); /* won't be thawed */
7406 spin_unlock_irqrestore(ap->lock, flags);
7407
7408 ata_port_wait_eh(ap);
7409 cancel_rearming_delayed_work(&ap->hotplug_task);
7410
7411 skip_eh:
7412 /* remove the associated SCSI host */
7413 scsi_remove_host(ap->scsi_host);
7414 }
7415
7416 /**
7417 * ata_host_detach - Detach all ports of an ATA host
7418 * @host: Host to detach
7419 *
7420 * Detach all ports of @host.
7421 *
7422 * LOCKING:
7423 * Kernel thread context (may sleep).
7424 */
7425 void ata_host_detach(struct ata_host *host)
7426 {
7427 int i;
7428
7429 for (i = 0; i < host->n_ports; i++)
7430 ata_port_detach(host->ports[i]);
7431
7432 /* the host is dead now, dissociate ACPI */
7433 ata_acpi_dissociate(host);
7434 }
7435
7436 /**
7437 * ata_std_ports - initialize ioaddr with standard port offsets.
7438 * @ioaddr: IO address structure to be initialized
7439 *
7440 * Utility function which initializes data_addr, error_addr,
7441 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
7442 * device_addr, status_addr, and command_addr to standard offsets
7443 * relative to cmd_addr.
7444 *
7445 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
7446 */
7447
7448 void ata_std_ports(struct ata_ioports *ioaddr)
7449 {
7450 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
7451 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
7452 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
7453 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
7454 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
7455 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
7456 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
7457 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
7458 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
7459 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
7460 }
7461
7462
7463 #ifdef CONFIG_PCI
7464
7465 /**
7466 * ata_pci_remove_one - PCI layer callback for device removal
7467 * @pdev: PCI device that was removed
7468 *
7469 * PCI layer indicates to libata via this hook that hot-unplug or
7470 * module unload event has occurred. Detach all ports. Resource
7471 * release is handled via devres.
7472 *
7473 * LOCKING:
7474 * Inherited from PCI layer (may sleep).
7475 */
7476 void ata_pci_remove_one(struct pci_dev *pdev)
7477 {
7478 struct device *dev = &pdev->dev;
7479 struct ata_host *host = dev_get_drvdata(dev);
7480
7481 ata_host_detach(host);
7482 }
7483
7484 /* move to PCI subsystem */
7485 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
7486 {
7487 unsigned long tmp = 0;
7488
7489 switch (bits->width) {
7490 case 1: {
7491 u8 tmp8 = 0;
7492 pci_read_config_byte(pdev, bits->reg, &tmp8);
7493 tmp = tmp8;
7494 break;
7495 }
7496 case 2: {
7497 u16 tmp16 = 0;
7498 pci_read_config_word(pdev, bits->reg, &tmp16);
7499 tmp = tmp16;
7500 break;
7501 }
7502 case 4: {
7503 u32 tmp32 = 0;
7504 pci_read_config_dword(pdev, bits->reg, &tmp32);
7505 tmp = tmp32;
7506 break;
7507 }
7508
7509 default:
7510 return -EINVAL;
7511 }
7512
7513 tmp &= bits->mask;
7514
7515 return (tmp == bits->val) ? 1 : 0;
7516 }
7517
7518 #ifdef CONFIG_PM
7519 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
7520 {
7521 pci_save_state(pdev);
7522 pci_disable_device(pdev);
7523
7524 if (mesg.event & PM_EVENT_SLEEP)
7525 pci_set_power_state(pdev, PCI_D3hot);
7526 }
7527
7528 int ata_pci_device_do_resume(struct pci_dev *pdev)
7529 {
7530 int rc;
7531
7532 pci_set_power_state(pdev, PCI_D0);
7533 pci_restore_state(pdev);
7534
7535 rc = pcim_enable_device(pdev);
7536 if (rc) {
7537 dev_printk(KERN_ERR, &pdev->dev,
7538 "failed to enable device after resume (%d)\n", rc);
7539 return rc;
7540 }
7541
7542 pci_set_master(pdev);
7543 return 0;
7544 }
7545
7546 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
7547 {
7548 struct ata_host *host = dev_get_drvdata(&pdev->dev);
7549 int rc = 0;
7550
7551 rc = ata_host_suspend(host, mesg);
7552 if (rc)
7553 return rc;
7554
7555 ata_pci_device_do_suspend(pdev, mesg);
7556
7557 return 0;
7558 }
7559
7560 int ata_pci_device_resume(struct pci_dev *pdev)
7561 {
7562 struct ata_host *host = dev_get_drvdata(&pdev->dev);
7563 int rc;
7564
7565 rc = ata_pci_device_do_resume(pdev);
7566 if (rc == 0)
7567 ata_host_resume(host);
7568 return rc;
7569 }
7570 #endif /* CONFIG_PM */
7571
7572 #endif /* CONFIG_PCI */
7573
7574 static int __init ata_parse_force_one(char **cur,
7575 struct ata_force_ent *force_ent,
7576 const char **reason)
7577 {
7578 /* FIXME: Currently, there's no way to tag init const data and
7579 * using __initdata causes build failure on some versions of
7580 * gcc. Once __initdataconst is implemented, add const to the
7581 * following structure.
7582 */
7583 static struct ata_force_param force_tbl[] __initdata = {
7584 { "40c", .cbl = ATA_CBL_PATA40 },
7585 { "80c", .cbl = ATA_CBL_PATA80 },
7586 { "short40c", .cbl = ATA_CBL_PATA40_SHORT },
7587 { "unk", .cbl = ATA_CBL_PATA_UNK },
7588 { "ign", .cbl = ATA_CBL_PATA_IGN },
7589 { "sata", .cbl = ATA_CBL_SATA },
7590 { "1.5Gbps", .spd_limit = 1 },
7591 { "3.0Gbps", .spd_limit = 2 },
7592 { "noncq", .horkage_on = ATA_HORKAGE_NONCQ },
7593 { "ncq", .horkage_off = ATA_HORKAGE_NONCQ },
7594 { "pio0", .xfer_mask = 1 << (ATA_SHIFT_PIO + 0) },
7595 { "pio1", .xfer_mask = 1 << (ATA_SHIFT_PIO + 1) },
7596 { "pio2", .xfer_mask = 1 << (ATA_SHIFT_PIO + 2) },
7597 { "pio3", .xfer_mask = 1 << (ATA_SHIFT_PIO + 3) },
7598 { "pio4", .xfer_mask = 1 << (ATA_SHIFT_PIO + 4) },
7599 { "pio5", .xfer_mask = 1 << (ATA_SHIFT_PIO + 5) },
7600 { "pio6", .xfer_mask = 1 << (ATA_SHIFT_PIO + 6) },
7601 { "mwdma0", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 0) },
7602 { "mwdma1", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 1) },
7603 { "mwdma2", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 2) },
7604 { "mwdma3", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 3) },
7605 { "mwdma4", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 4) },
7606 { "udma0", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
7607 { "udma16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
7608 { "udma/16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
7609 { "udma1", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
7610 { "udma25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
7611 { "udma/25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
7612 { "udma2", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
7613 { "udma33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
7614 { "udma/33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
7615 { "udma3", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
7616 { "udma44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
7617 { "udma/44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
7618 { "udma4", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
7619 { "udma66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
7620 { "udma/66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
7621 { "udma5", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
7622 { "udma100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
7623 { "udma/100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
7624 { "udma6", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
7625 { "udma133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
7626 { "udma/133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
7627 { "udma7", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 7) },
7628 };
7629 char *start = *cur, *p = *cur;
7630 char *id, *val, *endp;
7631 const struct ata_force_param *match_fp = NULL;
7632 int nr_matches = 0, i;
7633
7634 /* find where this param ends and update *cur */
7635 while (*p != '\0' && *p != ',')
7636 p++;
7637
7638 if (*p == '\0')
7639 *cur = p;
7640 else
7641 *cur = p + 1;
7642
7643 *p = '\0';
7644
7645 /* parse */
7646 p = strchr(start, ':');
7647 if (!p) {
7648 val = strstrip(start);
7649 goto parse_val;
7650 }
7651 *p = '\0';
7652
7653 id = strstrip(start);
7654 val = strstrip(p + 1);
7655
7656 /* parse id */
7657 p = strchr(id, '.');
7658 if (p) {
7659 *p++ = '\0';
7660 force_ent->device = simple_strtoul(p, &endp, 10);
7661 if (p == endp || *endp != '\0') {
7662 *reason = "invalid device";
7663 return -EINVAL;
7664 }
7665 }
7666
7667 force_ent->port = simple_strtoul(id, &endp, 10);
7668 if (p == endp || *endp != '\0') {
7669 *reason = "invalid port/link";
7670 return -EINVAL;
7671 }
7672
7673 parse_val:
7674 /* parse val, allow shortcuts so that both 1.5 and 1.5Gbps work */
7675 for (i = 0; i < ARRAY_SIZE(force_tbl); i++) {
7676 const struct ata_force_param *fp = &force_tbl[i];
7677
7678 if (strncasecmp(val, fp->name, strlen(val)))
7679 continue;
7680
7681 nr_matches++;
7682 match_fp = fp;
7683
7684 if (strcasecmp(val, fp->name) == 0) {
7685 nr_matches = 1;
7686 break;
7687 }
7688 }
7689
7690 if (!nr_matches) {
7691 *reason = "unknown value";
7692 return -EINVAL;
7693 }
7694 if (nr_matches > 1) {
7695 *reason = "ambigious value";
7696 return -EINVAL;
7697 }
7698
7699 force_ent->param = *match_fp;
7700
7701 return 0;
7702 }
7703
7704 static void __init ata_parse_force_param(void)
7705 {
7706 int idx = 0, size = 1;
7707 int last_port = -1, last_device = -1;
7708 char *p, *cur, *next;
7709
7710 /* calculate maximum number of params and allocate force_tbl */
7711 for (p = ata_force_param_buf; *p; p++)
7712 if (*p == ',')
7713 size++;
7714
7715 ata_force_tbl = kzalloc(sizeof(ata_force_tbl[0]) * size, GFP_KERNEL);
7716 if (!ata_force_tbl) {
7717 printk(KERN_WARNING "ata: failed to extend force table, "
7718 "libata.force ignored\n");
7719 return;
7720 }
7721
7722 /* parse and populate the table */
7723 for (cur = ata_force_param_buf; *cur != '\0'; cur = next) {
7724 const char *reason = "";
7725 struct ata_force_ent te = { .port = -1, .device = -1 };
7726
7727 next = cur;
7728 if (ata_parse_force_one(&next, &te, &reason)) {
7729 printk(KERN_WARNING "ata: failed to parse force "
7730 "parameter \"%s\" (%s)\n",
7731 cur, reason);
7732 continue;
7733 }
7734
7735 if (te.port == -1) {
7736 te.port = last_port;
7737 te.device = last_device;
7738 }
7739
7740 ata_force_tbl[idx++] = te;
7741
7742 last_port = te.port;
7743 last_device = te.device;
7744 }
7745
7746 ata_force_tbl_size = idx;
7747 }
7748
7749 static int __init ata_init(void)
7750 {
7751 ata_probe_timeout *= HZ;
7752
7753 ata_parse_force_param();
7754
7755 ata_wq = create_workqueue("ata");
7756 if (!ata_wq)
7757 return -ENOMEM;
7758
7759 ata_aux_wq = create_singlethread_workqueue("ata_aux");
7760 if (!ata_aux_wq) {
7761 destroy_workqueue(ata_wq);
7762 return -ENOMEM;
7763 }
7764
7765 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
7766 return 0;
7767 }
7768
7769 static void __exit ata_exit(void)
7770 {
7771 kfree(ata_force_tbl);
7772 destroy_workqueue(ata_wq);
7773 destroy_workqueue(ata_aux_wq);
7774 }
7775
7776 subsys_initcall(ata_init);
7777 module_exit(ata_exit);
7778
7779 static unsigned long ratelimit_time;
7780 static DEFINE_SPINLOCK(ata_ratelimit_lock);
7781
7782 int ata_ratelimit(void)
7783 {
7784 int rc;
7785 unsigned long flags;
7786
7787 spin_lock_irqsave(&ata_ratelimit_lock, flags);
7788
7789 if (time_after(jiffies, ratelimit_time)) {
7790 rc = 1;
7791 ratelimit_time = jiffies + (HZ/5);
7792 } else
7793 rc = 0;
7794
7795 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
7796
7797 return rc;
7798 }
7799
7800 /**
7801 * ata_wait_register - wait until register value changes
7802 * @reg: IO-mapped register
7803 * @mask: Mask to apply to read register value
7804 * @val: Wait condition
7805 * @interval_msec: polling interval in milliseconds
7806 * @timeout_msec: timeout in milliseconds
7807 *
7808 * Waiting for some bits of register to change is a common
7809 * operation for ATA controllers. This function reads 32bit LE
7810 * IO-mapped register @reg and tests for the following condition.
7811 *
7812 * (*@reg & mask) != val
7813 *
7814 * If the condition is met, it returns; otherwise, the process is
7815 * repeated after @interval_msec until timeout.
7816 *
7817 * LOCKING:
7818 * Kernel thread context (may sleep)
7819 *
7820 * RETURNS:
7821 * The final register value.
7822 */
7823 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
7824 unsigned long interval_msec,
7825 unsigned long timeout_msec)
7826 {
7827 unsigned long timeout;
7828 u32 tmp;
7829
7830 tmp = ioread32(reg);
7831
7832 /* Calculate timeout _after_ the first read to make sure
7833 * preceding writes reach the controller before starting to
7834 * eat away the timeout.
7835 */
7836 timeout = jiffies + (timeout_msec * HZ) / 1000;
7837
7838 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
7839 msleep(interval_msec);
7840 tmp = ioread32(reg);
7841 }
7842
7843 return tmp;
7844 }
7845
7846 /*
7847 * Dummy port_ops
7848 */
7849 static void ata_dummy_noret(struct ata_port *ap) { }
7850 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
7851 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
7852
7853 static u8 ata_dummy_check_status(struct ata_port *ap)
7854 {
7855 return ATA_DRDY;
7856 }
7857
7858 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
7859 {
7860 return AC_ERR_SYSTEM;
7861 }
7862
7863 struct ata_port_operations ata_dummy_port_ops = {
7864 .check_status = ata_dummy_check_status,
7865 .check_altstatus = ata_dummy_check_status,
7866 .dev_select = ata_noop_dev_select,
7867 .qc_prep = ata_noop_qc_prep,
7868 .qc_issue = ata_dummy_qc_issue,
7869 .freeze = ata_dummy_noret,
7870 .thaw = ata_dummy_noret,
7871 .error_handler = ata_dummy_noret,
7872 .post_internal_cmd = ata_dummy_qc_noret,
7873 .irq_clear = ata_dummy_noret,
7874 .port_start = ata_dummy_ret0,
7875 .port_stop = ata_dummy_noret,
7876 };
7877
7878 const struct ata_port_info ata_dummy_port_info = {
7879 .port_ops = &ata_dummy_port_ops,
7880 };
7881
7882 /*
7883 * libata is essentially a library of internal helper functions for
7884 * low-level ATA host controller drivers. As such, the API/ABI is
7885 * likely to change as new drivers are added and updated.
7886 * Do not depend on ABI/API stability.
7887 */
7888 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
7889 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
7890 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
7891 EXPORT_SYMBOL_GPL(ata_base_port_ops);
7892 EXPORT_SYMBOL_GPL(sata_port_ops);
7893 EXPORT_SYMBOL_GPL(sata_pmp_port_ops);
7894 EXPORT_SYMBOL_GPL(ata_sff_port_ops);
7895 EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
7896 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
7897 EXPORT_SYMBOL_GPL(ata_dummy_port_info);
7898 EXPORT_SYMBOL_GPL(ata_std_bios_param);
7899 EXPORT_SYMBOL_GPL(ata_std_ports);
7900 EXPORT_SYMBOL_GPL(ata_host_init);
7901 EXPORT_SYMBOL_GPL(ata_host_alloc);
7902 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
7903 EXPORT_SYMBOL_GPL(ata_host_start);
7904 EXPORT_SYMBOL_GPL(ata_host_register);
7905 EXPORT_SYMBOL_GPL(ata_host_activate);
7906 EXPORT_SYMBOL_GPL(ata_host_detach);
7907 EXPORT_SYMBOL_GPL(ata_sg_init);
7908 EXPORT_SYMBOL_GPL(ata_hsm_move);
7909 EXPORT_SYMBOL_GPL(ata_qc_complete);
7910 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
7911 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
7912 EXPORT_SYMBOL_GPL(ata_tf_load);
7913 EXPORT_SYMBOL_GPL(ata_tf_read);
7914 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
7915 EXPORT_SYMBOL_GPL(ata_std_dev_select);
7916 EXPORT_SYMBOL_GPL(sata_print_link_status);
7917 EXPORT_SYMBOL_GPL(atapi_cmd_type);
7918 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
7919 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
7920 EXPORT_SYMBOL_GPL(ata_pack_xfermask);
7921 EXPORT_SYMBOL_GPL(ata_unpack_xfermask);
7922 EXPORT_SYMBOL_GPL(ata_xfer_mask2mode);
7923 EXPORT_SYMBOL_GPL(ata_xfer_mode2mask);
7924 EXPORT_SYMBOL_GPL(ata_xfer_mode2shift);
7925 EXPORT_SYMBOL_GPL(ata_mode_string);
7926 EXPORT_SYMBOL_GPL(ata_id_xfermask);
7927 EXPORT_SYMBOL_GPL(ata_check_status);
7928 EXPORT_SYMBOL_GPL(ata_altstatus);
7929 EXPORT_SYMBOL_GPL(ata_exec_command);
7930 EXPORT_SYMBOL_GPL(ata_port_start);
7931 EXPORT_SYMBOL_GPL(ata_sff_port_start);
7932 EXPORT_SYMBOL_GPL(ata_interrupt);
7933 EXPORT_SYMBOL_GPL(ata_do_set_mode);
7934 EXPORT_SYMBOL_GPL(ata_data_xfer);
7935 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
7936 EXPORT_SYMBOL_GPL(ata_std_qc_defer);
7937 EXPORT_SYMBOL_GPL(ata_qc_prep);
7938 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);
7939 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
7940 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
7941 EXPORT_SYMBOL_GPL(ata_bmdma_start);
7942 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
7943 EXPORT_SYMBOL_GPL(ata_noop_irq_clear);
7944 EXPORT_SYMBOL_GPL(ata_bmdma_status);
7945 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
7946 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
7947 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
7948 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
7949 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
7950 EXPORT_SYMBOL_GPL(ata_port_probe);
7951 EXPORT_SYMBOL_GPL(ata_dev_disable);
7952 EXPORT_SYMBOL_GPL(sata_set_spd);
7953 EXPORT_SYMBOL_GPL(sata_link_debounce);
7954 EXPORT_SYMBOL_GPL(sata_link_resume);
7955 EXPORT_SYMBOL_GPL(ata_bus_reset);
7956 EXPORT_SYMBOL_GPL(ata_std_prereset);
7957 EXPORT_SYMBOL_GPL(ata_std_softreset);
7958 EXPORT_SYMBOL_GPL(sata_link_hardreset);
7959 EXPORT_SYMBOL_GPL(sata_std_hardreset);
7960 EXPORT_SYMBOL_GPL(ata_std_postreset);
7961 EXPORT_SYMBOL_GPL(ata_dev_classify);
7962 EXPORT_SYMBOL_GPL(ata_dev_pair);
7963 EXPORT_SYMBOL_GPL(ata_port_disable);
7964 EXPORT_SYMBOL_GPL(ata_ratelimit);
7965 EXPORT_SYMBOL_GPL(ata_wait_register);
7966 EXPORT_SYMBOL_GPL(ata_busy_sleep);
7967 EXPORT_SYMBOL_GPL(ata_wait_after_reset);
7968 EXPORT_SYMBOL_GPL(ata_wait_ready);
7969 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
7970 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
7971 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
7972 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
7973 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
7974 EXPORT_SYMBOL_GPL(ata_host_intr);
7975 EXPORT_SYMBOL_GPL(sata_scr_valid);
7976 EXPORT_SYMBOL_GPL(sata_scr_read);
7977 EXPORT_SYMBOL_GPL(sata_scr_write);
7978 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
7979 EXPORT_SYMBOL_GPL(ata_link_online);
7980 EXPORT_SYMBOL_GPL(ata_link_offline);
7981 #ifdef CONFIG_PM
7982 EXPORT_SYMBOL_GPL(ata_host_suspend);
7983 EXPORT_SYMBOL_GPL(ata_host_resume);
7984 #endif /* CONFIG_PM */
7985 EXPORT_SYMBOL_GPL(ata_id_string);
7986 EXPORT_SYMBOL_GPL(ata_id_c_string);
7987 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
7988
7989 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
7990 EXPORT_SYMBOL_GPL(ata_timing_find_mode);
7991 EXPORT_SYMBOL_GPL(ata_timing_compute);
7992 EXPORT_SYMBOL_GPL(ata_timing_merge);
7993 EXPORT_SYMBOL_GPL(ata_timing_cycle2mode);
7994
7995 #ifdef CONFIG_PCI
7996 EXPORT_SYMBOL_GPL(pci_test_config_bits);
7997 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host);
7998 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma);
7999 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host);
8000 EXPORT_SYMBOL_GPL(ata_pci_activate_sff_host);
8001 EXPORT_SYMBOL_GPL(ata_pci_init_one);
8002 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
8003 #ifdef CONFIG_PM
8004 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
8005 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
8006 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
8007 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
8008 #endif /* CONFIG_PM */
8009 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
8010 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
8011 #endif /* CONFIG_PCI */
8012
8013 EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch);
8014 EXPORT_SYMBOL_GPL(sata_pmp_std_prereset);
8015 EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset);
8016 EXPORT_SYMBOL_GPL(sata_pmp_std_postreset);
8017 EXPORT_SYMBOL_GPL(sata_pmp_error_handler);
8018
8019 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
8020 EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
8021 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
8022 EXPORT_SYMBOL_GPL(ata_port_desc);
8023 #ifdef CONFIG_PCI
8024 EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
8025 #endif /* CONFIG_PCI */
8026 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
8027 EXPORT_SYMBOL_GPL(ata_link_abort);
8028 EXPORT_SYMBOL_GPL(ata_port_abort);
8029 EXPORT_SYMBOL_GPL(ata_port_freeze);
8030 EXPORT_SYMBOL_GPL(sata_async_notification);
8031 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
8032 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
8033 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
8034 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
8035 EXPORT_SYMBOL_GPL(ata_do_eh);
8036 EXPORT_SYMBOL_GPL(ata_std_error_handler);
8037 EXPORT_SYMBOL_GPL(ata_irq_on);
8038 EXPORT_SYMBOL_GPL(ata_dev_try_classify);
8039
8040 EXPORT_SYMBOL_GPL(ata_cable_40wire);
8041 EXPORT_SYMBOL_GPL(ata_cable_80wire);
8042 EXPORT_SYMBOL_GPL(ata_cable_unknown);
8043 EXPORT_SYMBOL_GPL(ata_cable_ignore);
8044 EXPORT_SYMBOL_GPL(ata_cable_sata);
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