2 * libata-sff.c - helper library for PCI IDE BMDMA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/pci.h>
37 #include <linux/libata.h>
38 #include <linux/highmem.h>
42 const struct ata_port_operations ata_sff_port_ops
= {
43 .inherits
= &ata_base_port_ops
,
45 .qc_prep
= ata_sff_qc_prep
,
46 .qc_issue
= ata_sff_qc_issue
,
48 .freeze
= ata_sff_freeze
,
50 .prereset
= ata_sff_prereset
,
51 .softreset
= ata_sff_softreset
,
52 .postreset
= ata_sff_postreset
,
53 .error_handler
= ata_sff_error_handler
,
54 .post_internal_cmd
= ata_sff_post_internal_cmd
,
56 .sff_dev_select
= ata_sff_dev_select
,
57 .sff_check_status
= ata_sff_check_status
,
58 .sff_tf_load
= ata_sff_tf_load
,
59 .sff_tf_read
= ata_sff_tf_read
,
60 .sff_exec_command
= ata_sff_exec_command
,
61 .sff_data_xfer
= ata_sff_data_xfer
,
62 .sff_irq_on
= ata_sff_irq_on
,
63 .sff_irq_clear
= ata_sff_irq_clear
,
65 .port_start
= ata_sff_port_start
,
68 const struct ata_port_operations ata_bmdma_port_ops
= {
69 .inherits
= &ata_sff_port_ops
,
71 .mode_filter
= ata_bmdma_mode_filter
,
73 .bmdma_setup
= ata_bmdma_setup
,
74 .bmdma_start
= ata_bmdma_start
,
75 .bmdma_stop
= ata_bmdma_stop
,
76 .bmdma_status
= ata_bmdma_status
,
80 * ata_fill_sg - Fill PCI IDE PRD table
81 * @qc: Metadata associated with taskfile to be transferred
83 * Fill PCI IDE PRD (scatter-gather) table with segments
84 * associated with the current disk command.
87 * spin_lock_irqsave(host lock)
90 static void ata_fill_sg(struct ata_queued_cmd
*qc
)
92 struct ata_port
*ap
= qc
->ap
;
93 struct scatterlist
*sg
;
97 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
101 /* determine if physical DMA addr spans 64K boundary.
102 * Note h/w doesn't support 64-bit, so we unconditionally
103 * truncate dma_addr_t to u32.
105 addr
= (u32
) sg_dma_address(sg
);
106 sg_len
= sg_dma_len(sg
);
109 offset
= addr
& 0xffff;
111 if ((offset
+ sg_len
) > 0x10000)
112 len
= 0x10000 - offset
;
114 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
115 ap
->prd
[pi
].flags_len
= cpu_to_le32(len
& 0xffff);
116 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
124 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
128 * ata_fill_sg_dumb - Fill PCI IDE PRD table
129 * @qc: Metadata associated with taskfile to be transferred
131 * Fill PCI IDE PRD (scatter-gather) table with segments
132 * associated with the current disk command. Perform the fill
133 * so that we avoid writing any length 64K records for
134 * controllers that don't follow the spec.
137 * spin_lock_irqsave(host lock)
140 static void ata_fill_sg_dumb(struct ata_queued_cmd
*qc
)
142 struct ata_port
*ap
= qc
->ap
;
143 struct scatterlist
*sg
;
147 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
149 u32 sg_len
, len
, blen
;
151 /* determine if physical DMA addr spans 64K boundary.
152 * Note h/w doesn't support 64-bit, so we unconditionally
153 * truncate dma_addr_t to u32.
155 addr
= (u32
) sg_dma_address(sg
);
156 sg_len
= sg_dma_len(sg
);
159 offset
= addr
& 0xffff;
161 if ((offset
+ sg_len
) > 0x10000)
162 len
= 0x10000 - offset
;
165 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
167 /* Some PATA chipsets like the CS5530 can't
168 cope with 0x0000 meaning 64K as the spec says */
169 ap
->prd
[pi
].flags_len
= cpu_to_le32(0x8000);
171 ap
->prd
[++pi
].addr
= cpu_to_le32(addr
+ 0x8000);
173 ap
->prd
[pi
].flags_len
= cpu_to_le32(blen
);
174 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
182 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
186 * ata_sff_qc_prep - Prepare taskfile for submission
187 * @qc: Metadata associated with taskfile to be prepared
189 * Prepare ATA taskfile for submission.
192 * spin_lock_irqsave(host lock)
194 void ata_sff_qc_prep(struct ata_queued_cmd
*qc
)
196 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
203 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
204 * @qc: Metadata associated with taskfile to be prepared
206 * Prepare ATA taskfile for submission.
209 * spin_lock_irqsave(host lock)
211 void ata_sff_dumb_qc_prep(struct ata_queued_cmd
*qc
)
213 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
216 ata_fill_sg_dumb(qc
);
220 * ata_sff_check_status - Read device status reg & clear interrupt
221 * @ap: port where the device is
223 * Reads ATA taskfile status register for currently-selected device
224 * and return its value. This also clears pending interrupts
228 * Inherited from caller.
230 u8
ata_sff_check_status(struct ata_port
*ap
)
232 return ioread8(ap
->ioaddr
.status_addr
);
236 * ata_sff_altstatus - Read device alternate status reg
237 * @ap: port where the device is
239 * Reads ATA taskfile alternate status register for
240 * currently-selected device and return its value.
242 * Note: may NOT be used as the check_altstatus() entry in
243 * ata_port_operations.
246 * Inherited from caller.
248 u8
ata_sff_altstatus(struct ata_port
*ap
)
250 if (ap
->ops
->sff_check_altstatus
)
251 return ap
->ops
->sff_check_altstatus(ap
);
253 return ioread8(ap
->ioaddr
.altstatus_addr
);
257 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
258 * @ap: port containing status register to be polled
259 * @tmout_pat: impatience timeout
260 * @tmout: overall timeout
262 * Sleep until ATA Status register bit BSY clears,
263 * or a timeout occurs.
266 * Kernel thread context (may sleep).
269 * 0 on success, -errno otherwise.
271 int ata_sff_busy_sleep(struct ata_port
*ap
,
272 unsigned long tmout_pat
, unsigned long tmout
)
274 unsigned long timer_start
, timeout
;
277 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 300);
278 timer_start
= jiffies
;
279 timeout
= timer_start
+ tmout_pat
;
280 while (status
!= 0xff && (status
& ATA_BUSY
) &&
281 time_before(jiffies
, timeout
)) {
283 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 3);
286 if (status
!= 0xff && (status
& ATA_BUSY
))
287 ata_port_printk(ap
, KERN_WARNING
,
288 "port is slow to respond, please be patient "
289 "(Status 0x%x)\n", status
);
291 timeout
= timer_start
+ tmout
;
292 while (status
!= 0xff && (status
& ATA_BUSY
) &&
293 time_before(jiffies
, timeout
)) {
295 status
= ap
->ops
->sff_check_status(ap
);
301 if (status
& ATA_BUSY
) {
302 ata_port_printk(ap
, KERN_ERR
, "port failed to respond "
303 "(%lu secs, Status 0x%x)\n",
312 * ata_sff_wait_ready - sleep until BSY clears, or timeout
313 * @ap: port containing status register to be polled
314 * @deadline: deadline jiffies for the operation
316 * Sleep until ATA Status register bit BSY clears, or timeout
320 * Kernel thread context (may sleep).
323 * 0 on success, -errno otherwise.
325 int ata_sff_wait_ready(struct ata_port
*ap
, unsigned long deadline
)
327 unsigned long start
= jiffies
;
331 u8 status
= ap
->ops
->sff_check_status(ap
);
332 unsigned long now
= jiffies
;
334 if (!(status
& ATA_BUSY
))
336 if (!ata_link_online(&ap
->link
) && status
== 0xff)
338 if (time_after(now
, deadline
))
341 if (!warned
&& time_after(now
, start
+ 5 * HZ
) &&
342 (deadline
- now
> 3 * HZ
)) {
343 ata_port_printk(ap
, KERN_WARNING
,
344 "port is slow to respond, please be patient "
345 "(Status 0x%x)\n", status
);
354 * ata_sff_dev_select - Select device 0/1 on ATA bus
355 * @ap: ATA channel to manipulate
356 * @device: ATA device (numbered from zero) to select
358 * Use the method defined in the ATA specification to
359 * make either device 0, or device 1, active on the
360 * ATA channel. Works with both PIO and MMIO.
362 * May be used as the dev_select() entry in ata_port_operations.
367 void ata_sff_dev_select(struct ata_port
*ap
, unsigned int device
)
372 tmp
= ATA_DEVICE_OBS
;
374 tmp
= ATA_DEVICE_OBS
| ATA_DEV1
;
376 iowrite8(tmp
, ap
->ioaddr
.device_addr
);
377 ata_sff_pause(ap
); /* needed; also flushes, for mmio */
381 * ata_dev_select - Select device 0/1 on ATA bus
382 * @ap: ATA channel to manipulate
383 * @device: ATA device (numbered from zero) to select
384 * @wait: non-zero to wait for Status register BSY bit to clear
385 * @can_sleep: non-zero if context allows sleeping
387 * Use the method defined in the ATA specification to
388 * make either device 0, or device 1, active on the
391 * This is a high-level version of ata_sff_dev_select(), which
392 * additionally provides the services of inserting the proper
393 * pauses and status polling, where needed.
398 void ata_dev_select(struct ata_port
*ap
, unsigned int device
,
399 unsigned int wait
, unsigned int can_sleep
)
401 if (ata_msg_probe(ap
))
402 ata_port_printk(ap
, KERN_INFO
, "ata_dev_select: ENTER, "
403 "device %u, wait %u\n", device
, wait
);
408 ap
->ops
->sff_dev_select(ap
, device
);
411 if (can_sleep
&& ap
->link
.device
[device
].class == ATA_DEV_ATAPI
)
418 * ata_sff_irq_on - Enable interrupts on a port.
419 * @ap: Port on which interrupts are enabled.
421 * Enable interrupts on a legacy IDE device using MMIO or PIO,
422 * wait for idle, clear any pending interrupts.
425 * Inherited from caller.
427 u8
ata_sff_irq_on(struct ata_port
*ap
)
429 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
432 ap
->ctl
&= ~ATA_NIEN
;
433 ap
->last_ctl
= ap
->ctl
;
435 if (ioaddr
->ctl_addr
)
436 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
437 tmp
= ata_wait_idle(ap
);
439 ap
->ops
->sff_irq_clear(ap
);
445 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
446 * @ap: Port associated with this ATA transaction.
448 * Clear interrupt and error flags in DMA status register.
450 * May be used as the irq_clear() entry in ata_port_operations.
453 * spin_lock_irqsave(host lock)
455 void ata_sff_irq_clear(struct ata_port
*ap
)
457 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
462 iowrite8(ioread8(mmio
+ ATA_DMA_STATUS
), mmio
+ ATA_DMA_STATUS
);
466 * ata_sff_tf_load - send taskfile registers to host controller
467 * @ap: Port to which output is sent
468 * @tf: ATA taskfile register set
470 * Outputs ATA taskfile to standard ATA host controller.
473 * Inherited from caller.
475 void ata_sff_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
477 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
478 unsigned int is_addr
= tf
->flags
& ATA_TFLAG_ISADDR
;
480 if (tf
->ctl
!= ap
->last_ctl
) {
481 if (ioaddr
->ctl_addr
)
482 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
483 ap
->last_ctl
= tf
->ctl
;
487 if (is_addr
&& (tf
->flags
& ATA_TFLAG_LBA48
)) {
488 WARN_ON(!ioaddr
->ctl_addr
);
489 iowrite8(tf
->hob_feature
, ioaddr
->feature_addr
);
490 iowrite8(tf
->hob_nsect
, ioaddr
->nsect_addr
);
491 iowrite8(tf
->hob_lbal
, ioaddr
->lbal_addr
);
492 iowrite8(tf
->hob_lbam
, ioaddr
->lbam_addr
);
493 iowrite8(tf
->hob_lbah
, ioaddr
->lbah_addr
);
494 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
503 iowrite8(tf
->feature
, ioaddr
->feature_addr
);
504 iowrite8(tf
->nsect
, ioaddr
->nsect_addr
);
505 iowrite8(tf
->lbal
, ioaddr
->lbal_addr
);
506 iowrite8(tf
->lbam
, ioaddr
->lbam_addr
);
507 iowrite8(tf
->lbah
, ioaddr
->lbah_addr
);
508 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
516 if (tf
->flags
& ATA_TFLAG_DEVICE
) {
517 iowrite8(tf
->device
, ioaddr
->device_addr
);
518 VPRINTK("device 0x%X\n", tf
->device
);
525 * ata_sff_tf_read - input device's ATA taskfile shadow registers
526 * @ap: Port from which input is read
527 * @tf: ATA taskfile register set for storing input
529 * Reads ATA taskfile registers for currently-selected device
530 * into @tf. Assumes the device has a fully SFF compliant task file
531 * layout and behaviour. If you device does not (eg has a different
532 * status method) then you will need to provide a replacement tf_read
535 * Inherited from caller.
537 void ata_sff_tf_read(struct ata_port
*ap
, struct ata_taskfile
*tf
)
539 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
541 tf
->command
= ata_sff_check_status(ap
);
542 tf
->feature
= ioread8(ioaddr
->error_addr
);
543 tf
->nsect
= ioread8(ioaddr
->nsect_addr
);
544 tf
->lbal
= ioread8(ioaddr
->lbal_addr
);
545 tf
->lbam
= ioread8(ioaddr
->lbam_addr
);
546 tf
->lbah
= ioread8(ioaddr
->lbah_addr
);
547 tf
->device
= ioread8(ioaddr
->device_addr
);
549 if (tf
->flags
& ATA_TFLAG_LBA48
) {
550 if (likely(ioaddr
->ctl_addr
)) {
551 iowrite8(tf
->ctl
| ATA_HOB
, ioaddr
->ctl_addr
);
552 tf
->hob_feature
= ioread8(ioaddr
->error_addr
);
553 tf
->hob_nsect
= ioread8(ioaddr
->nsect_addr
);
554 tf
->hob_lbal
= ioread8(ioaddr
->lbal_addr
);
555 tf
->hob_lbam
= ioread8(ioaddr
->lbam_addr
);
556 tf
->hob_lbah
= ioread8(ioaddr
->lbah_addr
);
557 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
558 ap
->last_ctl
= tf
->ctl
;
565 * ata_sff_exec_command - issue ATA command to host controller
566 * @ap: port to which command is being issued
567 * @tf: ATA taskfile register set
569 * Issues ATA command, with proper synchronization with interrupt
570 * handler / other threads.
573 * spin_lock_irqsave(host lock)
575 void ata_sff_exec_command(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
577 DPRINTK("ata%u: cmd 0x%X\n", ap
->print_id
, tf
->command
);
579 iowrite8(tf
->command
, ap
->ioaddr
.command_addr
);
584 * ata_tf_to_host - issue ATA taskfile to host controller
585 * @ap: port to which command is being issued
586 * @tf: ATA taskfile register set
588 * Issues ATA taskfile register set to ATA host controller,
589 * with proper synchronization with interrupt handler and
593 * spin_lock_irqsave(host lock)
595 static inline void ata_tf_to_host(struct ata_port
*ap
,
596 const struct ata_taskfile
*tf
)
598 ap
->ops
->sff_tf_load(ap
, tf
);
599 ap
->ops
->sff_exec_command(ap
, tf
);
603 * ata_sff_data_xfer - Transfer data by PIO
604 * @dev: device to target
606 * @buflen: buffer length
609 * Transfer data from/to the device data register by PIO.
612 * Inherited from caller.
617 unsigned int ata_sff_data_xfer(struct ata_device
*dev
, unsigned char *buf
,
618 unsigned int buflen
, int rw
)
620 struct ata_port
*ap
= dev
->link
->ap
;
621 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
622 unsigned int words
= buflen
>> 1;
624 /* Transfer multiple of 2 bytes */
626 ioread16_rep(data_addr
, buf
, words
);
628 iowrite16_rep(data_addr
, buf
, words
);
630 /* Transfer trailing 1 byte, if any. */
631 if (unlikely(buflen
& 0x01)) {
632 __le16 align_buf
[1] = { 0 };
633 unsigned char *trailing_buf
= buf
+ buflen
- 1;
636 align_buf
[0] = cpu_to_le16(ioread16(data_addr
));
637 memcpy(trailing_buf
, align_buf
, 1);
639 memcpy(align_buf
, trailing_buf
, 1);
640 iowrite16(le16_to_cpu(align_buf
[0]), data_addr
);
649 * ata_sff_data_xfer_noirq - Transfer data by PIO
650 * @dev: device to target
652 * @buflen: buffer length
655 * Transfer data from/to the device data register by PIO. Do the
656 * transfer with interrupts disabled.
659 * Inherited from caller.
664 unsigned int ata_sff_data_xfer_noirq(struct ata_device
*dev
, unsigned char *buf
,
665 unsigned int buflen
, int rw
)
668 unsigned int consumed
;
670 local_irq_save(flags
);
671 consumed
= ata_sff_data_xfer(dev
, buf
, buflen
, rw
);
672 local_irq_restore(flags
);
678 * ata_pio_sector - Transfer a sector of data.
679 * @qc: Command on going
681 * Transfer qc->sect_size bytes of data from/to the ATA device.
684 * Inherited from caller.
686 static void ata_pio_sector(struct ata_queued_cmd
*qc
)
688 int do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
689 struct ata_port
*ap
= qc
->ap
;
694 if (qc
->curbytes
== qc
->nbytes
- qc
->sect_size
)
695 ap
->hsm_task_state
= HSM_ST_LAST
;
697 page
= sg_page(qc
->cursg
);
698 offset
= qc
->cursg
->offset
+ qc
->cursg_ofs
;
700 /* get the current page and offset */
701 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
704 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
706 if (PageHighMem(page
)) {
709 /* FIXME: use a bounce buffer */
710 local_irq_save(flags
);
711 buf
= kmap_atomic(page
, KM_IRQ0
);
713 /* do the actual data transfer */
714 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
717 kunmap_atomic(buf
, KM_IRQ0
);
718 local_irq_restore(flags
);
720 buf
= page_address(page
);
721 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
725 qc
->curbytes
+= qc
->sect_size
;
726 qc
->cursg_ofs
+= qc
->sect_size
;
728 if (qc
->cursg_ofs
== qc
->cursg
->length
) {
729 qc
->cursg
= sg_next(qc
->cursg
);
735 * ata_pio_sectors - Transfer one or many sectors.
736 * @qc: Command on going
738 * Transfer one or many sectors of data from/to the
739 * ATA device for the DRQ request.
742 * Inherited from caller.
744 static void ata_pio_sectors(struct ata_queued_cmd
*qc
)
746 if (is_multi_taskfile(&qc
->tf
)) {
747 /* READ/WRITE MULTIPLE */
750 WARN_ON(qc
->dev
->multi_count
== 0);
752 nsect
= min((qc
->nbytes
- qc
->curbytes
) / qc
->sect_size
,
753 qc
->dev
->multi_count
);
759 ata_sff_altstatus(qc
->ap
); /* flush */
763 * atapi_send_cdb - Write CDB bytes to hardware
764 * @ap: Port to which ATAPI device is attached.
765 * @qc: Taskfile currently active
767 * When device has indicated its readiness to accept
768 * a CDB, this function is called. Send the CDB.
773 static void atapi_send_cdb(struct ata_port
*ap
, struct ata_queued_cmd
*qc
)
776 DPRINTK("send cdb\n");
777 WARN_ON(qc
->dev
->cdb_len
< 12);
779 ap
->ops
->sff_data_xfer(qc
->dev
, qc
->cdb
, qc
->dev
->cdb_len
, 1);
780 ata_sff_altstatus(ap
); /* flush */
782 switch (qc
->tf
.protocol
) {
784 ap
->hsm_task_state
= HSM_ST
;
786 case ATAPI_PROT_NODATA
:
787 ap
->hsm_task_state
= HSM_ST_LAST
;
790 ap
->hsm_task_state
= HSM_ST_LAST
;
792 ap
->ops
->bmdma_start(qc
);
798 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
799 * @qc: Command on going
800 * @bytes: number of bytes
802 * Transfer Transfer data from/to the ATAPI device.
805 * Inherited from caller.
808 static int __atapi_pio_bytes(struct ata_queued_cmd
*qc
, unsigned int bytes
)
810 int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? WRITE
: READ
;
811 struct ata_port
*ap
= qc
->ap
;
812 struct ata_device
*dev
= qc
->dev
;
813 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
814 struct scatterlist
*sg
;
817 unsigned int offset
, count
, consumed
;
822 ata_ehi_push_desc(ehi
, "unexpected or too much trailing data "
823 "buf=%u cur=%u bytes=%u",
824 qc
->nbytes
, qc
->curbytes
, bytes
);
829 offset
= sg
->offset
+ qc
->cursg_ofs
;
831 /* get the current page and offset */
832 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
835 /* don't overrun current sg */
836 count
= min(sg
->length
- qc
->cursg_ofs
, bytes
);
838 /* don't cross page boundaries */
839 count
= min(count
, (unsigned int)PAGE_SIZE
- offset
);
841 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
843 if (PageHighMem(page
)) {
846 /* FIXME: use bounce buffer */
847 local_irq_save(flags
);
848 buf
= kmap_atomic(page
, KM_IRQ0
);
850 /* do the actual data transfer */
851 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
, count
, rw
);
853 kunmap_atomic(buf
, KM_IRQ0
);
854 local_irq_restore(flags
);
856 buf
= page_address(page
);
857 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
, count
, rw
);
860 bytes
-= min(bytes
, consumed
);
861 qc
->curbytes
+= count
;
862 qc
->cursg_ofs
+= count
;
864 if (qc
->cursg_ofs
== sg
->length
) {
865 qc
->cursg
= sg_next(qc
->cursg
);
869 /* consumed can be larger than count only for the last transfer */
870 WARN_ON(qc
->cursg
&& count
!= consumed
);
878 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
879 * @qc: Command on going
881 * Transfer Transfer data from/to the ATAPI device.
884 * Inherited from caller.
886 static void atapi_pio_bytes(struct ata_queued_cmd
*qc
)
888 struct ata_port
*ap
= qc
->ap
;
889 struct ata_device
*dev
= qc
->dev
;
890 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
891 unsigned int ireason
, bc_lo
, bc_hi
, bytes
;
892 int i_write
, do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? 1 : 0;
894 /* Abuse qc->result_tf for temp storage of intermediate TF
895 * here to save some kernel stack usage.
896 * For normal completion, qc->result_tf is not relevant. For
897 * error, qc->result_tf is later overwritten by ata_qc_complete().
898 * So, the correctness of qc->result_tf is not affected.
900 ap
->ops
->sff_tf_read(ap
, &qc
->result_tf
);
901 ireason
= qc
->result_tf
.nsect
;
902 bc_lo
= qc
->result_tf
.lbam
;
903 bc_hi
= qc
->result_tf
.lbah
;
904 bytes
= (bc_hi
<< 8) | bc_lo
;
906 /* shall be cleared to zero, indicating xfer of data */
907 if (unlikely(ireason
& (1 << 0)))
910 /* make sure transfer direction matches expected */
911 i_write
= ((ireason
& (1 << 1)) == 0) ? 1 : 0;
912 if (unlikely(do_write
!= i_write
))
915 if (unlikely(!bytes
))
918 VPRINTK("ata%u: xfering %d bytes\n", ap
->print_id
, bytes
);
920 if (unlikely(__atapi_pio_bytes(qc
, bytes
)))
922 ata_sff_altstatus(ap
); /* flush */
927 ata_ehi_push_desc(ehi
, "ATAPI check failed (ireason=0x%x bytes=%u)",
930 qc
->err_mask
|= AC_ERR_HSM
;
931 ap
->hsm_task_state
= HSM_ST_ERR
;
935 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
936 * @ap: the target ata_port
940 * 1 if ok in workqueue, 0 otherwise.
942 static inline int ata_hsm_ok_in_wq(struct ata_port
*ap
, struct ata_queued_cmd
*qc
)
944 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
947 if (ap
->hsm_task_state
== HSM_ST_FIRST
) {
948 if (qc
->tf
.protocol
== ATA_PROT_PIO
&&
949 (qc
->tf
.flags
& ATA_TFLAG_WRITE
))
952 if (ata_is_atapi(qc
->tf
.protocol
) &&
953 !(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
961 * ata_hsm_qc_complete - finish a qc running on standard HSM
962 * @qc: Command to complete
963 * @in_wq: 1 if called from workqueue, 0 otherwise
965 * Finish @qc which is running on standard HSM.
968 * If @in_wq is zero, spin_lock_irqsave(host lock).
969 * Otherwise, none on entry and grabs host lock.
971 static void ata_hsm_qc_complete(struct ata_queued_cmd
*qc
, int in_wq
)
973 struct ata_port
*ap
= qc
->ap
;
976 if (ap
->ops
->error_handler
) {
978 spin_lock_irqsave(ap
->lock
, flags
);
980 /* EH might have kicked in while host lock is
983 qc
= ata_qc_from_tag(ap
, qc
->tag
);
985 if (likely(!(qc
->err_mask
& AC_ERR_HSM
))) {
986 ap
->ops
->sff_irq_on(ap
);
992 spin_unlock_irqrestore(ap
->lock
, flags
);
994 if (likely(!(qc
->err_mask
& AC_ERR_HSM
)))
1001 spin_lock_irqsave(ap
->lock
, flags
);
1002 ap
->ops
->sff_irq_on(ap
);
1003 ata_qc_complete(qc
);
1004 spin_unlock_irqrestore(ap
->lock
, flags
);
1006 ata_qc_complete(qc
);
1011 * ata_sff_hsm_move - move the HSM to the next state.
1012 * @ap: the target ata_port
1014 * @status: current device status
1015 * @in_wq: 1 if called from workqueue, 0 otherwise
1018 * 1 when poll next status needed, 0 otherwise.
1020 int ata_sff_hsm_move(struct ata_port
*ap
, struct ata_queued_cmd
*qc
,
1021 u8 status
, int in_wq
)
1023 unsigned long flags
= 0;
1026 WARN_ON((qc
->flags
& ATA_QCFLAG_ACTIVE
) == 0);
1028 /* Make sure ata_sff_qc_issue() does not throw things
1029 * like DMA polling into the workqueue. Notice that
1030 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1032 WARN_ON(in_wq
!= ata_hsm_ok_in_wq(ap
, qc
));
1035 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1036 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
, status
);
1038 switch (ap
->hsm_task_state
) {
1040 /* Send first data block or PACKET CDB */
1042 /* If polling, we will stay in the work queue after
1043 * sending the data. Otherwise, interrupt handler
1044 * takes over after sending the data.
1046 poll_next
= (qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1048 /* check device status */
1049 if (unlikely((status
& ATA_DRQ
) == 0)) {
1050 /* handle BSY=0, DRQ=0 as error */
1051 if (likely(status
& (ATA_ERR
| ATA_DF
)))
1052 /* device stops HSM for abort/error */
1053 qc
->err_mask
|= AC_ERR_DEV
;
1055 /* HSM violation. Let EH handle this */
1056 qc
->err_mask
|= AC_ERR_HSM
;
1058 ap
->hsm_task_state
= HSM_ST_ERR
;
1062 /* Device should not ask for data transfer (DRQ=1)
1063 * when it finds something wrong.
1064 * We ignore DRQ here and stop the HSM by
1065 * changing hsm_task_state to HSM_ST_ERR and
1066 * let the EH abort the command or reset the device.
1068 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1069 /* Some ATAPI tape drives forget to clear the ERR bit
1070 * when doing the next command (mostly request sense).
1071 * We ignore ERR here to workaround and proceed sending
1074 if (!(qc
->dev
->horkage
& ATA_HORKAGE_STUCK_ERR
)) {
1075 ata_port_printk(ap
, KERN_WARNING
,
1076 "DRQ=1 with device error, "
1077 "dev_stat 0x%X\n", status
);
1078 qc
->err_mask
|= AC_ERR_HSM
;
1079 ap
->hsm_task_state
= HSM_ST_ERR
;
1084 /* Send the CDB (atapi) or the first data block (ata pio out).
1085 * During the state transition, interrupt handler shouldn't
1086 * be invoked before the data transfer is complete and
1087 * hsm_task_state is changed. Hence, the following locking.
1090 spin_lock_irqsave(ap
->lock
, flags
);
1092 if (qc
->tf
.protocol
== ATA_PROT_PIO
) {
1093 /* PIO data out protocol.
1094 * send first data block.
1097 /* ata_pio_sectors() might change the state
1098 * to HSM_ST_LAST. so, the state is changed here
1099 * before ata_pio_sectors().
1101 ap
->hsm_task_state
= HSM_ST
;
1102 ata_pio_sectors(qc
);
1105 atapi_send_cdb(ap
, qc
);
1108 spin_unlock_irqrestore(ap
->lock
, flags
);
1110 /* if polling, ata_pio_task() handles the rest.
1111 * otherwise, interrupt handler takes over from here.
1116 /* complete command or read/write the data register */
1117 if (qc
->tf
.protocol
== ATAPI_PROT_PIO
) {
1118 /* ATAPI PIO protocol */
1119 if ((status
& ATA_DRQ
) == 0) {
1120 /* No more data to transfer or device error.
1121 * Device error will be tagged in HSM_ST_LAST.
1123 ap
->hsm_task_state
= HSM_ST_LAST
;
1127 /* Device should not ask for data transfer (DRQ=1)
1128 * when it finds something wrong.
1129 * We ignore DRQ here and stop the HSM by
1130 * changing hsm_task_state to HSM_ST_ERR and
1131 * let the EH abort the command or reset the device.
1133 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1134 ata_port_printk(ap
, KERN_WARNING
, "DRQ=1 with "
1135 "device error, dev_stat 0x%X\n",
1137 qc
->err_mask
|= AC_ERR_HSM
;
1138 ap
->hsm_task_state
= HSM_ST_ERR
;
1142 atapi_pio_bytes(qc
);
1144 if (unlikely(ap
->hsm_task_state
== HSM_ST_ERR
))
1145 /* bad ireason reported by device */
1149 /* ATA PIO protocol */
1150 if (unlikely((status
& ATA_DRQ
) == 0)) {
1151 /* handle BSY=0, DRQ=0 as error */
1152 if (likely(status
& (ATA_ERR
| ATA_DF
)))
1153 /* device stops HSM for abort/error */
1154 qc
->err_mask
|= AC_ERR_DEV
;
1156 /* HSM violation. Let EH handle this.
1157 * Phantom devices also trigger this
1158 * condition. Mark hint.
1160 qc
->err_mask
|= AC_ERR_HSM
|
1163 ap
->hsm_task_state
= HSM_ST_ERR
;
1167 /* For PIO reads, some devices may ask for
1168 * data transfer (DRQ=1) alone with ERR=1.
1169 * We respect DRQ here and transfer one
1170 * block of junk data before changing the
1171 * hsm_task_state to HSM_ST_ERR.
1173 * For PIO writes, ERR=1 DRQ=1 doesn't make
1174 * sense since the data block has been
1175 * transferred to the device.
1177 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1178 /* data might be corrputed */
1179 qc
->err_mask
|= AC_ERR_DEV
;
1181 if (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
)) {
1182 ata_pio_sectors(qc
);
1183 status
= ata_wait_idle(ap
);
1186 if (status
& (ATA_BUSY
| ATA_DRQ
))
1187 qc
->err_mask
|= AC_ERR_HSM
;
1189 /* ata_pio_sectors() might change the
1190 * state to HSM_ST_LAST. so, the state
1191 * is changed after ata_pio_sectors().
1193 ap
->hsm_task_state
= HSM_ST_ERR
;
1197 ata_pio_sectors(qc
);
1199 if (ap
->hsm_task_state
== HSM_ST_LAST
&&
1200 (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
))) {
1202 status
= ata_wait_idle(ap
);
1211 if (unlikely(!ata_ok(status
))) {
1212 qc
->err_mask
|= __ac_err_mask(status
);
1213 ap
->hsm_task_state
= HSM_ST_ERR
;
1217 /* no more data to transfer */
1218 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1219 ap
->print_id
, qc
->dev
->devno
, status
);
1221 WARN_ON(qc
->err_mask
);
1223 ap
->hsm_task_state
= HSM_ST_IDLE
;
1225 /* complete taskfile transaction */
1226 ata_hsm_qc_complete(qc
, in_wq
);
1232 /* make sure qc->err_mask is available to
1233 * know what's wrong and recover
1235 WARN_ON(qc
->err_mask
== 0);
1237 ap
->hsm_task_state
= HSM_ST_IDLE
;
1239 /* complete taskfile transaction */
1240 ata_hsm_qc_complete(qc
, in_wq
);
1252 void ata_pio_task(struct work_struct
*work
)
1254 struct ata_port
*ap
=
1255 container_of(work
, struct ata_port
, port_task
.work
);
1256 struct ata_queued_cmd
*qc
= ap
->port_task_data
;
1261 WARN_ON(ap
->hsm_task_state
== HSM_ST_IDLE
);
1264 * This is purely heuristic. This is a fast path.
1265 * Sometimes when we enter, BSY will be cleared in
1266 * a chk-status or two. If not, the drive is probably seeking
1267 * or something. Snooze for a couple msecs, then
1268 * chk-status again. If still busy, queue delayed work.
1270 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 5);
1271 if (status
& ATA_BUSY
) {
1273 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 10);
1274 if (status
& ATA_BUSY
) {
1275 ata_pio_queue_task(ap
, qc
, ATA_SHORT_PAUSE
);
1281 poll_next
= ata_sff_hsm_move(ap
, qc
, status
, 1);
1283 /* another command or interrupt handler
1284 * may be running at this point.
1291 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
1292 * @qc: command to issue to device
1294 * Using various libata functions and hooks, this function
1295 * starts an ATA command. ATA commands are grouped into
1296 * classes called "protocols", and issuing each type of protocol
1297 * is slightly different.
1299 * May be used as the qc_issue() entry in ata_port_operations.
1302 * spin_lock_irqsave(host lock)
1305 * Zero on success, AC_ERR_* mask on failure
1307 unsigned int ata_sff_qc_issue(struct ata_queued_cmd
*qc
)
1309 struct ata_port
*ap
= qc
->ap
;
1311 /* Use polling pio if the LLD doesn't handle
1312 * interrupt driven pio and atapi CDB interrupt.
1314 if (ap
->flags
& ATA_FLAG_PIO_POLLING
) {
1315 switch (qc
->tf
.protocol
) {
1317 case ATA_PROT_NODATA
:
1318 case ATAPI_PROT_PIO
:
1319 case ATAPI_PROT_NODATA
:
1320 qc
->tf
.flags
|= ATA_TFLAG_POLLING
;
1322 case ATAPI_PROT_DMA
:
1323 if (qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)
1324 /* see ata_dma_blacklisted() */
1332 /* select the device */
1333 ata_dev_select(ap
, qc
->dev
->devno
, 1, 0);
1335 /* start the command */
1336 switch (qc
->tf
.protocol
) {
1337 case ATA_PROT_NODATA
:
1338 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1339 ata_qc_set_polling(qc
);
1341 ata_tf_to_host(ap
, &qc
->tf
);
1342 ap
->hsm_task_state
= HSM_ST_LAST
;
1344 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1345 ata_pio_queue_task(ap
, qc
, 0);
1350 WARN_ON(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1352 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1353 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1354 ap
->ops
->bmdma_start(qc
); /* initiate bmdma */
1355 ap
->hsm_task_state
= HSM_ST_LAST
;
1359 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1360 ata_qc_set_polling(qc
);
1362 ata_tf_to_host(ap
, &qc
->tf
);
1364 if (qc
->tf
.flags
& ATA_TFLAG_WRITE
) {
1365 /* PIO data out protocol */
1366 ap
->hsm_task_state
= HSM_ST_FIRST
;
1367 ata_pio_queue_task(ap
, qc
, 0);
1369 /* always send first data block using
1370 * the ata_pio_task() codepath.
1373 /* PIO data in protocol */
1374 ap
->hsm_task_state
= HSM_ST
;
1376 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1377 ata_pio_queue_task(ap
, qc
, 0);
1379 /* if polling, ata_pio_task() handles the rest.
1380 * otherwise, interrupt handler takes over from here.
1386 case ATAPI_PROT_PIO
:
1387 case ATAPI_PROT_NODATA
:
1388 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1389 ata_qc_set_polling(qc
);
1391 ata_tf_to_host(ap
, &qc
->tf
);
1393 ap
->hsm_task_state
= HSM_ST_FIRST
;
1395 /* send cdb by polling if no cdb interrupt */
1396 if ((!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)) ||
1397 (qc
->tf
.flags
& ATA_TFLAG_POLLING
))
1398 ata_pio_queue_task(ap
, qc
, 0);
1401 case ATAPI_PROT_DMA
:
1402 WARN_ON(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1404 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1405 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1406 ap
->hsm_task_state
= HSM_ST_FIRST
;
1408 /* send cdb by polling if no cdb interrupt */
1409 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1410 ata_pio_queue_task(ap
, qc
, 0);
1415 return AC_ERR_SYSTEM
;
1422 * ata_sff_host_intr - Handle host interrupt for given (port, task)
1423 * @ap: Port on which interrupt arrived (possibly...)
1424 * @qc: Taskfile currently active in engine
1426 * Handle host interrupt for given queued command. Currently,
1427 * only DMA interrupts are handled. All other commands are
1428 * handled via polling with interrupts disabled (nIEN bit).
1431 * spin_lock_irqsave(host lock)
1434 * One if interrupt was handled, zero if not (shared irq).
1436 inline unsigned int ata_sff_host_intr(struct ata_port
*ap
,
1437 struct ata_queued_cmd
*qc
)
1439 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1440 u8 status
, host_stat
= 0;
1442 VPRINTK("ata%u: protocol %d task_state %d\n",
1443 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
);
1445 /* Check whether we are expecting interrupt in this state */
1446 switch (ap
->hsm_task_state
) {
1448 /* Some pre-ATAPI-4 devices assert INTRQ
1449 * at this state when ready to receive CDB.
1452 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1453 * The flag was turned on only for atapi devices. No
1454 * need to check ata_is_atapi(qc->tf.protocol) again.
1456 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1460 if (qc
->tf
.protocol
== ATA_PROT_DMA
||
1461 qc
->tf
.protocol
== ATAPI_PROT_DMA
) {
1462 /* check status of DMA engine */
1463 host_stat
= ap
->ops
->bmdma_status(ap
);
1464 VPRINTK("ata%u: host_stat 0x%X\n",
1465 ap
->print_id
, host_stat
);
1467 /* if it's not our irq... */
1468 if (!(host_stat
& ATA_DMA_INTR
))
1471 /* before we do anything else, clear DMA-Start bit */
1472 ap
->ops
->bmdma_stop(qc
);
1474 if (unlikely(host_stat
& ATA_DMA_ERR
)) {
1475 /* error when transfering data to/from memory */
1476 qc
->err_mask
|= AC_ERR_HOST_BUS
;
1477 ap
->hsm_task_state
= HSM_ST_ERR
;
1487 /* check altstatus */
1488 status
= ata_sff_altstatus(ap
);
1489 if (status
& ATA_BUSY
)
1492 /* check main status, clearing INTRQ */
1493 status
= ap
->ops
->sff_check_status(ap
);
1494 if (unlikely(status
& ATA_BUSY
))
1497 /* ack bmdma irq events */
1498 ap
->ops
->sff_irq_clear(ap
);
1500 ata_sff_hsm_move(ap
, qc
, status
, 0);
1502 if (unlikely(qc
->err_mask
) && (qc
->tf
.protocol
== ATA_PROT_DMA
||
1503 qc
->tf
.protocol
== ATAPI_PROT_DMA
))
1504 ata_ehi_push_desc(ehi
, "BMDMA stat 0x%x", host_stat
);
1506 return 1; /* irq handled */
1509 ap
->stats
.idle_irq
++;
1512 if ((ap
->stats
.idle_irq
% 1000) == 0) {
1513 ap
->ops
->sff_check_status(ap
);
1514 ap
->ops
->sff_irq_clear(ap
);
1515 ata_port_printk(ap
, KERN_WARNING
, "irq trap\n");
1519 return 0; /* irq not handled */
1523 * ata_sff_interrupt - Default ATA host interrupt handler
1524 * @irq: irq line (unused)
1525 * @dev_instance: pointer to our ata_host information structure
1527 * Default interrupt handler for PCI IDE devices. Calls
1528 * ata_sff_host_intr() for each port that is not disabled.
1531 * Obtains host lock during operation.
1534 * IRQ_NONE or IRQ_HANDLED.
1536 irqreturn_t
ata_sff_interrupt(int irq
, void *dev_instance
)
1538 struct ata_host
*host
= dev_instance
;
1540 unsigned int handled
= 0;
1541 unsigned long flags
;
1543 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1544 spin_lock_irqsave(&host
->lock
, flags
);
1546 for (i
= 0; i
< host
->n_ports
; i
++) {
1547 struct ata_port
*ap
;
1549 ap
= host
->ports
[i
];
1551 !(ap
->flags
& ATA_FLAG_DISABLED
)) {
1552 struct ata_queued_cmd
*qc
;
1554 qc
= ata_qc_from_tag(ap
, ap
->link
.active_tag
);
1555 if (qc
&& (!(qc
->tf
.flags
& ATA_TFLAG_POLLING
)) &&
1556 (qc
->flags
& ATA_QCFLAG_ACTIVE
))
1557 handled
|= ata_sff_host_intr(ap
, qc
);
1561 spin_unlock_irqrestore(&host
->lock
, flags
);
1563 return IRQ_RETVAL(handled
);
1567 * ata_sff_freeze - Freeze SFF controller port
1568 * @ap: port to freeze
1570 * Freeze BMDMA controller port.
1573 * Inherited from caller.
1575 void ata_sff_freeze(struct ata_port
*ap
)
1577 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1579 ap
->ctl
|= ATA_NIEN
;
1580 ap
->last_ctl
= ap
->ctl
;
1582 if (ioaddr
->ctl_addr
)
1583 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1585 /* Under certain circumstances, some controllers raise IRQ on
1586 * ATA_NIEN manipulation. Also, many controllers fail to mask
1587 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1589 ap
->ops
->sff_check_status(ap
);
1591 ap
->ops
->sff_irq_clear(ap
);
1595 * ata_sff_thaw - Thaw SFF controller port
1598 * Thaw SFF controller port.
1601 * Inherited from caller.
1603 void ata_sff_thaw(struct ata_port
*ap
)
1605 /* clear & re-enable interrupts */
1606 ap
->ops
->sff_check_status(ap
);
1607 ap
->ops
->sff_irq_clear(ap
);
1608 ap
->ops
->sff_irq_on(ap
);
1612 * ata_sff_prereset - prepare SFF link for reset
1613 * @link: SFF link to be reset
1614 * @deadline: deadline jiffies for the operation
1616 * SFF link @link is about to be reset. Initialize it. It first
1617 * calls ata_std_prereset() and wait for !BSY if the port is
1621 * Kernel thread context (may sleep)
1624 * 0 on success, -errno otherwise.
1626 int ata_sff_prereset(struct ata_link
*link
, unsigned long deadline
)
1628 struct ata_port
*ap
= link
->ap
;
1629 struct ata_eh_context
*ehc
= &link
->eh_context
;
1632 rc
= ata_std_prereset(link
, deadline
);
1636 /* if we're about to do hardreset, nothing more to do */
1637 if (ehc
->i
.action
& ATA_EH_HARDRESET
)
1640 /* wait for !BSY if we don't know that no device is attached */
1641 if (!ata_link_offline(link
)) {
1642 rc
= ata_sff_wait_ready(ap
, deadline
);
1643 if (rc
&& rc
!= -ENODEV
) {
1644 ata_link_printk(link
, KERN_WARNING
, "device not ready "
1645 "(errno=%d), forcing hardreset\n", rc
);
1646 ehc
->i
.action
|= ATA_EH_HARDRESET
;
1654 * ata_devchk - PATA device presence detection
1655 * @ap: ATA channel to examine
1656 * @device: Device to examine (starting at zero)
1658 * This technique was originally described in
1659 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1660 * later found its way into the ATA/ATAPI spec.
1662 * Write a pattern to the ATA shadow registers,
1663 * and if a device is present, it will respond by
1664 * correctly storing and echoing back the
1665 * ATA shadow register contents.
1670 static unsigned int ata_devchk(struct ata_port
*ap
, unsigned int device
)
1672 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1675 ap
->ops
->sff_dev_select(ap
, device
);
1677 iowrite8(0x55, ioaddr
->nsect_addr
);
1678 iowrite8(0xaa, ioaddr
->lbal_addr
);
1680 iowrite8(0xaa, ioaddr
->nsect_addr
);
1681 iowrite8(0x55, ioaddr
->lbal_addr
);
1683 iowrite8(0x55, ioaddr
->nsect_addr
);
1684 iowrite8(0xaa, ioaddr
->lbal_addr
);
1686 nsect
= ioread8(ioaddr
->nsect_addr
);
1687 lbal
= ioread8(ioaddr
->lbal_addr
);
1689 if ((nsect
== 0x55) && (lbal
== 0xaa))
1690 return 1; /* we found a device */
1692 return 0; /* nothing found */
1696 * ata_sff_dev_classify - Parse returned ATA device signature
1697 * @dev: ATA device to classify (starting at zero)
1698 * @present: device seems present
1699 * @r_err: Value of error register on completion
1701 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1702 * an ATA/ATAPI-defined set of values is placed in the ATA
1703 * shadow registers, indicating the results of device detection
1706 * Select the ATA device, and read the values from the ATA shadow
1707 * registers. Then parse according to the Error register value,
1708 * and the spec-defined values examined by ata_dev_classify().
1714 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1716 unsigned int ata_sff_dev_classify(struct ata_device
*dev
, int present
,
1719 struct ata_port
*ap
= dev
->link
->ap
;
1720 struct ata_taskfile tf
;
1724 ap
->ops
->sff_dev_select(ap
, dev
->devno
);
1726 memset(&tf
, 0, sizeof(tf
));
1728 ap
->ops
->sff_tf_read(ap
, &tf
);
1733 /* see if device passed diags: continue and warn later */
1735 /* diagnostic fail : do nothing _YET_ */
1736 dev
->horkage
|= ATA_HORKAGE_DIAGNOSTIC
;
1739 else if ((dev
->devno
== 0) && (err
== 0x81))
1742 return ATA_DEV_NONE
;
1744 /* determine if device is ATA or ATAPI */
1745 class = ata_dev_classify(&tf
);
1747 if (class == ATA_DEV_UNKNOWN
) {
1748 /* If the device failed diagnostic, it's likely to
1749 * have reported incorrect device signature too.
1750 * Assume ATA device if the device seems present but
1751 * device signature is invalid with diagnostic
1754 if (present
&& (dev
->horkage
& ATA_HORKAGE_DIAGNOSTIC
))
1755 class = ATA_DEV_ATA
;
1757 class = ATA_DEV_NONE
;
1758 } else if ((class == ATA_DEV_ATA
) &&
1759 (ap
->ops
->sff_check_status(ap
) == 0))
1760 class = ATA_DEV_NONE
;
1765 static int ata_bus_post_reset(struct ata_port
*ap
, unsigned int devmask
,
1766 unsigned long deadline
)
1768 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1769 unsigned int dev0
= devmask
& (1 << 0);
1770 unsigned int dev1
= devmask
& (1 << 1);
1773 /* if device 0 was found in ata_devchk, wait for its
1777 rc
= ata_sff_wait_ready(ap
, deadline
);
1785 /* if device 1 was found in ata_devchk, wait for register
1786 * access briefly, then wait for BSY to clear.
1791 ap
->ops
->sff_dev_select(ap
, 1);
1793 /* Wait for register access. Some ATAPI devices fail
1794 * to set nsect/lbal after reset, so don't waste too
1795 * much time on it. We're gonna wait for !BSY anyway.
1797 for (i
= 0; i
< 2; i
++) {
1800 nsect
= ioread8(ioaddr
->nsect_addr
);
1801 lbal
= ioread8(ioaddr
->lbal_addr
);
1802 if ((nsect
== 1) && (lbal
== 1))
1804 msleep(50); /* give drive a breather */
1807 rc
= ata_sff_wait_ready(ap
, deadline
);
1815 /* is all this really necessary? */
1816 ap
->ops
->sff_dev_select(ap
, 0);
1818 ap
->ops
->sff_dev_select(ap
, 1);
1820 ap
->ops
->sff_dev_select(ap
, 0);
1826 * ata_sff_wait_after_reset - wait before checking status after reset
1827 * @ap: port containing status register to be polled
1828 * @deadline: deadline jiffies for the operation
1830 * After reset, we need to pause a while before reading status.
1831 * Also, certain combination of controller and device report 0xff
1832 * for some duration (e.g. until SATA PHY is up and running)
1833 * which is interpreted as empty port in ATA world. This
1834 * function also waits for such devices to get out of 0xff
1838 * Kernel thread context (may sleep).
1840 void ata_sff_wait_after_reset(struct ata_port
*ap
, unsigned long deadline
)
1842 unsigned long until
= jiffies
+ ATA_TMOUT_FF_WAIT
;
1844 if (time_before(until
, deadline
))
1847 /* Spec mandates ">= 2ms" before checking status. We wait
1848 * 150ms, because that was the magic delay used for ATAPI
1849 * devices in Hale Landis's ATADRVR, for the period of time
1850 * between when the ATA command register is written, and then
1851 * status is checked. Because waiting for "a while" before
1852 * checking status is fine, post SRST, we perform this magic
1853 * delay here as well.
1855 * Old drivers/ide uses the 2mS rule and then waits for ready.
1859 /* Wait for 0xff to clear. Some SATA devices take a long time
1860 * to clear 0xff after reset. For example, HHD424020F7SV00
1861 * iVDR needs >= 800ms while. Quantum GoVault needs even more
1864 * Note that some PATA controllers (pata_ali) explode if
1865 * status register is read more than once when there's no
1868 if (ap
->flags
& ATA_FLAG_SATA
) {
1870 u8 status
= ap
->ops
->sff_check_status(ap
);
1872 if (status
!= 0xff || time_after(jiffies
, deadline
))
1880 static int ata_bus_softreset(struct ata_port
*ap
, unsigned int devmask
,
1881 unsigned long deadline
)
1883 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1885 DPRINTK("ata%u: bus reset via SRST\n", ap
->print_id
);
1887 /* software reset. causes dev0 to be selected */
1888 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1889 udelay(20); /* FIXME: flush */
1890 iowrite8(ap
->ctl
| ATA_SRST
, ioaddr
->ctl_addr
);
1891 udelay(20); /* FIXME: flush */
1892 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1894 /* wait a while before checking status */
1895 ata_sff_wait_after_reset(ap
, deadline
);
1897 /* Before we perform post reset processing we want to see if
1898 * the bus shows 0xFF because the odd clown forgets the D7
1899 * pulldown resistor.
1901 if (ap
->ops
->sff_check_status(ap
) == 0xFF)
1904 return ata_bus_post_reset(ap
, devmask
, deadline
);
1908 * ata_sff_softreset - reset host port via ATA SRST
1909 * @link: ATA link to reset
1910 * @classes: resulting classes of attached devices
1911 * @deadline: deadline jiffies for the operation
1913 * Reset host port using ATA SRST.
1916 * Kernel thread context (may sleep)
1919 * 0 on success, -errno otherwise.
1921 int ata_sff_softreset(struct ata_link
*link
, unsigned int *classes
,
1922 unsigned long deadline
)
1924 struct ata_port
*ap
= link
->ap
;
1925 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
1926 unsigned int devmask
= 0;
1932 if (ata_link_offline(link
)) {
1933 classes
[0] = ATA_DEV_NONE
;
1937 /* determine if device 0/1 are present */
1938 if (ata_devchk(ap
, 0))
1939 devmask
|= (1 << 0);
1940 if (slave_possible
&& ata_devchk(ap
, 1))
1941 devmask
|= (1 << 1);
1943 /* select device 0 again */
1944 ap
->ops
->sff_dev_select(ap
, 0);
1946 /* issue bus reset */
1947 DPRINTK("about to softreset, devmask=%x\n", devmask
);
1948 rc
= ata_bus_softreset(ap
, devmask
, deadline
);
1949 /* if link is occupied, -ENODEV too is an error */
1950 if (rc
&& (rc
!= -ENODEV
|| sata_scr_valid(link
))) {
1951 ata_link_printk(link
, KERN_ERR
, "SRST failed (errno=%d)\n", rc
);
1955 /* determine by signature whether we have ATA or ATAPI devices */
1956 classes
[0] = ata_sff_dev_classify(&link
->device
[0],
1957 devmask
& (1 << 0), &err
);
1958 if (slave_possible
&& err
!= 0x81)
1959 classes
[1] = ata_sff_dev_classify(&link
->device
[1],
1960 devmask
& (1 << 1), &err
);
1963 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes
[0], classes
[1]);
1968 * sata_sff_hardreset - reset host port via SATA phy reset
1969 * @link: link to reset
1970 * @class: resulting class of attached device
1971 * @deadline: deadline jiffies for the operation
1973 * SATA phy-reset host port using DET bits of SControl register,
1974 * wait for !BSY and classify the attached device.
1977 * Kernel thread context (may sleep)
1980 * 0 on success, -errno otherwise.
1982 int sata_sff_hardreset(struct ata_link
*link
, unsigned int *class,
1983 unsigned long deadline
)
1985 struct ata_port
*ap
= link
->ap
;
1986 const unsigned long *timing
= sata_ehc_deb_timing(&link
->eh_context
);
1992 rc
= sata_link_hardreset(link
, timing
, deadline
);
1994 ata_link_printk(link
, KERN_ERR
,
1995 "COMRESET failed (errno=%d)\n", rc
);
1999 /* TODO: phy layer with polling, timeouts, etc. */
2000 if (ata_link_offline(link
)) {
2001 *class = ATA_DEV_NONE
;
2002 DPRINTK("EXIT, link offline\n");
2006 /* wait a while before checking status */
2007 ata_sff_wait_after_reset(ap
, deadline
);
2009 /* If PMP is supported, we have to do follow-up SRST. Note
2010 * that some PMPs don't send D2H Reg FIS after hardreset at
2011 * all if the first port is empty. Wait for it just for a
2012 * second and request follow-up SRST.
2014 if (ap
->flags
& ATA_FLAG_PMP
) {
2015 ata_sff_wait_ready(ap
, jiffies
+ HZ
);
2019 rc
= ata_sff_wait_ready(ap
, deadline
);
2020 /* link occupied, -ENODEV too is an error */
2022 ata_link_printk(link
, KERN_ERR
,
2023 "COMRESET failed (errno=%d)\n", rc
);
2027 ap
->ops
->sff_dev_select(ap
, 0); /* probably unnecessary */
2029 *class = ata_sff_dev_classify(link
->device
, 1, NULL
);
2031 DPRINTK("EXIT, class=%u\n", *class);
2036 * ata_sff_postreset - SFF postreset callback
2037 * @link: the target SFF ata_link
2038 * @classes: classes of attached devices
2040 * This function is invoked after a successful reset. It first
2041 * calls ata_std_postreset() and performs SFF specific postreset
2045 * Kernel thread context (may sleep)
2047 void ata_sff_postreset(struct ata_link
*link
, unsigned int *classes
)
2049 struct ata_port
*ap
= link
->ap
;
2051 ata_std_postreset(link
, classes
);
2053 /* is double-select really necessary? */
2054 if (classes
[0] != ATA_DEV_NONE
)
2055 ap
->ops
->sff_dev_select(ap
, 1);
2056 if (classes
[1] != ATA_DEV_NONE
)
2057 ap
->ops
->sff_dev_select(ap
, 0);
2059 /* bail out if no device is present */
2060 if (classes
[0] == ATA_DEV_NONE
&& classes
[1] == ATA_DEV_NONE
) {
2061 DPRINTK("EXIT, no device\n");
2065 /* set up device control */
2066 if (ap
->ioaddr
.ctl_addr
)
2067 iowrite8(ap
->ctl
, ap
->ioaddr
.ctl_addr
);
2071 * ata_sff_error_handler - Stock error handler for BMDMA controller
2072 * @ap: port to handle error for
2074 * Stock error handler for SFF controller. It can handle both
2075 * PATA and SATA controllers. Many controllers should be able to
2076 * use this EH as-is or with some added handling before and
2080 * Kernel thread context (may sleep)
2082 void ata_sff_error_handler(struct ata_port
*ap
)
2084 ata_reset_fn_t softreset
= ap
->ops
->softreset
;
2085 ata_reset_fn_t hardreset
= ap
->ops
->hardreset
;
2086 struct ata_queued_cmd
*qc
;
2087 unsigned long flags
;
2090 qc
= __ata_qc_from_tag(ap
, ap
->link
.active_tag
);
2091 if (qc
&& !(qc
->flags
& ATA_QCFLAG_FAILED
))
2094 /* reset PIO HSM and stop DMA engine */
2095 spin_lock_irqsave(ap
->lock
, flags
);
2097 ap
->hsm_task_state
= HSM_ST_IDLE
;
2099 if (ap
->ioaddr
.bmdma_addr
&&
2100 qc
&& (qc
->tf
.protocol
== ATA_PROT_DMA
||
2101 qc
->tf
.protocol
== ATAPI_PROT_DMA
)) {
2104 host_stat
= ap
->ops
->bmdma_status(ap
);
2106 /* BMDMA controllers indicate host bus error by
2107 * setting DMA_ERR bit and timing out. As it wasn't
2108 * really a timeout event, adjust error mask and
2109 * cancel frozen state.
2111 if (qc
->err_mask
== AC_ERR_TIMEOUT
&& (host_stat
& ATA_DMA_ERR
)) {
2112 qc
->err_mask
= AC_ERR_HOST_BUS
;
2116 ap
->ops
->bmdma_stop(qc
);
2119 ata_sff_altstatus(ap
);
2120 ap
->ops
->sff_check_status(ap
);
2121 ap
->ops
->sff_irq_clear(ap
);
2123 spin_unlock_irqrestore(ap
->lock
, flags
);
2126 ata_eh_thaw_port(ap
);
2128 /* PIO and DMA engines have been stopped, perform recovery */
2130 /* ata_sff_softreset and sata_sff_hardreset are inherited to
2131 * all SFF drivers from ata_sff_port_ops. Ignore softreset if
2132 * ctl isn't accessible. Ignore hardreset if SCR access isn't
2135 if (softreset
== ata_sff_softreset
&& !ap
->ioaddr
.ctl_addr
)
2137 if (hardreset
== sata_sff_hardreset
&& !sata_scr_valid(&ap
->link
))
2140 ata_do_eh(ap
, ap
->ops
->prereset
, softreset
, hardreset
,
2141 ap
->ops
->postreset
);
2145 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
2146 * @qc: internal command to clean up
2149 * Kernel thread context (may sleep)
2151 void ata_sff_post_internal_cmd(struct ata_queued_cmd
*qc
)
2153 if (qc
->ap
->ioaddr
.bmdma_addr
)
2158 * ata_sff_port_start - Set port up for dma.
2159 * @ap: Port to initialize
2161 * Called just after data structures for each port are
2162 * initialized. Allocates space for PRD table if the device
2163 * is DMA capable SFF.
2165 * May be used as the port_start() entry in ata_port_operations.
2168 * Inherited from caller.
2170 int ata_sff_port_start(struct ata_port
*ap
)
2172 if (ap
->ioaddr
.bmdma_addr
)
2173 return ata_port_start(ap
);
2178 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
2179 * @ioaddr: IO address structure to be initialized
2181 * Utility function which initializes data_addr, error_addr,
2182 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2183 * device_addr, status_addr, and command_addr to standard offsets
2184 * relative to cmd_addr.
2186 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2188 void ata_sff_std_ports(struct ata_ioports
*ioaddr
)
2190 ioaddr
->data_addr
= ioaddr
->cmd_addr
+ ATA_REG_DATA
;
2191 ioaddr
->error_addr
= ioaddr
->cmd_addr
+ ATA_REG_ERR
;
2192 ioaddr
->feature_addr
= ioaddr
->cmd_addr
+ ATA_REG_FEATURE
;
2193 ioaddr
->nsect_addr
= ioaddr
->cmd_addr
+ ATA_REG_NSECT
;
2194 ioaddr
->lbal_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAL
;
2195 ioaddr
->lbam_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAM
;
2196 ioaddr
->lbah_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAH
;
2197 ioaddr
->device_addr
= ioaddr
->cmd_addr
+ ATA_REG_DEVICE
;
2198 ioaddr
->status_addr
= ioaddr
->cmd_addr
+ ATA_REG_STATUS
;
2199 ioaddr
->command_addr
= ioaddr
->cmd_addr
+ ATA_REG_CMD
;
2202 unsigned long ata_bmdma_mode_filter(struct ata_device
*adev
,
2203 unsigned long xfer_mask
)
2205 /* Filter out DMA modes if the device has been configured by
2206 the BIOS as PIO only */
2208 if (adev
->link
->ap
->ioaddr
.bmdma_addr
== NULL
)
2209 xfer_mask
&= ~(ATA_MASK_MWDMA
| ATA_MASK_UDMA
);
2214 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2215 * @qc: Info associated with this ATA transaction.
2218 * spin_lock_irqsave(host lock)
2220 void ata_bmdma_setup(struct ata_queued_cmd
*qc
)
2222 struct ata_port
*ap
= qc
->ap
;
2223 unsigned int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
2226 /* load PRD table addr. */
2227 mb(); /* make sure PRD table writes are visible to controller */
2228 iowrite32(ap
->prd_dma
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_TABLE_OFS
);
2230 /* specify data direction, triple-check start bit is clear */
2231 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2232 dmactl
&= ~(ATA_DMA_WR
| ATA_DMA_START
);
2234 dmactl
|= ATA_DMA_WR
;
2235 iowrite8(dmactl
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2237 /* issue r/w command */
2238 ap
->ops
->sff_exec_command(ap
, &qc
->tf
);
2242 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2243 * @qc: Info associated with this ATA transaction.
2246 * spin_lock_irqsave(host lock)
2248 void ata_bmdma_start(struct ata_queued_cmd
*qc
)
2250 struct ata_port
*ap
= qc
->ap
;
2253 /* start host DMA transaction */
2254 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2255 iowrite8(dmactl
| ATA_DMA_START
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2257 /* Strictly, one may wish to issue an ioread8() here, to
2258 * flush the mmio write. However, control also passes
2259 * to the hardware at this point, and it will interrupt
2260 * us when we are to resume control. So, in effect,
2261 * we don't care when the mmio write flushes.
2262 * Further, a read of the DMA status register _immediately_
2263 * following the write may not be what certain flaky hardware
2264 * is expected, so I think it is best to not add a readb()
2265 * without first all the MMIO ATA cards/mobos.
2266 * Or maybe I'm just being paranoid.
2268 * FIXME: The posting of this write means I/O starts are
2269 * unneccessarily delayed for MMIO
2274 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2275 * @qc: Command we are ending DMA for
2277 * Clears the ATA_DMA_START flag in the dma control register
2279 * May be used as the bmdma_stop() entry in ata_port_operations.
2282 * spin_lock_irqsave(host lock)
2284 void ata_bmdma_stop(struct ata_queued_cmd
*qc
)
2286 struct ata_port
*ap
= qc
->ap
;
2287 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
2289 /* clear start/stop bit */
2290 iowrite8(ioread8(mmio
+ ATA_DMA_CMD
) & ~ATA_DMA_START
,
2291 mmio
+ ATA_DMA_CMD
);
2293 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
2294 ata_sff_altstatus(ap
); /* dummy read */
2298 * ata_bmdma_status - Read PCI IDE BMDMA status
2299 * @ap: Port associated with this ATA transaction.
2301 * Read and return BMDMA status register.
2303 * May be used as the bmdma_status() entry in ata_port_operations.
2306 * spin_lock_irqsave(host lock)
2308 u8
ata_bmdma_status(struct ata_port
*ap
)
2310 return ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
2314 * ata_bus_reset - reset host port and associated ATA channel
2315 * @ap: port to reset
2317 * This is typically the first time we actually start issuing
2318 * commands to the ATA channel. We wait for BSY to clear, then
2319 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2320 * result. Determine what devices, if any, are on the channel
2321 * by looking at the device 0/1 error register. Look at the signature
2322 * stored in each device's taskfile registers, to determine if
2323 * the device is ATA or ATAPI.
2326 * PCI/etc. bus probe sem.
2327 * Obtains host lock.
2330 * Sets ATA_FLAG_DISABLED if bus reset fails.
2333 * This function is only for drivers which still use old EH and
2334 * will be removed soon.
2336 void ata_bus_reset(struct ata_port
*ap
)
2338 struct ata_device
*device
= ap
->link
.device
;
2339 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2340 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2342 unsigned int dev0
, dev1
= 0, devmask
= 0;
2345 DPRINTK("ENTER, host %u, port %u\n", ap
->print_id
, ap
->port_no
);
2347 /* determine if device 0/1 are present */
2348 if (ap
->flags
& ATA_FLAG_SATA_RESET
)
2351 dev0
= ata_devchk(ap
, 0);
2353 dev1
= ata_devchk(ap
, 1);
2357 devmask
|= (1 << 0);
2359 devmask
|= (1 << 1);
2361 /* select device 0 again */
2362 ap
->ops
->sff_dev_select(ap
, 0);
2364 /* issue bus reset */
2365 if (ap
->flags
& ATA_FLAG_SRST
) {
2366 rc
= ata_bus_softreset(ap
, devmask
, jiffies
+ 40 * HZ
);
2367 if (rc
&& rc
!= -ENODEV
)
2372 * determine by signature whether we have ATA or ATAPI devices
2374 device
[0].class = ata_sff_dev_classify(&device
[0], dev0
, &err
);
2375 if ((slave_possible
) && (err
!= 0x81))
2376 device
[1].class = ata_sff_dev_classify(&device
[1], dev1
, &err
);
2378 /* is double-select really necessary? */
2379 if (device
[1].class != ATA_DEV_NONE
)
2380 ap
->ops
->sff_dev_select(ap
, 1);
2381 if (device
[0].class != ATA_DEV_NONE
)
2382 ap
->ops
->sff_dev_select(ap
, 0);
2384 /* if no devices were detected, disable this port */
2385 if ((device
[0].class == ATA_DEV_NONE
) &&
2386 (device
[1].class == ATA_DEV_NONE
))
2389 if (ap
->flags
& (ATA_FLAG_SATA_RESET
| ATA_FLAG_SRST
)) {
2390 /* set up device control for ATA_FLAG_SATA_RESET */
2391 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2398 ata_port_printk(ap
, KERN_ERR
, "disabling port\n");
2399 ata_port_disable(ap
);
2407 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
2410 * Some PCI ATA devices report simplex mode but in fact can be told to
2411 * enter non simplex mode. This implements the necessary logic to
2412 * perform the task on such devices. Calling it on other devices will
2413 * have -undefined- behaviour.
2415 int ata_pci_bmdma_clear_simplex(struct pci_dev
*pdev
)
2417 unsigned long bmdma
= pci_resource_start(pdev
, 4);
2423 simplex
= inb(bmdma
+ 0x02);
2424 outb(simplex
& 0x60, bmdma
+ 0x02);
2425 simplex
= inb(bmdma
+ 0x02);
2432 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
2433 * @host: target ATA host
2435 * Acquire PCI BMDMA resources and initialize @host accordingly.
2438 * Inherited from calling layer (may sleep).
2441 * 0 on success, -errno otherwise.
2443 int ata_pci_bmdma_init(struct ata_host
*host
)
2445 struct device
*gdev
= host
->dev
;
2446 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2449 /* No BAR4 allocation: No DMA */
2450 if (pci_resource_start(pdev
, 4) == 0)
2453 /* TODO: If we get no DMA mask we should fall back to PIO */
2454 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
2457 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
2461 /* request and iomap DMA region */
2462 rc
= pcim_iomap_regions(pdev
, 1 << 4, dev_driver_string(gdev
));
2464 dev_printk(KERN_ERR
, gdev
, "failed to request/iomap BAR4\n");
2467 host
->iomap
= pcim_iomap_table(pdev
);
2469 for (i
= 0; i
< 2; i
++) {
2470 struct ata_port
*ap
= host
->ports
[i
];
2471 void __iomem
*bmdma
= host
->iomap
[4] + 8 * i
;
2473 if (ata_port_is_dummy(ap
))
2476 ap
->ioaddr
.bmdma_addr
= bmdma
;
2477 if ((!(ap
->flags
& ATA_FLAG_IGN_SIMPLEX
)) &&
2478 (ioread8(bmdma
+ 2) & 0x80))
2479 host
->flags
|= ATA_HOST_SIMPLEX
;
2481 ata_port_desc(ap
, "bmdma 0x%llx",
2482 (unsigned long long)pci_resource_start(pdev
, 4) + 8 * i
);
2488 static int ata_resources_present(struct pci_dev
*pdev
, int port
)
2492 /* Check the PCI resources for this channel are enabled */
2494 for (i
= 0; i
< 2; i
++) {
2495 if (pci_resource_start(pdev
, port
+ i
) == 0 ||
2496 pci_resource_len(pdev
, port
+ i
) == 0)
2503 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
2504 * @host: target ATA host
2506 * Acquire native PCI ATA resources for @host and initialize the
2507 * first two ports of @host accordingly. Ports marked dummy are
2508 * skipped and allocation failure makes the port dummy.
2510 * Note that native PCI resources are valid even for legacy hosts
2511 * as we fix up pdev resources array early in boot, so this
2512 * function can be used for both native and legacy SFF hosts.
2515 * Inherited from calling layer (may sleep).
2518 * 0 if at least one port is initialized, -ENODEV if no port is
2521 int ata_pci_sff_init_host(struct ata_host
*host
)
2523 struct device
*gdev
= host
->dev
;
2524 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2525 unsigned int mask
= 0;
2528 /* request, iomap BARs and init port addresses accordingly */
2529 for (i
= 0; i
< 2; i
++) {
2530 struct ata_port
*ap
= host
->ports
[i
];
2532 void __iomem
* const *iomap
;
2534 if (ata_port_is_dummy(ap
))
2537 /* Discard disabled ports. Some controllers show
2538 * their unused channels this way. Disabled ports are
2541 if (!ata_resources_present(pdev
, i
)) {
2542 ap
->ops
= &ata_dummy_port_ops
;
2546 rc
= pcim_iomap_regions(pdev
, 0x3 << base
,
2547 dev_driver_string(gdev
));
2549 dev_printk(KERN_WARNING
, gdev
,
2550 "failed to request/iomap BARs for port %d "
2551 "(errno=%d)\n", i
, rc
);
2553 pcim_pin_device(pdev
);
2554 ap
->ops
= &ata_dummy_port_ops
;
2557 host
->iomap
= iomap
= pcim_iomap_table(pdev
);
2559 ap
->ioaddr
.cmd_addr
= iomap
[base
];
2560 ap
->ioaddr
.altstatus_addr
=
2561 ap
->ioaddr
.ctl_addr
= (void __iomem
*)
2562 ((unsigned long)iomap
[base
+ 1] | ATA_PCI_CTL_OFS
);
2563 ata_sff_std_ports(&ap
->ioaddr
);
2565 ata_port_desc(ap
, "cmd 0x%llx ctl 0x%llx",
2566 (unsigned long long)pci_resource_start(pdev
, base
),
2567 (unsigned long long)pci_resource_start(pdev
, base
+ 1));
2573 dev_printk(KERN_ERR
, gdev
, "no available native port\n");
2581 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
2582 * @pdev: target PCI device
2583 * @ppi: array of port_info, must be enough for two ports
2584 * @r_host: out argument for the initialized ATA host
2586 * Helper to allocate ATA host for @pdev, acquire all native PCI
2587 * resources and initialize it accordingly in one go.
2590 * Inherited from calling layer (may sleep).
2593 * 0 on success, -errno otherwise.
2595 int ata_pci_sff_prepare_host(struct pci_dev
*pdev
,
2596 const struct ata_port_info
* const * ppi
,
2597 struct ata_host
**r_host
)
2599 struct ata_host
*host
;
2602 if (!devres_open_group(&pdev
->dev
, NULL
, GFP_KERNEL
))
2605 host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, 2);
2607 dev_printk(KERN_ERR
, &pdev
->dev
,
2608 "failed to allocate ATA host\n");
2613 rc
= ata_pci_sff_init_host(host
);
2617 /* init DMA related stuff */
2618 rc
= ata_pci_bmdma_init(host
);
2622 devres_remove_group(&pdev
->dev
, NULL
);
2627 /* This is necessary because PCI and iomap resources are
2628 * merged and releasing the top group won't release the
2629 * acquired resources if some of those have been acquired
2630 * before entering this function.
2632 pcim_iounmap_regions(pdev
, 0xf);
2634 devres_release_group(&pdev
->dev
, NULL
);
2639 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
2640 * @host: target SFF ATA host
2641 * @irq_handler: irq_handler used when requesting IRQ(s)
2642 * @sht: scsi_host_template to use when registering the host
2644 * This is the counterpart of ata_host_activate() for SFF ATA
2645 * hosts. This separate helper is necessary because SFF hosts
2646 * use two separate interrupts in legacy mode.
2649 * Inherited from calling layer (may sleep).
2652 * 0 on success, -errno otherwise.
2654 int ata_pci_sff_activate_host(struct ata_host
*host
,
2655 irq_handler_t irq_handler
,
2656 struct scsi_host_template
*sht
)
2658 struct device
*dev
= host
->dev
;
2659 struct pci_dev
*pdev
= to_pci_dev(dev
);
2660 const char *drv_name
= dev_driver_string(host
->dev
);
2661 int legacy_mode
= 0, rc
;
2663 rc
= ata_host_start(host
);
2667 if ((pdev
->class >> 8) == PCI_CLASS_STORAGE_IDE
) {
2670 /* TODO: What if one channel is in native mode ... */
2671 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, &tmp8
);
2672 mask
= (1 << 2) | (1 << 0);
2673 if ((tmp8
& mask
) != mask
)
2675 #if defined(CONFIG_NO_ATA_LEGACY)
2676 /* Some platforms with PCI limits cannot address compat
2677 port space. In that case we punt if their firmware has
2678 left a device in compatibility mode */
2680 printk(KERN_ERR
"ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2686 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2689 if (!legacy_mode
&& pdev
->irq
) {
2690 rc
= devm_request_irq(dev
, pdev
->irq
, irq_handler
,
2691 IRQF_SHARED
, drv_name
, host
);
2695 ata_port_desc(host
->ports
[0], "irq %d", pdev
->irq
);
2696 ata_port_desc(host
->ports
[1], "irq %d", pdev
->irq
);
2697 } else if (legacy_mode
) {
2698 if (!ata_port_is_dummy(host
->ports
[0])) {
2699 rc
= devm_request_irq(dev
, ATA_PRIMARY_IRQ(pdev
),
2700 irq_handler
, IRQF_SHARED
,
2705 ata_port_desc(host
->ports
[0], "irq %d",
2706 ATA_PRIMARY_IRQ(pdev
));
2709 if (!ata_port_is_dummy(host
->ports
[1])) {
2710 rc
= devm_request_irq(dev
, ATA_SECONDARY_IRQ(pdev
),
2711 irq_handler
, IRQF_SHARED
,
2716 ata_port_desc(host
->ports
[1], "irq %d",
2717 ATA_SECONDARY_IRQ(pdev
));
2721 rc
= ata_host_register(host
, sht
);
2724 devres_remove_group(dev
, NULL
);
2726 devres_release_group(dev
, NULL
);
2732 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
2733 * @pdev: Controller to be initialized
2734 * @ppi: array of port_info, must be enough for two ports
2735 * @sht: scsi_host_template to use when registering the host
2736 * @host_priv: host private_data
2738 * This is a helper function which can be called from a driver's
2739 * xxx_init_one() probe function if the hardware uses traditional
2740 * IDE taskfile registers.
2742 * This function calls pci_enable_device(), reserves its register
2743 * regions, sets the dma mask, enables bus master mode, and calls
2747 * Nobody makes a single channel controller that appears solely as
2748 * the secondary legacy port on PCI.
2751 * Inherited from PCI layer (may sleep).
2754 * Zero on success, negative on errno-based value on error.
2756 int ata_pci_sff_init_one(struct pci_dev
*pdev
,
2757 const struct ata_port_info
* const * ppi
,
2758 struct scsi_host_template
*sht
, void *host_priv
)
2760 struct device
*dev
= &pdev
->dev
;
2761 const struct ata_port_info
*pi
= NULL
;
2762 struct ata_host
*host
= NULL
;
2767 /* look up the first valid port_info */
2768 for (i
= 0; i
< 2 && ppi
[i
]; i
++) {
2769 if (ppi
[i
]->port_ops
!= &ata_dummy_port_ops
) {
2776 dev_printk(KERN_ERR
, &pdev
->dev
,
2777 "no valid port_info specified\n");
2781 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2784 rc
= pcim_enable_device(pdev
);
2788 /* prepare and activate SFF host */
2789 rc
= ata_pci_sff_prepare_host(pdev
, ppi
, &host
);
2792 host
->private_data
= host_priv
;
2794 pci_set_master(pdev
);
2795 rc
= ata_pci_sff_activate_host(host
, ata_sff_interrupt
, sht
);
2798 devres_remove_group(&pdev
->dev
, NULL
);
2800 devres_release_group(&pdev
->dev
, NULL
);
2805 #endif /* CONFIG_PCI */
2807 EXPORT_SYMBOL_GPL(ata_sff_port_ops
);
2808 EXPORT_SYMBOL_GPL(ata_bmdma_port_ops
);
2809 EXPORT_SYMBOL_GPL(ata_sff_qc_prep
);
2810 EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep
);
2811 EXPORT_SYMBOL_GPL(ata_sff_dev_select
);
2812 EXPORT_SYMBOL_GPL(ata_sff_check_status
);
2813 EXPORT_SYMBOL_GPL(ata_sff_altstatus
);
2814 EXPORT_SYMBOL_GPL(ata_sff_busy_sleep
);
2815 EXPORT_SYMBOL_GPL(ata_sff_wait_ready
);
2816 EXPORT_SYMBOL_GPL(ata_sff_tf_load
);
2817 EXPORT_SYMBOL_GPL(ata_sff_tf_read
);
2818 EXPORT_SYMBOL_GPL(ata_sff_exec_command
);
2819 EXPORT_SYMBOL_GPL(ata_sff_data_xfer
);
2820 EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq
);
2821 EXPORT_SYMBOL_GPL(ata_sff_irq_on
);
2822 EXPORT_SYMBOL_GPL(ata_sff_irq_clear
);
2823 EXPORT_SYMBOL_GPL(ata_sff_hsm_move
);
2824 EXPORT_SYMBOL_GPL(ata_sff_qc_issue
);
2825 EXPORT_SYMBOL_GPL(ata_sff_host_intr
);
2826 EXPORT_SYMBOL_GPL(ata_sff_interrupt
);
2827 EXPORT_SYMBOL_GPL(ata_sff_freeze
);
2828 EXPORT_SYMBOL_GPL(ata_sff_thaw
);
2829 EXPORT_SYMBOL_GPL(ata_sff_prereset
);
2830 EXPORT_SYMBOL_GPL(ata_sff_dev_classify
);
2831 EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset
);
2832 EXPORT_SYMBOL_GPL(ata_sff_softreset
);
2833 EXPORT_SYMBOL_GPL(sata_sff_hardreset
);
2834 EXPORT_SYMBOL_GPL(ata_sff_postreset
);
2835 EXPORT_SYMBOL_GPL(ata_sff_error_handler
);
2836 EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd
);
2837 EXPORT_SYMBOL_GPL(ata_sff_port_start
);
2838 EXPORT_SYMBOL_GPL(ata_sff_std_ports
);
2839 EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter
);
2840 EXPORT_SYMBOL_GPL(ata_bmdma_setup
);
2841 EXPORT_SYMBOL_GPL(ata_bmdma_start
);
2842 EXPORT_SYMBOL_GPL(ata_bmdma_stop
);
2843 EXPORT_SYMBOL_GPL(ata_bmdma_status
);
2844 EXPORT_SYMBOL_GPL(ata_bus_reset
);
2846 EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex
);
2847 EXPORT_SYMBOL_GPL(ata_pci_bmdma_init
);
2848 EXPORT_SYMBOL_GPL(ata_pci_sff_init_host
);
2849 EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host
);
2850 EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host
);
2851 EXPORT_SYMBOL_GPL(ata_pci_sff_init_one
);
2852 #endif /* CONFIG_PCI */