2 * pata_atiixp.c - ATI PATA for new ATA layer
4 * Alan Cox <alan@redhat.com>
8 * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
10 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
11 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/pci.h>
18 #include <linux/init.h>
19 #include <linux/blkdev.h>
20 #include <linux/delay.h>
21 #include <scsi/scsi_host.h>
22 #include <linux/libata.h>
24 #define DRV_NAME "pata_atiixp"
25 #define DRV_VERSION "0.4.6"
28 ATIIXP_IDE_PIO_TIMING
= 0x40,
29 ATIIXP_IDE_MWDMA_TIMING
= 0x44,
30 ATIIXP_IDE_PIO_CONTROL
= 0x48,
31 ATIIXP_IDE_PIO_MODE
= 0x4a,
32 ATIIXP_IDE_UDMA_CONTROL
= 0x54,
33 ATIIXP_IDE_UDMA_MODE
= 0x56
36 static int atiixp_pre_reset(struct ata_link
*link
, unsigned long deadline
)
38 struct ata_port
*ap
= link
->ap
;
39 static const struct pci_bits atiixp_enable_bits
[] = {
40 { 0x48, 1, 0x01, 0x00 },
41 { 0x48, 1, 0x08, 0x00 }
43 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
45 if (!pci_test_config_bits(pdev
, &atiixp_enable_bits
[ap
->port_no
]))
48 return ata_std_prereset(link
, deadline
);
51 static void atiixp_error_handler(struct ata_port
*ap
)
53 ata_bmdma_drive_eh(ap
, atiixp_pre_reset
, ata_std_softreset
, NULL
, ata_std_postreset
);
56 static int atiixp_cable_detect(struct ata_port
*ap
)
58 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
61 /* Hack from drivers/ide/pci. Really we want to know how to do the
62 raw detection not play follow the bios mode guess */
63 pci_read_config_byte(pdev
, ATIIXP_IDE_UDMA_MODE
+ ap
->port_no
, &udma
);
64 if ((udma
& 0x07) >= 0x04 || (udma
& 0x70) >= 0x40)
65 return ATA_CBL_PATA80
;
66 return ATA_CBL_PATA40
;
70 * atiixp_set_pio_timing - set initial PIO mode data
74 * Called by both the pio and dma setup functions to set the controller
75 * timings for PIO transfers. We must load both the mode number and
76 * timing values into the controller.
79 static void atiixp_set_pio_timing(struct ata_port
*ap
, struct ata_device
*adev
, int pio
)
81 static u8 pio_timings
[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
83 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
84 int dn
= 2 * ap
->port_no
+ adev
->devno
;
86 /* Check this is correct - the order is odd in both drivers */
87 int timing_shift
= (16 * ap
->port_no
) + 8 * (adev
->devno
^ 1);
88 u16 pio_mode_data
, pio_timing_data
;
90 pci_read_config_word(pdev
, ATIIXP_IDE_PIO_MODE
, &pio_mode_data
);
91 pio_mode_data
&= ~(0x7 << (4 * dn
));
92 pio_mode_data
|= pio
<< (4 * dn
);
93 pci_write_config_word(pdev
, ATIIXP_IDE_PIO_MODE
, pio_mode_data
);
95 pci_read_config_word(pdev
, ATIIXP_IDE_PIO_TIMING
, &pio_timing_data
);
96 pio_mode_data
&= ~(0xFF << timing_shift
);
97 pio_mode_data
|= (pio_timings
[pio
] << timing_shift
);
98 pci_write_config_word(pdev
, ATIIXP_IDE_PIO_TIMING
, pio_timing_data
);
102 * atiixp_set_piomode - set initial PIO mode data
106 * Called to do the PIO mode setup. We use a shared helper for this
107 * as the DMA setup must also adjust the PIO timing information.
110 static void atiixp_set_piomode(struct ata_port
*ap
, struct ata_device
*adev
)
112 atiixp_set_pio_timing(ap
, adev
, adev
->pio_mode
- XFER_PIO_0
);
116 * atiixp_set_dmamode - set initial DMA mode data
120 * Called to do the DMA mode setup. We use timing tables for most
121 * modes but must tune an appropriate PIO mode to match.
124 static void atiixp_set_dmamode(struct ata_port
*ap
, struct ata_device
*adev
)
126 static u8 mwdma_timings
[5] = { 0x77, 0x21, 0x20 };
128 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
129 int dma
= adev
->dma_mode
;
130 int dn
= 2 * ap
->port_no
+ adev
->devno
;
133 if (adev
->dma_mode
>= XFER_UDMA_0
) {
138 pci_read_config_word(pdev
, ATIIXP_IDE_UDMA_MODE
, &udma_mode_data
);
139 udma_mode_data
&= ~(0x7 << (4 * dn
));
140 udma_mode_data
|= dma
<< (4 * dn
);
141 pci_write_config_word(pdev
, ATIIXP_IDE_UDMA_MODE
, udma_mode_data
);
143 u16 mwdma_timing_data
;
144 /* Check this is correct - the order is odd in both drivers */
145 int timing_shift
= (16 * ap
->port_no
) + 8 * (adev
->devno
^ 1);
147 dma
-= XFER_MW_DMA_0
;
149 pci_read_config_word(pdev
, ATIIXP_IDE_MWDMA_TIMING
, &mwdma_timing_data
);
150 mwdma_timing_data
&= ~(0xFF << timing_shift
);
151 mwdma_timing_data
|= (mwdma_timings
[dma
] << timing_shift
);
152 pci_write_config_word(pdev
, ATIIXP_IDE_MWDMA_TIMING
, mwdma_timing_data
);
155 * We must now look at the PIO mode situation. We may need to
156 * adjust the PIO mode to keep the timings acceptable
158 if (adev
->dma_mode
>= XFER_MW_DMA_2
)
160 else if (adev
->dma_mode
== XFER_MW_DMA_1
)
162 else if (adev
->dma_mode
== XFER_MW_DMA_0
)
166 if (adev
->pio_mode
!= wanted_pio
)
167 atiixp_set_pio_timing(ap
, adev
, wanted_pio
);
171 * atiixp_bmdma_start - DMA start callback
172 * @qc: Command in progress
174 * When DMA begins we need to ensure that the UDMA control
175 * register for the channel is correctly set.
177 * Note: The host lock held by the libata layer protects
178 * us from two channels both trying to set DMA bits at once
181 static void atiixp_bmdma_start(struct ata_queued_cmd
*qc
)
183 struct ata_port
*ap
= qc
->ap
;
184 struct ata_device
*adev
= qc
->dev
;
186 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
187 int dn
= (2 * ap
->port_no
) + adev
->devno
;
190 pci_read_config_word(pdev
, ATIIXP_IDE_UDMA_CONTROL
, &tmp16
);
191 if (adev
->dma_mode
>= XFER_UDMA_0
)
195 pci_write_config_word(pdev
, ATIIXP_IDE_UDMA_CONTROL
, tmp16
);
200 * atiixp_dma_stop - DMA stop callback
201 * @qc: Command in progress
203 * DMA has completed. Clear the UDMA flag as the next operations will
204 * be PIO ones not UDMA data transfer.
206 * Note: The host lock held by the libata layer protects
207 * us from two channels both trying to set DMA bits at once
210 static void atiixp_bmdma_stop(struct ata_queued_cmd
*qc
)
212 struct ata_port
*ap
= qc
->ap
;
213 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
214 int dn
= (2 * ap
->port_no
) + qc
->dev
->devno
;
217 pci_read_config_word(pdev
, ATIIXP_IDE_UDMA_CONTROL
, &tmp16
);
219 pci_write_config_word(pdev
, ATIIXP_IDE_UDMA_CONTROL
, tmp16
);
223 static struct scsi_host_template atiixp_sht
= {
224 ATA_BMDMA_SHT(DRV_NAME
),
225 .sg_tablesize
= LIBATA_DUMB_MAX_PRD
,
228 static struct ata_port_operations atiixp_port_ops
= {
229 .inherits
= &ata_bmdma_port_ops
,
231 .qc_prep
= ata_dumb_qc_prep
,
232 .bmdma_start
= atiixp_bmdma_start
,
233 .bmdma_stop
= atiixp_bmdma_stop
,
235 .cable_detect
= atiixp_cable_detect
,
236 .set_piomode
= atiixp_set_piomode
,
237 .set_dmamode
= atiixp_set_dmamode
,
238 .error_handler
= atiixp_error_handler
,
241 static int atiixp_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
243 static const struct ata_port_info info
= {
244 .flags
= ATA_FLAG_SLAVE_POSS
,
246 .mwdma_mask
= 0x06, /* No MWDMA0 support */
248 .port_ops
= &atiixp_port_ops
250 const struct ata_port_info
*ppi
[] = { &info
, NULL
};
251 return ata_pci_init_one(dev
, ppi
, &atiixp_sht
);
254 static const struct pci_device_id atiixp
[] = {
255 { PCI_VDEVICE(ATI
, PCI_DEVICE_ID_ATI_IXP200_IDE
), },
256 { PCI_VDEVICE(ATI
, PCI_DEVICE_ID_ATI_IXP300_IDE
), },
257 { PCI_VDEVICE(ATI
, PCI_DEVICE_ID_ATI_IXP400_IDE
), },
258 { PCI_VDEVICE(ATI
, PCI_DEVICE_ID_ATI_IXP600_IDE
), },
259 { PCI_VDEVICE(ATI
, PCI_DEVICE_ID_ATI_IXP700_IDE
), },
264 static struct pci_driver atiixp_pci_driver
= {
267 .probe
= atiixp_init_one
,
268 .remove
= ata_pci_remove_one
,
270 .resume
= ata_pci_device_resume
,
271 .suspend
= ata_pci_device_suspend
,
275 static int __init
atiixp_init(void)
277 return pci_register_driver(&atiixp_pci_driver
);
281 static void __exit
atiixp_exit(void)
283 pci_unregister_driver(&atiixp_pci_driver
);
286 MODULE_AUTHOR("Alan Cox");
287 MODULE_DESCRIPTION("low-level driver for ATI IXP200/300/400");
288 MODULE_LICENSE("GPL");
289 MODULE_DEVICE_TABLE(pci
, atiixp
);
290 MODULE_VERSION(DRV_VERSION
);
292 module_init(atiixp_init
);
293 module_exit(atiixp_exit
);