2 * pata_sil680.c - SIL680 PATA for new ATA layer
4 * Alan Cox <alan@redhat.com>
8 * linux/drivers/ide/pci/siimage.c Version 1.07 Nov 30, 2003
10 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
11 * Copyright (C) 2003 Red Hat <alan@redhat.com>
13 * May be copied or modified under the terms of the GNU General Public License
15 * Documentation publically available.
17 * If you have strange problems with nVidia chipset systems please
18 * see the SI support documentation and update your system BIOS
22 * If we know all our devices are LBA28 (or LBA28 sized) we could use
23 * the command fifo mode.
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/blkdev.h>
31 #include <linux/delay.h>
32 #include <scsi/scsi_host.h>
33 #include <linux/libata.h>
35 #define DRV_NAME "pata_sil680"
36 #define DRV_VERSION "0.4.8"
38 #define SIL680_MMIO_BAR 5
41 * sil680_selreg - return register base
45 * Turn a config register offset into the right address in either
46 * PCI space or MMIO space to access the control register in question
47 * Thankfully this is a configuration operation so isnt performance
51 static unsigned long sil680_selreg(struct ata_port
*ap
, int r
)
53 unsigned long base
= 0xA0 + r
;
54 base
+= (ap
->port_no
<< 4);
59 * sil680_seldev - return register base
63 * Turn a config register offset into the right address in either
64 * PCI space or MMIO space to access the control register in question
65 * including accounting for the unit shift.
68 static unsigned long sil680_seldev(struct ata_port
*ap
, struct ata_device
*adev
, int r
)
70 unsigned long base
= 0xA0 + r
;
71 base
+= (ap
->port_no
<< 4);
72 base
|= adev
->devno
? 2 : 0;
78 * sil680_cable_detect - cable detection
81 * Perform cable detection. The SIL680 stores this in PCI config
85 static int sil680_cable_detect(struct ata_port
*ap
) {
86 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
87 unsigned long addr
= sil680_selreg(ap
, 0);
89 pci_read_config_byte(pdev
, addr
, &ata66
);
91 return ATA_CBL_PATA80
;
93 return ATA_CBL_PATA40
;
97 * sil680_set_piomode - set initial PIO mode data
101 * Program the SIL680 registers for PIO mode. Note that the task speed
102 * registers are shared between the devices so we must pick the lowest
103 * mode for command work.
106 static void sil680_set_piomode(struct ata_port
*ap
, struct ata_device
*adev
)
108 static u16 speed_p
[5] = { 0x328A, 0x2283, 0x1104, 0x10C3, 0x10C1 };
109 static u16 speed_t
[5] = { 0x328A, 0x2283, 0x1281, 0x10C3, 0x10C1 };
111 unsigned long tfaddr
= sil680_selreg(ap
, 0x02);
112 unsigned long addr
= sil680_seldev(ap
, adev
, 0x04);
113 unsigned long addr_mask
= 0x80 + 4 * ap
->port_no
;
114 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
115 int pio
= adev
->pio_mode
- XFER_PIO_0
;
116 int lowest_pio
= pio
;
117 int port_shift
= 4 * adev
->devno
;
121 struct ata_device
*pair
= ata_dev_pair(adev
);
123 if (pair
!= NULL
&& adev
->pio_mode
> pair
->pio_mode
)
124 lowest_pio
= pair
->pio_mode
- XFER_PIO_0
;
126 pci_write_config_word(pdev
, addr
, speed_p
[pio
]);
127 pci_write_config_word(pdev
, tfaddr
, speed_t
[lowest_pio
]);
129 pci_read_config_word(pdev
, tfaddr
-2, ®
);
130 pci_read_config_byte(pdev
, addr_mask
, &mode
);
132 reg
&= ~0x0200; /* Clear IORDY */
133 mode
&= ~(3 << port_shift
); /* Clear IORDY and DMA bits */
135 if (ata_pio_need_iordy(adev
)) {
136 reg
|= 0x0200; /* Enable IORDY */
137 mode
|= 1 << port_shift
;
139 pci_write_config_word(pdev
, tfaddr
-2, reg
);
140 pci_write_config_byte(pdev
, addr_mask
, mode
);
144 * sil680_set_dmamode - set initial DMA mode data
148 * Program the MWDMA/UDMA modes for the sil680 k
149 * chipset. The MWDMA mode values are pulled from a lookup table
150 * while the chipset uses mode number for UDMA.
153 static void sil680_set_dmamode(struct ata_port
*ap
, struct ata_device
*adev
)
155 static u8 ultra_table
[2][7] = {
156 { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01, 0xFF }, /* 100MHz */
157 { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }, /* 133Mhz */
159 static u16 dma_table
[3] = { 0x2208, 0x10C2, 0x10C1 };
161 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
162 unsigned long ma
= sil680_seldev(ap
, adev
, 0x08);
163 unsigned long ua
= sil680_seldev(ap
, adev
, 0x0C);
164 unsigned long addr_mask
= 0x80 + 4 * ap
->port_no
;
165 int port_shift
= adev
->devno
* 4;
169 pci_read_config_byte(pdev
, 0x8A, &scsc
);
170 pci_read_config_byte(pdev
, addr_mask
, &mode
);
171 pci_read_config_word(pdev
, ma
, &multi
);
172 pci_read_config_word(pdev
, ua
, &ultra
);
174 /* Mask timing bits */
176 mode
&= ~(0x03 << port_shift
);
179 scsc
= (scsc
& 0x30) ? 1: 0;
181 if (adev
->dma_mode
>= XFER_UDMA_0
) {
183 ultra
|= ultra_table
[scsc
][adev
->dma_mode
- XFER_UDMA_0
];
184 mode
|= (0x03 << port_shift
);
186 multi
= dma_table
[adev
->dma_mode
- XFER_MW_DMA_0
];
187 mode
|= (0x02 << port_shift
);
189 pci_write_config_byte(pdev
, addr_mask
, mode
);
190 pci_write_config_word(pdev
, ma
, multi
);
191 pci_write_config_word(pdev
, ua
, ultra
);
194 static struct scsi_host_template sil680_sht
= {
195 ATA_BMDMA_SHT(DRV_NAME
),
198 static struct ata_port_operations sil680_port_ops
= {
199 .set_piomode
= sil680_set_piomode
,
200 .set_dmamode
= sil680_set_dmamode
,
201 .mode_filter
= ata_pci_default_filter
,
202 .tf_load
= ata_tf_load
,
203 .tf_read
= ata_tf_read
,
204 .check_status
= ata_check_status
,
205 .exec_command
= ata_exec_command
,
206 .dev_select
= ata_std_dev_select
,
208 .freeze
= ata_bmdma_freeze
,
209 .thaw
= ata_bmdma_thaw
,
210 .error_handler
= ata_bmdma_error_handler
,
211 .post_internal_cmd
= ata_bmdma_post_internal_cmd
,
212 .cable_detect
= sil680_cable_detect
,
214 .bmdma_setup
= ata_bmdma_setup
,
215 .bmdma_start
= ata_bmdma_start
,
216 .bmdma_stop
= ata_bmdma_stop
,
217 .bmdma_status
= ata_bmdma_status
,
219 .qc_prep
= ata_qc_prep
,
220 .qc_issue
= ata_qc_issue_prot
,
222 .data_xfer
= ata_data_xfer
,
224 .irq_handler
= ata_interrupt
,
225 .irq_clear
= ata_bmdma_irq_clear
,
226 .irq_on
= ata_irq_on
,
228 .port_start
= ata_sff_port_start
,
232 * sil680_init_chip - chip setup
235 * Perform all the chip setup which must be done both when the device
236 * is powered up on boot and when we resume in case we resumed from RAM.
237 * Returns the final clock settings.
240 static u8
sil680_init_chip(struct pci_dev
*pdev
, int *try_mmio
)
245 pci_read_config_dword(pdev
, PCI_CLASS_REVISION
, &class_rev
);
247 /* FIXME: double check */
248 pci_write_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, (class_rev
) ? 1 : 255);
250 pci_write_config_byte(pdev
, 0x80, 0x00);
251 pci_write_config_byte(pdev
, 0x84, 0x00);
253 pci_read_config_byte(pdev
, 0x8A, &tmpbyte
);
255 dev_dbg(&pdev
->dev
, "sil680: BA5_EN = %d clock = %02X\n",
256 tmpbyte
& 1, tmpbyte
& 0x30);
259 #ifdef CONFIG_PPC_MERGE
260 if (machine_is(cell
))
261 *try_mmio
= (tmpbyte
& 1) || pci_resource_start(pdev
, 5);
264 switch(tmpbyte
& 0x30) {
266 /* 133 clock attempt to force it on */
267 pci_write_config_byte(pdev
, 0x8A, tmpbyte
|0x10);
270 /* if clocking is disabled */
271 /* 133 clock attempt to force it on */
272 pci_write_config_byte(pdev
, 0x8A, tmpbyte
& ~0x20);
278 /* BIOS set PCI x2 clocking */
282 pci_read_config_byte(pdev
, 0x8A, &tmpbyte
);
283 dev_dbg(&pdev
->dev
, "sil680: BA5_EN = %d clock = %02X\n",
284 tmpbyte
& 1, tmpbyte
& 0x30);
286 pci_write_config_byte(pdev
, 0xA1, 0x72);
287 pci_write_config_word(pdev
, 0xA2, 0x328A);
288 pci_write_config_dword(pdev
, 0xA4, 0x62DD62DD);
289 pci_write_config_dword(pdev
, 0xA8, 0x43924392);
290 pci_write_config_dword(pdev
, 0xAC, 0x40094009);
291 pci_write_config_byte(pdev
, 0xB1, 0x72);
292 pci_write_config_word(pdev
, 0xB2, 0x328A);
293 pci_write_config_dword(pdev
, 0xB4, 0x62DD62DD);
294 pci_write_config_dword(pdev
, 0xB8, 0x43924392);
295 pci_write_config_dword(pdev
, 0xBC, 0x40094009);
297 switch(tmpbyte
& 0x30) {
298 case 0x00: printk(KERN_INFO
"sil680: 100MHz clock.\n");break;
299 case 0x10: printk(KERN_INFO
"sil680: 133MHz clock.\n");break;
300 case 0x20: printk(KERN_INFO
"sil680: Using PCI clock.\n");break;
301 /* This last case is _NOT_ ok */
302 case 0x30: printk(KERN_ERR
"sil680: Clock disabled ?\n");
304 return tmpbyte
& 0x30;
307 static int __devinit
sil680_init_one(struct pci_dev
*pdev
,
308 const struct pci_device_id
*id
)
310 static const struct ata_port_info info
= {
312 .flags
= ATA_FLAG_SLAVE_POSS
,
315 .udma_mask
= ATA_UDMA6
,
316 .port_ops
= &sil680_port_ops
318 static const struct ata_port_info info_slow
= {
320 .flags
= ATA_FLAG_SLAVE_POSS
,
323 .udma_mask
= ATA_UDMA5
,
324 .port_ops
= &sil680_port_ops
326 const struct ata_port_info
*ppi
[] = { &info
, NULL
};
327 static int printed_version
;
328 struct ata_host
*host
;
329 void __iomem
*mmio_base
;
332 if (!printed_version
++)
333 dev_printk(KERN_DEBUG
, &pdev
->dev
, "version " DRV_VERSION
"\n");
335 rc
= pcim_enable_device(pdev
);
339 switch (sil680_init_chip(pdev
, &try_mmio
)) {
350 /* Try to acquire MMIO resources and fallback to PIO if
353 rc
= pcim_enable_device(pdev
);
356 rc
= pcim_iomap_regions(pdev
, 1 << SIL680_MMIO_BAR
, DRV_NAME
);
360 /* Allocate host and set it up */
361 host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, 2);
364 host
->iomap
= pcim_iomap_table(pdev
);
366 /* Setup DMA masks */
367 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
370 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
373 pci_set_master(pdev
);
375 /* Get MMIO base and initialize port addresses */
376 mmio_base
= host
->iomap
[SIL680_MMIO_BAR
];
377 host
->ports
[0]->ioaddr
.bmdma_addr
= mmio_base
+ 0x00;
378 host
->ports
[0]->ioaddr
.cmd_addr
= mmio_base
+ 0x80;
379 host
->ports
[0]->ioaddr
.ctl_addr
= mmio_base
+ 0x8a;
380 host
->ports
[0]->ioaddr
.altstatus_addr
= mmio_base
+ 0x8a;
381 ata_std_ports(&host
->ports
[0]->ioaddr
);
382 host
->ports
[1]->ioaddr
.bmdma_addr
= mmio_base
+ 0x08;
383 host
->ports
[1]->ioaddr
.cmd_addr
= mmio_base
+ 0xc0;
384 host
->ports
[1]->ioaddr
.ctl_addr
= mmio_base
+ 0xca;
385 host
->ports
[1]->ioaddr
.altstatus_addr
= mmio_base
+ 0xca;
386 ata_std_ports(&host
->ports
[1]->ioaddr
);
388 /* Register & activate */
389 return ata_host_activate(host
, pdev
->irq
, ata_interrupt
, IRQF_SHARED
,
393 return ata_pci_init_one(pdev
, ppi
);
397 static int sil680_reinit_one(struct pci_dev
*pdev
)
399 struct ata_host
*host
= dev_get_drvdata(&pdev
->dev
);
402 rc
= ata_pci_device_do_resume(pdev
);
405 sil680_init_chip(pdev
, &try_mmio
);
406 ata_host_resume(host
);
411 static const struct pci_device_id sil680
[] = {
412 { PCI_VDEVICE(CMD
, PCI_DEVICE_ID_SII_680
), },
417 static struct pci_driver sil680_pci_driver
= {
420 .probe
= sil680_init_one
,
421 .remove
= ata_pci_remove_one
,
423 .suspend
= ata_pci_device_suspend
,
424 .resume
= sil680_reinit_one
,
428 static int __init
sil680_init(void)
430 return pci_register_driver(&sil680_pci_driver
);
433 static void __exit
sil680_exit(void)
435 pci_unregister_driver(&sil680_pci_driver
);
438 MODULE_AUTHOR("Alan Cox");
439 MODULE_DESCRIPTION("low-level driver for SI680 PATA");
440 MODULE_LICENSE("GPL");
441 MODULE_DEVICE_TABLE(pci
, sil680
);
442 MODULE_VERSION(DRV_VERSION
);
444 module_init(sil680_init
);
445 module_exit(sil680_exit
);