2 * pata_sis.c - SiS ATA driver
4 * (C) 2005 Red Hat <alan@redhat.com>
5 * (C) 2007 Bartlomiej Zolnierkiewicz
7 * Based upon linux/drivers/ide/pci/sis5513.c
8 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
9 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
10 * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz>
11 * SiS Taiwan : for direct support and hardware.
12 * Daniela Engert : for initial ATA100 advices and numerous others.
13 * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt :
14 * for checking code correctness, providing patches.
15 * Original tests and design on the SiS620 chipset.
16 * ATA100 tests and design on the SiS735 chipset.
17 * ATA16/33 support from specs
18 * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
22 * Check MWDMA on drives that don't support MWDMA speed pio cycles ?
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/blkdev.h>
31 #include <linux/delay.h>
32 #include <linux/device.h>
33 #include <scsi/scsi_host.h>
34 #include <linux/libata.h>
35 #include <linux/ata.h>
38 #define DRV_NAME "pata_sis"
39 #define DRV_VERSION "0.5.2"
42 u16 device
; /* PCI host ID */
43 const struct ata_port_info
*info
; /* Info block */
44 /* Probably add family, cable detect type etc here to clean
54 static const struct sis_laptop sis_laptop
[] = {
55 /* devid, subvendor, subdev */
56 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
57 { 0x5513, 0x1734, 0x105F }, /* FSC Amilo A1630 */
58 { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */
63 static int sis_short_ata40(struct pci_dev
*dev
)
65 const struct sis_laptop
*lap
= &sis_laptop
[0];
68 if (lap
->device
== dev
->device
&&
69 lap
->subvendor
== dev
->subsystem_vendor
&&
70 lap
->subdevice
== dev
->subsystem_device
)
79 * sis_old_port_base - return PCI configuration base for dev
82 * Returns the base of the PCI configuration registers for this port
86 static int sis_old_port_base(struct ata_device
*adev
)
88 return 0x40 + (4 * adev
->link
->ap
->port_no
) + (2 * adev
->devno
);
92 * sis_133_cable_detect - check for 40/80 pin
94 * @deadline: deadline jiffies for the operation
96 * Perform cable detection for the later UDMA133 capable
100 static int sis_133_cable_detect(struct ata_port
*ap
)
102 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
105 /* The top bit of this register is the cable detect bit */
106 pci_read_config_word(pdev
, 0x50 + 2 * ap
->port_no
, &tmp
);
107 if ((tmp
& 0x8000) && !sis_short_ata40(pdev
))
108 return ATA_CBL_PATA40
;
109 return ATA_CBL_PATA80
;
113 * sis_66_cable_detect - check for 40/80 pin
115 * @deadline: deadline jiffies for the operation
117 * Perform cable detection on the UDMA66, UDMA100 and early UDMA133
118 * SiS IDE controllers.
121 static int sis_66_cable_detect(struct ata_port
*ap
)
123 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
126 /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
127 pci_read_config_byte(pdev
, 0x48, &tmp
);
129 if ((tmp
& 0x10) && !sis_short_ata40(pdev
))
130 return ATA_CBL_PATA40
;
131 return ATA_CBL_PATA80
;
136 * sis_pre_reset - probe begin
138 * @deadline: deadline jiffies for the operation
140 * Set up cable type and use generic probe init
143 static int sis_pre_reset(struct ata_link
*link
, unsigned long deadline
)
145 static const struct pci_bits sis_enable_bits
[] = {
146 { 0x4aU
, 1U, 0x02UL
, 0x02UL
}, /* port 0 */
147 { 0x4aU
, 1U, 0x04UL
, 0x04UL
}, /* port 1 */
150 struct ata_port
*ap
= link
->ap
;
151 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
153 if (!pci_test_config_bits(pdev
, &sis_enable_bits
[ap
->port_no
]))
156 /* Clear the FIFO settings. We can't enable the FIFO until
157 we know we are poking at a disk */
158 pci_write_config_byte(pdev
, 0x4B, 0);
159 return ata_std_prereset(link
, deadline
);
164 * sis_error_handler - Probe specified port on PATA host controller
168 * None (inherited from caller).
171 static void sis_error_handler(struct ata_port
*ap
)
173 ata_bmdma_drive_eh(ap
, sis_pre_reset
, ata_std_softreset
, NULL
, ata_std_postreset
);
177 * sis_set_fifo - Set RWP fifo bits for this device
181 * SIS chipsets implement prefetch/postwrite bits for each device
182 * on both channels. This functionality is not ATAPI compatible and
183 * must be configured according to the class of device present
186 static void sis_set_fifo(struct ata_port
*ap
, struct ata_device
*adev
)
188 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
192 mask
<<= (2 * ap
->port_no
);
193 mask
<<= adev
->devno
;
195 /* This holds various bits including the FIFO control */
196 pci_read_config_byte(pdev
, 0x4B, &fifoctrl
);
199 /* Enable for ATA (disk) only */
200 if (adev
->class == ATA_DEV_ATA
)
202 pci_write_config_byte(pdev
, 0x4B, fifoctrl
);
206 * sis_old_set_piomode - Initialize host controller PATA PIO timings
207 * @ap: Port whose timings we are configuring
208 * @adev: Device we are configuring for.
210 * Set PIO mode for device, in host controller PCI config space. This
211 * function handles PIO set up for all chips that are pre ATA100 and
212 * also early ATA100 devices.
215 * None (inherited from caller).
218 static void sis_old_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
220 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
221 int port
= sis_old_port_base(adev
);
223 int speed
= adev
->pio_mode
- XFER_PIO_0
;
225 const u8 active
[] = { 0x00, 0x07, 0x04, 0x03, 0x01 };
226 const u8 recovery
[] = { 0x00, 0x06, 0x04, 0x03, 0x03 };
228 sis_set_fifo(ap
, adev
);
230 pci_read_config_byte(pdev
, port
, &t1
);
231 pci_read_config_byte(pdev
, port
+ 1, &t2
);
233 t1
&= ~0x0F; /* Clear active/recovery timings */
237 t2
|= recovery
[speed
];
239 pci_write_config_byte(pdev
, port
, t1
);
240 pci_write_config_byte(pdev
, port
+ 1, t2
);
244 * sis_100_set_piomode - Initialize host controller PATA PIO timings
245 * @ap: Port whose timings we are configuring
246 * @adev: Device we are configuring for.
248 * Set PIO mode for device, in host controller PCI config space. This
249 * function handles PIO set up for ATA100 devices and early ATA133.
252 * None (inherited from caller).
255 static void sis_100_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
257 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
258 int port
= sis_old_port_base(adev
);
259 int speed
= adev
->pio_mode
- XFER_PIO_0
;
261 const u8 actrec
[] = { 0x00, 0x67, 0x44, 0x33, 0x31 };
263 sis_set_fifo(ap
, adev
);
265 pci_write_config_byte(pdev
, port
, actrec
[speed
]);
269 * sis_133_set_piomode - Initialize host controller PATA PIO timings
270 * @ap: Port whose timings we are configuring
271 * @adev: Device we are configuring for.
273 * Set PIO mode for device, in host controller PCI config space. This
274 * function handles PIO set up for the later ATA133 devices.
277 * None (inherited from caller).
280 static void sis_133_set_piomode (struct ata_port
*ap
, struct ata_device
*adev
)
282 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
286 int speed
= adev
->pio_mode
- XFER_PIO_0
;
288 const u32 timing133
[] = {
289 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */
295 const u32 timing100
[] = {
296 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */
303 sis_set_fifo(ap
, adev
);
305 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
306 pci_read_config_dword(pdev
, 0x54, ®54
);
307 if (reg54
& 0x40000000)
309 port
+= 8 * ap
->port_no
+ 4 * adev
->devno
;
311 pci_read_config_dword(pdev
, port
, &t1
);
312 t1
&= 0xC0C00FFF; /* Mask out timing */
314 if (t1
& 0x08) /* 100 or 133 ? */
315 t1
|= timing133
[speed
];
317 t1
|= timing100
[speed
];
318 pci_write_config_byte(pdev
, port
, t1
);
322 * sis_old_set_dmamode - Initialize host controller PATA DMA timings
323 * @ap: Port whose timings we are configuring
324 * @adev: Device to program
326 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
327 * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike
328 * the old ide/pci driver.
331 * None (inherited from caller).
334 static void sis_old_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
336 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
337 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
338 int drive_pci
= sis_old_port_base(adev
);
341 const u16 mwdma_bits
[] = { 0x008, 0x302, 0x301 };
342 const u16 udma_bits
[] = { 0xE000, 0xC000, 0xA000 };
344 pci_read_config_word(pdev
, drive_pci
, &timing
);
346 if (adev
->dma_mode
< XFER_UDMA_0
) {
347 /* bits 3-0 hold recovery timing bits 8-10 active timing and
348 the higher bits are dependant on the device */
350 timing
|= mwdma_bits
[speed
];
352 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
353 speed
= adev
->dma_mode
- XFER_UDMA_0
;
355 timing
|= udma_bits
[speed
];
357 pci_write_config_word(pdev
, drive_pci
, timing
);
361 * sis_66_set_dmamode - Initialize host controller PATA DMA timings
362 * @ap: Port whose timings we are configuring
363 * @adev: Device to program
365 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
366 * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike
367 * the old ide/pci driver.
370 * None (inherited from caller).
373 static void sis_66_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
375 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
376 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
377 int drive_pci
= sis_old_port_base(adev
);
380 /* MWDMA 0-2 and UDMA 0-5 */
381 const u16 mwdma_bits
[] = { 0x008, 0x302, 0x301 };
382 const u16 udma_bits
[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000, 0x8000 };
384 pci_read_config_word(pdev
, drive_pci
, &timing
);
386 if (adev
->dma_mode
< XFER_UDMA_0
) {
387 /* bits 3-0 hold recovery timing bits 8-10 active timing and
388 the higher bits are dependant on the device, bit 15 udma */
390 timing
|= mwdma_bits
[speed
];
392 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
393 speed
= adev
->dma_mode
- XFER_UDMA_0
;
395 timing
|= udma_bits
[speed
];
397 pci_write_config_word(pdev
, drive_pci
, timing
);
401 * sis_100_set_dmamode - Initialize host controller PATA DMA timings
402 * @ap: Port whose timings we are configuring
403 * @adev: Device to program
405 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
406 * Handles UDMA66 and early UDMA100 devices.
409 * None (inherited from caller).
412 static void sis_100_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
414 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
415 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
416 int drive_pci
= sis_old_port_base(adev
);
419 const u8 udma_bits
[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81};
421 pci_read_config_byte(pdev
, drive_pci
+ 1, &timing
);
423 if (adev
->dma_mode
< XFER_UDMA_0
) {
424 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
426 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
427 speed
= adev
->dma_mode
- XFER_UDMA_0
;
429 timing
|= udma_bits
[speed
];
431 pci_write_config_byte(pdev
, drive_pci
+ 1, timing
);
435 * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings
436 * @ap: Port whose timings we are configuring
437 * @adev: Device to program
439 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
440 * Handles early SiS 961 bridges.
443 * None (inherited from caller).
446 static void sis_133_early_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
448 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
449 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
450 int drive_pci
= sis_old_port_base(adev
);
452 /* Low 4 bits are timing */
453 static const u8 udma_bits
[] = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81};
455 pci_read_config_byte(pdev
, drive_pci
+ 1, &timing
);
457 if (adev
->dma_mode
< XFER_UDMA_0
) {
458 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
460 /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */
461 speed
= adev
->dma_mode
- XFER_UDMA_0
;
463 timing
|= udma_bits
[speed
];
465 pci_write_config_byte(pdev
, drive_pci
+ 1, timing
);
469 * sis_133_set_dmamode - Initialize host controller PATA DMA timings
470 * @ap: Port whose timings we are configuring
471 * @adev: Device to program
473 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
476 * None (inherited from caller).
479 static void sis_133_set_dmamode (struct ata_port
*ap
, struct ata_device
*adev
)
481 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
482 int speed
= adev
->dma_mode
- XFER_MW_DMA_0
;
487 /* bits 4- cycle time 8 - cvs time */
488 static const u32 timing_u100
[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 };
489 static const u32 timing_u133
[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 };
491 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
492 pci_read_config_dword(pdev
, 0x54, ®54
);
493 if (reg54
& 0x40000000)
495 port
+= (8 * ap
->port_no
) + (4 * adev
->devno
);
497 pci_read_config_dword(pdev
, port
, &t1
);
499 if (adev
->dma_mode
< XFER_UDMA_0
) {
501 /* FIXME: need data sheet to add MWDMA here. Also lacking on
504 speed
= adev
->dma_mode
- XFER_UDMA_0
;
505 /* if & 8 no UDMA133 - need info for ... */
509 t1
|= timing_u133
[speed
];
511 t1
|= timing_u100
[speed
];
513 pci_write_config_dword(pdev
, port
, t1
);
516 static struct scsi_host_template sis_sht
= {
517 ATA_BMDMA_SHT(DRV_NAME
),
520 static struct ata_port_operations sis_133_for_sata_ops
= {
521 .inherits
= &ata_bmdma_port_ops
,
522 .set_piomode
= sis_133_set_piomode
,
523 .set_dmamode
= sis_133_set_dmamode
,
524 .cable_detect
= sis_133_cable_detect
,
527 static struct ata_port_operations sis_base_ops
= {
528 .inherits
= &ata_bmdma_port_ops
,
529 .error_handler
= sis_error_handler
,
532 static struct ata_port_operations sis_133_ops
= {
533 .inherits
= &sis_base_ops
,
534 .set_piomode
= sis_133_set_piomode
,
535 .set_dmamode
= sis_133_set_dmamode
,
536 .cable_detect
= sis_133_cable_detect
,
539 static struct ata_port_operations sis_133_early_ops
= {
540 .inherits
= &sis_base_ops
,
541 .set_piomode
= sis_100_set_piomode
,
542 .set_dmamode
= sis_133_early_set_dmamode
,
543 .cable_detect
= sis_66_cable_detect
,
546 static struct ata_port_operations sis_100_ops
= {
547 .inherits
= &sis_base_ops
,
548 .set_piomode
= sis_100_set_piomode
,
549 .set_dmamode
= sis_100_set_dmamode
,
550 .cable_detect
= sis_66_cable_detect
,
553 static struct ata_port_operations sis_66_ops
= {
554 .inherits
= &sis_base_ops
,
555 .set_piomode
= sis_old_set_piomode
,
556 .set_dmamode
= sis_66_set_dmamode
,
557 .cable_detect
= sis_66_cable_detect
,
560 static struct ata_port_operations sis_old_ops
= {
561 .inherits
= &sis_base_ops
,
562 .set_piomode
= sis_old_set_piomode
,
563 .set_dmamode
= sis_old_set_dmamode
,
564 .cable_detect
= ata_cable_40wire
,
567 static const struct ata_port_info sis_info
= {
568 .flags
= ATA_FLAG_SLAVE_POSS
,
569 .pio_mask
= 0x1f, /* pio0-4 */
572 .port_ops
= &sis_old_ops
,
574 static const struct ata_port_info sis_info33
= {
575 .flags
= ATA_FLAG_SLAVE_POSS
,
576 .pio_mask
= 0x1f, /* pio0-4 */
578 .udma_mask
= ATA_UDMA2
, /* UDMA 33 */
579 .port_ops
= &sis_old_ops
,
581 static const struct ata_port_info sis_info66
= {
582 .flags
= ATA_FLAG_SLAVE_POSS
,
583 .pio_mask
= 0x1f, /* pio0-4 */
584 .udma_mask
= ATA_UDMA4
, /* UDMA 66 */
585 .port_ops
= &sis_66_ops
,
587 static const struct ata_port_info sis_info100
= {
588 .flags
= ATA_FLAG_SLAVE_POSS
,
589 .pio_mask
= 0x1f, /* pio0-4 */
590 .udma_mask
= ATA_UDMA5
,
591 .port_ops
= &sis_100_ops
,
593 static const struct ata_port_info sis_info100_early
= {
594 .flags
= ATA_FLAG_SLAVE_POSS
,
595 .udma_mask
= ATA_UDMA5
,
596 .pio_mask
= 0x1f, /* pio0-4 */
597 .port_ops
= &sis_66_ops
,
599 static const struct ata_port_info sis_info133
= {
600 .flags
= ATA_FLAG_SLAVE_POSS
,
601 .pio_mask
= 0x1f, /* pio0-4 */
602 .udma_mask
= ATA_UDMA6
,
603 .port_ops
= &sis_133_ops
,
605 const struct ata_port_info sis_info133_for_sata
= {
606 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
,
607 .pio_mask
= 0x1f, /* pio0-4 */
608 .udma_mask
= ATA_UDMA6
,
609 .port_ops
= &sis_133_for_sata_ops
,
611 static const struct ata_port_info sis_info133_early
= {
612 .flags
= ATA_FLAG_SLAVE_POSS
,
613 .pio_mask
= 0x1f, /* pio0-4 */
614 .udma_mask
= ATA_UDMA6
,
615 .port_ops
= &sis_133_early_ops
,
618 /* Privately shared with the SiS180 SATA driver, not for use elsewhere */
619 EXPORT_SYMBOL_GPL(sis_info133_for_sata
);
621 static void sis_fixup(struct pci_dev
*pdev
, struct sis_chipset
*sis
)
626 if (sis
->info
== &sis_info133
) {
627 pci_read_config_word(pdev
, 0x50, ®w
);
629 pci_write_config_word(pdev
, 0x50, regw
& ~0x08);
630 pci_read_config_word(pdev
, 0x52, ®w
);
632 pci_write_config_word(pdev
, 0x52, regw
& ~0x08);
636 if (sis
->info
== &sis_info133_early
|| sis
->info
== &sis_info100
) {
638 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 0x80);
639 /* Set compatibility bit */
640 pci_read_config_byte(pdev
, 0x49, ®
);
642 pci_write_config_byte(pdev
, 0x49, reg
| 0x01);
646 if (sis
->info
== &sis_info66
|| sis
->info
== &sis_info100_early
) {
648 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 0x80);
649 /* Set compatibility bit */
650 pci_read_config_byte(pdev
, 0x52, ®
);
652 pci_write_config_byte(pdev
, 0x52, reg
| 0x04);
656 if (sis
->info
== &sis_info33
) {
657 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, ®
);
658 if (( reg
& 0x0F ) != 0x00)
659 pci_write_config_byte(pdev
, PCI_CLASS_PROG
, reg
& 0xF0);
660 /* Fall through to ATA16 fixup below */
663 if (sis
->info
== &sis_info
|| sis
->info
== &sis_info33
) {
664 /* force per drive recovery and active timings
665 needed on ATA_33 and below chips */
666 pci_read_config_byte(pdev
, 0x52, ®
);
668 pci_write_config_byte(pdev
, 0x52, reg
|0x08);
676 * sis_init_one - Register SiS ATA PCI device with kernel services
677 * @pdev: PCI device to register
678 * @ent: Entry in sis_pci_tbl matching with @pdev
680 * Called from kernel PCI layer. We probe for combined mode (sigh),
681 * and then hand over control to libata, for it to do the rest.
684 * Inherited from PCI layer (may sleep).
687 * Zero on success, or -ERRNO value.
690 static int sis_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
692 static int printed_version
;
693 const struct ata_port_info
*ppi
[] = { NULL
, NULL
};
694 struct pci_dev
*host
= NULL
;
695 struct sis_chipset
*chipset
= NULL
;
696 struct sis_chipset
*sets
;
699 static struct sis_chipset sis_chipsets
[] = {
701 { 0x0968, &sis_info133
},
702 { 0x0966, &sis_info133
},
703 { 0x0965, &sis_info133
},
704 { 0x0745, &sis_info100
},
705 { 0x0735, &sis_info100
},
706 { 0x0733, &sis_info100
},
707 { 0x0635, &sis_info100
},
708 { 0x0633, &sis_info100
},
710 { 0x0730, &sis_info100_early
}, /* 100 with ATA 66 layout */
711 { 0x0550, &sis_info100_early
}, /* 100 with ATA 66 layout */
713 { 0x0640, &sis_info66
},
714 { 0x0630, &sis_info66
},
715 { 0x0620, &sis_info66
},
716 { 0x0540, &sis_info66
},
717 { 0x0530, &sis_info66
},
719 { 0x5600, &sis_info33
},
720 { 0x5598, &sis_info33
},
721 { 0x5597, &sis_info33
},
722 { 0x5591, &sis_info33
},
723 { 0x5582, &sis_info33
},
724 { 0x5581, &sis_info33
},
726 { 0x5596, &sis_info
},
727 { 0x5571, &sis_info
},
728 { 0x5517, &sis_info
},
729 { 0x5511, &sis_info
},
733 static struct sis_chipset sis133_early
= {
734 0x0, &sis_info133_early
736 static struct sis_chipset sis133
= {
739 static struct sis_chipset sis100_early
= {
740 0x0, &sis_info100_early
742 static struct sis_chipset sis100
= {
746 if (!printed_version
++)
747 dev_printk(KERN_DEBUG
, &pdev
->dev
,
748 "version " DRV_VERSION
"\n");
750 rc
= pcim_enable_device(pdev
);
754 /* We have to find the bridge first */
755 for (sets
= &sis_chipsets
[0]; sets
->device
; sets
++) {
756 host
= pci_get_device(PCI_VENDOR_ID_SI
, sets
->device
, NULL
);
758 chipset
= sets
; /* Match found */
759 if (sets
->device
== 0x630) { /* SIS630 */
760 if (host
->revision
>= 0x30) /* 630 ET */
761 chipset
= &sis100_early
;
767 /* Look for concealed bridges */
768 if (chipset
== NULL
) {
773 /* Disable ID masking and register remapping then
774 see what the real ID is */
776 pci_read_config_dword(pdev
, 0x54, &idemisc
);
777 pci_write_config_dword(pdev
, 0x54, idemisc
& 0x7fffffff);
778 pci_read_config_word(pdev
, PCI_DEVICE_ID
, &trueid
);
779 pci_write_config_dword(pdev
, 0x54, idemisc
);
782 case 0x5518: /* SIS 962/963 */
784 if ((idemisc
& 0x40000000) == 0) {
785 pci_write_config_dword(pdev
, 0x54, idemisc
| 0x40000000);
786 printk(KERN_INFO
"SIS5513: Switching to 5513 register mapping\n");
789 case 0x0180: /* SIS 965/965L */
792 case 0x1180: /* SIS 966/966L */
799 if (chipset
== NULL
) {
800 struct pci_dev
*lpc_bridge
;
805 /* Try the second unmasking technique */
806 pci_read_config_byte(pdev
, 0x4a, &idecfg
);
807 pci_write_config_byte(pdev
, 0x4a, idecfg
| 0x10);
808 pci_read_config_word(pdev
, PCI_DEVICE_ID
, &trueid
);
809 pci_write_config_byte(pdev
, 0x4a, idecfg
);
813 lpc_bridge
= pci_get_slot(pdev
->bus
, 0x10); /* Bus 0 Dev 2 Fn 0 */
814 if (lpc_bridge
== NULL
)
816 pci_read_config_byte(pdev
, 0x49, &prefctl
);
817 pci_dev_put(lpc_bridge
);
819 if (lpc_bridge
->revision
== 0x10 && (prefctl
& 0x80)) {
820 chipset
= &sis133_early
;
829 /* No chipset info, no support */
833 ppi
[0] = chipset
->info
;
835 sis_fixup(pdev
, chipset
);
837 return ata_pci_init_one(pdev
, ppi
, &sis_sht
, chipset
);
840 static const struct pci_device_id sis_pci_tbl
[] = {
841 { PCI_VDEVICE(SI
, 0x5513), }, /* SiS 5513 */
842 { PCI_VDEVICE(SI
, 0x5518), }, /* SiS 5518 */
843 { PCI_VDEVICE(SI
, 0x1180), }, /* SiS 1180 */
848 static struct pci_driver sis_pci_driver
= {
850 .id_table
= sis_pci_tbl
,
851 .probe
= sis_init_one
,
852 .remove
= ata_pci_remove_one
,
854 .suspend
= ata_pci_device_suspend
,
855 .resume
= ata_pci_device_resume
,
859 static int __init
sis_init(void)
861 return pci_register_driver(&sis_pci_driver
);
864 static void __exit
sis_exit(void)
866 pci_unregister_driver(&sis_pci_driver
);
869 module_init(sis_init
);
870 module_exit(sis_exit
);
872 MODULE_AUTHOR("Alan Cox");
873 MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA");
874 MODULE_LICENSE("GPL");
875 MODULE_DEVICE_TABLE(pci
, sis_pci_tbl
);
876 MODULE_VERSION(DRV_VERSION
);