drivers/ata/pata_via.c

   1 /*
   2  * pata_via.c   - VIA PATA for new ATA layer
   3  *                        (C) 2005-2006 Red Hat Inc
   4  *                        Alan Cox <alan@redhat.com>
   5  *
   6  *  Documentation
   7  *      Most chipset documentation available under NDA only
   8  *
   9  *  VIA version guide
  10  *      VIA VT82C561    -       early design, uses ata_generic currently
  11  *      VIA VT82C576    -       MWDMA, 33Mhz
  12  *      VIA VT82C586    -       MWDMA, 33Mhz
  13  *      VIA VT82C586a   -       Added UDMA to 33Mhz
  14  *      VIA VT82C586b   -       UDMA33
  15  *      VIA VT82C596a   -       Nonfunctional UDMA66
  16  *      VIA VT82C596b   -       Working UDMA66
  17  *      VIA VT82C686    -       Nonfunctional UDMA66
  18  *      VIA VT82C686a   -       Working UDMA66
  19  *      VIA VT82C686b   -       Updated to UDMA100
  20  *      VIA VT8231      -       UDMA100
  21  *      VIA VT8233      -       UDMA100
  22  *      VIA VT8233a     -       UDMA133
  23  *      VIA VT8233c     -       UDMA100
  24  *      VIA VT8235      -       UDMA133
  25  *      VIA VT8237      -       UDMA133
  26  *      VIA VT8237S     -       UDMA133
  27  *      VIA VT8251      -       UDMA133
  28  *
  29  *      Most registers remain compatible across chips. Others start reserved
  30  *      and acquire sensible semantics if set to 1 (eg cable detect). A few
  31  *      exceptions exist, notably around the FIFO settings.
  32  *
  33  *      One additional quirk of the VIA design is that like ALi they use few
  34  *      PCI IDs for a lot of chips.
  35  *
  36  *      Based heavily on:
  37  *
  38  * Version 3.38
  39  *
  40  * VIA IDE driver for Linux. Supported southbridges:
  41  *
  42  *   vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
  43  *   vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
  44  *   vt8235, vt8237
  45  *
  46  * Copyright (c) 2000-2002 Vojtech Pavlik
  47  *
  48  * Based on the work of:
  49  *      Michel Aubry
  50  *      Jeff Garzik
  51  *      Andre Hedrick
  52
  53  */
  54
  55 #include <linux/kernel.h>
  56 #include <linux/module.h>
  57 #include <linux/pci.h>
  58 #include <linux/init.h>
  59 #include <linux/blkdev.h>
  60 #include <linux/delay.h>
  61 #include <scsi/scsi_host.h>
  62 #include <linux/libata.h>
  63 #include <linux/dmi.h>
  64
  65 #define DRV_NAME "pata_via"
  66 #define DRV_VERSION "0.3.3"
  67
  68 /*
  69  *      The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
  70  *      driver.
  71  */
  72
  73 enum {
  74         VIA_UDMA        = 0x007,
  75         VIA_UDMA_NONE   = 0x000,
  76         VIA_UDMA_33     = 0x001,
  77         VIA_UDMA_66     = 0x002,
  78         VIA_UDMA_100    = 0x003,
  79         VIA_UDMA_133    = 0x004,
  80         VIA_BAD_PREQ    = 0x010, /* Crashes if PREQ# till DDACK# set */
  81         VIA_BAD_CLK66   = 0x020, /* 66 MHz clock doesn't work correctly */
  82         VIA_SET_FIFO    = 0x040, /* Needs to have FIFO split set */
  83         VIA_NO_UNMASK   = 0x080, /* Doesn't work with IRQ unmasking on */
  84         VIA_BAD_ID      = 0x100, /* Has wrong vendor ID (0x1107) */
  85         VIA_BAD_AST     = 0x200, /* Don't touch Address Setup Timing */
  86         VIA_NO_ENABLES  = 0x400, /* Has no enablebits */
  87         VIA_SATA_PATA   = 0x800, /* SATA/PATA combined configuration */
  88 };
  89
  90 /*
  91  * VIA SouthBridge chips.
  92  */
  93
  94 static const struct via_isa_bridge {
  95         const char *name;
  96         u16 id;
  97         u8 rev_min;
  98         u8 rev_max;
  99         u16 flags;
 100 } via_isa_bridges[] = {
 101         { "vx800",      PCI_DEVICE_ID_VIA_VX800,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 102         { "vt8237s",    PCI_DEVICE_ID_VIA_8237S,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 103         { "vt8251",     PCI_DEVICE_ID_VIA_8251,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 104         { "cx700",      PCI_DEVICE_ID_VIA_CX700,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
 105         { "vt6410",     PCI_DEVICE_ID_VIA_6410,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
 106         { "vt8237a",    PCI_DEVICE_ID_VIA_8237A,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 107         { "vt8237",     PCI_DEVICE_ID_VIA_8237,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 108         { "vt8235",     PCI_DEVICE_ID_VIA_8235,     0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 109         { "vt8233a",    PCI_DEVICE_ID_VIA_8233A,    0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
 110         { "vt8233c",    PCI_DEVICE_ID_VIA_8233C_0,  0x00, 0x2f, VIA_UDMA_100 },
 111         { "vt8233",     PCI_DEVICE_ID_VIA_8233_0,   0x00, 0x2f, VIA_UDMA_100 },
 112         { "vt8231",     PCI_DEVICE_ID_VIA_8231,     0x00, 0x2f, VIA_UDMA_100 },
 113         { "vt82c686b",  PCI_DEVICE_ID_VIA_82C686,   0x40, 0x4f, VIA_UDMA_100 },
 114         { "vt82c686a",  PCI_DEVICE_ID_VIA_82C686,   0x10, 0x2f, VIA_UDMA_66 },
 115         { "vt82c686",   PCI_DEVICE_ID_VIA_82C686,   0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
 116         { "vt82c596b",  PCI_DEVICE_ID_VIA_82C596,   0x10, 0x2f, VIA_UDMA_66 },
 117         { "vt82c596a",  PCI_DEVICE_ID_VIA_82C596,   0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
 118         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
 119         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
 120         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
 121         { "vt82c586a",  PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
 122         { "vt82c586",   PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
 123         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
 124         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
 125         { NULL }
 126 };
 127
 128
 129 /*
 130  *      Cable special cases
 131  */
 132
 133 static const struct dmi_system_id cable_dmi_table[] = {
 134         {
 135                 .ident = "Acer Ferrari 3400",
 136                 .matches = {
 137                         DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
 138                         DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
 139                 },
 140         },
 141         { }
 142 };
 143
 144 static int via_cable_override(struct pci_dev *pdev)
 145 {
 146         /* Systems by DMI */
 147         if (dmi_check_system(cable_dmi_table))
 148                 return 1;
 149         /* Arima W730-K8/Targa Visionary 811/... */
 150         if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
 151                 return 1;
 152         return 0;
 153 }
 154
 155
 156 /**
 157  *      via_cable_detect        -       cable detection
 158  *      @ap: ATA port
 159  *
 160  *      Perform cable detection. Actually for the VIA case the BIOS
 161  *      already did this for us. We read the values provided by the
 162  *      BIOS. If you are using an 8235 in a non-PC configuration you
 163  *      may need to update this code.
 164  *
 165  *      Hotplug also impacts on this.
 166  */
 167
 168 static int via_cable_detect(struct ata_port *ap) {
 169         const struct via_isa_bridge *config = ap->host->private_data;
 170         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 171         u32 ata66;
 172
 173         if (via_cable_override(pdev))
 174                 return ATA_CBL_PATA40_SHORT;
 175
 176         if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
 177                 return ATA_CBL_SATA;
 178
 179         /* Early chips are 40 wire */
 180         if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
 181                 return ATA_CBL_PATA40;
 182         /* UDMA 66 chips have only drive side logic */
 183         else if ((config->flags & VIA_UDMA) < VIA_UDMA_100)
 184                 return ATA_CBL_PATA_UNK;
 185         /* UDMA 100 or later */
 186         pci_read_config_dword(pdev, 0x50, &ata66);
 187         /* Check both the drive cable reporting bits, we might not have
 188            two drives */
 189         if (ata66 & (0x10100000 >> (16 * ap->port_no)))
 190                 return ATA_CBL_PATA80;
 191         /* Check with ACPI so we can spot BIOS reported SATA bridges */
 192         if (ata_acpi_init_gtm(ap) &&
 193             ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap)))
 194                 return ATA_CBL_PATA80;
 195         return ATA_CBL_PATA40;
 196 }
 197
 198 static int via_pre_reset(struct ata_link *link, unsigned long deadline)
 199 {
 200         struct ata_port *ap = link->ap;
 201         const struct via_isa_bridge *config = ap->host->private_data;
 202
 203         if (!(config->flags & VIA_NO_ENABLES)) {
 204                 static const struct pci_bits via_enable_bits[] = {
 205                         { 0x40, 1, 0x02, 0x02 },
 206                         { 0x40, 1, 0x01, 0x01 }
 207                 };
 208                 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 209                 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
 210                         return -ENOENT;
 211         }
 212
 213         return ata_std_prereset(link, deadline);
 214 }
 215
 216
 217 /**
 218  *      via_error_handler               -       reset for VIA chips
 219  *      @ap: ATA port
 220  *
 221  *      Handle the reset callback for the later chips with cable detect
 222  */
 223
 224 static void via_error_handler(struct ata_port *ap)
 225 {
 226         ata_bmdma_drive_eh(ap, via_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
 227 }
 228
 229 /**
 230  *      via_do_set_mode -       set initial PIO mode data
 231  *      @ap: ATA interface
 232  *      @adev: ATA device
 233  *      @mode: ATA mode being programmed
 234  *      @tdiv: Clocks per PCI clock
 235  *      @set_ast: Set to program address setup
 236  *      @udma_type: UDMA mode/format of registers
 237  *
 238  *      Program the VIA registers for DMA and PIO modes. Uses the ata timing
 239  *      support in order to compute modes.
 240  *
 241  *      FIXME: Hotplug will require we serialize multiple mode changes
 242  *      on the two channels.
 243  */
 244
 245 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
 246 {
 247         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 248         struct ata_device *peer = ata_dev_pair(adev);
 249         struct ata_timing t, p;
 250         static int via_clock = 33333;   /* Bus clock in kHZ - ought to be tunable one day */
 251         unsigned long T =  1000000000 / via_clock;
 252         unsigned long UT = T/tdiv;
 253         int ut;
 254         int offset = 3 - (2*ap->port_no) - adev->devno;
 255
 256         /* Calculate the timing values we require */
 257         ata_timing_compute(adev, mode, &t, T, UT);
 258
 259         /* We share 8bit timing so we must merge the constraints */
 260         if (peer) {
 261                 if (peer->pio_mode) {
 262                         ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
 263                         ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
 264                 }
 265         }
 266
 267         /* Address setup is programmable but breaks on UDMA133 setups */
 268         if (set_ast) {
 269                 u8 setup;       /* 2 bits per drive */
 270                 int shift = 2 * offset;
 271
 272                 pci_read_config_byte(pdev, 0x4C, &setup);
 273                 setup &= ~(3 << shift);
 274                 setup |= FIT(t.setup, 1, 4) << shift;   /* 1,4 or 1,4 - 1  FIXME */
 275                 pci_write_config_byte(pdev, 0x4C, setup);
 276         }
 277
 278         /* Load the PIO mode bits */
 279         pci_write_config_byte(pdev, 0x4F - ap->port_no,
 280                 ((FIT(t.act8b, 1, 16) - 1) << 4) | (FIT(t.rec8b, 1, 16) - 1));
 281         pci_write_config_byte(pdev, 0x48 + offset,
 282                 ((FIT(t.active, 1, 16) - 1) << 4) | (FIT(t.recover, 1, 16) - 1));
 283
 284         /* Load the UDMA bits according to type */
 285         switch(udma_type) {
 286                 default:
 287                         /* BUG() ? */
 288                         /* fall through */
 289                 case 33:
 290                         ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 5) - 2)) : 0x03;
 291                         break;
 292                 case 66:
 293                         ut = t.udma ? (0xe8 | (FIT(t.udma, 2, 9) - 2)) : 0x0f;
 294                         break;
 295                 case 100:
 296                         ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
 297                         break;
 298                 case 133:
 299                         ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
 300                         break;
 301         }
 302
 303         /* Set UDMA unless device is not UDMA capable */
 304         if (udma_type && t.udma) {
 305                 u8 cable80_status;
 306
 307                 /* Get 80-wire cable detection bit */
 308                 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status);
 309                 cable80_status &= 0x10;
 310
 311                 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status);
 312         }
 313 }
 314
 315 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
 316 {
 317         const struct via_isa_bridge *config = ap->host->private_data;
 318         int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
 319         int mode = config->flags & VIA_UDMA;
 320         static u8 tclock[5] = { 1, 1, 2, 3, 4 };
 321         static u8 udma[5] = { 0, 33, 66, 100, 133 };
 322
 323         via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
 324 }
 325
 326 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 327 {
 328         const struct via_isa_bridge *config = ap->host->private_data;
 329         int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
 330         int mode = config->flags & VIA_UDMA;
 331         static u8 tclock[5] = { 1, 1, 2, 3, 4 };
 332         static u8 udma[5] = { 0, 33, 66, 100, 133 };
 333
 334         via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
 335 }
 336
 337 static struct scsi_host_template via_sht = {
 338         ATA_BMDMA_SHT(DRV_NAME),
 339 };
 340
 341 static struct ata_port_operations via_port_ops = {
 342         .set_piomode    = via_set_piomode,
 343         .set_dmamode    = via_set_dmamode,
 344         .mode_filter    = ata_pci_default_filter,
 345
 346         .tf_load        = ata_tf_load,
 347         .tf_read        = ata_tf_read,
 348         .check_status   = ata_check_status,
 349         .exec_command   = ata_exec_command,
 350         .dev_select     = ata_std_dev_select,
 351
 352         .freeze         = ata_bmdma_freeze,
 353         .thaw           = ata_bmdma_thaw,
 354         .error_handler  = via_error_handler,
 355         .post_internal_cmd = ata_bmdma_post_internal_cmd,
 356         .cable_detect   = via_cable_detect,
 357
 358         .bmdma_setup    = ata_bmdma_setup,
 359         .bmdma_start    = ata_bmdma_start,
 360         .bmdma_stop     = ata_bmdma_stop,
 361         .bmdma_status   = ata_bmdma_status,
 362
 363         .qc_prep        = ata_qc_prep,
 364         .qc_issue       = ata_qc_issue_prot,
 365
 366         .data_xfer      = ata_data_xfer,
 367
 368         .irq_handler    = ata_interrupt,
 369         .irq_clear      = ata_bmdma_irq_clear,
 370         .irq_on         = ata_irq_on,
 371
 372         .port_start     = ata_sff_port_start,
 373 };
 374
 375 static struct ata_port_operations via_port_ops_noirq = {
 376         .set_piomode    = via_set_piomode,
 377         .set_dmamode    = via_set_dmamode,
 378         .mode_filter    = ata_pci_default_filter,
 379
 380         .tf_load        = ata_tf_load,
 381         .tf_read        = ata_tf_read,
 382         .check_status   = ata_check_status,
 383         .exec_command   = ata_exec_command,
 384         .dev_select     = ata_std_dev_select,
 385
 386         .freeze         = ata_bmdma_freeze,
 387         .thaw           = ata_bmdma_thaw,
 388         .error_handler  = via_error_handler,
 389         .post_internal_cmd = ata_bmdma_post_internal_cmd,
 390         .cable_detect   = via_cable_detect,
 391
 392         .bmdma_setup    = ata_bmdma_setup,
 393         .bmdma_start    = ata_bmdma_start,
 394         .bmdma_stop     = ata_bmdma_stop,
 395         .bmdma_status   = ata_bmdma_status,
 396
 397         .qc_prep        = ata_qc_prep,
 398         .qc_issue       = ata_qc_issue_prot,
 399
 400         .data_xfer      = ata_data_xfer_noirq,
 401
 402         .irq_handler    = ata_interrupt,
 403         .irq_clear      = ata_bmdma_irq_clear,
 404         .irq_on         = ata_irq_on,
 405
 406         .port_start     = ata_sff_port_start,
 407 };
 408
 409 /**
 410  *      via_config_fifo         -       set up the FIFO
 411  *      @pdev: PCI device
 412  *      @flags: configuration flags
 413  *
 414  *      Set the FIFO properties for this device if necessary. Used both on
 415  *      set up and on and the resume path
 416  */
 417
 418 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
 419 {
 420         u8 enable;
 421
 422         /* 0x40 low bits indicate enabled channels */
 423         pci_read_config_byte(pdev, 0x40 , &enable);
 424         enable &= 3;
 425
 426         if (flags & VIA_SET_FIFO) {
 427                 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
 428                 u8 fifo;
 429
 430                 pci_read_config_byte(pdev, 0x43, &fifo);
 431
 432                 /* Clear PREQ# until DDACK# for errata */
 433                 if (flags & VIA_BAD_PREQ)
 434                         fifo &= 0x7F;
 435                 else
 436                         fifo &= 0x9f;
 437                 /* Turn on FIFO for enabled channels */
 438                 fifo |= fifo_setting[enable];
 439                 pci_write_config_byte(pdev, 0x43, fifo);
 440         }
 441 }
 442
 443 /**
 444  *      via_init_one            -       discovery callback
 445  *      @pdev: PCI device
 446  *      @id: PCI table info
 447  *
 448  *      A VIA IDE interface has been discovered. Figure out what revision
 449  *      and perform configuration work before handing it to the ATA layer
 450  */
 451
 452 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 453 {
 454         /* Early VIA without UDMA support */
 455         static const struct ata_port_info via_mwdma_info = {
 456                 .sht = &via_sht,
 457                 .flags = ATA_FLAG_SLAVE_POSS,
 458                 .pio_mask = 0x1f,
 459                 .mwdma_mask = 0x07,
 460                 .port_ops = &via_port_ops
 461         };
 462         /* Ditto with IRQ masking required */
 463         static const struct ata_port_info via_mwdma_info_borked = {
 464                 .sht = &via_sht,
 465                 .flags = ATA_FLAG_SLAVE_POSS,
 466                 .pio_mask = 0x1f,
 467                 .mwdma_mask = 0x07,
 468                 .port_ops = &via_port_ops_noirq,
 469         };
 470         /* VIA UDMA 33 devices (and borked 66) */
 471         static const struct ata_port_info via_udma33_info = {
 472                 .sht = &via_sht,
 473                 .flags = ATA_FLAG_SLAVE_POSS,
 474                 .pio_mask = 0x1f,
 475                 .mwdma_mask = 0x07,
 476                 .udma_mask = ATA_UDMA2,
 477                 .port_ops = &via_port_ops
 478         };
 479         /* VIA UDMA 66 devices */
 480         static const struct ata_port_info via_udma66_info = {
 481                 .sht = &via_sht,
 482                 .flags = ATA_FLAG_SLAVE_POSS,
 483                 .pio_mask = 0x1f,
 484                 .mwdma_mask = 0x07,
 485                 .udma_mask = ATA_UDMA4,
 486                 .port_ops = &via_port_ops
 487         };
 488         /* VIA UDMA 100 devices */
 489         static const struct ata_port_info via_udma100_info = {
 490                 .sht = &via_sht,
 491                 .flags = ATA_FLAG_SLAVE_POSS,
 492                 .pio_mask = 0x1f,
 493                 .mwdma_mask = 0x07,
 494                 .udma_mask = ATA_UDMA5,
 495                 .port_ops = &via_port_ops
 496         };
 497         /* UDMA133 with bad AST (All current 133) */
 498         static const struct ata_port_info via_udma133_info = {
 499                 .sht = &via_sht,
 500                 .flags = ATA_FLAG_SLAVE_POSS,
 501                 .pio_mask = 0x1f,
 502                 .mwdma_mask = 0x07,
 503                 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
 504                 .port_ops = &via_port_ops
 505         };
 506         struct ata_port_info type;
 507         const struct ata_port_info *ppi[] = { &type, NULL };
 508         struct pci_dev *isa = NULL;
 509         const struct via_isa_bridge *config;
 510         static int printed_version;
 511         u8 enable;
 512         u32 timing;
 513         int rc;
 514
 515         if (!printed_version++)
 516                 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
 517
 518         rc = pcim_enable_device(pdev);
 519         if (rc)
 520                 return rc;
 521
 522         /* To find out how the IDE will behave and what features we
 523            actually have to look at the bridge not the IDE controller */
 524         for (config = via_isa_bridges; config->id; config++)
 525                 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
 526                         !!(config->flags & VIA_BAD_ID),
 527                         config->id, NULL))) {
 528
 529                         if (isa->revision >= config->rev_min &&
 530                             isa->revision <= config->rev_max)
 531                                 break;
 532                         pci_dev_put(isa);
 533                 }
 534
 535         if (!config->id) {
 536                 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
 537                 return -ENODEV;
 538         }
 539         pci_dev_put(isa);
 540
 541         /* 0x40 low bits indicate enabled channels */
 542         pci_read_config_byte(pdev, 0x40 , &enable);
 543         enable &= 3;
 544         if (enable == 0) {
 545                 return -ENODEV;
 546         }
 547
 548         /* Initialise the FIFO for the enabled channels. */
 549         via_config_fifo(pdev, config->flags);
 550
 551         /* Clock set up */
 552         switch(config->flags & VIA_UDMA) {
 553                 case VIA_UDMA_NONE:
 554                         if (config->flags & VIA_NO_UNMASK)
 555                                 type = via_mwdma_info_borked;
 556                         else
 557                                 type = via_mwdma_info;
 558                         break;
 559                 case VIA_UDMA_33:
 560                         type = via_udma33_info;
 561                         break;
 562                 case VIA_UDMA_66:
 563                         type = via_udma66_info;
 564                         /* The 66 MHz devices require we enable the clock */
 565                         pci_read_config_dword(pdev, 0x50, &timing);
 566                         timing |= 0x80008;
 567                         pci_write_config_dword(pdev, 0x50, timing);
 568                         break;
 569                 case VIA_UDMA_100:
 570                         type = via_udma100_info;
 571                         break;
 572                 case VIA_UDMA_133:
 573                         type = via_udma133_info;
 574                         break;
 575                 default:
 576                         WARN_ON(1);
 577                         return -ENODEV;
 578         }
 579
 580         if (config->flags & VIA_BAD_CLK66) {
 581                 /* Disable the 66MHz clock on problem devices */
 582                 pci_read_config_dword(pdev, 0x50, &timing);
 583                 timing &= ~0x80008;
 584                 pci_write_config_dword(pdev, 0x50, timing);
 585         }
 586
 587         /* We have established the device type, now fire it up */
 588         type.private_data = (void *)config;
 589
 590         return ata_pci_init_one(pdev, ppi);
 591 }
 592
 593 #ifdef CONFIG_PM
 594 /**
 595  *      via_reinit_one          -       reinit after resume
 596  *      @pdev; PCI device
 597  *
 598  *      Called when the VIA PATA device is resumed. We must then
 599  *      reconfigure the fifo and other setup we may have altered. In
 600  *      addition the kernel needs to have the resume methods on PCI
 601  *      quirk supported.
 602  */
 603
 604 static int via_reinit_one(struct pci_dev *pdev)
 605 {
 606         u32 timing;
 607         struct ata_host *host = dev_get_drvdata(&pdev->dev);
 608         const struct via_isa_bridge *config = host->private_data;
 609         int rc;
 610
 611         rc = ata_pci_device_do_resume(pdev);
 612         if (rc)
 613                 return rc;
 614
 615         via_config_fifo(pdev, config->flags);
 616
 617         if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
 618                 /* The 66 MHz devices require we enable the clock */
 619                 pci_read_config_dword(pdev, 0x50, &timing);
 620                 timing |= 0x80008;
 621                 pci_write_config_dword(pdev, 0x50, timing);
 622         }
 623         if (config->flags & VIA_BAD_CLK66) {
 624                 /* Disable the 66MHz clock on problem devices */
 625                 pci_read_config_dword(pdev, 0x50, &timing);
 626                 timing &= ~0x80008;
 627                 pci_write_config_dword(pdev, 0x50, timing);
 628         }
 629
 630         ata_host_resume(host);
 631         return 0;
 632 }
 633 #endif
 634
 635 static const struct pci_device_id via[] = {
 636         { PCI_VDEVICE(VIA, 0x0571), },
 637         { PCI_VDEVICE(VIA, 0x0581), },
 638         { PCI_VDEVICE(VIA, 0x1571), },
 639         { PCI_VDEVICE(VIA, 0x3164), },
 640         { PCI_VDEVICE(VIA, 0x5324), },
 641
 642         { },
 643 };
 644
 645 static struct pci_driver via_pci_driver = {
 646         .name           = DRV_NAME,
 647         .id_table       = via,
 648         .probe          = via_init_one,
 649         .remove         = ata_pci_remove_one,
 650 #ifdef CONFIG_PM
 651         .suspend        = ata_pci_device_suspend,
 652         .resume         = via_reinit_one,
 653 #endif
 654 };
 655
 656 static int __init via_init(void)
 657 {
 658         return pci_register_driver(&via_pci_driver);
 659 }
 660
 661 static void __exit via_exit(void)
 662 {
 663         pci_unregister_driver(&via_pci_driver);
 664 }
 665
 666 MODULE_AUTHOR("Alan Cox");
 667 MODULE_DESCRIPTION("low-level driver for VIA PATA");
 668 MODULE_LICENSE("GPL");
 669 MODULE_DEVICE_TABLE(pci, via);
 670 MODULE_VERSION(DRV_VERSION);
 671
 672 module_init(via_init);
 673 module_exit(via_exit);