2 * sata_via.c - VIA Serial ATA controllers
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available under NDA.
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/blkdev.h>
41 #include <linux/delay.h>
42 #include <linux/device.h>
43 #include <scsi/scsi_host.h>
44 #include <linux/libata.h>
46 #define DRV_NAME "sata_via"
47 #define DRV_VERSION "2.3"
55 SATA_CHAN_ENAB
= 0x40, /* SATA channel enable */
56 SATA_INT_GATE
= 0x41, /* SATA interrupt gating */
57 SATA_NATIVE_MODE
= 0x42, /* Native mode enable */
58 PATA_UDMA_TIMING
= 0xB3, /* PATA timing for DMA/ cable detect */
59 PATA_PIO_TIMING
= 0xAB, /* PATA timing register */
63 ALL_PORTS
= PORT0
| PORT1
,
65 NATIVE_MODE_ALL
= (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4),
67 SATA_EXT_PHY
= (1 << 6), /* 0==use PATA, 1==ext phy */
70 static int svia_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*ent
);
71 static int svia_scr_read(struct ata_link
*link
, unsigned int sc_reg
, u32
*val
);
72 static int svia_scr_write(struct ata_link
*link
, unsigned int sc_reg
, u32 val
);
73 static void svia_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
);
74 static void svia_noop_freeze(struct ata_port
*ap
);
75 static int vt6420_prereset(struct ata_link
*link
, unsigned long deadline
);
76 static int vt6421_pata_cable_detect(struct ata_port
*ap
);
77 static void vt6421_set_pio_mode(struct ata_port
*ap
, struct ata_device
*adev
);
78 static void vt6421_set_dma_mode(struct ata_port
*ap
, struct ata_device
*adev
);
80 static const struct pci_device_id svia_pci_tbl
[] = {
81 { PCI_VDEVICE(VIA
, 0x5337), vt6420
},
82 { PCI_VDEVICE(VIA
, 0x0591), vt6420
},
83 { PCI_VDEVICE(VIA
, 0x3149), vt6420
},
84 { PCI_VDEVICE(VIA
, 0x3249), vt6421
},
85 { PCI_VDEVICE(VIA
, 0x5287), vt6420
},
86 { PCI_VDEVICE(VIA
, 0x5372), vt6420
},
87 { PCI_VDEVICE(VIA
, 0x7372), vt6420
},
89 { } /* terminate list */
92 static struct pci_driver svia_pci_driver
= {
94 .id_table
= svia_pci_tbl
,
95 .probe
= svia_init_one
,
97 .suspend
= ata_pci_device_suspend
,
98 .resume
= ata_pci_device_resume
,
100 .remove
= ata_pci_remove_one
,
103 static struct scsi_host_template svia_sht
= {
104 ATA_BMDMA_SHT(DRV_NAME
),
107 static struct ata_port_operations svia_base_ops
= {
108 .inherits
= &ata_bmdma_port_ops
,
109 .sff_tf_load
= svia_tf_load
,
112 static struct ata_port_operations vt6420_sata_ops
= {
113 .inherits
= &svia_base_ops
,
114 .freeze
= svia_noop_freeze
,
115 .prereset
= vt6420_prereset
,
118 static struct ata_port_operations vt6421_pata_ops
= {
119 .inherits
= &svia_base_ops
,
120 .cable_detect
= vt6421_pata_cable_detect
,
121 .set_piomode
= vt6421_set_pio_mode
,
122 .set_dmamode
= vt6421_set_dma_mode
,
125 static struct ata_port_operations vt6421_sata_ops
= {
126 .inherits
= &svia_base_ops
,
127 .scr_read
= svia_scr_read
,
128 .scr_write
= svia_scr_write
,
131 static const struct ata_port_info vt6420_port_info
= {
132 .flags
= ATA_FLAG_SATA
| ATA_FLAG_NO_LEGACY
,
135 .udma_mask
= ATA_UDMA6
,
136 .port_ops
= &vt6420_sata_ops
,
139 static struct ata_port_info vt6421_sport_info
= {
140 .flags
= ATA_FLAG_SATA
| ATA_FLAG_NO_LEGACY
,
143 .udma_mask
= ATA_UDMA6
,
144 .port_ops
= &vt6421_sata_ops
,
147 static struct ata_port_info vt6421_pport_info
= {
148 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_NO_LEGACY
,
151 .udma_mask
= ATA_UDMA6
,
152 .port_ops
= &vt6421_pata_ops
,
155 MODULE_AUTHOR("Jeff Garzik");
156 MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers");
157 MODULE_LICENSE("GPL");
158 MODULE_DEVICE_TABLE(pci
, svia_pci_tbl
);
159 MODULE_VERSION(DRV_VERSION
);
161 static int svia_scr_read(struct ata_link
*link
, unsigned int sc_reg
, u32
*val
)
163 if (sc_reg
> SCR_CONTROL
)
165 *val
= ioread32(link
->ap
->ioaddr
.scr_addr
+ (4 * sc_reg
));
169 static int svia_scr_write(struct ata_link
*link
, unsigned int sc_reg
, u32 val
)
171 if (sc_reg
> SCR_CONTROL
)
173 iowrite32(val
, link
->ap
->ioaddr
.scr_addr
+ (4 * sc_reg
));
178 * svia_tf_load - send taskfile registers to host controller
179 * @ap: Port to which output is sent
180 * @tf: ATA taskfile register set
182 * Outputs ATA taskfile to standard ATA host controller.
184 * This is to fix the internal bug of via chipsets, which will
185 * reset the device register after changing the IEN bit on ctl
188 static void svia_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
190 struct ata_taskfile ttf
;
192 if (tf
->ctl
!= ap
->last_ctl
) {
194 ttf
.flags
|= ATA_TFLAG_DEVICE
;
197 ata_sff_tf_load(ap
, tf
);
200 static void svia_noop_freeze(struct ata_port
*ap
)
202 /* Some VIA controllers choke if ATA_NIEN is manipulated in
203 * certain way. Leave it alone and just clear pending IRQ.
205 ap
->ops
->sff_check_status(ap
);
206 ata_sff_irq_clear(ap
);
210 * vt6420_prereset - prereset for vt6420
211 * @link: target ATA link
212 * @deadline: deadline jiffies for the operation
214 * SCR registers on vt6420 are pieces of shit and may hang the
215 * whole machine completely if accessed with the wrong timing.
216 * To avoid such catastrophe, vt6420 doesn't provide generic SCR
217 * access operations, but uses SStatus and SControl only during
218 * boot probing in controlled way.
220 * As the old (pre EH update) probing code is proven to work, we
221 * strictly follow the access pattern.
224 * Kernel thread context (may sleep)
227 * 0 on success, -errno otherwise.
229 static int vt6420_prereset(struct ata_link
*link
, unsigned long deadline
)
231 struct ata_port
*ap
= link
->ap
;
232 struct ata_eh_context
*ehc
= &ap
->link
.eh_context
;
233 unsigned long timeout
= jiffies
+ (HZ
* 5);
234 u32 sstatus
, scontrol
;
237 /* don't do any SCR stuff if we're not loading */
238 if (!(ap
->pflags
& ATA_PFLAG_LOADING
))
241 /* Resume phy. This is the old SATA resume sequence */
242 svia_scr_write(link
, SCR_CONTROL
, 0x300);
243 svia_scr_read(link
, SCR_CONTROL
, &scontrol
); /* flush */
245 /* wait for phy to become ready, if necessary */
248 svia_scr_read(link
, SCR_STATUS
, &sstatus
);
249 if ((sstatus
& 0xf) != 1)
251 } while (time_before(jiffies
, timeout
));
253 /* open code sata_print_link_status() */
254 svia_scr_read(link
, SCR_STATUS
, &sstatus
);
255 svia_scr_read(link
, SCR_CONTROL
, &scontrol
);
257 online
= (sstatus
& 0xf) == 0x3;
259 ata_port_printk(ap
, KERN_INFO
,
260 "SATA link %s 1.5 Gbps (SStatus %X SControl %X)\n",
261 online
? "up" : "down", sstatus
, scontrol
);
263 /* SStatus is read one more time */
264 svia_scr_read(link
, SCR_STATUS
, &sstatus
);
267 /* tell EH to bail */
268 ehc
->i
.action
&= ~ATA_EH_RESET
;
274 ata_sff_wait_ready(link
, deadline
);
279 static int vt6421_pata_cable_detect(struct ata_port
*ap
)
281 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
284 pci_read_config_byte(pdev
, PATA_UDMA_TIMING
, &tmp
);
286 return ATA_CBL_PATA40
;
287 return ATA_CBL_PATA80
;
290 static void vt6421_set_pio_mode(struct ata_port
*ap
, struct ata_device
*adev
)
292 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
293 static const u8 pio_bits
[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 };
294 pci_write_config_byte(pdev
, PATA_PIO_TIMING
, pio_bits
[adev
->pio_mode
- XFER_PIO_0
]);
297 static void vt6421_set_dma_mode(struct ata_port
*ap
, struct ata_device
*adev
)
299 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
300 static const u8 udma_bits
[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 };
301 pci_write_config_byte(pdev
, PATA_UDMA_TIMING
, udma_bits
[adev
->dma_mode
- XFER_UDMA_0
]);
304 static const unsigned int svia_bar_sizes
[] = {
308 static const unsigned int vt6421_bar_sizes
[] = {
309 16, 16, 16, 16, 32, 128
312 static void __iomem
*svia_scr_addr(void __iomem
*addr
, unsigned int port
)
314 return addr
+ (port
* 128);
317 static void __iomem
*vt6421_scr_addr(void __iomem
*addr
, unsigned int port
)
319 return addr
+ (port
* 64);
322 static void vt6421_init_addrs(struct ata_port
*ap
)
324 void __iomem
* const * iomap
= ap
->host
->iomap
;
325 void __iomem
*reg_addr
= iomap
[ap
->port_no
];
326 void __iomem
*bmdma_addr
= iomap
[4] + (ap
->port_no
* 8);
327 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
329 ioaddr
->cmd_addr
= reg_addr
;
330 ioaddr
->altstatus_addr
=
331 ioaddr
->ctl_addr
= (void __iomem
*)
332 ((unsigned long)(reg_addr
+ 8) | ATA_PCI_CTL_OFS
);
333 ioaddr
->bmdma_addr
= bmdma_addr
;
334 ioaddr
->scr_addr
= vt6421_scr_addr(iomap
[5], ap
->port_no
);
336 ata_sff_std_ports(ioaddr
);
338 ata_port_pbar_desc(ap
, ap
->port_no
, -1, "port");
339 ata_port_pbar_desc(ap
, 4, ap
->port_no
* 8, "bmdma");
342 static int vt6420_prepare_host(struct pci_dev
*pdev
, struct ata_host
**r_host
)
344 const struct ata_port_info
*ppi
[] = { &vt6420_port_info
, NULL
};
345 struct ata_host
*host
;
348 rc
= ata_pci_sff_prepare_host(pdev
, ppi
, &host
);
353 rc
= pcim_iomap_regions(pdev
, 1 << 5, DRV_NAME
);
355 dev_printk(KERN_ERR
, &pdev
->dev
, "failed to iomap PCI BAR 5\n");
359 host
->ports
[0]->ioaddr
.scr_addr
= svia_scr_addr(host
->iomap
[5], 0);
360 host
->ports
[1]->ioaddr
.scr_addr
= svia_scr_addr(host
->iomap
[5], 1);
365 static int vt6421_prepare_host(struct pci_dev
*pdev
, struct ata_host
**r_host
)
367 const struct ata_port_info
*ppi
[] =
368 { &vt6421_sport_info
, &vt6421_sport_info
, &vt6421_pport_info
};
369 struct ata_host
*host
;
372 *r_host
= host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, ARRAY_SIZE(ppi
));
374 dev_printk(KERN_ERR
, &pdev
->dev
, "failed to allocate host\n");
378 rc
= pcim_iomap_regions(pdev
, 0x3f, DRV_NAME
);
380 dev_printk(KERN_ERR
, &pdev
->dev
, "failed to request/iomap "
381 "PCI BARs (errno=%d)\n", rc
);
384 host
->iomap
= pcim_iomap_table(pdev
);
386 for (i
= 0; i
< host
->n_ports
; i
++)
387 vt6421_init_addrs(host
->ports
[i
]);
389 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
392 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
399 static void svia_configure(struct pci_dev
*pdev
)
403 pci_read_config_byte(pdev
, PCI_INTERRUPT_LINE
, &tmp8
);
404 dev_printk(KERN_INFO
, &pdev
->dev
, "routed to hard irq line %d\n",
405 (int) (tmp8
& 0xf0) == 0xf0 ? 0 : tmp8
& 0x0f);
407 /* make sure SATA channels are enabled */
408 pci_read_config_byte(pdev
, SATA_CHAN_ENAB
, &tmp8
);
409 if ((tmp8
& ALL_PORTS
) != ALL_PORTS
) {
410 dev_printk(KERN_DEBUG
, &pdev
->dev
,
411 "enabling SATA channels (0x%x)\n",
414 pci_write_config_byte(pdev
, SATA_CHAN_ENAB
, tmp8
);
417 /* make sure interrupts for each channel sent to us */
418 pci_read_config_byte(pdev
, SATA_INT_GATE
, &tmp8
);
419 if ((tmp8
& ALL_PORTS
) != ALL_PORTS
) {
420 dev_printk(KERN_DEBUG
, &pdev
->dev
,
421 "enabling SATA channel interrupts (0x%x)\n",
424 pci_write_config_byte(pdev
, SATA_INT_GATE
, tmp8
);
427 /* make sure native mode is enabled */
428 pci_read_config_byte(pdev
, SATA_NATIVE_MODE
, &tmp8
);
429 if ((tmp8
& NATIVE_MODE_ALL
) != NATIVE_MODE_ALL
) {
430 dev_printk(KERN_DEBUG
, &pdev
->dev
,
431 "enabling SATA channel native mode (0x%x)\n",
433 tmp8
|= NATIVE_MODE_ALL
;
434 pci_write_config_byte(pdev
, SATA_NATIVE_MODE
, tmp8
);
438 static int svia_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
440 static int printed_version
;
443 struct ata_host
*host
;
444 int board_id
= (int) ent
->driver_data
;
445 const unsigned *bar_sizes
;
447 if (!printed_version
++)
448 dev_printk(KERN_DEBUG
, &pdev
->dev
, "version " DRV_VERSION
"\n");
450 rc
= pcim_enable_device(pdev
);
454 if (board_id
== vt6420
)
455 bar_sizes
= &svia_bar_sizes
[0];
457 bar_sizes
= &vt6421_bar_sizes
[0];
459 for (i
= 0; i
< ARRAY_SIZE(svia_bar_sizes
); i
++)
460 if ((pci_resource_start(pdev
, i
) == 0) ||
461 (pci_resource_len(pdev
, i
) < bar_sizes
[i
])) {
462 dev_printk(KERN_ERR
, &pdev
->dev
,
463 "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n",
465 (unsigned long long)pci_resource_start(pdev
, i
),
466 (unsigned long long)pci_resource_len(pdev
, i
));
470 if (board_id
== vt6420
)
471 rc
= vt6420_prepare_host(pdev
, &host
);
473 rc
= vt6421_prepare_host(pdev
, &host
);
477 svia_configure(pdev
);
479 pci_set_master(pdev
);
480 return ata_host_activate(host
, pdev
->irq
, ata_sff_interrupt
,
481 IRQF_SHARED
, &svia_sht
);
484 static int __init
svia_init(void)
486 return pci_register_driver(&svia_pci_driver
);
489 static void __exit
svia_exit(void)
491 pci_unregister_driver(&svia_pci_driver
);
494 module_init(svia_init
);
495 module_exit(svia_exit
);