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atm: remove IRQF_DISABLED in combination with IRQF_SHARED
[deliverable/linux.git] / drivers / atm / nicstar.c
1 /*
2 * nicstar.c
3 *
4 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
5 *
6 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
7 * It was taken from the frle-0.22 device driver.
8 * As the file doesn't have a copyright notice, in the file
9 * nicstarmac.copyright I put the copyright notice from the
10 * frle-0.22 device driver.
11 * Some code is based on the nicstar driver by M. Welsh.
12 *
13 * Author: Rui Prior (rprior@inescn.pt)
14 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
15 *
16 *
17 * (C) INESC 1999
18 */
19
20 /*
21 * IMPORTANT INFORMATION
22 *
23 * There are currently three types of spinlocks:
24 *
25 * 1 - Per card interrupt spinlock (to protect structures and such)
26 * 2 - Per SCQ scq spinlock
27 * 3 - Per card resource spinlock (to access registers, etc.)
28 *
29 * These must NEVER be grabbed in reverse order.
30 *
31 */
32
33 /* Header files */
34
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/skbuff.h>
38 #include <linux/atmdev.h>
39 #include <linux/atm.h>
40 #include <linux/pci.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/types.h>
43 #include <linux/string.h>
44 #include <linux/delay.h>
45 #include <linux/init.h>
46 #include <linux/sched.h>
47 #include <linux/timer.h>
48 #include <linux/interrupt.h>
49 #include <linux/bitops.h>
50 #include <linux/slab.h>
51 #include <linux/idr.h>
52 #include <asm/io.h>
53 #include <asm/uaccess.h>
54 #include <asm/atomic.h>
55 #include "nicstar.h"
56 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
57 #include "suni.h"
58 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
59 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
60 #include "idt77105.h"
61 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
62
63 /* Additional code */
64
65 #include "nicstarmac.c"
66
67 /* Configurable parameters */
68
69 #undef PHY_LOOPBACK
70 #undef TX_DEBUG
71 #undef RX_DEBUG
72 #undef GENERAL_DEBUG
73 #undef EXTRA_DEBUG
74
75 #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
76 you're going to use only raw ATM */
77
78 /* Do not touch these */
79
80 #ifdef TX_DEBUG
81 #define TXPRINTK(args...) printk(args)
82 #else
83 #define TXPRINTK(args...)
84 #endif /* TX_DEBUG */
85
86 #ifdef RX_DEBUG
87 #define RXPRINTK(args...) printk(args)
88 #else
89 #define RXPRINTK(args...)
90 #endif /* RX_DEBUG */
91
92 #ifdef GENERAL_DEBUG
93 #define PRINTK(args...) printk(args)
94 #else
95 #define PRINTK(args...)
96 #endif /* GENERAL_DEBUG */
97
98 #ifdef EXTRA_DEBUG
99 #define XPRINTK(args...) printk(args)
100 #else
101 #define XPRINTK(args...)
102 #endif /* EXTRA_DEBUG */
103
104 /* Macros */
105
106 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
107
108 #define NS_DELAY mdelay(1)
109
110 #define PTR_DIFF(a, b) ((u32)((unsigned long)(a) - (unsigned long)(b)))
111
112 #ifndef ATM_SKB
113 #define ATM_SKB(s) (&(s)->atm)
114 #endif
115
116 #define scq_virt_to_bus(scq, p) \
117 (scq->dma + ((unsigned long)(p) - (unsigned long)(scq)->org))
118
119 /* Function declarations */
120
121 static u32 ns_read_sram(ns_dev * card, u32 sram_address);
122 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
123 int count);
124 static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
125 static void __devinit ns_init_card_error(ns_dev * card, int error);
126 static scq_info *get_scq(ns_dev *card, int size, u32 scd);
127 static void free_scq(ns_dev *card, scq_info * scq, struct atm_vcc *vcc);
128 static void push_rxbufs(ns_dev *, struct sk_buff *);
129 static irqreturn_t ns_irq_handler(int irq, void *dev_id);
130 static int ns_open(struct atm_vcc *vcc);
131 static void ns_close(struct atm_vcc *vcc);
132 static void fill_tst(ns_dev * card, int n, vc_map * vc);
133 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
134 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
135 struct sk_buff *skb);
136 static void process_tsq(ns_dev * card);
137 static void drain_scq(ns_dev * card, scq_info * scq, int pos);
138 static void process_rsq(ns_dev * card);
139 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
140 #ifdef NS_USE_DESTRUCTORS
141 static void ns_sb_destructor(struct sk_buff *sb);
142 static void ns_lb_destructor(struct sk_buff *lb);
143 static void ns_hb_destructor(struct sk_buff *hb);
144 #endif /* NS_USE_DESTRUCTORS */
145 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
146 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
147 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
148 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
149 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
150 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
151 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
152 #ifdef EXTRA_DEBUG
153 static void which_list(ns_dev * card, struct sk_buff *skb);
154 #endif
155 static void ns_poll(unsigned long arg);
156 static int ns_parse_mac(char *mac, unsigned char *esi);
157 static short ns_h2i(char c);
158 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
159 unsigned long addr);
160 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
161
162 /* Global variables */
163
164 static struct ns_dev *cards[NS_MAX_CARDS];
165 static unsigned num_cards;
166 static struct atmdev_ops atm_ops = {
167 .open = ns_open,
168 .close = ns_close,
169 .ioctl = ns_ioctl,
170 .send = ns_send,
171 .phy_put = ns_phy_put,
172 .phy_get = ns_phy_get,
173 .proc_read = ns_proc_read,
174 .owner = THIS_MODULE,
175 };
176
177 static struct timer_list ns_timer;
178 static char *mac[NS_MAX_CARDS];
179 module_param_array(mac, charp, NULL, 0);
180 MODULE_LICENSE("GPL");
181
182 /* Functions */
183
184 static int __devinit nicstar_init_one(struct pci_dev *pcidev,
185 const struct pci_device_id *ent)
186 {
187 static int index = -1;
188 unsigned int error;
189
190 index++;
191 cards[index] = NULL;
192
193 error = ns_init_card(index, pcidev);
194 if (error) {
195 cards[index--] = NULL; /* don't increment index */
196 goto err_out;
197 }
198
199 return 0;
200 err_out:
201 return -ENODEV;
202 }
203
204 static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
205 {
206 int i, j;
207 ns_dev *card = pci_get_drvdata(pcidev);
208 struct sk_buff *hb;
209 struct sk_buff *iovb;
210 struct sk_buff *lb;
211 struct sk_buff *sb;
212
213 i = card->index;
214
215 if (cards[i] == NULL)
216 return;
217
218 if (card->atmdev->phy && card->atmdev->phy->stop)
219 card->atmdev->phy->stop(card->atmdev);
220
221 /* Stop everything */
222 writel(0x00000000, card->membase + CFG);
223
224 /* De-register device */
225 atm_dev_deregister(card->atmdev);
226
227 /* Disable PCI device */
228 pci_disable_device(pcidev);
229
230 /* Free up resources */
231 j = 0;
232 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
233 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
234 dev_kfree_skb_any(hb);
235 j++;
236 }
237 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
238 j = 0;
239 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
240 card->iovpool.count);
241 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
242 dev_kfree_skb_any(iovb);
243 j++;
244 }
245 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
246 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
247 dev_kfree_skb_any(lb);
248 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
249 dev_kfree_skb_any(sb);
250 free_scq(card, card->scq0, NULL);
251 for (j = 0; j < NS_FRSCD_NUM; j++) {
252 if (card->scd2vc[j] != NULL)
253 free_scq(card, card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
254 }
255 idr_remove_all(&card->idr);
256 idr_destroy(&card->idr);
257 pci_free_consistent(card->pcidev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
258 card->rsq.org, card->rsq.dma);
259 pci_free_consistent(card->pcidev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
260 card->tsq.org, card->tsq.dma);
261 free_irq(card->pcidev->irq, card);
262 iounmap(card->membase);
263 kfree(card);
264 }
265
266 static struct pci_device_id nicstar_pci_tbl[] __devinitdata = {
267 {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
269 {0,} /* terminate list */
270 };
271
272 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
273
274 static struct pci_driver nicstar_driver = {
275 .name = "nicstar",
276 .id_table = nicstar_pci_tbl,
277 .probe = nicstar_init_one,
278 .remove = __devexit_p(nicstar_remove_one),
279 };
280
281 static int __init nicstar_init(void)
282 {
283 unsigned error = 0; /* Initialized to remove compile warning */
284
285 XPRINTK("nicstar: nicstar_init() called.\n");
286
287 error = pci_register_driver(&nicstar_driver);
288
289 TXPRINTK("nicstar: TX debug enabled.\n");
290 RXPRINTK("nicstar: RX debug enabled.\n");
291 PRINTK("nicstar: General debug enabled.\n");
292 #ifdef PHY_LOOPBACK
293 printk("nicstar: using PHY loopback.\n");
294 #endif /* PHY_LOOPBACK */
295 XPRINTK("nicstar: nicstar_init() returned.\n");
296
297 if (!error) {
298 init_timer(&ns_timer);
299 ns_timer.expires = jiffies + NS_POLL_PERIOD;
300 ns_timer.data = 0UL;
301 ns_timer.function = ns_poll;
302 add_timer(&ns_timer);
303 }
304
305 return error;
306 }
307
308 static void __exit nicstar_cleanup(void)
309 {
310 XPRINTK("nicstar: nicstar_cleanup() called.\n");
311
312 del_timer(&ns_timer);
313
314 pci_unregister_driver(&nicstar_driver);
315
316 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
317 }
318
319 static u32 ns_read_sram(ns_dev * card, u32 sram_address)
320 {
321 unsigned long flags;
322 u32 data;
323 sram_address <<= 2;
324 sram_address &= 0x0007FFFC; /* address must be dword aligned */
325 sram_address |= 0x50000000; /* SRAM read command */
326 spin_lock_irqsave(&card->res_lock, flags);
327 while (CMD_BUSY(card)) ;
328 writel(sram_address, card->membase + CMD);
329 while (CMD_BUSY(card)) ;
330 data = readl(card->membase + DR0);
331 spin_unlock_irqrestore(&card->res_lock, flags);
332 return data;
333 }
334
335 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
336 int count)
337 {
338 unsigned long flags;
339 int i, c;
340 count--; /* count range now is 0..3 instead of 1..4 */
341 c = count;
342 c <<= 2; /* to use increments of 4 */
343 spin_lock_irqsave(&card->res_lock, flags);
344 while (CMD_BUSY(card)) ;
345 for (i = 0; i <= c; i += 4)
346 writel(*(value++), card->membase + i);
347 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
348 so card->membase + DR0 == card->membase */
349 sram_address <<= 2;
350 sram_address &= 0x0007FFFC;
351 sram_address |= (0x40000000 | count);
352 writel(sram_address, card->membase + CMD);
353 spin_unlock_irqrestore(&card->res_lock, flags);
354 }
355
356 static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
357 {
358 int j;
359 struct ns_dev *card = NULL;
360 unsigned char pci_latency;
361 unsigned error;
362 u32 data;
363 u32 u32d[4];
364 u32 ns_cfg_rctsize;
365 int bcount;
366 unsigned long membase;
367
368 error = 0;
369
370 if (pci_enable_device(pcidev)) {
371 printk("nicstar%d: can't enable PCI device\n", i);
372 error = 2;
373 ns_init_card_error(card, error);
374 return error;
375 }
376 if ((pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)) != 0) ||
377 (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32)) != 0)) {
378 printk(KERN_WARNING
379 "nicstar%d: No suitable DMA available.\n", i);
380 error = 2;
381 ns_init_card_error(card, error);
382 return error;
383 }
384
385 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL) {
386 printk
387 ("nicstar%d: can't allocate memory for device structure.\n",
388 i);
389 error = 2;
390 ns_init_card_error(card, error);
391 return error;
392 }
393 cards[i] = card;
394 spin_lock_init(&card->int_lock);
395 spin_lock_init(&card->res_lock);
396
397 pci_set_drvdata(pcidev, card);
398
399 card->index = i;
400 card->atmdev = NULL;
401 card->pcidev = pcidev;
402 membase = pci_resource_start(pcidev, 1);
403 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
404 if (!card->membase) {
405 printk("nicstar%d: can't ioremap() membase.\n", i);
406 error = 3;
407 ns_init_card_error(card, error);
408 return error;
409 }
410 PRINTK("nicstar%d: membase at 0x%p.\n", i, card->membase);
411
412 pci_set_master(pcidev);
413
414 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
415 printk("nicstar%d: can't read PCI latency timer.\n", i);
416 error = 6;
417 ns_init_card_error(card, error);
418 return error;
419 }
420 #ifdef NS_PCI_LATENCY
421 if (pci_latency < NS_PCI_LATENCY) {
422 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
423 NS_PCI_LATENCY);
424 for (j = 1; j < 4; j++) {
425 if (pci_write_config_byte
426 (pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
427 break;
428 }
429 if (j == 4) {
430 printk
431 ("nicstar%d: can't set PCI latency timer to %d.\n",
432 i, NS_PCI_LATENCY);
433 error = 7;
434 ns_init_card_error(card, error);
435 return error;
436 }
437 }
438 #endif /* NS_PCI_LATENCY */
439
440 /* Clear timer overflow */
441 data = readl(card->membase + STAT);
442 if (data & NS_STAT_TMROF)
443 writel(NS_STAT_TMROF, card->membase + STAT);
444
445 /* Software reset */
446 writel(NS_CFG_SWRST, card->membase + CFG);
447 NS_DELAY;
448 writel(0x00000000, card->membase + CFG);
449
450 /* PHY reset */
451 writel(0x00000008, card->membase + GP);
452 NS_DELAY;
453 writel(0x00000001, card->membase + GP);
454 NS_DELAY;
455 while (CMD_BUSY(card)) ;
456 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
457 NS_DELAY;
458
459 /* Detect PHY type */
460 while (CMD_BUSY(card)) ;
461 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
462 while (CMD_BUSY(card)) ;
463 data = readl(card->membase + DR0);
464 switch (data) {
465 case 0x00000009:
466 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
467 card->max_pcr = ATM_25_PCR;
468 while (CMD_BUSY(card)) ;
469 writel(0x00000008, card->membase + DR0);
470 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
471 /* Clear an eventual pending interrupt */
472 writel(NS_STAT_SFBQF, card->membase + STAT);
473 #ifdef PHY_LOOPBACK
474 while (CMD_BUSY(card)) ;
475 writel(0x00000022, card->membase + DR0);
476 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
477 #endif /* PHY_LOOPBACK */
478 break;
479 case 0x00000030:
480 case 0x00000031:
481 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
482 card->max_pcr = ATM_OC3_PCR;
483 #ifdef PHY_LOOPBACK
484 while (CMD_BUSY(card)) ;
485 writel(0x00000002, card->membase + DR0);
486 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
487 #endif /* PHY_LOOPBACK */
488 break;
489 default:
490 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
491 error = 8;
492 ns_init_card_error(card, error);
493 return error;
494 }
495 writel(0x00000000, card->membase + GP);
496
497 /* Determine SRAM size */
498 data = 0x76543210;
499 ns_write_sram(card, 0x1C003, &data, 1);
500 data = 0x89ABCDEF;
501 ns_write_sram(card, 0x14003, &data, 1);
502 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
503 ns_read_sram(card, 0x1C003) == 0x76543210)
504 card->sram_size = 128;
505 else
506 card->sram_size = 32;
507 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
508
509 card->rct_size = NS_MAX_RCTSIZE;
510
511 #if (NS_MAX_RCTSIZE == 4096)
512 if (card->sram_size == 128)
513 printk
514 ("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
515 i);
516 #elif (NS_MAX_RCTSIZE == 16384)
517 if (card->sram_size == 32) {
518 printk
519 ("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
520 i);
521 card->rct_size = 4096;
522 }
523 #else
524 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
525 #endif
526
527 card->vpibits = NS_VPIBITS;
528 if (card->rct_size == 4096)
529 card->vcibits = 12 - NS_VPIBITS;
530 else /* card->rct_size == 16384 */
531 card->vcibits = 14 - NS_VPIBITS;
532
533 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
534 if (mac[i] == NULL)
535 nicstar_init_eprom(card->membase);
536
537 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
538 writel(0x00000000, card->membase + VPM);
539
540 /* Initialize TSQ */
541 card->tsq.org = pci_alloc_consistent(card->pcidev,
542 NS_TSQSIZE + NS_TSQ_ALIGNMENT,
543 &card->tsq.dma);
544 if (card->tsq.org == NULL) {
545 printk("nicstar%d: can't allocate TSQ.\n", i);
546 error = 10;
547 ns_init_card_error(card, error);
548 return error;
549 }
550 card->tsq.base = PTR_ALIGN(card->tsq.org, NS_TSQ_ALIGNMENT);
551 card->tsq.next = card->tsq.base;
552 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
553 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
554 ns_tsi_init(card->tsq.base + j);
555 writel(0x00000000, card->membase + TSQH);
556 writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
557 PRINTK("nicstar%d: TSQ base at 0x%p.\n", i, card->tsq.base);
558
559 /* Initialize RSQ */
560 card->rsq.org = pci_alloc_consistent(card->pcidev,
561 NS_RSQSIZE + NS_RSQ_ALIGNMENT,
562 &card->rsq.dma);
563 if (card->rsq.org == NULL) {
564 printk("nicstar%d: can't allocate RSQ.\n", i);
565 error = 11;
566 ns_init_card_error(card, error);
567 return error;
568 }
569 card->rsq.base = PTR_ALIGN(card->rsq.org, NS_RSQ_ALIGNMENT);
570 card->rsq.next = card->rsq.base;
571 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
572 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
573 ns_rsqe_init(card->rsq.base + j);
574 writel(0x00000000, card->membase + RSQH);
575 writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
576 PRINTK("nicstar%d: RSQ base at 0x%p.\n", i, card->rsq.base);
577
578 /* Initialize SCQ0, the only VBR SCQ used */
579 card->scq1 = NULL;
580 card->scq2 = NULL;
581 card->scq0 = get_scq(card, VBR_SCQSIZE, NS_VRSCD0);
582 if (card->scq0 == NULL) {
583 printk("nicstar%d: can't get SCQ0.\n", i);
584 error = 12;
585 ns_init_card_error(card, error);
586 return error;
587 }
588 u32d[0] = scq_virt_to_bus(card->scq0, card->scq0->base);
589 u32d[1] = (u32) 0x00000000;
590 u32d[2] = (u32) 0xffffffff;
591 u32d[3] = (u32) 0x00000000;
592 ns_write_sram(card, NS_VRSCD0, u32d, 4);
593 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
594 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
595 card->scq0->scd = NS_VRSCD0;
596 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%p.\n", i, card->scq0->base);
597
598 /* Initialize TSTs */
599 card->tst_addr = NS_TST0;
600 card->tst_free_entries = NS_TST_NUM_ENTRIES;
601 data = NS_TST_OPCODE_VARIABLE;
602 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
603 ns_write_sram(card, NS_TST0 + j, &data, 1);
604 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
605 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
606 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
607 ns_write_sram(card, NS_TST1 + j, &data, 1);
608 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
609 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
610 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
611 card->tste2vc[j] = NULL;
612 writel(NS_TST0 << 2, card->membase + TSTB);
613
614 /* Initialize RCT. AAL type is set on opening the VC. */
615 #ifdef RCQ_SUPPORT
616 u32d[0] = NS_RCTE_RAWCELLINTEN;
617 #else
618 u32d[0] = 0x00000000;
619 #endif /* RCQ_SUPPORT */
620 u32d[1] = 0x00000000;
621 u32d[2] = 0x00000000;
622 u32d[3] = 0xFFFFFFFF;
623 for (j = 0; j < card->rct_size; j++)
624 ns_write_sram(card, j * 4, u32d, 4);
625
626 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
627
628 for (j = 0; j < NS_FRSCD_NUM; j++)
629 card->scd2vc[j] = NULL;
630
631 /* Initialize buffer levels */
632 card->sbnr.min = MIN_SB;
633 card->sbnr.init = NUM_SB;
634 card->sbnr.max = MAX_SB;
635 card->lbnr.min = MIN_LB;
636 card->lbnr.init = NUM_LB;
637 card->lbnr.max = MAX_LB;
638 card->iovnr.min = MIN_IOVB;
639 card->iovnr.init = NUM_IOVB;
640 card->iovnr.max = MAX_IOVB;
641 card->hbnr.min = MIN_HB;
642 card->hbnr.init = NUM_HB;
643 card->hbnr.max = MAX_HB;
644
645 card->sm_handle = 0x00000000;
646 card->sm_addr = 0x00000000;
647 card->lg_handle = 0x00000000;
648 card->lg_addr = 0x00000000;
649
650 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
651
652 idr_init(&card->idr);
653
654 /* Pre-allocate some huge buffers */
655 skb_queue_head_init(&card->hbpool.queue);
656 card->hbpool.count = 0;
657 for (j = 0; j < NUM_HB; j++) {
658 struct sk_buff *hb;
659 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
660 if (hb == NULL) {
661 printk
662 ("nicstar%d: can't allocate %dth of %d huge buffers.\n",
663 i, j, NUM_HB);
664 error = 13;
665 ns_init_card_error(card, error);
666 return error;
667 }
668 NS_PRV_BUFTYPE(hb) = BUF_NONE;
669 skb_queue_tail(&card->hbpool.queue, hb);
670 card->hbpool.count++;
671 }
672
673 /* Allocate large buffers */
674 skb_queue_head_init(&card->lbpool.queue);
675 card->lbpool.count = 0; /* Not used */
676 for (j = 0; j < NUM_LB; j++) {
677 struct sk_buff *lb;
678 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
679 if (lb == NULL) {
680 printk
681 ("nicstar%d: can't allocate %dth of %d large buffers.\n",
682 i, j, NUM_LB);
683 error = 14;
684 ns_init_card_error(card, error);
685 return error;
686 }
687 NS_PRV_BUFTYPE(lb) = BUF_LG;
688 skb_queue_tail(&card->lbpool.queue, lb);
689 skb_reserve(lb, NS_SMBUFSIZE);
690 push_rxbufs(card, lb);
691 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
692 if (j == 1) {
693 card->rcbuf = lb;
694 card->rawcell = (struct ns_rcqe *) lb->data;
695 card->rawch = NS_PRV_DMA(lb);
696 }
697 }
698 /* Test for strange behaviour which leads to crashes */
699 if ((bcount =
700 ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
701 printk
702 ("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
703 i, j, bcount);
704 error = 14;
705 ns_init_card_error(card, error);
706 return error;
707 }
708
709 /* Allocate small buffers */
710 skb_queue_head_init(&card->sbpool.queue);
711 card->sbpool.count = 0; /* Not used */
712 for (j = 0; j < NUM_SB; j++) {
713 struct sk_buff *sb;
714 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
715 if (sb == NULL) {
716 printk
717 ("nicstar%d: can't allocate %dth of %d small buffers.\n",
718 i, j, NUM_SB);
719 error = 15;
720 ns_init_card_error(card, error);
721 return error;
722 }
723 NS_PRV_BUFTYPE(sb) = BUF_SM;
724 skb_queue_tail(&card->sbpool.queue, sb);
725 skb_reserve(sb, NS_AAL0_HEADER);
726 push_rxbufs(card, sb);
727 }
728 /* Test for strange behaviour which leads to crashes */
729 if ((bcount =
730 ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
731 printk
732 ("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
733 i, j, bcount);
734 error = 15;
735 ns_init_card_error(card, error);
736 return error;
737 }
738
739 /* Allocate iovec buffers */
740 skb_queue_head_init(&card->iovpool.queue);
741 card->iovpool.count = 0;
742 for (j = 0; j < NUM_IOVB; j++) {
743 struct sk_buff *iovb;
744 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
745 if (iovb == NULL) {
746 printk
747 ("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
748 i, j, NUM_IOVB);
749 error = 16;
750 ns_init_card_error(card, error);
751 return error;
752 }
753 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
754 skb_queue_tail(&card->iovpool.queue, iovb);
755 card->iovpool.count++;
756 }
757
758 /* Configure NICStAR */
759 if (card->rct_size == 4096)
760 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
761 else /* (card->rct_size == 16384) */
762 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
763
764 card->efbie = 1;
765
766 card->intcnt = 0;
767 if (request_irq
768 (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) {
769 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
770 error = 9;
771 ns_init_card_error(card, error);
772 return error;
773 }
774
775 /* Register device */
776 card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
777 if (card->atmdev == NULL) {
778 printk("nicstar%d: can't register device.\n", i);
779 error = 17;
780 ns_init_card_error(card, error);
781 return error;
782 }
783
784 if (ns_parse_mac(mac[i], card->atmdev->esi)) {
785 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
786 card->atmdev->esi, 6);
787 if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) ==
788 0) {
789 nicstar_read_eprom(card->membase,
790 NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
791 card->atmdev->esi, 6);
792 }
793 }
794
795 printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
796
797 card->atmdev->dev_data = card;
798 card->atmdev->ci_range.vpi_bits = card->vpibits;
799 card->atmdev->ci_range.vci_bits = card->vcibits;
800 card->atmdev->link_rate = card->max_pcr;
801 card->atmdev->phy = NULL;
802
803 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
804 if (card->max_pcr == ATM_OC3_PCR)
805 suni_init(card->atmdev);
806 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
807
808 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
809 if (card->max_pcr == ATM_25_PCR)
810 idt77105_init(card->atmdev);
811 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
812
813 if (card->atmdev->phy && card->atmdev->phy->start)
814 card->atmdev->phy->start(card->atmdev);
815
816 writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
817 NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
818 NS_CFG_PHYIE, card->membase + CFG);
819
820 num_cards++;
821
822 return error;
823 }
824
825 static void __devinit ns_init_card_error(ns_dev * card, int error)
826 {
827 if (error >= 17) {
828 writel(0x00000000, card->membase + CFG);
829 }
830 if (error >= 16) {
831 struct sk_buff *iovb;
832 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
833 dev_kfree_skb_any(iovb);
834 }
835 if (error >= 15) {
836 struct sk_buff *sb;
837 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
838 dev_kfree_skb_any(sb);
839 free_scq(card, card->scq0, NULL);
840 }
841 if (error >= 14) {
842 struct sk_buff *lb;
843 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
844 dev_kfree_skb_any(lb);
845 }
846 if (error >= 13) {
847 struct sk_buff *hb;
848 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
849 dev_kfree_skb_any(hb);
850 }
851 if (error >= 12) {
852 kfree(card->rsq.org);
853 }
854 if (error >= 11) {
855 kfree(card->tsq.org);
856 }
857 if (error >= 10) {
858 free_irq(card->pcidev->irq, card);
859 }
860 if (error >= 4) {
861 iounmap(card->membase);
862 }
863 if (error >= 3) {
864 pci_disable_device(card->pcidev);
865 kfree(card);
866 }
867 }
868
869 static scq_info *get_scq(ns_dev *card, int size, u32 scd)
870 {
871 scq_info *scq;
872 int i;
873
874 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
875 return NULL;
876
877 scq = kmalloc(sizeof(scq_info), GFP_KERNEL);
878 if (!scq)
879 return NULL;
880 scq->org = pci_alloc_consistent(card->pcidev, 2 * size, &scq->dma);
881 if (!scq->org) {
882 kfree(scq);
883 return NULL;
884 }
885 scq->skb = kmalloc(sizeof(struct sk_buff *) *
886 (size / NS_SCQE_SIZE), GFP_KERNEL);
887 if (!scq->skb) {
888 kfree(scq->org);
889 kfree(scq);
890 return NULL;
891 }
892 scq->num_entries = size / NS_SCQE_SIZE;
893 scq->base = PTR_ALIGN(scq->org, size);
894 scq->next = scq->base;
895 scq->last = scq->base + (scq->num_entries - 1);
896 scq->tail = scq->last;
897 scq->scd = scd;
898 scq->num_entries = size / NS_SCQE_SIZE;
899 scq->tbd_count = 0;
900 init_waitqueue_head(&scq->scqfull_waitq);
901 scq->full = 0;
902 spin_lock_init(&scq->lock);
903
904 for (i = 0; i < scq->num_entries; i++)
905 scq->skb[i] = NULL;
906
907 return scq;
908 }
909
910 /* For variable rate SCQ vcc must be NULL */
911 static void free_scq(ns_dev *card, scq_info *scq, struct atm_vcc *vcc)
912 {
913 int i;
914
915 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
916 for (i = 0; i < scq->num_entries; i++) {
917 if (scq->skb[i] != NULL) {
918 vcc = ATM_SKB(scq->skb[i])->vcc;
919 if (vcc->pop != NULL)
920 vcc->pop(vcc, scq->skb[i]);
921 else
922 dev_kfree_skb_any(scq->skb[i]);
923 }
924 } else { /* vcc must be != NULL */
925
926 if (vcc == NULL) {
927 printk
928 ("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
929 for (i = 0; i < scq->num_entries; i++)
930 dev_kfree_skb_any(scq->skb[i]);
931 } else
932 for (i = 0; i < scq->num_entries; i++) {
933 if (scq->skb[i] != NULL) {
934 if (vcc->pop != NULL)
935 vcc->pop(vcc, scq->skb[i]);
936 else
937 dev_kfree_skb_any(scq->skb[i]);
938 }
939 }
940 }
941 kfree(scq->skb);
942 pci_free_consistent(card->pcidev,
943 2 * (scq->num_entries == VBR_SCQ_NUM_ENTRIES ?
944 VBR_SCQSIZE : CBR_SCQSIZE),
945 scq->org, scq->dma);
946 kfree(scq);
947 }
948
949 /* The handles passed must be pointers to the sk_buff containing the small
950 or large buffer(s) cast to u32. */
951 static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
952 {
953 struct sk_buff *handle1, *handle2;
954 u32 id1 = 0, id2 = 0;
955 u32 addr1, addr2;
956 u32 stat;
957 unsigned long flags;
958 int err;
959
960 /* *BARF* */
961 handle2 = NULL;
962 addr2 = 0;
963 handle1 = skb;
964 addr1 = pci_map_single(card->pcidev,
965 skb->data,
966 (NS_PRV_BUFTYPE(skb) == BUF_SM
967 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
968 PCI_DMA_TODEVICE);
969 NS_PRV_DMA(skb) = addr1; /* save so we can unmap later */
970
971 #ifdef GENERAL_DEBUG
972 if (!addr1)
973 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
974 card->index);
975 #endif /* GENERAL_DEBUG */
976
977 stat = readl(card->membase + STAT);
978 card->sbfqc = ns_stat_sfbqc_get(stat);
979 card->lbfqc = ns_stat_lfbqc_get(stat);
980 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
981 if (!addr2) {
982 if (card->sm_addr) {
983 addr2 = card->sm_addr;
984 handle2 = card->sm_handle;
985 card->sm_addr = 0x00000000;
986 card->sm_handle = 0x00000000;
987 } else { /* (!sm_addr) */
988
989 card->sm_addr = addr1;
990 card->sm_handle = handle1;
991 }
992 }
993 } else { /* buf_type == BUF_LG */
994
995 if (!addr2) {
996 if (card->lg_addr) {
997 addr2 = card->lg_addr;
998 handle2 = card->lg_handle;
999 card->lg_addr = 0x00000000;
1000 card->lg_handle = 0x00000000;
1001 } else { /* (!lg_addr) */
1002
1003 card->lg_addr = addr1;
1004 card->lg_handle = handle1;
1005 }
1006 }
1007 }
1008
1009 if (addr2) {
1010 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
1011 if (card->sbfqc >= card->sbnr.max) {
1012 skb_unlink(handle1, &card->sbpool.queue);
1013 dev_kfree_skb_any(handle1);
1014 skb_unlink(handle2, &card->sbpool.queue);
1015 dev_kfree_skb_any(handle2);
1016 return;
1017 } else
1018 card->sbfqc += 2;
1019 } else { /* (buf_type == BUF_LG) */
1020
1021 if (card->lbfqc >= card->lbnr.max) {
1022 skb_unlink(handle1, &card->lbpool.queue);
1023 dev_kfree_skb_any(handle1);
1024 skb_unlink(handle2, &card->lbpool.queue);
1025 dev_kfree_skb_any(handle2);
1026 return;
1027 } else
1028 card->lbfqc += 2;
1029 }
1030
1031 do {
1032 if (!idr_pre_get(&card->idr, GFP_ATOMIC)) {
1033 printk(KERN_ERR
1034 "nicstar%d: no free memory for idr\n",
1035 card->index);
1036 goto out;
1037 }
1038
1039 if (!id1)
1040 err = idr_get_new_above(&card->idr, handle1, 0, &id1);
1041
1042 if (!id2 && err == 0)
1043 err = idr_get_new_above(&card->idr, handle2, 0, &id2);
1044
1045 } while (err == -EAGAIN);
1046
1047 if (err)
1048 goto out;
1049
1050 spin_lock_irqsave(&card->res_lock, flags);
1051 while (CMD_BUSY(card)) ;
1052 writel(addr2, card->membase + DR3);
1053 writel(id2, card->membase + DR2);
1054 writel(addr1, card->membase + DR1);
1055 writel(id1, card->membase + DR0);
1056 writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
1057 card->membase + CMD);
1058 spin_unlock_irqrestore(&card->res_lock, flags);
1059
1060 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
1061 card->index,
1062 (NS_PRV_BUFTYPE(skb) == BUF_SM ? "small" : "large"),
1063 addr1, addr2);
1064 }
1065
1066 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1067 card->lbfqc >= card->lbnr.min) {
1068 card->efbie = 1;
1069 writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
1070 card->membase + CFG);
1071 }
1072
1073 out:
1074 return;
1075 }
1076
1077 static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1078 {
1079 u32 stat_r;
1080 ns_dev *card;
1081 struct atm_dev *dev;
1082 unsigned long flags;
1083
1084 card = (ns_dev *) dev_id;
1085 dev = card->atmdev;
1086 card->intcnt++;
1087
1088 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1089
1090 spin_lock_irqsave(&card->int_lock, flags);
1091
1092 stat_r = readl(card->membase + STAT);
1093
1094 /* Transmit Status Indicator has been written to T. S. Queue */
1095 if (stat_r & NS_STAT_TSIF) {
1096 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1097 process_tsq(card);
1098 writel(NS_STAT_TSIF, card->membase + STAT);
1099 }
1100
1101 /* Incomplete CS-PDU has been transmitted */
1102 if (stat_r & NS_STAT_TXICP) {
1103 writel(NS_STAT_TXICP, card->membase + STAT);
1104 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1105 card->index);
1106 }
1107
1108 /* Transmit Status Queue 7/8 full */
1109 if (stat_r & NS_STAT_TSQF) {
1110 writel(NS_STAT_TSQF, card->membase + STAT);
1111 PRINTK("nicstar%d: TSQ full.\n", card->index);
1112 process_tsq(card);
1113 }
1114
1115 /* Timer overflow */
1116 if (stat_r & NS_STAT_TMROF) {
1117 writel(NS_STAT_TMROF, card->membase + STAT);
1118 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1119 }
1120
1121 /* PHY device interrupt signal active */
1122 if (stat_r & NS_STAT_PHYI) {
1123 writel(NS_STAT_PHYI, card->membase + STAT);
1124 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1125 if (dev->phy && dev->phy->interrupt) {
1126 dev->phy->interrupt(dev);
1127 }
1128 }
1129
1130 /* Small Buffer Queue is full */
1131 if (stat_r & NS_STAT_SFBQF) {
1132 writel(NS_STAT_SFBQF, card->membase + STAT);
1133 printk("nicstar%d: Small free buffer queue is full.\n",
1134 card->index);
1135 }
1136
1137 /* Large Buffer Queue is full */
1138 if (stat_r & NS_STAT_LFBQF) {
1139 writel(NS_STAT_LFBQF, card->membase + STAT);
1140 printk("nicstar%d: Large free buffer queue is full.\n",
1141 card->index);
1142 }
1143
1144 /* Receive Status Queue is full */
1145 if (stat_r & NS_STAT_RSQF) {
1146 writel(NS_STAT_RSQF, card->membase + STAT);
1147 printk("nicstar%d: RSQ full.\n", card->index);
1148 process_rsq(card);
1149 }
1150
1151 /* Complete CS-PDU received */
1152 if (stat_r & NS_STAT_EOPDU) {
1153 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1154 process_rsq(card);
1155 writel(NS_STAT_EOPDU, card->membase + STAT);
1156 }
1157
1158 /* Raw cell received */
1159 if (stat_r & NS_STAT_RAWCF) {
1160 writel(NS_STAT_RAWCF, card->membase + STAT);
1161 #ifndef RCQ_SUPPORT
1162 printk("nicstar%d: Raw cell received and no support yet...\n",
1163 card->index);
1164 #endif /* RCQ_SUPPORT */
1165 /* NOTE: the following procedure may keep a raw cell pending until the
1166 next interrupt. As this preliminary support is only meant to
1167 avoid buffer leakage, this is not an issue. */
1168 while (readl(card->membase + RAWCT) != card->rawch) {
1169
1170 if (ns_rcqe_islast(card->rawcell)) {
1171 struct sk_buff *oldbuf;
1172
1173 oldbuf = card->rcbuf;
1174 card->rcbuf = idr_find(&card->idr,
1175 ns_rcqe_nextbufhandle(card->rawcell));
1176 card->rawch = NS_PRV_DMA(card->rcbuf);
1177 card->rawcell = (struct ns_rcqe *)
1178 card->rcbuf->data;
1179 recycle_rx_buf(card, oldbuf);
1180 } else {
1181 card->rawch += NS_RCQE_SIZE;
1182 card->rawcell++;
1183 }
1184 }
1185 }
1186
1187 /* Small buffer queue is empty */
1188 if (stat_r & NS_STAT_SFBQE) {
1189 int i;
1190 struct sk_buff *sb;
1191
1192 writel(NS_STAT_SFBQE, card->membase + STAT);
1193 printk("nicstar%d: Small free buffer queue empty.\n",
1194 card->index);
1195 for (i = 0; i < card->sbnr.min; i++) {
1196 sb = dev_alloc_skb(NS_SMSKBSIZE);
1197 if (sb == NULL) {
1198 writel(readl(card->membase + CFG) &
1199 ~NS_CFG_EFBIE, card->membase + CFG);
1200 card->efbie = 0;
1201 break;
1202 }
1203 NS_PRV_BUFTYPE(sb) = BUF_SM;
1204 skb_queue_tail(&card->sbpool.queue, sb);
1205 skb_reserve(sb, NS_AAL0_HEADER);
1206 push_rxbufs(card, sb);
1207 }
1208 card->sbfqc = i;
1209 process_rsq(card);
1210 }
1211
1212 /* Large buffer queue empty */
1213 if (stat_r & NS_STAT_LFBQE) {
1214 int i;
1215 struct sk_buff *lb;
1216
1217 writel(NS_STAT_LFBQE, card->membase + STAT);
1218 printk("nicstar%d: Large free buffer queue empty.\n",
1219 card->index);
1220 for (i = 0; i < card->lbnr.min; i++) {
1221 lb = dev_alloc_skb(NS_LGSKBSIZE);
1222 if (lb == NULL) {
1223 writel(readl(card->membase + CFG) &
1224 ~NS_CFG_EFBIE, card->membase + CFG);
1225 card->efbie = 0;
1226 break;
1227 }
1228 NS_PRV_BUFTYPE(lb) = BUF_LG;
1229 skb_queue_tail(&card->lbpool.queue, lb);
1230 skb_reserve(lb, NS_SMBUFSIZE);
1231 push_rxbufs(card, lb);
1232 }
1233 card->lbfqc = i;
1234 process_rsq(card);
1235 }
1236
1237 /* Receive Status Queue is 7/8 full */
1238 if (stat_r & NS_STAT_RSQAF) {
1239 writel(NS_STAT_RSQAF, card->membase + STAT);
1240 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1241 process_rsq(card);
1242 }
1243
1244 spin_unlock_irqrestore(&card->int_lock, flags);
1245 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1246 return IRQ_HANDLED;
1247 }
1248
1249 static int ns_open(struct atm_vcc *vcc)
1250 {
1251 ns_dev *card;
1252 vc_map *vc;
1253 unsigned long tmpl, modl;
1254 int tcr, tcra; /* target cell rate, and absolute value */
1255 int n = 0; /* Number of entries in the TST. Initialized to remove
1256 the compiler warning. */
1257 u32 u32d[4];
1258 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1259 warning. How I wish compilers were clever enough to
1260 tell which variables can truly be used
1261 uninitialized... */
1262 int inuse; /* tx or rx vc already in use by another vcc */
1263 short vpi = vcc->vpi;
1264 int vci = vcc->vci;
1265
1266 card = (ns_dev *) vcc->dev->dev_data;
1267 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
1268 vci);
1269 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1270 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1271 return -EINVAL;
1272 }
1273
1274 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1275 vcc->dev_data = vc;
1276
1277 inuse = 0;
1278 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1279 inuse = 1;
1280 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1281 inuse += 2;
1282 if (inuse) {
1283 printk("nicstar%d: %s vci already in use.\n", card->index,
1284 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1285 return -EINVAL;
1286 }
1287
1288 set_bit(ATM_VF_ADDR, &vcc->flags);
1289
1290 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1291 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1292 needed to do that. */
1293 if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
1294 scq_info *scq;
1295
1296 set_bit(ATM_VF_PARTIAL, &vcc->flags);
1297 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1298 /* Check requested cell rate and availability of SCD */
1299 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
1300 && vcc->qos.txtp.min_pcr == 0) {
1301 PRINTK
1302 ("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1303 card->index);
1304 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1305 clear_bit(ATM_VF_ADDR, &vcc->flags);
1306 return -EINVAL;
1307 }
1308
1309 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1310 tcra = tcr >= 0 ? tcr : -tcr;
1311
1312 PRINTK("nicstar%d: target cell rate = %d.\n",
1313 card->index, vcc->qos.txtp.max_pcr);
1314
1315 tmpl =
1316 (unsigned long)tcra *(unsigned long)
1317 NS_TST_NUM_ENTRIES;
1318 modl = tmpl % card->max_pcr;
1319
1320 n = (int)(tmpl / card->max_pcr);
1321 if (tcr > 0) {
1322 if (modl > 0)
1323 n++;
1324 } else if (tcr == 0) {
1325 if ((n =
1326 (card->tst_free_entries -
1327 NS_TST_RESERVED)) <= 0) {
1328 PRINTK
1329 ("nicstar%d: no CBR bandwidth free.\n",
1330 card->index);
1331 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1332 clear_bit(ATM_VF_ADDR, &vcc->flags);
1333 return -EINVAL;
1334 }
1335 }
1336
1337 if (n == 0) {
1338 printk
1339 ("nicstar%d: selected bandwidth < granularity.\n",
1340 card->index);
1341 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1342 clear_bit(ATM_VF_ADDR, &vcc->flags);
1343 return -EINVAL;
1344 }
1345
1346 if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
1347 PRINTK
1348 ("nicstar%d: not enough free CBR bandwidth.\n",
1349 card->index);
1350 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1351 clear_bit(ATM_VF_ADDR, &vcc->flags);
1352 return -EINVAL;
1353 } else
1354 card->tst_free_entries -= n;
1355
1356 XPRINTK("nicstar%d: writing %d tst entries.\n",
1357 card->index, n);
1358 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
1359 if (card->scd2vc[frscdi] == NULL) {
1360 card->scd2vc[frscdi] = vc;
1361 break;
1362 }
1363 }
1364 if (frscdi == NS_FRSCD_NUM) {
1365 PRINTK
1366 ("nicstar%d: no SCD available for CBR channel.\n",
1367 card->index);
1368 card->tst_free_entries += n;
1369 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1370 clear_bit(ATM_VF_ADDR, &vcc->flags);
1371 return -EBUSY;
1372 }
1373
1374 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1375
1376 scq = get_scq(card, CBR_SCQSIZE, vc->cbr_scd);
1377 if (scq == NULL) {
1378 PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
1379 card->index);
1380 card->scd2vc[frscdi] = NULL;
1381 card->tst_free_entries += n;
1382 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1383 clear_bit(ATM_VF_ADDR, &vcc->flags);
1384 return -ENOMEM;
1385 }
1386 vc->scq = scq;
1387 u32d[0] = scq_virt_to_bus(scq, scq->base);
1388 u32d[1] = (u32) 0x00000000;
1389 u32d[2] = (u32) 0xffffffff;
1390 u32d[3] = (u32) 0x00000000;
1391 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1392
1393 fill_tst(card, n, vc);
1394 } else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
1395 vc->cbr_scd = 0x00000000;
1396 vc->scq = card->scq0;
1397 }
1398
1399 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1400 vc->tx = 1;
1401 vc->tx_vcc = vcc;
1402 vc->tbd_count = 0;
1403 }
1404 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1405 u32 status;
1406
1407 vc->rx = 1;
1408 vc->rx_vcc = vcc;
1409 vc->rx_iov = NULL;
1410
1411 /* Open the connection in hardware */
1412 if (vcc->qos.aal == ATM_AAL5)
1413 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1414 else /* vcc->qos.aal == ATM_AAL0 */
1415 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1416 #ifdef RCQ_SUPPORT
1417 status |= NS_RCTE_RAWCELLINTEN;
1418 #endif /* RCQ_SUPPORT */
1419 ns_write_sram(card,
1420 NS_RCT +
1421 (vpi << card->vcibits | vci) *
1422 NS_RCT_ENTRY_SIZE, &status, 1);
1423 }
1424
1425 }
1426
1427 set_bit(ATM_VF_READY, &vcc->flags);
1428 return 0;
1429 }
1430
1431 static void ns_close(struct atm_vcc *vcc)
1432 {
1433 vc_map *vc;
1434 ns_dev *card;
1435 u32 data;
1436 int i;
1437
1438 vc = vcc->dev_data;
1439 card = vcc->dev->dev_data;
1440 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1441 (int)vcc->vpi, vcc->vci);
1442
1443 clear_bit(ATM_VF_READY, &vcc->flags);
1444
1445 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1446 u32 addr;
1447 unsigned long flags;
1448
1449 addr =
1450 NS_RCT +
1451 (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1452 spin_lock_irqsave(&card->res_lock, flags);
1453 while (CMD_BUSY(card)) ;
1454 writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
1455 card->membase + CMD);
1456 spin_unlock_irqrestore(&card->res_lock, flags);
1457
1458 vc->rx = 0;
1459 if (vc->rx_iov != NULL) {
1460 struct sk_buff *iovb;
1461 u32 stat;
1462
1463 stat = readl(card->membase + STAT);
1464 card->sbfqc = ns_stat_sfbqc_get(stat);
1465 card->lbfqc = ns_stat_lfbqc_get(stat);
1466
1467 PRINTK
1468 ("nicstar%d: closing a VC with pending rx buffers.\n",
1469 card->index);
1470 iovb = vc->rx_iov;
1471 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
1472 NS_PRV_IOVCNT(iovb));
1473 NS_PRV_IOVCNT(iovb) = 0;
1474 spin_lock_irqsave(&card->int_lock, flags);
1475 recycle_iov_buf(card, iovb);
1476 spin_unlock_irqrestore(&card->int_lock, flags);
1477 vc->rx_iov = NULL;
1478 }
1479 }
1480
1481 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1482 vc->tx = 0;
1483 }
1484
1485 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1486 unsigned long flags;
1487 ns_scqe *scqep;
1488 scq_info *scq;
1489
1490 scq = vc->scq;
1491
1492 for (;;) {
1493 spin_lock_irqsave(&scq->lock, flags);
1494 scqep = scq->next;
1495 if (scqep == scq->base)
1496 scqep = scq->last;
1497 else
1498 scqep--;
1499 if (scqep == scq->tail) {
1500 spin_unlock_irqrestore(&scq->lock, flags);
1501 break;
1502 }
1503 /* If the last entry is not a TSR, place one in the SCQ in order to
1504 be able to completely drain it and then close. */
1505 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
1506 ns_scqe tsr;
1507 u32 scdi, scqi;
1508 u32 data;
1509 int index;
1510
1511 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1512 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1513 scqi = scq->next - scq->base;
1514 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1515 tsr.word_3 = 0x00000000;
1516 tsr.word_4 = 0x00000000;
1517 *scq->next = tsr;
1518 index = (int)scqi;
1519 scq->skb[index] = NULL;
1520 if (scq->next == scq->last)
1521 scq->next = scq->base;
1522 else
1523 scq->next++;
1524 data = scq_virt_to_bus(scq, scq->next);
1525 ns_write_sram(card, scq->scd, &data, 1);
1526 }
1527 spin_unlock_irqrestore(&scq->lock, flags);
1528 schedule();
1529 }
1530
1531 /* Free all TST entries */
1532 data = NS_TST_OPCODE_VARIABLE;
1533 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
1534 if (card->tste2vc[i] == vc) {
1535 ns_write_sram(card, card->tst_addr + i, &data,
1536 1);
1537 card->tste2vc[i] = NULL;
1538 card->tst_free_entries++;
1539 }
1540 }
1541
1542 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1543 free_scq(card, vc->scq, vcc);
1544 }
1545
1546 /* remove all references to vcc before deleting it */
1547 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1548 unsigned long flags;
1549 scq_info *scq = card->scq0;
1550
1551 spin_lock_irqsave(&scq->lock, flags);
1552
1553 for (i = 0; i < scq->num_entries; i++) {
1554 if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1555 ATM_SKB(scq->skb[i])->vcc = NULL;
1556 atm_return(vcc, scq->skb[i]->truesize);
1557 PRINTK
1558 ("nicstar: deleted pending vcc mapping\n");
1559 }
1560 }
1561
1562 spin_unlock_irqrestore(&scq->lock, flags);
1563 }
1564
1565 vcc->dev_data = NULL;
1566 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1567 clear_bit(ATM_VF_ADDR, &vcc->flags);
1568
1569 #ifdef RX_DEBUG
1570 {
1571 u32 stat, cfg;
1572 stat = readl(card->membase + STAT);
1573 cfg = readl(card->membase + CFG);
1574 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1575 printk
1576 ("TSQ: base = 0x%p next = 0x%p last = 0x%p TSQT = 0x%08X \n",
1577 card->tsq.base, card->tsq.next,
1578 card->tsq.last, readl(card->membase + TSQT));
1579 printk
1580 ("RSQ: base = 0x%p next = 0x%p last = 0x%p RSQT = 0x%08X \n",
1581 card->rsq.base, card->rsq.next,
1582 card->rsq.last, readl(card->membase + RSQT));
1583 printk("Empty free buffer queue interrupt %s \n",
1584 card->efbie ? "enabled" : "disabled");
1585 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1586 ns_stat_sfbqc_get(stat), card->sbpool.count,
1587 ns_stat_lfbqc_get(stat), card->lbpool.count);
1588 printk("hbpool.count = %d iovpool.count = %d \n",
1589 card->hbpool.count, card->iovpool.count);
1590 }
1591 #endif /* RX_DEBUG */
1592 }
1593
1594 static void fill_tst(ns_dev * card, int n, vc_map * vc)
1595 {
1596 u32 new_tst;
1597 unsigned long cl;
1598 int e, r;
1599 u32 data;
1600
1601 /* It would be very complicated to keep the two TSTs synchronized while
1602 assuring that writes are only made to the inactive TST. So, for now I
1603 will use only one TST. If problems occur, I will change this again */
1604
1605 new_tst = card->tst_addr;
1606
1607 /* Fill procedure */
1608
1609 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
1610 if (card->tste2vc[e] == NULL)
1611 break;
1612 }
1613 if (e == NS_TST_NUM_ENTRIES) {
1614 printk("nicstar%d: No free TST entries found. \n", card->index);
1615 return;
1616 }
1617
1618 r = n;
1619 cl = NS_TST_NUM_ENTRIES;
1620 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1621
1622 while (r > 0) {
1623 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
1624 card->tste2vc[e] = vc;
1625 ns_write_sram(card, new_tst + e, &data, 1);
1626 cl -= NS_TST_NUM_ENTRIES;
1627 r--;
1628 }
1629
1630 if (++e == NS_TST_NUM_ENTRIES) {
1631 e = 0;
1632 }
1633 cl += n;
1634 }
1635
1636 /* End of fill procedure */
1637
1638 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1639 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1640 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1641 card->tst_addr = new_tst;
1642 }
1643
1644 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1645 {
1646 ns_dev *card;
1647 vc_map *vc;
1648 scq_info *scq;
1649 unsigned long buflen;
1650 ns_scqe scqe;
1651 u32 flags; /* TBD flags, not CPU flags */
1652
1653 card = vcc->dev->dev_data;
1654 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1655 if ((vc = (vc_map *) vcc->dev_data) == NULL) {
1656 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
1657 card->index);
1658 atomic_inc(&vcc->stats->tx_err);
1659 dev_kfree_skb_any(skb);
1660 return -EINVAL;
1661 }
1662
1663 if (!vc->tx) {
1664 printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
1665 card->index);
1666 atomic_inc(&vcc->stats->tx_err);
1667 dev_kfree_skb_any(skb);
1668 return -EINVAL;
1669 }
1670
1671 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1672 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
1673 card->index);
1674 atomic_inc(&vcc->stats->tx_err);
1675 dev_kfree_skb_any(skb);
1676 return -EINVAL;
1677 }
1678
1679 if (skb_shinfo(skb)->nr_frags != 0) {
1680 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1681 atomic_inc(&vcc->stats->tx_err);
1682 dev_kfree_skb_any(skb);
1683 return -EINVAL;
1684 }
1685
1686 ATM_SKB(skb)->vcc = vcc;
1687
1688 NS_PRV_DMA(skb) = pci_map_single(card->pcidev, skb->data,
1689 skb->len, PCI_DMA_TODEVICE);
1690
1691 if (vcc->qos.aal == ATM_AAL5) {
1692 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1693 flags = NS_TBD_AAL5;
1694 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb));
1695 scqe.word_3 = cpu_to_le32(skb->len);
1696 scqe.word_4 =
1697 ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1698 ATM_SKB(skb)->
1699 atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1700 flags |= NS_TBD_EOPDU;
1701 } else { /* (vcc->qos.aal == ATM_AAL0) */
1702
1703 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1704 flags = NS_TBD_AAL0;
1705 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb) + NS_AAL0_HEADER);
1706 scqe.word_3 = cpu_to_le32(0x00000000);
1707 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1708 flags |= NS_TBD_EOPDU;
1709 scqe.word_4 =
1710 cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1711 /* Force the VPI/VCI to be the same as in VCC struct */
1712 scqe.word_4 |=
1713 cpu_to_le32((((u32) vcc->
1714 vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
1715 vci) <<
1716 NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
1717 }
1718
1719 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1720 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1721 scq = ((vc_map *) vcc->dev_data)->scq;
1722 } else {
1723 scqe.word_1 =
1724 ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1725 scq = card->scq0;
1726 }
1727
1728 if (push_scqe(card, vc, scq, &scqe, skb) != 0) {
1729 atomic_inc(&vcc->stats->tx_err);
1730 dev_kfree_skb_any(skb);
1731 return -EIO;
1732 }
1733 atomic_inc(&vcc->stats->tx);
1734
1735 return 0;
1736 }
1737
1738 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
1739 struct sk_buff *skb)
1740 {
1741 unsigned long flags;
1742 ns_scqe tsr;
1743 u32 scdi, scqi;
1744 int scq_is_vbr;
1745 u32 data;
1746 int index;
1747
1748 spin_lock_irqsave(&scq->lock, flags);
1749 while (scq->tail == scq->next) {
1750 if (in_interrupt()) {
1751 spin_unlock_irqrestore(&scq->lock, flags);
1752 printk("nicstar%d: Error pushing TBD.\n", card->index);
1753 return 1;
1754 }
1755
1756 scq->full = 1;
1757 spin_unlock_irqrestore(&scq->lock, flags);
1758 interruptible_sleep_on_timeout(&scq->scqfull_waitq,
1759 SCQFULL_TIMEOUT);
1760 spin_lock_irqsave(&scq->lock, flags);
1761
1762 if (scq->full) {
1763 spin_unlock_irqrestore(&scq->lock, flags);
1764 printk("nicstar%d: Timeout pushing TBD.\n",
1765 card->index);
1766 return 1;
1767 }
1768 }
1769 *scq->next = *tbd;
1770 index = (int)(scq->next - scq->base);
1771 scq->skb[index] = skb;
1772 XPRINTK("nicstar%d: sending skb at 0x%p (pos %d).\n",
1773 card->index, skb, index);
1774 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1775 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1776 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1777 scq->next);
1778 if (scq->next == scq->last)
1779 scq->next = scq->base;
1780 else
1781 scq->next++;
1782
1783 vc->tbd_count++;
1784 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
1785 scq->tbd_count++;
1786 scq_is_vbr = 1;
1787 } else
1788 scq_is_vbr = 0;
1789
1790 if (vc->tbd_count >= MAX_TBD_PER_VC
1791 || scq->tbd_count >= MAX_TBD_PER_SCQ) {
1792 int has_run = 0;
1793
1794 while (scq->tail == scq->next) {
1795 if (in_interrupt()) {
1796 data = scq_virt_to_bus(scq, scq->next);
1797 ns_write_sram(card, scq->scd, &data, 1);
1798 spin_unlock_irqrestore(&scq->lock, flags);
1799 printk("nicstar%d: Error pushing TSR.\n",
1800 card->index);
1801 return 0;
1802 }
1803
1804 scq->full = 1;
1805 if (has_run++)
1806 break;
1807 spin_unlock_irqrestore(&scq->lock, flags);
1808 interruptible_sleep_on_timeout(&scq->scqfull_waitq,
1809 SCQFULL_TIMEOUT);
1810 spin_lock_irqsave(&scq->lock, flags);
1811 }
1812
1813 if (!scq->full) {
1814 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1815 if (scq_is_vbr)
1816 scdi = NS_TSR_SCDISVBR;
1817 else
1818 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1819 scqi = scq->next - scq->base;
1820 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1821 tsr.word_3 = 0x00000000;
1822 tsr.word_4 = 0x00000000;
1823
1824 *scq->next = tsr;
1825 index = (int)scqi;
1826 scq->skb[index] = NULL;
1827 XPRINTK
1828 ("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1829 card->index, le32_to_cpu(tsr.word_1),
1830 le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
1831 le32_to_cpu(tsr.word_4), scq->next);
1832 if (scq->next == scq->last)
1833 scq->next = scq->base;
1834 else
1835 scq->next++;
1836 vc->tbd_count = 0;
1837 scq->tbd_count = 0;
1838 } else
1839 PRINTK("nicstar%d: Timeout pushing TSR.\n",
1840 card->index);
1841 }
1842 data = scq_virt_to_bus(scq, scq->next);
1843 ns_write_sram(card, scq->scd, &data, 1);
1844
1845 spin_unlock_irqrestore(&scq->lock, flags);
1846
1847 return 0;
1848 }
1849
1850 static void process_tsq(ns_dev * card)
1851 {
1852 u32 scdi;
1853 scq_info *scq;
1854 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1855 int serviced_entries; /* flag indicating at least on entry was serviced */
1856
1857 serviced_entries = 0;
1858
1859 if (card->tsq.next == card->tsq.last)
1860 one_ahead = card->tsq.base;
1861 else
1862 one_ahead = card->tsq.next + 1;
1863
1864 if (one_ahead == card->tsq.last)
1865 two_ahead = card->tsq.base;
1866 else
1867 two_ahead = one_ahead + 1;
1868
1869 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1870 !ns_tsi_isempty(two_ahead))
1871 /* At most two empty, as stated in the 77201 errata */
1872 {
1873 serviced_entries = 1;
1874
1875 /* Skip the one or two possible empty entries */
1876 while (ns_tsi_isempty(card->tsq.next)) {
1877 if (card->tsq.next == card->tsq.last)
1878 card->tsq.next = card->tsq.base;
1879 else
1880 card->tsq.next++;
1881 }
1882
1883 if (!ns_tsi_tmrof(card->tsq.next)) {
1884 scdi = ns_tsi_getscdindex(card->tsq.next);
1885 if (scdi == NS_TSI_SCDISVBR)
1886 scq = card->scq0;
1887 else {
1888 if (card->scd2vc[scdi] == NULL) {
1889 printk
1890 ("nicstar%d: could not find VC from SCD index.\n",
1891 card->index);
1892 ns_tsi_init(card->tsq.next);
1893 return;
1894 }
1895 scq = card->scd2vc[scdi]->scq;
1896 }
1897 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1898 scq->full = 0;
1899 wake_up_interruptible(&(scq->scqfull_waitq));
1900 }
1901
1902 ns_tsi_init(card->tsq.next);
1903 previous = card->tsq.next;
1904 if (card->tsq.next == card->tsq.last)
1905 card->tsq.next = card->tsq.base;
1906 else
1907 card->tsq.next++;
1908
1909 if (card->tsq.next == card->tsq.last)
1910 one_ahead = card->tsq.base;
1911 else
1912 one_ahead = card->tsq.next + 1;
1913
1914 if (one_ahead == card->tsq.last)
1915 two_ahead = card->tsq.base;
1916 else
1917 two_ahead = one_ahead + 1;
1918 }
1919
1920 if (serviced_entries)
1921 writel(PTR_DIFF(previous, card->tsq.base),
1922 card->membase + TSQH);
1923 }
1924
1925 static void drain_scq(ns_dev * card, scq_info * scq, int pos)
1926 {
1927 struct atm_vcc *vcc;
1928 struct sk_buff *skb;
1929 int i;
1930 unsigned long flags;
1931
1932 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%p, pos %d.\n",
1933 card->index, scq, pos);
1934 if (pos >= scq->num_entries) {
1935 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
1936 return;
1937 }
1938
1939 spin_lock_irqsave(&scq->lock, flags);
1940 i = (int)(scq->tail - scq->base);
1941 if (++i == scq->num_entries)
1942 i = 0;
1943 while (i != pos) {
1944 skb = scq->skb[i];
1945 XPRINTK("nicstar%d: freeing skb at 0x%p (index %d).\n",
1946 card->index, skb, i);
1947 if (skb != NULL) {
1948 pci_unmap_single(card->pcidev,
1949 NS_PRV_DMA(skb),
1950 skb->len,
1951 PCI_DMA_TODEVICE);
1952 vcc = ATM_SKB(skb)->vcc;
1953 if (vcc && vcc->pop != NULL) {
1954 vcc->pop(vcc, skb);
1955 } else {
1956 dev_kfree_skb_irq(skb);
1957 }
1958 scq->skb[i] = NULL;
1959 }
1960 if (++i == scq->num_entries)
1961 i = 0;
1962 }
1963 scq->tail = scq->base + pos;
1964 spin_unlock_irqrestore(&scq->lock, flags);
1965 }
1966
1967 static void process_rsq(ns_dev * card)
1968 {
1969 ns_rsqe *previous;
1970
1971 if (!ns_rsqe_valid(card->rsq.next))
1972 return;
1973 do {
1974 dequeue_rx(card, card->rsq.next);
1975 ns_rsqe_init(card->rsq.next);
1976 previous = card->rsq.next;
1977 if (card->rsq.next == card->rsq.last)
1978 card->rsq.next = card->rsq.base;
1979 else
1980 card->rsq.next++;
1981 } while (ns_rsqe_valid(card->rsq.next));
1982 writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
1983 }
1984
1985 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
1986 {
1987 u32 vpi, vci;
1988 vc_map *vc;
1989 struct sk_buff *iovb;
1990 struct iovec *iov;
1991 struct atm_vcc *vcc;
1992 struct sk_buff *skb;
1993 unsigned short aal5_len;
1994 int len;
1995 u32 stat;
1996 u32 id;
1997
1998 stat = readl(card->membase + STAT);
1999 card->sbfqc = ns_stat_sfbqc_get(stat);
2000 card->lbfqc = ns_stat_lfbqc_get(stat);
2001
2002 id = le32_to_cpu(rsqe->buffer_handle);
2003 skb = idr_find(&card->idr, id);
2004 if (!skb) {
2005 RXPRINTK(KERN_ERR
2006 "nicstar%d: idr_find() failed!\n", card->index);
2007 return;
2008 }
2009 idr_remove(&card->idr, id);
2010 pci_dma_sync_single_for_cpu(card->pcidev,
2011 NS_PRV_DMA(skb),
2012 (NS_PRV_BUFTYPE(skb) == BUF_SM
2013 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2014 PCI_DMA_FROMDEVICE);
2015 pci_unmap_single(card->pcidev,
2016 NS_PRV_DMA(skb),
2017 (NS_PRV_BUFTYPE(skb) == BUF_SM
2018 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2019 PCI_DMA_FROMDEVICE);
2020 vpi = ns_rsqe_vpi(rsqe);
2021 vci = ns_rsqe_vci(rsqe);
2022 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
2023 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2024 card->index, vpi, vci);
2025 recycle_rx_buf(card, skb);
2026 return;
2027 }
2028
2029 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2030 if (!vc->rx) {
2031 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2032 card->index, vpi, vci);
2033 recycle_rx_buf(card, skb);
2034 return;
2035 }
2036
2037 vcc = vc->rx_vcc;
2038
2039 if (vcc->qos.aal == ATM_AAL0) {
2040 struct sk_buff *sb;
2041 unsigned char *cell;
2042 int i;
2043
2044 cell = skb->data;
2045 for (i = ns_rsqe_cellcount(rsqe); i; i--) {
2046 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL) {
2047 printk
2048 ("nicstar%d: Can't allocate buffers for aal0.\n",
2049 card->index);
2050 atomic_add(i, &vcc->stats->rx_drop);
2051 break;
2052 }
2053 if (!atm_charge(vcc, sb->truesize)) {
2054 RXPRINTK
2055 ("nicstar%d: atm_charge() dropped aal0 packets.\n",
2056 card->index);
2057 atomic_add(i - 1, &vcc->stats->rx_drop); /* already increased by 1 */
2058 dev_kfree_skb_any(sb);
2059 break;
2060 }
2061 /* Rebuild the header */
2062 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2063 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2064 if (i == 1 && ns_rsqe_eopdu(rsqe))
2065 *((u32 *) sb->data) |= 0x00000002;
2066 skb_put(sb, NS_AAL0_HEADER);
2067 memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2068 skb_put(sb, ATM_CELL_PAYLOAD);
2069 ATM_SKB(sb)->vcc = vcc;
2070 __net_timestamp(sb);
2071 vcc->push(vcc, sb);
2072 atomic_inc(&vcc->stats->rx);
2073 cell += ATM_CELL_PAYLOAD;
2074 }
2075
2076 recycle_rx_buf(card, skb);
2077 return;
2078 }
2079
2080 /* To reach this point, the AAL layer can only be AAL5 */
2081
2082 if ((iovb = vc->rx_iov) == NULL) {
2083 iovb = skb_dequeue(&(card->iovpool.queue));
2084 if (iovb == NULL) { /* No buffers in the queue */
2085 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2086 if (iovb == NULL) {
2087 printk("nicstar%d: Out of iovec buffers.\n",
2088 card->index);
2089 atomic_inc(&vcc->stats->rx_drop);
2090 recycle_rx_buf(card, skb);
2091 return;
2092 }
2093 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2094 } else if (--card->iovpool.count < card->iovnr.min) {
2095 struct sk_buff *new_iovb;
2096 if ((new_iovb =
2097 alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
2098 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2099 skb_queue_tail(&card->iovpool.queue, new_iovb);
2100 card->iovpool.count++;
2101 }
2102 }
2103 vc->rx_iov = iovb;
2104 NS_PRV_IOVCNT(iovb) = 0;
2105 iovb->len = 0;
2106 iovb->data = iovb->head;
2107 skb_reset_tail_pointer(iovb);
2108 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2109 buffer is stored as iovec base, NOT a pointer to the
2110 small or large buffer itself. */
2111 } else if (NS_PRV_IOVCNT(iovb) >= NS_MAX_IOVECS) {
2112 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2113 atomic_inc(&vcc->stats->rx_err);
2114 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2115 NS_MAX_IOVECS);
2116 NS_PRV_IOVCNT(iovb) = 0;
2117 iovb->len = 0;
2118 iovb->data = iovb->head;
2119 skb_reset_tail_pointer(iovb);
2120 }
2121 iov = &((struct iovec *)iovb->data)[NS_PRV_IOVCNT(iovb)++];
2122 iov->iov_base = (void *)skb;
2123 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2124 iovb->len += iov->iov_len;
2125
2126 #ifdef EXTRA_DEBUG
2127 if (NS_PRV_IOVCNT(iovb) == 1) {
2128 if (NS_PRV_BUFTYPE(skb) != BUF_SM) {
2129 printk
2130 ("nicstar%d: Expected a small buffer, and this is not one.\n",
2131 card->index);
2132 which_list(card, skb);
2133 atomic_inc(&vcc->stats->rx_err);
2134 recycle_rx_buf(card, skb);
2135 vc->rx_iov = NULL;
2136 recycle_iov_buf(card, iovb);
2137 return;
2138 }
2139 } else { /* NS_PRV_IOVCNT(iovb) >= 2 */
2140
2141 if (NS_PRV_BUFTYPE(skb) != BUF_LG) {
2142 printk
2143 ("nicstar%d: Expected a large buffer, and this is not one.\n",
2144 card->index);
2145 which_list(card, skb);
2146 atomic_inc(&vcc->stats->rx_err);
2147 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2148 NS_PRV_IOVCNT(iovb));
2149 vc->rx_iov = NULL;
2150 recycle_iov_buf(card, iovb);
2151 return;
2152 }
2153 }
2154 #endif /* EXTRA_DEBUG */
2155
2156 if (ns_rsqe_eopdu(rsqe)) {
2157 /* This works correctly regardless of the endianness of the host */
2158 unsigned char *L1L2 = (unsigned char *)
2159 (skb->data + iov->iov_len - 6);
2160 aal5_len = L1L2[0] << 8 | L1L2[1];
2161 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2162 if (ns_rsqe_crcerr(rsqe) ||
2163 len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
2164 printk("nicstar%d: AAL5 CRC error", card->index);
2165 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2166 printk(" - PDU size mismatch.\n");
2167 else
2168 printk(".\n");
2169 atomic_inc(&vcc->stats->rx_err);
2170 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2171 NS_PRV_IOVCNT(iovb));
2172 vc->rx_iov = NULL;
2173 recycle_iov_buf(card, iovb);
2174 return;
2175 }
2176
2177 /* By this point we (hopefully) have a complete SDU without errors. */
2178
2179 if (NS_PRV_IOVCNT(iovb) == 1) { /* Just a small buffer */
2180 /* skb points to a small buffer */
2181 if (!atm_charge(vcc, skb->truesize)) {
2182 push_rxbufs(card, skb);
2183 atomic_inc(&vcc->stats->rx_drop);
2184 } else {
2185 skb_put(skb, len);
2186 dequeue_sm_buf(card, skb);
2187 #ifdef NS_USE_DESTRUCTORS
2188 skb->destructor = ns_sb_destructor;
2189 #endif /* NS_USE_DESTRUCTORS */
2190 ATM_SKB(skb)->vcc = vcc;
2191 __net_timestamp(skb);
2192 vcc->push(vcc, skb);
2193 atomic_inc(&vcc->stats->rx);
2194 }
2195 } else if (NS_PRV_IOVCNT(iovb) == 2) { /* One small plus one large buffer */
2196 struct sk_buff *sb;
2197
2198 sb = (struct sk_buff *)(iov - 1)->iov_base;
2199 /* skb points to a large buffer */
2200
2201 if (len <= NS_SMBUFSIZE) {
2202 if (!atm_charge(vcc, sb->truesize)) {
2203 push_rxbufs(card, sb);
2204 atomic_inc(&vcc->stats->rx_drop);
2205 } else {
2206 skb_put(sb, len);
2207 dequeue_sm_buf(card, sb);
2208 #ifdef NS_USE_DESTRUCTORS
2209 sb->destructor = ns_sb_destructor;
2210 #endif /* NS_USE_DESTRUCTORS */
2211 ATM_SKB(sb)->vcc = vcc;
2212 __net_timestamp(sb);
2213 vcc->push(vcc, sb);
2214 atomic_inc(&vcc->stats->rx);
2215 }
2216
2217 push_rxbufs(card, skb);
2218
2219 } else { /* len > NS_SMBUFSIZE, the usual case */
2220
2221 if (!atm_charge(vcc, skb->truesize)) {
2222 push_rxbufs(card, skb);
2223 atomic_inc(&vcc->stats->rx_drop);
2224 } else {
2225 dequeue_lg_buf(card, skb);
2226 #ifdef NS_USE_DESTRUCTORS
2227 skb->destructor = ns_lb_destructor;
2228 #endif /* NS_USE_DESTRUCTORS */
2229 skb_push(skb, NS_SMBUFSIZE);
2230 skb_copy_from_linear_data(sb, skb->data,
2231 NS_SMBUFSIZE);
2232 skb_put(skb, len - NS_SMBUFSIZE);
2233 ATM_SKB(skb)->vcc = vcc;
2234 __net_timestamp(skb);
2235 vcc->push(vcc, skb);
2236 atomic_inc(&vcc->stats->rx);
2237 }
2238
2239 push_rxbufs(card, sb);
2240
2241 }
2242
2243 } else { /* Must push a huge buffer */
2244
2245 struct sk_buff *hb, *sb, *lb;
2246 int remaining, tocopy;
2247 int j;
2248
2249 hb = skb_dequeue(&(card->hbpool.queue));
2250 if (hb == NULL) { /* No buffers in the queue */
2251
2252 hb = dev_alloc_skb(NS_HBUFSIZE);
2253 if (hb == NULL) {
2254 printk
2255 ("nicstar%d: Out of huge buffers.\n",
2256 card->index);
2257 atomic_inc(&vcc->stats->rx_drop);
2258 recycle_iovec_rx_bufs(card,
2259 (struct iovec *)
2260 iovb->data,
2261 NS_PRV_IOVCNT(iovb));
2262 vc->rx_iov = NULL;
2263 recycle_iov_buf(card, iovb);
2264 return;
2265 } else if (card->hbpool.count < card->hbnr.min) {
2266 struct sk_buff *new_hb;
2267 if ((new_hb =
2268 dev_alloc_skb(NS_HBUFSIZE)) !=
2269 NULL) {
2270 skb_queue_tail(&card->hbpool.
2271 queue, new_hb);
2272 card->hbpool.count++;
2273 }
2274 }
2275 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2276 } else if (--card->hbpool.count < card->hbnr.min) {
2277 struct sk_buff *new_hb;
2278 if ((new_hb =
2279 dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
2280 NS_PRV_BUFTYPE(new_hb) = BUF_NONE;
2281 skb_queue_tail(&card->hbpool.queue,
2282 new_hb);
2283 card->hbpool.count++;
2284 }
2285 if (card->hbpool.count < card->hbnr.min) {
2286 if ((new_hb =
2287 dev_alloc_skb(NS_HBUFSIZE)) !=
2288 NULL) {
2289 NS_PRV_BUFTYPE(new_hb) =
2290 BUF_NONE;
2291 skb_queue_tail(&card->hbpool.
2292 queue, new_hb);
2293 card->hbpool.count++;
2294 }
2295 }
2296 }
2297
2298 iov = (struct iovec *)iovb->data;
2299
2300 if (!atm_charge(vcc, hb->truesize)) {
2301 recycle_iovec_rx_bufs(card, iov,
2302 NS_PRV_IOVCNT(iovb));
2303 if (card->hbpool.count < card->hbnr.max) {
2304 skb_queue_tail(&card->hbpool.queue, hb);
2305 card->hbpool.count++;
2306 } else
2307 dev_kfree_skb_any(hb);
2308 atomic_inc(&vcc->stats->rx_drop);
2309 } else {
2310 /* Copy the small buffer to the huge buffer */
2311 sb = (struct sk_buff *)iov->iov_base;
2312 skb_copy_from_linear_data(sb, hb->data,
2313 iov->iov_len);
2314 skb_put(hb, iov->iov_len);
2315 remaining = len - iov->iov_len;
2316 iov++;
2317 /* Free the small buffer */
2318 push_rxbufs(card, sb);
2319
2320 /* Copy all large buffers to the huge buffer and free them */
2321 for (j = 1; j < NS_PRV_IOVCNT(iovb); j++) {
2322 lb = (struct sk_buff *)iov->iov_base;
2323 tocopy =
2324 min_t(int, remaining, iov->iov_len);
2325 skb_copy_from_linear_data(lb,
2326 skb_tail_pointer
2327 (hb), tocopy);
2328 skb_put(hb, tocopy);
2329 iov++;
2330 remaining -= tocopy;
2331 push_rxbufs(card, lb);
2332 }
2333 #ifdef EXTRA_DEBUG
2334 if (remaining != 0 || hb->len != len)
2335 printk
2336 ("nicstar%d: Huge buffer len mismatch.\n",
2337 card->index);
2338 #endif /* EXTRA_DEBUG */
2339 ATM_SKB(hb)->vcc = vcc;
2340 #ifdef NS_USE_DESTRUCTORS
2341 hb->destructor = ns_hb_destructor;
2342 #endif /* NS_USE_DESTRUCTORS */
2343 __net_timestamp(hb);
2344 vcc->push(vcc, hb);
2345 atomic_inc(&vcc->stats->rx);
2346 }
2347 }
2348
2349 vc->rx_iov = NULL;
2350 recycle_iov_buf(card, iovb);
2351 }
2352
2353 }
2354
2355 #ifdef NS_USE_DESTRUCTORS
2356
2357 static void ns_sb_destructor(struct sk_buff *sb)
2358 {
2359 ns_dev *card;
2360 u32 stat;
2361
2362 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
2363 stat = readl(card->membase + STAT);
2364 card->sbfqc = ns_stat_sfbqc_get(stat);
2365 card->lbfqc = ns_stat_lfbqc_get(stat);
2366
2367 do {
2368 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2369 if (sb == NULL)
2370 break;
2371 NS_PRV_BUFTYPE(sb) = BUF_SM;
2372 skb_queue_tail(&card->sbpool.queue, sb);
2373 skb_reserve(sb, NS_AAL0_HEADER);
2374 push_rxbufs(card, sb);
2375 } while (card->sbfqc < card->sbnr.min);
2376 }
2377
2378 static void ns_lb_destructor(struct sk_buff *lb)
2379 {
2380 ns_dev *card;
2381 u32 stat;
2382
2383 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
2384 stat = readl(card->membase + STAT);
2385 card->sbfqc = ns_stat_sfbqc_get(stat);
2386 card->lbfqc = ns_stat_lfbqc_get(stat);
2387
2388 do {
2389 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2390 if (lb == NULL)
2391 break;
2392 NS_PRV_BUFTYPE(lb) = BUF_LG;
2393 skb_queue_tail(&card->lbpool.queue, lb);
2394 skb_reserve(lb, NS_SMBUFSIZE);
2395 push_rxbufs(card, lb);
2396 } while (card->lbfqc < card->lbnr.min);
2397 }
2398
2399 static void ns_hb_destructor(struct sk_buff *hb)
2400 {
2401 ns_dev *card;
2402
2403 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
2404
2405 while (card->hbpool.count < card->hbnr.init) {
2406 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2407 if (hb == NULL)
2408 break;
2409 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2410 skb_queue_tail(&card->hbpool.queue, hb);
2411 card->hbpool.count++;
2412 }
2413 }
2414
2415 #endif /* NS_USE_DESTRUCTORS */
2416
2417 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
2418 {
2419 if (unlikely(NS_PRV_BUFTYPE(skb) == BUF_NONE)) {
2420 printk("nicstar%d: What kind of rx buffer is this?\n",
2421 card->index);
2422 dev_kfree_skb_any(skb);
2423 } else
2424 push_rxbufs(card, skb);
2425 }
2426
2427 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
2428 {
2429 while (count-- > 0)
2430 recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
2431 }
2432
2433 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
2434 {
2435 if (card->iovpool.count < card->iovnr.max) {
2436 skb_queue_tail(&card->iovpool.queue, iovb);
2437 card->iovpool.count++;
2438 } else
2439 dev_kfree_skb_any(iovb);
2440 }
2441
2442 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
2443 {
2444 skb_unlink(sb, &card->sbpool.queue);
2445 #ifdef NS_USE_DESTRUCTORS
2446 if (card->sbfqc < card->sbnr.min)
2447 #else
2448 if (card->sbfqc < card->sbnr.init) {
2449 struct sk_buff *new_sb;
2450 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2451 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2452 skb_queue_tail(&card->sbpool.queue, new_sb);
2453 skb_reserve(new_sb, NS_AAL0_HEADER);
2454 push_rxbufs(card, new_sb);
2455 }
2456 }
2457 if (card->sbfqc < card->sbnr.init)
2458 #endif /* NS_USE_DESTRUCTORS */
2459 {
2460 struct sk_buff *new_sb;
2461 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2462 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2463 skb_queue_tail(&card->sbpool.queue, new_sb);
2464 skb_reserve(new_sb, NS_AAL0_HEADER);
2465 push_rxbufs(card, new_sb);
2466 }
2467 }
2468 }
2469
2470 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
2471 {
2472 skb_unlink(lb, &card->lbpool.queue);
2473 #ifdef NS_USE_DESTRUCTORS
2474 if (card->lbfqc < card->lbnr.min)
2475 #else
2476 if (card->lbfqc < card->lbnr.init) {
2477 struct sk_buff *new_lb;
2478 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2479 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2480 skb_queue_tail(&card->lbpool.queue, new_lb);
2481 skb_reserve(new_lb, NS_SMBUFSIZE);
2482 push_rxbufs(card, new_lb);
2483 }
2484 }
2485 if (card->lbfqc < card->lbnr.init)
2486 #endif /* NS_USE_DESTRUCTORS */
2487 {
2488 struct sk_buff *new_lb;
2489 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2490 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2491 skb_queue_tail(&card->lbpool.queue, new_lb);
2492 skb_reserve(new_lb, NS_SMBUFSIZE);
2493 push_rxbufs(card, new_lb);
2494 }
2495 }
2496 }
2497
2498 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2499 {
2500 u32 stat;
2501 ns_dev *card;
2502 int left;
2503
2504 left = (int)*pos;
2505 card = (ns_dev *) dev->dev_data;
2506 stat = readl(card->membase + STAT);
2507 if (!left--)
2508 return sprintf(page, "Pool count min init max \n");
2509 if (!left--)
2510 return sprintf(page, "Small %5d %5d %5d %5d \n",
2511 ns_stat_sfbqc_get(stat), card->sbnr.min,
2512 card->sbnr.init, card->sbnr.max);
2513 if (!left--)
2514 return sprintf(page, "Large %5d %5d %5d %5d \n",
2515 ns_stat_lfbqc_get(stat), card->lbnr.min,
2516 card->lbnr.init, card->lbnr.max);
2517 if (!left--)
2518 return sprintf(page, "Huge %5d %5d %5d %5d \n",
2519 card->hbpool.count, card->hbnr.min,
2520 card->hbnr.init, card->hbnr.max);
2521 if (!left--)
2522 return sprintf(page, "Iovec %5d %5d %5d %5d \n",
2523 card->iovpool.count, card->iovnr.min,
2524 card->iovnr.init, card->iovnr.max);
2525 if (!left--) {
2526 int retval;
2527 retval =
2528 sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2529 card->intcnt = 0;
2530 return retval;
2531 }
2532 #if 0
2533 /* Dump 25.6 Mbps PHY registers */
2534 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2535 here just in case it's needed for debugging. */
2536 if (card->max_pcr == ATM_25_PCR && !left--) {
2537 u32 phy_regs[4];
2538 u32 i;
2539
2540 for (i = 0; i < 4; i++) {
2541 while (CMD_BUSY(card)) ;
2542 writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
2543 card->membase + CMD);
2544 while (CMD_BUSY(card)) ;
2545 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2546 }
2547
2548 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2549 phy_regs[0], phy_regs[1], phy_regs[2],
2550 phy_regs[3]);
2551 }
2552 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2553 #if 0
2554 /* Dump TST */
2555 if (left-- < NS_TST_NUM_ENTRIES) {
2556 if (card->tste2vc[left + 1] == NULL)
2557 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2558 else
2559 return sprintf(page, "%5d - %d %d \n", left + 1,
2560 card->tste2vc[left + 1]->tx_vcc->vpi,
2561 card->tste2vc[left + 1]->tx_vcc->vci);
2562 }
2563 #endif /* 0 */
2564 return 0;
2565 }
2566
2567 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
2568 {
2569 ns_dev *card;
2570 pool_levels pl;
2571 long btype;
2572 unsigned long flags;
2573
2574 card = dev->dev_data;
2575 switch (cmd) {
2576 case NS_GETPSTAT:
2577 if (get_user
2578 (pl.buftype, &((pool_levels __user *) arg)->buftype))
2579 return -EFAULT;
2580 switch (pl.buftype) {
2581 case NS_BUFTYPE_SMALL:
2582 pl.count =
2583 ns_stat_sfbqc_get(readl(card->membase + STAT));
2584 pl.level.min = card->sbnr.min;
2585 pl.level.init = card->sbnr.init;
2586 pl.level.max = card->sbnr.max;
2587 break;
2588
2589 case NS_BUFTYPE_LARGE:
2590 pl.count =
2591 ns_stat_lfbqc_get(readl(card->membase + STAT));
2592 pl.level.min = card->lbnr.min;
2593 pl.level.init = card->lbnr.init;
2594 pl.level.max = card->lbnr.max;
2595 break;
2596
2597 case NS_BUFTYPE_HUGE:
2598 pl.count = card->hbpool.count;
2599 pl.level.min = card->hbnr.min;
2600 pl.level.init = card->hbnr.init;
2601 pl.level.max = card->hbnr.max;
2602 break;
2603
2604 case NS_BUFTYPE_IOVEC:
2605 pl.count = card->iovpool.count;
2606 pl.level.min = card->iovnr.min;
2607 pl.level.init = card->iovnr.init;
2608 pl.level.max = card->iovnr.max;
2609 break;
2610
2611 default:
2612 return -ENOIOCTLCMD;
2613
2614 }
2615 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2616 return (sizeof(pl));
2617 else
2618 return -EFAULT;
2619
2620 case NS_SETBUFLEV:
2621 if (!capable(CAP_NET_ADMIN))
2622 return -EPERM;
2623 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2624 return -EFAULT;
2625 if (pl.level.min >= pl.level.init
2626 || pl.level.init >= pl.level.max)
2627 return -EINVAL;
2628 if (pl.level.min == 0)
2629 return -EINVAL;
2630 switch (pl.buftype) {
2631 case NS_BUFTYPE_SMALL:
2632 if (pl.level.max > TOP_SB)
2633 return -EINVAL;
2634 card->sbnr.min = pl.level.min;
2635 card->sbnr.init = pl.level.init;
2636 card->sbnr.max = pl.level.max;
2637 break;
2638
2639 case NS_BUFTYPE_LARGE:
2640 if (pl.level.max > TOP_LB)
2641 return -EINVAL;
2642 card->lbnr.min = pl.level.min;
2643 card->lbnr.init = pl.level.init;
2644 card->lbnr.max = pl.level.max;
2645 break;
2646
2647 case NS_BUFTYPE_HUGE:
2648 if (pl.level.max > TOP_HB)
2649 return -EINVAL;
2650 card->hbnr.min = pl.level.min;
2651 card->hbnr.init = pl.level.init;
2652 card->hbnr.max = pl.level.max;
2653 break;
2654
2655 case NS_BUFTYPE_IOVEC:
2656 if (pl.level.max > TOP_IOVB)
2657 return -EINVAL;
2658 card->iovnr.min = pl.level.min;
2659 card->iovnr.init = pl.level.init;
2660 card->iovnr.max = pl.level.max;
2661 break;
2662
2663 default:
2664 return -EINVAL;
2665
2666 }
2667 return 0;
2668
2669 case NS_ADJBUFLEV:
2670 if (!capable(CAP_NET_ADMIN))
2671 return -EPERM;
2672 btype = (long)arg; /* a long is the same size as a pointer or bigger */
2673 switch (btype) {
2674 case NS_BUFTYPE_SMALL:
2675 while (card->sbfqc < card->sbnr.init) {
2676 struct sk_buff *sb;
2677
2678 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2679 if (sb == NULL)
2680 return -ENOMEM;
2681 NS_PRV_BUFTYPE(sb) = BUF_SM;
2682 skb_queue_tail(&card->sbpool.queue, sb);
2683 skb_reserve(sb, NS_AAL0_HEADER);
2684 push_rxbufs(card, sb);
2685 }
2686 break;
2687
2688 case NS_BUFTYPE_LARGE:
2689 while (card->lbfqc < card->lbnr.init) {
2690 struct sk_buff *lb;
2691
2692 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2693 if (lb == NULL)
2694 return -ENOMEM;
2695 NS_PRV_BUFTYPE(lb) = BUF_LG;
2696 skb_queue_tail(&card->lbpool.queue, lb);
2697 skb_reserve(lb, NS_SMBUFSIZE);
2698 push_rxbufs(card, lb);
2699 }
2700 break;
2701
2702 case NS_BUFTYPE_HUGE:
2703 while (card->hbpool.count > card->hbnr.init) {
2704 struct sk_buff *hb;
2705
2706 spin_lock_irqsave(&card->int_lock, flags);
2707 hb = skb_dequeue(&card->hbpool.queue);
2708 card->hbpool.count--;
2709 spin_unlock_irqrestore(&card->int_lock, flags);
2710 if (hb == NULL)
2711 printk
2712 ("nicstar%d: huge buffer count inconsistent.\n",
2713 card->index);
2714 else
2715 dev_kfree_skb_any(hb);
2716
2717 }
2718 while (card->hbpool.count < card->hbnr.init) {
2719 struct sk_buff *hb;
2720
2721 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2722 if (hb == NULL)
2723 return -ENOMEM;
2724 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2725 spin_lock_irqsave(&card->int_lock, flags);
2726 skb_queue_tail(&card->hbpool.queue, hb);
2727 card->hbpool.count++;
2728 spin_unlock_irqrestore(&card->int_lock, flags);
2729 }
2730 break;
2731
2732 case NS_BUFTYPE_IOVEC:
2733 while (card->iovpool.count > card->iovnr.init) {
2734 struct sk_buff *iovb;
2735
2736 spin_lock_irqsave(&card->int_lock, flags);
2737 iovb = skb_dequeue(&card->iovpool.queue);
2738 card->iovpool.count--;
2739 spin_unlock_irqrestore(&card->int_lock, flags);
2740 if (iovb == NULL)
2741 printk
2742 ("nicstar%d: iovec buffer count inconsistent.\n",
2743 card->index);
2744 else
2745 dev_kfree_skb_any(iovb);
2746
2747 }
2748 while (card->iovpool.count < card->iovnr.init) {
2749 struct sk_buff *iovb;
2750
2751 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2752 if (iovb == NULL)
2753 return -ENOMEM;
2754 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2755 spin_lock_irqsave(&card->int_lock, flags);
2756 skb_queue_tail(&card->iovpool.queue, iovb);
2757 card->iovpool.count++;
2758 spin_unlock_irqrestore(&card->int_lock, flags);
2759 }
2760 break;
2761
2762 default:
2763 return -EINVAL;
2764
2765 }
2766 return 0;
2767
2768 default:
2769 if (dev->phy && dev->phy->ioctl) {
2770 return dev->phy->ioctl(dev, cmd, arg);
2771 } else {
2772 printk("nicstar%d: %s == NULL \n", card->index,
2773 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2774 return -ENOIOCTLCMD;
2775 }
2776 }
2777 }
2778
2779 #ifdef EXTRA_DEBUG
2780 static void which_list(ns_dev * card, struct sk_buff *skb)
2781 {
2782 printk("skb buf_type: 0x%08x\n", NS_PRV_BUFTYPE(skb));
2783 }
2784 #endif /* EXTRA_DEBUG */
2785
2786 static void ns_poll(unsigned long arg)
2787 {
2788 int i;
2789 ns_dev *card;
2790 unsigned long flags;
2791 u32 stat_r, stat_w;
2792
2793 PRINTK("nicstar: Entering ns_poll().\n");
2794 for (i = 0; i < num_cards; i++) {
2795 card = cards[i];
2796 if (spin_is_locked(&card->int_lock)) {
2797 /* Probably it isn't worth spinning */
2798 continue;
2799 }
2800 spin_lock_irqsave(&card->int_lock, flags);
2801
2802 stat_w = 0;
2803 stat_r = readl(card->membase + STAT);
2804 if (stat_r & NS_STAT_TSIF)
2805 stat_w |= NS_STAT_TSIF;
2806 if (stat_r & NS_STAT_EOPDU)
2807 stat_w |= NS_STAT_EOPDU;
2808
2809 process_tsq(card);
2810 process_rsq(card);
2811
2812 writel(stat_w, card->membase + STAT);
2813 spin_unlock_irqrestore(&card->int_lock, flags);
2814 }
2815 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2816 PRINTK("nicstar: Leaving ns_poll().\n");
2817 }
2818
2819 static int ns_parse_mac(char *mac, unsigned char *esi)
2820 {
2821 int i, j;
2822 short byte1, byte0;
2823
2824 if (mac == NULL || esi == NULL)
2825 return -1;
2826 j = 0;
2827 for (i = 0; i < 6; i++) {
2828 if ((byte1 = ns_h2i(mac[j++])) < 0)
2829 return -1;
2830 if ((byte0 = ns_h2i(mac[j++])) < 0)
2831 return -1;
2832 esi[i] = (unsigned char)(byte1 * 16 + byte0);
2833 if (i < 5) {
2834 if (mac[j++] != ':')
2835 return -1;
2836 }
2837 }
2838 return 0;
2839 }
2840
2841 static short ns_h2i(char c)
2842 {
2843 if (c >= '0' && c <= '9')
2844 return (short)(c - '0');
2845 if (c >= 'A' && c <= 'F')
2846 return (short)(c - 'A' + 10);
2847 if (c >= 'a' && c <= 'f')
2848 return (short)(c - 'a' + 10);
2849 return -1;
2850 }
2851
2852 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
2853 unsigned long addr)
2854 {
2855 ns_dev *card;
2856 unsigned long flags;
2857
2858 card = dev->dev_data;
2859 spin_lock_irqsave(&card->res_lock, flags);
2860 while (CMD_BUSY(card)) ;
2861 writel((u32) value, card->membase + DR0);
2862 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2863 card->membase + CMD);
2864 spin_unlock_irqrestore(&card->res_lock, flags);
2865 }
2866
2867 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2868 {
2869 ns_dev *card;
2870 unsigned long flags;
2871 u32 data;
2872
2873 card = dev->dev_data;
2874 spin_lock_irqsave(&card->res_lock, flags);
2875 while (CMD_BUSY(card)) ;
2876 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
2877 card->membase + CMD);
2878 while (CMD_BUSY(card)) ;
2879 data = readl(card->membase + DR0) & 0x000000FF;
2880 spin_unlock_irqrestore(&card->res_lock, flags);
2881 return (unsigned char)data;
2882 }
2883
2884 module_init(nicstar_init);
2885 module_exit(nicstar_cleanup);
Linux kernel - Deliverables
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