drivers/base/regmap/regmap-irq.c

   1 /*
   2  * regmap based irq_chip
   3  *
   4  * Copyright 2011 Wolfson Microelectronics plc
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/export.h>
  14 #include <linux/device.h>
  15 #include <linux/regmap.h>
  16 #include <linux/irq.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/irqdomain.h>
  19 #include <linux/slab.h>
  20
  21 #include "internal.h"
  22
  23 struct regmap_irq_chip_data {
  24         struct mutex lock;
  25
  26         struct regmap *map;
  27         const struct regmap_irq_chip *chip;
  28
  29         int irq_base;
  30         struct irq_domain *domain;
  31
  32         int irq;
  33         int wake_count;
  34
  35         unsigned int *status_buf;
  36         unsigned int *mask_buf;
  37         unsigned int *mask_buf_def;
  38         unsigned int *wake_buf;
  39
  40         unsigned int irq_reg_stride;
  41 };
  42
  43 static inline const
  44 struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data,
  45                                      int irq)
  46 {
  47         return &data->chip->irqs[irq];
  48 }
  49
  50 static void regmap_irq_lock(struct irq_data *data)
  51 {
  52         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
  53
  54         mutex_lock(&d->lock);
  55 }
  56
  57 static void regmap_irq_sync_unlock(struct irq_data *data)
  58 {
  59         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
  60         struct regmap *map = d->map;
  61         int i, ret;
  62
  63         /*
  64          * If there's been a change in the mask write it back to the
  65          * hardware.  We rely on the use of the regmap core cache to
  66          * suppress pointless writes.
  67          */
  68         for (i = 0; i < d->chip->num_regs; i++) {
  69                 ret = regmap_update_bits(d->map, d->chip->mask_base +
  70                                                 (i * map->reg_stride *
  71                                                 d->irq_reg_stride),
  72                                          d->mask_buf_def[i], d->mask_buf[i]);
  73                 if (ret != 0)
  74                         dev_err(d->map->dev, "Failed to sync masks in %x\n",
  75                                 d->chip->mask_base + (i * map->reg_stride));
  76         }
  77
  78         /* If we've changed our wakeup count propagate it to the parent */
  79         if (d->wake_count < 0)
  80                 for (i = d->wake_count; i < 0; i++)
  81                         irq_set_irq_wake(d->irq, 0);
  82         else if (d->wake_count > 0)
  83                 for (i = 0; i < d->wake_count; i++)
  84                         irq_set_irq_wake(d->irq, 1);
  85
  86         d->wake_count = 0;
  87
  88         mutex_unlock(&d->lock);
  89 }
  90
  91 static void regmap_irq_enable(struct irq_data *data)
  92 {
  93         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
  94         struct regmap *map = d->map;
  95         const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
  96
  97         d->mask_buf[irq_data->reg_offset / map->reg_stride] &= ~irq_data->mask;
  98 }
  99
 100 static void regmap_irq_disable(struct irq_data *data)
 101 {
 102         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
 103         struct regmap *map = d->map;
 104         const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
 105
 106         d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask;
 107 }
 108
 109 static int regmap_irq_set_wake(struct irq_data *data, unsigned int on)
 110 {
 111         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
 112         struct regmap *map = d->map;
 113         const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
 114
 115         if (!d->chip->wake_base)
 116                 return -EINVAL;
 117
 118         if (on) {
 119                 d->wake_buf[irq_data->reg_offset / map->reg_stride]
 120                         &= ~irq_data->mask;
 121                 d->wake_count++;
 122         } else {
 123                 d->wake_buf[irq_data->reg_offset / map->reg_stride]
 124                         |= irq_data->mask;
 125                 d->wake_count--;
 126         }
 127
 128         return 0;
 129 }
 130
 131 static struct irq_chip regmap_irq_chip = {
 132         .name                   = "regmap",
 133         .irq_bus_lock           = regmap_irq_lock,
 134         .irq_bus_sync_unlock    = regmap_irq_sync_unlock,
 135         .irq_disable            = regmap_irq_disable,
 136         .irq_enable             = regmap_irq_enable,
 137         .irq_set_wake           = regmap_irq_set_wake,
 138 };
 139
 140 static irqreturn_t regmap_irq_thread(int irq, void *d)
 141 {
 142         struct regmap_irq_chip_data *data = d;
 143         const struct regmap_irq_chip *chip = data->chip;
 144         struct regmap *map = data->map;
 145         int ret, i;
 146         bool handled = false;
 147
 148         /*
 149          * Ignore masked IRQs and ack if we need to; we ack early so
 150          * there is no race between handling and acknowleding the
 151          * interrupt.  We assume that typically few of the interrupts
 152          * will fire simultaneously so don't worry about overhead from
 153          * doing a write per register.
 154          */
 155         for (i = 0; i < data->chip->num_regs; i++) {
 156                 ret = regmap_read(map, chip->status_base + (i * map->reg_stride
 157                                    * data->irq_reg_stride),
 158                                    &data->status_buf[i]);
 159
 160                 if (ret != 0) {
 161                         dev_err(map->dev, "Failed to read IRQ status: %d\n",
 162                                         ret);
 163                         return IRQ_NONE;
 164                 }
 165
 166                 data->status_buf[i] &= ~data->mask_buf[i];
 167
 168                 if (data->status_buf[i] && chip->ack_base) {
 169                         ret = regmap_write(map, chip->ack_base +
 170                                                 (i * map->reg_stride *
 171                                                 data->irq_reg_stride),
 172                                            data->status_buf[i]);
 173                         if (ret != 0)
 174                                 dev_err(map->dev, "Failed to ack 0x%x: %d\n",
 175                                         chip->ack_base + (i * map->reg_stride),
 176                                         ret);
 177                 }
 178         }
 179
 180         for (i = 0; i < chip->num_irqs; i++) {
 181                 if (data->status_buf[chip->irqs[i].reg_offset /
 182                                      map->reg_stride] & chip->irqs[i].mask) {
 183                         handle_nested_irq(irq_find_mapping(data->domain, i));
 184                         handled = true;
 185                 }
 186         }
 187
 188         if (handled)
 189                 return IRQ_HANDLED;
 190         else
 191                 return IRQ_NONE;
 192 }
 193
 194 static int regmap_irq_map(struct irq_domain *h, unsigned int virq,
 195                           irq_hw_number_t hw)
 196 {
 197         struct regmap_irq_chip_data *data = h->host_data;
 198
 199         irq_set_chip_data(virq, data);
 200         irq_set_chip_and_handler(virq, &regmap_irq_chip, handle_edge_irq);
 201         irq_set_nested_thread(virq, 1);
 202
 203         /* ARM needs us to explicitly flag the IRQ as valid
 204          * and will set them noprobe when we do so. */
 205 #ifdef CONFIG_ARM
 206         set_irq_flags(virq, IRQF_VALID);
 207 #else
 208         irq_set_noprobe(virq);
 209 #endif
 210
 211         return 0;
 212 }
 213
 214 static struct irq_domain_ops regmap_domain_ops = {
 215         .map    = regmap_irq_map,
 216         .xlate  = irq_domain_xlate_twocell,
 217 };
 218
 219 /**
 220  * regmap_add_irq_chip(): Use standard regmap IRQ controller handling
 221  *
 222  * map:       The regmap for the device.
 223  * irq:       The IRQ the device uses to signal interrupts
 224  * irq_flags: The IRQF_ flags to use for the primary interrupt.
 225  * chip:      Configuration for the interrupt controller.
 226  * data:      Runtime data structure for the controller, allocated on success
 227  *
 228  * Returns 0 on success or an errno on failure.
 229  *
 230  * In order for this to be efficient the chip really should use a
 231  * register cache.  The chip driver is responsible for restoring the
 232  * register values used by the IRQ controller over suspend and resume.
 233  */
 234 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
 235                         int irq_base, const struct regmap_irq_chip *chip,
 236                         struct regmap_irq_chip_data **data)
 237 {
 238         struct regmap_irq_chip_data *d;
 239         int i;
 240         int ret = -ENOMEM;
 241
 242         for (i = 0; i < chip->num_irqs; i++) {
 243                 if (chip->irqs[i].reg_offset % map->reg_stride)
 244                         return -EINVAL;
 245                 if (chip->irqs[i].reg_offset / map->reg_stride >=
 246                     chip->num_regs)
 247                         return -EINVAL;
 248         }
 249
 250         if (irq_base) {
 251                 irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0);
 252                 if (irq_base < 0) {
 253                         dev_warn(map->dev, "Failed to allocate IRQs: %d\n",
 254                                  irq_base);
 255                         return irq_base;
 256                 }
 257         }
 258
 259         d = kzalloc(sizeof(*d), GFP_KERNEL);
 260         if (!d)
 261                 return -ENOMEM;
 262
 263         *data = d;
 264
 265         d->status_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
 266                                 GFP_KERNEL);
 267         if (!d->status_buf)
 268                 goto err_alloc;
 269
 270         d->mask_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
 271                               GFP_KERNEL);
 272         if (!d->mask_buf)
 273                 goto err_alloc;
 274
 275         d->mask_buf_def = kzalloc(sizeof(unsigned int) * chip->num_regs,
 276                                   GFP_KERNEL);
 277         if (!d->mask_buf_def)
 278                 goto err_alloc;
 279
 280         if (chip->wake_base) {
 281                 d->wake_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
 282                                       GFP_KERNEL);
 283                 if (!d->wake_buf)
 284                         goto err_alloc;
 285         }
 286
 287         d->irq = irq;
 288         d->map = map;
 289         d->chip = chip;
 290         d->irq_base = irq_base;
 291
 292         if (chip->irq_reg_stride)
 293                 d->irq_reg_stride = chip->irq_reg_stride;
 294         else
 295                 d->irq_reg_stride = 1;
 296
 297         mutex_init(&d->lock);
 298
 299         for (i = 0; i < chip->num_irqs; i++)
 300                 d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride]
 301                         |= chip->irqs[i].mask;
 302
 303         /* Mask all the interrupts by default */
 304         for (i = 0; i < chip->num_regs; i++) {
 305                 d->mask_buf[i] = d->mask_buf_def[i];
 306                 ret = regmap_write(map, chip->mask_base + (i * map->reg_stride
 307                                    * d->irq_reg_stride),
 308                                    d->mask_buf[i]);
 309                 if (ret != 0) {
 310                         dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
 311                                 chip->mask_base + (i * map->reg_stride), ret);
 312                         goto err_alloc;
 313                 }
 314         }
 315
 316         if (irq_base)
 317                 d->domain = irq_domain_add_legacy(map->dev->of_node,
 318                                                   chip->num_irqs, irq_base, 0,
 319                                                   &regmap_domain_ops, d);
 320         else
 321                 d->domain = irq_domain_add_linear(map->dev->of_node,
 322                                                   chip->num_irqs,
 323                                                   &regmap_domain_ops, d);
 324         if (!d->domain) {
 325                 dev_err(map->dev, "Failed to create IRQ domain\n");
 326                 ret = -ENOMEM;
 327                 goto err_alloc;
 328         }
 329
 330         ret = request_threaded_irq(irq, NULL, regmap_irq_thread, irq_flags,
 331                                    chip->name, d);
 332         if (ret != 0) {
 333                 dev_err(map->dev, "Failed to request IRQ %d: %d\n", irq, ret);
 334                 goto err_domain;
 335         }
 336
 337         return 0;
 338
 339 err_domain:
 340         /* Should really dispose of the domain but... */
 341 err_alloc:
 342         kfree(d->wake_buf);
 343         kfree(d->mask_buf_def);
 344         kfree(d->mask_buf);
 345         kfree(d->status_buf);
 346         kfree(d);
 347         return ret;
 348 }
 349 EXPORT_SYMBOL_GPL(regmap_add_irq_chip);
 350
 351 /**
 352  * regmap_del_irq_chip(): Stop interrupt handling for a regmap IRQ chip
 353  *
 354  * @irq: Primary IRQ for the device
 355  * @d:   regmap_irq_chip_data allocated by regmap_add_irq_chip()
 356  */
 357 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
 358 {
 359         if (!d)
 360                 return;
 361
 362         free_irq(irq, d);
 363         /* We should unmap the domain but... */
 364         kfree(d->wake_buf);
 365         kfree(d->mask_buf_def);
 366         kfree(d->mask_buf);
 367         kfree(d->status_buf);
 368         kfree(d);
 369 }
 370 EXPORT_SYMBOL_GPL(regmap_del_irq_chip);
 371
 372 /**
 373  * regmap_irq_chip_get_base(): Retrieve interrupt base for a regmap IRQ chip
 374  *
 375  * Useful for drivers to request their own IRQs.
 376  *
 377  * @data: regmap_irq controller to operate on.
 378  */
 379 int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data)
 380 {
 381         WARN_ON(!data->irq_base);
 382         return data->irq_base;
 383 }
 384 EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base);
 385
 386 /**
 387  * regmap_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ
 388  *
 389  * Useful for drivers to request their own IRQs.
 390  *
 391  * @data: regmap_irq controller to operate on.
 392  * @irq: index of the interrupt requested in the chip IRQs
 393  */
 394 int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq)
 395 {
 396         /* Handle holes in the IRQ list */
 397         if (!data->chip->irqs[irq].mask)
 398                 return -EINVAL;
 399
 400         return irq_create_mapping(data->domain, irq);
 401 }
 402 EXPORT_SYMBOL_GPL(regmap_irq_get_virq);