Merge remote-tracking branches 'regmap/topic/devm-irq', 'regmap/topic/doc', 'regmap...
[deliverable/linux.git] / drivers / base / regmap / regmap.c
1 /*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/device.h>
14 #include <linux/slab.h>
15 #include <linux/export.h>
16 #include <linux/mutex.h>
17 #include <linux/err.h>
18 #include <linux/of.h>
19 #include <linux/rbtree.h>
20 #include <linux/sched.h>
21 #include <linux/delay.h>
22 #include <linux/log2.h>
23
24 #define CREATE_TRACE_POINTS
25 #include "trace.h"
26
27 #include "internal.h"
28
29 /*
30 * Sometimes for failures during very early init the trace
31 * infrastructure isn't available early enough to be used. For this
32 * sort of problem defining LOG_DEVICE will add printks for basic
33 * register I/O on a specific device.
34 */
35 #undef LOG_DEVICE
36
37 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
38 unsigned int mask, unsigned int val,
39 bool *change, bool force_write);
40
41 static int _regmap_bus_reg_read(void *context, unsigned int reg,
42 unsigned int *val);
43 static int _regmap_bus_read(void *context, unsigned int reg,
44 unsigned int *val);
45 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
46 unsigned int val);
47 static int _regmap_bus_reg_write(void *context, unsigned int reg,
48 unsigned int val);
49 static int _regmap_bus_raw_write(void *context, unsigned int reg,
50 unsigned int val);
51
52 bool regmap_reg_in_ranges(unsigned int reg,
53 const struct regmap_range *ranges,
54 unsigned int nranges)
55 {
56 const struct regmap_range *r;
57 int i;
58
59 for (i = 0, r = ranges; i < nranges; i++, r++)
60 if (regmap_reg_in_range(reg, r))
61 return true;
62 return false;
63 }
64 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
65
66 bool regmap_check_range_table(struct regmap *map, unsigned int reg,
67 const struct regmap_access_table *table)
68 {
69 /* Check "no ranges" first */
70 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
71 return false;
72
73 /* In case zero "yes ranges" are supplied, any reg is OK */
74 if (!table->n_yes_ranges)
75 return true;
76
77 return regmap_reg_in_ranges(reg, table->yes_ranges,
78 table->n_yes_ranges);
79 }
80 EXPORT_SYMBOL_GPL(regmap_check_range_table);
81
82 bool regmap_writeable(struct regmap *map, unsigned int reg)
83 {
84 if (map->max_register && reg > map->max_register)
85 return false;
86
87 if (map->writeable_reg)
88 return map->writeable_reg(map->dev, reg);
89
90 if (map->wr_table)
91 return regmap_check_range_table(map, reg, map->wr_table);
92
93 return true;
94 }
95
96 bool regmap_readable(struct regmap *map, unsigned int reg)
97 {
98 if (!map->reg_read)
99 return false;
100
101 if (map->max_register && reg > map->max_register)
102 return false;
103
104 if (map->format.format_write)
105 return false;
106
107 if (map->readable_reg)
108 return map->readable_reg(map->dev, reg);
109
110 if (map->rd_table)
111 return regmap_check_range_table(map, reg, map->rd_table);
112
113 return true;
114 }
115
116 bool regmap_volatile(struct regmap *map, unsigned int reg)
117 {
118 if (!map->format.format_write && !regmap_readable(map, reg))
119 return false;
120
121 if (map->volatile_reg)
122 return map->volatile_reg(map->dev, reg);
123
124 if (map->volatile_table)
125 return regmap_check_range_table(map, reg, map->volatile_table);
126
127 if (map->cache_ops)
128 return false;
129 else
130 return true;
131 }
132
133 bool regmap_precious(struct regmap *map, unsigned int reg)
134 {
135 if (!regmap_readable(map, reg))
136 return false;
137
138 if (map->precious_reg)
139 return map->precious_reg(map->dev, reg);
140
141 if (map->precious_table)
142 return regmap_check_range_table(map, reg, map->precious_table);
143
144 return false;
145 }
146
147 static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
148 size_t num)
149 {
150 unsigned int i;
151
152 for (i = 0; i < num; i++)
153 if (!regmap_volatile(map, reg + i))
154 return false;
155
156 return true;
157 }
158
159 static void regmap_format_2_6_write(struct regmap *map,
160 unsigned int reg, unsigned int val)
161 {
162 u8 *out = map->work_buf;
163
164 *out = (reg << 6) | val;
165 }
166
167 static void regmap_format_4_12_write(struct regmap *map,
168 unsigned int reg, unsigned int val)
169 {
170 __be16 *out = map->work_buf;
171 *out = cpu_to_be16((reg << 12) | val);
172 }
173
174 static void regmap_format_7_9_write(struct regmap *map,
175 unsigned int reg, unsigned int val)
176 {
177 __be16 *out = map->work_buf;
178 *out = cpu_to_be16((reg << 9) | val);
179 }
180
181 static void regmap_format_10_14_write(struct regmap *map,
182 unsigned int reg, unsigned int val)
183 {
184 u8 *out = map->work_buf;
185
186 out[2] = val;
187 out[1] = (val >> 8) | (reg << 6);
188 out[0] = reg >> 2;
189 }
190
191 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
192 {
193 u8 *b = buf;
194
195 b[0] = val << shift;
196 }
197
198 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
199 {
200 __be16 *b = buf;
201
202 b[0] = cpu_to_be16(val << shift);
203 }
204
205 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
206 {
207 __le16 *b = buf;
208
209 b[0] = cpu_to_le16(val << shift);
210 }
211
212 static void regmap_format_16_native(void *buf, unsigned int val,
213 unsigned int shift)
214 {
215 *(u16 *)buf = val << shift;
216 }
217
218 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
219 {
220 u8 *b = buf;
221
222 val <<= shift;
223
224 b[0] = val >> 16;
225 b[1] = val >> 8;
226 b[2] = val;
227 }
228
229 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
230 {
231 __be32 *b = buf;
232
233 b[0] = cpu_to_be32(val << shift);
234 }
235
236 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
237 {
238 __le32 *b = buf;
239
240 b[0] = cpu_to_le32(val << shift);
241 }
242
243 static void regmap_format_32_native(void *buf, unsigned int val,
244 unsigned int shift)
245 {
246 *(u32 *)buf = val << shift;
247 }
248
249 #ifdef CONFIG_64BIT
250 static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
251 {
252 __be64 *b = buf;
253
254 b[0] = cpu_to_be64((u64)val << shift);
255 }
256
257 static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
258 {
259 __le64 *b = buf;
260
261 b[0] = cpu_to_le64((u64)val << shift);
262 }
263
264 static void regmap_format_64_native(void *buf, unsigned int val,
265 unsigned int shift)
266 {
267 *(u64 *)buf = (u64)val << shift;
268 }
269 #endif
270
271 static void regmap_parse_inplace_noop(void *buf)
272 {
273 }
274
275 static unsigned int regmap_parse_8(const void *buf)
276 {
277 const u8 *b = buf;
278
279 return b[0];
280 }
281
282 static unsigned int regmap_parse_16_be(const void *buf)
283 {
284 const __be16 *b = buf;
285
286 return be16_to_cpu(b[0]);
287 }
288
289 static unsigned int regmap_parse_16_le(const void *buf)
290 {
291 const __le16 *b = buf;
292
293 return le16_to_cpu(b[0]);
294 }
295
296 static void regmap_parse_16_be_inplace(void *buf)
297 {
298 __be16 *b = buf;
299
300 b[0] = be16_to_cpu(b[0]);
301 }
302
303 static void regmap_parse_16_le_inplace(void *buf)
304 {
305 __le16 *b = buf;
306
307 b[0] = le16_to_cpu(b[0]);
308 }
309
310 static unsigned int regmap_parse_16_native(const void *buf)
311 {
312 return *(u16 *)buf;
313 }
314
315 static unsigned int regmap_parse_24(const void *buf)
316 {
317 const u8 *b = buf;
318 unsigned int ret = b[2];
319 ret |= ((unsigned int)b[1]) << 8;
320 ret |= ((unsigned int)b[0]) << 16;
321
322 return ret;
323 }
324
325 static unsigned int regmap_parse_32_be(const void *buf)
326 {
327 const __be32 *b = buf;
328
329 return be32_to_cpu(b[0]);
330 }
331
332 static unsigned int regmap_parse_32_le(const void *buf)
333 {
334 const __le32 *b = buf;
335
336 return le32_to_cpu(b[0]);
337 }
338
339 static void regmap_parse_32_be_inplace(void *buf)
340 {
341 __be32 *b = buf;
342
343 b[0] = be32_to_cpu(b[0]);
344 }
345
346 static void regmap_parse_32_le_inplace(void *buf)
347 {
348 __le32 *b = buf;
349
350 b[0] = le32_to_cpu(b[0]);
351 }
352
353 static unsigned int regmap_parse_32_native(const void *buf)
354 {
355 return *(u32 *)buf;
356 }
357
358 #ifdef CONFIG_64BIT
359 static unsigned int regmap_parse_64_be(const void *buf)
360 {
361 const __be64 *b = buf;
362
363 return be64_to_cpu(b[0]);
364 }
365
366 static unsigned int regmap_parse_64_le(const void *buf)
367 {
368 const __le64 *b = buf;
369
370 return le64_to_cpu(b[0]);
371 }
372
373 static void regmap_parse_64_be_inplace(void *buf)
374 {
375 __be64 *b = buf;
376
377 b[0] = be64_to_cpu(b[0]);
378 }
379
380 static void regmap_parse_64_le_inplace(void *buf)
381 {
382 __le64 *b = buf;
383
384 b[0] = le64_to_cpu(b[0]);
385 }
386
387 static unsigned int regmap_parse_64_native(const void *buf)
388 {
389 return *(u64 *)buf;
390 }
391 #endif
392
393 static void regmap_lock_mutex(void *__map)
394 {
395 struct regmap *map = __map;
396 mutex_lock(&map->mutex);
397 }
398
399 static void regmap_unlock_mutex(void *__map)
400 {
401 struct regmap *map = __map;
402 mutex_unlock(&map->mutex);
403 }
404
405 static void regmap_lock_spinlock(void *__map)
406 __acquires(&map->spinlock)
407 {
408 struct regmap *map = __map;
409 unsigned long flags;
410
411 spin_lock_irqsave(&map->spinlock, flags);
412 map->spinlock_flags = flags;
413 }
414
415 static void regmap_unlock_spinlock(void *__map)
416 __releases(&map->spinlock)
417 {
418 struct regmap *map = __map;
419 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
420 }
421
422 static void dev_get_regmap_release(struct device *dev, void *res)
423 {
424 /*
425 * We don't actually have anything to do here; the goal here
426 * is not to manage the regmap but to provide a simple way to
427 * get the regmap back given a struct device.
428 */
429 }
430
431 static bool _regmap_range_add(struct regmap *map,
432 struct regmap_range_node *data)
433 {
434 struct rb_root *root = &map->range_tree;
435 struct rb_node **new = &(root->rb_node), *parent = NULL;
436
437 while (*new) {
438 struct regmap_range_node *this =
439 container_of(*new, struct regmap_range_node, node);
440
441 parent = *new;
442 if (data->range_max < this->range_min)
443 new = &((*new)->rb_left);
444 else if (data->range_min > this->range_max)
445 new = &((*new)->rb_right);
446 else
447 return false;
448 }
449
450 rb_link_node(&data->node, parent, new);
451 rb_insert_color(&data->node, root);
452
453 return true;
454 }
455
456 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
457 unsigned int reg)
458 {
459 struct rb_node *node = map->range_tree.rb_node;
460
461 while (node) {
462 struct regmap_range_node *this =
463 container_of(node, struct regmap_range_node, node);
464
465 if (reg < this->range_min)
466 node = node->rb_left;
467 else if (reg > this->range_max)
468 node = node->rb_right;
469 else
470 return this;
471 }
472
473 return NULL;
474 }
475
476 static void regmap_range_exit(struct regmap *map)
477 {
478 struct rb_node *next;
479 struct regmap_range_node *range_node;
480
481 next = rb_first(&map->range_tree);
482 while (next) {
483 range_node = rb_entry(next, struct regmap_range_node, node);
484 next = rb_next(&range_node->node);
485 rb_erase(&range_node->node, &map->range_tree);
486 kfree(range_node);
487 }
488
489 kfree(map->selector_work_buf);
490 }
491
492 int regmap_attach_dev(struct device *dev, struct regmap *map,
493 const struct regmap_config *config)
494 {
495 struct regmap **m;
496
497 map->dev = dev;
498
499 regmap_debugfs_init(map, config->name);
500
501 /* Add a devres resource for dev_get_regmap() */
502 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
503 if (!m) {
504 regmap_debugfs_exit(map);
505 return -ENOMEM;
506 }
507 *m = map;
508 devres_add(dev, m);
509
510 return 0;
511 }
512 EXPORT_SYMBOL_GPL(regmap_attach_dev);
513
514 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
515 const struct regmap_config *config)
516 {
517 enum regmap_endian endian;
518
519 /* Retrieve the endianness specification from the regmap config */
520 endian = config->reg_format_endian;
521
522 /* If the regmap config specified a non-default value, use that */
523 if (endian != REGMAP_ENDIAN_DEFAULT)
524 return endian;
525
526 /* Retrieve the endianness specification from the bus config */
527 if (bus && bus->reg_format_endian_default)
528 endian = bus->reg_format_endian_default;
529
530 /* If the bus specified a non-default value, use that */
531 if (endian != REGMAP_ENDIAN_DEFAULT)
532 return endian;
533
534 /* Use this if no other value was found */
535 return REGMAP_ENDIAN_BIG;
536 }
537
538 enum regmap_endian regmap_get_val_endian(struct device *dev,
539 const struct regmap_bus *bus,
540 const struct regmap_config *config)
541 {
542 struct device_node *np;
543 enum regmap_endian endian;
544
545 /* Retrieve the endianness specification from the regmap config */
546 endian = config->val_format_endian;
547
548 /* If the regmap config specified a non-default value, use that */
549 if (endian != REGMAP_ENDIAN_DEFAULT)
550 return endian;
551
552 /* If the dev and dev->of_node exist try to get endianness from DT */
553 if (dev && dev->of_node) {
554 np = dev->of_node;
555
556 /* Parse the device's DT node for an endianness specification */
557 if (of_property_read_bool(np, "big-endian"))
558 endian = REGMAP_ENDIAN_BIG;
559 else if (of_property_read_bool(np, "little-endian"))
560 endian = REGMAP_ENDIAN_LITTLE;
561 else if (of_property_read_bool(np, "native-endian"))
562 endian = REGMAP_ENDIAN_NATIVE;
563
564 /* If the endianness was specified in DT, use that */
565 if (endian != REGMAP_ENDIAN_DEFAULT)
566 return endian;
567 }
568
569 /* Retrieve the endianness specification from the bus config */
570 if (bus && bus->val_format_endian_default)
571 endian = bus->val_format_endian_default;
572
573 /* If the bus specified a non-default value, use that */
574 if (endian != REGMAP_ENDIAN_DEFAULT)
575 return endian;
576
577 /* Use this if no other value was found */
578 return REGMAP_ENDIAN_BIG;
579 }
580 EXPORT_SYMBOL_GPL(regmap_get_val_endian);
581
582 struct regmap *__regmap_init(struct device *dev,
583 const struct regmap_bus *bus,
584 void *bus_context,
585 const struct regmap_config *config,
586 struct lock_class_key *lock_key,
587 const char *lock_name)
588 {
589 struct regmap *map;
590 int ret = -EINVAL;
591 enum regmap_endian reg_endian, val_endian;
592 int i, j;
593
594 if (!config)
595 goto err;
596
597 map = kzalloc(sizeof(*map), GFP_KERNEL);
598 if (map == NULL) {
599 ret = -ENOMEM;
600 goto err;
601 }
602
603 if (config->lock && config->unlock) {
604 map->lock = config->lock;
605 map->unlock = config->unlock;
606 map->lock_arg = config->lock_arg;
607 } else {
608 if ((bus && bus->fast_io) ||
609 config->fast_io) {
610 spin_lock_init(&map->spinlock);
611 map->lock = regmap_lock_spinlock;
612 map->unlock = regmap_unlock_spinlock;
613 lockdep_set_class_and_name(&map->spinlock,
614 lock_key, lock_name);
615 } else {
616 mutex_init(&map->mutex);
617 map->lock = regmap_lock_mutex;
618 map->unlock = regmap_unlock_mutex;
619 lockdep_set_class_and_name(&map->mutex,
620 lock_key, lock_name);
621 }
622 map->lock_arg = map;
623 }
624
625 /*
626 * When we write in fast-paths with regmap_bulk_write() don't allocate
627 * scratch buffers with sleeping allocations.
628 */
629 if ((bus && bus->fast_io) || config->fast_io)
630 map->alloc_flags = GFP_ATOMIC;
631 else
632 map->alloc_flags = GFP_KERNEL;
633
634 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
635 map->format.pad_bytes = config->pad_bits / 8;
636 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
637 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
638 config->val_bits + config->pad_bits, 8);
639 map->reg_shift = config->pad_bits % 8;
640 if (config->reg_stride)
641 map->reg_stride = config->reg_stride;
642 else
643 map->reg_stride = 1;
644 if (is_power_of_2(map->reg_stride))
645 map->reg_stride_order = ilog2(map->reg_stride);
646 else
647 map->reg_stride_order = -1;
648 map->use_single_read = config->use_single_rw || !bus || !bus->read;
649 map->use_single_write = config->use_single_rw || !bus || !bus->write;
650 map->can_multi_write = config->can_multi_write && bus && bus->write;
651 if (bus) {
652 map->max_raw_read = bus->max_raw_read;
653 map->max_raw_write = bus->max_raw_write;
654 }
655 map->dev = dev;
656 map->bus = bus;
657 map->bus_context = bus_context;
658 map->max_register = config->max_register;
659 map->wr_table = config->wr_table;
660 map->rd_table = config->rd_table;
661 map->volatile_table = config->volatile_table;
662 map->precious_table = config->precious_table;
663 map->writeable_reg = config->writeable_reg;
664 map->readable_reg = config->readable_reg;
665 map->volatile_reg = config->volatile_reg;
666 map->precious_reg = config->precious_reg;
667 map->cache_type = config->cache_type;
668 map->name = config->name;
669
670 spin_lock_init(&map->async_lock);
671 INIT_LIST_HEAD(&map->async_list);
672 INIT_LIST_HEAD(&map->async_free);
673 init_waitqueue_head(&map->async_waitq);
674
675 if (config->read_flag_mask || config->write_flag_mask) {
676 map->read_flag_mask = config->read_flag_mask;
677 map->write_flag_mask = config->write_flag_mask;
678 } else if (bus) {
679 map->read_flag_mask = bus->read_flag_mask;
680 }
681
682 if (!bus) {
683 map->reg_read = config->reg_read;
684 map->reg_write = config->reg_write;
685
686 map->defer_caching = false;
687 goto skip_format_initialization;
688 } else if (!bus->read || !bus->write) {
689 map->reg_read = _regmap_bus_reg_read;
690 map->reg_write = _regmap_bus_reg_write;
691
692 map->defer_caching = false;
693 goto skip_format_initialization;
694 } else {
695 map->reg_read = _regmap_bus_read;
696 map->reg_update_bits = bus->reg_update_bits;
697 }
698
699 reg_endian = regmap_get_reg_endian(bus, config);
700 val_endian = regmap_get_val_endian(dev, bus, config);
701
702 switch (config->reg_bits + map->reg_shift) {
703 case 2:
704 switch (config->val_bits) {
705 case 6:
706 map->format.format_write = regmap_format_2_6_write;
707 break;
708 default:
709 goto err_map;
710 }
711 break;
712
713 case 4:
714 switch (config->val_bits) {
715 case 12:
716 map->format.format_write = regmap_format_4_12_write;
717 break;
718 default:
719 goto err_map;
720 }
721 break;
722
723 case 7:
724 switch (config->val_bits) {
725 case 9:
726 map->format.format_write = regmap_format_7_9_write;
727 break;
728 default:
729 goto err_map;
730 }
731 break;
732
733 case 10:
734 switch (config->val_bits) {
735 case 14:
736 map->format.format_write = regmap_format_10_14_write;
737 break;
738 default:
739 goto err_map;
740 }
741 break;
742
743 case 8:
744 map->format.format_reg = regmap_format_8;
745 break;
746
747 case 16:
748 switch (reg_endian) {
749 case REGMAP_ENDIAN_BIG:
750 map->format.format_reg = regmap_format_16_be;
751 break;
752 case REGMAP_ENDIAN_NATIVE:
753 map->format.format_reg = regmap_format_16_native;
754 break;
755 default:
756 goto err_map;
757 }
758 break;
759
760 case 24:
761 if (reg_endian != REGMAP_ENDIAN_BIG)
762 goto err_map;
763 map->format.format_reg = regmap_format_24;
764 break;
765
766 case 32:
767 switch (reg_endian) {
768 case REGMAP_ENDIAN_BIG:
769 map->format.format_reg = regmap_format_32_be;
770 break;
771 case REGMAP_ENDIAN_NATIVE:
772 map->format.format_reg = regmap_format_32_native;
773 break;
774 default:
775 goto err_map;
776 }
777 break;
778
779 #ifdef CONFIG_64BIT
780 case 64:
781 switch (reg_endian) {
782 case REGMAP_ENDIAN_BIG:
783 map->format.format_reg = regmap_format_64_be;
784 break;
785 case REGMAP_ENDIAN_NATIVE:
786 map->format.format_reg = regmap_format_64_native;
787 break;
788 default:
789 goto err_map;
790 }
791 break;
792 #endif
793
794 default:
795 goto err_map;
796 }
797
798 if (val_endian == REGMAP_ENDIAN_NATIVE)
799 map->format.parse_inplace = regmap_parse_inplace_noop;
800
801 switch (config->val_bits) {
802 case 8:
803 map->format.format_val = regmap_format_8;
804 map->format.parse_val = regmap_parse_8;
805 map->format.parse_inplace = regmap_parse_inplace_noop;
806 break;
807 case 16:
808 switch (val_endian) {
809 case REGMAP_ENDIAN_BIG:
810 map->format.format_val = regmap_format_16_be;
811 map->format.parse_val = regmap_parse_16_be;
812 map->format.parse_inplace = regmap_parse_16_be_inplace;
813 break;
814 case REGMAP_ENDIAN_LITTLE:
815 map->format.format_val = regmap_format_16_le;
816 map->format.parse_val = regmap_parse_16_le;
817 map->format.parse_inplace = regmap_parse_16_le_inplace;
818 break;
819 case REGMAP_ENDIAN_NATIVE:
820 map->format.format_val = regmap_format_16_native;
821 map->format.parse_val = regmap_parse_16_native;
822 break;
823 default:
824 goto err_map;
825 }
826 break;
827 case 24:
828 if (val_endian != REGMAP_ENDIAN_BIG)
829 goto err_map;
830 map->format.format_val = regmap_format_24;
831 map->format.parse_val = regmap_parse_24;
832 break;
833 case 32:
834 switch (val_endian) {
835 case REGMAP_ENDIAN_BIG:
836 map->format.format_val = regmap_format_32_be;
837 map->format.parse_val = regmap_parse_32_be;
838 map->format.parse_inplace = regmap_parse_32_be_inplace;
839 break;
840 case REGMAP_ENDIAN_LITTLE:
841 map->format.format_val = regmap_format_32_le;
842 map->format.parse_val = regmap_parse_32_le;
843 map->format.parse_inplace = regmap_parse_32_le_inplace;
844 break;
845 case REGMAP_ENDIAN_NATIVE:
846 map->format.format_val = regmap_format_32_native;
847 map->format.parse_val = regmap_parse_32_native;
848 break;
849 default:
850 goto err_map;
851 }
852 break;
853 #ifdef CONFIG_64BIT
854 case 64:
855 switch (val_endian) {
856 case REGMAP_ENDIAN_BIG:
857 map->format.format_val = regmap_format_64_be;
858 map->format.parse_val = regmap_parse_64_be;
859 map->format.parse_inplace = regmap_parse_64_be_inplace;
860 break;
861 case REGMAP_ENDIAN_LITTLE:
862 map->format.format_val = regmap_format_64_le;
863 map->format.parse_val = regmap_parse_64_le;
864 map->format.parse_inplace = regmap_parse_64_le_inplace;
865 break;
866 case REGMAP_ENDIAN_NATIVE:
867 map->format.format_val = regmap_format_64_native;
868 map->format.parse_val = regmap_parse_64_native;
869 break;
870 default:
871 goto err_map;
872 }
873 break;
874 #endif
875 }
876
877 if (map->format.format_write) {
878 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
879 (val_endian != REGMAP_ENDIAN_BIG))
880 goto err_map;
881 map->use_single_write = true;
882 }
883
884 if (!map->format.format_write &&
885 !(map->format.format_reg && map->format.format_val))
886 goto err_map;
887
888 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
889 if (map->work_buf == NULL) {
890 ret = -ENOMEM;
891 goto err_map;
892 }
893
894 if (map->format.format_write) {
895 map->defer_caching = false;
896 map->reg_write = _regmap_bus_formatted_write;
897 } else if (map->format.format_val) {
898 map->defer_caching = true;
899 map->reg_write = _regmap_bus_raw_write;
900 }
901
902 skip_format_initialization:
903
904 map->range_tree = RB_ROOT;
905 for (i = 0; i < config->num_ranges; i++) {
906 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
907 struct regmap_range_node *new;
908
909 /* Sanity check */
910 if (range_cfg->range_max < range_cfg->range_min) {
911 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
912 range_cfg->range_max, range_cfg->range_min);
913 goto err_range;
914 }
915
916 if (range_cfg->range_max > map->max_register) {
917 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
918 range_cfg->range_max, map->max_register);
919 goto err_range;
920 }
921
922 if (range_cfg->selector_reg > map->max_register) {
923 dev_err(map->dev,
924 "Invalid range %d: selector out of map\n", i);
925 goto err_range;
926 }
927
928 if (range_cfg->window_len == 0) {
929 dev_err(map->dev, "Invalid range %d: window_len 0\n",
930 i);
931 goto err_range;
932 }
933
934 /* Make sure, that this register range has no selector
935 or data window within its boundary */
936 for (j = 0; j < config->num_ranges; j++) {
937 unsigned sel_reg = config->ranges[j].selector_reg;
938 unsigned win_min = config->ranges[j].window_start;
939 unsigned win_max = win_min +
940 config->ranges[j].window_len - 1;
941
942 /* Allow data window inside its own virtual range */
943 if (j == i)
944 continue;
945
946 if (range_cfg->range_min <= sel_reg &&
947 sel_reg <= range_cfg->range_max) {
948 dev_err(map->dev,
949 "Range %d: selector for %d in window\n",
950 i, j);
951 goto err_range;
952 }
953
954 if (!(win_max < range_cfg->range_min ||
955 win_min > range_cfg->range_max)) {
956 dev_err(map->dev,
957 "Range %d: window for %d in window\n",
958 i, j);
959 goto err_range;
960 }
961 }
962
963 new = kzalloc(sizeof(*new), GFP_KERNEL);
964 if (new == NULL) {
965 ret = -ENOMEM;
966 goto err_range;
967 }
968
969 new->map = map;
970 new->name = range_cfg->name;
971 new->range_min = range_cfg->range_min;
972 new->range_max = range_cfg->range_max;
973 new->selector_reg = range_cfg->selector_reg;
974 new->selector_mask = range_cfg->selector_mask;
975 new->selector_shift = range_cfg->selector_shift;
976 new->window_start = range_cfg->window_start;
977 new->window_len = range_cfg->window_len;
978
979 if (!_regmap_range_add(map, new)) {
980 dev_err(map->dev, "Failed to add range %d\n", i);
981 kfree(new);
982 goto err_range;
983 }
984
985 if (map->selector_work_buf == NULL) {
986 map->selector_work_buf =
987 kzalloc(map->format.buf_size, GFP_KERNEL);
988 if (map->selector_work_buf == NULL) {
989 ret = -ENOMEM;
990 goto err_range;
991 }
992 }
993 }
994
995 ret = regcache_init(map, config);
996 if (ret != 0)
997 goto err_range;
998
999 if (dev) {
1000 ret = regmap_attach_dev(dev, map, config);
1001 if (ret != 0)
1002 goto err_regcache;
1003 }
1004
1005 return map;
1006
1007 err_regcache:
1008 regcache_exit(map);
1009 err_range:
1010 regmap_range_exit(map);
1011 kfree(map->work_buf);
1012 err_map:
1013 kfree(map);
1014 err:
1015 return ERR_PTR(ret);
1016 }
1017 EXPORT_SYMBOL_GPL(__regmap_init);
1018
1019 static void devm_regmap_release(struct device *dev, void *res)
1020 {
1021 regmap_exit(*(struct regmap **)res);
1022 }
1023
1024 struct regmap *__devm_regmap_init(struct device *dev,
1025 const struct regmap_bus *bus,
1026 void *bus_context,
1027 const struct regmap_config *config,
1028 struct lock_class_key *lock_key,
1029 const char *lock_name)
1030 {
1031 struct regmap **ptr, *regmap;
1032
1033 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1034 if (!ptr)
1035 return ERR_PTR(-ENOMEM);
1036
1037 regmap = __regmap_init(dev, bus, bus_context, config,
1038 lock_key, lock_name);
1039 if (!IS_ERR(regmap)) {
1040 *ptr = regmap;
1041 devres_add(dev, ptr);
1042 } else {
1043 devres_free(ptr);
1044 }
1045
1046 return regmap;
1047 }
1048 EXPORT_SYMBOL_GPL(__devm_regmap_init);
1049
1050 static void regmap_field_init(struct regmap_field *rm_field,
1051 struct regmap *regmap, struct reg_field reg_field)
1052 {
1053 rm_field->regmap = regmap;
1054 rm_field->reg = reg_field.reg;
1055 rm_field->shift = reg_field.lsb;
1056 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1057 rm_field->id_size = reg_field.id_size;
1058 rm_field->id_offset = reg_field.id_offset;
1059 }
1060
1061 /**
1062 * devm_regmap_field_alloc(): Allocate and initialise a register field
1063 * in a register map.
1064 *
1065 * @dev: Device that will be interacted with
1066 * @regmap: regmap bank in which this register field is located.
1067 * @reg_field: Register field with in the bank.
1068 *
1069 * The return value will be an ERR_PTR() on error or a valid pointer
1070 * to a struct regmap_field. The regmap_field will be automatically freed
1071 * by the device management code.
1072 */
1073 struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1074 struct regmap *regmap, struct reg_field reg_field)
1075 {
1076 struct regmap_field *rm_field = devm_kzalloc(dev,
1077 sizeof(*rm_field), GFP_KERNEL);
1078 if (!rm_field)
1079 return ERR_PTR(-ENOMEM);
1080
1081 regmap_field_init(rm_field, regmap, reg_field);
1082
1083 return rm_field;
1084
1085 }
1086 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1087
1088 /**
1089 * devm_regmap_field_free(): Free register field allocated using
1090 * devm_regmap_field_alloc. Usally drivers need not call this function,
1091 * as the memory allocated via devm will be freed as per device-driver
1092 * life-cyle.
1093 *
1094 * @dev: Device that will be interacted with
1095 * @field: regmap field which should be freed.
1096 */
1097 void devm_regmap_field_free(struct device *dev,
1098 struct regmap_field *field)
1099 {
1100 devm_kfree(dev, field);
1101 }
1102 EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1103
1104 /**
1105 * regmap_field_alloc(): Allocate and initialise a register field
1106 * in a register map.
1107 *
1108 * @regmap: regmap bank in which this register field is located.
1109 * @reg_field: Register field with in the bank.
1110 *
1111 * The return value will be an ERR_PTR() on error or a valid pointer
1112 * to a struct regmap_field. The regmap_field should be freed by the
1113 * user once its finished working with it using regmap_field_free().
1114 */
1115 struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1116 struct reg_field reg_field)
1117 {
1118 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1119
1120 if (!rm_field)
1121 return ERR_PTR(-ENOMEM);
1122
1123 regmap_field_init(rm_field, regmap, reg_field);
1124
1125 return rm_field;
1126 }
1127 EXPORT_SYMBOL_GPL(regmap_field_alloc);
1128
1129 /**
1130 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1131 *
1132 * @field: regmap field which should be freed.
1133 */
1134 void regmap_field_free(struct regmap_field *field)
1135 {
1136 kfree(field);
1137 }
1138 EXPORT_SYMBOL_GPL(regmap_field_free);
1139
1140 /**
1141 * regmap_reinit_cache(): Reinitialise the current register cache
1142 *
1143 * @map: Register map to operate on.
1144 * @config: New configuration. Only the cache data will be used.
1145 *
1146 * Discard any existing register cache for the map and initialize a
1147 * new cache. This can be used to restore the cache to defaults or to
1148 * update the cache configuration to reflect runtime discovery of the
1149 * hardware.
1150 *
1151 * No explicit locking is done here, the user needs to ensure that
1152 * this function will not race with other calls to regmap.
1153 */
1154 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1155 {
1156 regcache_exit(map);
1157 regmap_debugfs_exit(map);
1158
1159 map->max_register = config->max_register;
1160 map->writeable_reg = config->writeable_reg;
1161 map->readable_reg = config->readable_reg;
1162 map->volatile_reg = config->volatile_reg;
1163 map->precious_reg = config->precious_reg;
1164 map->cache_type = config->cache_type;
1165
1166 regmap_debugfs_init(map, config->name);
1167
1168 map->cache_bypass = false;
1169 map->cache_only = false;
1170
1171 return regcache_init(map, config);
1172 }
1173 EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1174
1175 /**
1176 * regmap_exit(): Free a previously allocated register map
1177 */
1178 void regmap_exit(struct regmap *map)
1179 {
1180 struct regmap_async *async;
1181
1182 regcache_exit(map);
1183 regmap_debugfs_exit(map);
1184 regmap_range_exit(map);
1185 if (map->bus && map->bus->free_context)
1186 map->bus->free_context(map->bus_context);
1187 kfree(map->work_buf);
1188 while (!list_empty(&map->async_free)) {
1189 async = list_first_entry_or_null(&map->async_free,
1190 struct regmap_async,
1191 list);
1192 list_del(&async->list);
1193 kfree(async->work_buf);
1194 kfree(async);
1195 }
1196 kfree(map);
1197 }
1198 EXPORT_SYMBOL_GPL(regmap_exit);
1199
1200 static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1201 {
1202 struct regmap **r = res;
1203 if (!r || !*r) {
1204 WARN_ON(!r || !*r);
1205 return 0;
1206 }
1207
1208 /* If the user didn't specify a name match any */
1209 if (data)
1210 return (*r)->name == data;
1211 else
1212 return 1;
1213 }
1214
1215 /**
1216 * dev_get_regmap(): Obtain the regmap (if any) for a device
1217 *
1218 * @dev: Device to retrieve the map for
1219 * @name: Optional name for the register map, usually NULL.
1220 *
1221 * Returns the regmap for the device if one is present, or NULL. If
1222 * name is specified then it must match the name specified when
1223 * registering the device, if it is NULL then the first regmap found
1224 * will be used. Devices with multiple register maps are very rare,
1225 * generic code should normally not need to specify a name.
1226 */
1227 struct regmap *dev_get_regmap(struct device *dev, const char *name)
1228 {
1229 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1230 dev_get_regmap_match, (void *)name);
1231
1232 if (!r)
1233 return NULL;
1234 return *r;
1235 }
1236 EXPORT_SYMBOL_GPL(dev_get_regmap);
1237
1238 /**
1239 * regmap_get_device(): Obtain the device from a regmap
1240 *
1241 * @map: Register map to operate on.
1242 *
1243 * Returns the underlying device that the regmap has been created for.
1244 */
1245 struct device *regmap_get_device(struct regmap *map)
1246 {
1247 return map->dev;
1248 }
1249 EXPORT_SYMBOL_GPL(regmap_get_device);
1250
1251 static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1252 struct regmap_range_node *range,
1253 unsigned int val_num)
1254 {
1255 void *orig_work_buf;
1256 unsigned int win_offset;
1257 unsigned int win_page;
1258 bool page_chg;
1259 int ret;
1260
1261 win_offset = (*reg - range->range_min) % range->window_len;
1262 win_page = (*reg - range->range_min) / range->window_len;
1263
1264 if (val_num > 1) {
1265 /* Bulk write shouldn't cross range boundary */
1266 if (*reg + val_num - 1 > range->range_max)
1267 return -EINVAL;
1268
1269 /* ... or single page boundary */
1270 if (val_num > range->window_len - win_offset)
1271 return -EINVAL;
1272 }
1273
1274 /* It is possible to have selector register inside data window.
1275 In that case, selector register is located on every page and
1276 it needs no page switching, when accessed alone. */
1277 if (val_num > 1 ||
1278 range->window_start + win_offset != range->selector_reg) {
1279 /* Use separate work_buf during page switching */
1280 orig_work_buf = map->work_buf;
1281 map->work_buf = map->selector_work_buf;
1282
1283 ret = _regmap_update_bits(map, range->selector_reg,
1284 range->selector_mask,
1285 win_page << range->selector_shift,
1286 &page_chg, false);
1287
1288 map->work_buf = orig_work_buf;
1289
1290 if (ret != 0)
1291 return ret;
1292 }
1293
1294 *reg = range->window_start + win_offset;
1295
1296 return 0;
1297 }
1298
1299 int _regmap_raw_write(struct regmap *map, unsigned int reg,
1300 const void *val, size_t val_len)
1301 {
1302 struct regmap_range_node *range;
1303 unsigned long flags;
1304 u8 *u8 = map->work_buf;
1305 void *work_val = map->work_buf + map->format.reg_bytes +
1306 map->format.pad_bytes;
1307 void *buf;
1308 int ret = -ENOTSUPP;
1309 size_t len;
1310 int i;
1311
1312 WARN_ON(!map->bus);
1313
1314 /* Check for unwritable registers before we start */
1315 if (map->writeable_reg)
1316 for (i = 0; i < val_len / map->format.val_bytes; i++)
1317 if (!map->writeable_reg(map->dev,
1318 reg + regmap_get_offset(map, i)))
1319 return -EINVAL;
1320
1321 if (!map->cache_bypass && map->format.parse_val) {
1322 unsigned int ival;
1323 int val_bytes = map->format.val_bytes;
1324 for (i = 0; i < val_len / val_bytes; i++) {
1325 ival = map->format.parse_val(val + (i * val_bytes));
1326 ret = regcache_write(map,
1327 reg + regmap_get_offset(map, i),
1328 ival);
1329 if (ret) {
1330 dev_err(map->dev,
1331 "Error in caching of register: %x ret: %d\n",
1332 reg + i, ret);
1333 return ret;
1334 }
1335 }
1336 if (map->cache_only) {
1337 map->cache_dirty = true;
1338 return 0;
1339 }
1340 }
1341
1342 range = _regmap_range_lookup(map, reg);
1343 if (range) {
1344 int val_num = val_len / map->format.val_bytes;
1345 int win_offset = (reg - range->range_min) % range->window_len;
1346 int win_residue = range->window_len - win_offset;
1347
1348 /* If the write goes beyond the end of the window split it */
1349 while (val_num > win_residue) {
1350 dev_dbg(map->dev, "Writing window %d/%zu\n",
1351 win_residue, val_len / map->format.val_bytes);
1352 ret = _regmap_raw_write(map, reg, val, win_residue *
1353 map->format.val_bytes);
1354 if (ret != 0)
1355 return ret;
1356
1357 reg += win_residue;
1358 val_num -= win_residue;
1359 val += win_residue * map->format.val_bytes;
1360 val_len -= win_residue * map->format.val_bytes;
1361
1362 win_offset = (reg - range->range_min) %
1363 range->window_len;
1364 win_residue = range->window_len - win_offset;
1365 }
1366
1367 ret = _regmap_select_page(map, &reg, range, val_num);
1368 if (ret != 0)
1369 return ret;
1370 }
1371
1372 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1373
1374 u8[0] |= map->write_flag_mask;
1375
1376 /*
1377 * Essentially all I/O mechanisms will be faster with a single
1378 * buffer to write. Since register syncs often generate raw
1379 * writes of single registers optimise that case.
1380 */
1381 if (val != work_val && val_len == map->format.val_bytes) {
1382 memcpy(work_val, val, map->format.val_bytes);
1383 val = work_val;
1384 }
1385
1386 if (map->async && map->bus->async_write) {
1387 struct regmap_async *async;
1388
1389 trace_regmap_async_write_start(map, reg, val_len);
1390
1391 spin_lock_irqsave(&map->async_lock, flags);
1392 async = list_first_entry_or_null(&map->async_free,
1393 struct regmap_async,
1394 list);
1395 if (async)
1396 list_del(&async->list);
1397 spin_unlock_irqrestore(&map->async_lock, flags);
1398
1399 if (!async) {
1400 async = map->bus->async_alloc();
1401 if (!async)
1402 return -ENOMEM;
1403
1404 async->work_buf = kzalloc(map->format.buf_size,
1405 GFP_KERNEL | GFP_DMA);
1406 if (!async->work_buf) {
1407 kfree(async);
1408 return -ENOMEM;
1409 }
1410 }
1411
1412 async->map = map;
1413
1414 /* If the caller supplied the value we can use it safely. */
1415 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1416 map->format.reg_bytes + map->format.val_bytes);
1417
1418 spin_lock_irqsave(&map->async_lock, flags);
1419 list_add_tail(&async->list, &map->async_list);
1420 spin_unlock_irqrestore(&map->async_lock, flags);
1421
1422 if (val != work_val)
1423 ret = map->bus->async_write(map->bus_context,
1424 async->work_buf,
1425 map->format.reg_bytes +
1426 map->format.pad_bytes,
1427 val, val_len, async);
1428 else
1429 ret = map->bus->async_write(map->bus_context,
1430 async->work_buf,
1431 map->format.reg_bytes +
1432 map->format.pad_bytes +
1433 val_len, NULL, 0, async);
1434
1435 if (ret != 0) {
1436 dev_err(map->dev, "Failed to schedule write: %d\n",
1437 ret);
1438
1439 spin_lock_irqsave(&map->async_lock, flags);
1440 list_move(&async->list, &map->async_free);
1441 spin_unlock_irqrestore(&map->async_lock, flags);
1442 }
1443
1444 return ret;
1445 }
1446
1447 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1448
1449 /* If we're doing a single register write we can probably just
1450 * send the work_buf directly, otherwise try to do a gather
1451 * write.
1452 */
1453 if (val == work_val)
1454 ret = map->bus->write(map->bus_context, map->work_buf,
1455 map->format.reg_bytes +
1456 map->format.pad_bytes +
1457 val_len);
1458 else if (map->bus->gather_write)
1459 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1460 map->format.reg_bytes +
1461 map->format.pad_bytes,
1462 val, val_len);
1463
1464 /* If that didn't work fall back on linearising by hand. */
1465 if (ret == -ENOTSUPP) {
1466 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1467 buf = kzalloc(len, GFP_KERNEL);
1468 if (!buf)
1469 return -ENOMEM;
1470
1471 memcpy(buf, map->work_buf, map->format.reg_bytes);
1472 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1473 val, val_len);
1474 ret = map->bus->write(map->bus_context, buf, len);
1475
1476 kfree(buf);
1477 }
1478
1479 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1480
1481 return ret;
1482 }
1483
1484 /**
1485 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1486 *
1487 * @map: Map to check.
1488 */
1489 bool regmap_can_raw_write(struct regmap *map)
1490 {
1491 return map->bus && map->bus->write && map->format.format_val &&
1492 map->format.format_reg;
1493 }
1494 EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1495
1496 /**
1497 * regmap_get_raw_read_max - Get the maximum size we can read
1498 *
1499 * @map: Map to check.
1500 */
1501 size_t regmap_get_raw_read_max(struct regmap *map)
1502 {
1503 return map->max_raw_read;
1504 }
1505 EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1506
1507 /**
1508 * regmap_get_raw_write_max - Get the maximum size we can read
1509 *
1510 * @map: Map to check.
1511 */
1512 size_t regmap_get_raw_write_max(struct regmap *map)
1513 {
1514 return map->max_raw_write;
1515 }
1516 EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1517
1518 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1519 unsigned int val)
1520 {
1521 int ret;
1522 struct regmap_range_node *range;
1523 struct regmap *map = context;
1524
1525 WARN_ON(!map->bus || !map->format.format_write);
1526
1527 range = _regmap_range_lookup(map, reg);
1528 if (range) {
1529 ret = _regmap_select_page(map, &reg, range, 1);
1530 if (ret != 0)
1531 return ret;
1532 }
1533
1534 map->format.format_write(map, reg, val);
1535
1536 trace_regmap_hw_write_start(map, reg, 1);
1537
1538 ret = map->bus->write(map->bus_context, map->work_buf,
1539 map->format.buf_size);
1540
1541 trace_regmap_hw_write_done(map, reg, 1);
1542
1543 return ret;
1544 }
1545
1546 static int _regmap_bus_reg_write(void *context, unsigned int reg,
1547 unsigned int val)
1548 {
1549 struct regmap *map = context;
1550
1551 return map->bus->reg_write(map->bus_context, reg, val);
1552 }
1553
1554 static int _regmap_bus_raw_write(void *context, unsigned int reg,
1555 unsigned int val)
1556 {
1557 struct regmap *map = context;
1558
1559 WARN_ON(!map->bus || !map->format.format_val);
1560
1561 map->format.format_val(map->work_buf + map->format.reg_bytes
1562 + map->format.pad_bytes, val, 0);
1563 return _regmap_raw_write(map, reg,
1564 map->work_buf +
1565 map->format.reg_bytes +
1566 map->format.pad_bytes,
1567 map->format.val_bytes);
1568 }
1569
1570 static inline void *_regmap_map_get_context(struct regmap *map)
1571 {
1572 return (map->bus) ? map : map->bus_context;
1573 }
1574
1575 int _regmap_write(struct regmap *map, unsigned int reg,
1576 unsigned int val)
1577 {
1578 int ret;
1579 void *context = _regmap_map_get_context(map);
1580
1581 if (!regmap_writeable(map, reg))
1582 return -EIO;
1583
1584 if (!map->cache_bypass && !map->defer_caching) {
1585 ret = regcache_write(map, reg, val);
1586 if (ret != 0)
1587 return ret;
1588 if (map->cache_only) {
1589 map->cache_dirty = true;
1590 return 0;
1591 }
1592 }
1593
1594 #ifdef LOG_DEVICE
1595 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1596 dev_info(map->dev, "%x <= %x\n", reg, val);
1597 #endif
1598
1599 trace_regmap_reg_write(map, reg, val);
1600
1601 return map->reg_write(context, reg, val);
1602 }
1603
1604 /**
1605 * regmap_write(): Write a value to a single register
1606 *
1607 * @map: Register map to write to
1608 * @reg: Register to write to
1609 * @val: Value to be written
1610 *
1611 * A value of zero will be returned on success, a negative errno will
1612 * be returned in error cases.
1613 */
1614 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1615 {
1616 int ret;
1617
1618 if (!IS_ALIGNED(reg, map->reg_stride))
1619 return -EINVAL;
1620
1621 map->lock(map->lock_arg);
1622
1623 ret = _regmap_write(map, reg, val);
1624
1625 map->unlock(map->lock_arg);
1626
1627 return ret;
1628 }
1629 EXPORT_SYMBOL_GPL(regmap_write);
1630
1631 /**
1632 * regmap_write_async(): Write a value to a single register asynchronously
1633 *
1634 * @map: Register map to write to
1635 * @reg: Register to write to
1636 * @val: Value to be written
1637 *
1638 * A value of zero will be returned on success, a negative errno will
1639 * be returned in error cases.
1640 */
1641 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1642 {
1643 int ret;
1644
1645 if (!IS_ALIGNED(reg, map->reg_stride))
1646 return -EINVAL;
1647
1648 map->lock(map->lock_arg);
1649
1650 map->async = true;
1651
1652 ret = _regmap_write(map, reg, val);
1653
1654 map->async = false;
1655
1656 map->unlock(map->lock_arg);
1657
1658 return ret;
1659 }
1660 EXPORT_SYMBOL_GPL(regmap_write_async);
1661
1662 /**
1663 * regmap_raw_write(): Write raw values to one or more registers
1664 *
1665 * @map: Register map to write to
1666 * @reg: Initial register to write to
1667 * @val: Block of data to be written, laid out for direct transmission to the
1668 * device
1669 * @val_len: Length of data pointed to by val.
1670 *
1671 * This function is intended to be used for things like firmware
1672 * download where a large block of data needs to be transferred to the
1673 * device. No formatting will be done on the data provided.
1674 *
1675 * A value of zero will be returned on success, a negative errno will
1676 * be returned in error cases.
1677 */
1678 int regmap_raw_write(struct regmap *map, unsigned int reg,
1679 const void *val, size_t val_len)
1680 {
1681 int ret;
1682
1683 if (!regmap_can_raw_write(map))
1684 return -EINVAL;
1685 if (val_len % map->format.val_bytes)
1686 return -EINVAL;
1687 if (map->max_raw_write && map->max_raw_write > val_len)
1688 return -E2BIG;
1689
1690 map->lock(map->lock_arg);
1691
1692 ret = _regmap_raw_write(map, reg, val, val_len);
1693
1694 map->unlock(map->lock_arg);
1695
1696 return ret;
1697 }
1698 EXPORT_SYMBOL_GPL(regmap_raw_write);
1699
1700 /**
1701 * regmap_field_write(): Write a value to a single register field
1702 *
1703 * @field: Register field to write to
1704 * @val: Value to be written
1705 *
1706 * A value of zero will be returned on success, a negative errno will
1707 * be returned in error cases.
1708 */
1709 int regmap_field_write(struct regmap_field *field, unsigned int val)
1710 {
1711 return regmap_update_bits(field->regmap, field->reg,
1712 field->mask, val << field->shift);
1713 }
1714 EXPORT_SYMBOL_GPL(regmap_field_write);
1715
1716 /**
1717 * regmap_field_update_bits(): Perform a read/modify/write cycle
1718 * on the register field
1719 *
1720 * @field: Register field to write to
1721 * @mask: Bitmask to change
1722 * @val: Value to be written
1723 *
1724 * A value of zero will be returned on success, a negative errno will
1725 * be returned in error cases.
1726 */
1727 int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1728 {
1729 mask = (mask << field->shift) & field->mask;
1730
1731 return regmap_update_bits(field->regmap, field->reg,
1732 mask, val << field->shift);
1733 }
1734 EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1735
1736 /**
1737 * regmap_fields_write(): Write a value to a single register field with port ID
1738 *
1739 * @field: Register field to write to
1740 * @id: port ID
1741 * @val: Value to be written
1742 *
1743 * A value of zero will be returned on success, a negative errno will
1744 * be returned in error cases.
1745 */
1746 int regmap_fields_write(struct regmap_field *field, unsigned int id,
1747 unsigned int val)
1748 {
1749 if (id >= field->id_size)
1750 return -EINVAL;
1751
1752 return regmap_update_bits(field->regmap,
1753 field->reg + (field->id_offset * id),
1754 field->mask, val << field->shift);
1755 }
1756 EXPORT_SYMBOL_GPL(regmap_fields_write);
1757
1758 int regmap_fields_force_write(struct regmap_field *field, unsigned int id,
1759 unsigned int val)
1760 {
1761 if (id >= field->id_size)
1762 return -EINVAL;
1763
1764 return regmap_write_bits(field->regmap,
1765 field->reg + (field->id_offset * id),
1766 field->mask, val << field->shift);
1767 }
1768 EXPORT_SYMBOL_GPL(regmap_fields_force_write);
1769
1770 /**
1771 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1772 * on the register field
1773 *
1774 * @field: Register field to write to
1775 * @id: port ID
1776 * @mask: Bitmask to change
1777 * @val: Value to be written
1778 *
1779 * A value of zero will be returned on success, a negative errno will
1780 * be returned in error cases.
1781 */
1782 int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1783 unsigned int mask, unsigned int val)
1784 {
1785 if (id >= field->id_size)
1786 return -EINVAL;
1787
1788 mask = (mask << field->shift) & field->mask;
1789
1790 return regmap_update_bits(field->regmap,
1791 field->reg + (field->id_offset * id),
1792 mask, val << field->shift);
1793 }
1794 EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1795
1796 /*
1797 * regmap_bulk_write(): Write multiple registers to the device
1798 *
1799 * @map: Register map to write to
1800 * @reg: First register to be write from
1801 * @val: Block of data to be written, in native register size for device
1802 * @val_count: Number of registers to write
1803 *
1804 * This function is intended to be used for writing a large block of
1805 * data to the device either in single transfer or multiple transfer.
1806 *
1807 * A value of zero will be returned on success, a negative errno will
1808 * be returned in error cases.
1809 */
1810 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1811 size_t val_count)
1812 {
1813 int ret = 0, i;
1814 size_t val_bytes = map->format.val_bytes;
1815 size_t total_size = val_bytes * val_count;
1816
1817 if (map->bus && !map->format.parse_inplace)
1818 return -EINVAL;
1819 if (!IS_ALIGNED(reg, map->reg_stride))
1820 return -EINVAL;
1821
1822 /*
1823 * Some devices don't support bulk write, for
1824 * them we have a series of single write operations in the first two if
1825 * blocks.
1826 *
1827 * The first if block is used for memory mapped io. It does not allow
1828 * val_bytes of 3 for example.
1829 * The second one is used for busses which do not have this limitation
1830 * and can write arbitrary value lengths.
1831 */
1832 if (!map->bus) {
1833 map->lock(map->lock_arg);
1834 for (i = 0; i < val_count; i++) {
1835 unsigned int ival;
1836
1837 switch (val_bytes) {
1838 case 1:
1839 ival = *(u8 *)(val + (i * val_bytes));
1840 break;
1841 case 2:
1842 ival = *(u16 *)(val + (i * val_bytes));
1843 break;
1844 case 4:
1845 ival = *(u32 *)(val + (i * val_bytes));
1846 break;
1847 #ifdef CONFIG_64BIT
1848 case 8:
1849 ival = *(u64 *)(val + (i * val_bytes));
1850 break;
1851 #endif
1852 default:
1853 ret = -EINVAL;
1854 goto out;
1855 }
1856
1857 ret = _regmap_write(map,
1858 reg + regmap_get_offset(map, i),
1859 ival);
1860 if (ret != 0)
1861 goto out;
1862 }
1863 out:
1864 map->unlock(map->lock_arg);
1865 } else if (map->use_single_write ||
1866 (map->max_raw_write && map->max_raw_write < total_size)) {
1867 int chunk_stride = map->reg_stride;
1868 size_t chunk_size = val_bytes;
1869 size_t chunk_count = val_count;
1870
1871 if (!map->use_single_write) {
1872 chunk_size = map->max_raw_write;
1873 if (chunk_size % val_bytes)
1874 chunk_size -= chunk_size % val_bytes;
1875 chunk_count = total_size / chunk_size;
1876 chunk_stride *= chunk_size / val_bytes;
1877 }
1878
1879 map->lock(map->lock_arg);
1880 /* Write as many bytes as possible with chunk_size */
1881 for (i = 0; i < chunk_count; i++) {
1882 ret = _regmap_raw_write(map,
1883 reg + (i * chunk_stride),
1884 val + (i * chunk_size),
1885 chunk_size);
1886 if (ret)
1887 break;
1888 }
1889
1890 /* Write remaining bytes */
1891 if (!ret && chunk_size * i < total_size) {
1892 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1893 val + (i * chunk_size),
1894 total_size - i * chunk_size);
1895 }
1896 map->unlock(map->lock_arg);
1897 } else {
1898 void *wval;
1899
1900 if (!val_count)
1901 return -EINVAL;
1902
1903 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
1904 if (!wval) {
1905 dev_err(map->dev, "Error in memory allocation\n");
1906 return -ENOMEM;
1907 }
1908 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1909 map->format.parse_inplace(wval + i);
1910
1911 map->lock(map->lock_arg);
1912 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1913 map->unlock(map->lock_arg);
1914
1915 kfree(wval);
1916 }
1917 return ret;
1918 }
1919 EXPORT_SYMBOL_GPL(regmap_bulk_write);
1920
1921 /*
1922 * _regmap_raw_multi_reg_write()
1923 *
1924 * the (register,newvalue) pairs in regs have not been formatted, but
1925 * they are all in the same page and have been changed to being page
1926 * relative. The page register has been written if that was necessary.
1927 */
1928 static int _regmap_raw_multi_reg_write(struct regmap *map,
1929 const struct reg_sequence *regs,
1930 size_t num_regs)
1931 {
1932 int ret;
1933 void *buf;
1934 int i;
1935 u8 *u8;
1936 size_t val_bytes = map->format.val_bytes;
1937 size_t reg_bytes = map->format.reg_bytes;
1938 size_t pad_bytes = map->format.pad_bytes;
1939 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1940 size_t len = pair_size * num_regs;
1941
1942 if (!len)
1943 return -EINVAL;
1944
1945 buf = kzalloc(len, GFP_KERNEL);
1946 if (!buf)
1947 return -ENOMEM;
1948
1949 /* We have to linearise by hand. */
1950
1951 u8 = buf;
1952
1953 for (i = 0; i < num_regs; i++) {
1954 unsigned int reg = regs[i].reg;
1955 unsigned int val = regs[i].def;
1956 trace_regmap_hw_write_start(map, reg, 1);
1957 map->format.format_reg(u8, reg, map->reg_shift);
1958 u8 += reg_bytes + pad_bytes;
1959 map->format.format_val(u8, val, 0);
1960 u8 += val_bytes;
1961 }
1962 u8 = buf;
1963 *u8 |= map->write_flag_mask;
1964
1965 ret = map->bus->write(map->bus_context, buf, len);
1966
1967 kfree(buf);
1968
1969 for (i = 0; i < num_regs; i++) {
1970 int reg = regs[i].reg;
1971 trace_regmap_hw_write_done(map, reg, 1);
1972 }
1973 return ret;
1974 }
1975
1976 static unsigned int _regmap_register_page(struct regmap *map,
1977 unsigned int reg,
1978 struct regmap_range_node *range)
1979 {
1980 unsigned int win_page = (reg - range->range_min) / range->window_len;
1981
1982 return win_page;
1983 }
1984
1985 static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1986 struct reg_sequence *regs,
1987 size_t num_regs)
1988 {
1989 int ret;
1990 int i, n;
1991 struct reg_sequence *base;
1992 unsigned int this_page = 0;
1993 unsigned int page_change = 0;
1994 /*
1995 * the set of registers are not neccessarily in order, but
1996 * since the order of write must be preserved this algorithm
1997 * chops the set each time the page changes. This also applies
1998 * if there is a delay required at any point in the sequence.
1999 */
2000 base = regs;
2001 for (i = 0, n = 0; i < num_regs; i++, n++) {
2002 unsigned int reg = regs[i].reg;
2003 struct regmap_range_node *range;
2004
2005 range = _regmap_range_lookup(map, reg);
2006 if (range) {
2007 unsigned int win_page = _regmap_register_page(map, reg,
2008 range);
2009
2010 if (i == 0)
2011 this_page = win_page;
2012 if (win_page != this_page) {
2013 this_page = win_page;
2014 page_change = 1;
2015 }
2016 }
2017
2018 /* If we have both a page change and a delay make sure to
2019 * write the regs and apply the delay before we change the
2020 * page.
2021 */
2022
2023 if (page_change || regs[i].delay_us) {
2024
2025 /* For situations where the first write requires
2026 * a delay we need to make sure we don't call
2027 * raw_multi_reg_write with n=0
2028 * This can't occur with page breaks as we
2029 * never write on the first iteration
2030 */
2031 if (regs[i].delay_us && i == 0)
2032 n = 1;
2033
2034 ret = _regmap_raw_multi_reg_write(map, base, n);
2035 if (ret != 0)
2036 return ret;
2037
2038 if (regs[i].delay_us)
2039 udelay(regs[i].delay_us);
2040
2041 base += n;
2042 n = 0;
2043
2044 if (page_change) {
2045 ret = _regmap_select_page(map,
2046 &base[n].reg,
2047 range, 1);
2048 if (ret != 0)
2049 return ret;
2050
2051 page_change = 0;
2052 }
2053
2054 }
2055
2056 }
2057 if (n > 0)
2058 return _regmap_raw_multi_reg_write(map, base, n);
2059 return 0;
2060 }
2061
2062 static int _regmap_multi_reg_write(struct regmap *map,
2063 const struct reg_sequence *regs,
2064 size_t num_regs)
2065 {
2066 int i;
2067 int ret;
2068
2069 if (!map->can_multi_write) {
2070 for (i = 0; i < num_regs; i++) {
2071 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2072 if (ret != 0)
2073 return ret;
2074
2075 if (regs[i].delay_us)
2076 udelay(regs[i].delay_us);
2077 }
2078 return 0;
2079 }
2080
2081 if (!map->format.parse_inplace)
2082 return -EINVAL;
2083
2084 if (map->writeable_reg)
2085 for (i = 0; i < num_regs; i++) {
2086 int reg = regs[i].reg;
2087 if (!map->writeable_reg(map->dev, reg))
2088 return -EINVAL;
2089 if (!IS_ALIGNED(reg, map->reg_stride))
2090 return -EINVAL;
2091 }
2092
2093 if (!map->cache_bypass) {
2094 for (i = 0; i < num_regs; i++) {
2095 unsigned int val = regs[i].def;
2096 unsigned int reg = regs[i].reg;
2097 ret = regcache_write(map, reg, val);
2098 if (ret) {
2099 dev_err(map->dev,
2100 "Error in caching of register: %x ret: %d\n",
2101 reg, ret);
2102 return ret;
2103 }
2104 }
2105 if (map->cache_only) {
2106 map->cache_dirty = true;
2107 return 0;
2108 }
2109 }
2110
2111 WARN_ON(!map->bus);
2112
2113 for (i = 0; i < num_regs; i++) {
2114 unsigned int reg = regs[i].reg;
2115 struct regmap_range_node *range;
2116
2117 /* Coalesce all the writes between a page break or a delay
2118 * in a sequence
2119 */
2120 range = _regmap_range_lookup(map, reg);
2121 if (range || regs[i].delay_us) {
2122 size_t len = sizeof(struct reg_sequence)*num_regs;
2123 struct reg_sequence *base = kmemdup(regs, len,
2124 GFP_KERNEL);
2125 if (!base)
2126 return -ENOMEM;
2127 ret = _regmap_range_multi_paged_reg_write(map, base,
2128 num_regs);
2129 kfree(base);
2130
2131 return ret;
2132 }
2133 }
2134 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2135 }
2136
2137 /*
2138 * regmap_multi_reg_write(): Write multiple registers to the device
2139 *
2140 * where the set of register,value pairs are supplied in any order,
2141 * possibly not all in a single range.
2142 *
2143 * @map: Register map to write to
2144 * @regs: Array of structures containing register,value to be written
2145 * @num_regs: Number of registers to write
2146 *
2147 * The 'normal' block write mode will send ultimately send data on the
2148 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
2149 * addressed. However, this alternative block multi write mode will send
2150 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2151 * must of course support the mode.
2152 *
2153 * A value of zero will be returned on success, a negative errno will be
2154 * returned in error cases.
2155 */
2156 int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2157 int num_regs)
2158 {
2159 int ret;
2160
2161 map->lock(map->lock_arg);
2162
2163 ret = _regmap_multi_reg_write(map, regs, num_regs);
2164
2165 map->unlock(map->lock_arg);
2166
2167 return ret;
2168 }
2169 EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2170
2171 /*
2172 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
2173 * device but not the cache
2174 *
2175 * where the set of register are supplied in any order
2176 *
2177 * @map: Register map to write to
2178 * @regs: Array of structures containing register,value to be written
2179 * @num_regs: Number of registers to write
2180 *
2181 * This function is intended to be used for writing a large block of data
2182 * atomically to the device in single transfer for those I2C client devices
2183 * that implement this alternative block write mode.
2184 *
2185 * A value of zero will be returned on success, a negative errno will
2186 * be returned in error cases.
2187 */
2188 int regmap_multi_reg_write_bypassed(struct regmap *map,
2189 const struct reg_sequence *regs,
2190 int num_regs)
2191 {
2192 int ret;
2193 bool bypass;
2194
2195 map->lock(map->lock_arg);
2196
2197 bypass = map->cache_bypass;
2198 map->cache_bypass = true;
2199
2200 ret = _regmap_multi_reg_write(map, regs, num_regs);
2201
2202 map->cache_bypass = bypass;
2203
2204 map->unlock(map->lock_arg);
2205
2206 return ret;
2207 }
2208 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2209
2210 /**
2211 * regmap_raw_write_async(): Write raw values to one or more registers
2212 * asynchronously
2213 *
2214 * @map: Register map to write to
2215 * @reg: Initial register to write to
2216 * @val: Block of data to be written, laid out for direct transmission to the
2217 * device. Must be valid until regmap_async_complete() is called.
2218 * @val_len: Length of data pointed to by val.
2219 *
2220 * This function is intended to be used for things like firmware
2221 * download where a large block of data needs to be transferred to the
2222 * device. No formatting will be done on the data provided.
2223 *
2224 * If supported by the underlying bus the write will be scheduled
2225 * asynchronously, helping maximise I/O speed on higher speed buses
2226 * like SPI. regmap_async_complete() can be called to ensure that all
2227 * asynchrnous writes have been completed.
2228 *
2229 * A value of zero will be returned on success, a negative errno will
2230 * be returned in error cases.
2231 */
2232 int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2233 const void *val, size_t val_len)
2234 {
2235 int ret;
2236
2237 if (val_len % map->format.val_bytes)
2238 return -EINVAL;
2239 if (!IS_ALIGNED(reg, map->reg_stride))
2240 return -EINVAL;
2241
2242 map->lock(map->lock_arg);
2243
2244 map->async = true;
2245
2246 ret = _regmap_raw_write(map, reg, val, val_len);
2247
2248 map->async = false;
2249
2250 map->unlock(map->lock_arg);
2251
2252 return ret;
2253 }
2254 EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2255
2256 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2257 unsigned int val_len)
2258 {
2259 struct regmap_range_node *range;
2260 u8 *u8 = map->work_buf;
2261 int ret;
2262
2263 WARN_ON(!map->bus);
2264
2265 if (!map->bus || !map->bus->read)
2266 return -EINVAL;
2267
2268 range = _regmap_range_lookup(map, reg);
2269 if (range) {
2270 ret = _regmap_select_page(map, &reg, range,
2271 val_len / map->format.val_bytes);
2272 if (ret != 0)
2273 return ret;
2274 }
2275
2276 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2277
2278 /*
2279 * Some buses or devices flag reads by setting the high bits in the
2280 * register address; since it's always the high bits for all
2281 * current formats we can do this here rather than in
2282 * formatting. This may break if we get interesting formats.
2283 */
2284 u8[0] |= map->read_flag_mask;
2285
2286 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2287
2288 ret = map->bus->read(map->bus_context, map->work_buf,
2289 map->format.reg_bytes + map->format.pad_bytes,
2290 val, val_len);
2291
2292 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2293
2294 return ret;
2295 }
2296
2297 static int _regmap_bus_reg_read(void *context, unsigned int reg,
2298 unsigned int *val)
2299 {
2300 struct regmap *map = context;
2301
2302 return map->bus->reg_read(map->bus_context, reg, val);
2303 }
2304
2305 static int _regmap_bus_read(void *context, unsigned int reg,
2306 unsigned int *val)
2307 {
2308 int ret;
2309 struct regmap *map = context;
2310
2311 if (!map->format.parse_val)
2312 return -EINVAL;
2313
2314 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2315 if (ret == 0)
2316 *val = map->format.parse_val(map->work_buf);
2317
2318 return ret;
2319 }
2320
2321 static int _regmap_read(struct regmap *map, unsigned int reg,
2322 unsigned int *val)
2323 {
2324 int ret;
2325 void *context = _regmap_map_get_context(map);
2326
2327 if (!map->cache_bypass) {
2328 ret = regcache_read(map, reg, val);
2329 if (ret == 0)
2330 return 0;
2331 }
2332
2333 if (map->cache_only)
2334 return -EBUSY;
2335
2336 if (!regmap_readable(map, reg))
2337 return -EIO;
2338
2339 ret = map->reg_read(context, reg, val);
2340 if (ret == 0) {
2341 #ifdef LOG_DEVICE
2342 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2343 dev_info(map->dev, "%x => %x\n", reg, *val);
2344 #endif
2345
2346 trace_regmap_reg_read(map, reg, *val);
2347
2348 if (!map->cache_bypass)
2349 regcache_write(map, reg, *val);
2350 }
2351
2352 return ret;
2353 }
2354
2355 /**
2356 * regmap_read(): Read a value from a single register
2357 *
2358 * @map: Register map to read from
2359 * @reg: Register to be read from
2360 * @val: Pointer to store read value
2361 *
2362 * A value of zero will be returned on success, a negative errno will
2363 * be returned in error cases.
2364 */
2365 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2366 {
2367 int ret;
2368
2369 if (!IS_ALIGNED(reg, map->reg_stride))
2370 return -EINVAL;
2371
2372 map->lock(map->lock_arg);
2373
2374 ret = _regmap_read(map, reg, val);
2375
2376 map->unlock(map->lock_arg);
2377
2378 return ret;
2379 }
2380 EXPORT_SYMBOL_GPL(regmap_read);
2381
2382 /**
2383 * regmap_raw_read(): Read raw data from the device
2384 *
2385 * @map: Register map to read from
2386 * @reg: First register to be read from
2387 * @val: Pointer to store read value
2388 * @val_len: Size of data to read
2389 *
2390 * A value of zero will be returned on success, a negative errno will
2391 * be returned in error cases.
2392 */
2393 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2394 size_t val_len)
2395 {
2396 size_t val_bytes = map->format.val_bytes;
2397 size_t val_count = val_len / val_bytes;
2398 unsigned int v;
2399 int ret, i;
2400
2401 if (!map->bus)
2402 return -EINVAL;
2403 if (val_len % map->format.val_bytes)
2404 return -EINVAL;
2405 if (!IS_ALIGNED(reg, map->reg_stride))
2406 return -EINVAL;
2407 if (val_count == 0)
2408 return -EINVAL;
2409
2410 map->lock(map->lock_arg);
2411
2412 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2413 map->cache_type == REGCACHE_NONE) {
2414 if (!map->bus->read) {
2415 ret = -ENOTSUPP;
2416 goto out;
2417 }
2418 if (map->max_raw_read && map->max_raw_read < val_len) {
2419 ret = -E2BIG;
2420 goto out;
2421 }
2422
2423 /* Physical block read if there's no cache involved */
2424 ret = _regmap_raw_read(map, reg, val, val_len);
2425
2426 } else {
2427 /* Otherwise go word by word for the cache; should be low
2428 * cost as we expect to hit the cache.
2429 */
2430 for (i = 0; i < val_count; i++) {
2431 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2432 &v);
2433 if (ret != 0)
2434 goto out;
2435
2436 map->format.format_val(val + (i * val_bytes), v, 0);
2437 }
2438 }
2439
2440 out:
2441 map->unlock(map->lock_arg);
2442
2443 return ret;
2444 }
2445 EXPORT_SYMBOL_GPL(regmap_raw_read);
2446
2447 /**
2448 * regmap_field_read(): Read a value to a single register field
2449 *
2450 * @field: Register field to read from
2451 * @val: Pointer to store read value
2452 *
2453 * A value of zero will be returned on success, a negative errno will
2454 * be returned in error cases.
2455 */
2456 int regmap_field_read(struct regmap_field *field, unsigned int *val)
2457 {
2458 int ret;
2459 unsigned int reg_val;
2460 ret = regmap_read(field->regmap, field->reg, &reg_val);
2461 if (ret != 0)
2462 return ret;
2463
2464 reg_val &= field->mask;
2465 reg_val >>= field->shift;
2466 *val = reg_val;
2467
2468 return ret;
2469 }
2470 EXPORT_SYMBOL_GPL(regmap_field_read);
2471
2472 /**
2473 * regmap_fields_read(): Read a value to a single register field with port ID
2474 *
2475 * @field: Register field to read from
2476 * @id: port ID
2477 * @val: Pointer to store read value
2478 *
2479 * A value of zero will be returned on success, a negative errno will
2480 * be returned in error cases.
2481 */
2482 int regmap_fields_read(struct regmap_field *field, unsigned int id,
2483 unsigned int *val)
2484 {
2485 int ret;
2486 unsigned int reg_val;
2487
2488 if (id >= field->id_size)
2489 return -EINVAL;
2490
2491 ret = regmap_read(field->regmap,
2492 field->reg + (field->id_offset * id),
2493 &reg_val);
2494 if (ret != 0)
2495 return ret;
2496
2497 reg_val &= field->mask;
2498 reg_val >>= field->shift;
2499 *val = reg_val;
2500
2501 return ret;
2502 }
2503 EXPORT_SYMBOL_GPL(regmap_fields_read);
2504
2505 /**
2506 * regmap_bulk_read(): Read multiple registers from the device
2507 *
2508 * @map: Register map to read from
2509 * @reg: First register to be read from
2510 * @val: Pointer to store read value, in native register size for device
2511 * @val_count: Number of registers to read
2512 *
2513 * A value of zero will be returned on success, a negative errno will
2514 * be returned in error cases.
2515 */
2516 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2517 size_t val_count)
2518 {
2519 int ret, i;
2520 size_t val_bytes = map->format.val_bytes;
2521 bool vol = regmap_volatile_range(map, reg, val_count);
2522
2523 if (!IS_ALIGNED(reg, map->reg_stride))
2524 return -EINVAL;
2525
2526 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2527 /*
2528 * Some devices does not support bulk read, for
2529 * them we have a series of single read operations.
2530 */
2531 size_t total_size = val_bytes * val_count;
2532
2533 if (!map->use_single_read &&
2534 (!map->max_raw_read || map->max_raw_read > total_size)) {
2535 ret = regmap_raw_read(map, reg, val,
2536 val_bytes * val_count);
2537 if (ret != 0)
2538 return ret;
2539 } else {
2540 /*
2541 * Some devices do not support bulk read or do not
2542 * support large bulk reads, for them we have a series
2543 * of read operations.
2544 */
2545 int chunk_stride = map->reg_stride;
2546 size_t chunk_size = val_bytes;
2547 size_t chunk_count = val_count;
2548
2549 if (!map->use_single_read) {
2550 chunk_size = map->max_raw_read;
2551 if (chunk_size % val_bytes)
2552 chunk_size -= chunk_size % val_bytes;
2553 chunk_count = total_size / chunk_size;
2554 chunk_stride *= chunk_size / val_bytes;
2555 }
2556
2557 /* Read bytes that fit into a multiple of chunk_size */
2558 for (i = 0; i < chunk_count; i++) {
2559 ret = regmap_raw_read(map,
2560 reg + (i * chunk_stride),
2561 val + (i * chunk_size),
2562 chunk_size);
2563 if (ret != 0)
2564 return ret;
2565 }
2566
2567 /* Read remaining bytes */
2568 if (chunk_size * i < total_size) {
2569 ret = regmap_raw_read(map,
2570 reg + (i * chunk_stride),
2571 val + (i * chunk_size),
2572 total_size - i * chunk_size);
2573 if (ret != 0)
2574 return ret;
2575 }
2576 }
2577
2578 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2579 map->format.parse_inplace(val + i);
2580 } else {
2581 for (i = 0; i < val_count; i++) {
2582 unsigned int ival;
2583 ret = regmap_read(map, reg + regmap_get_offset(map, i),
2584 &ival);
2585 if (ret != 0)
2586 return ret;
2587
2588 if (map->format.format_val) {
2589 map->format.format_val(val + (i * val_bytes), ival, 0);
2590 } else {
2591 /* Devices providing read and write
2592 * operations can use the bulk I/O
2593 * functions if they define a val_bytes,
2594 * we assume that the values are native
2595 * endian.
2596 */
2597 #ifdef CONFIG_64BIT
2598 u64 *u64 = val;
2599 #endif
2600 u32 *u32 = val;
2601 u16 *u16 = val;
2602 u8 *u8 = val;
2603
2604 switch (map->format.val_bytes) {
2605 #ifdef CONFIG_64BIT
2606 case 8:
2607 u64[i] = ival;
2608 break;
2609 #endif
2610 case 4:
2611 u32[i] = ival;
2612 break;
2613 case 2:
2614 u16[i] = ival;
2615 break;
2616 case 1:
2617 u8[i] = ival;
2618 break;
2619 default:
2620 return -EINVAL;
2621 }
2622 }
2623 }
2624 }
2625
2626 return 0;
2627 }
2628 EXPORT_SYMBOL_GPL(regmap_bulk_read);
2629
2630 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2631 unsigned int mask, unsigned int val,
2632 bool *change, bool force_write)
2633 {
2634 int ret;
2635 unsigned int tmp, orig;
2636
2637 if (change)
2638 *change = false;
2639
2640 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2641 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2642 if (ret == 0 && change)
2643 *change = true;
2644 } else {
2645 ret = _regmap_read(map, reg, &orig);
2646 if (ret != 0)
2647 return ret;
2648
2649 tmp = orig & ~mask;
2650 tmp |= val & mask;
2651
2652 if (force_write || (tmp != orig)) {
2653 ret = _regmap_write(map, reg, tmp);
2654 if (ret == 0 && change)
2655 *change = true;
2656 }
2657 }
2658
2659 return ret;
2660 }
2661
2662 /**
2663 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2664 *
2665 * @map: Register map to update
2666 * @reg: Register to update
2667 * @mask: Bitmask to change
2668 * @val: New value for bitmask
2669 *
2670 * Returns zero for success, a negative number on error.
2671 */
2672 int regmap_update_bits(struct regmap *map, unsigned int reg,
2673 unsigned int mask, unsigned int val)
2674 {
2675 int ret;
2676
2677 map->lock(map->lock_arg);
2678 ret = _regmap_update_bits(map, reg, mask, val, NULL, false);
2679 map->unlock(map->lock_arg);
2680
2681 return ret;
2682 }
2683 EXPORT_SYMBOL_GPL(regmap_update_bits);
2684
2685 /**
2686 * regmap_write_bits: Perform a read/modify/write cycle on the register map
2687 *
2688 * @map: Register map to update
2689 * @reg: Register to update
2690 * @mask: Bitmask to change
2691 * @val: New value for bitmask
2692 *
2693 * Returns zero for success, a negative number on error.
2694 */
2695 int regmap_write_bits(struct regmap *map, unsigned int reg,
2696 unsigned int mask, unsigned int val)
2697 {
2698 int ret;
2699
2700 map->lock(map->lock_arg);
2701 ret = _regmap_update_bits(map, reg, mask, val, NULL, true);
2702 map->unlock(map->lock_arg);
2703
2704 return ret;
2705 }
2706 EXPORT_SYMBOL_GPL(regmap_write_bits);
2707
2708 /**
2709 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2710 * map asynchronously
2711 *
2712 * @map: Register map to update
2713 * @reg: Register to update
2714 * @mask: Bitmask to change
2715 * @val: New value for bitmask
2716 *
2717 * With most buses the read must be done synchronously so this is most
2718 * useful for devices with a cache which do not need to interact with
2719 * the hardware to determine the current register value.
2720 *
2721 * Returns zero for success, a negative number on error.
2722 */
2723 int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2724 unsigned int mask, unsigned int val)
2725 {
2726 int ret;
2727
2728 map->lock(map->lock_arg);
2729
2730 map->async = true;
2731
2732 ret = _regmap_update_bits(map, reg, mask, val, NULL, false);
2733
2734 map->async = false;
2735
2736 map->unlock(map->lock_arg);
2737
2738 return ret;
2739 }
2740 EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2741
2742 /**
2743 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2744 * register map and report if updated
2745 *
2746 * @map: Register map to update
2747 * @reg: Register to update
2748 * @mask: Bitmask to change
2749 * @val: New value for bitmask
2750 * @change: Boolean indicating if a write was done
2751 *
2752 * Returns zero for success, a negative number on error.
2753 */
2754 int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2755 unsigned int mask, unsigned int val,
2756 bool *change)
2757 {
2758 int ret;
2759
2760 map->lock(map->lock_arg);
2761 ret = _regmap_update_bits(map, reg, mask, val, change, false);
2762 map->unlock(map->lock_arg);
2763 return ret;
2764 }
2765 EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2766
2767 /**
2768 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2769 * register map asynchronously and report if
2770 * updated
2771 *
2772 * @map: Register map to update
2773 * @reg: Register to update
2774 * @mask: Bitmask to change
2775 * @val: New value for bitmask
2776 * @change: Boolean indicating if a write was done
2777 *
2778 * With most buses the read must be done synchronously so this is most
2779 * useful for devices with a cache which do not need to interact with
2780 * the hardware to determine the current register value.
2781 *
2782 * Returns zero for success, a negative number on error.
2783 */
2784 int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2785 unsigned int mask, unsigned int val,
2786 bool *change)
2787 {
2788 int ret;
2789
2790 map->lock(map->lock_arg);
2791
2792 map->async = true;
2793
2794 ret = _regmap_update_bits(map, reg, mask, val, change, false);
2795
2796 map->async = false;
2797
2798 map->unlock(map->lock_arg);
2799
2800 return ret;
2801 }
2802 EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2803
2804 void regmap_async_complete_cb(struct regmap_async *async, int ret)
2805 {
2806 struct regmap *map = async->map;
2807 bool wake;
2808
2809 trace_regmap_async_io_complete(map);
2810
2811 spin_lock(&map->async_lock);
2812 list_move(&async->list, &map->async_free);
2813 wake = list_empty(&map->async_list);
2814
2815 if (ret != 0)
2816 map->async_ret = ret;
2817
2818 spin_unlock(&map->async_lock);
2819
2820 if (wake)
2821 wake_up(&map->async_waitq);
2822 }
2823 EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2824
2825 static int regmap_async_is_done(struct regmap *map)
2826 {
2827 unsigned long flags;
2828 int ret;
2829
2830 spin_lock_irqsave(&map->async_lock, flags);
2831 ret = list_empty(&map->async_list);
2832 spin_unlock_irqrestore(&map->async_lock, flags);
2833
2834 return ret;
2835 }
2836
2837 /**
2838 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2839 *
2840 * @map: Map to operate on.
2841 *
2842 * Blocks until any pending asynchronous I/O has completed. Returns
2843 * an error code for any failed I/O operations.
2844 */
2845 int regmap_async_complete(struct regmap *map)
2846 {
2847 unsigned long flags;
2848 int ret;
2849
2850 /* Nothing to do with no async support */
2851 if (!map->bus || !map->bus->async_write)
2852 return 0;
2853
2854 trace_regmap_async_complete_start(map);
2855
2856 wait_event(map->async_waitq, regmap_async_is_done(map));
2857
2858 spin_lock_irqsave(&map->async_lock, flags);
2859 ret = map->async_ret;
2860 map->async_ret = 0;
2861 spin_unlock_irqrestore(&map->async_lock, flags);
2862
2863 trace_regmap_async_complete_done(map);
2864
2865 return ret;
2866 }
2867 EXPORT_SYMBOL_GPL(regmap_async_complete);
2868
2869 /**
2870 * regmap_register_patch: Register and apply register updates to be applied
2871 * on device initialistion
2872 *
2873 * @map: Register map to apply updates to.
2874 * @regs: Values to update.
2875 * @num_regs: Number of entries in regs.
2876 *
2877 * Register a set of register updates to be applied to the device
2878 * whenever the device registers are synchronised with the cache and
2879 * apply them immediately. Typically this is used to apply
2880 * corrections to be applied to the device defaults on startup, such
2881 * as the updates some vendors provide to undocumented registers.
2882 *
2883 * The caller must ensure that this function cannot be called
2884 * concurrently with either itself or regcache_sync().
2885 */
2886 int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
2887 int num_regs)
2888 {
2889 struct reg_sequence *p;
2890 int ret;
2891 bool bypass;
2892
2893 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2894 num_regs))
2895 return 0;
2896
2897 p = krealloc(map->patch,
2898 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
2899 GFP_KERNEL);
2900 if (p) {
2901 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2902 map->patch = p;
2903 map->patch_regs += num_regs;
2904 } else {
2905 return -ENOMEM;
2906 }
2907
2908 map->lock(map->lock_arg);
2909
2910 bypass = map->cache_bypass;
2911
2912 map->cache_bypass = true;
2913 map->async = true;
2914
2915 ret = _regmap_multi_reg_write(map, regs, num_regs);
2916
2917 map->async = false;
2918 map->cache_bypass = bypass;
2919
2920 map->unlock(map->lock_arg);
2921
2922 regmap_async_complete(map);
2923
2924 return ret;
2925 }
2926 EXPORT_SYMBOL_GPL(regmap_register_patch);
2927
2928 /*
2929 * regmap_get_val_bytes(): Report the size of a register value
2930 *
2931 * Report the size of a register value, mainly intended to for use by
2932 * generic infrastructure built on top of regmap.
2933 */
2934 int regmap_get_val_bytes(struct regmap *map)
2935 {
2936 if (map->format.format_write)
2937 return -EINVAL;
2938
2939 return map->format.val_bytes;
2940 }
2941 EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2942
2943 /**
2944 * regmap_get_max_register(): Report the max register value
2945 *
2946 * Report the max register value, mainly intended to for use by
2947 * generic infrastructure built on top of regmap.
2948 */
2949 int regmap_get_max_register(struct regmap *map)
2950 {
2951 return map->max_register ? map->max_register : -EINVAL;
2952 }
2953 EXPORT_SYMBOL_GPL(regmap_get_max_register);
2954
2955 /**
2956 * regmap_get_reg_stride(): Report the register address stride
2957 *
2958 * Report the register address stride, mainly intended to for use by
2959 * generic infrastructure built on top of regmap.
2960 */
2961 int regmap_get_reg_stride(struct regmap *map)
2962 {
2963 return map->reg_stride;
2964 }
2965 EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2966
2967 int regmap_parse_val(struct regmap *map, const void *buf,
2968 unsigned int *val)
2969 {
2970 if (!map->format.parse_val)
2971 return -EINVAL;
2972
2973 *val = map->format.parse_val(buf);
2974
2975 return 0;
2976 }
2977 EXPORT_SYMBOL_GPL(regmap_parse_val);
2978
2979 static int __init regmap_initcall(void)
2980 {
2981 regmap_debugfs_initcall();
2982
2983 return 0;
2984 }
2985 postcore_initcall(regmap_initcall);
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