Merge remote-tracking branch 'sound-asoc/for-next'
[deliverable/linux.git] / drivers / base / regmap / regmap.c
1 /*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/device.h>
14 #include <linux/slab.h>
15 #include <linux/export.h>
16 #include <linux/mutex.h>
17 #include <linux/err.h>
18 #include <linux/of.h>
19 #include <linux/rbtree.h>
20 #include <linux/sched.h>
21 #include <linux/delay.h>
22 #include <linux/log2.h>
23
24 #define CREATE_TRACE_POINTS
25 #include "trace.h"
26
27 #include "internal.h"
28
29 /*
30 * Sometimes for failures during very early init the trace
31 * infrastructure isn't available early enough to be used. For this
32 * sort of problem defining LOG_DEVICE will add printks for basic
33 * register I/O on a specific device.
34 */
35 #undef LOG_DEVICE
36
37 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
38 unsigned int mask, unsigned int val,
39 bool *change, bool force_write);
40
41 static int _regmap_bus_reg_read(void *context, unsigned int reg,
42 unsigned int *val);
43 static int _regmap_bus_read(void *context, unsigned int reg,
44 unsigned int *val);
45 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
46 unsigned int val);
47 static int _regmap_bus_reg_write(void *context, unsigned int reg,
48 unsigned int val);
49 static int _regmap_bus_raw_write(void *context, unsigned int reg,
50 unsigned int val);
51
52 bool regmap_reg_in_ranges(unsigned int reg,
53 const struct regmap_range *ranges,
54 unsigned int nranges)
55 {
56 const struct regmap_range *r;
57 int i;
58
59 for (i = 0, r = ranges; i < nranges; i++, r++)
60 if (regmap_reg_in_range(reg, r))
61 return true;
62 return false;
63 }
64 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
65
66 bool regmap_check_range_table(struct regmap *map, unsigned int reg,
67 const struct regmap_access_table *table)
68 {
69 /* Check "no ranges" first */
70 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
71 return false;
72
73 /* In case zero "yes ranges" are supplied, any reg is OK */
74 if (!table->n_yes_ranges)
75 return true;
76
77 return regmap_reg_in_ranges(reg, table->yes_ranges,
78 table->n_yes_ranges);
79 }
80 EXPORT_SYMBOL_GPL(regmap_check_range_table);
81
82 bool regmap_writeable(struct regmap *map, unsigned int reg)
83 {
84 if (map->max_register && reg > map->max_register)
85 return false;
86
87 if (map->writeable_reg)
88 return map->writeable_reg(map->dev, reg);
89
90 if (map->wr_table)
91 return regmap_check_range_table(map, reg, map->wr_table);
92
93 return true;
94 }
95
96 bool regmap_cached(struct regmap *map, unsigned int reg)
97 {
98 int ret;
99 unsigned int val;
100
101 if (map->cache == REGCACHE_NONE)
102 return false;
103
104 if (!map->cache_ops)
105 return false;
106
107 if (map->max_register && reg > map->max_register)
108 return false;
109
110 map->lock(map->lock_arg);
111 ret = regcache_read(map, reg, &val);
112 map->unlock(map->lock_arg);
113 if (ret)
114 return false;
115
116 return true;
117 }
118
119 bool regmap_readable(struct regmap *map, unsigned int reg)
120 {
121 if (!map->reg_read)
122 return false;
123
124 if (map->max_register && reg > map->max_register)
125 return false;
126
127 if (map->format.format_write)
128 return false;
129
130 if (map->readable_reg)
131 return map->readable_reg(map->dev, reg);
132
133 if (map->rd_table)
134 return regmap_check_range_table(map, reg, map->rd_table);
135
136 return true;
137 }
138
139 bool regmap_volatile(struct regmap *map, unsigned int reg)
140 {
141 if (!map->format.format_write && !regmap_readable(map, reg))
142 return false;
143
144 if (map->volatile_reg)
145 return map->volatile_reg(map->dev, reg);
146
147 if (map->volatile_table)
148 return regmap_check_range_table(map, reg, map->volatile_table);
149
150 if (map->cache_ops)
151 return false;
152 else
153 return true;
154 }
155
156 bool regmap_precious(struct regmap *map, unsigned int reg)
157 {
158 if (!regmap_readable(map, reg))
159 return false;
160
161 if (map->precious_reg)
162 return map->precious_reg(map->dev, reg);
163
164 if (map->precious_table)
165 return regmap_check_range_table(map, reg, map->precious_table);
166
167 return false;
168 }
169
170 static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
171 size_t num)
172 {
173 unsigned int i;
174
175 for (i = 0; i < num; i++)
176 if (!regmap_volatile(map, reg + i))
177 return false;
178
179 return true;
180 }
181
182 static void regmap_format_2_6_write(struct regmap *map,
183 unsigned int reg, unsigned int val)
184 {
185 u8 *out = map->work_buf;
186
187 *out = (reg << 6) | val;
188 }
189
190 static void regmap_format_4_12_write(struct regmap *map,
191 unsigned int reg, unsigned int val)
192 {
193 __be16 *out = map->work_buf;
194 *out = cpu_to_be16((reg << 12) | val);
195 }
196
197 static void regmap_format_7_9_write(struct regmap *map,
198 unsigned int reg, unsigned int val)
199 {
200 __be16 *out = map->work_buf;
201 *out = cpu_to_be16((reg << 9) | val);
202 }
203
204 static void regmap_format_10_14_write(struct regmap *map,
205 unsigned int reg, unsigned int val)
206 {
207 u8 *out = map->work_buf;
208
209 out[2] = val;
210 out[1] = (val >> 8) | (reg << 6);
211 out[0] = reg >> 2;
212 }
213
214 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
215 {
216 u8 *b = buf;
217
218 b[0] = val << shift;
219 }
220
221 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
222 {
223 __be16 *b = buf;
224
225 b[0] = cpu_to_be16(val << shift);
226 }
227
228 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
229 {
230 __le16 *b = buf;
231
232 b[0] = cpu_to_le16(val << shift);
233 }
234
235 static void regmap_format_16_native(void *buf, unsigned int val,
236 unsigned int shift)
237 {
238 *(u16 *)buf = val << shift;
239 }
240
241 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
242 {
243 u8 *b = buf;
244
245 val <<= shift;
246
247 b[0] = val >> 16;
248 b[1] = val >> 8;
249 b[2] = val;
250 }
251
252 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
253 {
254 __be32 *b = buf;
255
256 b[0] = cpu_to_be32(val << shift);
257 }
258
259 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
260 {
261 __le32 *b = buf;
262
263 b[0] = cpu_to_le32(val << shift);
264 }
265
266 static void regmap_format_32_native(void *buf, unsigned int val,
267 unsigned int shift)
268 {
269 *(u32 *)buf = val << shift;
270 }
271
272 #ifdef CONFIG_64BIT
273 static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
274 {
275 __be64 *b = buf;
276
277 b[0] = cpu_to_be64((u64)val << shift);
278 }
279
280 static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
281 {
282 __le64 *b = buf;
283
284 b[0] = cpu_to_le64((u64)val << shift);
285 }
286
287 static void regmap_format_64_native(void *buf, unsigned int val,
288 unsigned int shift)
289 {
290 *(u64 *)buf = (u64)val << shift;
291 }
292 #endif
293
294 static void regmap_parse_inplace_noop(void *buf)
295 {
296 }
297
298 static unsigned int regmap_parse_8(const void *buf)
299 {
300 const u8 *b = buf;
301
302 return b[0];
303 }
304
305 static unsigned int regmap_parse_16_be(const void *buf)
306 {
307 const __be16 *b = buf;
308
309 return be16_to_cpu(b[0]);
310 }
311
312 static unsigned int regmap_parse_16_le(const void *buf)
313 {
314 const __le16 *b = buf;
315
316 return le16_to_cpu(b[0]);
317 }
318
319 static void regmap_parse_16_be_inplace(void *buf)
320 {
321 __be16 *b = buf;
322
323 b[0] = be16_to_cpu(b[0]);
324 }
325
326 static void regmap_parse_16_le_inplace(void *buf)
327 {
328 __le16 *b = buf;
329
330 b[0] = le16_to_cpu(b[0]);
331 }
332
333 static unsigned int regmap_parse_16_native(const void *buf)
334 {
335 return *(u16 *)buf;
336 }
337
338 static unsigned int regmap_parse_24(const void *buf)
339 {
340 const u8 *b = buf;
341 unsigned int ret = b[2];
342 ret |= ((unsigned int)b[1]) << 8;
343 ret |= ((unsigned int)b[0]) << 16;
344
345 return ret;
346 }
347
348 static unsigned int regmap_parse_32_be(const void *buf)
349 {
350 const __be32 *b = buf;
351
352 return be32_to_cpu(b[0]);
353 }
354
355 static unsigned int regmap_parse_32_le(const void *buf)
356 {
357 const __le32 *b = buf;
358
359 return le32_to_cpu(b[0]);
360 }
361
362 static void regmap_parse_32_be_inplace(void *buf)
363 {
364 __be32 *b = buf;
365
366 b[0] = be32_to_cpu(b[0]);
367 }
368
369 static void regmap_parse_32_le_inplace(void *buf)
370 {
371 __le32 *b = buf;
372
373 b[0] = le32_to_cpu(b[0]);
374 }
375
376 static unsigned int regmap_parse_32_native(const void *buf)
377 {
378 return *(u32 *)buf;
379 }
380
381 #ifdef CONFIG_64BIT
382 static unsigned int regmap_parse_64_be(const void *buf)
383 {
384 const __be64 *b = buf;
385
386 return be64_to_cpu(b[0]);
387 }
388
389 static unsigned int regmap_parse_64_le(const void *buf)
390 {
391 const __le64 *b = buf;
392
393 return le64_to_cpu(b[0]);
394 }
395
396 static void regmap_parse_64_be_inplace(void *buf)
397 {
398 __be64 *b = buf;
399
400 b[0] = be64_to_cpu(b[0]);
401 }
402
403 static void regmap_parse_64_le_inplace(void *buf)
404 {
405 __le64 *b = buf;
406
407 b[0] = le64_to_cpu(b[0]);
408 }
409
410 static unsigned int regmap_parse_64_native(const void *buf)
411 {
412 return *(u64 *)buf;
413 }
414 #endif
415
416 static void regmap_lock_mutex(void *__map)
417 {
418 struct regmap *map = __map;
419 mutex_lock(&map->mutex);
420 }
421
422 static void regmap_unlock_mutex(void *__map)
423 {
424 struct regmap *map = __map;
425 mutex_unlock(&map->mutex);
426 }
427
428 static void regmap_lock_spinlock(void *__map)
429 __acquires(&map->spinlock)
430 {
431 struct regmap *map = __map;
432 unsigned long flags;
433
434 spin_lock_irqsave(&map->spinlock, flags);
435 map->spinlock_flags = flags;
436 }
437
438 static void regmap_unlock_spinlock(void *__map)
439 __releases(&map->spinlock)
440 {
441 struct regmap *map = __map;
442 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
443 }
444
445 static void dev_get_regmap_release(struct device *dev, void *res)
446 {
447 /*
448 * We don't actually have anything to do here; the goal here
449 * is not to manage the regmap but to provide a simple way to
450 * get the regmap back given a struct device.
451 */
452 }
453
454 static bool _regmap_range_add(struct regmap *map,
455 struct regmap_range_node *data)
456 {
457 struct rb_root *root = &map->range_tree;
458 struct rb_node **new = &(root->rb_node), *parent = NULL;
459
460 while (*new) {
461 struct regmap_range_node *this =
462 container_of(*new, struct regmap_range_node, node);
463
464 parent = *new;
465 if (data->range_max < this->range_min)
466 new = &((*new)->rb_left);
467 else if (data->range_min > this->range_max)
468 new = &((*new)->rb_right);
469 else
470 return false;
471 }
472
473 rb_link_node(&data->node, parent, new);
474 rb_insert_color(&data->node, root);
475
476 return true;
477 }
478
479 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
480 unsigned int reg)
481 {
482 struct rb_node *node = map->range_tree.rb_node;
483
484 while (node) {
485 struct regmap_range_node *this =
486 container_of(node, struct regmap_range_node, node);
487
488 if (reg < this->range_min)
489 node = node->rb_left;
490 else if (reg > this->range_max)
491 node = node->rb_right;
492 else
493 return this;
494 }
495
496 return NULL;
497 }
498
499 static void regmap_range_exit(struct regmap *map)
500 {
501 struct rb_node *next;
502 struct regmap_range_node *range_node;
503
504 next = rb_first(&map->range_tree);
505 while (next) {
506 range_node = rb_entry(next, struct regmap_range_node, node);
507 next = rb_next(&range_node->node);
508 rb_erase(&range_node->node, &map->range_tree);
509 kfree(range_node);
510 }
511
512 kfree(map->selector_work_buf);
513 }
514
515 int regmap_attach_dev(struct device *dev, struct regmap *map,
516 const struct regmap_config *config)
517 {
518 struct regmap **m;
519
520 map->dev = dev;
521
522 regmap_debugfs_init(map, config->name);
523
524 /* Add a devres resource for dev_get_regmap() */
525 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
526 if (!m) {
527 regmap_debugfs_exit(map);
528 return -ENOMEM;
529 }
530 *m = map;
531 devres_add(dev, m);
532
533 return 0;
534 }
535 EXPORT_SYMBOL_GPL(regmap_attach_dev);
536
537 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
538 const struct regmap_config *config)
539 {
540 enum regmap_endian endian;
541
542 /* Retrieve the endianness specification from the regmap config */
543 endian = config->reg_format_endian;
544
545 /* If the regmap config specified a non-default value, use that */
546 if (endian != REGMAP_ENDIAN_DEFAULT)
547 return endian;
548
549 /* Retrieve the endianness specification from the bus config */
550 if (bus && bus->reg_format_endian_default)
551 endian = bus->reg_format_endian_default;
552
553 /* If the bus specified a non-default value, use that */
554 if (endian != REGMAP_ENDIAN_DEFAULT)
555 return endian;
556
557 /* Use this if no other value was found */
558 return REGMAP_ENDIAN_BIG;
559 }
560
561 enum regmap_endian regmap_get_val_endian(struct device *dev,
562 const struct regmap_bus *bus,
563 const struct regmap_config *config)
564 {
565 struct device_node *np;
566 enum regmap_endian endian;
567
568 /* Retrieve the endianness specification from the regmap config */
569 endian = config->val_format_endian;
570
571 /* If the regmap config specified a non-default value, use that */
572 if (endian != REGMAP_ENDIAN_DEFAULT)
573 return endian;
574
575 /* If the dev and dev->of_node exist try to get endianness from DT */
576 if (dev && dev->of_node) {
577 np = dev->of_node;
578
579 /* Parse the device's DT node for an endianness specification */
580 if (of_property_read_bool(np, "big-endian"))
581 endian = REGMAP_ENDIAN_BIG;
582 else if (of_property_read_bool(np, "little-endian"))
583 endian = REGMAP_ENDIAN_LITTLE;
584 else if (of_property_read_bool(np, "native-endian"))
585 endian = REGMAP_ENDIAN_NATIVE;
586
587 /* If the endianness was specified in DT, use that */
588 if (endian != REGMAP_ENDIAN_DEFAULT)
589 return endian;
590 }
591
592 /* Retrieve the endianness specification from the bus config */
593 if (bus && bus->val_format_endian_default)
594 endian = bus->val_format_endian_default;
595
596 /* If the bus specified a non-default value, use that */
597 if (endian != REGMAP_ENDIAN_DEFAULT)
598 return endian;
599
600 /* Use this if no other value was found */
601 return REGMAP_ENDIAN_BIG;
602 }
603 EXPORT_SYMBOL_GPL(regmap_get_val_endian);
604
605 struct regmap *__regmap_init(struct device *dev,
606 const struct regmap_bus *bus,
607 void *bus_context,
608 const struct regmap_config *config,
609 struct lock_class_key *lock_key,
610 const char *lock_name)
611 {
612 struct regmap *map;
613 int ret = -EINVAL;
614 enum regmap_endian reg_endian, val_endian;
615 int i, j;
616
617 if (!config)
618 goto err;
619
620 map = kzalloc(sizeof(*map), GFP_KERNEL);
621 if (map == NULL) {
622 ret = -ENOMEM;
623 goto err;
624 }
625
626 if (config->lock && config->unlock) {
627 map->lock = config->lock;
628 map->unlock = config->unlock;
629 map->lock_arg = config->lock_arg;
630 } else {
631 if ((bus && bus->fast_io) ||
632 config->fast_io) {
633 spin_lock_init(&map->spinlock);
634 map->lock = regmap_lock_spinlock;
635 map->unlock = regmap_unlock_spinlock;
636 lockdep_set_class_and_name(&map->spinlock,
637 lock_key, lock_name);
638 } else {
639 mutex_init(&map->mutex);
640 map->lock = regmap_lock_mutex;
641 map->unlock = regmap_unlock_mutex;
642 lockdep_set_class_and_name(&map->mutex,
643 lock_key, lock_name);
644 }
645 map->lock_arg = map;
646 }
647
648 /*
649 * When we write in fast-paths with regmap_bulk_write() don't allocate
650 * scratch buffers with sleeping allocations.
651 */
652 if ((bus && bus->fast_io) || config->fast_io)
653 map->alloc_flags = GFP_ATOMIC;
654 else
655 map->alloc_flags = GFP_KERNEL;
656
657 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
658 map->format.pad_bytes = config->pad_bits / 8;
659 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
660 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
661 config->val_bits + config->pad_bits, 8);
662 map->reg_shift = config->pad_bits % 8;
663 if (config->reg_stride)
664 map->reg_stride = config->reg_stride;
665 else
666 map->reg_stride = 1;
667 if (is_power_of_2(map->reg_stride))
668 map->reg_stride_order = ilog2(map->reg_stride);
669 else
670 map->reg_stride_order = -1;
671 map->use_single_read = config->use_single_rw || !bus || !bus->read;
672 map->use_single_write = config->use_single_rw || !bus || !bus->write;
673 map->can_multi_write = config->can_multi_write && bus && bus->write;
674 if (bus) {
675 map->max_raw_read = bus->max_raw_read;
676 map->max_raw_write = bus->max_raw_write;
677 }
678 map->dev = dev;
679 map->bus = bus;
680 map->bus_context = bus_context;
681 map->max_register = config->max_register;
682 map->wr_table = config->wr_table;
683 map->rd_table = config->rd_table;
684 map->volatile_table = config->volatile_table;
685 map->precious_table = config->precious_table;
686 map->writeable_reg = config->writeable_reg;
687 map->readable_reg = config->readable_reg;
688 map->volatile_reg = config->volatile_reg;
689 map->precious_reg = config->precious_reg;
690 map->cache_type = config->cache_type;
691 map->name = config->name;
692
693 spin_lock_init(&map->async_lock);
694 INIT_LIST_HEAD(&map->async_list);
695 INIT_LIST_HEAD(&map->async_free);
696 init_waitqueue_head(&map->async_waitq);
697
698 if (config->read_flag_mask || config->write_flag_mask) {
699 map->read_flag_mask = config->read_flag_mask;
700 map->write_flag_mask = config->write_flag_mask;
701 } else if (bus) {
702 map->read_flag_mask = bus->read_flag_mask;
703 }
704
705 if (!bus) {
706 map->reg_read = config->reg_read;
707 map->reg_write = config->reg_write;
708
709 map->defer_caching = false;
710 goto skip_format_initialization;
711 } else if (!bus->read || !bus->write) {
712 map->reg_read = _regmap_bus_reg_read;
713 map->reg_write = _regmap_bus_reg_write;
714
715 map->defer_caching = false;
716 goto skip_format_initialization;
717 } else {
718 map->reg_read = _regmap_bus_read;
719 map->reg_update_bits = bus->reg_update_bits;
720 }
721
722 reg_endian = regmap_get_reg_endian(bus, config);
723 val_endian = regmap_get_val_endian(dev, bus, config);
724
725 switch (config->reg_bits + map->reg_shift) {
726 case 2:
727 switch (config->val_bits) {
728 case 6:
729 map->format.format_write = regmap_format_2_6_write;
730 break;
731 default:
732 goto err_map;
733 }
734 break;
735
736 case 4:
737 switch (config->val_bits) {
738 case 12:
739 map->format.format_write = regmap_format_4_12_write;
740 break;
741 default:
742 goto err_map;
743 }
744 break;
745
746 case 7:
747 switch (config->val_bits) {
748 case 9:
749 map->format.format_write = regmap_format_7_9_write;
750 break;
751 default:
752 goto err_map;
753 }
754 break;
755
756 case 10:
757 switch (config->val_bits) {
758 case 14:
759 map->format.format_write = regmap_format_10_14_write;
760 break;
761 default:
762 goto err_map;
763 }
764 break;
765
766 case 8:
767 map->format.format_reg = regmap_format_8;
768 break;
769
770 case 16:
771 switch (reg_endian) {
772 case REGMAP_ENDIAN_BIG:
773 map->format.format_reg = regmap_format_16_be;
774 break;
775 case REGMAP_ENDIAN_NATIVE:
776 map->format.format_reg = regmap_format_16_native;
777 break;
778 default:
779 goto err_map;
780 }
781 break;
782
783 case 24:
784 if (reg_endian != REGMAP_ENDIAN_BIG)
785 goto err_map;
786 map->format.format_reg = regmap_format_24;
787 break;
788
789 case 32:
790 switch (reg_endian) {
791 case REGMAP_ENDIAN_BIG:
792 map->format.format_reg = regmap_format_32_be;
793 break;
794 case REGMAP_ENDIAN_NATIVE:
795 map->format.format_reg = regmap_format_32_native;
796 break;
797 default:
798 goto err_map;
799 }
800 break;
801
802 #ifdef CONFIG_64BIT
803 case 64:
804 switch (reg_endian) {
805 case REGMAP_ENDIAN_BIG:
806 map->format.format_reg = regmap_format_64_be;
807 break;
808 case REGMAP_ENDIAN_NATIVE:
809 map->format.format_reg = regmap_format_64_native;
810 break;
811 default:
812 goto err_map;
813 }
814 break;
815 #endif
816
817 default:
818 goto err_map;
819 }
820
821 if (val_endian == REGMAP_ENDIAN_NATIVE)
822 map->format.parse_inplace = regmap_parse_inplace_noop;
823
824 switch (config->val_bits) {
825 case 8:
826 map->format.format_val = regmap_format_8;
827 map->format.parse_val = regmap_parse_8;
828 map->format.parse_inplace = regmap_parse_inplace_noop;
829 break;
830 case 16:
831 switch (val_endian) {
832 case REGMAP_ENDIAN_BIG:
833 map->format.format_val = regmap_format_16_be;
834 map->format.parse_val = regmap_parse_16_be;
835 map->format.parse_inplace = regmap_parse_16_be_inplace;
836 break;
837 case REGMAP_ENDIAN_LITTLE:
838 map->format.format_val = regmap_format_16_le;
839 map->format.parse_val = regmap_parse_16_le;
840 map->format.parse_inplace = regmap_parse_16_le_inplace;
841 break;
842 case REGMAP_ENDIAN_NATIVE:
843 map->format.format_val = regmap_format_16_native;
844 map->format.parse_val = regmap_parse_16_native;
845 break;
846 default:
847 goto err_map;
848 }
849 break;
850 case 24:
851 if (val_endian != REGMAP_ENDIAN_BIG)
852 goto err_map;
853 map->format.format_val = regmap_format_24;
854 map->format.parse_val = regmap_parse_24;
855 break;
856 case 32:
857 switch (val_endian) {
858 case REGMAP_ENDIAN_BIG:
859 map->format.format_val = regmap_format_32_be;
860 map->format.parse_val = regmap_parse_32_be;
861 map->format.parse_inplace = regmap_parse_32_be_inplace;
862 break;
863 case REGMAP_ENDIAN_LITTLE:
864 map->format.format_val = regmap_format_32_le;
865 map->format.parse_val = regmap_parse_32_le;
866 map->format.parse_inplace = regmap_parse_32_le_inplace;
867 break;
868 case REGMAP_ENDIAN_NATIVE:
869 map->format.format_val = regmap_format_32_native;
870 map->format.parse_val = regmap_parse_32_native;
871 break;
872 default:
873 goto err_map;
874 }
875 break;
876 #ifdef CONFIG_64BIT
877 case 64:
878 switch (val_endian) {
879 case REGMAP_ENDIAN_BIG:
880 map->format.format_val = regmap_format_64_be;
881 map->format.parse_val = regmap_parse_64_be;
882 map->format.parse_inplace = regmap_parse_64_be_inplace;
883 break;
884 case REGMAP_ENDIAN_LITTLE:
885 map->format.format_val = regmap_format_64_le;
886 map->format.parse_val = regmap_parse_64_le;
887 map->format.parse_inplace = regmap_parse_64_le_inplace;
888 break;
889 case REGMAP_ENDIAN_NATIVE:
890 map->format.format_val = regmap_format_64_native;
891 map->format.parse_val = regmap_parse_64_native;
892 break;
893 default:
894 goto err_map;
895 }
896 break;
897 #endif
898 }
899
900 if (map->format.format_write) {
901 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
902 (val_endian != REGMAP_ENDIAN_BIG))
903 goto err_map;
904 map->use_single_write = true;
905 }
906
907 if (!map->format.format_write &&
908 !(map->format.format_reg && map->format.format_val))
909 goto err_map;
910
911 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
912 if (map->work_buf == NULL) {
913 ret = -ENOMEM;
914 goto err_map;
915 }
916
917 if (map->format.format_write) {
918 map->defer_caching = false;
919 map->reg_write = _regmap_bus_formatted_write;
920 } else if (map->format.format_val) {
921 map->defer_caching = true;
922 map->reg_write = _regmap_bus_raw_write;
923 }
924
925 skip_format_initialization:
926
927 map->range_tree = RB_ROOT;
928 for (i = 0; i < config->num_ranges; i++) {
929 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
930 struct regmap_range_node *new;
931
932 /* Sanity check */
933 if (range_cfg->range_max < range_cfg->range_min) {
934 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
935 range_cfg->range_max, range_cfg->range_min);
936 goto err_range;
937 }
938
939 if (range_cfg->range_max > map->max_register) {
940 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
941 range_cfg->range_max, map->max_register);
942 goto err_range;
943 }
944
945 if (range_cfg->selector_reg > map->max_register) {
946 dev_err(map->dev,
947 "Invalid range %d: selector out of map\n", i);
948 goto err_range;
949 }
950
951 if (range_cfg->window_len == 0) {
952 dev_err(map->dev, "Invalid range %d: window_len 0\n",
953 i);
954 goto err_range;
955 }
956
957 /* Make sure, that this register range has no selector
958 or data window within its boundary */
959 for (j = 0; j < config->num_ranges; j++) {
960 unsigned sel_reg = config->ranges[j].selector_reg;
961 unsigned win_min = config->ranges[j].window_start;
962 unsigned win_max = win_min +
963 config->ranges[j].window_len - 1;
964
965 /* Allow data window inside its own virtual range */
966 if (j == i)
967 continue;
968
969 if (range_cfg->range_min <= sel_reg &&
970 sel_reg <= range_cfg->range_max) {
971 dev_err(map->dev,
972 "Range %d: selector for %d in window\n",
973 i, j);
974 goto err_range;
975 }
976
977 if (!(win_max < range_cfg->range_min ||
978 win_min > range_cfg->range_max)) {
979 dev_err(map->dev,
980 "Range %d: window for %d in window\n",
981 i, j);
982 goto err_range;
983 }
984 }
985
986 new = kzalloc(sizeof(*new), GFP_KERNEL);
987 if (new == NULL) {
988 ret = -ENOMEM;
989 goto err_range;
990 }
991
992 new->map = map;
993 new->name = range_cfg->name;
994 new->range_min = range_cfg->range_min;
995 new->range_max = range_cfg->range_max;
996 new->selector_reg = range_cfg->selector_reg;
997 new->selector_mask = range_cfg->selector_mask;
998 new->selector_shift = range_cfg->selector_shift;
999 new->window_start = range_cfg->window_start;
1000 new->window_len = range_cfg->window_len;
1001
1002 if (!_regmap_range_add(map, new)) {
1003 dev_err(map->dev, "Failed to add range %d\n", i);
1004 kfree(new);
1005 goto err_range;
1006 }
1007
1008 if (map->selector_work_buf == NULL) {
1009 map->selector_work_buf =
1010 kzalloc(map->format.buf_size, GFP_KERNEL);
1011 if (map->selector_work_buf == NULL) {
1012 ret = -ENOMEM;
1013 goto err_range;
1014 }
1015 }
1016 }
1017
1018 ret = regcache_init(map, config);
1019 if (ret != 0)
1020 goto err_range;
1021
1022 if (dev) {
1023 ret = regmap_attach_dev(dev, map, config);
1024 if (ret != 0)
1025 goto err_regcache;
1026 }
1027
1028 return map;
1029
1030 err_regcache:
1031 regcache_exit(map);
1032 err_range:
1033 regmap_range_exit(map);
1034 kfree(map->work_buf);
1035 err_map:
1036 kfree(map);
1037 err:
1038 return ERR_PTR(ret);
1039 }
1040 EXPORT_SYMBOL_GPL(__regmap_init);
1041
1042 static void devm_regmap_release(struct device *dev, void *res)
1043 {
1044 regmap_exit(*(struct regmap **)res);
1045 }
1046
1047 struct regmap *__devm_regmap_init(struct device *dev,
1048 const struct regmap_bus *bus,
1049 void *bus_context,
1050 const struct regmap_config *config,
1051 struct lock_class_key *lock_key,
1052 const char *lock_name)
1053 {
1054 struct regmap **ptr, *regmap;
1055
1056 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1057 if (!ptr)
1058 return ERR_PTR(-ENOMEM);
1059
1060 regmap = __regmap_init(dev, bus, bus_context, config,
1061 lock_key, lock_name);
1062 if (!IS_ERR(regmap)) {
1063 *ptr = regmap;
1064 devres_add(dev, ptr);
1065 } else {
1066 devres_free(ptr);
1067 }
1068
1069 return regmap;
1070 }
1071 EXPORT_SYMBOL_GPL(__devm_regmap_init);
1072
1073 static void regmap_field_init(struct regmap_field *rm_field,
1074 struct regmap *regmap, struct reg_field reg_field)
1075 {
1076 rm_field->regmap = regmap;
1077 rm_field->reg = reg_field.reg;
1078 rm_field->shift = reg_field.lsb;
1079 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1080 rm_field->id_size = reg_field.id_size;
1081 rm_field->id_offset = reg_field.id_offset;
1082 }
1083
1084 /**
1085 * devm_regmap_field_alloc(): Allocate and initialise a register field
1086 * in a register map.
1087 *
1088 * @dev: Device that will be interacted with
1089 * @regmap: regmap bank in which this register field is located.
1090 * @reg_field: Register field with in the bank.
1091 *
1092 * The return value will be an ERR_PTR() on error or a valid pointer
1093 * to a struct regmap_field. The regmap_field will be automatically freed
1094 * by the device management code.
1095 */
1096 struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1097 struct regmap *regmap, struct reg_field reg_field)
1098 {
1099 struct regmap_field *rm_field = devm_kzalloc(dev,
1100 sizeof(*rm_field), GFP_KERNEL);
1101 if (!rm_field)
1102 return ERR_PTR(-ENOMEM);
1103
1104 regmap_field_init(rm_field, regmap, reg_field);
1105
1106 return rm_field;
1107
1108 }
1109 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1110
1111 /**
1112 * devm_regmap_field_free(): Free register field allocated using
1113 * devm_regmap_field_alloc. Usally drivers need not call this function,
1114 * as the memory allocated via devm will be freed as per device-driver
1115 * life-cyle.
1116 *
1117 * @dev: Device that will be interacted with
1118 * @field: regmap field which should be freed.
1119 */
1120 void devm_regmap_field_free(struct device *dev,
1121 struct regmap_field *field)
1122 {
1123 devm_kfree(dev, field);
1124 }
1125 EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1126
1127 /**
1128 * regmap_field_alloc(): Allocate and initialise a register field
1129 * in a register map.
1130 *
1131 * @regmap: regmap bank in which this register field is located.
1132 * @reg_field: Register field with in the bank.
1133 *
1134 * The return value will be an ERR_PTR() on error or a valid pointer
1135 * to a struct regmap_field. The regmap_field should be freed by the
1136 * user once its finished working with it using regmap_field_free().
1137 */
1138 struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1139 struct reg_field reg_field)
1140 {
1141 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1142
1143 if (!rm_field)
1144 return ERR_PTR(-ENOMEM);
1145
1146 regmap_field_init(rm_field, regmap, reg_field);
1147
1148 return rm_field;
1149 }
1150 EXPORT_SYMBOL_GPL(regmap_field_alloc);
1151
1152 /**
1153 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1154 *
1155 * @field: regmap field which should be freed.
1156 */
1157 void regmap_field_free(struct regmap_field *field)
1158 {
1159 kfree(field);
1160 }
1161 EXPORT_SYMBOL_GPL(regmap_field_free);
1162
1163 /**
1164 * regmap_reinit_cache(): Reinitialise the current register cache
1165 *
1166 * @map: Register map to operate on.
1167 * @config: New configuration. Only the cache data will be used.
1168 *
1169 * Discard any existing register cache for the map and initialize a
1170 * new cache. This can be used to restore the cache to defaults or to
1171 * update the cache configuration to reflect runtime discovery of the
1172 * hardware.
1173 *
1174 * No explicit locking is done here, the user needs to ensure that
1175 * this function will not race with other calls to regmap.
1176 */
1177 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1178 {
1179 regcache_exit(map);
1180 regmap_debugfs_exit(map);
1181
1182 map->max_register = config->max_register;
1183 map->writeable_reg = config->writeable_reg;
1184 map->readable_reg = config->readable_reg;
1185 map->volatile_reg = config->volatile_reg;
1186 map->precious_reg = config->precious_reg;
1187 map->cache_type = config->cache_type;
1188
1189 regmap_debugfs_init(map, config->name);
1190
1191 map->cache_bypass = false;
1192 map->cache_only = false;
1193
1194 return regcache_init(map, config);
1195 }
1196 EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1197
1198 /**
1199 * regmap_exit(): Free a previously allocated register map
1200 */
1201 void regmap_exit(struct regmap *map)
1202 {
1203 struct regmap_async *async;
1204
1205 regcache_exit(map);
1206 regmap_debugfs_exit(map);
1207 regmap_range_exit(map);
1208 if (map->bus && map->bus->free_context)
1209 map->bus->free_context(map->bus_context);
1210 kfree(map->work_buf);
1211 while (!list_empty(&map->async_free)) {
1212 async = list_first_entry_or_null(&map->async_free,
1213 struct regmap_async,
1214 list);
1215 list_del(&async->list);
1216 kfree(async->work_buf);
1217 kfree(async);
1218 }
1219 kfree(map);
1220 }
1221 EXPORT_SYMBOL_GPL(regmap_exit);
1222
1223 static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1224 {
1225 struct regmap **r = res;
1226 if (!r || !*r) {
1227 WARN_ON(!r || !*r);
1228 return 0;
1229 }
1230
1231 /* If the user didn't specify a name match any */
1232 if (data)
1233 return (*r)->name == data;
1234 else
1235 return 1;
1236 }
1237
1238 /**
1239 * dev_get_regmap(): Obtain the regmap (if any) for a device
1240 *
1241 * @dev: Device to retrieve the map for
1242 * @name: Optional name for the register map, usually NULL.
1243 *
1244 * Returns the regmap for the device if one is present, or NULL. If
1245 * name is specified then it must match the name specified when
1246 * registering the device, if it is NULL then the first regmap found
1247 * will be used. Devices with multiple register maps are very rare,
1248 * generic code should normally not need to specify a name.
1249 */
1250 struct regmap *dev_get_regmap(struct device *dev, const char *name)
1251 {
1252 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1253 dev_get_regmap_match, (void *)name);
1254
1255 if (!r)
1256 return NULL;
1257 return *r;
1258 }
1259 EXPORT_SYMBOL_GPL(dev_get_regmap);
1260
1261 /**
1262 * regmap_get_device(): Obtain the device from a regmap
1263 *
1264 * @map: Register map to operate on.
1265 *
1266 * Returns the underlying device that the regmap has been created for.
1267 */
1268 struct device *regmap_get_device(struct regmap *map)
1269 {
1270 return map->dev;
1271 }
1272 EXPORT_SYMBOL_GPL(regmap_get_device);
1273
1274 static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1275 struct regmap_range_node *range,
1276 unsigned int val_num)
1277 {
1278 void *orig_work_buf;
1279 unsigned int win_offset;
1280 unsigned int win_page;
1281 bool page_chg;
1282 int ret;
1283
1284 win_offset = (*reg - range->range_min) % range->window_len;
1285 win_page = (*reg - range->range_min) / range->window_len;
1286
1287 if (val_num > 1) {
1288 /* Bulk write shouldn't cross range boundary */
1289 if (*reg + val_num - 1 > range->range_max)
1290 return -EINVAL;
1291
1292 /* ... or single page boundary */
1293 if (val_num > range->window_len - win_offset)
1294 return -EINVAL;
1295 }
1296
1297 /* It is possible to have selector register inside data window.
1298 In that case, selector register is located on every page and
1299 it needs no page switching, when accessed alone. */
1300 if (val_num > 1 ||
1301 range->window_start + win_offset != range->selector_reg) {
1302 /* Use separate work_buf during page switching */
1303 orig_work_buf = map->work_buf;
1304 map->work_buf = map->selector_work_buf;
1305
1306 ret = _regmap_update_bits(map, range->selector_reg,
1307 range->selector_mask,
1308 win_page << range->selector_shift,
1309 &page_chg, false);
1310
1311 map->work_buf = orig_work_buf;
1312
1313 if (ret != 0)
1314 return ret;
1315 }
1316
1317 *reg = range->window_start + win_offset;
1318
1319 return 0;
1320 }
1321
1322 int _regmap_raw_write(struct regmap *map, unsigned int reg,
1323 const void *val, size_t val_len)
1324 {
1325 struct regmap_range_node *range;
1326 unsigned long flags;
1327 u8 *u8 = map->work_buf;
1328 void *work_val = map->work_buf + map->format.reg_bytes +
1329 map->format.pad_bytes;
1330 void *buf;
1331 int ret = -ENOTSUPP;
1332 size_t len;
1333 int i;
1334
1335 WARN_ON(!map->bus);
1336
1337 /* Check for unwritable registers before we start */
1338 if (map->writeable_reg)
1339 for (i = 0; i < val_len / map->format.val_bytes; i++)
1340 if (!map->writeable_reg(map->dev,
1341 reg + regmap_get_offset(map, i)))
1342 return -EINVAL;
1343
1344 if (!map->cache_bypass && map->format.parse_val) {
1345 unsigned int ival;
1346 int val_bytes = map->format.val_bytes;
1347 for (i = 0; i < val_len / val_bytes; i++) {
1348 ival = map->format.parse_val(val + (i * val_bytes));
1349 ret = regcache_write(map,
1350 reg + regmap_get_offset(map, i),
1351 ival);
1352 if (ret) {
1353 dev_err(map->dev,
1354 "Error in caching of register: %x ret: %d\n",
1355 reg + i, ret);
1356 return ret;
1357 }
1358 }
1359 if (map->cache_only) {
1360 map->cache_dirty = true;
1361 return 0;
1362 }
1363 }
1364
1365 range = _regmap_range_lookup(map, reg);
1366 if (range) {
1367 int val_num = val_len / map->format.val_bytes;
1368 int win_offset = (reg - range->range_min) % range->window_len;
1369 int win_residue = range->window_len - win_offset;
1370
1371 /* If the write goes beyond the end of the window split it */
1372 while (val_num > win_residue) {
1373 dev_dbg(map->dev, "Writing window %d/%zu\n",
1374 win_residue, val_len / map->format.val_bytes);
1375 ret = _regmap_raw_write(map, reg, val, win_residue *
1376 map->format.val_bytes);
1377 if (ret != 0)
1378 return ret;
1379
1380 reg += win_residue;
1381 val_num -= win_residue;
1382 val += win_residue * map->format.val_bytes;
1383 val_len -= win_residue * map->format.val_bytes;
1384
1385 win_offset = (reg - range->range_min) %
1386 range->window_len;
1387 win_residue = range->window_len - win_offset;
1388 }
1389
1390 ret = _regmap_select_page(map, &reg, range, val_num);
1391 if (ret != 0)
1392 return ret;
1393 }
1394
1395 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1396
1397 u8[0] |= map->write_flag_mask;
1398
1399 /*
1400 * Essentially all I/O mechanisms will be faster with a single
1401 * buffer to write. Since register syncs often generate raw
1402 * writes of single registers optimise that case.
1403 */
1404 if (val != work_val && val_len == map->format.val_bytes) {
1405 memcpy(work_val, val, map->format.val_bytes);
1406 val = work_val;
1407 }
1408
1409 if (map->async && map->bus->async_write) {
1410 struct regmap_async *async;
1411
1412 trace_regmap_async_write_start(map, reg, val_len);
1413
1414 spin_lock_irqsave(&map->async_lock, flags);
1415 async = list_first_entry_or_null(&map->async_free,
1416 struct regmap_async,
1417 list);
1418 if (async)
1419 list_del(&async->list);
1420 spin_unlock_irqrestore(&map->async_lock, flags);
1421
1422 if (!async) {
1423 async = map->bus->async_alloc();
1424 if (!async)
1425 return -ENOMEM;
1426
1427 async->work_buf = kzalloc(map->format.buf_size,
1428 GFP_KERNEL | GFP_DMA);
1429 if (!async->work_buf) {
1430 kfree(async);
1431 return -ENOMEM;
1432 }
1433 }
1434
1435 async->map = map;
1436
1437 /* If the caller supplied the value we can use it safely. */
1438 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1439 map->format.reg_bytes + map->format.val_bytes);
1440
1441 spin_lock_irqsave(&map->async_lock, flags);
1442 list_add_tail(&async->list, &map->async_list);
1443 spin_unlock_irqrestore(&map->async_lock, flags);
1444
1445 if (val != work_val)
1446 ret = map->bus->async_write(map->bus_context,
1447 async->work_buf,
1448 map->format.reg_bytes +
1449 map->format.pad_bytes,
1450 val, val_len, async);
1451 else
1452 ret = map->bus->async_write(map->bus_context,
1453 async->work_buf,
1454 map->format.reg_bytes +
1455 map->format.pad_bytes +
1456 val_len, NULL, 0, async);
1457
1458 if (ret != 0) {
1459 dev_err(map->dev, "Failed to schedule write: %d\n",
1460 ret);
1461
1462 spin_lock_irqsave(&map->async_lock, flags);
1463 list_move(&async->list, &map->async_free);
1464 spin_unlock_irqrestore(&map->async_lock, flags);
1465 }
1466
1467 return ret;
1468 }
1469
1470 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1471
1472 /* If we're doing a single register write we can probably just
1473 * send the work_buf directly, otherwise try to do a gather
1474 * write.
1475 */
1476 if (val == work_val)
1477 ret = map->bus->write(map->bus_context, map->work_buf,
1478 map->format.reg_bytes +
1479 map->format.pad_bytes +
1480 val_len);
1481 else if (map->bus->gather_write)
1482 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1483 map->format.reg_bytes +
1484 map->format.pad_bytes,
1485 val, val_len);
1486
1487 /* If that didn't work fall back on linearising by hand. */
1488 if (ret == -ENOTSUPP) {
1489 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1490 buf = kzalloc(len, GFP_KERNEL);
1491 if (!buf)
1492 return -ENOMEM;
1493
1494 memcpy(buf, map->work_buf, map->format.reg_bytes);
1495 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1496 val, val_len);
1497 ret = map->bus->write(map->bus_context, buf, len);
1498
1499 kfree(buf);
1500 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1501 regcache_drop_region(map, reg, reg + 1);
1502 }
1503
1504 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1505
1506 return ret;
1507 }
1508
1509 /**
1510 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1511 *
1512 * @map: Map to check.
1513 */
1514 bool regmap_can_raw_write(struct regmap *map)
1515 {
1516 return map->bus && map->bus->write && map->format.format_val &&
1517 map->format.format_reg;
1518 }
1519 EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1520
1521 /**
1522 * regmap_get_raw_read_max - Get the maximum size we can read
1523 *
1524 * @map: Map to check.
1525 */
1526 size_t regmap_get_raw_read_max(struct regmap *map)
1527 {
1528 return map->max_raw_read;
1529 }
1530 EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1531
1532 /**
1533 * regmap_get_raw_write_max - Get the maximum size we can read
1534 *
1535 * @map: Map to check.
1536 */
1537 size_t regmap_get_raw_write_max(struct regmap *map)
1538 {
1539 return map->max_raw_write;
1540 }
1541 EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1542
1543 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1544 unsigned int val)
1545 {
1546 int ret;
1547 struct regmap_range_node *range;
1548 struct regmap *map = context;
1549
1550 WARN_ON(!map->bus || !map->format.format_write);
1551
1552 range = _regmap_range_lookup(map, reg);
1553 if (range) {
1554 ret = _regmap_select_page(map, &reg, range, 1);
1555 if (ret != 0)
1556 return ret;
1557 }
1558
1559 map->format.format_write(map, reg, val);
1560
1561 trace_regmap_hw_write_start(map, reg, 1);
1562
1563 ret = map->bus->write(map->bus_context, map->work_buf,
1564 map->format.buf_size);
1565
1566 trace_regmap_hw_write_done(map, reg, 1);
1567
1568 return ret;
1569 }
1570
1571 static int _regmap_bus_reg_write(void *context, unsigned int reg,
1572 unsigned int val)
1573 {
1574 struct regmap *map = context;
1575
1576 return map->bus->reg_write(map->bus_context, reg, val);
1577 }
1578
1579 static int _regmap_bus_raw_write(void *context, unsigned int reg,
1580 unsigned int val)
1581 {
1582 struct regmap *map = context;
1583
1584 WARN_ON(!map->bus || !map->format.format_val);
1585
1586 map->format.format_val(map->work_buf + map->format.reg_bytes
1587 + map->format.pad_bytes, val, 0);
1588 return _regmap_raw_write(map, reg,
1589 map->work_buf +
1590 map->format.reg_bytes +
1591 map->format.pad_bytes,
1592 map->format.val_bytes);
1593 }
1594
1595 static inline void *_regmap_map_get_context(struct regmap *map)
1596 {
1597 return (map->bus) ? map : map->bus_context;
1598 }
1599
1600 int _regmap_write(struct regmap *map, unsigned int reg,
1601 unsigned int val)
1602 {
1603 int ret;
1604 void *context = _regmap_map_get_context(map);
1605
1606 if (!regmap_writeable(map, reg))
1607 return -EIO;
1608
1609 if (!map->cache_bypass && !map->defer_caching) {
1610 ret = regcache_write(map, reg, val);
1611 if (ret != 0)
1612 return ret;
1613 if (map->cache_only) {
1614 map->cache_dirty = true;
1615 return 0;
1616 }
1617 }
1618
1619 #ifdef LOG_DEVICE
1620 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1621 dev_info(map->dev, "%x <= %x\n", reg, val);
1622 #endif
1623
1624 trace_regmap_reg_write(map, reg, val);
1625
1626 return map->reg_write(context, reg, val);
1627 }
1628
1629 /**
1630 * regmap_write(): Write a value to a single register
1631 *
1632 * @map: Register map to write to
1633 * @reg: Register to write to
1634 * @val: Value to be written
1635 *
1636 * A value of zero will be returned on success, a negative errno will
1637 * be returned in error cases.
1638 */
1639 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1640 {
1641 int ret;
1642
1643 if (!IS_ALIGNED(reg, map->reg_stride))
1644 return -EINVAL;
1645
1646 map->lock(map->lock_arg);
1647
1648 ret = _regmap_write(map, reg, val);
1649
1650 map->unlock(map->lock_arg);
1651
1652 return ret;
1653 }
1654 EXPORT_SYMBOL_GPL(regmap_write);
1655
1656 /**
1657 * regmap_write_async(): Write a value to a single register asynchronously
1658 *
1659 * @map: Register map to write to
1660 * @reg: Register to write to
1661 * @val: Value to be written
1662 *
1663 * A value of zero will be returned on success, a negative errno will
1664 * be returned in error cases.
1665 */
1666 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1667 {
1668 int ret;
1669
1670 if (!IS_ALIGNED(reg, map->reg_stride))
1671 return -EINVAL;
1672
1673 map->lock(map->lock_arg);
1674
1675 map->async = true;
1676
1677 ret = _regmap_write(map, reg, val);
1678
1679 map->async = false;
1680
1681 map->unlock(map->lock_arg);
1682
1683 return ret;
1684 }
1685 EXPORT_SYMBOL_GPL(regmap_write_async);
1686
1687 /**
1688 * regmap_raw_write(): Write raw values to one or more registers
1689 *
1690 * @map: Register map to write to
1691 * @reg: Initial register to write to
1692 * @val: Block of data to be written, laid out for direct transmission to the
1693 * device
1694 * @val_len: Length of data pointed to by val.
1695 *
1696 * This function is intended to be used for things like firmware
1697 * download where a large block of data needs to be transferred to the
1698 * device. No formatting will be done on the data provided.
1699 *
1700 * A value of zero will be returned on success, a negative errno will
1701 * be returned in error cases.
1702 */
1703 int regmap_raw_write(struct regmap *map, unsigned int reg,
1704 const void *val, size_t val_len)
1705 {
1706 int ret;
1707
1708 if (!regmap_can_raw_write(map))
1709 return -EINVAL;
1710 if (val_len % map->format.val_bytes)
1711 return -EINVAL;
1712 if (map->max_raw_write && map->max_raw_write > val_len)
1713 return -E2BIG;
1714
1715 map->lock(map->lock_arg);
1716
1717 ret = _regmap_raw_write(map, reg, val, val_len);
1718
1719 map->unlock(map->lock_arg);
1720
1721 return ret;
1722 }
1723 EXPORT_SYMBOL_GPL(regmap_raw_write);
1724
1725 /**
1726 * regmap_field_update_bits_base():
1727 * Perform a read/modify/write cycle on the register field
1728 * with change, async, force option
1729 *
1730 * @field: Register field to write to
1731 * @mask: Bitmask to change
1732 * @val: Value to be written
1733 * @change: Boolean indicating if a write was done
1734 * @async: Boolean indicating asynchronously
1735 * @force: Boolean indicating use force update
1736 *
1737 * A value of zero will be returned on success, a negative errno will
1738 * be returned in error cases.
1739 */
1740 int regmap_field_update_bits_base(struct regmap_field *field,
1741 unsigned int mask, unsigned int val,
1742 bool *change, bool async, bool force)
1743 {
1744 mask = (mask << field->shift) & field->mask;
1745
1746 return regmap_update_bits_base(field->regmap, field->reg,
1747 mask, val << field->shift,
1748 change, async, force);
1749 }
1750 EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
1751
1752 /**
1753 * regmap_fields_update_bits_base():
1754 * Perform a read/modify/write cycle on the register field
1755 * with change, async, force option
1756 *
1757 * @field: Register field to write to
1758 * @id: port ID
1759 * @mask: Bitmask to change
1760 * @val: Value to be written
1761 * @change: Boolean indicating if a write was done
1762 * @async: Boolean indicating asynchronously
1763 * @force: Boolean indicating use force update
1764 *
1765 * A value of zero will be returned on success, a negative errno will
1766 * be returned in error cases.
1767 */
1768 int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1769 unsigned int mask, unsigned int val,
1770 bool *change, bool async, bool force)
1771 {
1772 if (id >= field->id_size)
1773 return -EINVAL;
1774
1775 mask = (mask << field->shift) & field->mask;
1776
1777 return regmap_update_bits_base(field->regmap,
1778 field->reg + (field->id_offset * id),
1779 mask, val << field->shift,
1780 change, async, force);
1781 }
1782 EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
1783
1784 /*
1785 * regmap_bulk_write(): Write multiple registers to the device
1786 *
1787 * @map: Register map to write to
1788 * @reg: First register to be write from
1789 * @val: Block of data to be written, in native register size for device
1790 * @val_count: Number of registers to write
1791 *
1792 * This function is intended to be used for writing a large block of
1793 * data to the device either in single transfer or multiple transfer.
1794 *
1795 * A value of zero will be returned on success, a negative errno will
1796 * be returned in error cases.
1797 */
1798 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1799 size_t val_count)
1800 {
1801 int ret = 0, i;
1802 size_t val_bytes = map->format.val_bytes;
1803 size_t total_size = val_bytes * val_count;
1804
1805 if (!IS_ALIGNED(reg, map->reg_stride))
1806 return -EINVAL;
1807
1808 /*
1809 * Some devices don't support bulk write, for
1810 * them we have a series of single write operations in the first two if
1811 * blocks.
1812 *
1813 * The first if block is used for memory mapped io. It does not allow
1814 * val_bytes of 3 for example.
1815 * The second one is for busses that do not provide raw I/O.
1816 * The third one is used for busses which do not have these limitations
1817 * and can write arbitrary value lengths.
1818 */
1819 if (!map->bus) {
1820 map->lock(map->lock_arg);
1821 for (i = 0; i < val_count; i++) {
1822 unsigned int ival;
1823
1824 switch (val_bytes) {
1825 case 1:
1826 ival = *(u8 *)(val + (i * val_bytes));
1827 break;
1828 case 2:
1829 ival = *(u16 *)(val + (i * val_bytes));
1830 break;
1831 case 4:
1832 ival = *(u32 *)(val + (i * val_bytes));
1833 break;
1834 #ifdef CONFIG_64BIT
1835 case 8:
1836 ival = *(u64 *)(val + (i * val_bytes));
1837 break;
1838 #endif
1839 default:
1840 ret = -EINVAL;
1841 goto out;
1842 }
1843
1844 ret = _regmap_write(map,
1845 reg + regmap_get_offset(map, i),
1846 ival);
1847 if (ret != 0)
1848 goto out;
1849 }
1850 out:
1851 map->unlock(map->lock_arg);
1852 } else if (map->bus && !map->format.parse_inplace) {
1853 const u8 *u8 = val;
1854 const u16 *u16 = val;
1855 const u32 *u32 = val;
1856 unsigned int ival;
1857
1858 for (i = 0; i < val_count; i++) {
1859 switch (map->format.val_bytes) {
1860 case 4:
1861 ival = u32[i];
1862 break;
1863 case 2:
1864 ival = u16[i];
1865 break;
1866 case 1:
1867 ival = u8[i];
1868 break;
1869 default:
1870 return -EINVAL;
1871 }
1872
1873 ret = regmap_write(map, reg + (i * map->reg_stride),
1874 ival);
1875 if (ret)
1876 return ret;
1877 }
1878 } else if (map->use_single_write ||
1879 (map->max_raw_write && map->max_raw_write < total_size)) {
1880 int chunk_stride = map->reg_stride;
1881 size_t chunk_size = val_bytes;
1882 size_t chunk_count = val_count;
1883
1884 if (!map->use_single_write) {
1885 chunk_size = map->max_raw_write;
1886 if (chunk_size % val_bytes)
1887 chunk_size -= chunk_size % val_bytes;
1888 chunk_count = total_size / chunk_size;
1889 chunk_stride *= chunk_size / val_bytes;
1890 }
1891
1892 map->lock(map->lock_arg);
1893 /* Write as many bytes as possible with chunk_size */
1894 for (i = 0; i < chunk_count; i++) {
1895 ret = _regmap_raw_write(map,
1896 reg + (i * chunk_stride),
1897 val + (i * chunk_size),
1898 chunk_size);
1899 if (ret)
1900 break;
1901 }
1902
1903 /* Write remaining bytes */
1904 if (!ret && chunk_size * i < total_size) {
1905 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1906 val + (i * chunk_size),
1907 total_size - i * chunk_size);
1908 }
1909 map->unlock(map->lock_arg);
1910 } else {
1911 void *wval;
1912
1913 if (!val_count)
1914 return -EINVAL;
1915
1916 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
1917 if (!wval) {
1918 dev_err(map->dev, "Error in memory allocation\n");
1919 return -ENOMEM;
1920 }
1921 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1922 map->format.parse_inplace(wval + i);
1923
1924 map->lock(map->lock_arg);
1925 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1926 map->unlock(map->lock_arg);
1927
1928 kfree(wval);
1929 }
1930 return ret;
1931 }
1932 EXPORT_SYMBOL_GPL(regmap_bulk_write);
1933
1934 /*
1935 * _regmap_raw_multi_reg_write()
1936 *
1937 * the (register,newvalue) pairs in regs have not been formatted, but
1938 * they are all in the same page and have been changed to being page
1939 * relative. The page register has been written if that was necessary.
1940 */
1941 static int _regmap_raw_multi_reg_write(struct regmap *map,
1942 const struct reg_sequence *regs,
1943 size_t num_regs)
1944 {
1945 int ret;
1946 void *buf;
1947 int i;
1948 u8 *u8;
1949 size_t val_bytes = map->format.val_bytes;
1950 size_t reg_bytes = map->format.reg_bytes;
1951 size_t pad_bytes = map->format.pad_bytes;
1952 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1953 size_t len = pair_size * num_regs;
1954
1955 if (!len)
1956 return -EINVAL;
1957
1958 buf = kzalloc(len, GFP_KERNEL);
1959 if (!buf)
1960 return -ENOMEM;
1961
1962 /* We have to linearise by hand. */
1963
1964 u8 = buf;
1965
1966 for (i = 0; i < num_regs; i++) {
1967 unsigned int reg = regs[i].reg;
1968 unsigned int val = regs[i].def;
1969 trace_regmap_hw_write_start(map, reg, 1);
1970 map->format.format_reg(u8, reg, map->reg_shift);
1971 u8 += reg_bytes + pad_bytes;
1972 map->format.format_val(u8, val, 0);
1973 u8 += val_bytes;
1974 }
1975 u8 = buf;
1976 *u8 |= map->write_flag_mask;
1977
1978 ret = map->bus->write(map->bus_context, buf, len);
1979
1980 kfree(buf);
1981
1982 for (i = 0; i < num_regs; i++) {
1983 int reg = regs[i].reg;
1984 trace_regmap_hw_write_done(map, reg, 1);
1985 }
1986 return ret;
1987 }
1988
1989 static unsigned int _regmap_register_page(struct regmap *map,
1990 unsigned int reg,
1991 struct regmap_range_node *range)
1992 {
1993 unsigned int win_page = (reg - range->range_min) / range->window_len;
1994
1995 return win_page;
1996 }
1997
1998 static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1999 struct reg_sequence *regs,
2000 size_t num_regs)
2001 {
2002 int ret;
2003 int i, n;
2004 struct reg_sequence *base;
2005 unsigned int this_page = 0;
2006 unsigned int page_change = 0;
2007 /*
2008 * the set of registers are not neccessarily in order, but
2009 * since the order of write must be preserved this algorithm
2010 * chops the set each time the page changes. This also applies
2011 * if there is a delay required at any point in the sequence.
2012 */
2013 base = regs;
2014 for (i = 0, n = 0; i < num_regs; i++, n++) {
2015 unsigned int reg = regs[i].reg;
2016 struct regmap_range_node *range;
2017
2018 range = _regmap_range_lookup(map, reg);
2019 if (range) {
2020 unsigned int win_page = _regmap_register_page(map, reg,
2021 range);
2022
2023 if (i == 0)
2024 this_page = win_page;
2025 if (win_page != this_page) {
2026 this_page = win_page;
2027 page_change = 1;
2028 }
2029 }
2030
2031 /* If we have both a page change and a delay make sure to
2032 * write the regs and apply the delay before we change the
2033 * page.
2034 */
2035
2036 if (page_change || regs[i].delay_us) {
2037
2038 /* For situations where the first write requires
2039 * a delay we need to make sure we don't call
2040 * raw_multi_reg_write with n=0
2041 * This can't occur with page breaks as we
2042 * never write on the first iteration
2043 */
2044 if (regs[i].delay_us && i == 0)
2045 n = 1;
2046
2047 ret = _regmap_raw_multi_reg_write(map, base, n);
2048 if (ret != 0)
2049 return ret;
2050
2051 if (regs[i].delay_us)
2052 udelay(regs[i].delay_us);
2053
2054 base += n;
2055 n = 0;
2056
2057 if (page_change) {
2058 ret = _regmap_select_page(map,
2059 &base[n].reg,
2060 range, 1);
2061 if (ret != 0)
2062 return ret;
2063
2064 page_change = 0;
2065 }
2066
2067 }
2068
2069 }
2070 if (n > 0)
2071 return _regmap_raw_multi_reg_write(map, base, n);
2072 return 0;
2073 }
2074
2075 static int _regmap_multi_reg_write(struct regmap *map,
2076 const struct reg_sequence *regs,
2077 size_t num_regs)
2078 {
2079 int i;
2080 int ret;
2081
2082 if (!map->can_multi_write) {
2083 for (i = 0; i < num_regs; i++) {
2084 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2085 if (ret != 0)
2086 return ret;
2087
2088 if (regs[i].delay_us)
2089 udelay(regs[i].delay_us);
2090 }
2091 return 0;
2092 }
2093
2094 if (!map->format.parse_inplace)
2095 return -EINVAL;
2096
2097 if (map->writeable_reg)
2098 for (i = 0; i < num_regs; i++) {
2099 int reg = regs[i].reg;
2100 if (!map->writeable_reg(map->dev, reg))
2101 return -EINVAL;
2102 if (!IS_ALIGNED(reg, map->reg_stride))
2103 return -EINVAL;
2104 }
2105
2106 if (!map->cache_bypass) {
2107 for (i = 0; i < num_regs; i++) {
2108 unsigned int val = regs[i].def;
2109 unsigned int reg = regs[i].reg;
2110 ret = regcache_write(map, reg, val);
2111 if (ret) {
2112 dev_err(map->dev,
2113 "Error in caching of register: %x ret: %d\n",
2114 reg, ret);
2115 return ret;
2116 }
2117 }
2118 if (map->cache_only) {
2119 map->cache_dirty = true;
2120 return 0;
2121 }
2122 }
2123
2124 WARN_ON(!map->bus);
2125
2126 for (i = 0; i < num_regs; i++) {
2127 unsigned int reg = regs[i].reg;
2128 struct regmap_range_node *range;
2129
2130 /* Coalesce all the writes between a page break or a delay
2131 * in a sequence
2132 */
2133 range = _regmap_range_lookup(map, reg);
2134 if (range || regs[i].delay_us) {
2135 size_t len = sizeof(struct reg_sequence)*num_regs;
2136 struct reg_sequence *base = kmemdup(regs, len,
2137 GFP_KERNEL);
2138 if (!base)
2139 return -ENOMEM;
2140 ret = _regmap_range_multi_paged_reg_write(map, base,
2141 num_regs);
2142 kfree(base);
2143
2144 return ret;
2145 }
2146 }
2147 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2148 }
2149
2150 /*
2151 * regmap_multi_reg_write(): Write multiple registers to the device
2152 *
2153 * where the set of register,value pairs are supplied in any order,
2154 * possibly not all in a single range.
2155 *
2156 * @map: Register map to write to
2157 * @regs: Array of structures containing register,value to be written
2158 * @num_regs: Number of registers to write
2159 *
2160 * The 'normal' block write mode will send ultimately send data on the
2161 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
2162 * addressed. However, this alternative block multi write mode will send
2163 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2164 * must of course support the mode.
2165 *
2166 * A value of zero will be returned on success, a negative errno will be
2167 * returned in error cases.
2168 */
2169 int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2170 int num_regs)
2171 {
2172 int ret;
2173
2174 map->lock(map->lock_arg);
2175
2176 ret = _regmap_multi_reg_write(map, regs, num_regs);
2177
2178 map->unlock(map->lock_arg);
2179
2180 return ret;
2181 }
2182 EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2183
2184 /*
2185 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
2186 * device but not the cache
2187 *
2188 * where the set of register are supplied in any order
2189 *
2190 * @map: Register map to write to
2191 * @regs: Array of structures containing register,value to be written
2192 * @num_regs: Number of registers to write
2193 *
2194 * This function is intended to be used for writing a large block of data
2195 * atomically to the device in single transfer for those I2C client devices
2196 * that implement this alternative block write mode.
2197 *
2198 * A value of zero will be returned on success, a negative errno will
2199 * be returned in error cases.
2200 */
2201 int regmap_multi_reg_write_bypassed(struct regmap *map,
2202 const struct reg_sequence *regs,
2203 int num_regs)
2204 {
2205 int ret;
2206 bool bypass;
2207
2208 map->lock(map->lock_arg);
2209
2210 bypass = map->cache_bypass;
2211 map->cache_bypass = true;
2212
2213 ret = _regmap_multi_reg_write(map, regs, num_regs);
2214
2215 map->cache_bypass = bypass;
2216
2217 map->unlock(map->lock_arg);
2218
2219 return ret;
2220 }
2221 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2222
2223 /**
2224 * regmap_raw_write_async(): Write raw values to one or more registers
2225 * asynchronously
2226 *
2227 * @map: Register map to write to
2228 * @reg: Initial register to write to
2229 * @val: Block of data to be written, laid out for direct transmission to the
2230 * device. Must be valid until regmap_async_complete() is called.
2231 * @val_len: Length of data pointed to by val.
2232 *
2233 * This function is intended to be used for things like firmware
2234 * download where a large block of data needs to be transferred to the
2235 * device. No formatting will be done on the data provided.
2236 *
2237 * If supported by the underlying bus the write will be scheduled
2238 * asynchronously, helping maximise I/O speed on higher speed buses
2239 * like SPI. regmap_async_complete() can be called to ensure that all
2240 * asynchrnous writes have been completed.
2241 *
2242 * A value of zero will be returned on success, a negative errno will
2243 * be returned in error cases.
2244 */
2245 int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2246 const void *val, size_t val_len)
2247 {
2248 int ret;
2249
2250 if (val_len % map->format.val_bytes)
2251 return -EINVAL;
2252 if (!IS_ALIGNED(reg, map->reg_stride))
2253 return -EINVAL;
2254
2255 map->lock(map->lock_arg);
2256
2257 map->async = true;
2258
2259 ret = _regmap_raw_write(map, reg, val, val_len);
2260
2261 map->async = false;
2262
2263 map->unlock(map->lock_arg);
2264
2265 return ret;
2266 }
2267 EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2268
2269 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2270 unsigned int val_len)
2271 {
2272 struct regmap_range_node *range;
2273 u8 *u8 = map->work_buf;
2274 int ret;
2275
2276 WARN_ON(!map->bus);
2277
2278 if (!map->bus || !map->bus->read)
2279 return -EINVAL;
2280
2281 range = _regmap_range_lookup(map, reg);
2282 if (range) {
2283 ret = _regmap_select_page(map, &reg, range,
2284 val_len / map->format.val_bytes);
2285 if (ret != 0)
2286 return ret;
2287 }
2288
2289 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2290
2291 /*
2292 * Some buses or devices flag reads by setting the high bits in the
2293 * register address; since it's always the high bits for all
2294 * current formats we can do this here rather than in
2295 * formatting. This may break if we get interesting formats.
2296 */
2297 u8[0] |= map->read_flag_mask;
2298
2299 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2300
2301 ret = map->bus->read(map->bus_context, map->work_buf,
2302 map->format.reg_bytes + map->format.pad_bytes,
2303 val, val_len);
2304
2305 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2306
2307 return ret;
2308 }
2309
2310 static int _regmap_bus_reg_read(void *context, unsigned int reg,
2311 unsigned int *val)
2312 {
2313 struct regmap *map = context;
2314
2315 return map->bus->reg_read(map->bus_context, reg, val);
2316 }
2317
2318 static int _regmap_bus_read(void *context, unsigned int reg,
2319 unsigned int *val)
2320 {
2321 int ret;
2322 struct regmap *map = context;
2323
2324 if (!map->format.parse_val)
2325 return -EINVAL;
2326
2327 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2328 if (ret == 0)
2329 *val = map->format.parse_val(map->work_buf);
2330
2331 return ret;
2332 }
2333
2334 static int _regmap_read(struct regmap *map, unsigned int reg,
2335 unsigned int *val)
2336 {
2337 int ret;
2338 void *context = _regmap_map_get_context(map);
2339
2340 if (!map->cache_bypass) {
2341 ret = regcache_read(map, reg, val);
2342 if (ret == 0)
2343 return 0;
2344 }
2345
2346 if (map->cache_only)
2347 return -EBUSY;
2348
2349 if (!regmap_readable(map, reg))
2350 return -EIO;
2351
2352 ret = map->reg_read(context, reg, val);
2353 if (ret == 0) {
2354 #ifdef LOG_DEVICE
2355 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2356 dev_info(map->dev, "%x => %x\n", reg, *val);
2357 #endif
2358
2359 trace_regmap_reg_read(map, reg, *val);
2360
2361 if (!map->cache_bypass)
2362 regcache_write(map, reg, *val);
2363 }
2364
2365 return ret;
2366 }
2367
2368 /**
2369 * regmap_read(): Read a value from a single register
2370 *
2371 * @map: Register map to read from
2372 * @reg: Register to be read from
2373 * @val: Pointer to store read value
2374 *
2375 * A value of zero will be returned on success, a negative errno will
2376 * be returned in error cases.
2377 */
2378 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2379 {
2380 int ret;
2381
2382 if (!IS_ALIGNED(reg, map->reg_stride))
2383 return -EINVAL;
2384
2385 map->lock(map->lock_arg);
2386
2387 ret = _regmap_read(map, reg, val);
2388
2389 map->unlock(map->lock_arg);
2390
2391 return ret;
2392 }
2393 EXPORT_SYMBOL_GPL(regmap_read);
2394
2395 /**
2396 * regmap_raw_read(): Read raw data from the device
2397 *
2398 * @map: Register map to read from
2399 * @reg: First register to be read from
2400 * @val: Pointer to store read value
2401 * @val_len: Size of data to read
2402 *
2403 * A value of zero will be returned on success, a negative errno will
2404 * be returned in error cases.
2405 */
2406 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2407 size_t val_len)
2408 {
2409 size_t val_bytes = map->format.val_bytes;
2410 size_t val_count = val_len / val_bytes;
2411 unsigned int v;
2412 int ret, i;
2413
2414 if (!map->bus)
2415 return -EINVAL;
2416 if (val_len % map->format.val_bytes)
2417 return -EINVAL;
2418 if (!IS_ALIGNED(reg, map->reg_stride))
2419 return -EINVAL;
2420 if (val_count == 0)
2421 return -EINVAL;
2422
2423 map->lock(map->lock_arg);
2424
2425 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2426 map->cache_type == REGCACHE_NONE) {
2427 if (!map->bus->read) {
2428 ret = -ENOTSUPP;
2429 goto out;
2430 }
2431 if (map->max_raw_read && map->max_raw_read < val_len) {
2432 ret = -E2BIG;
2433 goto out;
2434 }
2435
2436 /* Physical block read if there's no cache involved */
2437 ret = _regmap_raw_read(map, reg, val, val_len);
2438
2439 } else {
2440 /* Otherwise go word by word for the cache; should be low
2441 * cost as we expect to hit the cache.
2442 */
2443 for (i = 0; i < val_count; i++) {
2444 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2445 &v);
2446 if (ret != 0)
2447 goto out;
2448
2449 map->format.format_val(val + (i * val_bytes), v, 0);
2450 }
2451 }
2452
2453 out:
2454 map->unlock(map->lock_arg);
2455
2456 return ret;
2457 }
2458 EXPORT_SYMBOL_GPL(regmap_raw_read);
2459
2460 /**
2461 * regmap_field_read(): Read a value to a single register field
2462 *
2463 * @field: Register field to read from
2464 * @val: Pointer to store read value
2465 *
2466 * A value of zero will be returned on success, a negative errno will
2467 * be returned in error cases.
2468 */
2469 int regmap_field_read(struct regmap_field *field, unsigned int *val)
2470 {
2471 int ret;
2472 unsigned int reg_val;
2473 ret = regmap_read(field->regmap, field->reg, &reg_val);
2474 if (ret != 0)
2475 return ret;
2476
2477 reg_val &= field->mask;
2478 reg_val >>= field->shift;
2479 *val = reg_val;
2480
2481 return ret;
2482 }
2483 EXPORT_SYMBOL_GPL(regmap_field_read);
2484
2485 /**
2486 * regmap_fields_read(): Read a value to a single register field with port ID
2487 *
2488 * @field: Register field to read from
2489 * @id: port ID
2490 * @val: Pointer to store read value
2491 *
2492 * A value of zero will be returned on success, a negative errno will
2493 * be returned in error cases.
2494 */
2495 int regmap_fields_read(struct regmap_field *field, unsigned int id,
2496 unsigned int *val)
2497 {
2498 int ret;
2499 unsigned int reg_val;
2500
2501 if (id >= field->id_size)
2502 return -EINVAL;
2503
2504 ret = regmap_read(field->regmap,
2505 field->reg + (field->id_offset * id),
2506 &reg_val);
2507 if (ret != 0)
2508 return ret;
2509
2510 reg_val &= field->mask;
2511 reg_val >>= field->shift;
2512 *val = reg_val;
2513
2514 return ret;
2515 }
2516 EXPORT_SYMBOL_GPL(regmap_fields_read);
2517
2518 /**
2519 * regmap_bulk_read(): Read multiple registers from the device
2520 *
2521 * @map: Register map to read from
2522 * @reg: First register to be read from
2523 * @val: Pointer to store read value, in native register size for device
2524 * @val_count: Number of registers to read
2525 *
2526 * A value of zero will be returned on success, a negative errno will
2527 * be returned in error cases.
2528 */
2529 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2530 size_t val_count)
2531 {
2532 int ret, i;
2533 size_t val_bytes = map->format.val_bytes;
2534 bool vol = regmap_volatile_range(map, reg, val_count);
2535
2536 if (!IS_ALIGNED(reg, map->reg_stride))
2537 return -EINVAL;
2538
2539 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2540 /*
2541 * Some devices does not support bulk read, for
2542 * them we have a series of single read operations.
2543 */
2544 size_t total_size = val_bytes * val_count;
2545
2546 if (!map->use_single_read &&
2547 (!map->max_raw_read || map->max_raw_read > total_size)) {
2548 ret = regmap_raw_read(map, reg, val,
2549 val_bytes * val_count);
2550 if (ret != 0)
2551 return ret;
2552 } else {
2553 /*
2554 * Some devices do not support bulk read or do not
2555 * support large bulk reads, for them we have a series
2556 * of read operations.
2557 */
2558 int chunk_stride = map->reg_stride;
2559 size_t chunk_size = val_bytes;
2560 size_t chunk_count = val_count;
2561
2562 if (!map->use_single_read) {
2563 chunk_size = map->max_raw_read;
2564 if (chunk_size % val_bytes)
2565 chunk_size -= chunk_size % val_bytes;
2566 chunk_count = total_size / chunk_size;
2567 chunk_stride *= chunk_size / val_bytes;
2568 }
2569
2570 /* Read bytes that fit into a multiple of chunk_size */
2571 for (i = 0; i < chunk_count; i++) {
2572 ret = regmap_raw_read(map,
2573 reg + (i * chunk_stride),
2574 val + (i * chunk_size),
2575 chunk_size);
2576 if (ret != 0)
2577 return ret;
2578 }
2579
2580 /* Read remaining bytes */
2581 if (chunk_size * i < total_size) {
2582 ret = regmap_raw_read(map,
2583 reg + (i * chunk_stride),
2584 val + (i * chunk_size),
2585 total_size - i * chunk_size);
2586 if (ret != 0)
2587 return ret;
2588 }
2589 }
2590
2591 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2592 map->format.parse_inplace(val + i);
2593 } else {
2594 for (i = 0; i < val_count; i++) {
2595 unsigned int ival;
2596 ret = regmap_read(map, reg + regmap_get_offset(map, i),
2597 &ival);
2598 if (ret != 0)
2599 return ret;
2600
2601 if (map->format.format_val) {
2602 map->format.format_val(val + (i * val_bytes), ival, 0);
2603 } else {
2604 /* Devices providing read and write
2605 * operations can use the bulk I/O
2606 * functions if they define a val_bytes,
2607 * we assume that the values are native
2608 * endian.
2609 */
2610 #ifdef CONFIG_64BIT
2611 u64 *u64 = val;
2612 #endif
2613 u32 *u32 = val;
2614 u16 *u16 = val;
2615 u8 *u8 = val;
2616
2617 switch (map->format.val_bytes) {
2618 #ifdef CONFIG_64BIT
2619 case 8:
2620 u64[i] = ival;
2621 break;
2622 #endif
2623 case 4:
2624 u32[i] = ival;
2625 break;
2626 case 2:
2627 u16[i] = ival;
2628 break;
2629 case 1:
2630 u8[i] = ival;
2631 break;
2632 default:
2633 return -EINVAL;
2634 }
2635 }
2636 }
2637 }
2638
2639 return 0;
2640 }
2641 EXPORT_SYMBOL_GPL(regmap_bulk_read);
2642
2643 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2644 unsigned int mask, unsigned int val,
2645 bool *change, bool force_write)
2646 {
2647 int ret;
2648 unsigned int tmp, orig;
2649
2650 if (change)
2651 *change = false;
2652
2653 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2654 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2655 if (ret == 0 && change)
2656 *change = true;
2657 } else {
2658 ret = _regmap_read(map, reg, &orig);
2659 if (ret != 0)
2660 return ret;
2661
2662 tmp = orig & ~mask;
2663 tmp |= val & mask;
2664
2665 if (force_write || (tmp != orig)) {
2666 ret = _regmap_write(map, reg, tmp);
2667 if (ret == 0 && change)
2668 *change = true;
2669 }
2670 }
2671
2672 return ret;
2673 }
2674
2675 /**
2676 * regmap_update_bits_base:
2677 * Perform a read/modify/write cycle on the
2678 * register map with change, async, force option
2679 *
2680 * @map: Register map to update
2681 * @reg: Register to update
2682 * @mask: Bitmask to change
2683 * @val: New value for bitmask
2684 * @change: Boolean indicating if a write was done
2685 * @async: Boolean indicating asynchronously
2686 * @force: Boolean indicating use force update
2687 *
2688 * if async was true,
2689 * With most buses the read must be done synchronously so this is most
2690 * useful for devices with a cache which do not need to interact with
2691 * the hardware to determine the current register value.
2692 *
2693 * Returns zero for success, a negative number on error.
2694 */
2695 int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2696 unsigned int mask, unsigned int val,
2697 bool *change, bool async, bool force)
2698 {
2699 int ret;
2700
2701 map->lock(map->lock_arg);
2702
2703 map->async = async;
2704
2705 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2706
2707 map->async = false;
2708
2709 map->unlock(map->lock_arg);
2710
2711 return ret;
2712 }
2713 EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2714
2715 void regmap_async_complete_cb(struct regmap_async *async, int ret)
2716 {
2717 struct regmap *map = async->map;
2718 bool wake;
2719
2720 trace_regmap_async_io_complete(map);
2721
2722 spin_lock(&map->async_lock);
2723 list_move(&async->list, &map->async_free);
2724 wake = list_empty(&map->async_list);
2725
2726 if (ret != 0)
2727 map->async_ret = ret;
2728
2729 spin_unlock(&map->async_lock);
2730
2731 if (wake)
2732 wake_up(&map->async_waitq);
2733 }
2734 EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2735
2736 static int regmap_async_is_done(struct regmap *map)
2737 {
2738 unsigned long flags;
2739 int ret;
2740
2741 spin_lock_irqsave(&map->async_lock, flags);
2742 ret = list_empty(&map->async_list);
2743 spin_unlock_irqrestore(&map->async_lock, flags);
2744
2745 return ret;
2746 }
2747
2748 /**
2749 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2750 *
2751 * @map: Map to operate on.
2752 *
2753 * Blocks until any pending asynchronous I/O has completed. Returns
2754 * an error code for any failed I/O operations.
2755 */
2756 int regmap_async_complete(struct regmap *map)
2757 {
2758 unsigned long flags;
2759 int ret;
2760
2761 /* Nothing to do with no async support */
2762 if (!map->bus || !map->bus->async_write)
2763 return 0;
2764
2765 trace_regmap_async_complete_start(map);
2766
2767 wait_event(map->async_waitq, regmap_async_is_done(map));
2768
2769 spin_lock_irqsave(&map->async_lock, flags);
2770 ret = map->async_ret;
2771 map->async_ret = 0;
2772 spin_unlock_irqrestore(&map->async_lock, flags);
2773
2774 trace_regmap_async_complete_done(map);
2775
2776 return ret;
2777 }
2778 EXPORT_SYMBOL_GPL(regmap_async_complete);
2779
2780 /**
2781 * regmap_register_patch: Register and apply register updates to be applied
2782 * on device initialistion
2783 *
2784 * @map: Register map to apply updates to.
2785 * @regs: Values to update.
2786 * @num_regs: Number of entries in regs.
2787 *
2788 * Register a set of register updates to be applied to the device
2789 * whenever the device registers are synchronised with the cache and
2790 * apply them immediately. Typically this is used to apply
2791 * corrections to be applied to the device defaults on startup, such
2792 * as the updates some vendors provide to undocumented registers.
2793 *
2794 * The caller must ensure that this function cannot be called
2795 * concurrently with either itself or regcache_sync().
2796 */
2797 int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
2798 int num_regs)
2799 {
2800 struct reg_sequence *p;
2801 int ret;
2802 bool bypass;
2803
2804 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2805 num_regs))
2806 return 0;
2807
2808 p = krealloc(map->patch,
2809 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
2810 GFP_KERNEL);
2811 if (p) {
2812 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2813 map->patch = p;
2814 map->patch_regs += num_regs;
2815 } else {
2816 return -ENOMEM;
2817 }
2818
2819 map->lock(map->lock_arg);
2820
2821 bypass = map->cache_bypass;
2822
2823 map->cache_bypass = true;
2824 map->async = true;
2825
2826 ret = _regmap_multi_reg_write(map, regs, num_regs);
2827
2828 map->async = false;
2829 map->cache_bypass = bypass;
2830
2831 map->unlock(map->lock_arg);
2832
2833 regmap_async_complete(map);
2834
2835 return ret;
2836 }
2837 EXPORT_SYMBOL_GPL(regmap_register_patch);
2838
2839 /*
2840 * regmap_get_val_bytes(): Report the size of a register value
2841 *
2842 * Report the size of a register value, mainly intended to for use by
2843 * generic infrastructure built on top of regmap.
2844 */
2845 int regmap_get_val_bytes(struct regmap *map)
2846 {
2847 if (map->format.format_write)
2848 return -EINVAL;
2849
2850 return map->format.val_bytes;
2851 }
2852 EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2853
2854 /**
2855 * regmap_get_max_register(): Report the max register value
2856 *
2857 * Report the max register value, mainly intended to for use by
2858 * generic infrastructure built on top of regmap.
2859 */
2860 int regmap_get_max_register(struct regmap *map)
2861 {
2862 return map->max_register ? map->max_register : -EINVAL;
2863 }
2864 EXPORT_SYMBOL_GPL(regmap_get_max_register);
2865
2866 /**
2867 * regmap_get_reg_stride(): Report the register address stride
2868 *
2869 * Report the register address stride, mainly intended to for use by
2870 * generic infrastructure built on top of regmap.
2871 */
2872 int regmap_get_reg_stride(struct regmap *map)
2873 {
2874 return map->reg_stride;
2875 }
2876 EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2877
2878 int regmap_parse_val(struct regmap *map, const void *buf,
2879 unsigned int *val)
2880 {
2881 if (!map->format.parse_val)
2882 return -EINVAL;
2883
2884 *val = map->format.parse_val(buf);
2885
2886 return 0;
2887 }
2888 EXPORT_SYMBOL_GPL(regmap_parse_val);
2889
2890 static int __init regmap_initcall(void)
2891 {
2892 regmap_debugfs_initcall();
2893
2894 return 0;
2895 }
2896 postcore_initcall(regmap_initcall);
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