Merge remote-tracking branches 'asoc/topic/sunxi', 'asoc/topic/topology' and 'asoc...
[deliverable/linux.git] / drivers / base / regmap / regmap.c
1 /*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/device.h>
14 #include <linux/slab.h>
15 #include <linux/export.h>
16 #include <linux/mutex.h>
17 #include <linux/err.h>
18 #include <linux/of.h>
19 #include <linux/rbtree.h>
20 #include <linux/sched.h>
21 #include <linux/delay.h>
22
23 #define CREATE_TRACE_POINTS
24 #include "trace.h"
25
26 #include "internal.h"
27
28 /*
29 * Sometimes for failures during very early init the trace
30 * infrastructure isn't available early enough to be used. For this
31 * sort of problem defining LOG_DEVICE will add printks for basic
32 * register I/O on a specific device.
33 */
34 #undef LOG_DEVICE
35
36 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
37 unsigned int mask, unsigned int val,
38 bool *change, bool force_write);
39
40 static int _regmap_bus_reg_read(void *context, unsigned int reg,
41 unsigned int *val);
42 static int _regmap_bus_read(void *context, unsigned int reg,
43 unsigned int *val);
44 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
45 unsigned int val);
46 static int _regmap_bus_reg_write(void *context, unsigned int reg,
47 unsigned int val);
48 static int _regmap_bus_raw_write(void *context, unsigned int reg,
49 unsigned int val);
50
51 bool regmap_reg_in_ranges(unsigned int reg,
52 const struct regmap_range *ranges,
53 unsigned int nranges)
54 {
55 const struct regmap_range *r;
56 int i;
57
58 for (i = 0, r = ranges; i < nranges; i++, r++)
59 if (regmap_reg_in_range(reg, r))
60 return true;
61 return false;
62 }
63 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
64
65 bool regmap_check_range_table(struct regmap *map, unsigned int reg,
66 const struct regmap_access_table *table)
67 {
68 /* Check "no ranges" first */
69 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
70 return false;
71
72 /* In case zero "yes ranges" are supplied, any reg is OK */
73 if (!table->n_yes_ranges)
74 return true;
75
76 return regmap_reg_in_ranges(reg, table->yes_ranges,
77 table->n_yes_ranges);
78 }
79 EXPORT_SYMBOL_GPL(regmap_check_range_table);
80
81 bool regmap_writeable(struct regmap *map, unsigned int reg)
82 {
83 if (map->max_register && reg > map->max_register)
84 return false;
85
86 if (map->writeable_reg)
87 return map->writeable_reg(map->dev, reg);
88
89 if (map->wr_table)
90 return regmap_check_range_table(map, reg, map->wr_table);
91
92 return true;
93 }
94
95 bool regmap_readable(struct regmap *map, unsigned int reg)
96 {
97 if (!map->reg_read)
98 return false;
99
100 if (map->max_register && reg > map->max_register)
101 return false;
102
103 if (map->format.format_write)
104 return false;
105
106 if (map->readable_reg)
107 return map->readable_reg(map->dev, reg);
108
109 if (map->rd_table)
110 return regmap_check_range_table(map, reg, map->rd_table);
111
112 return true;
113 }
114
115 bool regmap_volatile(struct regmap *map, unsigned int reg)
116 {
117 if (!map->format.format_write && !regmap_readable(map, reg))
118 return false;
119
120 if (map->volatile_reg)
121 return map->volatile_reg(map->dev, reg);
122
123 if (map->volatile_table)
124 return regmap_check_range_table(map, reg, map->volatile_table);
125
126 if (map->cache_ops)
127 return false;
128 else
129 return true;
130 }
131
132 bool regmap_precious(struct regmap *map, unsigned int reg)
133 {
134 if (!regmap_readable(map, reg))
135 return false;
136
137 if (map->precious_reg)
138 return map->precious_reg(map->dev, reg);
139
140 if (map->precious_table)
141 return regmap_check_range_table(map, reg, map->precious_table);
142
143 return false;
144 }
145
146 static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
147 size_t num)
148 {
149 unsigned int i;
150
151 for (i = 0; i < num; i++)
152 if (!regmap_volatile(map, reg + i))
153 return false;
154
155 return true;
156 }
157
158 static void regmap_format_2_6_write(struct regmap *map,
159 unsigned int reg, unsigned int val)
160 {
161 u8 *out = map->work_buf;
162
163 *out = (reg << 6) | val;
164 }
165
166 static void regmap_format_4_12_write(struct regmap *map,
167 unsigned int reg, unsigned int val)
168 {
169 __be16 *out = map->work_buf;
170 *out = cpu_to_be16((reg << 12) | val);
171 }
172
173 static void regmap_format_7_9_write(struct regmap *map,
174 unsigned int reg, unsigned int val)
175 {
176 __be16 *out = map->work_buf;
177 *out = cpu_to_be16((reg << 9) | val);
178 }
179
180 static void regmap_format_10_14_write(struct regmap *map,
181 unsigned int reg, unsigned int val)
182 {
183 u8 *out = map->work_buf;
184
185 out[2] = val;
186 out[1] = (val >> 8) | (reg << 6);
187 out[0] = reg >> 2;
188 }
189
190 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
191 {
192 u8 *b = buf;
193
194 b[0] = val << shift;
195 }
196
197 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
198 {
199 __be16 *b = buf;
200
201 b[0] = cpu_to_be16(val << shift);
202 }
203
204 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
205 {
206 __le16 *b = buf;
207
208 b[0] = cpu_to_le16(val << shift);
209 }
210
211 static void regmap_format_16_native(void *buf, unsigned int val,
212 unsigned int shift)
213 {
214 *(u16 *)buf = val << shift;
215 }
216
217 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
218 {
219 u8 *b = buf;
220
221 val <<= shift;
222
223 b[0] = val >> 16;
224 b[1] = val >> 8;
225 b[2] = val;
226 }
227
228 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
229 {
230 __be32 *b = buf;
231
232 b[0] = cpu_to_be32(val << shift);
233 }
234
235 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
236 {
237 __le32 *b = buf;
238
239 b[0] = cpu_to_le32(val << shift);
240 }
241
242 static void regmap_format_32_native(void *buf, unsigned int val,
243 unsigned int shift)
244 {
245 *(u32 *)buf = val << shift;
246 }
247
248 #ifdef CONFIG_64BIT
249 static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
250 {
251 __be64 *b = buf;
252
253 b[0] = cpu_to_be64((u64)val << shift);
254 }
255
256 static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
257 {
258 __le64 *b = buf;
259
260 b[0] = cpu_to_le64((u64)val << shift);
261 }
262
263 static void regmap_format_64_native(void *buf, unsigned int val,
264 unsigned int shift)
265 {
266 *(u64 *)buf = (u64)val << shift;
267 }
268 #endif
269
270 static void regmap_parse_inplace_noop(void *buf)
271 {
272 }
273
274 static unsigned int regmap_parse_8(const void *buf)
275 {
276 const u8 *b = buf;
277
278 return b[0];
279 }
280
281 static unsigned int regmap_parse_16_be(const void *buf)
282 {
283 const __be16 *b = buf;
284
285 return be16_to_cpu(b[0]);
286 }
287
288 static unsigned int regmap_parse_16_le(const void *buf)
289 {
290 const __le16 *b = buf;
291
292 return le16_to_cpu(b[0]);
293 }
294
295 static void regmap_parse_16_be_inplace(void *buf)
296 {
297 __be16 *b = buf;
298
299 b[0] = be16_to_cpu(b[0]);
300 }
301
302 static void regmap_parse_16_le_inplace(void *buf)
303 {
304 __le16 *b = buf;
305
306 b[0] = le16_to_cpu(b[0]);
307 }
308
309 static unsigned int regmap_parse_16_native(const void *buf)
310 {
311 return *(u16 *)buf;
312 }
313
314 static unsigned int regmap_parse_24(const void *buf)
315 {
316 const u8 *b = buf;
317 unsigned int ret = b[2];
318 ret |= ((unsigned int)b[1]) << 8;
319 ret |= ((unsigned int)b[0]) << 16;
320
321 return ret;
322 }
323
324 static unsigned int regmap_parse_32_be(const void *buf)
325 {
326 const __be32 *b = buf;
327
328 return be32_to_cpu(b[0]);
329 }
330
331 static unsigned int regmap_parse_32_le(const void *buf)
332 {
333 const __le32 *b = buf;
334
335 return le32_to_cpu(b[0]);
336 }
337
338 static void regmap_parse_32_be_inplace(void *buf)
339 {
340 __be32 *b = buf;
341
342 b[0] = be32_to_cpu(b[0]);
343 }
344
345 static void regmap_parse_32_le_inplace(void *buf)
346 {
347 __le32 *b = buf;
348
349 b[0] = le32_to_cpu(b[0]);
350 }
351
352 static unsigned int regmap_parse_32_native(const void *buf)
353 {
354 return *(u32 *)buf;
355 }
356
357 #ifdef CONFIG_64BIT
358 static unsigned int regmap_parse_64_be(const void *buf)
359 {
360 const __be64 *b = buf;
361
362 return be64_to_cpu(b[0]);
363 }
364
365 static unsigned int regmap_parse_64_le(const void *buf)
366 {
367 const __le64 *b = buf;
368
369 return le64_to_cpu(b[0]);
370 }
371
372 static void regmap_parse_64_be_inplace(void *buf)
373 {
374 __be64 *b = buf;
375
376 b[0] = be64_to_cpu(b[0]);
377 }
378
379 static void regmap_parse_64_le_inplace(void *buf)
380 {
381 __le64 *b = buf;
382
383 b[0] = le64_to_cpu(b[0]);
384 }
385
386 static unsigned int regmap_parse_64_native(const void *buf)
387 {
388 return *(u64 *)buf;
389 }
390 #endif
391
392 static void regmap_lock_mutex(void *__map)
393 {
394 struct regmap *map = __map;
395 mutex_lock(&map->mutex);
396 }
397
398 static void regmap_unlock_mutex(void *__map)
399 {
400 struct regmap *map = __map;
401 mutex_unlock(&map->mutex);
402 }
403
404 static void regmap_lock_spinlock(void *__map)
405 __acquires(&map->spinlock)
406 {
407 struct regmap *map = __map;
408 unsigned long flags;
409
410 spin_lock_irqsave(&map->spinlock, flags);
411 map->spinlock_flags = flags;
412 }
413
414 static void regmap_unlock_spinlock(void *__map)
415 __releases(&map->spinlock)
416 {
417 struct regmap *map = __map;
418 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
419 }
420
421 static void dev_get_regmap_release(struct device *dev, void *res)
422 {
423 /*
424 * We don't actually have anything to do here; the goal here
425 * is not to manage the regmap but to provide a simple way to
426 * get the regmap back given a struct device.
427 */
428 }
429
430 static bool _regmap_range_add(struct regmap *map,
431 struct regmap_range_node *data)
432 {
433 struct rb_root *root = &map->range_tree;
434 struct rb_node **new = &(root->rb_node), *parent = NULL;
435
436 while (*new) {
437 struct regmap_range_node *this =
438 container_of(*new, struct regmap_range_node, node);
439
440 parent = *new;
441 if (data->range_max < this->range_min)
442 new = &((*new)->rb_left);
443 else if (data->range_min > this->range_max)
444 new = &((*new)->rb_right);
445 else
446 return false;
447 }
448
449 rb_link_node(&data->node, parent, new);
450 rb_insert_color(&data->node, root);
451
452 return true;
453 }
454
455 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
456 unsigned int reg)
457 {
458 struct rb_node *node = map->range_tree.rb_node;
459
460 while (node) {
461 struct regmap_range_node *this =
462 container_of(node, struct regmap_range_node, node);
463
464 if (reg < this->range_min)
465 node = node->rb_left;
466 else if (reg > this->range_max)
467 node = node->rb_right;
468 else
469 return this;
470 }
471
472 return NULL;
473 }
474
475 static void regmap_range_exit(struct regmap *map)
476 {
477 struct rb_node *next;
478 struct regmap_range_node *range_node;
479
480 next = rb_first(&map->range_tree);
481 while (next) {
482 range_node = rb_entry(next, struct regmap_range_node, node);
483 next = rb_next(&range_node->node);
484 rb_erase(&range_node->node, &map->range_tree);
485 kfree(range_node);
486 }
487
488 kfree(map->selector_work_buf);
489 }
490
491 int regmap_attach_dev(struct device *dev, struct regmap *map,
492 const struct regmap_config *config)
493 {
494 struct regmap **m;
495
496 map->dev = dev;
497
498 regmap_debugfs_init(map, config->name);
499
500 /* Add a devres resource for dev_get_regmap() */
501 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
502 if (!m) {
503 regmap_debugfs_exit(map);
504 return -ENOMEM;
505 }
506 *m = map;
507 devres_add(dev, m);
508
509 return 0;
510 }
511 EXPORT_SYMBOL_GPL(regmap_attach_dev);
512
513 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
514 const struct regmap_config *config)
515 {
516 enum regmap_endian endian;
517
518 /* Retrieve the endianness specification from the regmap config */
519 endian = config->reg_format_endian;
520
521 /* If the regmap config specified a non-default value, use that */
522 if (endian != REGMAP_ENDIAN_DEFAULT)
523 return endian;
524
525 /* Retrieve the endianness specification from the bus config */
526 if (bus && bus->reg_format_endian_default)
527 endian = bus->reg_format_endian_default;
528
529 /* If the bus specified a non-default value, use that */
530 if (endian != REGMAP_ENDIAN_DEFAULT)
531 return endian;
532
533 /* Use this if no other value was found */
534 return REGMAP_ENDIAN_BIG;
535 }
536
537 enum regmap_endian regmap_get_val_endian(struct device *dev,
538 const struct regmap_bus *bus,
539 const struct regmap_config *config)
540 {
541 struct device_node *np;
542 enum regmap_endian endian;
543
544 /* Retrieve the endianness specification from the regmap config */
545 endian = config->val_format_endian;
546
547 /* If the regmap config specified a non-default value, use that */
548 if (endian != REGMAP_ENDIAN_DEFAULT)
549 return endian;
550
551 /* If the dev and dev->of_node exist try to get endianness from DT */
552 if (dev && dev->of_node) {
553 np = dev->of_node;
554
555 /* Parse the device's DT node for an endianness specification */
556 if (of_property_read_bool(np, "big-endian"))
557 endian = REGMAP_ENDIAN_BIG;
558 else if (of_property_read_bool(np, "little-endian"))
559 endian = REGMAP_ENDIAN_LITTLE;
560 else if (of_property_read_bool(np, "native-endian"))
561 endian = REGMAP_ENDIAN_NATIVE;
562
563 /* If the endianness was specified in DT, use that */
564 if (endian != REGMAP_ENDIAN_DEFAULT)
565 return endian;
566 }
567
568 /* Retrieve the endianness specification from the bus config */
569 if (bus && bus->val_format_endian_default)
570 endian = bus->val_format_endian_default;
571
572 /* If the bus specified a non-default value, use that */
573 if (endian != REGMAP_ENDIAN_DEFAULT)
574 return endian;
575
576 /* Use this if no other value was found */
577 return REGMAP_ENDIAN_BIG;
578 }
579 EXPORT_SYMBOL_GPL(regmap_get_val_endian);
580
581 struct regmap *__regmap_init(struct device *dev,
582 const struct regmap_bus *bus,
583 void *bus_context,
584 const struct regmap_config *config,
585 struct lock_class_key *lock_key,
586 const char *lock_name)
587 {
588 struct regmap *map;
589 int ret = -EINVAL;
590 enum regmap_endian reg_endian, val_endian;
591 int i, j;
592
593 if (!config)
594 goto err;
595
596 map = kzalloc(sizeof(*map), GFP_KERNEL);
597 if (map == NULL) {
598 ret = -ENOMEM;
599 goto err;
600 }
601
602 if (config->lock && config->unlock) {
603 map->lock = config->lock;
604 map->unlock = config->unlock;
605 map->lock_arg = config->lock_arg;
606 } else {
607 if ((bus && bus->fast_io) ||
608 config->fast_io) {
609 spin_lock_init(&map->spinlock);
610 map->lock = regmap_lock_spinlock;
611 map->unlock = regmap_unlock_spinlock;
612 lockdep_set_class_and_name(&map->spinlock,
613 lock_key, lock_name);
614 } else {
615 mutex_init(&map->mutex);
616 map->lock = regmap_lock_mutex;
617 map->unlock = regmap_unlock_mutex;
618 lockdep_set_class_and_name(&map->mutex,
619 lock_key, lock_name);
620 }
621 map->lock_arg = map;
622 }
623
624 /*
625 * When we write in fast-paths with regmap_bulk_write() don't allocate
626 * scratch buffers with sleeping allocations.
627 */
628 if ((bus && bus->fast_io) || config->fast_io)
629 map->alloc_flags = GFP_ATOMIC;
630 else
631 map->alloc_flags = GFP_KERNEL;
632
633 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
634 map->format.pad_bytes = config->pad_bits / 8;
635 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
636 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
637 config->val_bits + config->pad_bits, 8);
638 map->reg_shift = config->pad_bits % 8;
639 if (config->reg_stride)
640 map->reg_stride = config->reg_stride;
641 else
642 map->reg_stride = 1;
643 map->use_single_read = config->use_single_rw || !bus || !bus->read;
644 map->use_single_write = config->use_single_rw || !bus || !bus->write;
645 map->can_multi_write = config->can_multi_write && bus && bus->write;
646 if (bus) {
647 map->max_raw_read = bus->max_raw_read;
648 map->max_raw_write = bus->max_raw_write;
649 }
650 map->dev = dev;
651 map->bus = bus;
652 map->bus_context = bus_context;
653 map->max_register = config->max_register;
654 map->wr_table = config->wr_table;
655 map->rd_table = config->rd_table;
656 map->volatile_table = config->volatile_table;
657 map->precious_table = config->precious_table;
658 map->writeable_reg = config->writeable_reg;
659 map->readable_reg = config->readable_reg;
660 map->volatile_reg = config->volatile_reg;
661 map->precious_reg = config->precious_reg;
662 map->cache_type = config->cache_type;
663 map->name = config->name;
664
665 spin_lock_init(&map->async_lock);
666 INIT_LIST_HEAD(&map->async_list);
667 INIT_LIST_HEAD(&map->async_free);
668 init_waitqueue_head(&map->async_waitq);
669
670 if (config->read_flag_mask || config->write_flag_mask) {
671 map->read_flag_mask = config->read_flag_mask;
672 map->write_flag_mask = config->write_flag_mask;
673 } else if (bus) {
674 map->read_flag_mask = bus->read_flag_mask;
675 }
676
677 if (!bus) {
678 map->reg_read = config->reg_read;
679 map->reg_write = config->reg_write;
680
681 map->defer_caching = false;
682 goto skip_format_initialization;
683 } else if (!bus->read || !bus->write) {
684 map->reg_read = _regmap_bus_reg_read;
685 map->reg_write = _regmap_bus_reg_write;
686
687 map->defer_caching = false;
688 goto skip_format_initialization;
689 } else {
690 map->reg_read = _regmap_bus_read;
691 map->reg_update_bits = bus->reg_update_bits;
692 }
693
694 reg_endian = regmap_get_reg_endian(bus, config);
695 val_endian = regmap_get_val_endian(dev, bus, config);
696
697 switch (config->reg_bits + map->reg_shift) {
698 case 2:
699 switch (config->val_bits) {
700 case 6:
701 map->format.format_write = regmap_format_2_6_write;
702 break;
703 default:
704 goto err_map;
705 }
706 break;
707
708 case 4:
709 switch (config->val_bits) {
710 case 12:
711 map->format.format_write = regmap_format_4_12_write;
712 break;
713 default:
714 goto err_map;
715 }
716 break;
717
718 case 7:
719 switch (config->val_bits) {
720 case 9:
721 map->format.format_write = regmap_format_7_9_write;
722 break;
723 default:
724 goto err_map;
725 }
726 break;
727
728 case 10:
729 switch (config->val_bits) {
730 case 14:
731 map->format.format_write = regmap_format_10_14_write;
732 break;
733 default:
734 goto err_map;
735 }
736 break;
737
738 case 8:
739 map->format.format_reg = regmap_format_8;
740 break;
741
742 case 16:
743 switch (reg_endian) {
744 case REGMAP_ENDIAN_BIG:
745 map->format.format_reg = regmap_format_16_be;
746 break;
747 case REGMAP_ENDIAN_NATIVE:
748 map->format.format_reg = regmap_format_16_native;
749 break;
750 default:
751 goto err_map;
752 }
753 break;
754
755 case 24:
756 if (reg_endian != REGMAP_ENDIAN_BIG)
757 goto err_map;
758 map->format.format_reg = regmap_format_24;
759 break;
760
761 case 32:
762 switch (reg_endian) {
763 case REGMAP_ENDIAN_BIG:
764 map->format.format_reg = regmap_format_32_be;
765 break;
766 case REGMAP_ENDIAN_NATIVE:
767 map->format.format_reg = regmap_format_32_native;
768 break;
769 default:
770 goto err_map;
771 }
772 break;
773
774 #ifdef CONFIG_64BIT
775 case 64:
776 switch (reg_endian) {
777 case REGMAP_ENDIAN_BIG:
778 map->format.format_reg = regmap_format_64_be;
779 break;
780 case REGMAP_ENDIAN_NATIVE:
781 map->format.format_reg = regmap_format_64_native;
782 break;
783 default:
784 goto err_map;
785 }
786 break;
787 #endif
788
789 default:
790 goto err_map;
791 }
792
793 if (val_endian == REGMAP_ENDIAN_NATIVE)
794 map->format.parse_inplace = regmap_parse_inplace_noop;
795
796 switch (config->val_bits) {
797 case 8:
798 map->format.format_val = regmap_format_8;
799 map->format.parse_val = regmap_parse_8;
800 map->format.parse_inplace = regmap_parse_inplace_noop;
801 break;
802 case 16:
803 switch (val_endian) {
804 case REGMAP_ENDIAN_BIG:
805 map->format.format_val = regmap_format_16_be;
806 map->format.parse_val = regmap_parse_16_be;
807 map->format.parse_inplace = regmap_parse_16_be_inplace;
808 break;
809 case REGMAP_ENDIAN_LITTLE:
810 map->format.format_val = regmap_format_16_le;
811 map->format.parse_val = regmap_parse_16_le;
812 map->format.parse_inplace = regmap_parse_16_le_inplace;
813 break;
814 case REGMAP_ENDIAN_NATIVE:
815 map->format.format_val = regmap_format_16_native;
816 map->format.parse_val = regmap_parse_16_native;
817 break;
818 default:
819 goto err_map;
820 }
821 break;
822 case 24:
823 if (val_endian != REGMAP_ENDIAN_BIG)
824 goto err_map;
825 map->format.format_val = regmap_format_24;
826 map->format.parse_val = regmap_parse_24;
827 break;
828 case 32:
829 switch (val_endian) {
830 case REGMAP_ENDIAN_BIG:
831 map->format.format_val = regmap_format_32_be;
832 map->format.parse_val = regmap_parse_32_be;
833 map->format.parse_inplace = regmap_parse_32_be_inplace;
834 break;
835 case REGMAP_ENDIAN_LITTLE:
836 map->format.format_val = regmap_format_32_le;
837 map->format.parse_val = regmap_parse_32_le;
838 map->format.parse_inplace = regmap_parse_32_le_inplace;
839 break;
840 case REGMAP_ENDIAN_NATIVE:
841 map->format.format_val = regmap_format_32_native;
842 map->format.parse_val = regmap_parse_32_native;
843 break;
844 default:
845 goto err_map;
846 }
847 break;
848 #ifdef CONFIG_64BIT
849 case 64:
850 switch (val_endian) {
851 case REGMAP_ENDIAN_BIG:
852 map->format.format_val = regmap_format_64_be;
853 map->format.parse_val = regmap_parse_64_be;
854 map->format.parse_inplace = regmap_parse_64_be_inplace;
855 break;
856 case REGMAP_ENDIAN_LITTLE:
857 map->format.format_val = regmap_format_64_le;
858 map->format.parse_val = regmap_parse_64_le;
859 map->format.parse_inplace = regmap_parse_64_le_inplace;
860 break;
861 case REGMAP_ENDIAN_NATIVE:
862 map->format.format_val = regmap_format_64_native;
863 map->format.parse_val = regmap_parse_64_native;
864 break;
865 default:
866 goto err_map;
867 }
868 break;
869 #endif
870 }
871
872 if (map->format.format_write) {
873 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
874 (val_endian != REGMAP_ENDIAN_BIG))
875 goto err_map;
876 map->use_single_write = true;
877 }
878
879 if (!map->format.format_write &&
880 !(map->format.format_reg && map->format.format_val))
881 goto err_map;
882
883 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
884 if (map->work_buf == NULL) {
885 ret = -ENOMEM;
886 goto err_map;
887 }
888
889 if (map->format.format_write) {
890 map->defer_caching = false;
891 map->reg_write = _regmap_bus_formatted_write;
892 } else if (map->format.format_val) {
893 map->defer_caching = true;
894 map->reg_write = _regmap_bus_raw_write;
895 }
896
897 skip_format_initialization:
898
899 map->range_tree = RB_ROOT;
900 for (i = 0; i < config->num_ranges; i++) {
901 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
902 struct regmap_range_node *new;
903
904 /* Sanity check */
905 if (range_cfg->range_max < range_cfg->range_min) {
906 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
907 range_cfg->range_max, range_cfg->range_min);
908 goto err_range;
909 }
910
911 if (range_cfg->range_max > map->max_register) {
912 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
913 range_cfg->range_max, map->max_register);
914 goto err_range;
915 }
916
917 if (range_cfg->selector_reg > map->max_register) {
918 dev_err(map->dev,
919 "Invalid range %d: selector out of map\n", i);
920 goto err_range;
921 }
922
923 if (range_cfg->window_len == 0) {
924 dev_err(map->dev, "Invalid range %d: window_len 0\n",
925 i);
926 goto err_range;
927 }
928
929 /* Make sure, that this register range has no selector
930 or data window within its boundary */
931 for (j = 0; j < config->num_ranges; j++) {
932 unsigned sel_reg = config->ranges[j].selector_reg;
933 unsigned win_min = config->ranges[j].window_start;
934 unsigned win_max = win_min +
935 config->ranges[j].window_len - 1;
936
937 /* Allow data window inside its own virtual range */
938 if (j == i)
939 continue;
940
941 if (range_cfg->range_min <= sel_reg &&
942 sel_reg <= range_cfg->range_max) {
943 dev_err(map->dev,
944 "Range %d: selector for %d in window\n",
945 i, j);
946 goto err_range;
947 }
948
949 if (!(win_max < range_cfg->range_min ||
950 win_min > range_cfg->range_max)) {
951 dev_err(map->dev,
952 "Range %d: window for %d in window\n",
953 i, j);
954 goto err_range;
955 }
956 }
957
958 new = kzalloc(sizeof(*new), GFP_KERNEL);
959 if (new == NULL) {
960 ret = -ENOMEM;
961 goto err_range;
962 }
963
964 new->map = map;
965 new->name = range_cfg->name;
966 new->range_min = range_cfg->range_min;
967 new->range_max = range_cfg->range_max;
968 new->selector_reg = range_cfg->selector_reg;
969 new->selector_mask = range_cfg->selector_mask;
970 new->selector_shift = range_cfg->selector_shift;
971 new->window_start = range_cfg->window_start;
972 new->window_len = range_cfg->window_len;
973
974 if (!_regmap_range_add(map, new)) {
975 dev_err(map->dev, "Failed to add range %d\n", i);
976 kfree(new);
977 goto err_range;
978 }
979
980 if (map->selector_work_buf == NULL) {
981 map->selector_work_buf =
982 kzalloc(map->format.buf_size, GFP_KERNEL);
983 if (map->selector_work_buf == NULL) {
984 ret = -ENOMEM;
985 goto err_range;
986 }
987 }
988 }
989
990 ret = regcache_init(map, config);
991 if (ret != 0)
992 goto err_range;
993
994 if (dev) {
995 ret = regmap_attach_dev(dev, map, config);
996 if (ret != 0)
997 goto err_regcache;
998 }
999
1000 return map;
1001
1002 err_regcache:
1003 regcache_exit(map);
1004 err_range:
1005 regmap_range_exit(map);
1006 kfree(map->work_buf);
1007 err_map:
1008 kfree(map);
1009 err:
1010 return ERR_PTR(ret);
1011 }
1012 EXPORT_SYMBOL_GPL(__regmap_init);
1013
1014 static void devm_regmap_release(struct device *dev, void *res)
1015 {
1016 regmap_exit(*(struct regmap **)res);
1017 }
1018
1019 struct regmap *__devm_regmap_init(struct device *dev,
1020 const struct regmap_bus *bus,
1021 void *bus_context,
1022 const struct regmap_config *config,
1023 struct lock_class_key *lock_key,
1024 const char *lock_name)
1025 {
1026 struct regmap **ptr, *regmap;
1027
1028 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1029 if (!ptr)
1030 return ERR_PTR(-ENOMEM);
1031
1032 regmap = __regmap_init(dev, bus, bus_context, config,
1033 lock_key, lock_name);
1034 if (!IS_ERR(regmap)) {
1035 *ptr = regmap;
1036 devres_add(dev, ptr);
1037 } else {
1038 devres_free(ptr);
1039 }
1040
1041 return regmap;
1042 }
1043 EXPORT_SYMBOL_GPL(__devm_regmap_init);
1044
1045 static void regmap_field_init(struct regmap_field *rm_field,
1046 struct regmap *regmap, struct reg_field reg_field)
1047 {
1048 rm_field->regmap = regmap;
1049 rm_field->reg = reg_field.reg;
1050 rm_field->shift = reg_field.lsb;
1051 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1052 rm_field->id_size = reg_field.id_size;
1053 rm_field->id_offset = reg_field.id_offset;
1054 }
1055
1056 /**
1057 * devm_regmap_field_alloc(): Allocate and initialise a register field
1058 * in a register map.
1059 *
1060 * @dev: Device that will be interacted with
1061 * @regmap: regmap bank in which this register field is located.
1062 * @reg_field: Register field with in the bank.
1063 *
1064 * The return value will be an ERR_PTR() on error or a valid pointer
1065 * to a struct regmap_field. The regmap_field will be automatically freed
1066 * by the device management code.
1067 */
1068 struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1069 struct regmap *regmap, struct reg_field reg_field)
1070 {
1071 struct regmap_field *rm_field = devm_kzalloc(dev,
1072 sizeof(*rm_field), GFP_KERNEL);
1073 if (!rm_field)
1074 return ERR_PTR(-ENOMEM);
1075
1076 regmap_field_init(rm_field, regmap, reg_field);
1077
1078 return rm_field;
1079
1080 }
1081 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1082
1083 /**
1084 * devm_regmap_field_free(): Free register field allocated using
1085 * devm_regmap_field_alloc. Usally drivers need not call this function,
1086 * as the memory allocated via devm will be freed as per device-driver
1087 * life-cyle.
1088 *
1089 * @dev: Device that will be interacted with
1090 * @field: regmap field which should be freed.
1091 */
1092 void devm_regmap_field_free(struct device *dev,
1093 struct regmap_field *field)
1094 {
1095 devm_kfree(dev, field);
1096 }
1097 EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1098
1099 /**
1100 * regmap_field_alloc(): Allocate and initialise a register field
1101 * in a register map.
1102 *
1103 * @regmap: regmap bank in which this register field is located.
1104 * @reg_field: Register field with in the bank.
1105 *
1106 * The return value will be an ERR_PTR() on error or a valid pointer
1107 * to a struct regmap_field. The regmap_field should be freed by the
1108 * user once its finished working with it using regmap_field_free().
1109 */
1110 struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1111 struct reg_field reg_field)
1112 {
1113 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1114
1115 if (!rm_field)
1116 return ERR_PTR(-ENOMEM);
1117
1118 regmap_field_init(rm_field, regmap, reg_field);
1119
1120 return rm_field;
1121 }
1122 EXPORT_SYMBOL_GPL(regmap_field_alloc);
1123
1124 /**
1125 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1126 *
1127 * @field: regmap field which should be freed.
1128 */
1129 void regmap_field_free(struct regmap_field *field)
1130 {
1131 kfree(field);
1132 }
1133 EXPORT_SYMBOL_GPL(regmap_field_free);
1134
1135 /**
1136 * regmap_reinit_cache(): Reinitialise the current register cache
1137 *
1138 * @map: Register map to operate on.
1139 * @config: New configuration. Only the cache data will be used.
1140 *
1141 * Discard any existing register cache for the map and initialize a
1142 * new cache. This can be used to restore the cache to defaults or to
1143 * update the cache configuration to reflect runtime discovery of the
1144 * hardware.
1145 *
1146 * No explicit locking is done here, the user needs to ensure that
1147 * this function will not race with other calls to regmap.
1148 */
1149 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1150 {
1151 regcache_exit(map);
1152 regmap_debugfs_exit(map);
1153
1154 map->max_register = config->max_register;
1155 map->writeable_reg = config->writeable_reg;
1156 map->readable_reg = config->readable_reg;
1157 map->volatile_reg = config->volatile_reg;
1158 map->precious_reg = config->precious_reg;
1159 map->cache_type = config->cache_type;
1160
1161 regmap_debugfs_init(map, config->name);
1162
1163 map->cache_bypass = false;
1164 map->cache_only = false;
1165
1166 return regcache_init(map, config);
1167 }
1168 EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1169
1170 /**
1171 * regmap_exit(): Free a previously allocated register map
1172 */
1173 void regmap_exit(struct regmap *map)
1174 {
1175 struct regmap_async *async;
1176
1177 regcache_exit(map);
1178 regmap_debugfs_exit(map);
1179 regmap_range_exit(map);
1180 if (map->bus && map->bus->free_context)
1181 map->bus->free_context(map->bus_context);
1182 kfree(map->work_buf);
1183 while (!list_empty(&map->async_free)) {
1184 async = list_first_entry_or_null(&map->async_free,
1185 struct regmap_async,
1186 list);
1187 list_del(&async->list);
1188 kfree(async->work_buf);
1189 kfree(async);
1190 }
1191 kfree(map);
1192 }
1193 EXPORT_SYMBOL_GPL(regmap_exit);
1194
1195 static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1196 {
1197 struct regmap **r = res;
1198 if (!r || !*r) {
1199 WARN_ON(!r || !*r);
1200 return 0;
1201 }
1202
1203 /* If the user didn't specify a name match any */
1204 if (data)
1205 return (*r)->name == data;
1206 else
1207 return 1;
1208 }
1209
1210 /**
1211 * dev_get_regmap(): Obtain the regmap (if any) for a device
1212 *
1213 * @dev: Device to retrieve the map for
1214 * @name: Optional name for the register map, usually NULL.
1215 *
1216 * Returns the regmap for the device if one is present, or NULL. If
1217 * name is specified then it must match the name specified when
1218 * registering the device, if it is NULL then the first regmap found
1219 * will be used. Devices with multiple register maps are very rare,
1220 * generic code should normally not need to specify a name.
1221 */
1222 struct regmap *dev_get_regmap(struct device *dev, const char *name)
1223 {
1224 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1225 dev_get_regmap_match, (void *)name);
1226
1227 if (!r)
1228 return NULL;
1229 return *r;
1230 }
1231 EXPORT_SYMBOL_GPL(dev_get_regmap);
1232
1233 /**
1234 * regmap_get_device(): Obtain the device from a regmap
1235 *
1236 * @map: Register map to operate on.
1237 *
1238 * Returns the underlying device that the regmap has been created for.
1239 */
1240 struct device *regmap_get_device(struct regmap *map)
1241 {
1242 return map->dev;
1243 }
1244 EXPORT_SYMBOL_GPL(regmap_get_device);
1245
1246 static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1247 struct regmap_range_node *range,
1248 unsigned int val_num)
1249 {
1250 void *orig_work_buf;
1251 unsigned int win_offset;
1252 unsigned int win_page;
1253 bool page_chg;
1254 int ret;
1255
1256 win_offset = (*reg - range->range_min) % range->window_len;
1257 win_page = (*reg - range->range_min) / range->window_len;
1258
1259 if (val_num > 1) {
1260 /* Bulk write shouldn't cross range boundary */
1261 if (*reg + val_num - 1 > range->range_max)
1262 return -EINVAL;
1263
1264 /* ... or single page boundary */
1265 if (val_num > range->window_len - win_offset)
1266 return -EINVAL;
1267 }
1268
1269 /* It is possible to have selector register inside data window.
1270 In that case, selector register is located on every page and
1271 it needs no page switching, when accessed alone. */
1272 if (val_num > 1 ||
1273 range->window_start + win_offset != range->selector_reg) {
1274 /* Use separate work_buf during page switching */
1275 orig_work_buf = map->work_buf;
1276 map->work_buf = map->selector_work_buf;
1277
1278 ret = _regmap_update_bits(map, range->selector_reg,
1279 range->selector_mask,
1280 win_page << range->selector_shift,
1281 &page_chg, false);
1282
1283 map->work_buf = orig_work_buf;
1284
1285 if (ret != 0)
1286 return ret;
1287 }
1288
1289 *reg = range->window_start + win_offset;
1290
1291 return 0;
1292 }
1293
1294 int _regmap_raw_write(struct regmap *map, unsigned int reg,
1295 const void *val, size_t val_len)
1296 {
1297 struct regmap_range_node *range;
1298 unsigned long flags;
1299 u8 *u8 = map->work_buf;
1300 void *work_val = map->work_buf + map->format.reg_bytes +
1301 map->format.pad_bytes;
1302 void *buf;
1303 int ret = -ENOTSUPP;
1304 size_t len;
1305 int i;
1306
1307 WARN_ON(!map->bus);
1308
1309 /* Check for unwritable registers before we start */
1310 if (map->writeable_reg)
1311 for (i = 0; i < val_len / map->format.val_bytes; i++)
1312 if (!map->writeable_reg(map->dev,
1313 reg + (i * map->reg_stride)))
1314 return -EINVAL;
1315
1316 if (!map->cache_bypass && map->format.parse_val) {
1317 unsigned int ival;
1318 int val_bytes = map->format.val_bytes;
1319 for (i = 0; i < val_len / val_bytes; i++) {
1320 ival = map->format.parse_val(val + (i * val_bytes));
1321 ret = regcache_write(map, reg + (i * map->reg_stride),
1322 ival);
1323 if (ret) {
1324 dev_err(map->dev,
1325 "Error in caching of register: %x ret: %d\n",
1326 reg + i, ret);
1327 return ret;
1328 }
1329 }
1330 if (map->cache_only) {
1331 map->cache_dirty = true;
1332 return 0;
1333 }
1334 }
1335
1336 range = _regmap_range_lookup(map, reg);
1337 if (range) {
1338 int val_num = val_len / map->format.val_bytes;
1339 int win_offset = (reg - range->range_min) % range->window_len;
1340 int win_residue = range->window_len - win_offset;
1341
1342 /* If the write goes beyond the end of the window split it */
1343 while (val_num > win_residue) {
1344 dev_dbg(map->dev, "Writing window %d/%zu\n",
1345 win_residue, val_len / map->format.val_bytes);
1346 ret = _regmap_raw_write(map, reg, val, win_residue *
1347 map->format.val_bytes);
1348 if (ret != 0)
1349 return ret;
1350
1351 reg += win_residue;
1352 val_num -= win_residue;
1353 val += win_residue * map->format.val_bytes;
1354 val_len -= win_residue * map->format.val_bytes;
1355
1356 win_offset = (reg - range->range_min) %
1357 range->window_len;
1358 win_residue = range->window_len - win_offset;
1359 }
1360
1361 ret = _regmap_select_page(map, &reg, range, val_num);
1362 if (ret != 0)
1363 return ret;
1364 }
1365
1366 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1367
1368 u8[0] |= map->write_flag_mask;
1369
1370 /*
1371 * Essentially all I/O mechanisms will be faster with a single
1372 * buffer to write. Since register syncs often generate raw
1373 * writes of single registers optimise that case.
1374 */
1375 if (val != work_val && val_len == map->format.val_bytes) {
1376 memcpy(work_val, val, map->format.val_bytes);
1377 val = work_val;
1378 }
1379
1380 if (map->async && map->bus->async_write) {
1381 struct regmap_async *async;
1382
1383 trace_regmap_async_write_start(map, reg, val_len);
1384
1385 spin_lock_irqsave(&map->async_lock, flags);
1386 async = list_first_entry_or_null(&map->async_free,
1387 struct regmap_async,
1388 list);
1389 if (async)
1390 list_del(&async->list);
1391 spin_unlock_irqrestore(&map->async_lock, flags);
1392
1393 if (!async) {
1394 async = map->bus->async_alloc();
1395 if (!async)
1396 return -ENOMEM;
1397
1398 async->work_buf = kzalloc(map->format.buf_size,
1399 GFP_KERNEL | GFP_DMA);
1400 if (!async->work_buf) {
1401 kfree(async);
1402 return -ENOMEM;
1403 }
1404 }
1405
1406 async->map = map;
1407
1408 /* If the caller supplied the value we can use it safely. */
1409 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1410 map->format.reg_bytes + map->format.val_bytes);
1411
1412 spin_lock_irqsave(&map->async_lock, flags);
1413 list_add_tail(&async->list, &map->async_list);
1414 spin_unlock_irqrestore(&map->async_lock, flags);
1415
1416 if (val != work_val)
1417 ret = map->bus->async_write(map->bus_context,
1418 async->work_buf,
1419 map->format.reg_bytes +
1420 map->format.pad_bytes,
1421 val, val_len, async);
1422 else
1423 ret = map->bus->async_write(map->bus_context,
1424 async->work_buf,
1425 map->format.reg_bytes +
1426 map->format.pad_bytes +
1427 val_len, NULL, 0, async);
1428
1429 if (ret != 0) {
1430 dev_err(map->dev, "Failed to schedule write: %d\n",
1431 ret);
1432
1433 spin_lock_irqsave(&map->async_lock, flags);
1434 list_move(&async->list, &map->async_free);
1435 spin_unlock_irqrestore(&map->async_lock, flags);
1436 }
1437
1438 return ret;
1439 }
1440
1441 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1442
1443 /* If we're doing a single register write we can probably just
1444 * send the work_buf directly, otherwise try to do a gather
1445 * write.
1446 */
1447 if (val == work_val)
1448 ret = map->bus->write(map->bus_context, map->work_buf,
1449 map->format.reg_bytes +
1450 map->format.pad_bytes +
1451 val_len);
1452 else if (map->bus->gather_write)
1453 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1454 map->format.reg_bytes +
1455 map->format.pad_bytes,
1456 val, val_len);
1457
1458 /* If that didn't work fall back on linearising by hand. */
1459 if (ret == -ENOTSUPP) {
1460 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1461 buf = kzalloc(len, GFP_KERNEL);
1462 if (!buf)
1463 return -ENOMEM;
1464
1465 memcpy(buf, map->work_buf, map->format.reg_bytes);
1466 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1467 val, val_len);
1468 ret = map->bus->write(map->bus_context, buf, len);
1469
1470 kfree(buf);
1471 }
1472
1473 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1474
1475 return ret;
1476 }
1477
1478 /**
1479 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1480 *
1481 * @map: Map to check.
1482 */
1483 bool regmap_can_raw_write(struct regmap *map)
1484 {
1485 return map->bus && map->bus->write && map->format.format_val &&
1486 map->format.format_reg;
1487 }
1488 EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1489
1490 /**
1491 * regmap_get_raw_read_max - Get the maximum size we can read
1492 *
1493 * @map: Map to check.
1494 */
1495 size_t regmap_get_raw_read_max(struct regmap *map)
1496 {
1497 return map->max_raw_read;
1498 }
1499 EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1500
1501 /**
1502 * regmap_get_raw_write_max - Get the maximum size we can read
1503 *
1504 * @map: Map to check.
1505 */
1506 size_t regmap_get_raw_write_max(struct regmap *map)
1507 {
1508 return map->max_raw_write;
1509 }
1510 EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1511
1512 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1513 unsigned int val)
1514 {
1515 int ret;
1516 struct regmap_range_node *range;
1517 struct regmap *map = context;
1518
1519 WARN_ON(!map->bus || !map->format.format_write);
1520
1521 range = _regmap_range_lookup(map, reg);
1522 if (range) {
1523 ret = _regmap_select_page(map, &reg, range, 1);
1524 if (ret != 0)
1525 return ret;
1526 }
1527
1528 map->format.format_write(map, reg, val);
1529
1530 trace_regmap_hw_write_start(map, reg, 1);
1531
1532 ret = map->bus->write(map->bus_context, map->work_buf,
1533 map->format.buf_size);
1534
1535 trace_regmap_hw_write_done(map, reg, 1);
1536
1537 return ret;
1538 }
1539
1540 static int _regmap_bus_reg_write(void *context, unsigned int reg,
1541 unsigned int val)
1542 {
1543 struct regmap *map = context;
1544
1545 return map->bus->reg_write(map->bus_context, reg, val);
1546 }
1547
1548 static int _regmap_bus_raw_write(void *context, unsigned int reg,
1549 unsigned int val)
1550 {
1551 struct regmap *map = context;
1552
1553 WARN_ON(!map->bus || !map->format.format_val);
1554
1555 map->format.format_val(map->work_buf + map->format.reg_bytes
1556 + map->format.pad_bytes, val, 0);
1557 return _regmap_raw_write(map, reg,
1558 map->work_buf +
1559 map->format.reg_bytes +
1560 map->format.pad_bytes,
1561 map->format.val_bytes);
1562 }
1563
1564 static inline void *_regmap_map_get_context(struct regmap *map)
1565 {
1566 return (map->bus) ? map : map->bus_context;
1567 }
1568
1569 int _regmap_write(struct regmap *map, unsigned int reg,
1570 unsigned int val)
1571 {
1572 int ret;
1573 void *context = _regmap_map_get_context(map);
1574
1575 if (!regmap_writeable(map, reg))
1576 return -EIO;
1577
1578 if (!map->cache_bypass && !map->defer_caching) {
1579 ret = regcache_write(map, reg, val);
1580 if (ret != 0)
1581 return ret;
1582 if (map->cache_only) {
1583 map->cache_dirty = true;
1584 return 0;
1585 }
1586 }
1587
1588 #ifdef LOG_DEVICE
1589 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1590 dev_info(map->dev, "%x <= %x\n", reg, val);
1591 #endif
1592
1593 trace_regmap_reg_write(map, reg, val);
1594
1595 return map->reg_write(context, reg, val);
1596 }
1597
1598 /**
1599 * regmap_write(): Write a value to a single register
1600 *
1601 * @map: Register map to write to
1602 * @reg: Register to write to
1603 * @val: Value to be written
1604 *
1605 * A value of zero will be returned on success, a negative errno will
1606 * be returned in error cases.
1607 */
1608 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1609 {
1610 int ret;
1611
1612 if (!IS_ALIGNED(reg, map->reg_stride))
1613 return -EINVAL;
1614
1615 map->lock(map->lock_arg);
1616
1617 ret = _regmap_write(map, reg, val);
1618
1619 map->unlock(map->lock_arg);
1620
1621 return ret;
1622 }
1623 EXPORT_SYMBOL_GPL(regmap_write);
1624
1625 /**
1626 * regmap_write_async(): Write a value to a single register asynchronously
1627 *
1628 * @map: Register map to write to
1629 * @reg: Register to write to
1630 * @val: Value to be written
1631 *
1632 * A value of zero will be returned on success, a negative errno will
1633 * be returned in error cases.
1634 */
1635 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1636 {
1637 int ret;
1638
1639 if (!IS_ALIGNED(reg, map->reg_stride))
1640 return -EINVAL;
1641
1642 map->lock(map->lock_arg);
1643
1644 map->async = true;
1645
1646 ret = _regmap_write(map, reg, val);
1647
1648 map->async = false;
1649
1650 map->unlock(map->lock_arg);
1651
1652 return ret;
1653 }
1654 EXPORT_SYMBOL_GPL(regmap_write_async);
1655
1656 /**
1657 * regmap_raw_write(): Write raw values to one or more registers
1658 *
1659 * @map: Register map to write to
1660 * @reg: Initial register to write to
1661 * @val: Block of data to be written, laid out for direct transmission to the
1662 * device
1663 * @val_len: Length of data pointed to by val.
1664 *
1665 * This function is intended to be used for things like firmware
1666 * download where a large block of data needs to be transferred to the
1667 * device. No formatting will be done on the data provided.
1668 *
1669 * A value of zero will be returned on success, a negative errno will
1670 * be returned in error cases.
1671 */
1672 int regmap_raw_write(struct regmap *map, unsigned int reg,
1673 const void *val, size_t val_len)
1674 {
1675 int ret;
1676
1677 if (!regmap_can_raw_write(map))
1678 return -EINVAL;
1679 if (val_len % map->format.val_bytes)
1680 return -EINVAL;
1681 if (map->max_raw_write && map->max_raw_write > val_len)
1682 return -E2BIG;
1683
1684 map->lock(map->lock_arg);
1685
1686 ret = _regmap_raw_write(map, reg, val, val_len);
1687
1688 map->unlock(map->lock_arg);
1689
1690 return ret;
1691 }
1692 EXPORT_SYMBOL_GPL(regmap_raw_write);
1693
1694 /**
1695 * regmap_field_update_bits_base():
1696 * Perform a read/modify/write cycle on the register field
1697 * with change, async, force option
1698 *
1699 * @field: Register field to write to
1700 * @mask: Bitmask to change
1701 * @val: Value to be written
1702 * @change: Boolean indicating if a write was done
1703 * @async: Boolean indicating asynchronously
1704 * @force: Boolean indicating use force update
1705 *
1706 * A value of zero will be returned on success, a negative errno will
1707 * be returned in error cases.
1708 */
1709 int regmap_field_update_bits_base(struct regmap_field *field,
1710 unsigned int mask, unsigned int val,
1711 bool *change, bool async, bool force)
1712 {
1713 mask = (mask << field->shift) & field->mask;
1714
1715 return regmap_update_bits_base(field->regmap, field->reg,
1716 mask, val << field->shift,
1717 change, async, force);
1718 }
1719 EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
1720
1721 /**
1722 * regmap_fields_update_bits_base():
1723 * Perform a read/modify/write cycle on the register field
1724 * with change, async, force option
1725 *
1726 * @field: Register field to write to
1727 * @id: port ID
1728 * @mask: Bitmask to change
1729 * @val: Value to be written
1730 * @change: Boolean indicating if a write was done
1731 * @async: Boolean indicating asynchronously
1732 * @force: Boolean indicating use force update
1733 *
1734 * A value of zero will be returned on success, a negative errno will
1735 * be returned in error cases.
1736 */
1737 int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1738 unsigned int mask, unsigned int val,
1739 bool *change, bool async, bool force)
1740 {
1741 if (id >= field->id_size)
1742 return -EINVAL;
1743
1744 mask = (mask << field->shift) & field->mask;
1745
1746 return regmap_update_bits_base(field->regmap,
1747 field->reg + (field->id_offset * id),
1748 mask, val << field->shift,
1749 change, async, force);
1750 }
1751 EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
1752
1753 /*
1754 * regmap_bulk_write(): Write multiple registers to the device
1755 *
1756 * @map: Register map to write to
1757 * @reg: First register to be write from
1758 * @val: Block of data to be written, in native register size for device
1759 * @val_count: Number of registers to write
1760 *
1761 * This function is intended to be used for writing a large block of
1762 * data to the device either in single transfer or multiple transfer.
1763 *
1764 * A value of zero will be returned on success, a negative errno will
1765 * be returned in error cases.
1766 */
1767 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1768 size_t val_count)
1769 {
1770 int ret = 0, i;
1771 size_t val_bytes = map->format.val_bytes;
1772 size_t total_size = val_bytes * val_count;
1773
1774 if (map->bus && !map->format.parse_inplace)
1775 return -EINVAL;
1776 if (!IS_ALIGNED(reg, map->reg_stride))
1777 return -EINVAL;
1778
1779 /*
1780 * Some devices don't support bulk write, for
1781 * them we have a series of single write operations in the first two if
1782 * blocks.
1783 *
1784 * The first if block is used for memory mapped io. It does not allow
1785 * val_bytes of 3 for example.
1786 * The second one is used for busses which do not have this limitation
1787 * and can write arbitrary value lengths.
1788 */
1789 if (!map->bus) {
1790 map->lock(map->lock_arg);
1791 for (i = 0; i < val_count; i++) {
1792 unsigned int ival;
1793
1794 switch (val_bytes) {
1795 case 1:
1796 ival = *(u8 *)(val + (i * val_bytes));
1797 break;
1798 case 2:
1799 ival = *(u16 *)(val + (i * val_bytes));
1800 break;
1801 case 4:
1802 ival = *(u32 *)(val + (i * val_bytes));
1803 break;
1804 #ifdef CONFIG_64BIT
1805 case 8:
1806 ival = *(u64 *)(val + (i * val_bytes));
1807 break;
1808 #endif
1809 default:
1810 ret = -EINVAL;
1811 goto out;
1812 }
1813
1814 ret = _regmap_write(map, reg + (i * map->reg_stride),
1815 ival);
1816 if (ret != 0)
1817 goto out;
1818 }
1819 out:
1820 map->unlock(map->lock_arg);
1821 } else if (map->use_single_write ||
1822 (map->max_raw_write && map->max_raw_write < total_size)) {
1823 int chunk_stride = map->reg_stride;
1824 size_t chunk_size = val_bytes;
1825 size_t chunk_count = val_count;
1826
1827 if (!map->use_single_write) {
1828 chunk_size = map->max_raw_write;
1829 if (chunk_size % val_bytes)
1830 chunk_size -= chunk_size % val_bytes;
1831 chunk_count = total_size / chunk_size;
1832 chunk_stride *= chunk_size / val_bytes;
1833 }
1834
1835 map->lock(map->lock_arg);
1836 /* Write as many bytes as possible with chunk_size */
1837 for (i = 0; i < chunk_count; i++) {
1838 ret = _regmap_raw_write(map,
1839 reg + (i * chunk_stride),
1840 val + (i * chunk_size),
1841 chunk_size);
1842 if (ret)
1843 break;
1844 }
1845
1846 /* Write remaining bytes */
1847 if (!ret && chunk_size * i < total_size) {
1848 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1849 val + (i * chunk_size),
1850 total_size - i * chunk_size);
1851 }
1852 map->unlock(map->lock_arg);
1853 } else {
1854 void *wval;
1855
1856 if (!val_count)
1857 return -EINVAL;
1858
1859 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
1860 if (!wval) {
1861 dev_err(map->dev, "Error in memory allocation\n");
1862 return -ENOMEM;
1863 }
1864 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1865 map->format.parse_inplace(wval + i);
1866
1867 map->lock(map->lock_arg);
1868 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1869 map->unlock(map->lock_arg);
1870
1871 kfree(wval);
1872 }
1873 return ret;
1874 }
1875 EXPORT_SYMBOL_GPL(regmap_bulk_write);
1876
1877 /*
1878 * _regmap_raw_multi_reg_write()
1879 *
1880 * the (register,newvalue) pairs in regs have not been formatted, but
1881 * they are all in the same page and have been changed to being page
1882 * relative. The page register has been written if that was necessary.
1883 */
1884 static int _regmap_raw_multi_reg_write(struct regmap *map,
1885 const struct reg_sequence *regs,
1886 size_t num_regs)
1887 {
1888 int ret;
1889 void *buf;
1890 int i;
1891 u8 *u8;
1892 size_t val_bytes = map->format.val_bytes;
1893 size_t reg_bytes = map->format.reg_bytes;
1894 size_t pad_bytes = map->format.pad_bytes;
1895 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1896 size_t len = pair_size * num_regs;
1897
1898 if (!len)
1899 return -EINVAL;
1900
1901 buf = kzalloc(len, GFP_KERNEL);
1902 if (!buf)
1903 return -ENOMEM;
1904
1905 /* We have to linearise by hand. */
1906
1907 u8 = buf;
1908
1909 for (i = 0; i < num_regs; i++) {
1910 unsigned int reg = regs[i].reg;
1911 unsigned int val = regs[i].def;
1912 trace_regmap_hw_write_start(map, reg, 1);
1913 map->format.format_reg(u8, reg, map->reg_shift);
1914 u8 += reg_bytes + pad_bytes;
1915 map->format.format_val(u8, val, 0);
1916 u8 += val_bytes;
1917 }
1918 u8 = buf;
1919 *u8 |= map->write_flag_mask;
1920
1921 ret = map->bus->write(map->bus_context, buf, len);
1922
1923 kfree(buf);
1924
1925 for (i = 0; i < num_regs; i++) {
1926 int reg = regs[i].reg;
1927 trace_regmap_hw_write_done(map, reg, 1);
1928 }
1929 return ret;
1930 }
1931
1932 static unsigned int _regmap_register_page(struct regmap *map,
1933 unsigned int reg,
1934 struct regmap_range_node *range)
1935 {
1936 unsigned int win_page = (reg - range->range_min) / range->window_len;
1937
1938 return win_page;
1939 }
1940
1941 static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1942 struct reg_sequence *regs,
1943 size_t num_regs)
1944 {
1945 int ret;
1946 int i, n;
1947 struct reg_sequence *base;
1948 unsigned int this_page = 0;
1949 unsigned int page_change = 0;
1950 /*
1951 * the set of registers are not neccessarily in order, but
1952 * since the order of write must be preserved this algorithm
1953 * chops the set each time the page changes. This also applies
1954 * if there is a delay required at any point in the sequence.
1955 */
1956 base = regs;
1957 for (i = 0, n = 0; i < num_regs; i++, n++) {
1958 unsigned int reg = regs[i].reg;
1959 struct regmap_range_node *range;
1960
1961 range = _regmap_range_lookup(map, reg);
1962 if (range) {
1963 unsigned int win_page = _regmap_register_page(map, reg,
1964 range);
1965
1966 if (i == 0)
1967 this_page = win_page;
1968 if (win_page != this_page) {
1969 this_page = win_page;
1970 page_change = 1;
1971 }
1972 }
1973
1974 /* If we have both a page change and a delay make sure to
1975 * write the regs and apply the delay before we change the
1976 * page.
1977 */
1978
1979 if (page_change || regs[i].delay_us) {
1980
1981 /* For situations where the first write requires
1982 * a delay we need to make sure we don't call
1983 * raw_multi_reg_write with n=0
1984 * This can't occur with page breaks as we
1985 * never write on the first iteration
1986 */
1987 if (regs[i].delay_us && i == 0)
1988 n = 1;
1989
1990 ret = _regmap_raw_multi_reg_write(map, base, n);
1991 if (ret != 0)
1992 return ret;
1993
1994 if (regs[i].delay_us)
1995 udelay(regs[i].delay_us);
1996
1997 base += n;
1998 n = 0;
1999
2000 if (page_change) {
2001 ret = _regmap_select_page(map,
2002 &base[n].reg,
2003 range, 1);
2004 if (ret != 0)
2005 return ret;
2006
2007 page_change = 0;
2008 }
2009
2010 }
2011
2012 }
2013 if (n > 0)
2014 return _regmap_raw_multi_reg_write(map, base, n);
2015 return 0;
2016 }
2017
2018 static int _regmap_multi_reg_write(struct regmap *map,
2019 const struct reg_sequence *regs,
2020 size_t num_regs)
2021 {
2022 int i;
2023 int ret;
2024
2025 if (!map->can_multi_write) {
2026 for (i = 0; i < num_regs; i++) {
2027 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2028 if (ret != 0)
2029 return ret;
2030
2031 if (regs[i].delay_us)
2032 udelay(regs[i].delay_us);
2033 }
2034 return 0;
2035 }
2036
2037 if (!map->format.parse_inplace)
2038 return -EINVAL;
2039
2040 if (map->writeable_reg)
2041 for (i = 0; i < num_regs; i++) {
2042 int reg = regs[i].reg;
2043 if (!map->writeable_reg(map->dev, reg))
2044 return -EINVAL;
2045 if (!IS_ALIGNED(reg, map->reg_stride))
2046 return -EINVAL;
2047 }
2048
2049 if (!map->cache_bypass) {
2050 for (i = 0; i < num_regs; i++) {
2051 unsigned int val = regs[i].def;
2052 unsigned int reg = regs[i].reg;
2053 ret = regcache_write(map, reg, val);
2054 if (ret) {
2055 dev_err(map->dev,
2056 "Error in caching of register: %x ret: %d\n",
2057 reg, ret);
2058 return ret;
2059 }
2060 }
2061 if (map->cache_only) {
2062 map->cache_dirty = true;
2063 return 0;
2064 }
2065 }
2066
2067 WARN_ON(!map->bus);
2068
2069 for (i = 0; i < num_regs; i++) {
2070 unsigned int reg = regs[i].reg;
2071 struct regmap_range_node *range;
2072
2073 /* Coalesce all the writes between a page break or a delay
2074 * in a sequence
2075 */
2076 range = _regmap_range_lookup(map, reg);
2077 if (range || regs[i].delay_us) {
2078 size_t len = sizeof(struct reg_sequence)*num_regs;
2079 struct reg_sequence *base = kmemdup(regs, len,
2080 GFP_KERNEL);
2081 if (!base)
2082 return -ENOMEM;
2083 ret = _regmap_range_multi_paged_reg_write(map, base,
2084 num_regs);
2085 kfree(base);
2086
2087 return ret;
2088 }
2089 }
2090 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2091 }
2092
2093 /*
2094 * regmap_multi_reg_write(): Write multiple registers to the device
2095 *
2096 * where the set of register,value pairs are supplied in any order,
2097 * possibly not all in a single range.
2098 *
2099 * @map: Register map to write to
2100 * @regs: Array of structures containing register,value to be written
2101 * @num_regs: Number of registers to write
2102 *
2103 * The 'normal' block write mode will send ultimately send data on the
2104 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
2105 * addressed. However, this alternative block multi write mode will send
2106 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2107 * must of course support the mode.
2108 *
2109 * A value of zero will be returned on success, a negative errno will be
2110 * returned in error cases.
2111 */
2112 int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2113 int num_regs)
2114 {
2115 int ret;
2116
2117 map->lock(map->lock_arg);
2118
2119 ret = _regmap_multi_reg_write(map, regs, num_regs);
2120
2121 map->unlock(map->lock_arg);
2122
2123 return ret;
2124 }
2125 EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2126
2127 /*
2128 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
2129 * device but not the cache
2130 *
2131 * where the set of register are supplied in any order
2132 *
2133 * @map: Register map to write to
2134 * @regs: Array of structures containing register,value to be written
2135 * @num_regs: Number of registers to write
2136 *
2137 * This function is intended to be used for writing a large block of data
2138 * atomically to the device in single transfer for those I2C client devices
2139 * that implement this alternative block write mode.
2140 *
2141 * A value of zero will be returned on success, a negative errno will
2142 * be returned in error cases.
2143 */
2144 int regmap_multi_reg_write_bypassed(struct regmap *map,
2145 const struct reg_sequence *regs,
2146 int num_regs)
2147 {
2148 int ret;
2149 bool bypass;
2150
2151 map->lock(map->lock_arg);
2152
2153 bypass = map->cache_bypass;
2154 map->cache_bypass = true;
2155
2156 ret = _regmap_multi_reg_write(map, regs, num_regs);
2157
2158 map->cache_bypass = bypass;
2159
2160 map->unlock(map->lock_arg);
2161
2162 return ret;
2163 }
2164 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2165
2166 /**
2167 * regmap_raw_write_async(): Write raw values to one or more registers
2168 * asynchronously
2169 *
2170 * @map: Register map to write to
2171 * @reg: Initial register to write to
2172 * @val: Block of data to be written, laid out for direct transmission to the
2173 * device. Must be valid until regmap_async_complete() is called.
2174 * @val_len: Length of data pointed to by val.
2175 *
2176 * This function is intended to be used for things like firmware
2177 * download where a large block of data needs to be transferred to the
2178 * device. No formatting will be done on the data provided.
2179 *
2180 * If supported by the underlying bus the write will be scheduled
2181 * asynchronously, helping maximise I/O speed on higher speed buses
2182 * like SPI. regmap_async_complete() can be called to ensure that all
2183 * asynchrnous writes have been completed.
2184 *
2185 * A value of zero will be returned on success, a negative errno will
2186 * be returned in error cases.
2187 */
2188 int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2189 const void *val, size_t val_len)
2190 {
2191 int ret;
2192
2193 if (val_len % map->format.val_bytes)
2194 return -EINVAL;
2195 if (!IS_ALIGNED(reg, map->reg_stride))
2196 return -EINVAL;
2197
2198 map->lock(map->lock_arg);
2199
2200 map->async = true;
2201
2202 ret = _regmap_raw_write(map, reg, val, val_len);
2203
2204 map->async = false;
2205
2206 map->unlock(map->lock_arg);
2207
2208 return ret;
2209 }
2210 EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2211
2212 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2213 unsigned int val_len)
2214 {
2215 struct regmap_range_node *range;
2216 u8 *u8 = map->work_buf;
2217 int ret;
2218
2219 WARN_ON(!map->bus);
2220
2221 if (!map->bus || !map->bus->read)
2222 return -EINVAL;
2223
2224 range = _regmap_range_lookup(map, reg);
2225 if (range) {
2226 ret = _regmap_select_page(map, &reg, range,
2227 val_len / map->format.val_bytes);
2228 if (ret != 0)
2229 return ret;
2230 }
2231
2232 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2233
2234 /*
2235 * Some buses or devices flag reads by setting the high bits in the
2236 * register address; since it's always the high bits for all
2237 * current formats we can do this here rather than in
2238 * formatting. This may break if we get interesting formats.
2239 */
2240 u8[0] |= map->read_flag_mask;
2241
2242 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2243
2244 ret = map->bus->read(map->bus_context, map->work_buf,
2245 map->format.reg_bytes + map->format.pad_bytes,
2246 val, val_len);
2247
2248 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2249
2250 return ret;
2251 }
2252
2253 static int _regmap_bus_reg_read(void *context, unsigned int reg,
2254 unsigned int *val)
2255 {
2256 struct regmap *map = context;
2257
2258 return map->bus->reg_read(map->bus_context, reg, val);
2259 }
2260
2261 static int _regmap_bus_read(void *context, unsigned int reg,
2262 unsigned int *val)
2263 {
2264 int ret;
2265 struct regmap *map = context;
2266
2267 if (!map->format.parse_val)
2268 return -EINVAL;
2269
2270 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2271 if (ret == 0)
2272 *val = map->format.parse_val(map->work_buf);
2273
2274 return ret;
2275 }
2276
2277 static int _regmap_read(struct regmap *map, unsigned int reg,
2278 unsigned int *val)
2279 {
2280 int ret;
2281 void *context = _regmap_map_get_context(map);
2282
2283 if (!map->cache_bypass) {
2284 ret = regcache_read(map, reg, val);
2285 if (ret == 0)
2286 return 0;
2287 }
2288
2289 if (map->cache_only)
2290 return -EBUSY;
2291
2292 if (!regmap_readable(map, reg))
2293 return -EIO;
2294
2295 ret = map->reg_read(context, reg, val);
2296 if (ret == 0) {
2297 #ifdef LOG_DEVICE
2298 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2299 dev_info(map->dev, "%x => %x\n", reg, *val);
2300 #endif
2301
2302 trace_regmap_reg_read(map, reg, *val);
2303
2304 if (!map->cache_bypass)
2305 regcache_write(map, reg, *val);
2306 }
2307
2308 return ret;
2309 }
2310
2311 /**
2312 * regmap_read(): Read a value from a single register
2313 *
2314 * @map: Register map to read from
2315 * @reg: Register to be read from
2316 * @val: Pointer to store read value
2317 *
2318 * A value of zero will be returned on success, a negative errno will
2319 * be returned in error cases.
2320 */
2321 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2322 {
2323 int ret;
2324
2325 if (!IS_ALIGNED(reg, map->reg_stride))
2326 return -EINVAL;
2327
2328 map->lock(map->lock_arg);
2329
2330 ret = _regmap_read(map, reg, val);
2331
2332 map->unlock(map->lock_arg);
2333
2334 return ret;
2335 }
2336 EXPORT_SYMBOL_GPL(regmap_read);
2337
2338 /**
2339 * regmap_raw_read(): Read raw data from the device
2340 *
2341 * @map: Register map to read from
2342 * @reg: First register to be read from
2343 * @val: Pointer to store read value
2344 * @val_len: Size of data to read
2345 *
2346 * A value of zero will be returned on success, a negative errno will
2347 * be returned in error cases.
2348 */
2349 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2350 size_t val_len)
2351 {
2352 size_t val_bytes = map->format.val_bytes;
2353 size_t val_count = val_len / val_bytes;
2354 unsigned int v;
2355 int ret, i;
2356
2357 if (!map->bus)
2358 return -EINVAL;
2359 if (val_len % map->format.val_bytes)
2360 return -EINVAL;
2361 if (!IS_ALIGNED(reg, map->reg_stride))
2362 return -EINVAL;
2363 if (val_count == 0)
2364 return -EINVAL;
2365
2366 map->lock(map->lock_arg);
2367
2368 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2369 map->cache_type == REGCACHE_NONE) {
2370 if (!map->bus->read) {
2371 ret = -ENOTSUPP;
2372 goto out;
2373 }
2374 if (map->max_raw_read && map->max_raw_read < val_len) {
2375 ret = -E2BIG;
2376 goto out;
2377 }
2378
2379 /* Physical block read if there's no cache involved */
2380 ret = _regmap_raw_read(map, reg, val, val_len);
2381
2382 } else {
2383 /* Otherwise go word by word for the cache; should be low
2384 * cost as we expect to hit the cache.
2385 */
2386 for (i = 0; i < val_count; i++) {
2387 ret = _regmap_read(map, reg + (i * map->reg_stride),
2388 &v);
2389 if (ret != 0)
2390 goto out;
2391
2392 map->format.format_val(val + (i * val_bytes), v, 0);
2393 }
2394 }
2395
2396 out:
2397 map->unlock(map->lock_arg);
2398
2399 return ret;
2400 }
2401 EXPORT_SYMBOL_GPL(regmap_raw_read);
2402
2403 /**
2404 * regmap_field_read(): Read a value to a single register field
2405 *
2406 * @field: Register field to read from
2407 * @val: Pointer to store read value
2408 *
2409 * A value of zero will be returned on success, a negative errno will
2410 * be returned in error cases.
2411 */
2412 int regmap_field_read(struct regmap_field *field, unsigned int *val)
2413 {
2414 int ret;
2415 unsigned int reg_val;
2416 ret = regmap_read(field->regmap, field->reg, &reg_val);
2417 if (ret != 0)
2418 return ret;
2419
2420 reg_val &= field->mask;
2421 reg_val >>= field->shift;
2422 *val = reg_val;
2423
2424 return ret;
2425 }
2426 EXPORT_SYMBOL_GPL(regmap_field_read);
2427
2428 /**
2429 * regmap_fields_read(): Read a value to a single register field with port ID
2430 *
2431 * @field: Register field to read from
2432 * @id: port ID
2433 * @val: Pointer to store read value
2434 *
2435 * A value of zero will be returned on success, a negative errno will
2436 * be returned in error cases.
2437 */
2438 int regmap_fields_read(struct regmap_field *field, unsigned int id,
2439 unsigned int *val)
2440 {
2441 int ret;
2442 unsigned int reg_val;
2443
2444 if (id >= field->id_size)
2445 return -EINVAL;
2446
2447 ret = regmap_read(field->regmap,
2448 field->reg + (field->id_offset * id),
2449 &reg_val);
2450 if (ret != 0)
2451 return ret;
2452
2453 reg_val &= field->mask;
2454 reg_val >>= field->shift;
2455 *val = reg_val;
2456
2457 return ret;
2458 }
2459 EXPORT_SYMBOL_GPL(regmap_fields_read);
2460
2461 /**
2462 * regmap_bulk_read(): Read multiple registers from the device
2463 *
2464 * @map: Register map to read from
2465 * @reg: First register to be read from
2466 * @val: Pointer to store read value, in native register size for device
2467 * @val_count: Number of registers to read
2468 *
2469 * A value of zero will be returned on success, a negative errno will
2470 * be returned in error cases.
2471 */
2472 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2473 size_t val_count)
2474 {
2475 int ret, i;
2476 size_t val_bytes = map->format.val_bytes;
2477 bool vol = regmap_volatile_range(map, reg, val_count);
2478
2479 if (!IS_ALIGNED(reg, map->reg_stride))
2480 return -EINVAL;
2481
2482 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2483 /*
2484 * Some devices does not support bulk read, for
2485 * them we have a series of single read operations.
2486 */
2487 size_t total_size = val_bytes * val_count;
2488
2489 if (!map->use_single_read &&
2490 (!map->max_raw_read || map->max_raw_read > total_size)) {
2491 ret = regmap_raw_read(map, reg, val,
2492 val_bytes * val_count);
2493 if (ret != 0)
2494 return ret;
2495 } else {
2496 /*
2497 * Some devices do not support bulk read or do not
2498 * support large bulk reads, for them we have a series
2499 * of read operations.
2500 */
2501 int chunk_stride = map->reg_stride;
2502 size_t chunk_size = val_bytes;
2503 size_t chunk_count = val_count;
2504
2505 if (!map->use_single_read) {
2506 chunk_size = map->max_raw_read;
2507 if (chunk_size % val_bytes)
2508 chunk_size -= chunk_size % val_bytes;
2509 chunk_count = total_size / chunk_size;
2510 chunk_stride *= chunk_size / val_bytes;
2511 }
2512
2513 /* Read bytes that fit into a multiple of chunk_size */
2514 for (i = 0; i < chunk_count; i++) {
2515 ret = regmap_raw_read(map,
2516 reg + (i * chunk_stride),
2517 val + (i * chunk_size),
2518 chunk_size);
2519 if (ret != 0)
2520 return ret;
2521 }
2522
2523 /* Read remaining bytes */
2524 if (chunk_size * i < total_size) {
2525 ret = regmap_raw_read(map,
2526 reg + (i * chunk_stride),
2527 val + (i * chunk_size),
2528 total_size - i * chunk_size);
2529 if (ret != 0)
2530 return ret;
2531 }
2532 }
2533
2534 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2535 map->format.parse_inplace(val + i);
2536 } else {
2537 for (i = 0; i < val_count; i++) {
2538 unsigned int ival;
2539 ret = regmap_read(map, reg + (i * map->reg_stride),
2540 &ival);
2541 if (ret != 0)
2542 return ret;
2543
2544 if (map->format.format_val) {
2545 map->format.format_val(val + (i * val_bytes), ival, 0);
2546 } else {
2547 /* Devices providing read and write
2548 * operations can use the bulk I/O
2549 * functions if they define a val_bytes,
2550 * we assume that the values are native
2551 * endian.
2552 */
2553 #ifdef CONFIG_64BIT
2554 u64 *u64 = val;
2555 #endif
2556 u32 *u32 = val;
2557 u16 *u16 = val;
2558 u8 *u8 = val;
2559
2560 switch (map->format.val_bytes) {
2561 #ifdef CONFIG_64BIT
2562 case 8:
2563 u64[i] = ival;
2564 break;
2565 #endif
2566 case 4:
2567 u32[i] = ival;
2568 break;
2569 case 2:
2570 u16[i] = ival;
2571 break;
2572 case 1:
2573 u8[i] = ival;
2574 break;
2575 default:
2576 return -EINVAL;
2577 }
2578 }
2579 }
2580 }
2581
2582 return 0;
2583 }
2584 EXPORT_SYMBOL_GPL(regmap_bulk_read);
2585
2586 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2587 unsigned int mask, unsigned int val,
2588 bool *change, bool force_write)
2589 {
2590 int ret;
2591 unsigned int tmp, orig;
2592
2593 if (change)
2594 *change = false;
2595
2596 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2597 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2598 if (ret == 0 && change)
2599 *change = true;
2600 } else {
2601 ret = _regmap_read(map, reg, &orig);
2602 if (ret != 0)
2603 return ret;
2604
2605 tmp = orig & ~mask;
2606 tmp |= val & mask;
2607
2608 if (force_write || (tmp != orig)) {
2609 ret = _regmap_write(map, reg, tmp);
2610 if (ret == 0 && change)
2611 *change = true;
2612 }
2613 }
2614
2615 return ret;
2616 }
2617
2618 /**
2619 * regmap_update_bits_base:
2620 * Perform a read/modify/write cycle on the
2621 * register map with change, async, force option
2622 *
2623 * @map: Register map to update
2624 * @reg: Register to update
2625 * @mask: Bitmask to change
2626 * @val: New value for bitmask
2627 * @change: Boolean indicating if a write was done
2628 * @async: Boolean indicating asynchronously
2629 * @force: Boolean indicating use force update
2630 *
2631 * if async was true,
2632 * With most buses the read must be done synchronously so this is most
2633 * useful for devices with a cache which do not need to interact with
2634 * the hardware to determine the current register value.
2635 *
2636 * Returns zero for success, a negative number on error.
2637 */
2638 int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2639 unsigned int mask, unsigned int val,
2640 bool *change, bool async, bool force)
2641 {
2642 int ret;
2643
2644 map->lock(map->lock_arg);
2645
2646 map->async = async;
2647
2648 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2649
2650 map->async = false;
2651
2652 map->unlock(map->lock_arg);
2653
2654 return ret;
2655 }
2656 EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2657
2658 /**
2659 * regmap_write_bits: Perform a read/modify/write cycle on the register map
2660 *
2661 * @map: Register map to update
2662 * @reg: Register to update
2663 * @mask: Bitmask to change
2664 * @val: New value for bitmask
2665 *
2666 * Returns zero for success, a negative number on error.
2667 */
2668 int regmap_write_bits(struct regmap *map, unsigned int reg,
2669 unsigned int mask, unsigned int val)
2670 {
2671 int ret;
2672
2673 map->lock(map->lock_arg);
2674 ret = _regmap_update_bits(map, reg, mask, val, NULL, true);
2675 map->unlock(map->lock_arg);
2676
2677 return ret;
2678 }
2679 EXPORT_SYMBOL_GPL(regmap_write_bits);
2680
2681 void regmap_async_complete_cb(struct regmap_async *async, int ret)
2682 {
2683 struct regmap *map = async->map;
2684 bool wake;
2685
2686 trace_regmap_async_io_complete(map);
2687
2688 spin_lock(&map->async_lock);
2689 list_move(&async->list, &map->async_free);
2690 wake = list_empty(&map->async_list);
2691
2692 if (ret != 0)
2693 map->async_ret = ret;
2694
2695 spin_unlock(&map->async_lock);
2696
2697 if (wake)
2698 wake_up(&map->async_waitq);
2699 }
2700 EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2701
2702 static int regmap_async_is_done(struct regmap *map)
2703 {
2704 unsigned long flags;
2705 int ret;
2706
2707 spin_lock_irqsave(&map->async_lock, flags);
2708 ret = list_empty(&map->async_list);
2709 spin_unlock_irqrestore(&map->async_lock, flags);
2710
2711 return ret;
2712 }
2713
2714 /**
2715 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2716 *
2717 * @map: Map to operate on.
2718 *
2719 * Blocks until any pending asynchronous I/O has completed. Returns
2720 * an error code for any failed I/O operations.
2721 */
2722 int regmap_async_complete(struct regmap *map)
2723 {
2724 unsigned long flags;
2725 int ret;
2726
2727 /* Nothing to do with no async support */
2728 if (!map->bus || !map->bus->async_write)
2729 return 0;
2730
2731 trace_regmap_async_complete_start(map);
2732
2733 wait_event(map->async_waitq, regmap_async_is_done(map));
2734
2735 spin_lock_irqsave(&map->async_lock, flags);
2736 ret = map->async_ret;
2737 map->async_ret = 0;
2738 spin_unlock_irqrestore(&map->async_lock, flags);
2739
2740 trace_regmap_async_complete_done(map);
2741
2742 return ret;
2743 }
2744 EXPORT_SYMBOL_GPL(regmap_async_complete);
2745
2746 /**
2747 * regmap_register_patch: Register and apply register updates to be applied
2748 * on device initialistion
2749 *
2750 * @map: Register map to apply updates to.
2751 * @regs: Values to update.
2752 * @num_regs: Number of entries in regs.
2753 *
2754 * Register a set of register updates to be applied to the device
2755 * whenever the device registers are synchronised with the cache and
2756 * apply them immediately. Typically this is used to apply
2757 * corrections to be applied to the device defaults on startup, such
2758 * as the updates some vendors provide to undocumented registers.
2759 *
2760 * The caller must ensure that this function cannot be called
2761 * concurrently with either itself or regcache_sync().
2762 */
2763 int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
2764 int num_regs)
2765 {
2766 struct reg_sequence *p;
2767 int ret;
2768 bool bypass;
2769
2770 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2771 num_regs))
2772 return 0;
2773
2774 p = krealloc(map->patch,
2775 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
2776 GFP_KERNEL);
2777 if (p) {
2778 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2779 map->patch = p;
2780 map->patch_regs += num_regs;
2781 } else {
2782 return -ENOMEM;
2783 }
2784
2785 map->lock(map->lock_arg);
2786
2787 bypass = map->cache_bypass;
2788
2789 map->cache_bypass = true;
2790 map->async = true;
2791
2792 ret = _regmap_multi_reg_write(map, regs, num_regs);
2793
2794 map->async = false;
2795 map->cache_bypass = bypass;
2796
2797 map->unlock(map->lock_arg);
2798
2799 regmap_async_complete(map);
2800
2801 return ret;
2802 }
2803 EXPORT_SYMBOL_GPL(regmap_register_patch);
2804
2805 /*
2806 * regmap_get_val_bytes(): Report the size of a register value
2807 *
2808 * Report the size of a register value, mainly intended to for use by
2809 * generic infrastructure built on top of regmap.
2810 */
2811 int regmap_get_val_bytes(struct regmap *map)
2812 {
2813 if (map->format.format_write)
2814 return -EINVAL;
2815
2816 return map->format.val_bytes;
2817 }
2818 EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2819
2820 /**
2821 * regmap_get_max_register(): Report the max register value
2822 *
2823 * Report the max register value, mainly intended to for use by
2824 * generic infrastructure built on top of regmap.
2825 */
2826 int regmap_get_max_register(struct regmap *map)
2827 {
2828 return map->max_register ? map->max_register : -EINVAL;
2829 }
2830 EXPORT_SYMBOL_GPL(regmap_get_max_register);
2831
2832 /**
2833 * regmap_get_reg_stride(): Report the register address stride
2834 *
2835 * Report the register address stride, mainly intended to for use by
2836 * generic infrastructure built on top of regmap.
2837 */
2838 int regmap_get_reg_stride(struct regmap *map)
2839 {
2840 return map->reg_stride;
2841 }
2842 EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2843
2844 int regmap_parse_val(struct regmap *map, const void *buf,
2845 unsigned int *val)
2846 {
2847 if (!map->format.parse_val)
2848 return -EINVAL;
2849
2850 *val = map->format.parse_val(buf);
2851
2852 return 0;
2853 }
2854 EXPORT_SYMBOL_GPL(regmap_parse_val);
2855
2856 static int __init regmap_initcall(void)
2857 {
2858 regmap_debugfs_initcall();
2859
2860 return 0;
2861 }
2862 postcore_initcall(regmap_initcall);
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