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irq_domain: correct a minor wrong comment for linear revmap
[deliverable/linux.git] / drivers / block / mtip32xx / mtip32xx.c
1 /*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21 #include <linux/pci.h>
22 #include <linux/interrupt.h>
23 #include <linux/ata.h>
24 #include <linux/delay.h>
25 #include <linux/hdreg.h>
26 #include <linux/uaccess.h>
27 #include <linux/random.h>
28 #include <linux/smp.h>
29 #include <linux/compat.h>
30 #include <linux/fs.h>
31 #include <linux/module.h>
32 #include <linux/genhd.h>
33 #include <linux/blkdev.h>
34 #include <linux/bio.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/idr.h>
37 #include <linux/kthread.h>
38 #include <../drivers/ata/ahci.h>
39 #include <linux/export.h>
40 #include "mtip32xx.h"
41
42 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
43 #define HW_CMD_TBL_SZ (AHCI_CMD_TBL_HDR_SZ + (MTIP_MAX_SG * 16))
44 #define HW_CMD_TBL_AR_SZ (HW_CMD_TBL_SZ * MTIP_MAX_COMMAND_SLOTS)
45 #define HW_PORT_PRIV_DMA_SZ \
46 (HW_CMD_SLOT_SZ + HW_CMD_TBL_AR_SZ + AHCI_RX_FIS_SZ)
47
48 #define HOST_CAP_NZDMA (1 << 19)
49 #define HOST_HSORG 0xFC
50 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
51 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
52 #define HSORG_HWREV 0xFF00
53 #define HSORG_STYLE 0x8
54 #define HSORG_SLOTGROUPS 0x7
55
56 #define PORT_COMMAND_ISSUE 0x38
57 #define PORT_SDBV 0x7C
58
59 #define PORT_OFFSET 0x100
60 #define PORT_MEM_SIZE 0x80
61
62 #define PORT_IRQ_ERR \
63 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
64 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
65 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
66 PORT_IRQ_OVERFLOW)
67 #define PORT_IRQ_LEGACY \
68 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
69 #define PORT_IRQ_HANDLED \
70 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
71 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
72 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
73 #define DEF_PORT_IRQ \
74 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
75
76 /* product numbers */
77 #define MTIP_PRODUCT_UNKNOWN 0x00
78 #define MTIP_PRODUCT_ASICFPGA 0x11
79
80 /* Device instance number, incremented each time a device is probed. */
81 static int instance;
82
83 /*
84 * Global variable used to hold the major block device number
85 * allocated in mtip_init().
86 */
87 static int mtip_major;
88
89 static DEFINE_SPINLOCK(rssd_index_lock);
90 static DEFINE_IDA(rssd_index_ida);
91
92 static int mtip_block_initialize(struct driver_data *dd);
93
94 #ifdef CONFIG_COMPAT
95 struct mtip_compat_ide_task_request_s {
96 __u8 io_ports[8];
97 __u8 hob_ports[8];
98 ide_reg_valid_t out_flags;
99 ide_reg_valid_t in_flags;
100 int data_phase;
101 int req_cmd;
102 compat_ulong_t out_size;
103 compat_ulong_t in_size;
104 };
105 #endif
106
107 /*
108 * This function check_for_surprise_removal is called
109 * while card is removed from the system and it will
110 * read the vendor id from the configration space
111 *
112 * @pdev Pointer to the pci_dev structure.
113 *
114 * return value
115 * true if device removed, else false
116 */
117 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
118 {
119 u16 vendor_id = 0;
120
121 /* Read the vendorID from the configuration space */
122 pci_read_config_word(pdev, 0x00, &vendor_id);
123 if (vendor_id == 0xFFFF)
124 return true; /* device removed */
125
126 return false; /* device present */
127 }
128
129 /*
130 * This function is called for clean the pending command in the
131 * command slot during the surprise removal of device and return
132 * error to the upper layer.
133 *
134 * @dd Pointer to the DRIVER_DATA structure.
135 *
136 * return value
137 * None
138 */
139 static void mtip_command_cleanup(struct driver_data *dd)
140 {
141 int group = 0, commandslot = 0, commandindex = 0;
142 struct mtip_cmd *command;
143 struct mtip_port *port = dd->port;
144 static int in_progress;
145
146 if (in_progress)
147 return;
148
149 in_progress = 1;
150
151 for (group = 0; group < 4; group++) {
152 for (commandslot = 0; commandslot < 32; commandslot++) {
153 if (!(port->allocated[group] & (1 << commandslot)))
154 continue;
155
156 commandindex = group << 5 | commandslot;
157 command = &port->commands[commandindex];
158
159 if (atomic_read(&command->active)
160 && (command->async_callback)) {
161 command->async_callback(command->async_data,
162 -ENODEV);
163 command->async_callback = NULL;
164 command->async_data = NULL;
165 }
166
167 dma_unmap_sg(&port->dd->pdev->dev,
168 command->sg,
169 command->scatter_ents,
170 command->direction);
171 }
172 }
173
174 up(&port->cmd_slot);
175
176 set_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag);
177 in_progress = 0;
178 }
179
180 /*
181 * Obtain an empty command slot.
182 *
183 * This function needs to be reentrant since it could be called
184 * at the same time on multiple CPUs. The allocation of the
185 * command slot must be atomic.
186 *
187 * @port Pointer to the port data structure.
188 *
189 * return value
190 * >= 0 Index of command slot obtained.
191 * -1 No command slots available.
192 */
193 static int get_slot(struct mtip_port *port)
194 {
195 int slot, i;
196 unsigned int num_command_slots = port->dd->slot_groups * 32;
197
198 /*
199 * Try 10 times, because there is a small race here.
200 * that's ok, because it's still cheaper than a lock.
201 *
202 * Race: Since this section is not protected by lock, same bit
203 * could be chosen by different process contexts running in
204 * different processor. So instead of costly lock, we are going
205 * with loop.
206 */
207 for (i = 0; i < 10; i++) {
208 slot = find_next_zero_bit(port->allocated,
209 num_command_slots, 1);
210 if ((slot < num_command_slots) &&
211 (!test_and_set_bit(slot, port->allocated)))
212 return slot;
213 }
214 dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n");
215
216 if (mtip_check_surprise_removal(port->dd->pdev)) {
217 /* Device not present, clean outstanding commands */
218 mtip_command_cleanup(port->dd);
219 }
220 return -1;
221 }
222
223 /*
224 * Release a command slot.
225 *
226 * @port Pointer to the port data structure.
227 * @tag Tag of command to release
228 *
229 * return value
230 * None
231 */
232 static inline void release_slot(struct mtip_port *port, int tag)
233 {
234 smp_mb__before_clear_bit();
235 clear_bit(tag, port->allocated);
236 smp_mb__after_clear_bit();
237 }
238
239 /*
240 * Reset the HBA (without sleeping)
241 *
242 * Just like hba_reset, except does not call sleep, so can be
243 * run from interrupt/tasklet context.
244 *
245 * @dd Pointer to the driver data structure.
246 *
247 * return value
248 * 0 The reset was successful.
249 * -1 The HBA Reset bit did not clear.
250 */
251 static int hba_reset_nosleep(struct driver_data *dd)
252 {
253 unsigned long timeout;
254
255 /* Chip quirk: quiesce any chip function */
256 mdelay(10);
257
258 /* Set the reset bit */
259 writel(HOST_RESET, dd->mmio + HOST_CTL);
260
261 /* Flush */
262 readl(dd->mmio + HOST_CTL);
263
264 /*
265 * Wait 10ms then spin for up to 1 second
266 * waiting for reset acknowledgement
267 */
268 timeout = jiffies + msecs_to_jiffies(1000);
269 mdelay(10);
270 while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
271 && time_before(jiffies, timeout))
272 mdelay(1);
273
274 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
275 return -1;
276
277 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
278 return -1;
279
280 return 0;
281 }
282
283 /*
284 * Issue a command to the hardware.
285 *
286 * Set the appropriate bit in the s_active and Command Issue hardware
287 * registers, causing hardware command processing to begin.
288 *
289 * @port Pointer to the port structure.
290 * @tag The tag of the command to be issued.
291 *
292 * return value
293 * None
294 */
295 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
296 {
297 atomic_set(&port->commands[tag].active, 1);
298
299 spin_lock(&port->cmd_issue_lock);
300
301 writel((1 << MTIP_TAG_BIT(tag)),
302 port->s_active[MTIP_TAG_INDEX(tag)]);
303 writel((1 << MTIP_TAG_BIT(tag)),
304 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
305
306 spin_unlock(&port->cmd_issue_lock);
307
308 /* Set the command's timeout value.*/
309 port->commands[tag].comp_time = jiffies + msecs_to_jiffies(
310 MTIP_NCQ_COMMAND_TIMEOUT_MS);
311 }
312
313 /*
314 * Enable/disable the reception of FIS
315 *
316 * @port Pointer to the port data structure
317 * @enable 1 to enable, 0 to disable
318 *
319 * return value
320 * Previous state: 1 enabled, 0 disabled
321 */
322 static int mtip_enable_fis(struct mtip_port *port, int enable)
323 {
324 u32 tmp;
325
326 /* enable FIS reception */
327 tmp = readl(port->mmio + PORT_CMD);
328 if (enable)
329 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
330 else
331 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
332
333 /* Flush */
334 readl(port->mmio + PORT_CMD);
335
336 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
337 }
338
339 /*
340 * Enable/disable the DMA engine
341 *
342 * @port Pointer to the port data structure
343 * @enable 1 to enable, 0 to disable
344 *
345 * return value
346 * Previous state: 1 enabled, 0 disabled.
347 */
348 static int mtip_enable_engine(struct mtip_port *port, int enable)
349 {
350 u32 tmp;
351
352 /* enable FIS reception */
353 tmp = readl(port->mmio + PORT_CMD);
354 if (enable)
355 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
356 else
357 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
358
359 readl(port->mmio + PORT_CMD);
360 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
361 }
362
363 /*
364 * Enables the port DMA engine and FIS reception.
365 *
366 * return value
367 * None
368 */
369 static inline void mtip_start_port(struct mtip_port *port)
370 {
371 /* Enable FIS reception */
372 mtip_enable_fis(port, 1);
373
374 /* Enable the DMA engine */
375 mtip_enable_engine(port, 1);
376 }
377
378 /*
379 * Deinitialize a port by disabling port interrupts, the DMA engine,
380 * and FIS reception.
381 *
382 * @port Pointer to the port structure
383 *
384 * return value
385 * None
386 */
387 static inline void mtip_deinit_port(struct mtip_port *port)
388 {
389 /* Disable interrupts on this port */
390 writel(0, port->mmio + PORT_IRQ_MASK);
391
392 /* Disable the DMA engine */
393 mtip_enable_engine(port, 0);
394
395 /* Disable FIS reception */
396 mtip_enable_fis(port, 0);
397 }
398
399 /*
400 * Initialize a port.
401 *
402 * This function deinitializes the port by calling mtip_deinit_port() and
403 * then initializes it by setting the command header and RX FIS addresses,
404 * clearing the SError register and any pending port interrupts before
405 * re-enabling the default set of port interrupts.
406 *
407 * @port Pointer to the port structure.
408 *
409 * return value
410 * None
411 */
412 static void mtip_init_port(struct mtip_port *port)
413 {
414 int i;
415 mtip_deinit_port(port);
416
417 /* Program the command list base and FIS base addresses */
418 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
419 writel((port->command_list_dma >> 16) >> 16,
420 port->mmio + PORT_LST_ADDR_HI);
421 writel((port->rxfis_dma >> 16) >> 16,
422 port->mmio + PORT_FIS_ADDR_HI);
423 }
424
425 writel(port->command_list_dma & 0xFFFFFFFF,
426 port->mmio + PORT_LST_ADDR);
427 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
428
429 /* Clear SError */
430 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
431
432 /* reset the completed registers.*/
433 for (i = 0; i < port->dd->slot_groups; i++)
434 writel(0xFFFFFFFF, port->completed[i]);
435
436 /* Clear any pending interrupts for this port */
437 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
438
439 /* Clear any pending interrupts on the HBA. */
440 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
441 port->dd->mmio + HOST_IRQ_STAT);
442
443 /* Enable port interrupts */
444 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
445 }
446
447 /*
448 * Restart a port
449 *
450 * @port Pointer to the port data structure.
451 *
452 * return value
453 * None
454 */
455 static void mtip_restart_port(struct mtip_port *port)
456 {
457 unsigned long timeout;
458
459 /* Disable the DMA engine */
460 mtip_enable_engine(port, 0);
461
462 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
463 timeout = jiffies + msecs_to_jiffies(500);
464 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
465 && time_before(jiffies, timeout))
466 ;
467
468 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
469 return;
470
471 /*
472 * Chip quirk: escalate to hba reset if
473 * PxCMD.CR not clear after 500 ms
474 */
475 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
476 dev_warn(&port->dd->pdev->dev,
477 "PxCMD.CR not clear, escalating reset\n");
478
479 if (hba_reset_nosleep(port->dd))
480 dev_err(&port->dd->pdev->dev,
481 "HBA reset escalation failed.\n");
482
483 /* 30 ms delay before com reset to quiesce chip */
484 mdelay(30);
485 }
486
487 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
488
489 /* Set PxSCTL.DET */
490 writel(readl(port->mmio + PORT_SCR_CTL) |
491 1, port->mmio + PORT_SCR_CTL);
492 readl(port->mmio + PORT_SCR_CTL);
493
494 /* Wait 1 ms to quiesce chip function */
495 timeout = jiffies + msecs_to_jiffies(1);
496 while (time_before(jiffies, timeout))
497 ;
498
499 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
500 return;
501
502 /* Clear PxSCTL.DET */
503 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
504 port->mmio + PORT_SCR_CTL);
505 readl(port->mmio + PORT_SCR_CTL);
506
507 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
508 timeout = jiffies + msecs_to_jiffies(500);
509 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
510 && time_before(jiffies, timeout))
511 ;
512
513 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
514 return;
515
516 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
517 dev_warn(&port->dd->pdev->dev,
518 "COM reset failed\n");
519
520 mtip_init_port(port);
521 mtip_start_port(port);
522
523 }
524
525 /*
526 * Helper function for tag logging
527 */
528 static void print_tags(struct driver_data *dd,
529 char *msg,
530 unsigned long *tagbits,
531 int cnt)
532 {
533 unsigned char tagmap[128];
534 int group, tagmap_len = 0;
535
536 memset(tagmap, 0, sizeof(tagmap));
537 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
538 tagmap_len = sprintf(tagmap + tagmap_len, "%016lX ",
539 tagbits[group-1]);
540 dev_warn(&dd->pdev->dev,
541 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
542 }
543
544 /*
545 * Called periodically to see if any read/write commands are
546 * taking too long to complete.
547 *
548 * @data Pointer to the PORT data structure.
549 *
550 * return value
551 * None
552 */
553 static void mtip_timeout_function(unsigned long int data)
554 {
555 struct mtip_port *port = (struct mtip_port *) data;
556 struct host_to_dev_fis *fis;
557 struct mtip_cmd *command;
558 int tag, cmdto_cnt = 0;
559 unsigned int bit, group;
560 unsigned int num_command_slots = port->dd->slot_groups * 32;
561 unsigned long to, tagaccum[SLOTBITS_IN_LONGS];
562
563 if (unlikely(!port))
564 return;
565
566 if (test_bit(MTIP_DDF_RESUME_BIT, &port->dd->dd_flag)) {
567 mod_timer(&port->cmd_timer,
568 jiffies + msecs_to_jiffies(30000));
569 return;
570 }
571 /* clear the tag accumulator */
572 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
573
574 for (tag = 0; tag < num_command_slots; tag++) {
575 /*
576 * Skip internal command slot as it has
577 * its own timeout mechanism
578 */
579 if (tag == MTIP_TAG_INTERNAL)
580 continue;
581
582 if (atomic_read(&port->commands[tag].active) &&
583 (time_after(jiffies, port->commands[tag].comp_time))) {
584 group = tag >> 5;
585 bit = tag & 0x1F;
586
587 command = &port->commands[tag];
588 fis = (struct host_to_dev_fis *) command->command;
589
590 set_bit(tag, tagaccum);
591 cmdto_cnt++;
592 if (cmdto_cnt == 1)
593 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
594
595 /*
596 * Clear the completed bit. This should prevent
597 * any interrupt handlers from trying to retire
598 * the command.
599 */
600 writel(1 << bit, port->completed[group]);
601
602 /* Call the async completion callback. */
603 if (likely(command->async_callback))
604 command->async_callback(command->async_data,
605 -EIO);
606 command->async_callback = NULL;
607 command->comp_func = NULL;
608
609 /* Unmap the DMA scatter list entries */
610 dma_unmap_sg(&port->dd->pdev->dev,
611 command->sg,
612 command->scatter_ents,
613 command->direction);
614
615 /*
616 * Clear the allocated bit and active tag for the
617 * command.
618 */
619 atomic_set(&port->commands[tag].active, 0);
620 release_slot(port, tag);
621
622 up(&port->cmd_slot);
623 }
624 }
625
626 if (cmdto_cnt && !test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
627 print_tags(port->dd, "timed out", tagaccum, cmdto_cnt);
628
629 mtip_restart_port(port);
630 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
631 wake_up_interruptible(&port->svc_wait);
632 }
633
634 if (port->ic_pause_timer) {
635 to = port->ic_pause_timer + msecs_to_jiffies(1000);
636 if (time_after(jiffies, to)) {
637 if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
638 port->ic_pause_timer = 0;
639 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
640 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
641 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
642 wake_up_interruptible(&port->svc_wait);
643 }
644
645
646 }
647 }
648
649 /* Restart the timer */
650 mod_timer(&port->cmd_timer,
651 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
652 }
653
654 /*
655 * IO completion function.
656 *
657 * This completion function is called by the driver ISR when a
658 * command that was issued by the kernel completes. It first calls the
659 * asynchronous completion function which normally calls back into the block
660 * layer passing the asynchronous callback data, then unmaps the
661 * scatter list associated with the completed command, and finally
662 * clears the allocated bit associated with the completed command.
663 *
664 * @port Pointer to the port data structure.
665 * @tag Tag of the command.
666 * @data Pointer to driver_data.
667 * @status Completion status.
668 *
669 * return value
670 * None
671 */
672 static void mtip_async_complete(struct mtip_port *port,
673 int tag,
674 void *data,
675 int status)
676 {
677 struct mtip_cmd *command;
678 struct driver_data *dd = data;
679 int cb_status = status ? -EIO : 0;
680
681 if (unlikely(!dd) || unlikely(!port))
682 return;
683
684 command = &port->commands[tag];
685
686 if (unlikely(status == PORT_IRQ_TF_ERR)) {
687 dev_warn(&port->dd->pdev->dev,
688 "Command tag %d failed due to TFE\n", tag);
689 }
690
691 /* Upper layer callback */
692 if (likely(command->async_callback))
693 command->async_callback(command->async_data, cb_status);
694
695 command->async_callback = NULL;
696 command->comp_func = NULL;
697
698 /* Unmap the DMA scatter list entries */
699 dma_unmap_sg(&dd->pdev->dev,
700 command->sg,
701 command->scatter_ents,
702 command->direction);
703
704 /* Clear the allocated and active bits for the command */
705 atomic_set(&port->commands[tag].active, 0);
706 release_slot(port, tag);
707
708 up(&port->cmd_slot);
709 }
710
711 /*
712 * Internal command completion callback function.
713 *
714 * This function is normally called by the driver ISR when an internal
715 * command completed. This function signals the command completion by
716 * calling complete().
717 *
718 * @port Pointer to the port data structure.
719 * @tag Tag of the command that has completed.
720 * @data Pointer to a completion structure.
721 * @status Completion status.
722 *
723 * return value
724 * None
725 */
726 static void mtip_completion(struct mtip_port *port,
727 int tag,
728 void *data,
729 int status)
730 {
731 struct mtip_cmd *command = &port->commands[tag];
732 struct completion *waiting = data;
733 if (unlikely(status == PORT_IRQ_TF_ERR))
734 dev_warn(&port->dd->pdev->dev,
735 "Internal command %d completed with TFE\n", tag);
736
737 command->async_callback = NULL;
738 command->comp_func = NULL;
739
740 complete(waiting);
741 }
742
743 static void mtip_null_completion(struct mtip_port *port,
744 int tag,
745 void *data,
746 int status)
747 {
748 return;
749 }
750
751 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
752 dma_addr_t buffer_dma, unsigned int sectors);
753 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
754 struct smart_attr *attrib);
755 /*
756 * Handle an error.
757 *
758 * @dd Pointer to the DRIVER_DATA structure.
759 *
760 * return value
761 * None
762 */
763 static void mtip_handle_tfe(struct driver_data *dd)
764 {
765 int group, tag, bit, reissue, rv;
766 struct mtip_port *port;
767 struct mtip_cmd *cmd;
768 u32 completed;
769 struct host_to_dev_fis *fis;
770 unsigned long tagaccum[SLOTBITS_IN_LONGS];
771 unsigned int cmd_cnt = 0;
772 unsigned char *buf;
773 char *fail_reason = NULL;
774 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
775
776 dev_warn(&dd->pdev->dev, "Taskfile error\n");
777
778 port = dd->port;
779
780 /* Stop the timer to prevent command timeouts. */
781 del_timer(&port->cmd_timer);
782 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
783
784 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
785 test_bit(MTIP_TAG_INTERNAL, port->allocated)) {
786 cmd = &port->commands[MTIP_TAG_INTERNAL];
787 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
788
789 atomic_inc(&cmd->active); /* active > 1 indicates error */
790 if (cmd->comp_data && cmd->comp_func) {
791 cmd->comp_func(port, MTIP_TAG_INTERNAL,
792 cmd->comp_data, PORT_IRQ_TF_ERR);
793 }
794 goto handle_tfe_exit;
795 }
796
797 /* clear the tag accumulator */
798 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
799
800 /* Loop through all the groups */
801 for (group = 0; group < dd->slot_groups; group++) {
802 completed = readl(port->completed[group]);
803
804 /* clear completed status register in the hardware.*/
805 writel(completed, port->completed[group]);
806
807 /* Process successfully completed commands */
808 for (bit = 0; bit < 32 && completed; bit++) {
809 if (!(completed & (1<<bit)))
810 continue;
811 tag = (group << 5) + bit;
812
813 /* Skip the internal command slot */
814 if (tag == MTIP_TAG_INTERNAL)
815 continue;
816
817 cmd = &port->commands[tag];
818 if (likely(cmd->comp_func)) {
819 set_bit(tag, tagaccum);
820 cmd_cnt++;
821 atomic_set(&cmd->active, 0);
822 cmd->comp_func(port,
823 tag,
824 cmd->comp_data,
825 0);
826 } else {
827 dev_err(&port->dd->pdev->dev,
828 "Missing completion func for tag %d",
829 tag);
830 if (mtip_check_surprise_removal(dd->pdev)) {
831 mtip_command_cleanup(dd);
832 /* don't proceed further */
833 return;
834 }
835 }
836 }
837 }
838
839 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
840
841 /* Restart the port */
842 mdelay(20);
843 mtip_restart_port(port);
844
845 /* Trying to determine the cause of the error */
846 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
847 dd->port->log_buf,
848 dd->port->log_buf_dma, 1);
849 if (rv) {
850 dev_warn(&dd->pdev->dev,
851 "Error in READ LOG EXT (10h) command\n");
852 /* non-critical error, don't fail the load */
853 } else {
854 buf = (unsigned char *)dd->port->log_buf;
855 if (buf[259] & 0x1) {
856 dev_info(&dd->pdev->dev,
857 "Write protect bit is set.\n");
858 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
859 fail_all_ncq_write = 1;
860 fail_reason = "write protect";
861 }
862 if (buf[288] == 0xF7) {
863 dev_info(&dd->pdev->dev,
864 "Exceeded Tmax, drive in thermal shutdown.\n");
865 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
866 fail_all_ncq_cmds = 1;
867 fail_reason = "thermal shutdown";
868 }
869 if (buf[288] == 0xBF) {
870 dev_info(&dd->pdev->dev,
871 "Drive indicates rebuild has failed.\n");
872 fail_all_ncq_cmds = 1;
873 fail_reason = "rebuild failed";
874 }
875 }
876
877 /* clear the tag accumulator */
878 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
879
880 /* Loop through all the groups */
881 for (group = 0; group < dd->slot_groups; group++) {
882 for (bit = 0; bit < 32; bit++) {
883 reissue = 1;
884 tag = (group << 5) + bit;
885 cmd = &port->commands[tag];
886
887 /* If the active bit is set re-issue the command */
888 if (atomic_read(&cmd->active) == 0)
889 continue;
890
891 fis = (struct host_to_dev_fis *)cmd->command;
892
893 /* Should re-issue? */
894 if (tag == MTIP_TAG_INTERNAL ||
895 fis->command == ATA_CMD_SET_FEATURES)
896 reissue = 0;
897 else {
898 if (fail_all_ncq_cmds ||
899 (fail_all_ncq_write &&
900 fis->command == ATA_CMD_FPDMA_WRITE)) {
901 dev_warn(&dd->pdev->dev,
902 " Fail: %s w/tag %d [%s].\n",
903 fis->command == ATA_CMD_FPDMA_WRITE ?
904 "write" : "read",
905 tag,
906 fail_reason != NULL ?
907 fail_reason : "unknown");
908 atomic_set(&cmd->active, 0);
909 if (cmd->comp_func) {
910 cmd->comp_func(port, tag,
911 cmd->comp_data,
912 -ENODATA);
913 }
914 continue;
915 }
916 }
917
918 /*
919 * First check if this command has
920 * exceeded its retries.
921 */
922 if (reissue && (cmd->retries-- > 0)) {
923
924 set_bit(tag, tagaccum);
925
926 /* Re-issue the command. */
927 mtip_issue_ncq_command(port, tag);
928
929 continue;
930 }
931
932 /* Retire a command that will not be reissued */
933 dev_warn(&port->dd->pdev->dev,
934 "retiring tag %d\n", tag);
935 atomic_set(&cmd->active, 0);
936
937 if (cmd->comp_func)
938 cmd->comp_func(
939 port,
940 tag,
941 cmd->comp_data,
942 PORT_IRQ_TF_ERR);
943 else
944 dev_warn(&port->dd->pdev->dev,
945 "Bad completion for tag %d\n",
946 tag);
947 }
948 }
949 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
950
951 handle_tfe_exit:
952 /* clear eh_active */
953 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
954 wake_up_interruptible(&port->svc_wait);
955
956 mod_timer(&port->cmd_timer,
957 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
958 }
959
960 /*
961 * Handle a set device bits interrupt
962 */
963 static inline void mtip_process_sdbf(struct driver_data *dd)
964 {
965 struct mtip_port *port = dd->port;
966 int group, tag, bit;
967 u32 completed;
968 struct mtip_cmd *command;
969
970 /* walk all bits in all slot groups */
971 for (group = 0; group < dd->slot_groups; group++) {
972 completed = readl(port->completed[group]);
973 if (!completed)
974 continue;
975
976 /* clear completed status register in the hardware.*/
977 writel(completed, port->completed[group]);
978
979 /* Process completed commands. */
980 for (bit = 0;
981 (bit < 32) && completed;
982 bit++, completed >>= 1) {
983 if (completed & 0x01) {
984 tag = (group << 5) | bit;
985
986 /* skip internal command slot. */
987 if (unlikely(tag == MTIP_TAG_INTERNAL))
988 continue;
989
990 command = &port->commands[tag];
991 /* make internal callback */
992 if (likely(command->comp_func)) {
993 command->comp_func(
994 port,
995 tag,
996 command->comp_data,
997 0);
998 } else {
999 dev_warn(&dd->pdev->dev,
1000 "Null completion "
1001 "for tag %d",
1002 tag);
1003
1004 if (mtip_check_surprise_removal(
1005 dd->pdev)) {
1006 mtip_command_cleanup(dd);
1007 return;
1008 }
1009 }
1010 }
1011 }
1012 }
1013 }
1014
1015 /*
1016 * Process legacy pio and d2h interrupts
1017 */
1018 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
1019 {
1020 struct mtip_port *port = dd->port;
1021 struct mtip_cmd *cmd = &port->commands[MTIP_TAG_INTERNAL];
1022
1023 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
1024 (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1025 & (1 << MTIP_TAG_INTERNAL))) {
1026 if (cmd->comp_func) {
1027 cmd->comp_func(port,
1028 MTIP_TAG_INTERNAL,
1029 cmd->comp_data,
1030 0);
1031 return;
1032 }
1033 }
1034
1035 return;
1036 }
1037
1038 /*
1039 * Demux and handle errors
1040 */
1041 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
1042 {
1043 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR)))
1044 mtip_handle_tfe(dd);
1045
1046 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
1047 dev_warn(&dd->pdev->dev,
1048 "Clearing PxSERR.DIAG.x\n");
1049 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
1050 }
1051
1052 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
1053 dev_warn(&dd->pdev->dev,
1054 "Clearing PxSERR.DIAG.n\n");
1055 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
1056 }
1057
1058 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
1059 dev_warn(&dd->pdev->dev,
1060 "Port stat errors %x unhandled\n",
1061 (port_stat & ~PORT_IRQ_HANDLED));
1062 }
1063 }
1064
1065 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
1066 {
1067 struct driver_data *dd = (struct driver_data *) data;
1068 struct mtip_port *port = dd->port;
1069 u32 hba_stat, port_stat;
1070 int rv = IRQ_NONE;
1071
1072 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1073 if (hba_stat) {
1074 rv = IRQ_HANDLED;
1075
1076 /* Acknowledge the interrupt status on the port.*/
1077 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1078 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1079
1080 /* Demux port status */
1081 if (likely(port_stat & PORT_IRQ_SDB_FIS))
1082 mtip_process_sdbf(dd);
1083
1084 if (unlikely(port_stat & PORT_IRQ_ERR)) {
1085 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
1086 mtip_command_cleanup(dd);
1087 /* don't proceed further */
1088 return IRQ_HANDLED;
1089 }
1090 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1091 &dd->dd_flag))
1092 return rv;
1093
1094 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
1095 }
1096
1097 if (unlikely(port_stat & PORT_IRQ_LEGACY))
1098 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
1099 }
1100
1101 /* acknowledge interrupt */
1102 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
1103
1104 return rv;
1105 }
1106
1107 /*
1108 * Wrapper for mtip_handle_irq
1109 * (ignores return code)
1110 */
1111 static void mtip_tasklet(unsigned long data)
1112 {
1113 mtip_handle_irq((struct driver_data *) data);
1114 }
1115
1116 /*
1117 * HBA interrupt subroutine.
1118 *
1119 * @irq IRQ number.
1120 * @instance Pointer to the driver data structure.
1121 *
1122 * return value
1123 * IRQ_HANDLED A HBA interrupt was pending and handled.
1124 * IRQ_NONE This interrupt was not for the HBA.
1125 */
1126 static irqreturn_t mtip_irq_handler(int irq, void *instance)
1127 {
1128 struct driver_data *dd = instance;
1129 tasklet_schedule(&dd->tasklet);
1130 return IRQ_HANDLED;
1131 }
1132
1133 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
1134 {
1135 atomic_set(&port->commands[tag].active, 1);
1136 writel(1 << MTIP_TAG_BIT(tag),
1137 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
1138 }
1139
1140 static bool mtip_pause_ncq(struct mtip_port *port,
1141 struct host_to_dev_fis *fis)
1142 {
1143 struct host_to_dev_fis *reply;
1144 unsigned long task_file_data;
1145
1146 reply = port->rxfis + RX_FIS_D2H_REG;
1147 task_file_data = readl(port->mmio+PORT_TFDATA);
1148
1149 if ((task_file_data & 1) || (fis->command == ATA_CMD_SEC_ERASE_UNIT))
1150 return false;
1151
1152 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
1153 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1154 port->ic_pause_timer = jiffies;
1155 return true;
1156 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
1157 (fis->features == 0x03)) {
1158 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1159 port->ic_pause_timer = jiffies;
1160 return true;
1161 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
1162 ((fis->command == 0xFC) &&
1163 (fis->features == 0x27 || fis->features == 0x72 ||
1164 fis->features == 0x62 || fis->features == 0x26))) {
1165 /* Com reset after secure erase or lowlevel format */
1166 mtip_restart_port(port);
1167 return false;
1168 }
1169
1170 return false;
1171 }
1172
1173 /*
1174 * Wait for port to quiesce
1175 *
1176 * @port Pointer to port data structure
1177 * @timeout Max duration to wait (ms)
1178 *
1179 * return value
1180 * 0 Success
1181 * -EBUSY Commands still active
1182 */
1183 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
1184 {
1185 unsigned long to;
1186 unsigned int n;
1187 unsigned int active = 1;
1188
1189 to = jiffies + msecs_to_jiffies(timeout);
1190 do {
1191 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
1192 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
1193 msleep(20);
1194 continue; /* svc thd is actively issuing commands */
1195 }
1196 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1197 return -EFAULT;
1198 /*
1199 * Ignore s_active bit 0 of array element 0.
1200 * This bit will always be set
1201 */
1202 active = readl(port->s_active[0]) & 0xFFFFFFFE;
1203 for (n = 1; n < port->dd->slot_groups; n++)
1204 active |= readl(port->s_active[n]);
1205
1206 if (!active)
1207 break;
1208
1209 msleep(20);
1210 } while (time_before(jiffies, to));
1211
1212 return active ? -EBUSY : 0;
1213 }
1214
1215 /*
1216 * Execute an internal command and wait for the completion.
1217 *
1218 * @port Pointer to the port data structure.
1219 * @fis Pointer to the FIS that describes the command.
1220 * @fis_len Length in WORDS of the FIS.
1221 * @buffer DMA accessible for command data.
1222 * @buf_len Length, in bytes, of the data buffer.
1223 * @opts Command header options, excluding the FIS length
1224 * and the number of PRD entries.
1225 * @timeout Time in ms to wait for the command to complete.
1226 *
1227 * return value
1228 * 0 Command completed successfully.
1229 * -EFAULT The buffer address is not correctly aligned.
1230 * -EBUSY Internal command or other IO in progress.
1231 * -EAGAIN Time out waiting for command to complete.
1232 */
1233 static int mtip_exec_internal_command(struct mtip_port *port,
1234 struct host_to_dev_fis *fis,
1235 int fis_len,
1236 dma_addr_t buffer,
1237 int buf_len,
1238 u32 opts,
1239 gfp_t atomic,
1240 unsigned long timeout)
1241 {
1242 struct mtip_cmd_sg *command_sg;
1243 DECLARE_COMPLETION_ONSTACK(wait);
1244 int rv = 0, ready2go = 1;
1245 struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL];
1246 unsigned long to;
1247
1248 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1249 if (buffer & 0x00000007) {
1250 dev_err(&port->dd->pdev->dev,
1251 "SG buffer is not 8 byte aligned\n");
1252 return -EFAULT;
1253 }
1254
1255 to = jiffies + msecs_to_jiffies(timeout);
1256 do {
1257 ready2go = !test_and_set_bit(MTIP_TAG_INTERNAL,
1258 port->allocated);
1259 if (ready2go)
1260 break;
1261 mdelay(100);
1262 } while (time_before(jiffies, to));
1263 if (!ready2go) {
1264 dev_warn(&port->dd->pdev->dev,
1265 "Internal cmd active. new cmd [%02X]\n", fis->command);
1266 return -EBUSY;
1267 }
1268 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1269 port->ic_pause_timer = 0;
1270
1271 if (fis->command == ATA_CMD_SEC_ERASE_UNIT)
1272 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1273 else if (fis->command == ATA_CMD_DOWNLOAD_MICRO)
1274 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1275
1276 if (atomic == GFP_KERNEL) {
1277 if (fis->command != ATA_CMD_STANDBYNOW1) {
1278 /* wait for io to complete if non atomic */
1279 if (mtip_quiesce_io(port, 5000) < 0) {
1280 dev_warn(&port->dd->pdev->dev,
1281 "Failed to quiesce IO\n");
1282 release_slot(port, MTIP_TAG_INTERNAL);
1283 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1284 wake_up_interruptible(&port->svc_wait);
1285 return -EBUSY;
1286 }
1287 }
1288
1289 /* Set the completion function and data for the command. */
1290 int_cmd->comp_data = &wait;
1291 int_cmd->comp_func = mtip_completion;
1292
1293 } else {
1294 /* Clear completion - we're going to poll */
1295 int_cmd->comp_data = NULL;
1296 int_cmd->comp_func = mtip_null_completion;
1297 }
1298
1299 /* Copy the command to the command table */
1300 memcpy(int_cmd->command, fis, fis_len*4);
1301
1302 /* Populate the SG list */
1303 int_cmd->command_header->opts =
1304 __force_bit2int cpu_to_le32(opts | fis_len);
1305 if (buf_len) {
1306 command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ;
1307
1308 command_sg->info =
1309 __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF);
1310 command_sg->dba =
1311 __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF);
1312 command_sg->dba_upper =
1313 __force_bit2int cpu_to_le32((buffer >> 16) >> 16);
1314
1315 int_cmd->command_header->opts |=
1316 __force_bit2int cpu_to_le32((1 << 16));
1317 }
1318
1319 /* Populate the command header */
1320 int_cmd->command_header->byte_count = 0;
1321
1322 /* Issue the command to the hardware */
1323 mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1324
1325 /* Poll if atomic, wait_for_completion otherwise */
1326 if (atomic == GFP_KERNEL) {
1327 /* Wait for the command to complete or timeout. */
1328 if (wait_for_completion_timeout(
1329 &wait,
1330 msecs_to_jiffies(timeout)) == 0) {
1331 dev_err(&port->dd->pdev->dev,
1332 "Internal command did not complete [%d] "
1333 "within timeout of %lu ms\n",
1334 atomic, timeout);
1335 if (mtip_check_surprise_removal(port->dd->pdev) ||
1336 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1337 &port->dd->dd_flag)) {
1338 rv = -ENXIO;
1339 goto exec_ic_exit;
1340 }
1341 rv = -EAGAIN;
1342 }
1343 } else {
1344 /* Spin for <timeout> checking if command still outstanding */
1345 timeout = jiffies + msecs_to_jiffies(timeout);
1346 while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1347 & (1 << MTIP_TAG_INTERNAL))
1348 && time_before(jiffies, timeout)) {
1349 if (mtip_check_surprise_removal(port->dd->pdev)) {
1350 rv = -ENXIO;
1351 goto exec_ic_exit;
1352 }
1353 if ((fis->command != ATA_CMD_STANDBYNOW1) &&
1354 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1355 &port->dd->dd_flag)) {
1356 rv = -ENXIO;
1357 goto exec_ic_exit;
1358 }
1359 if (readl(port->mmio + PORT_IRQ_STAT) & PORT_IRQ_ERR) {
1360 atomic_inc(&int_cmd->active); /* error */
1361 break;
1362 }
1363 }
1364 }
1365
1366 if (atomic_read(&int_cmd->active) > 1) {
1367 dev_err(&port->dd->pdev->dev,
1368 "Internal command [%02X] failed\n", fis->command);
1369 rv = -EIO;
1370 }
1371 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1372 & (1 << MTIP_TAG_INTERNAL)) {
1373 rv = -ENXIO;
1374 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1375 &port->dd->dd_flag)) {
1376 mtip_restart_port(port);
1377 rv = -EAGAIN;
1378 }
1379 }
1380 exec_ic_exit:
1381 /* Clear the allocated and active bits for the internal command. */
1382 atomic_set(&int_cmd->active, 0);
1383 release_slot(port, MTIP_TAG_INTERNAL);
1384 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1385 /* NCQ paused */
1386 return rv;
1387 }
1388 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1389 wake_up_interruptible(&port->svc_wait);
1390
1391 return rv;
1392 }
1393
1394 /*
1395 * Byte-swap ATA ID strings.
1396 *
1397 * ATA identify data contains strings in byte-swapped 16-bit words.
1398 * They must be swapped (on all architectures) to be usable as C strings.
1399 * This function swaps bytes in-place.
1400 *
1401 * @buf The buffer location of the string
1402 * @len The number of bytes to swap
1403 *
1404 * return value
1405 * None
1406 */
1407 static inline void ata_swap_string(u16 *buf, unsigned int len)
1408 {
1409 int i;
1410 for (i = 0; i < (len/2); i++)
1411 be16_to_cpus(&buf[i]);
1412 }
1413
1414 /*
1415 * Request the device identity information.
1416 *
1417 * If a user space buffer is not specified, i.e. is NULL, the
1418 * identify information is still read from the drive and placed
1419 * into the identify data buffer (@e port->identify) in the
1420 * port data structure.
1421 * When the identify buffer contains valid identify information @e
1422 * port->identify_valid is non-zero.
1423 *
1424 * @port Pointer to the port structure.
1425 * @user_buffer A user space buffer where the identify data should be
1426 * copied.
1427 *
1428 * return value
1429 * 0 Command completed successfully.
1430 * -EFAULT An error occurred while coping data to the user buffer.
1431 * -1 Command failed.
1432 */
1433 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1434 {
1435 int rv = 0;
1436 struct host_to_dev_fis fis;
1437
1438 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1439 return -EFAULT;
1440
1441 /* Build the FIS. */
1442 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1443 fis.type = 0x27;
1444 fis.opts = 1 << 7;
1445 fis.command = ATA_CMD_ID_ATA;
1446
1447 /* Set the identify information as invalid. */
1448 port->identify_valid = 0;
1449
1450 /* Clear the identify information. */
1451 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1452
1453 /* Execute the command. */
1454 if (mtip_exec_internal_command(port,
1455 &fis,
1456 5,
1457 port->identify_dma,
1458 sizeof(u16) * ATA_ID_WORDS,
1459 0,
1460 GFP_KERNEL,
1461 MTIP_INTERNAL_COMMAND_TIMEOUT_MS)
1462 < 0) {
1463 rv = -1;
1464 goto out;
1465 }
1466
1467 /*
1468 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1469 * perform field-sensitive swapping on the string fields.
1470 * See the kernel use of ata_id_string() for proof of this.
1471 */
1472 #ifdef __LITTLE_ENDIAN
1473 ata_swap_string(port->identify + 27, 40); /* model string*/
1474 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1475 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1476 #else
1477 {
1478 int i;
1479 for (i = 0; i < ATA_ID_WORDS; i++)
1480 port->identify[i] = le16_to_cpu(port->identify[i]);
1481 }
1482 #endif
1483
1484 /* Set the identify buffer as valid. */
1485 port->identify_valid = 1;
1486
1487 if (user_buffer) {
1488 if (copy_to_user(
1489 user_buffer,
1490 port->identify,
1491 ATA_ID_WORDS * sizeof(u16))) {
1492 rv = -EFAULT;
1493 goto out;
1494 }
1495 }
1496
1497 out:
1498 return rv;
1499 }
1500
1501 /*
1502 * Issue a standby immediate command to the device.
1503 *
1504 * @port Pointer to the port structure.
1505 *
1506 * return value
1507 * 0 Command was executed successfully.
1508 * -1 An error occurred while executing the command.
1509 */
1510 static int mtip_standby_immediate(struct mtip_port *port)
1511 {
1512 int rv;
1513 struct host_to_dev_fis fis;
1514 unsigned long start;
1515
1516 /* Build the FIS. */
1517 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1518 fis.type = 0x27;
1519 fis.opts = 1 << 7;
1520 fis.command = ATA_CMD_STANDBYNOW1;
1521
1522 start = jiffies;
1523 rv = mtip_exec_internal_command(port,
1524 &fis,
1525 5,
1526 0,
1527 0,
1528 0,
1529 GFP_ATOMIC,
1530 15000);
1531 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1532 jiffies_to_msecs(jiffies - start));
1533 if (rv)
1534 dev_warn(&port->dd->pdev->dev,
1535 "STANDBY IMMEDIATE command failed.\n");
1536
1537 return rv;
1538 }
1539
1540 /*
1541 * Issue a READ LOG EXT command to the device.
1542 *
1543 * @port pointer to the port structure.
1544 * @page page number to fetch
1545 * @buffer pointer to buffer
1546 * @buffer_dma dma address corresponding to @buffer
1547 * @sectors page length to fetch, in sectors
1548 *
1549 * return value
1550 * @rv return value from mtip_exec_internal_command()
1551 */
1552 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1553 dma_addr_t buffer_dma, unsigned int sectors)
1554 {
1555 struct host_to_dev_fis fis;
1556
1557 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1558 fis.type = 0x27;
1559 fis.opts = 1 << 7;
1560 fis.command = ATA_CMD_READ_LOG_EXT;
1561 fis.sect_count = sectors & 0xFF;
1562 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1563 fis.lba_low = page;
1564 fis.lba_mid = 0;
1565 fis.device = ATA_DEVICE_OBS;
1566
1567 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1568
1569 return mtip_exec_internal_command(port,
1570 &fis,
1571 5,
1572 buffer_dma,
1573 sectors * ATA_SECT_SIZE,
1574 0,
1575 GFP_ATOMIC,
1576 MTIP_INTERNAL_COMMAND_TIMEOUT_MS);
1577 }
1578
1579 /*
1580 * Issue a SMART READ DATA command to the device.
1581 *
1582 * @port pointer to the port structure.
1583 * @buffer pointer to buffer
1584 * @buffer_dma dma address corresponding to @buffer
1585 *
1586 * return value
1587 * @rv return value from mtip_exec_internal_command()
1588 */
1589 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1590 dma_addr_t buffer_dma)
1591 {
1592 struct host_to_dev_fis fis;
1593
1594 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1595 fis.type = 0x27;
1596 fis.opts = 1 << 7;
1597 fis.command = ATA_CMD_SMART;
1598 fis.features = 0xD0;
1599 fis.sect_count = 1;
1600 fis.lba_mid = 0x4F;
1601 fis.lba_hi = 0xC2;
1602 fis.device = ATA_DEVICE_OBS;
1603
1604 return mtip_exec_internal_command(port,
1605 &fis,
1606 5,
1607 buffer_dma,
1608 ATA_SECT_SIZE,
1609 0,
1610 GFP_ATOMIC,
1611 15000);
1612 }
1613
1614 /*
1615 * Get the value of a smart attribute
1616 *
1617 * @port pointer to the port structure
1618 * @id attribute number
1619 * @attrib pointer to return attrib information corresponding to @id
1620 *
1621 * return value
1622 * -EINVAL NULL buffer passed or unsupported attribute @id.
1623 * -EPERM Identify data not valid, SMART not supported or not enabled
1624 */
1625 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1626 struct smart_attr *attrib)
1627 {
1628 int rv, i;
1629 struct smart_attr *pattr;
1630
1631 if (!attrib)
1632 return -EINVAL;
1633
1634 if (!port->identify_valid) {
1635 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1636 return -EPERM;
1637 }
1638 if (!(port->identify[82] & 0x1)) {
1639 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1640 return -EPERM;
1641 }
1642 if (!(port->identify[85] & 0x1)) {
1643 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1644 return -EPERM;
1645 }
1646
1647 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1648 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1649 if (rv) {
1650 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1651 return rv;
1652 }
1653
1654 pattr = (struct smart_attr *)(port->smart_buf + 2);
1655 for (i = 0; i < 29; i++, pattr++)
1656 if (pattr->attr_id == id) {
1657 memcpy(attrib, pattr, sizeof(struct smart_attr));
1658 break;
1659 }
1660
1661 if (i == 29) {
1662 dev_warn(&port->dd->pdev->dev,
1663 "Query for invalid SMART attribute ID\n");
1664 rv = -EINVAL;
1665 }
1666
1667 return rv;
1668 }
1669
1670 /*
1671 * Get the drive capacity.
1672 *
1673 * @dd Pointer to the device data structure.
1674 * @sectors Pointer to the variable that will receive the sector count.
1675 *
1676 * return value
1677 * 1 Capacity was returned successfully.
1678 * 0 The identify information is invalid.
1679 */
1680 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1681 {
1682 struct mtip_port *port = dd->port;
1683 u64 total, raw0, raw1, raw2, raw3;
1684 raw0 = port->identify[100];
1685 raw1 = port->identify[101];
1686 raw2 = port->identify[102];
1687 raw3 = port->identify[103];
1688 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1689 *sectors = total;
1690 return (bool) !!port->identify_valid;
1691 }
1692
1693 /*
1694 * Reset the HBA.
1695 *
1696 * Resets the HBA by setting the HBA Reset bit in the Global
1697 * HBA Control register. After setting the HBA Reset bit the
1698 * function waits for 1 second before reading the HBA Reset
1699 * bit to make sure it has cleared. If HBA Reset is not clear
1700 * an error is returned. Cannot be used in non-blockable
1701 * context.
1702 *
1703 * @dd Pointer to the driver data structure.
1704 *
1705 * return value
1706 * 0 The reset was successful.
1707 * -1 The HBA Reset bit did not clear.
1708 */
1709 static int mtip_hba_reset(struct driver_data *dd)
1710 {
1711 mtip_deinit_port(dd->port);
1712
1713 /* Set the reset bit */
1714 writel(HOST_RESET, dd->mmio + HOST_CTL);
1715
1716 /* Flush */
1717 readl(dd->mmio + HOST_CTL);
1718
1719 /* Wait for reset to clear */
1720 ssleep(1);
1721
1722 /* Check the bit has cleared */
1723 if (readl(dd->mmio + HOST_CTL) & HOST_RESET) {
1724 dev_err(&dd->pdev->dev,
1725 "Reset bit did not clear.\n");
1726 return -1;
1727 }
1728
1729 return 0;
1730 }
1731
1732 /*
1733 * Display the identify command data.
1734 *
1735 * @port Pointer to the port data structure.
1736 *
1737 * return value
1738 * None
1739 */
1740 static void mtip_dump_identify(struct mtip_port *port)
1741 {
1742 sector_t sectors;
1743 unsigned short revid;
1744 char cbuf[42];
1745
1746 if (!port->identify_valid)
1747 return;
1748
1749 strlcpy(cbuf, (char *)(port->identify+10), 21);
1750 dev_info(&port->dd->pdev->dev,
1751 "Serial No.: %s\n", cbuf);
1752
1753 strlcpy(cbuf, (char *)(port->identify+23), 9);
1754 dev_info(&port->dd->pdev->dev,
1755 "Firmware Ver.: %s\n", cbuf);
1756
1757 strlcpy(cbuf, (char *)(port->identify+27), 41);
1758 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1759
1760 if (mtip_hw_get_capacity(port->dd, &sectors))
1761 dev_info(&port->dd->pdev->dev,
1762 "Capacity: %llu sectors (%llu MB)\n",
1763 (u64)sectors,
1764 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1765
1766 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1767 switch (revid & 0xFF) {
1768 case 0x1:
1769 strlcpy(cbuf, "A0", 3);
1770 break;
1771 case 0x3:
1772 strlcpy(cbuf, "A2", 3);
1773 break;
1774 default:
1775 strlcpy(cbuf, "?", 2);
1776 break;
1777 }
1778 dev_info(&port->dd->pdev->dev,
1779 "Card Type: %s\n", cbuf);
1780 }
1781
1782 /*
1783 * Map the commands scatter list into the command table.
1784 *
1785 * @command Pointer to the command.
1786 * @nents Number of scatter list entries.
1787 *
1788 * return value
1789 * None
1790 */
1791 static inline void fill_command_sg(struct driver_data *dd,
1792 struct mtip_cmd *command,
1793 int nents)
1794 {
1795 int n;
1796 unsigned int dma_len;
1797 struct mtip_cmd_sg *command_sg;
1798 struct scatterlist *sg = command->sg;
1799
1800 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1801
1802 for (n = 0; n < nents; n++) {
1803 dma_len = sg_dma_len(sg);
1804 if (dma_len > 0x400000)
1805 dev_err(&dd->pdev->dev,
1806 "DMA segment length truncated\n");
1807 command_sg->info = __force_bit2int
1808 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1809 command_sg->dba = __force_bit2int
1810 cpu_to_le32(sg_dma_address(sg));
1811 command_sg->dba_upper = __force_bit2int
1812 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1813 command_sg++;
1814 sg++;
1815 }
1816 }
1817
1818 /*
1819 * @brief Execute a drive command.
1820 *
1821 * return value 0 The command completed successfully.
1822 * return value -1 An error occurred while executing the command.
1823 */
1824 static int exec_drive_task(struct mtip_port *port, u8 *command)
1825 {
1826 struct host_to_dev_fis fis;
1827 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1828
1829 /* Build the FIS. */
1830 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1831 fis.type = 0x27;
1832 fis.opts = 1 << 7;
1833 fis.command = command[0];
1834 fis.features = command[1];
1835 fis.sect_count = command[2];
1836 fis.sector = command[3];
1837 fis.cyl_low = command[4];
1838 fis.cyl_hi = command[5];
1839 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1840
1841 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1842 __func__,
1843 command[0],
1844 command[1],
1845 command[2],
1846 command[3],
1847 command[4],
1848 command[5],
1849 command[6]);
1850
1851 /* Execute the command. */
1852 if (mtip_exec_internal_command(port,
1853 &fis,
1854 5,
1855 0,
1856 0,
1857 0,
1858 GFP_KERNEL,
1859 MTIP_IOCTL_COMMAND_TIMEOUT_MS) < 0) {
1860 return -1;
1861 }
1862
1863 command[0] = reply->command; /* Status*/
1864 command[1] = reply->features; /* Error*/
1865 command[4] = reply->cyl_low;
1866 command[5] = reply->cyl_hi;
1867
1868 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1869 __func__,
1870 command[0],
1871 command[1],
1872 command[4],
1873 command[5]);
1874
1875 return 0;
1876 }
1877
1878 /*
1879 * @brief Execute a drive command.
1880 *
1881 * @param port Pointer to the port data structure.
1882 * @param command Pointer to the user specified command parameters.
1883 * @param user_buffer Pointer to the user space buffer where read sector
1884 * data should be copied.
1885 *
1886 * return value 0 The command completed successfully.
1887 * return value -EFAULT An error occurred while copying the completion
1888 * data to the user space buffer.
1889 * return value -1 An error occurred while executing the command.
1890 */
1891 static int exec_drive_command(struct mtip_port *port, u8 *command,
1892 void __user *user_buffer)
1893 {
1894 struct host_to_dev_fis fis;
1895 struct host_to_dev_fis *reply;
1896 u8 *buf = NULL;
1897 dma_addr_t dma_addr = 0;
1898 int rv = 0, xfer_sz = command[3];
1899
1900 if (xfer_sz) {
1901 if (user_buffer)
1902 return -EFAULT;
1903
1904 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
1905 ATA_SECT_SIZE * xfer_sz,
1906 &dma_addr,
1907 GFP_KERNEL);
1908 if (!buf) {
1909 dev_err(&port->dd->pdev->dev,
1910 "Memory allocation failed (%d bytes)\n",
1911 ATA_SECT_SIZE * xfer_sz);
1912 return -ENOMEM;
1913 }
1914 memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
1915 }
1916
1917 /* Build the FIS. */
1918 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1919 fis.type = 0x27;
1920 fis.opts = 1 << 7;
1921 fis.command = command[0];
1922 fis.features = command[2];
1923 fis.sect_count = command[3];
1924 if (fis.command == ATA_CMD_SMART) {
1925 fis.sector = command[1];
1926 fis.cyl_low = 0x4F;
1927 fis.cyl_hi = 0xC2;
1928 }
1929
1930 if (xfer_sz)
1931 reply = (port->rxfis + RX_FIS_PIO_SETUP);
1932 else
1933 reply = (port->rxfis + RX_FIS_D2H_REG);
1934
1935 dbg_printk(MTIP_DRV_NAME
1936 " %s: User Command: cmd %x, sect %x, "
1937 "feat %x, sectcnt %x\n",
1938 __func__,
1939 command[0],
1940 command[1],
1941 command[2],
1942 command[3]);
1943
1944 /* Execute the command. */
1945 if (mtip_exec_internal_command(port,
1946 &fis,
1947 5,
1948 (xfer_sz ? dma_addr : 0),
1949 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
1950 0,
1951 GFP_KERNEL,
1952 MTIP_IOCTL_COMMAND_TIMEOUT_MS)
1953 < 0) {
1954 rv = -EFAULT;
1955 goto exit_drive_command;
1956 }
1957
1958 /* Collect the completion status. */
1959 command[0] = reply->command; /* Status*/
1960 command[1] = reply->features; /* Error*/
1961 command[2] = reply->sect_count;
1962
1963 dbg_printk(MTIP_DRV_NAME
1964 " %s: Completion Status: stat %x, "
1965 "err %x, nsect %x\n",
1966 __func__,
1967 command[0],
1968 command[1],
1969 command[2]);
1970
1971 if (xfer_sz) {
1972 if (copy_to_user(user_buffer,
1973 buf,
1974 ATA_SECT_SIZE * command[3])) {
1975 rv = -EFAULT;
1976 goto exit_drive_command;
1977 }
1978 }
1979 exit_drive_command:
1980 if (buf)
1981 dmam_free_coherent(&port->dd->pdev->dev,
1982 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1983 return rv;
1984 }
1985
1986 /*
1987 * Indicates whether a command has a single sector payload.
1988 *
1989 * @command passed to the device to perform the certain event.
1990 * @features passed to the device to perform the certain event.
1991 *
1992 * return value
1993 * 1 command is one that always has a single sector payload,
1994 * regardless of the value in the Sector Count field.
1995 * 0 otherwise
1996 *
1997 */
1998 static unsigned int implicit_sector(unsigned char command,
1999 unsigned char features)
2000 {
2001 unsigned int rv = 0;
2002
2003 /* list of commands that have an implicit sector count of 1 */
2004 switch (command) {
2005 case ATA_CMD_SEC_SET_PASS:
2006 case ATA_CMD_SEC_UNLOCK:
2007 case ATA_CMD_SEC_ERASE_PREP:
2008 case ATA_CMD_SEC_ERASE_UNIT:
2009 case ATA_CMD_SEC_FREEZE_LOCK:
2010 case ATA_CMD_SEC_DISABLE_PASS:
2011 case ATA_CMD_PMP_READ:
2012 case ATA_CMD_PMP_WRITE:
2013 rv = 1;
2014 break;
2015 case ATA_CMD_SET_MAX:
2016 if (features == ATA_SET_MAX_UNLOCK)
2017 rv = 1;
2018 break;
2019 case ATA_CMD_SMART:
2020 if ((features == ATA_SMART_READ_VALUES) ||
2021 (features == ATA_SMART_READ_THRESHOLDS))
2022 rv = 1;
2023 break;
2024 case ATA_CMD_CONF_OVERLAY:
2025 if ((features == ATA_DCO_IDENTIFY) ||
2026 (features == ATA_DCO_SET))
2027 rv = 1;
2028 break;
2029 }
2030 return rv;
2031 }
2032
2033 static void mtip_set_timeout(struct host_to_dev_fis *fis, unsigned int *timeout)
2034 {
2035 switch (fis->command) {
2036 case ATA_CMD_DOWNLOAD_MICRO:
2037 *timeout = 120000; /* 2 minutes */
2038 break;
2039 case ATA_CMD_SEC_ERASE_UNIT:
2040 case 0xFC:
2041 *timeout = 240000; /* 4 minutes */
2042 break;
2043 case ATA_CMD_STANDBYNOW1:
2044 *timeout = 10000; /* 10 seconds */
2045 break;
2046 case 0xF7:
2047 case 0xFA:
2048 *timeout = 60000; /* 60 seconds */
2049 break;
2050 case ATA_CMD_SMART:
2051 *timeout = 15000; /* 15 seconds */
2052 break;
2053 default:
2054 *timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS;
2055 break;
2056 }
2057 }
2058
2059 /*
2060 * Executes a taskfile
2061 * See ide_taskfile_ioctl() for derivation
2062 */
2063 static int exec_drive_taskfile(struct driver_data *dd,
2064 void __user *buf,
2065 ide_task_request_t *req_task,
2066 int outtotal)
2067 {
2068 struct host_to_dev_fis fis;
2069 struct host_to_dev_fis *reply;
2070 u8 *outbuf = NULL;
2071 u8 *inbuf = NULL;
2072 dma_addr_t outbuf_dma = 0;
2073 dma_addr_t inbuf_dma = 0;
2074 dma_addr_t dma_buffer = 0;
2075 int err = 0;
2076 unsigned int taskin = 0;
2077 unsigned int taskout = 0;
2078 u8 nsect = 0;
2079 unsigned int timeout;
2080 unsigned int force_single_sector;
2081 unsigned int transfer_size;
2082 unsigned long task_file_data;
2083 int intotal = outtotal + req_task->out_size;
2084
2085 taskout = req_task->out_size;
2086 taskin = req_task->in_size;
2087 /* 130560 = 512 * 0xFF*/
2088 if (taskin > 130560 || taskout > 130560) {
2089 err = -EINVAL;
2090 goto abort;
2091 }
2092
2093 if (taskout) {
2094 outbuf = kzalloc(taskout, GFP_KERNEL);
2095 if (outbuf == NULL) {
2096 err = -ENOMEM;
2097 goto abort;
2098 }
2099 if (copy_from_user(outbuf, buf + outtotal, taskout)) {
2100 err = -EFAULT;
2101 goto abort;
2102 }
2103 outbuf_dma = pci_map_single(dd->pdev,
2104 outbuf,
2105 taskout,
2106 DMA_TO_DEVICE);
2107 if (outbuf_dma == 0) {
2108 err = -ENOMEM;
2109 goto abort;
2110 }
2111 dma_buffer = outbuf_dma;
2112 }
2113
2114 if (taskin) {
2115 inbuf = kzalloc(taskin, GFP_KERNEL);
2116 if (inbuf == NULL) {
2117 err = -ENOMEM;
2118 goto abort;
2119 }
2120
2121 if (copy_from_user(inbuf, buf + intotal, taskin)) {
2122 err = -EFAULT;
2123 goto abort;
2124 }
2125 inbuf_dma = pci_map_single(dd->pdev,
2126 inbuf,
2127 taskin, DMA_FROM_DEVICE);
2128 if (inbuf_dma == 0) {
2129 err = -ENOMEM;
2130 goto abort;
2131 }
2132 dma_buffer = inbuf_dma;
2133 }
2134
2135 /* only supports PIO and non-data commands from this ioctl. */
2136 switch (req_task->data_phase) {
2137 case TASKFILE_OUT:
2138 nsect = taskout / ATA_SECT_SIZE;
2139 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2140 break;
2141 case TASKFILE_IN:
2142 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2143 break;
2144 case TASKFILE_NO_DATA:
2145 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2146 break;
2147 default:
2148 err = -EINVAL;
2149 goto abort;
2150 }
2151
2152 /* Build the FIS. */
2153 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2154
2155 fis.type = 0x27;
2156 fis.opts = 1 << 7;
2157 fis.command = req_task->io_ports[7];
2158 fis.features = req_task->io_ports[1];
2159 fis.sect_count = req_task->io_ports[2];
2160 fis.lba_low = req_task->io_ports[3];
2161 fis.lba_mid = req_task->io_ports[4];
2162 fis.lba_hi = req_task->io_ports[5];
2163 /* Clear the dev bit*/
2164 fis.device = req_task->io_ports[6] & ~0x10;
2165
2166 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
2167 req_task->in_flags.all =
2168 IDE_TASKFILE_STD_IN_FLAGS |
2169 (IDE_HOB_STD_IN_FLAGS << 8);
2170 fis.lba_low_ex = req_task->hob_ports[3];
2171 fis.lba_mid_ex = req_task->hob_ports[4];
2172 fis.lba_hi_ex = req_task->hob_ports[5];
2173 fis.features_ex = req_task->hob_ports[1];
2174 fis.sect_cnt_ex = req_task->hob_ports[2];
2175
2176 } else {
2177 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
2178 }
2179
2180 force_single_sector = implicit_sector(fis.command, fis.features);
2181
2182 if ((taskin || taskout) && (!fis.sect_count)) {
2183 if (nsect)
2184 fis.sect_count = nsect;
2185 else {
2186 if (!force_single_sector) {
2187 dev_warn(&dd->pdev->dev,
2188 "data movement but "
2189 "sect_count is 0\n");
2190 err = -EINVAL;
2191 goto abort;
2192 }
2193 }
2194 }
2195
2196 dbg_printk(MTIP_DRV_NAME
2197 " %s: cmd %x, feat %x, nsect %x,"
2198 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
2199 " head/dev %x\n",
2200 __func__,
2201 fis.command,
2202 fis.features,
2203 fis.sect_count,
2204 fis.lba_low,
2205 fis.lba_mid,
2206 fis.lba_hi,
2207 fis.device);
2208
2209 mtip_set_timeout(&fis, &timeout);
2210
2211 /* Determine the correct transfer size.*/
2212 if (force_single_sector)
2213 transfer_size = ATA_SECT_SIZE;
2214 else
2215 transfer_size = ATA_SECT_SIZE * fis.sect_count;
2216
2217 /* Execute the command.*/
2218 if (mtip_exec_internal_command(dd->port,
2219 &fis,
2220 5,
2221 dma_buffer,
2222 transfer_size,
2223 0,
2224 GFP_KERNEL,
2225 timeout) < 0) {
2226 err = -EIO;
2227 goto abort;
2228 }
2229
2230 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2231
2232 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2233 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2234 req_task->io_ports[7] = reply->control;
2235 } else {
2236 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2237 req_task->io_ports[7] = reply->command;
2238 }
2239
2240 /* reclaim the DMA buffers.*/
2241 if (inbuf_dma)
2242 pci_unmap_single(dd->pdev, inbuf_dma,
2243 taskin, DMA_FROM_DEVICE);
2244 if (outbuf_dma)
2245 pci_unmap_single(dd->pdev, outbuf_dma,
2246 taskout, DMA_TO_DEVICE);
2247 inbuf_dma = 0;
2248 outbuf_dma = 0;
2249
2250 /* return the ATA registers to the caller.*/
2251 req_task->io_ports[1] = reply->features;
2252 req_task->io_ports[2] = reply->sect_count;
2253 req_task->io_ports[3] = reply->lba_low;
2254 req_task->io_ports[4] = reply->lba_mid;
2255 req_task->io_ports[5] = reply->lba_hi;
2256 req_task->io_ports[6] = reply->device;
2257
2258 if (req_task->out_flags.all & 1) {
2259
2260 req_task->hob_ports[3] = reply->lba_low_ex;
2261 req_task->hob_ports[4] = reply->lba_mid_ex;
2262 req_task->hob_ports[5] = reply->lba_hi_ex;
2263 req_task->hob_ports[1] = reply->features_ex;
2264 req_task->hob_ports[2] = reply->sect_cnt_ex;
2265 }
2266 dbg_printk(MTIP_DRV_NAME
2267 " %s: Completion: stat %x,"
2268 "err %x, sect_cnt %x, lbalo %x,"
2269 "lbamid %x, lbahi %x, dev %x\n",
2270 __func__,
2271 req_task->io_ports[7],
2272 req_task->io_ports[1],
2273 req_task->io_ports[2],
2274 req_task->io_ports[3],
2275 req_task->io_ports[4],
2276 req_task->io_ports[5],
2277 req_task->io_ports[6]);
2278
2279 if (taskout) {
2280 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2281 err = -EFAULT;
2282 goto abort;
2283 }
2284 }
2285 if (taskin) {
2286 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2287 err = -EFAULT;
2288 goto abort;
2289 }
2290 }
2291 abort:
2292 if (inbuf_dma)
2293 pci_unmap_single(dd->pdev, inbuf_dma,
2294 taskin, DMA_FROM_DEVICE);
2295 if (outbuf_dma)
2296 pci_unmap_single(dd->pdev, outbuf_dma,
2297 taskout, DMA_TO_DEVICE);
2298 kfree(outbuf);
2299 kfree(inbuf);
2300
2301 return err;
2302 }
2303
2304 /*
2305 * Handle IOCTL calls from the Block Layer.
2306 *
2307 * This function is called by the Block Layer when it receives an IOCTL
2308 * command that it does not understand. If the IOCTL command is not supported
2309 * this function returns -ENOTTY.
2310 *
2311 * @dd Pointer to the driver data structure.
2312 * @cmd IOCTL command passed from the Block Layer.
2313 * @arg IOCTL argument passed from the Block Layer.
2314 *
2315 * return value
2316 * 0 The IOCTL completed successfully.
2317 * -ENOTTY The specified command is not supported.
2318 * -EFAULT An error occurred copying data to a user space buffer.
2319 * -EIO An error occurred while executing the command.
2320 */
2321 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2322 unsigned long arg)
2323 {
2324 switch (cmd) {
2325 case HDIO_GET_IDENTITY:
2326 {
2327 if (copy_to_user((void __user *)arg, dd->port->identify,
2328 sizeof(u16) * ATA_ID_WORDS))
2329 return -EFAULT;
2330 break;
2331 }
2332 case HDIO_DRIVE_CMD:
2333 {
2334 u8 drive_command[4];
2335
2336 /* Copy the user command info to our buffer. */
2337 if (copy_from_user(drive_command,
2338 (void __user *) arg,
2339 sizeof(drive_command)))
2340 return -EFAULT;
2341
2342 /* Execute the drive command. */
2343 if (exec_drive_command(dd->port,
2344 drive_command,
2345 (void __user *) (arg+4)))
2346 return -EIO;
2347
2348 /* Copy the status back to the users buffer. */
2349 if (copy_to_user((void __user *) arg,
2350 drive_command,
2351 sizeof(drive_command)))
2352 return -EFAULT;
2353
2354 break;
2355 }
2356 case HDIO_DRIVE_TASK:
2357 {
2358 u8 drive_command[7];
2359
2360 /* Copy the user command info to our buffer. */
2361 if (copy_from_user(drive_command,
2362 (void __user *) arg,
2363 sizeof(drive_command)))
2364 return -EFAULT;
2365
2366 /* Execute the drive command. */
2367 if (exec_drive_task(dd->port, drive_command))
2368 return -EIO;
2369
2370 /* Copy the status back to the users buffer. */
2371 if (copy_to_user((void __user *) arg,
2372 drive_command,
2373 sizeof(drive_command)))
2374 return -EFAULT;
2375
2376 break;
2377 }
2378 case HDIO_DRIVE_TASKFILE: {
2379 ide_task_request_t req_task;
2380 int ret, outtotal;
2381
2382 if (copy_from_user(&req_task, (void __user *) arg,
2383 sizeof(req_task)))
2384 return -EFAULT;
2385
2386 outtotal = sizeof(req_task);
2387
2388 ret = exec_drive_taskfile(dd, (void __user *) arg,
2389 &req_task, outtotal);
2390
2391 if (copy_to_user((void __user *) arg, &req_task,
2392 sizeof(req_task)))
2393 return -EFAULT;
2394
2395 return ret;
2396 }
2397
2398 default:
2399 return -EINVAL;
2400 }
2401 return 0;
2402 }
2403
2404 /*
2405 * Submit an IO to the hw
2406 *
2407 * This function is called by the block layer to issue an io
2408 * to the device. Upon completion, the callback function will
2409 * be called with the data parameter passed as the callback data.
2410 *
2411 * @dd Pointer to the driver data structure.
2412 * @start First sector to read.
2413 * @nsect Number of sectors to read.
2414 * @nents Number of entries in scatter list for the read command.
2415 * @tag The tag of this read command.
2416 * @callback Pointer to the function that should be called
2417 * when the read completes.
2418 * @data Callback data passed to the callback function
2419 * when the read completes.
2420 * @dir Direction (read or write)
2421 *
2422 * return value
2423 * None
2424 */
2425 static void mtip_hw_submit_io(struct driver_data *dd, sector_t start,
2426 int nsect, int nents, int tag, void *callback,
2427 void *data, int dir)
2428 {
2429 struct host_to_dev_fis *fis;
2430 struct mtip_port *port = dd->port;
2431 struct mtip_cmd *command = &port->commands[tag];
2432 int dma_dir = (dir == READ) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2433
2434 /* Map the scatter list for DMA access */
2435 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2436
2437 command->scatter_ents = nents;
2438
2439 /*
2440 * The number of retries for this command before it is
2441 * reported as a failure to the upper layers.
2442 */
2443 command->retries = MTIP_MAX_RETRIES;
2444
2445 /* Fill out fis */
2446 fis = command->command;
2447 fis->type = 0x27;
2448 fis->opts = 1 << 7;
2449 fis->command =
2450 (dir == READ ? ATA_CMD_FPDMA_READ : ATA_CMD_FPDMA_WRITE);
2451 *((unsigned int *) &fis->lba_low) = (start & 0xFFFFFF);
2452 *((unsigned int *) &fis->lba_low_ex) = ((start >> 24) & 0xFFFFFF);
2453 fis->device = 1 << 6;
2454 fis->features = nsect & 0xFF;
2455 fis->features_ex = (nsect >> 8) & 0xFF;
2456 fis->sect_count = ((tag << 3) | (tag >> 5));
2457 fis->sect_cnt_ex = 0;
2458 fis->control = 0;
2459 fis->res2 = 0;
2460 fis->res3 = 0;
2461 fill_command_sg(dd, command, nents);
2462
2463 /* Populate the command header */
2464 command->command_header->opts =
2465 __force_bit2int cpu_to_le32(
2466 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
2467 command->command_header->byte_count = 0;
2468
2469 /*
2470 * Set the completion function and data for the command
2471 * within this layer.
2472 */
2473 command->comp_data = dd;
2474 command->comp_func = mtip_async_complete;
2475 command->direction = dma_dir;
2476
2477 /*
2478 * Set the completion function and data for the command passed
2479 * from the upper layer.
2480 */
2481 command->async_data = data;
2482 command->async_callback = callback;
2483
2484 /*
2485 * To prevent this command from being issued
2486 * if an internal command is in progress or error handling is active.
2487 */
2488 if (port->flags & MTIP_PF_PAUSE_IO) {
2489 set_bit(tag, port->cmds_to_issue);
2490 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2491 return;
2492 }
2493
2494 /* Issue the command to the hardware */
2495 mtip_issue_ncq_command(port, tag);
2496
2497 return;
2498 }
2499
2500 /*
2501 * Release a command slot.
2502 *
2503 * @dd Pointer to the driver data structure.
2504 * @tag Slot tag
2505 *
2506 * return value
2507 * None
2508 */
2509 static void mtip_hw_release_scatterlist(struct driver_data *dd, int tag)
2510 {
2511 release_slot(dd->port, tag);
2512 }
2513
2514 /*
2515 * Obtain a command slot and return its associated scatter list.
2516 *
2517 * @dd Pointer to the driver data structure.
2518 * @tag Pointer to an int that will receive the allocated command
2519 * slot tag.
2520 *
2521 * return value
2522 * Pointer to the scatter list for the allocated command slot
2523 * or NULL if no command slots are available.
2524 */
2525 static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd,
2526 int *tag)
2527 {
2528 /*
2529 * It is possible that, even with this semaphore, a thread
2530 * may think that no command slots are available. Therefore, we
2531 * need to make an attempt to get_slot().
2532 */
2533 down(&dd->port->cmd_slot);
2534 *tag = get_slot(dd->port);
2535
2536 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
2537 up(&dd->port->cmd_slot);
2538 return NULL;
2539 }
2540 if (unlikely(*tag < 0)) {
2541 up(&dd->port->cmd_slot);
2542 return NULL;
2543 }
2544
2545 return dd->port->commands[*tag].sg;
2546 }
2547
2548 /*
2549 * Sysfs register/status dump.
2550 *
2551 * @dev Pointer to the device structure, passed by the kernrel.
2552 * @attr Pointer to the device_attribute structure passed by the kernel.
2553 * @buf Pointer to the char buffer that will receive the stats info.
2554 *
2555 * return value
2556 * The size, in bytes, of the data copied into buf.
2557 */
2558 static ssize_t mtip_hw_show_registers(struct device *dev,
2559 struct device_attribute *attr,
2560 char *buf)
2561 {
2562 u32 group_allocated;
2563 struct driver_data *dd = dev_to_disk(dev)->private_data;
2564 int size = 0;
2565 int n;
2566
2567 size += sprintf(&buf[size], "Hardware\n--------\n");
2568 size += sprintf(&buf[size], "S ACTive : [ 0x");
2569
2570 for (n = dd->slot_groups-1; n >= 0; n--)
2571 size += sprintf(&buf[size], "%08X ",
2572 readl(dd->port->s_active[n]));
2573
2574 size += sprintf(&buf[size], "]\n");
2575 size += sprintf(&buf[size], "Command Issue : [ 0x");
2576
2577 for (n = dd->slot_groups-1; n >= 0; n--)
2578 size += sprintf(&buf[size], "%08X ",
2579 readl(dd->port->cmd_issue[n]));
2580
2581 size += sprintf(&buf[size], "]\n");
2582 size += sprintf(&buf[size], "Completed : [ 0x");
2583
2584 for (n = dd->slot_groups-1; n >= 0; n--)
2585 size += sprintf(&buf[size], "%08X ",
2586 readl(dd->port->completed[n]));
2587
2588 size += sprintf(&buf[size], "]\n");
2589 size += sprintf(&buf[size], "PORT IRQ STAT : [ 0x%08X ]\n",
2590 readl(dd->port->mmio + PORT_IRQ_STAT));
2591 size += sprintf(&buf[size], "HOST IRQ STAT : [ 0x%08X ]\n",
2592 readl(dd->mmio + HOST_IRQ_STAT));
2593 size += sprintf(&buf[size], "\n");
2594
2595 size += sprintf(&buf[size], "Local\n-----\n");
2596 size += sprintf(&buf[size], "Allocated : [ 0x");
2597
2598 for (n = dd->slot_groups-1; n >= 0; n--) {
2599 if (sizeof(long) > sizeof(u32))
2600 group_allocated =
2601 dd->port->allocated[n/2] >> (32*(n&1));
2602 else
2603 group_allocated = dd->port->allocated[n];
2604 size += sprintf(&buf[size], "%08X ", group_allocated);
2605 }
2606 size += sprintf(&buf[size], "]\n");
2607
2608 size += sprintf(&buf[size], "Commands in Q: [ 0x");
2609
2610 for (n = dd->slot_groups-1; n >= 0; n--) {
2611 if (sizeof(long) > sizeof(u32))
2612 group_allocated =
2613 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2614 else
2615 group_allocated = dd->port->cmds_to_issue[n];
2616 size += sprintf(&buf[size], "%08X ", group_allocated);
2617 }
2618 size += sprintf(&buf[size], "]\n");
2619
2620 return size;
2621 }
2622
2623 static ssize_t mtip_hw_show_status(struct device *dev,
2624 struct device_attribute *attr,
2625 char *buf)
2626 {
2627 struct driver_data *dd = dev_to_disk(dev)->private_data;
2628 int size = 0;
2629
2630 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2631 size += sprintf(buf, "%s", "thermal_shutdown\n");
2632 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2633 size += sprintf(buf, "%s", "write_protect\n");
2634 else
2635 size += sprintf(buf, "%s", "online\n");
2636
2637 return size;
2638 }
2639
2640 static ssize_t mtip_hw_show_flags(struct device *dev,
2641 struct device_attribute *attr,
2642 char *buf)
2643 {
2644 struct driver_data *dd = dev_to_disk(dev)->private_data;
2645 int size = 0;
2646
2647 size += sprintf(&buf[size], "Flag in port struct : [ %08lX ]\n",
2648 dd->port->flags);
2649 size += sprintf(&buf[size], "Flag in dd struct : [ %08lX ]\n",
2650 dd->dd_flag);
2651
2652 return size;
2653 }
2654
2655 static DEVICE_ATTR(registers, S_IRUGO, mtip_hw_show_registers, NULL);
2656 static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
2657 static DEVICE_ATTR(flags, S_IRUGO, mtip_hw_show_flags, NULL);
2658
2659 /*
2660 * Create the sysfs related attributes.
2661 *
2662 * @dd Pointer to the driver data structure.
2663 * @kobj Pointer to the kobj for the block device.
2664 *
2665 * return value
2666 * 0 Operation completed successfully.
2667 * -EINVAL Invalid parameter.
2668 */
2669 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2670 {
2671 if (!kobj || !dd)
2672 return -EINVAL;
2673
2674 if (sysfs_create_file(kobj, &dev_attr_registers.attr))
2675 dev_warn(&dd->pdev->dev,
2676 "Error creating 'registers' sysfs entry\n");
2677 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2678 dev_warn(&dd->pdev->dev,
2679 "Error creating 'status' sysfs entry\n");
2680 if (sysfs_create_file(kobj, &dev_attr_flags.attr))
2681 dev_warn(&dd->pdev->dev,
2682 "Error creating 'flags' sysfs entry\n");
2683 return 0;
2684 }
2685
2686 /*
2687 * Remove the sysfs related attributes.
2688 *
2689 * @dd Pointer to the driver data structure.
2690 * @kobj Pointer to the kobj for the block device.
2691 *
2692 * return value
2693 * 0 Operation completed successfully.
2694 * -EINVAL Invalid parameter.
2695 */
2696 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2697 {
2698 if (!kobj || !dd)
2699 return -EINVAL;
2700
2701 sysfs_remove_file(kobj, &dev_attr_registers.attr);
2702 sysfs_remove_file(kobj, &dev_attr_status.attr);
2703 sysfs_remove_file(kobj, &dev_attr_flags.attr);
2704
2705 return 0;
2706 }
2707
2708 /*
2709 * Perform any init/resume time hardware setup
2710 *
2711 * @dd Pointer to the driver data structure.
2712 *
2713 * return value
2714 * None
2715 */
2716 static inline void hba_setup(struct driver_data *dd)
2717 {
2718 u32 hwdata;
2719 hwdata = readl(dd->mmio + HOST_HSORG);
2720
2721 /* interrupt bug workaround: use only 1 IS bit.*/
2722 writel(hwdata |
2723 HSORG_DISABLE_SLOTGRP_INTR |
2724 HSORG_DISABLE_SLOTGRP_PXIS,
2725 dd->mmio + HOST_HSORG);
2726 }
2727
2728 /*
2729 * Detect the details of the product, and store anything needed
2730 * into the driver data structure. This includes product type and
2731 * version and number of slot groups.
2732 *
2733 * @dd Pointer to the driver data structure.
2734 *
2735 * return value
2736 * None
2737 */
2738 static void mtip_detect_product(struct driver_data *dd)
2739 {
2740 u32 hwdata;
2741 unsigned int rev, slotgroups;
2742
2743 /*
2744 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2745 * info register:
2746 * [15:8] hardware/software interface rev#
2747 * [ 3] asic-style interface
2748 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2749 */
2750 hwdata = readl(dd->mmio + HOST_HSORG);
2751
2752 dd->product_type = MTIP_PRODUCT_UNKNOWN;
2753 dd->slot_groups = 1;
2754
2755 if (hwdata & 0x8) {
2756 dd->product_type = MTIP_PRODUCT_ASICFPGA;
2757 rev = (hwdata & HSORG_HWREV) >> 8;
2758 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2759 dev_info(&dd->pdev->dev,
2760 "ASIC-FPGA design, HS rev 0x%x, "
2761 "%i slot groups [%i slots]\n",
2762 rev,
2763 slotgroups,
2764 slotgroups * 32);
2765
2766 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2767 dev_warn(&dd->pdev->dev,
2768 "Warning: driver only supports "
2769 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2770 slotgroups = MTIP_MAX_SLOT_GROUPS;
2771 }
2772 dd->slot_groups = slotgroups;
2773 return;
2774 }
2775
2776 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2777 }
2778
2779 /*
2780 * Blocking wait for FTL rebuild to complete
2781 *
2782 * @dd Pointer to the DRIVER_DATA structure.
2783 *
2784 * return value
2785 * 0 FTL rebuild completed successfully
2786 * -EFAULT FTL rebuild error/timeout/interruption
2787 */
2788 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2789 {
2790 unsigned long timeout, cnt = 0, start;
2791
2792 dev_warn(&dd->pdev->dev,
2793 "FTL rebuild in progress. Polling for completion.\n");
2794
2795 start = jiffies;
2796 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2797
2798 do {
2799 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2800 &dd->dd_flag)))
2801 return -EFAULT;
2802 if (mtip_check_surprise_removal(dd->pdev))
2803 return -EFAULT;
2804
2805 if (mtip_get_identify(dd->port, NULL) < 0)
2806 return -EFAULT;
2807
2808 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2809 MTIP_FTL_REBUILD_MAGIC) {
2810 ssleep(1);
2811 /* Print message every 3 minutes */
2812 if (cnt++ >= 180) {
2813 dev_warn(&dd->pdev->dev,
2814 "FTL rebuild in progress (%d secs).\n",
2815 jiffies_to_msecs(jiffies - start) / 1000);
2816 cnt = 0;
2817 }
2818 } else {
2819 dev_warn(&dd->pdev->dev,
2820 "FTL rebuild complete (%d secs).\n",
2821 jiffies_to_msecs(jiffies - start) / 1000);
2822 mtip_block_initialize(dd);
2823 return 0;
2824 }
2825 ssleep(10);
2826 } while (time_before(jiffies, timeout));
2827
2828 /* Check for timeout */
2829 dev_err(&dd->pdev->dev,
2830 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
2831 jiffies_to_msecs(jiffies - start) / 1000);
2832 return -EFAULT;
2833 }
2834
2835 /*
2836 * service thread to issue queued commands
2837 *
2838 * @data Pointer to the driver data structure.
2839 *
2840 * return value
2841 * 0
2842 */
2843
2844 static int mtip_service_thread(void *data)
2845 {
2846 struct driver_data *dd = (struct driver_data *)data;
2847 unsigned long slot, slot_start, slot_wrap;
2848 unsigned int num_cmd_slots = dd->slot_groups * 32;
2849 struct mtip_port *port = dd->port;
2850
2851 while (1) {
2852 /*
2853 * the condition is to check neither an internal command is
2854 * is in progress nor error handling is active
2855 */
2856 wait_event_interruptible(port->svc_wait, (port->flags) &&
2857 !(port->flags & MTIP_PF_PAUSE_IO));
2858
2859 if (kthread_should_stop())
2860 break;
2861
2862 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2863 &dd->dd_flag)))
2864 break;
2865
2866 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2867 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
2868 slot = 1;
2869 /* used to restrict the loop to one iteration */
2870 slot_start = num_cmd_slots;
2871 slot_wrap = 0;
2872 while (1) {
2873 slot = find_next_bit(port->cmds_to_issue,
2874 num_cmd_slots, slot);
2875 if (slot_wrap == 1) {
2876 if ((slot_start >= slot) ||
2877 (slot >= num_cmd_slots))
2878 break;
2879 }
2880 if (unlikely(slot_start == num_cmd_slots))
2881 slot_start = slot;
2882
2883 if (unlikely(slot == num_cmd_slots)) {
2884 slot = 1;
2885 slot_wrap = 1;
2886 continue;
2887 }
2888
2889 /* Issue the command to the hardware */
2890 mtip_issue_ncq_command(port, slot);
2891
2892 clear_bit(slot, port->cmds_to_issue);
2893 }
2894
2895 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2896 } else if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
2897 if (!mtip_ftl_rebuild_poll(dd))
2898 set_bit(MTIP_DDF_REBUILD_FAILED_BIT,
2899 &dd->dd_flag);
2900 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
2901 }
2902 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2903
2904 if (test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2905 break;
2906 }
2907 return 0;
2908 }
2909
2910 /*
2911 * Called once for each card.
2912 *
2913 * @dd Pointer to the driver data structure.
2914 *
2915 * return value
2916 * 0 on success, else an error code.
2917 */
2918 static int mtip_hw_init(struct driver_data *dd)
2919 {
2920 int i;
2921 int rv;
2922 unsigned int num_command_slots;
2923 unsigned long timeout, timetaken;
2924 unsigned char *buf;
2925 struct smart_attr attr242;
2926
2927 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
2928
2929 mtip_detect_product(dd);
2930 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
2931 rv = -EIO;
2932 goto out1;
2933 }
2934 num_command_slots = dd->slot_groups * 32;
2935
2936 hba_setup(dd);
2937
2938 tasklet_init(&dd->tasklet, mtip_tasklet, (unsigned long)dd);
2939
2940 dd->port = kzalloc(sizeof(struct mtip_port), GFP_KERNEL);
2941 if (!dd->port) {
2942 dev_err(&dd->pdev->dev,
2943 "Memory allocation: port structure\n");
2944 return -ENOMEM;
2945 }
2946
2947 /* Counting semaphore to track command slot usage */
2948 sema_init(&dd->port->cmd_slot, num_command_slots - 1);
2949
2950 /* Spinlock to prevent concurrent issue */
2951 spin_lock_init(&dd->port->cmd_issue_lock);
2952
2953 /* Set the port mmio base address. */
2954 dd->port->mmio = dd->mmio + PORT_OFFSET;
2955 dd->port->dd = dd;
2956
2957 /* Allocate memory for the command list. */
2958 dd->port->command_list =
2959 dmam_alloc_coherent(&dd->pdev->dev,
2960 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
2961 &dd->port->command_list_dma,
2962 GFP_KERNEL);
2963 if (!dd->port->command_list) {
2964 dev_err(&dd->pdev->dev,
2965 "Memory allocation: command list\n");
2966 rv = -ENOMEM;
2967 goto out1;
2968 }
2969
2970 /* Clear the memory we have allocated. */
2971 memset(dd->port->command_list,
2972 0,
2973 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4));
2974
2975 /* Setup the addresse of the RX FIS. */
2976 dd->port->rxfis = dd->port->command_list + HW_CMD_SLOT_SZ;
2977 dd->port->rxfis_dma = dd->port->command_list_dma + HW_CMD_SLOT_SZ;
2978
2979 /* Setup the address of the command tables. */
2980 dd->port->command_table = dd->port->rxfis + AHCI_RX_FIS_SZ;
2981 dd->port->command_tbl_dma = dd->port->rxfis_dma + AHCI_RX_FIS_SZ;
2982
2983 /* Setup the address of the identify data. */
2984 dd->port->identify = dd->port->command_table +
2985 HW_CMD_TBL_AR_SZ;
2986 dd->port->identify_dma = dd->port->command_tbl_dma +
2987 HW_CMD_TBL_AR_SZ;
2988
2989 /* Setup the address of the sector buffer - for some non-ncq cmds */
2990 dd->port->sector_buffer = (void *) dd->port->identify + ATA_SECT_SIZE;
2991 dd->port->sector_buffer_dma = dd->port->identify_dma + ATA_SECT_SIZE;
2992
2993 /* Setup the address of the log buf - for read log command */
2994 dd->port->log_buf = (void *)dd->port->sector_buffer + ATA_SECT_SIZE;
2995 dd->port->log_buf_dma = dd->port->sector_buffer_dma + ATA_SECT_SIZE;
2996
2997 /* Setup the address of the smart buf - for smart read data command */
2998 dd->port->smart_buf = (void *)dd->port->log_buf + ATA_SECT_SIZE;
2999 dd->port->smart_buf_dma = dd->port->log_buf_dma + ATA_SECT_SIZE;
3000
3001
3002 /* Point the command headers at the command tables. */
3003 for (i = 0; i < num_command_slots; i++) {
3004 dd->port->commands[i].command_header =
3005 dd->port->command_list +
3006 (sizeof(struct mtip_cmd_hdr) * i);
3007 dd->port->commands[i].command_header_dma =
3008 dd->port->command_list_dma +
3009 (sizeof(struct mtip_cmd_hdr) * i);
3010
3011 dd->port->commands[i].command =
3012 dd->port->command_table + (HW_CMD_TBL_SZ * i);
3013 dd->port->commands[i].command_dma =
3014 dd->port->command_tbl_dma + (HW_CMD_TBL_SZ * i);
3015
3016 if (readl(dd->mmio + HOST_CAP) & HOST_CAP_64)
3017 dd->port->commands[i].command_header->ctbau =
3018 __force_bit2int cpu_to_le32(
3019 (dd->port->commands[i].command_dma >> 16) >> 16);
3020 dd->port->commands[i].command_header->ctba =
3021 __force_bit2int cpu_to_le32(
3022 dd->port->commands[i].command_dma & 0xFFFFFFFF);
3023
3024 /*
3025 * If this is not done, a bug is reported by the stock
3026 * FC11 i386. Due to the fact that it has lots of kernel
3027 * debugging enabled.
3028 */
3029 sg_init_table(dd->port->commands[i].sg, MTIP_MAX_SG);
3030
3031 /* Mark all commands as currently inactive.*/
3032 atomic_set(&dd->port->commands[i].active, 0);
3033 }
3034
3035 /* Setup the pointers to the extended s_active and CI registers. */
3036 for (i = 0; i < dd->slot_groups; i++) {
3037 dd->port->s_active[i] =
3038 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3039 dd->port->cmd_issue[i] =
3040 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3041 dd->port->completed[i] =
3042 dd->port->mmio + i*0x80 + PORT_SDBV;
3043 }
3044
3045 timetaken = jiffies;
3046 timeout = jiffies + msecs_to_jiffies(30000);
3047 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3048 time_before(jiffies, timeout)) {
3049 mdelay(100);
3050 }
3051 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3052 timetaken = jiffies - timetaken;
3053 dev_warn(&dd->pdev->dev,
3054 "Surprise removal detected at %u ms\n",
3055 jiffies_to_msecs(timetaken));
3056 rv = -ENODEV;
3057 goto out2 ;
3058 }
3059 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
3060 timetaken = jiffies - timetaken;
3061 dev_warn(&dd->pdev->dev,
3062 "Removal detected at %u ms\n",
3063 jiffies_to_msecs(timetaken));
3064 rv = -EFAULT;
3065 goto out2;
3066 }
3067
3068 /* Conditionally reset the HBA. */
3069 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3070 if (mtip_hba_reset(dd) < 0) {
3071 dev_err(&dd->pdev->dev,
3072 "Card did not reset within timeout\n");
3073 rv = -EIO;
3074 goto out2;
3075 }
3076 } else {
3077 /* Clear any pending interrupts on the HBA */
3078 writel(readl(dd->mmio + HOST_IRQ_STAT),
3079 dd->mmio + HOST_IRQ_STAT);
3080 }
3081
3082 mtip_init_port(dd->port);
3083 mtip_start_port(dd->port);
3084
3085 /* Setup the ISR and enable interrupts. */
3086 rv = devm_request_irq(&dd->pdev->dev,
3087 dd->pdev->irq,
3088 mtip_irq_handler,
3089 IRQF_SHARED,
3090 dev_driver_string(&dd->pdev->dev),
3091 dd);
3092
3093 if (rv) {
3094 dev_err(&dd->pdev->dev,
3095 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3096 goto out2;
3097 }
3098
3099 /* Enable interrupts on the HBA. */
3100 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3101 dd->mmio + HOST_CTL);
3102
3103 init_timer(&dd->port->cmd_timer);
3104 init_waitqueue_head(&dd->port->svc_wait);
3105
3106 dd->port->cmd_timer.data = (unsigned long int) dd->port;
3107 dd->port->cmd_timer.function = mtip_timeout_function;
3108 mod_timer(&dd->port->cmd_timer,
3109 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
3110
3111
3112 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
3113 rv = -EFAULT;
3114 goto out3;
3115 }
3116
3117 if (mtip_get_identify(dd->port, NULL) < 0) {
3118 rv = -EFAULT;
3119 goto out3;
3120 }
3121
3122 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3123 MTIP_FTL_REBUILD_MAGIC) {
3124 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3125 return MTIP_FTL_REBUILD_MAGIC;
3126 }
3127 mtip_dump_identify(dd->port);
3128
3129 /* check write protect, over temp and rebuild statuses */
3130 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3131 dd->port->log_buf,
3132 dd->port->log_buf_dma, 1);
3133 if (rv) {
3134 dev_warn(&dd->pdev->dev,
3135 "Error in READ LOG EXT (10h) command\n");
3136 /* non-critical error, don't fail the load */
3137 } else {
3138 buf = (unsigned char *)dd->port->log_buf;
3139 if (buf[259] & 0x1) {
3140 dev_info(&dd->pdev->dev,
3141 "Write protect bit is set.\n");
3142 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
3143 }
3144 if (buf[288] == 0xF7) {
3145 dev_info(&dd->pdev->dev,
3146 "Exceeded Tmax, drive in thermal shutdown.\n");
3147 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
3148 }
3149 if (buf[288] == 0xBF) {
3150 dev_info(&dd->pdev->dev,
3151 "Drive indicates rebuild has failed.\n");
3152 /* TODO */
3153 }
3154 }
3155
3156 /* get write protect progess */
3157 memset(&attr242, 0, sizeof(struct smart_attr));
3158 if (mtip_get_smart_attr(dd->port, 242, &attr242))
3159 dev_warn(&dd->pdev->dev,
3160 "Unable to check write protect progress\n");
3161 else
3162 dev_info(&dd->pdev->dev,
3163 "Write protect progress: %d%% (%d blocks)\n",
3164 attr242.cur, attr242.data);
3165 return rv;
3166
3167 out3:
3168 del_timer_sync(&dd->port->cmd_timer);
3169
3170 /* Disable interrupts on the HBA. */
3171 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3172 dd->mmio + HOST_CTL);
3173
3174 /*Release the IRQ. */
3175 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3176
3177 out2:
3178 mtip_deinit_port(dd->port);
3179
3180 /* Free the command/command header memory. */
3181 dmam_free_coherent(&dd->pdev->dev,
3182 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3183 dd->port->command_list,
3184 dd->port->command_list_dma);
3185 out1:
3186 /* Free the memory allocated for the for structure. */
3187 kfree(dd->port);
3188
3189 return rv;
3190 }
3191
3192 /*
3193 * Called to deinitialize an interface.
3194 *
3195 * @dd Pointer to the driver data structure.
3196 *
3197 * return value
3198 * 0
3199 */
3200 static int mtip_hw_exit(struct driver_data *dd)
3201 {
3202 /*
3203 * Send standby immediate (E0h) to the drive so that it
3204 * saves its state.
3205 */
3206 if (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
3207
3208 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags))
3209 if (mtip_standby_immediate(dd->port))
3210 dev_warn(&dd->pdev->dev,
3211 "STANDBY IMMEDIATE failed\n");
3212
3213 /* de-initialize the port. */
3214 mtip_deinit_port(dd->port);
3215
3216 /* Disable interrupts on the HBA. */
3217 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3218 dd->mmio + HOST_CTL);
3219 }
3220
3221 del_timer_sync(&dd->port->cmd_timer);
3222
3223 /* Release the IRQ. */
3224 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3225
3226 /* Stop the bottom half tasklet. */
3227 tasklet_kill(&dd->tasklet);
3228
3229 /* Free the command/command header memory. */
3230 dmam_free_coherent(&dd->pdev->dev,
3231 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3232 dd->port->command_list,
3233 dd->port->command_list_dma);
3234 /* Free the memory allocated for the for structure. */
3235 kfree(dd->port);
3236
3237 return 0;
3238 }
3239
3240 /*
3241 * Issue a Standby Immediate command to the device.
3242 *
3243 * This function is called by the Block Layer just before the
3244 * system powers off during a shutdown.
3245 *
3246 * @dd Pointer to the driver data structure.
3247 *
3248 * return value
3249 * 0
3250 */
3251 static int mtip_hw_shutdown(struct driver_data *dd)
3252 {
3253 /*
3254 * Send standby immediate (E0h) to the drive so that it
3255 * saves its state.
3256 */
3257 mtip_standby_immediate(dd->port);
3258
3259 return 0;
3260 }
3261
3262 /*
3263 * Suspend function
3264 *
3265 * This function is called by the Block Layer just before the
3266 * system hibernates.
3267 *
3268 * @dd Pointer to the driver data structure.
3269 *
3270 * return value
3271 * 0 Suspend was successful
3272 * -EFAULT Suspend was not successful
3273 */
3274 static int mtip_hw_suspend(struct driver_data *dd)
3275 {
3276 /*
3277 * Send standby immediate (E0h) to the drive
3278 * so that it saves its state.
3279 */
3280 if (mtip_standby_immediate(dd->port) != 0) {
3281 dev_err(&dd->pdev->dev,
3282 "Failed standby-immediate command\n");
3283 return -EFAULT;
3284 }
3285
3286 /* Disable interrupts on the HBA.*/
3287 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3288 dd->mmio + HOST_CTL);
3289 mtip_deinit_port(dd->port);
3290
3291 return 0;
3292 }
3293
3294 /*
3295 * Resume function
3296 *
3297 * This function is called by the Block Layer as the
3298 * system resumes.
3299 *
3300 * @dd Pointer to the driver data structure.
3301 *
3302 * return value
3303 * 0 Resume was successful
3304 * -EFAULT Resume was not successful
3305 */
3306 static int mtip_hw_resume(struct driver_data *dd)
3307 {
3308 /* Perform any needed hardware setup steps */
3309 hba_setup(dd);
3310
3311 /* Reset the HBA */
3312 if (mtip_hba_reset(dd) != 0) {
3313 dev_err(&dd->pdev->dev,
3314 "Unable to reset the HBA\n");
3315 return -EFAULT;
3316 }
3317
3318 /*
3319 * Enable the port, DMA engine, and FIS reception specific
3320 * h/w in controller.
3321 */
3322 mtip_init_port(dd->port);
3323 mtip_start_port(dd->port);
3324
3325 /* Enable interrupts on the HBA.*/
3326 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3327 dd->mmio + HOST_CTL);
3328
3329 return 0;
3330 }
3331
3332 /*
3333 * Helper function for reusing disk name
3334 * upon hot insertion.
3335 */
3336 static int rssd_disk_name_format(char *prefix,
3337 int index,
3338 char *buf,
3339 int buflen)
3340 {
3341 const int base = 'z' - 'a' + 1;
3342 char *begin = buf + strlen(prefix);
3343 char *end = buf + buflen;
3344 char *p;
3345 int unit;
3346
3347 p = end - 1;
3348 *p = '\0';
3349 unit = base;
3350 do {
3351 if (p == begin)
3352 return -EINVAL;
3353 *--p = 'a' + (index % unit);
3354 index = (index / unit) - 1;
3355 } while (index >= 0);
3356
3357 memmove(begin, p, end - p);
3358 memcpy(buf, prefix, strlen(prefix));
3359
3360 return 0;
3361 }
3362
3363 /*
3364 * Block layer IOCTL handler.
3365 *
3366 * @dev Pointer to the block_device structure.
3367 * @mode ignored
3368 * @cmd IOCTL command passed from the user application.
3369 * @arg Argument passed from the user application.
3370 *
3371 * return value
3372 * 0 IOCTL completed successfully.
3373 * -ENOTTY IOCTL not supported or invalid driver data
3374 * structure pointer.
3375 */
3376 static int mtip_block_ioctl(struct block_device *dev,
3377 fmode_t mode,
3378 unsigned cmd,
3379 unsigned long arg)
3380 {
3381 struct driver_data *dd = dev->bd_disk->private_data;
3382
3383 if (!capable(CAP_SYS_ADMIN))
3384 return -EACCES;
3385
3386 if (!dd)
3387 return -ENOTTY;
3388
3389 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3390 return -ENOTTY;
3391
3392 switch (cmd) {
3393 case BLKFLSBUF:
3394 return -ENOTTY;
3395 default:
3396 return mtip_hw_ioctl(dd, cmd, arg);
3397 }
3398 }
3399
3400 #ifdef CONFIG_COMPAT
3401 /*
3402 * Block layer compat IOCTL handler.
3403 *
3404 * @dev Pointer to the block_device structure.
3405 * @mode ignored
3406 * @cmd IOCTL command passed from the user application.
3407 * @arg Argument passed from the user application.
3408 *
3409 * return value
3410 * 0 IOCTL completed successfully.
3411 * -ENOTTY IOCTL not supported or invalid driver data
3412 * structure pointer.
3413 */
3414 static int mtip_block_compat_ioctl(struct block_device *dev,
3415 fmode_t mode,
3416 unsigned cmd,
3417 unsigned long arg)
3418 {
3419 struct driver_data *dd = dev->bd_disk->private_data;
3420
3421 if (!capable(CAP_SYS_ADMIN))
3422 return -EACCES;
3423
3424 if (!dd)
3425 return -ENOTTY;
3426
3427 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3428 return -ENOTTY;
3429
3430 switch (cmd) {
3431 case BLKFLSBUF:
3432 return -ENOTTY;
3433 case HDIO_DRIVE_TASKFILE: {
3434 struct mtip_compat_ide_task_request_s __user *compat_req_task;
3435 ide_task_request_t req_task;
3436 int compat_tasksize, outtotal, ret;
3437
3438 compat_tasksize =
3439 sizeof(struct mtip_compat_ide_task_request_s);
3440
3441 compat_req_task =
3442 (struct mtip_compat_ide_task_request_s __user *) arg;
3443
3444 if (copy_from_user(&req_task, (void __user *) arg,
3445 compat_tasksize - (2 * sizeof(compat_long_t))))
3446 return -EFAULT;
3447
3448 if (get_user(req_task.out_size, &compat_req_task->out_size))
3449 return -EFAULT;
3450
3451 if (get_user(req_task.in_size, &compat_req_task->in_size))
3452 return -EFAULT;
3453
3454 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3455
3456 ret = exec_drive_taskfile(dd, (void __user *) arg,
3457 &req_task, outtotal);
3458
3459 if (copy_to_user((void __user *) arg, &req_task,
3460 compat_tasksize -
3461 (2 * sizeof(compat_long_t))))
3462 return -EFAULT;
3463
3464 if (put_user(req_task.out_size, &compat_req_task->out_size))
3465 return -EFAULT;
3466
3467 if (put_user(req_task.in_size, &compat_req_task->in_size))
3468 return -EFAULT;
3469
3470 return ret;
3471 }
3472 default:
3473 return mtip_hw_ioctl(dd, cmd, arg);
3474 }
3475 }
3476 #endif
3477
3478 /*
3479 * Obtain the geometry of the device.
3480 *
3481 * You may think that this function is obsolete, but some applications,
3482 * fdisk for example still used CHS values. This function describes the
3483 * device as having 224 heads and 56 sectors per cylinder. These values are
3484 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3485 * partition is described in terms of a start and end cylinder this means
3486 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3487 * affects performance.
3488 *
3489 * @dev Pointer to the block_device strucutre.
3490 * @geo Pointer to a hd_geometry structure.
3491 *
3492 * return value
3493 * 0 Operation completed successfully.
3494 * -ENOTTY An error occurred while reading the drive capacity.
3495 */
3496 static int mtip_block_getgeo(struct block_device *dev,
3497 struct hd_geometry *geo)
3498 {
3499 struct driver_data *dd = dev->bd_disk->private_data;
3500 sector_t capacity;
3501
3502 if (!dd)
3503 return -ENOTTY;
3504
3505 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3506 dev_warn(&dd->pdev->dev,
3507 "Could not get drive capacity.\n");
3508 return -ENOTTY;
3509 }
3510
3511 geo->heads = 224;
3512 geo->sectors = 56;
3513 sector_div(capacity, (geo->heads * geo->sectors));
3514 geo->cylinders = capacity;
3515 return 0;
3516 }
3517
3518 /*
3519 * Block device operation function.
3520 *
3521 * This structure contains pointers to the functions required by the block
3522 * layer.
3523 */
3524 static const struct block_device_operations mtip_block_ops = {
3525 .ioctl = mtip_block_ioctl,
3526 #ifdef CONFIG_COMPAT
3527 .compat_ioctl = mtip_block_compat_ioctl,
3528 #endif
3529 .getgeo = mtip_block_getgeo,
3530 .owner = THIS_MODULE
3531 };
3532
3533 /*
3534 * Block layer make request function.
3535 *
3536 * This function is called by the kernel to process a BIO for
3537 * the P320 device.
3538 *
3539 * @queue Pointer to the request queue. Unused other than to obtain
3540 * the driver data structure.
3541 * @bio Pointer to the BIO.
3542 *
3543 */
3544 static void mtip_make_request(struct request_queue *queue, struct bio *bio)
3545 {
3546 struct driver_data *dd = queue->queuedata;
3547 struct scatterlist *sg;
3548 struct bio_vec *bvec;
3549 int nents = 0;
3550 int tag = 0;
3551
3552 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3553 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3554 &dd->dd_flag))) {
3555 bio_endio(bio, -ENXIO);
3556 return;
3557 }
3558 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
3559 bio_endio(bio, -ENODATA);
3560 return;
3561 }
3562 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3563 &dd->dd_flag) &&
3564 bio_data_dir(bio))) {
3565 bio_endio(bio, -ENODATA);
3566 return;
3567 }
3568 }
3569
3570 if (unlikely(!bio_has_data(bio))) {
3571 blk_queue_flush(queue, 0);
3572 bio_endio(bio, 0);
3573 return;
3574 }
3575
3576 sg = mtip_hw_get_scatterlist(dd, &tag);
3577 if (likely(sg != NULL)) {
3578 blk_queue_bounce(queue, &bio);
3579
3580 if (unlikely((bio)->bi_vcnt > MTIP_MAX_SG)) {
3581 dev_warn(&dd->pdev->dev,
3582 "Maximum number of SGL entries exceeded\n");
3583 bio_io_error(bio);
3584 mtip_hw_release_scatterlist(dd, tag);
3585 return;
3586 }
3587
3588 /* Create the scatter list for this bio. */
3589 bio_for_each_segment(bvec, bio, nents) {
3590 sg_set_page(&sg[nents],
3591 bvec->bv_page,
3592 bvec->bv_len,
3593 bvec->bv_offset);
3594 }
3595
3596 /* Issue the read/write. */
3597 mtip_hw_submit_io(dd,
3598 bio->bi_sector,
3599 bio_sectors(bio),
3600 nents,
3601 tag,
3602 bio_endio,
3603 bio,
3604 bio_data_dir(bio));
3605 } else
3606 bio_io_error(bio);
3607 }
3608
3609 /*
3610 * Block layer initialization function.
3611 *
3612 * This function is called once by the PCI layer for each P320
3613 * device that is connected to the system.
3614 *
3615 * @dd Pointer to the driver data structure.
3616 *
3617 * return value
3618 * 0 on success else an error code.
3619 */
3620 static int mtip_block_initialize(struct driver_data *dd)
3621 {
3622 int rv = 0, wait_for_rebuild = 0;
3623 sector_t capacity;
3624 unsigned int index = 0;
3625 struct kobject *kobj;
3626 unsigned char thd_name[16];
3627
3628 if (dd->disk)
3629 goto skip_create_disk; /* hw init done, before rebuild */
3630
3631 /* Initialize the protocol layer. */
3632 wait_for_rebuild = mtip_hw_init(dd);
3633 if (wait_for_rebuild < 0) {
3634 dev_err(&dd->pdev->dev,
3635 "Protocol layer initialization failed\n");
3636 rv = -EINVAL;
3637 goto protocol_init_error;
3638 }
3639
3640 dd->disk = alloc_disk(MTIP_MAX_MINORS);
3641 if (dd->disk == NULL) {
3642 dev_err(&dd->pdev->dev,
3643 "Unable to allocate gendisk structure\n");
3644 rv = -EINVAL;
3645 goto alloc_disk_error;
3646 }
3647
3648 /* Generate the disk name, implemented same as in sd.c */
3649 do {
3650 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL))
3651 goto ida_get_error;
3652
3653 spin_lock(&rssd_index_lock);
3654 rv = ida_get_new(&rssd_index_ida, &index);
3655 spin_unlock(&rssd_index_lock);
3656 } while (rv == -EAGAIN);
3657
3658 if (rv)
3659 goto ida_get_error;
3660
3661 rv = rssd_disk_name_format("rssd",
3662 index,
3663 dd->disk->disk_name,
3664 DISK_NAME_LEN);
3665 if (rv)
3666 goto disk_index_error;
3667
3668 dd->disk->driverfs_dev = &dd->pdev->dev;
3669 dd->disk->major = dd->major;
3670 dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS;
3671 dd->disk->fops = &mtip_block_ops;
3672 dd->disk->private_data = dd;
3673 dd->index = index;
3674
3675 /*
3676 * if rebuild pending, start the service thread, and delay the block
3677 * queue creation and add_disk()
3678 */
3679 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3680 goto start_service_thread;
3681
3682 skip_create_disk:
3683 /* Allocate the request queue. */
3684 dd->queue = blk_alloc_queue(GFP_KERNEL);
3685 if (dd->queue == NULL) {
3686 dev_err(&dd->pdev->dev,
3687 "Unable to allocate request queue\n");
3688 rv = -ENOMEM;
3689 goto block_queue_alloc_init_error;
3690 }
3691
3692 /* Attach our request function to the request queue. */
3693 blk_queue_make_request(dd->queue, mtip_make_request);
3694
3695 dd->disk->queue = dd->queue;
3696 dd->queue->queuedata = dd;
3697
3698 /* Set device limits. */
3699 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
3700 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3701 blk_queue_physical_block_size(dd->queue, 4096);
3702 blk_queue_max_hw_sectors(dd->queue, 0xffff);
3703 blk_queue_max_segment_size(dd->queue, 0x400000);
3704 blk_queue_io_min(dd->queue, 4096);
3705
3706 /*
3707 * write back cache is not supported in the device. FUA depends on
3708 * write back cache support, hence setting flush support to zero.
3709 */
3710 blk_queue_flush(dd->queue, 0);
3711
3712 /* Set the capacity of the device in 512 byte sectors. */
3713 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3714 dev_warn(&dd->pdev->dev,
3715 "Could not read drive capacity\n");
3716 rv = -EIO;
3717 goto read_capacity_error;
3718 }
3719 set_capacity(dd->disk, capacity);
3720
3721 /* Enable the block device and add it to /dev */
3722 add_disk(dd->disk);
3723
3724 /*
3725 * Now that the disk is active, initialize any sysfs attributes
3726 * managed by the protocol layer.
3727 */
3728 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3729 if (kobj) {
3730 mtip_hw_sysfs_init(dd, kobj);
3731 kobject_put(kobj);
3732 }
3733
3734 if (dd->mtip_svc_handler) {
3735 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3736 return rv; /* service thread created for handling rebuild */
3737 }
3738
3739 start_service_thread:
3740 sprintf(thd_name, "mtip_svc_thd_%02d", index);
3741
3742 dd->mtip_svc_handler = kthread_run(mtip_service_thread,
3743 dd, thd_name);
3744
3745 if (IS_ERR(dd->mtip_svc_handler)) {
3746 dev_err(&dd->pdev->dev, "service thread failed to start\n");
3747 dd->mtip_svc_handler = NULL;
3748 rv = -EFAULT;
3749 goto kthread_run_error;
3750 }
3751
3752 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3753 rv = wait_for_rebuild;
3754
3755 return rv;
3756
3757 kthread_run_error:
3758 /* Delete our gendisk. This also removes the device from /dev */
3759 del_gendisk(dd->disk);
3760
3761 read_capacity_error:
3762 blk_cleanup_queue(dd->queue);
3763
3764 block_queue_alloc_init_error:
3765 disk_index_error:
3766 spin_lock(&rssd_index_lock);
3767 ida_remove(&rssd_index_ida, index);
3768 spin_unlock(&rssd_index_lock);
3769
3770 ida_get_error:
3771 put_disk(dd->disk);
3772
3773 alloc_disk_error:
3774 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
3775
3776 protocol_init_error:
3777 return rv;
3778 }
3779
3780 /*
3781 * Block layer deinitialization function.
3782 *
3783 * Called by the PCI layer as each P320 device is removed.
3784 *
3785 * @dd Pointer to the driver data structure.
3786 *
3787 * return value
3788 * 0
3789 */
3790 static int mtip_block_remove(struct driver_data *dd)
3791 {
3792 struct kobject *kobj;
3793
3794 if (dd->mtip_svc_handler) {
3795 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
3796 wake_up_interruptible(&dd->port->svc_wait);
3797 kthread_stop(dd->mtip_svc_handler);
3798 }
3799
3800 /* Clean up the sysfs attributes, if created */
3801 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
3802 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3803 if (kobj) {
3804 mtip_hw_sysfs_exit(dd, kobj);
3805 kobject_put(kobj);
3806 }
3807 }
3808
3809 /*
3810 * Delete our gendisk structure. This also removes the device
3811 * from /dev
3812 */
3813 del_gendisk(dd->disk);
3814
3815 spin_lock(&rssd_index_lock);
3816 ida_remove(&rssd_index_ida, dd->index);
3817 spin_unlock(&rssd_index_lock);
3818
3819 blk_cleanup_queue(dd->queue);
3820 dd->disk = NULL;
3821 dd->queue = NULL;
3822
3823 /* De-initialize the protocol layer. */
3824 mtip_hw_exit(dd);
3825
3826 return 0;
3827 }
3828
3829 /*
3830 * Function called by the PCI layer when just before the
3831 * machine shuts down.
3832 *
3833 * If a protocol layer shutdown function is present it will be called
3834 * by this function.
3835 *
3836 * @dd Pointer to the driver data structure.
3837 *
3838 * return value
3839 * 0
3840 */
3841 static int mtip_block_shutdown(struct driver_data *dd)
3842 {
3843 dev_info(&dd->pdev->dev,
3844 "Shutting down %s ...\n", dd->disk->disk_name);
3845
3846 /* Delete our gendisk structure, and cleanup the blk queue. */
3847 del_gendisk(dd->disk);
3848
3849 spin_lock(&rssd_index_lock);
3850 ida_remove(&rssd_index_ida, dd->index);
3851 spin_unlock(&rssd_index_lock);
3852
3853 blk_cleanup_queue(dd->queue);
3854 dd->disk = NULL;
3855 dd->queue = NULL;
3856
3857 mtip_hw_shutdown(dd);
3858 return 0;
3859 }
3860
3861 static int mtip_block_suspend(struct driver_data *dd)
3862 {
3863 dev_info(&dd->pdev->dev,
3864 "Suspending %s ...\n", dd->disk->disk_name);
3865 mtip_hw_suspend(dd);
3866 return 0;
3867 }
3868
3869 static int mtip_block_resume(struct driver_data *dd)
3870 {
3871 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
3872 dd->disk->disk_name);
3873 mtip_hw_resume(dd);
3874 return 0;
3875 }
3876
3877 /*
3878 * Called for each supported PCI device detected.
3879 *
3880 * This function allocates the private data structure, enables the
3881 * PCI device and then calls the block layer initialization function.
3882 *
3883 * return value
3884 * 0 on success else an error code.
3885 */
3886 static int mtip_pci_probe(struct pci_dev *pdev,
3887 const struct pci_device_id *ent)
3888 {
3889 int rv = 0;
3890 struct driver_data *dd = NULL;
3891
3892 /* Allocate memory for this devices private data. */
3893 dd = kzalloc(sizeof(struct driver_data), GFP_KERNEL);
3894 if (dd == NULL) {
3895 dev_err(&pdev->dev,
3896 "Unable to allocate memory for driver data\n");
3897 return -ENOMEM;
3898 }
3899
3900 /* Attach the private data to this PCI device. */
3901 pci_set_drvdata(pdev, dd);
3902
3903 rv = pcim_enable_device(pdev);
3904 if (rv < 0) {
3905 dev_err(&pdev->dev, "Unable to enable device\n");
3906 goto iomap_err;
3907 }
3908
3909 /* Map BAR5 to memory. */
3910 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
3911 if (rv < 0) {
3912 dev_err(&pdev->dev, "Unable to map regions\n");
3913 goto iomap_err;
3914 }
3915
3916 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
3917 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
3918
3919 if (rv) {
3920 rv = pci_set_consistent_dma_mask(pdev,
3921 DMA_BIT_MASK(32));
3922 if (rv) {
3923 dev_warn(&pdev->dev,
3924 "64-bit DMA enable failed\n");
3925 goto setmask_err;
3926 }
3927 }
3928 }
3929
3930 pci_set_master(pdev);
3931
3932 if (pci_enable_msi(pdev)) {
3933 dev_warn(&pdev->dev,
3934 "Unable to enable MSI interrupt.\n");
3935 goto block_initialize_err;
3936 }
3937
3938 /* Copy the info we may need later into the private data structure. */
3939 dd->major = mtip_major;
3940 dd->instance = instance;
3941 dd->pdev = pdev;
3942
3943 /* Initialize the block layer. */
3944 rv = mtip_block_initialize(dd);
3945 if (rv < 0) {
3946 dev_err(&pdev->dev,
3947 "Unable to initialize block layer\n");
3948 goto block_initialize_err;
3949 }
3950
3951 /*
3952 * Increment the instance count so that each device has a unique
3953 * instance number.
3954 */
3955 instance++;
3956 if (rv != MTIP_FTL_REBUILD_MAGIC)
3957 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3958 goto done;
3959
3960 block_initialize_err:
3961 pci_disable_msi(pdev);
3962
3963 setmask_err:
3964 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
3965
3966 iomap_err:
3967 kfree(dd);
3968 pci_set_drvdata(pdev, NULL);
3969 return rv;
3970 done:
3971 return rv;
3972 }
3973
3974 /*
3975 * Called for each probed device when the device is removed or the
3976 * driver is unloaded.
3977 *
3978 * return value
3979 * None
3980 */
3981 static void mtip_pci_remove(struct pci_dev *pdev)
3982 {
3983 struct driver_data *dd = pci_get_drvdata(pdev);
3984 int counter = 0;
3985
3986 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
3987
3988 if (mtip_check_surprise_removal(pdev)) {
3989 while (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
3990 counter++;
3991 msleep(20);
3992 if (counter == 10) {
3993 /* Cleanup the outstanding commands */
3994 mtip_command_cleanup(dd);
3995 break;
3996 }
3997 }
3998 }
3999
4000 /* Clean up the block layer. */
4001 mtip_block_remove(dd);
4002
4003 pci_disable_msi(pdev);
4004
4005 kfree(dd);
4006 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4007 }
4008
4009 /*
4010 * Called for each probed device when the device is suspended.
4011 *
4012 * return value
4013 * 0 Success
4014 * <0 Error
4015 */
4016 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4017 {
4018 int rv = 0;
4019 struct driver_data *dd = pci_get_drvdata(pdev);
4020
4021 if (!dd) {
4022 dev_err(&pdev->dev,
4023 "Driver private datastructure is NULL\n");
4024 return -EFAULT;
4025 }
4026
4027 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4028
4029 /* Disable ports & interrupts then send standby immediate */
4030 rv = mtip_block_suspend(dd);
4031 if (rv < 0) {
4032 dev_err(&pdev->dev,
4033 "Failed to suspend controller\n");
4034 return rv;
4035 }
4036
4037 /*
4038 * Save the pci config space to pdev structure &
4039 * disable the device
4040 */
4041 pci_save_state(pdev);
4042 pci_disable_device(pdev);
4043
4044 /* Move to Low power state*/
4045 pci_set_power_state(pdev, PCI_D3hot);
4046
4047 return rv;
4048 }
4049
4050 /*
4051 * Called for each probed device when the device is resumed.
4052 *
4053 * return value
4054 * 0 Success
4055 * <0 Error
4056 */
4057 static int mtip_pci_resume(struct pci_dev *pdev)
4058 {
4059 int rv = 0;
4060 struct driver_data *dd;
4061
4062 dd = pci_get_drvdata(pdev);
4063 if (!dd) {
4064 dev_err(&pdev->dev,
4065 "Driver private datastructure is NULL\n");
4066 return -EFAULT;
4067 }
4068
4069 /* Move the device to active State */
4070 pci_set_power_state(pdev, PCI_D0);
4071
4072 /* Restore PCI configuration space */
4073 pci_restore_state(pdev);
4074
4075 /* Enable the PCI device*/
4076 rv = pcim_enable_device(pdev);
4077 if (rv < 0) {
4078 dev_err(&pdev->dev,
4079 "Failed to enable card during resume\n");
4080 goto err;
4081 }
4082 pci_set_master(pdev);
4083
4084 /*
4085 * Calls hbaReset, initPort, & startPort function
4086 * then enables interrupts
4087 */
4088 rv = mtip_block_resume(dd);
4089 if (rv < 0)
4090 dev_err(&pdev->dev, "Unable to resume\n");
4091
4092 err:
4093 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4094
4095 return rv;
4096 }
4097
4098 /*
4099 * Shutdown routine
4100 *
4101 * return value
4102 * None
4103 */
4104 static void mtip_pci_shutdown(struct pci_dev *pdev)
4105 {
4106 struct driver_data *dd = pci_get_drvdata(pdev);
4107 if (dd)
4108 mtip_block_shutdown(dd);
4109 }
4110
4111 /* Table of device ids supported by this driver. */
4112 static DEFINE_PCI_DEVICE_TABLE(mtip_pci_tbl) = {
4113 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320_DEVICE_ID) },
4114 { 0 }
4115 };
4116
4117 /* Structure that describes the PCI driver functions. */
4118 static struct pci_driver mtip_pci_driver = {
4119 .name = MTIP_DRV_NAME,
4120 .id_table = mtip_pci_tbl,
4121 .probe = mtip_pci_probe,
4122 .remove = mtip_pci_remove,
4123 .suspend = mtip_pci_suspend,
4124 .resume = mtip_pci_resume,
4125 .shutdown = mtip_pci_shutdown,
4126 };
4127
4128 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4129
4130 /*
4131 * Module initialization function.
4132 *
4133 * Called once when the module is loaded. This function allocates a major
4134 * block device number to the Cyclone devices and registers the PCI layer
4135 * of the driver.
4136 *
4137 * Return value
4138 * 0 on success else error code.
4139 */
4140 static int __init mtip_init(void)
4141 {
4142 int error;
4143
4144 printk(KERN_INFO MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4145
4146 /* Allocate a major block device number to use with this driver. */
4147 error = register_blkdev(0, MTIP_DRV_NAME);
4148 if (error <= 0) {
4149 printk(KERN_ERR "Unable to register block device (%d)\n",
4150 error);
4151 return -EBUSY;
4152 }
4153 mtip_major = error;
4154
4155 /* Register our PCI operations. */
4156 error = pci_register_driver(&mtip_pci_driver);
4157 if (error)
4158 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4159
4160 return error;
4161 }
4162
4163 /*
4164 * Module de-initialization function.
4165 *
4166 * Called once when the module is unloaded. This function deallocates
4167 * the major block device number allocated by mtip_init() and
4168 * unregisters the PCI layer of the driver.
4169 *
4170 * Return value
4171 * none
4172 */
4173 static void __exit mtip_exit(void)
4174 {
4175 /* Release the allocated major block device number. */
4176 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4177
4178 /* Unregister the PCI driver. */
4179 pci_unregister_driver(&mtip_pci_driver);
4180 }
4181
4182 MODULE_AUTHOR("Micron Technology, Inc");
4183 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4184 MODULE_LICENSE("GPL");
4185 MODULE_VERSION(MTIP_DRV_VERSION);
4186
4187 module_init(mtip_init);
4188 module_exit(mtip_exit);
Linux kernel - Deliverables
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