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Merge branch 'x86-debug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / block / mtip32xx / mtip32xx.c
1 /*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21 #include <linux/pci.h>
22 #include <linux/interrupt.h>
23 #include <linux/ata.h>
24 #include <linux/delay.h>
25 #include <linux/hdreg.h>
26 #include <linux/uaccess.h>
27 #include <linux/random.h>
28 #include <linux/smp.h>
29 #include <linux/compat.h>
30 #include <linux/fs.h>
31 #include <linux/module.h>
32 #include <linux/genhd.h>
33 #include <linux/blkdev.h>
34 #include <linux/bio.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/idr.h>
37 #include <linux/kthread.h>
38 #include <../drivers/ata/ahci.h>
39 #include <linux/export.h>
40 #include <linux/debugfs.h>
41 #include "mtip32xx.h"
42
43 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
44 #define HW_CMD_TBL_SZ (AHCI_CMD_TBL_HDR_SZ + (MTIP_MAX_SG * 16))
45 #define HW_CMD_TBL_AR_SZ (HW_CMD_TBL_SZ * MTIP_MAX_COMMAND_SLOTS)
46 #define HW_PORT_PRIV_DMA_SZ \
47 (HW_CMD_SLOT_SZ + HW_CMD_TBL_AR_SZ + AHCI_RX_FIS_SZ)
48
49 #define HOST_CAP_NZDMA (1 << 19)
50 #define HOST_HSORG 0xFC
51 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
52 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
53 #define HSORG_HWREV 0xFF00
54 #define HSORG_STYLE 0x8
55 #define HSORG_SLOTGROUPS 0x7
56
57 #define PORT_COMMAND_ISSUE 0x38
58 #define PORT_SDBV 0x7C
59
60 #define PORT_OFFSET 0x100
61 #define PORT_MEM_SIZE 0x80
62
63 #define PORT_IRQ_ERR \
64 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
65 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
66 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
67 PORT_IRQ_OVERFLOW)
68 #define PORT_IRQ_LEGACY \
69 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
70 #define PORT_IRQ_HANDLED \
71 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
72 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
73 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
74 #define DEF_PORT_IRQ \
75 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
76
77 /* product numbers */
78 #define MTIP_PRODUCT_UNKNOWN 0x00
79 #define MTIP_PRODUCT_ASICFPGA 0x11
80
81 /* Device instance number, incremented each time a device is probed. */
82 static int instance;
83
84 /*
85 * Global variable used to hold the major block device number
86 * allocated in mtip_init().
87 */
88 static int mtip_major;
89 static struct dentry *dfs_parent;
90
91 static DEFINE_SPINLOCK(rssd_index_lock);
92 static DEFINE_IDA(rssd_index_ida);
93
94 static int mtip_block_initialize(struct driver_data *dd);
95
96 #ifdef CONFIG_COMPAT
97 struct mtip_compat_ide_task_request_s {
98 __u8 io_ports[8];
99 __u8 hob_ports[8];
100 ide_reg_valid_t out_flags;
101 ide_reg_valid_t in_flags;
102 int data_phase;
103 int req_cmd;
104 compat_ulong_t out_size;
105 compat_ulong_t in_size;
106 };
107 #endif
108
109 /*
110 * This function check_for_surprise_removal is called
111 * while card is removed from the system and it will
112 * read the vendor id from the configration space
113 *
114 * @pdev Pointer to the pci_dev structure.
115 *
116 * return value
117 * true if device removed, else false
118 */
119 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
120 {
121 u16 vendor_id = 0;
122
123 /* Read the vendorID from the configuration space */
124 pci_read_config_word(pdev, 0x00, &vendor_id);
125 if (vendor_id == 0xFFFF)
126 return true; /* device removed */
127
128 return false; /* device present */
129 }
130
131 /*
132 * This function is called for clean the pending command in the
133 * command slot during the surprise removal of device and return
134 * error to the upper layer.
135 *
136 * @dd Pointer to the DRIVER_DATA structure.
137 *
138 * return value
139 * None
140 */
141 static void mtip_command_cleanup(struct driver_data *dd)
142 {
143 int group = 0, commandslot = 0, commandindex = 0;
144 struct mtip_cmd *command;
145 struct mtip_port *port = dd->port;
146 static int in_progress;
147
148 if (in_progress)
149 return;
150
151 in_progress = 1;
152
153 for (group = 0; group < 4; group++) {
154 for (commandslot = 0; commandslot < 32; commandslot++) {
155 if (!(port->allocated[group] & (1 << commandslot)))
156 continue;
157
158 commandindex = group << 5 | commandslot;
159 command = &port->commands[commandindex];
160
161 if (atomic_read(&command->active)
162 && (command->async_callback)) {
163 command->async_callback(command->async_data,
164 -ENODEV);
165 command->async_callback = NULL;
166 command->async_data = NULL;
167 }
168
169 dma_unmap_sg(&port->dd->pdev->dev,
170 command->sg,
171 command->scatter_ents,
172 command->direction);
173 }
174 }
175
176 up(&port->cmd_slot);
177
178 set_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag);
179 in_progress = 0;
180 }
181
182 /*
183 * Obtain an empty command slot.
184 *
185 * This function needs to be reentrant since it could be called
186 * at the same time on multiple CPUs. The allocation of the
187 * command slot must be atomic.
188 *
189 * @port Pointer to the port data structure.
190 *
191 * return value
192 * >= 0 Index of command slot obtained.
193 * -1 No command slots available.
194 */
195 static int get_slot(struct mtip_port *port)
196 {
197 int slot, i;
198 unsigned int num_command_slots = port->dd->slot_groups * 32;
199
200 /*
201 * Try 10 times, because there is a small race here.
202 * that's ok, because it's still cheaper than a lock.
203 *
204 * Race: Since this section is not protected by lock, same bit
205 * could be chosen by different process contexts running in
206 * different processor. So instead of costly lock, we are going
207 * with loop.
208 */
209 for (i = 0; i < 10; i++) {
210 slot = find_next_zero_bit(port->allocated,
211 num_command_slots, 1);
212 if ((slot < num_command_slots) &&
213 (!test_and_set_bit(slot, port->allocated)))
214 return slot;
215 }
216 dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n");
217
218 if (mtip_check_surprise_removal(port->dd->pdev)) {
219 /* Device not present, clean outstanding commands */
220 mtip_command_cleanup(port->dd);
221 }
222 return -1;
223 }
224
225 /*
226 * Release a command slot.
227 *
228 * @port Pointer to the port data structure.
229 * @tag Tag of command to release
230 *
231 * return value
232 * None
233 */
234 static inline void release_slot(struct mtip_port *port, int tag)
235 {
236 smp_mb__before_clear_bit();
237 clear_bit(tag, port->allocated);
238 smp_mb__after_clear_bit();
239 }
240
241 /*
242 * Reset the HBA (without sleeping)
243 *
244 * Just like hba_reset, except does not call sleep, so can be
245 * run from interrupt/tasklet context.
246 *
247 * @dd Pointer to the driver data structure.
248 *
249 * return value
250 * 0 The reset was successful.
251 * -1 The HBA Reset bit did not clear.
252 */
253 static int hba_reset_nosleep(struct driver_data *dd)
254 {
255 unsigned long timeout;
256
257 /* Chip quirk: quiesce any chip function */
258 mdelay(10);
259
260 /* Set the reset bit */
261 writel(HOST_RESET, dd->mmio + HOST_CTL);
262
263 /* Flush */
264 readl(dd->mmio + HOST_CTL);
265
266 /*
267 * Wait 10ms then spin for up to 1 second
268 * waiting for reset acknowledgement
269 */
270 timeout = jiffies + msecs_to_jiffies(1000);
271 mdelay(10);
272 while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
273 && time_before(jiffies, timeout))
274 mdelay(1);
275
276 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
277 return -1;
278
279 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
280 return -1;
281
282 return 0;
283 }
284
285 /*
286 * Issue a command to the hardware.
287 *
288 * Set the appropriate bit in the s_active and Command Issue hardware
289 * registers, causing hardware command processing to begin.
290 *
291 * @port Pointer to the port structure.
292 * @tag The tag of the command to be issued.
293 *
294 * return value
295 * None
296 */
297 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
298 {
299 atomic_set(&port->commands[tag].active, 1);
300
301 spin_lock(&port->cmd_issue_lock);
302
303 writel((1 << MTIP_TAG_BIT(tag)),
304 port->s_active[MTIP_TAG_INDEX(tag)]);
305 writel((1 << MTIP_TAG_BIT(tag)),
306 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
307
308 spin_unlock(&port->cmd_issue_lock);
309
310 /* Set the command's timeout value.*/
311 port->commands[tag].comp_time = jiffies + msecs_to_jiffies(
312 MTIP_NCQ_COMMAND_TIMEOUT_MS);
313 }
314
315 /*
316 * Enable/disable the reception of FIS
317 *
318 * @port Pointer to the port data structure
319 * @enable 1 to enable, 0 to disable
320 *
321 * return value
322 * Previous state: 1 enabled, 0 disabled
323 */
324 static int mtip_enable_fis(struct mtip_port *port, int enable)
325 {
326 u32 tmp;
327
328 /* enable FIS reception */
329 tmp = readl(port->mmio + PORT_CMD);
330 if (enable)
331 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
332 else
333 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
334
335 /* Flush */
336 readl(port->mmio + PORT_CMD);
337
338 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
339 }
340
341 /*
342 * Enable/disable the DMA engine
343 *
344 * @port Pointer to the port data structure
345 * @enable 1 to enable, 0 to disable
346 *
347 * return value
348 * Previous state: 1 enabled, 0 disabled.
349 */
350 static int mtip_enable_engine(struct mtip_port *port, int enable)
351 {
352 u32 tmp;
353
354 /* enable FIS reception */
355 tmp = readl(port->mmio + PORT_CMD);
356 if (enable)
357 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
358 else
359 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
360
361 readl(port->mmio + PORT_CMD);
362 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
363 }
364
365 /*
366 * Enables the port DMA engine and FIS reception.
367 *
368 * return value
369 * None
370 */
371 static inline void mtip_start_port(struct mtip_port *port)
372 {
373 /* Enable FIS reception */
374 mtip_enable_fis(port, 1);
375
376 /* Enable the DMA engine */
377 mtip_enable_engine(port, 1);
378 }
379
380 /*
381 * Deinitialize a port by disabling port interrupts, the DMA engine,
382 * and FIS reception.
383 *
384 * @port Pointer to the port structure
385 *
386 * return value
387 * None
388 */
389 static inline void mtip_deinit_port(struct mtip_port *port)
390 {
391 /* Disable interrupts on this port */
392 writel(0, port->mmio + PORT_IRQ_MASK);
393
394 /* Disable the DMA engine */
395 mtip_enable_engine(port, 0);
396
397 /* Disable FIS reception */
398 mtip_enable_fis(port, 0);
399 }
400
401 /*
402 * Initialize a port.
403 *
404 * This function deinitializes the port by calling mtip_deinit_port() and
405 * then initializes it by setting the command header and RX FIS addresses,
406 * clearing the SError register and any pending port interrupts before
407 * re-enabling the default set of port interrupts.
408 *
409 * @port Pointer to the port structure.
410 *
411 * return value
412 * None
413 */
414 static void mtip_init_port(struct mtip_port *port)
415 {
416 int i;
417 mtip_deinit_port(port);
418
419 /* Program the command list base and FIS base addresses */
420 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
421 writel((port->command_list_dma >> 16) >> 16,
422 port->mmio + PORT_LST_ADDR_HI);
423 writel((port->rxfis_dma >> 16) >> 16,
424 port->mmio + PORT_FIS_ADDR_HI);
425 }
426
427 writel(port->command_list_dma & 0xFFFFFFFF,
428 port->mmio + PORT_LST_ADDR);
429 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
430
431 /* Clear SError */
432 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
433
434 /* reset the completed registers.*/
435 for (i = 0; i < port->dd->slot_groups; i++)
436 writel(0xFFFFFFFF, port->completed[i]);
437
438 /* Clear any pending interrupts for this port */
439 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
440
441 /* Clear any pending interrupts on the HBA. */
442 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
443 port->dd->mmio + HOST_IRQ_STAT);
444
445 /* Enable port interrupts */
446 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
447 }
448
449 /*
450 * Restart a port
451 *
452 * @port Pointer to the port data structure.
453 *
454 * return value
455 * None
456 */
457 static void mtip_restart_port(struct mtip_port *port)
458 {
459 unsigned long timeout;
460
461 /* Disable the DMA engine */
462 mtip_enable_engine(port, 0);
463
464 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
465 timeout = jiffies + msecs_to_jiffies(500);
466 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
467 && time_before(jiffies, timeout))
468 ;
469
470 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
471 return;
472
473 /*
474 * Chip quirk: escalate to hba reset if
475 * PxCMD.CR not clear after 500 ms
476 */
477 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
478 dev_warn(&port->dd->pdev->dev,
479 "PxCMD.CR not clear, escalating reset\n");
480
481 if (hba_reset_nosleep(port->dd))
482 dev_err(&port->dd->pdev->dev,
483 "HBA reset escalation failed.\n");
484
485 /* 30 ms delay before com reset to quiesce chip */
486 mdelay(30);
487 }
488
489 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
490
491 /* Set PxSCTL.DET */
492 writel(readl(port->mmio + PORT_SCR_CTL) |
493 1, port->mmio + PORT_SCR_CTL);
494 readl(port->mmio + PORT_SCR_CTL);
495
496 /* Wait 1 ms to quiesce chip function */
497 timeout = jiffies + msecs_to_jiffies(1);
498 while (time_before(jiffies, timeout))
499 ;
500
501 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
502 return;
503
504 /* Clear PxSCTL.DET */
505 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
506 port->mmio + PORT_SCR_CTL);
507 readl(port->mmio + PORT_SCR_CTL);
508
509 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
510 timeout = jiffies + msecs_to_jiffies(500);
511 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
512 && time_before(jiffies, timeout))
513 ;
514
515 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
516 return;
517
518 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
519 dev_warn(&port->dd->pdev->dev,
520 "COM reset failed\n");
521
522 mtip_init_port(port);
523 mtip_start_port(port);
524
525 }
526
527 /*
528 * Helper function for tag logging
529 */
530 static void print_tags(struct driver_data *dd,
531 char *msg,
532 unsigned long *tagbits,
533 int cnt)
534 {
535 unsigned char tagmap[128];
536 int group, tagmap_len = 0;
537
538 memset(tagmap, 0, sizeof(tagmap));
539 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
540 tagmap_len = sprintf(tagmap + tagmap_len, "%016lX ",
541 tagbits[group-1]);
542 dev_warn(&dd->pdev->dev,
543 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
544 }
545
546 /*
547 * Called periodically to see if any read/write commands are
548 * taking too long to complete.
549 *
550 * @data Pointer to the PORT data structure.
551 *
552 * return value
553 * None
554 */
555 static void mtip_timeout_function(unsigned long int data)
556 {
557 struct mtip_port *port = (struct mtip_port *) data;
558 struct host_to_dev_fis *fis;
559 struct mtip_cmd *command;
560 int tag, cmdto_cnt = 0;
561 unsigned int bit, group;
562 unsigned int num_command_slots = port->dd->slot_groups * 32;
563 unsigned long to, tagaccum[SLOTBITS_IN_LONGS];
564
565 if (unlikely(!port))
566 return;
567
568 if (test_bit(MTIP_DDF_RESUME_BIT, &port->dd->dd_flag)) {
569 mod_timer(&port->cmd_timer,
570 jiffies + msecs_to_jiffies(30000));
571 return;
572 }
573 /* clear the tag accumulator */
574 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
575
576 for (tag = 0; tag < num_command_slots; tag++) {
577 /*
578 * Skip internal command slot as it has
579 * its own timeout mechanism
580 */
581 if (tag == MTIP_TAG_INTERNAL)
582 continue;
583
584 if (atomic_read(&port->commands[tag].active) &&
585 (time_after(jiffies, port->commands[tag].comp_time))) {
586 group = tag >> 5;
587 bit = tag & 0x1F;
588
589 command = &port->commands[tag];
590 fis = (struct host_to_dev_fis *) command->command;
591
592 set_bit(tag, tagaccum);
593 cmdto_cnt++;
594 if (cmdto_cnt == 1)
595 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
596
597 /*
598 * Clear the completed bit. This should prevent
599 * any interrupt handlers from trying to retire
600 * the command.
601 */
602 writel(1 << bit, port->completed[group]);
603
604 /* Call the async completion callback. */
605 if (likely(command->async_callback))
606 command->async_callback(command->async_data,
607 -EIO);
608 command->async_callback = NULL;
609 command->comp_func = NULL;
610
611 /* Unmap the DMA scatter list entries */
612 dma_unmap_sg(&port->dd->pdev->dev,
613 command->sg,
614 command->scatter_ents,
615 command->direction);
616
617 /*
618 * Clear the allocated bit and active tag for the
619 * command.
620 */
621 atomic_set(&port->commands[tag].active, 0);
622 release_slot(port, tag);
623
624 up(&port->cmd_slot);
625 }
626 }
627
628 if (cmdto_cnt && !test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
629 print_tags(port->dd, "timed out", tagaccum, cmdto_cnt);
630
631 mtip_restart_port(port);
632 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
633 wake_up_interruptible(&port->svc_wait);
634 }
635
636 if (port->ic_pause_timer) {
637 to = port->ic_pause_timer + msecs_to_jiffies(1000);
638 if (time_after(jiffies, to)) {
639 if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
640 port->ic_pause_timer = 0;
641 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
642 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
643 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
644 wake_up_interruptible(&port->svc_wait);
645 }
646
647
648 }
649 }
650
651 /* Restart the timer */
652 mod_timer(&port->cmd_timer,
653 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
654 }
655
656 /*
657 * IO completion function.
658 *
659 * This completion function is called by the driver ISR when a
660 * command that was issued by the kernel completes. It first calls the
661 * asynchronous completion function which normally calls back into the block
662 * layer passing the asynchronous callback data, then unmaps the
663 * scatter list associated with the completed command, and finally
664 * clears the allocated bit associated with the completed command.
665 *
666 * @port Pointer to the port data structure.
667 * @tag Tag of the command.
668 * @data Pointer to driver_data.
669 * @status Completion status.
670 *
671 * return value
672 * None
673 */
674 static void mtip_async_complete(struct mtip_port *port,
675 int tag,
676 void *data,
677 int status)
678 {
679 struct mtip_cmd *command;
680 struct driver_data *dd = data;
681 int cb_status = status ? -EIO : 0;
682
683 if (unlikely(!dd) || unlikely(!port))
684 return;
685
686 command = &port->commands[tag];
687
688 if (unlikely(status == PORT_IRQ_TF_ERR)) {
689 dev_warn(&port->dd->pdev->dev,
690 "Command tag %d failed due to TFE\n", tag);
691 }
692
693 /* Upper layer callback */
694 if (likely(command->async_callback))
695 command->async_callback(command->async_data, cb_status);
696
697 command->async_callback = NULL;
698 command->comp_func = NULL;
699
700 /* Unmap the DMA scatter list entries */
701 dma_unmap_sg(&dd->pdev->dev,
702 command->sg,
703 command->scatter_ents,
704 command->direction);
705
706 /* Clear the allocated and active bits for the command */
707 atomic_set(&port->commands[tag].active, 0);
708 release_slot(port, tag);
709
710 up(&port->cmd_slot);
711 }
712
713 /*
714 * Internal command completion callback function.
715 *
716 * This function is normally called by the driver ISR when an internal
717 * command completed. This function signals the command completion by
718 * calling complete().
719 *
720 * @port Pointer to the port data structure.
721 * @tag Tag of the command that has completed.
722 * @data Pointer to a completion structure.
723 * @status Completion status.
724 *
725 * return value
726 * None
727 */
728 static void mtip_completion(struct mtip_port *port,
729 int tag,
730 void *data,
731 int status)
732 {
733 struct mtip_cmd *command = &port->commands[tag];
734 struct completion *waiting = data;
735 if (unlikely(status == PORT_IRQ_TF_ERR))
736 dev_warn(&port->dd->pdev->dev,
737 "Internal command %d completed with TFE\n", tag);
738
739 command->async_callback = NULL;
740 command->comp_func = NULL;
741
742 complete(waiting);
743 }
744
745 static void mtip_null_completion(struct mtip_port *port,
746 int tag,
747 void *data,
748 int status)
749 {
750 return;
751 }
752
753 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
754 dma_addr_t buffer_dma, unsigned int sectors);
755 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
756 struct smart_attr *attrib);
757 /*
758 * Handle an error.
759 *
760 * @dd Pointer to the DRIVER_DATA structure.
761 *
762 * return value
763 * None
764 */
765 static void mtip_handle_tfe(struct driver_data *dd)
766 {
767 int group, tag, bit, reissue, rv;
768 struct mtip_port *port;
769 struct mtip_cmd *cmd;
770 u32 completed;
771 struct host_to_dev_fis *fis;
772 unsigned long tagaccum[SLOTBITS_IN_LONGS];
773 unsigned int cmd_cnt = 0;
774 unsigned char *buf;
775 char *fail_reason = NULL;
776 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
777
778 dev_warn(&dd->pdev->dev, "Taskfile error\n");
779
780 port = dd->port;
781
782 /* Stop the timer to prevent command timeouts. */
783 del_timer(&port->cmd_timer);
784 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
785
786 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
787 test_bit(MTIP_TAG_INTERNAL, port->allocated)) {
788 cmd = &port->commands[MTIP_TAG_INTERNAL];
789 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
790
791 atomic_inc(&cmd->active); /* active > 1 indicates error */
792 if (cmd->comp_data && cmd->comp_func) {
793 cmd->comp_func(port, MTIP_TAG_INTERNAL,
794 cmd->comp_data, PORT_IRQ_TF_ERR);
795 }
796 goto handle_tfe_exit;
797 }
798
799 /* clear the tag accumulator */
800 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
801
802 /* Loop through all the groups */
803 for (group = 0; group < dd->slot_groups; group++) {
804 completed = readl(port->completed[group]);
805
806 /* clear completed status register in the hardware.*/
807 writel(completed, port->completed[group]);
808
809 /* Process successfully completed commands */
810 for (bit = 0; bit < 32 && completed; bit++) {
811 if (!(completed & (1<<bit)))
812 continue;
813 tag = (group << 5) + bit;
814
815 /* Skip the internal command slot */
816 if (tag == MTIP_TAG_INTERNAL)
817 continue;
818
819 cmd = &port->commands[tag];
820 if (likely(cmd->comp_func)) {
821 set_bit(tag, tagaccum);
822 cmd_cnt++;
823 atomic_set(&cmd->active, 0);
824 cmd->comp_func(port,
825 tag,
826 cmd->comp_data,
827 0);
828 } else {
829 dev_err(&port->dd->pdev->dev,
830 "Missing completion func for tag %d",
831 tag);
832 if (mtip_check_surprise_removal(dd->pdev)) {
833 mtip_command_cleanup(dd);
834 /* don't proceed further */
835 return;
836 }
837 }
838 }
839 }
840
841 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
842
843 /* Restart the port */
844 mdelay(20);
845 mtip_restart_port(port);
846
847 /* Trying to determine the cause of the error */
848 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
849 dd->port->log_buf,
850 dd->port->log_buf_dma, 1);
851 if (rv) {
852 dev_warn(&dd->pdev->dev,
853 "Error in READ LOG EXT (10h) command\n");
854 /* non-critical error, don't fail the load */
855 } else {
856 buf = (unsigned char *)dd->port->log_buf;
857 if (buf[259] & 0x1) {
858 dev_info(&dd->pdev->dev,
859 "Write protect bit is set.\n");
860 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
861 fail_all_ncq_write = 1;
862 fail_reason = "write protect";
863 }
864 if (buf[288] == 0xF7) {
865 dev_info(&dd->pdev->dev,
866 "Exceeded Tmax, drive in thermal shutdown.\n");
867 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
868 fail_all_ncq_cmds = 1;
869 fail_reason = "thermal shutdown";
870 }
871 if (buf[288] == 0xBF) {
872 dev_info(&dd->pdev->dev,
873 "Drive indicates rebuild has failed.\n");
874 fail_all_ncq_cmds = 1;
875 fail_reason = "rebuild failed";
876 }
877 }
878
879 /* clear the tag accumulator */
880 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
881
882 /* Loop through all the groups */
883 for (group = 0; group < dd->slot_groups; group++) {
884 for (bit = 0; bit < 32; bit++) {
885 reissue = 1;
886 tag = (group << 5) + bit;
887 cmd = &port->commands[tag];
888
889 /* If the active bit is set re-issue the command */
890 if (atomic_read(&cmd->active) == 0)
891 continue;
892
893 fis = (struct host_to_dev_fis *)cmd->command;
894
895 /* Should re-issue? */
896 if (tag == MTIP_TAG_INTERNAL ||
897 fis->command == ATA_CMD_SET_FEATURES)
898 reissue = 0;
899 else {
900 if (fail_all_ncq_cmds ||
901 (fail_all_ncq_write &&
902 fis->command == ATA_CMD_FPDMA_WRITE)) {
903 dev_warn(&dd->pdev->dev,
904 " Fail: %s w/tag %d [%s].\n",
905 fis->command == ATA_CMD_FPDMA_WRITE ?
906 "write" : "read",
907 tag,
908 fail_reason != NULL ?
909 fail_reason : "unknown");
910 atomic_set(&cmd->active, 0);
911 if (cmd->comp_func) {
912 cmd->comp_func(port, tag,
913 cmd->comp_data,
914 -ENODATA);
915 }
916 continue;
917 }
918 }
919
920 /*
921 * First check if this command has
922 * exceeded its retries.
923 */
924 if (reissue && (cmd->retries-- > 0)) {
925
926 set_bit(tag, tagaccum);
927
928 /* Re-issue the command. */
929 mtip_issue_ncq_command(port, tag);
930
931 continue;
932 }
933
934 /* Retire a command that will not be reissued */
935 dev_warn(&port->dd->pdev->dev,
936 "retiring tag %d\n", tag);
937 atomic_set(&cmd->active, 0);
938
939 if (cmd->comp_func)
940 cmd->comp_func(
941 port,
942 tag,
943 cmd->comp_data,
944 PORT_IRQ_TF_ERR);
945 else
946 dev_warn(&port->dd->pdev->dev,
947 "Bad completion for tag %d\n",
948 tag);
949 }
950 }
951 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
952
953 handle_tfe_exit:
954 /* clear eh_active */
955 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
956 wake_up_interruptible(&port->svc_wait);
957
958 mod_timer(&port->cmd_timer,
959 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
960 }
961
962 /*
963 * Handle a set device bits interrupt
964 */
965 static inline void mtip_process_sdbf(struct driver_data *dd)
966 {
967 struct mtip_port *port = dd->port;
968 int group, tag, bit;
969 u32 completed;
970 struct mtip_cmd *command;
971
972 /* walk all bits in all slot groups */
973 for (group = 0; group < dd->slot_groups; group++) {
974 completed = readl(port->completed[group]);
975 if (!completed)
976 continue;
977
978 /* clear completed status register in the hardware.*/
979 writel(completed, port->completed[group]);
980
981 /* Process completed commands. */
982 for (bit = 0;
983 (bit < 32) && completed;
984 bit++, completed >>= 1) {
985 if (completed & 0x01) {
986 tag = (group << 5) | bit;
987
988 /* skip internal command slot. */
989 if (unlikely(tag == MTIP_TAG_INTERNAL))
990 continue;
991
992 command = &port->commands[tag];
993 /* make internal callback */
994 if (likely(command->comp_func)) {
995 command->comp_func(
996 port,
997 tag,
998 command->comp_data,
999 0);
1000 } else {
1001 dev_warn(&dd->pdev->dev,
1002 "Null completion "
1003 "for tag %d",
1004 tag);
1005
1006 if (mtip_check_surprise_removal(
1007 dd->pdev)) {
1008 mtip_command_cleanup(dd);
1009 return;
1010 }
1011 }
1012 }
1013 }
1014 }
1015 }
1016
1017 /*
1018 * Process legacy pio and d2h interrupts
1019 */
1020 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
1021 {
1022 struct mtip_port *port = dd->port;
1023 struct mtip_cmd *cmd = &port->commands[MTIP_TAG_INTERNAL];
1024
1025 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
1026 (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1027 & (1 << MTIP_TAG_INTERNAL))) {
1028 if (cmd->comp_func) {
1029 cmd->comp_func(port,
1030 MTIP_TAG_INTERNAL,
1031 cmd->comp_data,
1032 0);
1033 return;
1034 }
1035 }
1036
1037 return;
1038 }
1039
1040 /*
1041 * Demux and handle errors
1042 */
1043 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
1044 {
1045 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR)))
1046 mtip_handle_tfe(dd);
1047
1048 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
1049 dev_warn(&dd->pdev->dev,
1050 "Clearing PxSERR.DIAG.x\n");
1051 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
1052 }
1053
1054 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
1055 dev_warn(&dd->pdev->dev,
1056 "Clearing PxSERR.DIAG.n\n");
1057 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
1058 }
1059
1060 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
1061 dev_warn(&dd->pdev->dev,
1062 "Port stat errors %x unhandled\n",
1063 (port_stat & ~PORT_IRQ_HANDLED));
1064 }
1065 }
1066
1067 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
1068 {
1069 struct driver_data *dd = (struct driver_data *) data;
1070 struct mtip_port *port = dd->port;
1071 u32 hba_stat, port_stat;
1072 int rv = IRQ_NONE;
1073
1074 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1075 if (hba_stat) {
1076 rv = IRQ_HANDLED;
1077
1078 /* Acknowledge the interrupt status on the port.*/
1079 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1080 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1081
1082 /* Demux port status */
1083 if (likely(port_stat & PORT_IRQ_SDB_FIS))
1084 mtip_process_sdbf(dd);
1085
1086 if (unlikely(port_stat & PORT_IRQ_ERR)) {
1087 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
1088 mtip_command_cleanup(dd);
1089 /* don't proceed further */
1090 return IRQ_HANDLED;
1091 }
1092 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1093 &dd->dd_flag))
1094 return rv;
1095
1096 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
1097 }
1098
1099 if (unlikely(port_stat & PORT_IRQ_LEGACY))
1100 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
1101 }
1102
1103 /* acknowledge interrupt */
1104 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
1105
1106 return rv;
1107 }
1108
1109 /*
1110 * Wrapper for mtip_handle_irq
1111 * (ignores return code)
1112 */
1113 static void mtip_tasklet(unsigned long data)
1114 {
1115 mtip_handle_irq((struct driver_data *) data);
1116 }
1117
1118 /*
1119 * HBA interrupt subroutine.
1120 *
1121 * @irq IRQ number.
1122 * @instance Pointer to the driver data structure.
1123 *
1124 * return value
1125 * IRQ_HANDLED A HBA interrupt was pending and handled.
1126 * IRQ_NONE This interrupt was not for the HBA.
1127 */
1128 static irqreturn_t mtip_irq_handler(int irq, void *instance)
1129 {
1130 struct driver_data *dd = instance;
1131 tasklet_schedule(&dd->tasklet);
1132 return IRQ_HANDLED;
1133 }
1134
1135 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
1136 {
1137 atomic_set(&port->commands[tag].active, 1);
1138 writel(1 << MTIP_TAG_BIT(tag),
1139 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
1140 }
1141
1142 static bool mtip_pause_ncq(struct mtip_port *port,
1143 struct host_to_dev_fis *fis)
1144 {
1145 struct host_to_dev_fis *reply;
1146 unsigned long task_file_data;
1147
1148 reply = port->rxfis + RX_FIS_D2H_REG;
1149 task_file_data = readl(port->mmio+PORT_TFDATA);
1150
1151 if ((task_file_data & 1) || (fis->command == ATA_CMD_SEC_ERASE_UNIT))
1152 return false;
1153
1154 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
1155 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1156 port->ic_pause_timer = jiffies;
1157 return true;
1158 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
1159 (fis->features == 0x03)) {
1160 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1161 port->ic_pause_timer = jiffies;
1162 return true;
1163 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
1164 ((fis->command == 0xFC) &&
1165 (fis->features == 0x27 || fis->features == 0x72 ||
1166 fis->features == 0x62 || fis->features == 0x26))) {
1167 /* Com reset after secure erase or lowlevel format */
1168 mtip_restart_port(port);
1169 return false;
1170 }
1171
1172 return false;
1173 }
1174
1175 /*
1176 * Wait for port to quiesce
1177 *
1178 * @port Pointer to port data structure
1179 * @timeout Max duration to wait (ms)
1180 *
1181 * return value
1182 * 0 Success
1183 * -EBUSY Commands still active
1184 */
1185 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
1186 {
1187 unsigned long to;
1188 unsigned int n;
1189 unsigned int active = 1;
1190
1191 to = jiffies + msecs_to_jiffies(timeout);
1192 do {
1193 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
1194 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
1195 msleep(20);
1196 continue; /* svc thd is actively issuing commands */
1197 }
1198 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1199 return -EFAULT;
1200 /*
1201 * Ignore s_active bit 0 of array element 0.
1202 * This bit will always be set
1203 */
1204 active = readl(port->s_active[0]) & 0xFFFFFFFE;
1205 for (n = 1; n < port->dd->slot_groups; n++)
1206 active |= readl(port->s_active[n]);
1207
1208 if (!active)
1209 break;
1210
1211 msleep(20);
1212 } while (time_before(jiffies, to));
1213
1214 return active ? -EBUSY : 0;
1215 }
1216
1217 /*
1218 * Execute an internal command and wait for the completion.
1219 *
1220 * @port Pointer to the port data structure.
1221 * @fis Pointer to the FIS that describes the command.
1222 * @fis_len Length in WORDS of the FIS.
1223 * @buffer DMA accessible for command data.
1224 * @buf_len Length, in bytes, of the data buffer.
1225 * @opts Command header options, excluding the FIS length
1226 * and the number of PRD entries.
1227 * @timeout Time in ms to wait for the command to complete.
1228 *
1229 * return value
1230 * 0 Command completed successfully.
1231 * -EFAULT The buffer address is not correctly aligned.
1232 * -EBUSY Internal command or other IO in progress.
1233 * -EAGAIN Time out waiting for command to complete.
1234 */
1235 static int mtip_exec_internal_command(struct mtip_port *port,
1236 struct host_to_dev_fis *fis,
1237 int fis_len,
1238 dma_addr_t buffer,
1239 int buf_len,
1240 u32 opts,
1241 gfp_t atomic,
1242 unsigned long timeout)
1243 {
1244 struct mtip_cmd_sg *command_sg;
1245 DECLARE_COMPLETION_ONSTACK(wait);
1246 int rv = 0, ready2go = 1;
1247 struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL];
1248 unsigned long to;
1249
1250 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1251 if (buffer & 0x00000007) {
1252 dev_err(&port->dd->pdev->dev,
1253 "SG buffer is not 8 byte aligned\n");
1254 return -EFAULT;
1255 }
1256
1257 to = jiffies + msecs_to_jiffies(timeout);
1258 do {
1259 ready2go = !test_and_set_bit(MTIP_TAG_INTERNAL,
1260 port->allocated);
1261 if (ready2go)
1262 break;
1263 mdelay(100);
1264 } while (time_before(jiffies, to));
1265 if (!ready2go) {
1266 dev_warn(&port->dd->pdev->dev,
1267 "Internal cmd active. new cmd [%02X]\n", fis->command);
1268 return -EBUSY;
1269 }
1270 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1271 port->ic_pause_timer = 0;
1272
1273 if (fis->command == ATA_CMD_SEC_ERASE_UNIT)
1274 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1275 else if (fis->command == ATA_CMD_DOWNLOAD_MICRO)
1276 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1277
1278 if (atomic == GFP_KERNEL) {
1279 if (fis->command != ATA_CMD_STANDBYNOW1) {
1280 /* wait for io to complete if non atomic */
1281 if (mtip_quiesce_io(port, 5000) < 0) {
1282 dev_warn(&port->dd->pdev->dev,
1283 "Failed to quiesce IO\n");
1284 release_slot(port, MTIP_TAG_INTERNAL);
1285 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1286 wake_up_interruptible(&port->svc_wait);
1287 return -EBUSY;
1288 }
1289 }
1290
1291 /* Set the completion function and data for the command. */
1292 int_cmd->comp_data = &wait;
1293 int_cmd->comp_func = mtip_completion;
1294
1295 } else {
1296 /* Clear completion - we're going to poll */
1297 int_cmd->comp_data = NULL;
1298 int_cmd->comp_func = mtip_null_completion;
1299 }
1300
1301 /* Copy the command to the command table */
1302 memcpy(int_cmd->command, fis, fis_len*4);
1303
1304 /* Populate the SG list */
1305 int_cmd->command_header->opts =
1306 __force_bit2int cpu_to_le32(opts | fis_len);
1307 if (buf_len) {
1308 command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ;
1309
1310 command_sg->info =
1311 __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF);
1312 command_sg->dba =
1313 __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF);
1314 command_sg->dba_upper =
1315 __force_bit2int cpu_to_le32((buffer >> 16) >> 16);
1316
1317 int_cmd->command_header->opts |=
1318 __force_bit2int cpu_to_le32((1 << 16));
1319 }
1320
1321 /* Populate the command header */
1322 int_cmd->command_header->byte_count = 0;
1323
1324 /* Issue the command to the hardware */
1325 mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1326
1327 /* Poll if atomic, wait_for_completion otherwise */
1328 if (atomic == GFP_KERNEL) {
1329 /* Wait for the command to complete or timeout. */
1330 if (wait_for_completion_timeout(
1331 &wait,
1332 msecs_to_jiffies(timeout)) == 0) {
1333 dev_err(&port->dd->pdev->dev,
1334 "Internal command did not complete [%d] "
1335 "within timeout of %lu ms\n",
1336 atomic, timeout);
1337 if (mtip_check_surprise_removal(port->dd->pdev) ||
1338 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1339 &port->dd->dd_flag)) {
1340 rv = -ENXIO;
1341 goto exec_ic_exit;
1342 }
1343 rv = -EAGAIN;
1344 }
1345 } else {
1346 /* Spin for <timeout> checking if command still outstanding */
1347 timeout = jiffies + msecs_to_jiffies(timeout);
1348 while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1349 & (1 << MTIP_TAG_INTERNAL))
1350 && time_before(jiffies, timeout)) {
1351 if (mtip_check_surprise_removal(port->dd->pdev)) {
1352 rv = -ENXIO;
1353 goto exec_ic_exit;
1354 }
1355 if ((fis->command != ATA_CMD_STANDBYNOW1) &&
1356 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1357 &port->dd->dd_flag)) {
1358 rv = -ENXIO;
1359 goto exec_ic_exit;
1360 }
1361 if (readl(port->mmio + PORT_IRQ_STAT) & PORT_IRQ_ERR) {
1362 atomic_inc(&int_cmd->active); /* error */
1363 break;
1364 }
1365 }
1366 }
1367
1368 if (atomic_read(&int_cmd->active) > 1) {
1369 dev_err(&port->dd->pdev->dev,
1370 "Internal command [%02X] failed\n", fis->command);
1371 rv = -EIO;
1372 }
1373 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1374 & (1 << MTIP_TAG_INTERNAL)) {
1375 rv = -ENXIO;
1376 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1377 &port->dd->dd_flag)) {
1378 mtip_restart_port(port);
1379 rv = -EAGAIN;
1380 }
1381 }
1382 exec_ic_exit:
1383 /* Clear the allocated and active bits for the internal command. */
1384 atomic_set(&int_cmd->active, 0);
1385 release_slot(port, MTIP_TAG_INTERNAL);
1386 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1387 /* NCQ paused */
1388 return rv;
1389 }
1390 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1391 wake_up_interruptible(&port->svc_wait);
1392
1393 return rv;
1394 }
1395
1396 /*
1397 * Byte-swap ATA ID strings.
1398 *
1399 * ATA identify data contains strings in byte-swapped 16-bit words.
1400 * They must be swapped (on all architectures) to be usable as C strings.
1401 * This function swaps bytes in-place.
1402 *
1403 * @buf The buffer location of the string
1404 * @len The number of bytes to swap
1405 *
1406 * return value
1407 * None
1408 */
1409 static inline void ata_swap_string(u16 *buf, unsigned int len)
1410 {
1411 int i;
1412 for (i = 0; i < (len/2); i++)
1413 be16_to_cpus(&buf[i]);
1414 }
1415
1416 /*
1417 * Request the device identity information.
1418 *
1419 * If a user space buffer is not specified, i.e. is NULL, the
1420 * identify information is still read from the drive and placed
1421 * into the identify data buffer (@e port->identify) in the
1422 * port data structure.
1423 * When the identify buffer contains valid identify information @e
1424 * port->identify_valid is non-zero.
1425 *
1426 * @port Pointer to the port structure.
1427 * @user_buffer A user space buffer where the identify data should be
1428 * copied.
1429 *
1430 * return value
1431 * 0 Command completed successfully.
1432 * -EFAULT An error occurred while coping data to the user buffer.
1433 * -1 Command failed.
1434 */
1435 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1436 {
1437 int rv = 0;
1438 struct host_to_dev_fis fis;
1439
1440 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1441 return -EFAULT;
1442
1443 /* Build the FIS. */
1444 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1445 fis.type = 0x27;
1446 fis.opts = 1 << 7;
1447 fis.command = ATA_CMD_ID_ATA;
1448
1449 /* Set the identify information as invalid. */
1450 port->identify_valid = 0;
1451
1452 /* Clear the identify information. */
1453 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1454
1455 /* Execute the command. */
1456 if (mtip_exec_internal_command(port,
1457 &fis,
1458 5,
1459 port->identify_dma,
1460 sizeof(u16) * ATA_ID_WORDS,
1461 0,
1462 GFP_KERNEL,
1463 MTIP_INTERNAL_COMMAND_TIMEOUT_MS)
1464 < 0) {
1465 rv = -1;
1466 goto out;
1467 }
1468
1469 /*
1470 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1471 * perform field-sensitive swapping on the string fields.
1472 * See the kernel use of ata_id_string() for proof of this.
1473 */
1474 #ifdef __LITTLE_ENDIAN
1475 ata_swap_string(port->identify + 27, 40); /* model string*/
1476 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1477 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1478 #else
1479 {
1480 int i;
1481 for (i = 0; i < ATA_ID_WORDS; i++)
1482 port->identify[i] = le16_to_cpu(port->identify[i]);
1483 }
1484 #endif
1485
1486 /* Set the identify buffer as valid. */
1487 port->identify_valid = 1;
1488
1489 if (user_buffer) {
1490 if (copy_to_user(
1491 user_buffer,
1492 port->identify,
1493 ATA_ID_WORDS * sizeof(u16))) {
1494 rv = -EFAULT;
1495 goto out;
1496 }
1497 }
1498
1499 out:
1500 return rv;
1501 }
1502
1503 /*
1504 * Issue a standby immediate command to the device.
1505 *
1506 * @port Pointer to the port structure.
1507 *
1508 * return value
1509 * 0 Command was executed successfully.
1510 * -1 An error occurred while executing the command.
1511 */
1512 static int mtip_standby_immediate(struct mtip_port *port)
1513 {
1514 int rv;
1515 struct host_to_dev_fis fis;
1516 unsigned long start;
1517
1518 /* Build the FIS. */
1519 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1520 fis.type = 0x27;
1521 fis.opts = 1 << 7;
1522 fis.command = ATA_CMD_STANDBYNOW1;
1523
1524 start = jiffies;
1525 rv = mtip_exec_internal_command(port,
1526 &fis,
1527 5,
1528 0,
1529 0,
1530 0,
1531 GFP_ATOMIC,
1532 15000);
1533 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1534 jiffies_to_msecs(jiffies - start));
1535 if (rv)
1536 dev_warn(&port->dd->pdev->dev,
1537 "STANDBY IMMEDIATE command failed.\n");
1538
1539 return rv;
1540 }
1541
1542 /*
1543 * Issue a READ LOG EXT command to the device.
1544 *
1545 * @port pointer to the port structure.
1546 * @page page number to fetch
1547 * @buffer pointer to buffer
1548 * @buffer_dma dma address corresponding to @buffer
1549 * @sectors page length to fetch, in sectors
1550 *
1551 * return value
1552 * @rv return value from mtip_exec_internal_command()
1553 */
1554 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1555 dma_addr_t buffer_dma, unsigned int sectors)
1556 {
1557 struct host_to_dev_fis fis;
1558
1559 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1560 fis.type = 0x27;
1561 fis.opts = 1 << 7;
1562 fis.command = ATA_CMD_READ_LOG_EXT;
1563 fis.sect_count = sectors & 0xFF;
1564 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1565 fis.lba_low = page;
1566 fis.lba_mid = 0;
1567 fis.device = ATA_DEVICE_OBS;
1568
1569 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1570
1571 return mtip_exec_internal_command(port,
1572 &fis,
1573 5,
1574 buffer_dma,
1575 sectors * ATA_SECT_SIZE,
1576 0,
1577 GFP_ATOMIC,
1578 MTIP_INTERNAL_COMMAND_TIMEOUT_MS);
1579 }
1580
1581 /*
1582 * Issue a SMART READ DATA command to the device.
1583 *
1584 * @port pointer to the port structure.
1585 * @buffer pointer to buffer
1586 * @buffer_dma dma address corresponding to @buffer
1587 *
1588 * return value
1589 * @rv return value from mtip_exec_internal_command()
1590 */
1591 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1592 dma_addr_t buffer_dma)
1593 {
1594 struct host_to_dev_fis fis;
1595
1596 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1597 fis.type = 0x27;
1598 fis.opts = 1 << 7;
1599 fis.command = ATA_CMD_SMART;
1600 fis.features = 0xD0;
1601 fis.sect_count = 1;
1602 fis.lba_mid = 0x4F;
1603 fis.lba_hi = 0xC2;
1604 fis.device = ATA_DEVICE_OBS;
1605
1606 return mtip_exec_internal_command(port,
1607 &fis,
1608 5,
1609 buffer_dma,
1610 ATA_SECT_SIZE,
1611 0,
1612 GFP_ATOMIC,
1613 15000);
1614 }
1615
1616 /*
1617 * Get the value of a smart attribute
1618 *
1619 * @port pointer to the port structure
1620 * @id attribute number
1621 * @attrib pointer to return attrib information corresponding to @id
1622 *
1623 * return value
1624 * -EINVAL NULL buffer passed or unsupported attribute @id.
1625 * -EPERM Identify data not valid, SMART not supported or not enabled
1626 */
1627 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1628 struct smart_attr *attrib)
1629 {
1630 int rv, i;
1631 struct smart_attr *pattr;
1632
1633 if (!attrib)
1634 return -EINVAL;
1635
1636 if (!port->identify_valid) {
1637 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1638 return -EPERM;
1639 }
1640 if (!(port->identify[82] & 0x1)) {
1641 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1642 return -EPERM;
1643 }
1644 if (!(port->identify[85] & 0x1)) {
1645 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1646 return -EPERM;
1647 }
1648
1649 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1650 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1651 if (rv) {
1652 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1653 return rv;
1654 }
1655
1656 pattr = (struct smart_attr *)(port->smart_buf + 2);
1657 for (i = 0; i < 29; i++, pattr++)
1658 if (pattr->attr_id == id) {
1659 memcpy(attrib, pattr, sizeof(struct smart_attr));
1660 break;
1661 }
1662
1663 if (i == 29) {
1664 dev_warn(&port->dd->pdev->dev,
1665 "Query for invalid SMART attribute ID\n");
1666 rv = -EINVAL;
1667 }
1668
1669 return rv;
1670 }
1671
1672 /*
1673 * Get the drive capacity.
1674 *
1675 * @dd Pointer to the device data structure.
1676 * @sectors Pointer to the variable that will receive the sector count.
1677 *
1678 * return value
1679 * 1 Capacity was returned successfully.
1680 * 0 The identify information is invalid.
1681 */
1682 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1683 {
1684 struct mtip_port *port = dd->port;
1685 u64 total, raw0, raw1, raw2, raw3;
1686 raw0 = port->identify[100];
1687 raw1 = port->identify[101];
1688 raw2 = port->identify[102];
1689 raw3 = port->identify[103];
1690 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1691 *sectors = total;
1692 return (bool) !!port->identify_valid;
1693 }
1694
1695 /*
1696 * Reset the HBA.
1697 *
1698 * Resets the HBA by setting the HBA Reset bit in the Global
1699 * HBA Control register. After setting the HBA Reset bit the
1700 * function waits for 1 second before reading the HBA Reset
1701 * bit to make sure it has cleared. If HBA Reset is not clear
1702 * an error is returned. Cannot be used in non-blockable
1703 * context.
1704 *
1705 * @dd Pointer to the driver data structure.
1706 *
1707 * return value
1708 * 0 The reset was successful.
1709 * -1 The HBA Reset bit did not clear.
1710 */
1711 static int mtip_hba_reset(struct driver_data *dd)
1712 {
1713 mtip_deinit_port(dd->port);
1714
1715 /* Set the reset bit */
1716 writel(HOST_RESET, dd->mmio + HOST_CTL);
1717
1718 /* Flush */
1719 readl(dd->mmio + HOST_CTL);
1720
1721 /* Wait for reset to clear */
1722 ssleep(1);
1723
1724 /* Check the bit has cleared */
1725 if (readl(dd->mmio + HOST_CTL) & HOST_RESET) {
1726 dev_err(&dd->pdev->dev,
1727 "Reset bit did not clear.\n");
1728 return -1;
1729 }
1730
1731 return 0;
1732 }
1733
1734 /*
1735 * Display the identify command data.
1736 *
1737 * @port Pointer to the port data structure.
1738 *
1739 * return value
1740 * None
1741 */
1742 static void mtip_dump_identify(struct mtip_port *port)
1743 {
1744 sector_t sectors;
1745 unsigned short revid;
1746 char cbuf[42];
1747
1748 if (!port->identify_valid)
1749 return;
1750
1751 strlcpy(cbuf, (char *)(port->identify+10), 21);
1752 dev_info(&port->dd->pdev->dev,
1753 "Serial No.: %s\n", cbuf);
1754
1755 strlcpy(cbuf, (char *)(port->identify+23), 9);
1756 dev_info(&port->dd->pdev->dev,
1757 "Firmware Ver.: %s\n", cbuf);
1758
1759 strlcpy(cbuf, (char *)(port->identify+27), 41);
1760 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1761
1762 if (mtip_hw_get_capacity(port->dd, &sectors))
1763 dev_info(&port->dd->pdev->dev,
1764 "Capacity: %llu sectors (%llu MB)\n",
1765 (u64)sectors,
1766 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1767
1768 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1769 switch (revid & 0xFF) {
1770 case 0x1:
1771 strlcpy(cbuf, "A0", 3);
1772 break;
1773 case 0x3:
1774 strlcpy(cbuf, "A2", 3);
1775 break;
1776 default:
1777 strlcpy(cbuf, "?", 2);
1778 break;
1779 }
1780 dev_info(&port->dd->pdev->dev,
1781 "Card Type: %s\n", cbuf);
1782 }
1783
1784 /*
1785 * Map the commands scatter list into the command table.
1786 *
1787 * @command Pointer to the command.
1788 * @nents Number of scatter list entries.
1789 *
1790 * return value
1791 * None
1792 */
1793 static inline void fill_command_sg(struct driver_data *dd,
1794 struct mtip_cmd *command,
1795 int nents)
1796 {
1797 int n;
1798 unsigned int dma_len;
1799 struct mtip_cmd_sg *command_sg;
1800 struct scatterlist *sg = command->sg;
1801
1802 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1803
1804 for (n = 0; n < nents; n++) {
1805 dma_len = sg_dma_len(sg);
1806 if (dma_len > 0x400000)
1807 dev_err(&dd->pdev->dev,
1808 "DMA segment length truncated\n");
1809 command_sg->info = __force_bit2int
1810 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1811 command_sg->dba = __force_bit2int
1812 cpu_to_le32(sg_dma_address(sg));
1813 command_sg->dba_upper = __force_bit2int
1814 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1815 command_sg++;
1816 sg++;
1817 }
1818 }
1819
1820 /*
1821 * @brief Execute a drive command.
1822 *
1823 * return value 0 The command completed successfully.
1824 * return value -1 An error occurred while executing the command.
1825 */
1826 static int exec_drive_task(struct mtip_port *port, u8 *command)
1827 {
1828 struct host_to_dev_fis fis;
1829 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1830
1831 /* Build the FIS. */
1832 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1833 fis.type = 0x27;
1834 fis.opts = 1 << 7;
1835 fis.command = command[0];
1836 fis.features = command[1];
1837 fis.sect_count = command[2];
1838 fis.sector = command[3];
1839 fis.cyl_low = command[4];
1840 fis.cyl_hi = command[5];
1841 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1842
1843 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1844 __func__,
1845 command[0],
1846 command[1],
1847 command[2],
1848 command[3],
1849 command[4],
1850 command[5],
1851 command[6]);
1852
1853 /* Execute the command. */
1854 if (mtip_exec_internal_command(port,
1855 &fis,
1856 5,
1857 0,
1858 0,
1859 0,
1860 GFP_KERNEL,
1861 MTIP_IOCTL_COMMAND_TIMEOUT_MS) < 0) {
1862 return -1;
1863 }
1864
1865 command[0] = reply->command; /* Status*/
1866 command[1] = reply->features; /* Error*/
1867 command[4] = reply->cyl_low;
1868 command[5] = reply->cyl_hi;
1869
1870 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1871 __func__,
1872 command[0],
1873 command[1],
1874 command[4],
1875 command[5]);
1876
1877 return 0;
1878 }
1879
1880 /*
1881 * @brief Execute a drive command.
1882 *
1883 * @param port Pointer to the port data structure.
1884 * @param command Pointer to the user specified command parameters.
1885 * @param user_buffer Pointer to the user space buffer where read sector
1886 * data should be copied.
1887 *
1888 * return value 0 The command completed successfully.
1889 * return value -EFAULT An error occurred while copying the completion
1890 * data to the user space buffer.
1891 * return value -1 An error occurred while executing the command.
1892 */
1893 static int exec_drive_command(struct mtip_port *port, u8 *command,
1894 void __user *user_buffer)
1895 {
1896 struct host_to_dev_fis fis;
1897 struct host_to_dev_fis *reply;
1898 u8 *buf = NULL;
1899 dma_addr_t dma_addr = 0;
1900 int rv = 0, xfer_sz = command[3];
1901
1902 if (xfer_sz) {
1903 if (user_buffer)
1904 return -EFAULT;
1905
1906 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
1907 ATA_SECT_SIZE * xfer_sz,
1908 &dma_addr,
1909 GFP_KERNEL);
1910 if (!buf) {
1911 dev_err(&port->dd->pdev->dev,
1912 "Memory allocation failed (%d bytes)\n",
1913 ATA_SECT_SIZE * xfer_sz);
1914 return -ENOMEM;
1915 }
1916 memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
1917 }
1918
1919 /* Build the FIS. */
1920 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1921 fis.type = 0x27;
1922 fis.opts = 1 << 7;
1923 fis.command = command[0];
1924 fis.features = command[2];
1925 fis.sect_count = command[3];
1926 if (fis.command == ATA_CMD_SMART) {
1927 fis.sector = command[1];
1928 fis.cyl_low = 0x4F;
1929 fis.cyl_hi = 0xC2;
1930 }
1931
1932 if (xfer_sz)
1933 reply = (port->rxfis + RX_FIS_PIO_SETUP);
1934 else
1935 reply = (port->rxfis + RX_FIS_D2H_REG);
1936
1937 dbg_printk(MTIP_DRV_NAME
1938 " %s: User Command: cmd %x, sect %x, "
1939 "feat %x, sectcnt %x\n",
1940 __func__,
1941 command[0],
1942 command[1],
1943 command[2],
1944 command[3]);
1945
1946 /* Execute the command. */
1947 if (mtip_exec_internal_command(port,
1948 &fis,
1949 5,
1950 (xfer_sz ? dma_addr : 0),
1951 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
1952 0,
1953 GFP_KERNEL,
1954 MTIP_IOCTL_COMMAND_TIMEOUT_MS)
1955 < 0) {
1956 rv = -EFAULT;
1957 goto exit_drive_command;
1958 }
1959
1960 /* Collect the completion status. */
1961 command[0] = reply->command; /* Status*/
1962 command[1] = reply->features; /* Error*/
1963 command[2] = reply->sect_count;
1964
1965 dbg_printk(MTIP_DRV_NAME
1966 " %s: Completion Status: stat %x, "
1967 "err %x, nsect %x\n",
1968 __func__,
1969 command[0],
1970 command[1],
1971 command[2]);
1972
1973 if (xfer_sz) {
1974 if (copy_to_user(user_buffer,
1975 buf,
1976 ATA_SECT_SIZE * command[3])) {
1977 rv = -EFAULT;
1978 goto exit_drive_command;
1979 }
1980 }
1981 exit_drive_command:
1982 if (buf)
1983 dmam_free_coherent(&port->dd->pdev->dev,
1984 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1985 return rv;
1986 }
1987
1988 /*
1989 * Indicates whether a command has a single sector payload.
1990 *
1991 * @command passed to the device to perform the certain event.
1992 * @features passed to the device to perform the certain event.
1993 *
1994 * return value
1995 * 1 command is one that always has a single sector payload,
1996 * regardless of the value in the Sector Count field.
1997 * 0 otherwise
1998 *
1999 */
2000 static unsigned int implicit_sector(unsigned char command,
2001 unsigned char features)
2002 {
2003 unsigned int rv = 0;
2004
2005 /* list of commands that have an implicit sector count of 1 */
2006 switch (command) {
2007 case ATA_CMD_SEC_SET_PASS:
2008 case ATA_CMD_SEC_UNLOCK:
2009 case ATA_CMD_SEC_ERASE_PREP:
2010 case ATA_CMD_SEC_ERASE_UNIT:
2011 case ATA_CMD_SEC_FREEZE_LOCK:
2012 case ATA_CMD_SEC_DISABLE_PASS:
2013 case ATA_CMD_PMP_READ:
2014 case ATA_CMD_PMP_WRITE:
2015 rv = 1;
2016 break;
2017 case ATA_CMD_SET_MAX:
2018 if (features == ATA_SET_MAX_UNLOCK)
2019 rv = 1;
2020 break;
2021 case ATA_CMD_SMART:
2022 if ((features == ATA_SMART_READ_VALUES) ||
2023 (features == ATA_SMART_READ_THRESHOLDS))
2024 rv = 1;
2025 break;
2026 case ATA_CMD_CONF_OVERLAY:
2027 if ((features == ATA_DCO_IDENTIFY) ||
2028 (features == ATA_DCO_SET))
2029 rv = 1;
2030 break;
2031 }
2032 return rv;
2033 }
2034
2035 static void mtip_set_timeout(struct host_to_dev_fis *fis, unsigned int *timeout)
2036 {
2037 switch (fis->command) {
2038 case ATA_CMD_DOWNLOAD_MICRO:
2039 *timeout = 120000; /* 2 minutes */
2040 break;
2041 case ATA_CMD_SEC_ERASE_UNIT:
2042 case 0xFC:
2043 *timeout = 240000; /* 4 minutes */
2044 break;
2045 case ATA_CMD_STANDBYNOW1:
2046 *timeout = 10000; /* 10 seconds */
2047 break;
2048 case 0xF7:
2049 case 0xFA:
2050 *timeout = 60000; /* 60 seconds */
2051 break;
2052 case ATA_CMD_SMART:
2053 *timeout = 15000; /* 15 seconds */
2054 break;
2055 default:
2056 *timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS;
2057 break;
2058 }
2059 }
2060
2061 /*
2062 * Executes a taskfile
2063 * See ide_taskfile_ioctl() for derivation
2064 */
2065 static int exec_drive_taskfile(struct driver_data *dd,
2066 void __user *buf,
2067 ide_task_request_t *req_task,
2068 int outtotal)
2069 {
2070 struct host_to_dev_fis fis;
2071 struct host_to_dev_fis *reply;
2072 u8 *outbuf = NULL;
2073 u8 *inbuf = NULL;
2074 dma_addr_t outbuf_dma = 0;
2075 dma_addr_t inbuf_dma = 0;
2076 dma_addr_t dma_buffer = 0;
2077 int err = 0;
2078 unsigned int taskin = 0;
2079 unsigned int taskout = 0;
2080 u8 nsect = 0;
2081 unsigned int timeout;
2082 unsigned int force_single_sector;
2083 unsigned int transfer_size;
2084 unsigned long task_file_data;
2085 int intotal = outtotal + req_task->out_size;
2086
2087 taskout = req_task->out_size;
2088 taskin = req_task->in_size;
2089 /* 130560 = 512 * 0xFF*/
2090 if (taskin > 130560 || taskout > 130560) {
2091 err = -EINVAL;
2092 goto abort;
2093 }
2094
2095 if (taskout) {
2096 outbuf = kzalloc(taskout, GFP_KERNEL);
2097 if (outbuf == NULL) {
2098 err = -ENOMEM;
2099 goto abort;
2100 }
2101 if (copy_from_user(outbuf, buf + outtotal, taskout)) {
2102 err = -EFAULT;
2103 goto abort;
2104 }
2105 outbuf_dma = pci_map_single(dd->pdev,
2106 outbuf,
2107 taskout,
2108 DMA_TO_DEVICE);
2109 if (outbuf_dma == 0) {
2110 err = -ENOMEM;
2111 goto abort;
2112 }
2113 dma_buffer = outbuf_dma;
2114 }
2115
2116 if (taskin) {
2117 inbuf = kzalloc(taskin, GFP_KERNEL);
2118 if (inbuf == NULL) {
2119 err = -ENOMEM;
2120 goto abort;
2121 }
2122
2123 if (copy_from_user(inbuf, buf + intotal, taskin)) {
2124 err = -EFAULT;
2125 goto abort;
2126 }
2127 inbuf_dma = pci_map_single(dd->pdev,
2128 inbuf,
2129 taskin, DMA_FROM_DEVICE);
2130 if (inbuf_dma == 0) {
2131 err = -ENOMEM;
2132 goto abort;
2133 }
2134 dma_buffer = inbuf_dma;
2135 }
2136
2137 /* only supports PIO and non-data commands from this ioctl. */
2138 switch (req_task->data_phase) {
2139 case TASKFILE_OUT:
2140 nsect = taskout / ATA_SECT_SIZE;
2141 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2142 break;
2143 case TASKFILE_IN:
2144 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2145 break;
2146 case TASKFILE_NO_DATA:
2147 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2148 break;
2149 default:
2150 err = -EINVAL;
2151 goto abort;
2152 }
2153
2154 /* Build the FIS. */
2155 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2156
2157 fis.type = 0x27;
2158 fis.opts = 1 << 7;
2159 fis.command = req_task->io_ports[7];
2160 fis.features = req_task->io_ports[1];
2161 fis.sect_count = req_task->io_ports[2];
2162 fis.lba_low = req_task->io_ports[3];
2163 fis.lba_mid = req_task->io_ports[4];
2164 fis.lba_hi = req_task->io_ports[5];
2165 /* Clear the dev bit*/
2166 fis.device = req_task->io_ports[6] & ~0x10;
2167
2168 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
2169 req_task->in_flags.all =
2170 IDE_TASKFILE_STD_IN_FLAGS |
2171 (IDE_HOB_STD_IN_FLAGS << 8);
2172 fis.lba_low_ex = req_task->hob_ports[3];
2173 fis.lba_mid_ex = req_task->hob_ports[4];
2174 fis.lba_hi_ex = req_task->hob_ports[5];
2175 fis.features_ex = req_task->hob_ports[1];
2176 fis.sect_cnt_ex = req_task->hob_ports[2];
2177
2178 } else {
2179 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
2180 }
2181
2182 force_single_sector = implicit_sector(fis.command, fis.features);
2183
2184 if ((taskin || taskout) && (!fis.sect_count)) {
2185 if (nsect)
2186 fis.sect_count = nsect;
2187 else {
2188 if (!force_single_sector) {
2189 dev_warn(&dd->pdev->dev,
2190 "data movement but "
2191 "sect_count is 0\n");
2192 err = -EINVAL;
2193 goto abort;
2194 }
2195 }
2196 }
2197
2198 dbg_printk(MTIP_DRV_NAME
2199 " %s: cmd %x, feat %x, nsect %x,"
2200 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
2201 " head/dev %x\n",
2202 __func__,
2203 fis.command,
2204 fis.features,
2205 fis.sect_count,
2206 fis.lba_low,
2207 fis.lba_mid,
2208 fis.lba_hi,
2209 fis.device);
2210
2211 mtip_set_timeout(&fis, &timeout);
2212
2213 /* Determine the correct transfer size.*/
2214 if (force_single_sector)
2215 transfer_size = ATA_SECT_SIZE;
2216 else
2217 transfer_size = ATA_SECT_SIZE * fis.sect_count;
2218
2219 /* Execute the command.*/
2220 if (mtip_exec_internal_command(dd->port,
2221 &fis,
2222 5,
2223 dma_buffer,
2224 transfer_size,
2225 0,
2226 GFP_KERNEL,
2227 timeout) < 0) {
2228 err = -EIO;
2229 goto abort;
2230 }
2231
2232 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2233
2234 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2235 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2236 req_task->io_ports[7] = reply->control;
2237 } else {
2238 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2239 req_task->io_ports[7] = reply->command;
2240 }
2241
2242 /* reclaim the DMA buffers.*/
2243 if (inbuf_dma)
2244 pci_unmap_single(dd->pdev, inbuf_dma,
2245 taskin, DMA_FROM_DEVICE);
2246 if (outbuf_dma)
2247 pci_unmap_single(dd->pdev, outbuf_dma,
2248 taskout, DMA_TO_DEVICE);
2249 inbuf_dma = 0;
2250 outbuf_dma = 0;
2251
2252 /* return the ATA registers to the caller.*/
2253 req_task->io_ports[1] = reply->features;
2254 req_task->io_ports[2] = reply->sect_count;
2255 req_task->io_ports[3] = reply->lba_low;
2256 req_task->io_ports[4] = reply->lba_mid;
2257 req_task->io_ports[5] = reply->lba_hi;
2258 req_task->io_ports[6] = reply->device;
2259
2260 if (req_task->out_flags.all & 1) {
2261
2262 req_task->hob_ports[3] = reply->lba_low_ex;
2263 req_task->hob_ports[4] = reply->lba_mid_ex;
2264 req_task->hob_ports[5] = reply->lba_hi_ex;
2265 req_task->hob_ports[1] = reply->features_ex;
2266 req_task->hob_ports[2] = reply->sect_cnt_ex;
2267 }
2268 dbg_printk(MTIP_DRV_NAME
2269 " %s: Completion: stat %x,"
2270 "err %x, sect_cnt %x, lbalo %x,"
2271 "lbamid %x, lbahi %x, dev %x\n",
2272 __func__,
2273 req_task->io_ports[7],
2274 req_task->io_ports[1],
2275 req_task->io_ports[2],
2276 req_task->io_ports[3],
2277 req_task->io_ports[4],
2278 req_task->io_ports[5],
2279 req_task->io_ports[6]);
2280
2281 if (taskout) {
2282 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2283 err = -EFAULT;
2284 goto abort;
2285 }
2286 }
2287 if (taskin) {
2288 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2289 err = -EFAULT;
2290 goto abort;
2291 }
2292 }
2293 abort:
2294 if (inbuf_dma)
2295 pci_unmap_single(dd->pdev, inbuf_dma,
2296 taskin, DMA_FROM_DEVICE);
2297 if (outbuf_dma)
2298 pci_unmap_single(dd->pdev, outbuf_dma,
2299 taskout, DMA_TO_DEVICE);
2300 kfree(outbuf);
2301 kfree(inbuf);
2302
2303 return err;
2304 }
2305
2306 /*
2307 * Handle IOCTL calls from the Block Layer.
2308 *
2309 * This function is called by the Block Layer when it receives an IOCTL
2310 * command that it does not understand. If the IOCTL command is not supported
2311 * this function returns -ENOTTY.
2312 *
2313 * @dd Pointer to the driver data structure.
2314 * @cmd IOCTL command passed from the Block Layer.
2315 * @arg IOCTL argument passed from the Block Layer.
2316 *
2317 * return value
2318 * 0 The IOCTL completed successfully.
2319 * -ENOTTY The specified command is not supported.
2320 * -EFAULT An error occurred copying data to a user space buffer.
2321 * -EIO An error occurred while executing the command.
2322 */
2323 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2324 unsigned long arg)
2325 {
2326 switch (cmd) {
2327 case HDIO_GET_IDENTITY:
2328 {
2329 if (copy_to_user((void __user *)arg, dd->port->identify,
2330 sizeof(u16) * ATA_ID_WORDS))
2331 return -EFAULT;
2332 break;
2333 }
2334 case HDIO_DRIVE_CMD:
2335 {
2336 u8 drive_command[4];
2337
2338 /* Copy the user command info to our buffer. */
2339 if (copy_from_user(drive_command,
2340 (void __user *) arg,
2341 sizeof(drive_command)))
2342 return -EFAULT;
2343
2344 /* Execute the drive command. */
2345 if (exec_drive_command(dd->port,
2346 drive_command,
2347 (void __user *) (arg+4)))
2348 return -EIO;
2349
2350 /* Copy the status back to the users buffer. */
2351 if (copy_to_user((void __user *) arg,
2352 drive_command,
2353 sizeof(drive_command)))
2354 return -EFAULT;
2355
2356 break;
2357 }
2358 case HDIO_DRIVE_TASK:
2359 {
2360 u8 drive_command[7];
2361
2362 /* Copy the user command info to our buffer. */
2363 if (copy_from_user(drive_command,
2364 (void __user *) arg,
2365 sizeof(drive_command)))
2366 return -EFAULT;
2367
2368 /* Execute the drive command. */
2369 if (exec_drive_task(dd->port, drive_command))
2370 return -EIO;
2371
2372 /* Copy the status back to the users buffer. */
2373 if (copy_to_user((void __user *) arg,
2374 drive_command,
2375 sizeof(drive_command)))
2376 return -EFAULT;
2377
2378 break;
2379 }
2380 case HDIO_DRIVE_TASKFILE: {
2381 ide_task_request_t req_task;
2382 int ret, outtotal;
2383
2384 if (copy_from_user(&req_task, (void __user *) arg,
2385 sizeof(req_task)))
2386 return -EFAULT;
2387
2388 outtotal = sizeof(req_task);
2389
2390 ret = exec_drive_taskfile(dd, (void __user *) arg,
2391 &req_task, outtotal);
2392
2393 if (copy_to_user((void __user *) arg, &req_task,
2394 sizeof(req_task)))
2395 return -EFAULT;
2396
2397 return ret;
2398 }
2399
2400 default:
2401 return -EINVAL;
2402 }
2403 return 0;
2404 }
2405
2406 /*
2407 * Submit an IO to the hw
2408 *
2409 * This function is called by the block layer to issue an io
2410 * to the device. Upon completion, the callback function will
2411 * be called with the data parameter passed as the callback data.
2412 *
2413 * @dd Pointer to the driver data structure.
2414 * @start First sector to read.
2415 * @nsect Number of sectors to read.
2416 * @nents Number of entries in scatter list for the read command.
2417 * @tag The tag of this read command.
2418 * @callback Pointer to the function that should be called
2419 * when the read completes.
2420 * @data Callback data passed to the callback function
2421 * when the read completes.
2422 * @dir Direction (read or write)
2423 *
2424 * return value
2425 * None
2426 */
2427 static void mtip_hw_submit_io(struct driver_data *dd, sector_t start,
2428 int nsect, int nents, int tag, void *callback,
2429 void *data, int dir)
2430 {
2431 struct host_to_dev_fis *fis;
2432 struct mtip_port *port = dd->port;
2433 struct mtip_cmd *command = &port->commands[tag];
2434 int dma_dir = (dir == READ) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2435
2436 /* Map the scatter list for DMA access */
2437 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2438
2439 command->scatter_ents = nents;
2440
2441 /*
2442 * The number of retries for this command before it is
2443 * reported as a failure to the upper layers.
2444 */
2445 command->retries = MTIP_MAX_RETRIES;
2446
2447 /* Fill out fis */
2448 fis = command->command;
2449 fis->type = 0x27;
2450 fis->opts = 1 << 7;
2451 fis->command =
2452 (dir == READ ? ATA_CMD_FPDMA_READ : ATA_CMD_FPDMA_WRITE);
2453 *((unsigned int *) &fis->lba_low) = (start & 0xFFFFFF);
2454 *((unsigned int *) &fis->lba_low_ex) = ((start >> 24) & 0xFFFFFF);
2455 fis->device = 1 << 6;
2456 fis->features = nsect & 0xFF;
2457 fis->features_ex = (nsect >> 8) & 0xFF;
2458 fis->sect_count = ((tag << 3) | (tag >> 5));
2459 fis->sect_cnt_ex = 0;
2460 fis->control = 0;
2461 fis->res2 = 0;
2462 fis->res3 = 0;
2463 fill_command_sg(dd, command, nents);
2464
2465 /* Populate the command header */
2466 command->command_header->opts =
2467 __force_bit2int cpu_to_le32(
2468 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
2469 command->command_header->byte_count = 0;
2470
2471 /*
2472 * Set the completion function and data for the command
2473 * within this layer.
2474 */
2475 command->comp_data = dd;
2476 command->comp_func = mtip_async_complete;
2477 command->direction = dma_dir;
2478
2479 /*
2480 * Set the completion function and data for the command passed
2481 * from the upper layer.
2482 */
2483 command->async_data = data;
2484 command->async_callback = callback;
2485
2486 /*
2487 * To prevent this command from being issued
2488 * if an internal command is in progress or error handling is active.
2489 */
2490 if (port->flags & MTIP_PF_PAUSE_IO) {
2491 set_bit(tag, port->cmds_to_issue);
2492 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2493 return;
2494 }
2495
2496 /* Issue the command to the hardware */
2497 mtip_issue_ncq_command(port, tag);
2498
2499 return;
2500 }
2501
2502 /*
2503 * Release a command slot.
2504 *
2505 * @dd Pointer to the driver data structure.
2506 * @tag Slot tag
2507 *
2508 * return value
2509 * None
2510 */
2511 static void mtip_hw_release_scatterlist(struct driver_data *dd, int tag)
2512 {
2513 release_slot(dd->port, tag);
2514 }
2515
2516 /*
2517 * Obtain a command slot and return its associated scatter list.
2518 *
2519 * @dd Pointer to the driver data structure.
2520 * @tag Pointer to an int that will receive the allocated command
2521 * slot tag.
2522 *
2523 * return value
2524 * Pointer to the scatter list for the allocated command slot
2525 * or NULL if no command slots are available.
2526 */
2527 static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd,
2528 int *tag)
2529 {
2530 /*
2531 * It is possible that, even with this semaphore, a thread
2532 * may think that no command slots are available. Therefore, we
2533 * need to make an attempt to get_slot().
2534 */
2535 down(&dd->port->cmd_slot);
2536 *tag = get_slot(dd->port);
2537
2538 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
2539 up(&dd->port->cmd_slot);
2540 return NULL;
2541 }
2542 if (unlikely(*tag < 0)) {
2543 up(&dd->port->cmd_slot);
2544 return NULL;
2545 }
2546
2547 return dd->port->commands[*tag].sg;
2548 }
2549
2550 /*
2551 * Sysfs status dump.
2552 *
2553 * @dev Pointer to the device structure, passed by the kernrel.
2554 * @attr Pointer to the device_attribute structure passed by the kernel.
2555 * @buf Pointer to the char buffer that will receive the stats info.
2556 *
2557 * return value
2558 * The size, in bytes, of the data copied into buf.
2559 */
2560 static ssize_t mtip_hw_show_status(struct device *dev,
2561 struct device_attribute *attr,
2562 char *buf)
2563 {
2564 struct driver_data *dd = dev_to_disk(dev)->private_data;
2565 int size = 0;
2566
2567 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2568 size += sprintf(buf, "%s", "thermal_shutdown\n");
2569 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2570 size += sprintf(buf, "%s", "write_protect\n");
2571 else
2572 size += sprintf(buf, "%s", "online\n");
2573
2574 return size;
2575 }
2576
2577 static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
2578
2579 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2580 size_t len, loff_t *offset)
2581 {
2582 struct driver_data *dd = (struct driver_data *)f->private_data;
2583 char buf[MTIP_DFS_MAX_BUF_SIZE];
2584 u32 group_allocated;
2585 int size = *offset;
2586 int n;
2587
2588 if (!len || size)
2589 return 0;
2590
2591 if (size < 0)
2592 return -EINVAL;
2593
2594 size += sprintf(&buf[size], "H/ S ACTive : [ 0x");
2595
2596 for (n = dd->slot_groups-1; n >= 0; n--)
2597 size += sprintf(&buf[size], "%08X ",
2598 readl(dd->port->s_active[n]));
2599
2600 size += sprintf(&buf[size], "]\n");
2601 size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2602
2603 for (n = dd->slot_groups-1; n >= 0; n--)
2604 size += sprintf(&buf[size], "%08X ",
2605 readl(dd->port->cmd_issue[n]));
2606
2607 size += sprintf(&buf[size], "]\n");
2608 size += sprintf(&buf[size], "H/ Completed : [ 0x");
2609
2610 for (n = dd->slot_groups-1; n >= 0; n--)
2611 size += sprintf(&buf[size], "%08X ",
2612 readl(dd->port->completed[n]));
2613
2614 size += sprintf(&buf[size], "]\n");
2615 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2616 readl(dd->port->mmio + PORT_IRQ_STAT));
2617 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2618 readl(dd->mmio + HOST_IRQ_STAT));
2619 size += sprintf(&buf[size], "\n");
2620
2621 size += sprintf(&buf[size], "L/ Allocated : [ 0x");
2622
2623 for (n = dd->slot_groups-1; n >= 0; n--) {
2624 if (sizeof(long) > sizeof(u32))
2625 group_allocated =
2626 dd->port->allocated[n/2] >> (32*(n&1));
2627 else
2628 group_allocated = dd->port->allocated[n];
2629 size += sprintf(&buf[size], "%08X ", group_allocated);
2630 }
2631 size += sprintf(&buf[size], "]\n");
2632
2633 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2634
2635 for (n = dd->slot_groups-1; n >= 0; n--) {
2636 if (sizeof(long) > sizeof(u32))
2637 group_allocated =
2638 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2639 else
2640 group_allocated = dd->port->cmds_to_issue[n];
2641 size += sprintf(&buf[size], "%08X ", group_allocated);
2642 }
2643 size += sprintf(&buf[size], "]\n");
2644
2645 *offset = size <= len ? size : len;
2646 size = copy_to_user(ubuf, buf, *offset);
2647 if (size)
2648 return -EFAULT;
2649
2650 return *offset;
2651 }
2652
2653 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2654 size_t len, loff_t *offset)
2655 {
2656 struct driver_data *dd = (struct driver_data *)f->private_data;
2657 char buf[MTIP_DFS_MAX_BUF_SIZE];
2658 int size = *offset;
2659
2660 if (!len || size)
2661 return 0;
2662
2663 if (size < 0)
2664 return -EINVAL;
2665
2666 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2667 dd->port->flags);
2668 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n",
2669 dd->dd_flag);
2670
2671 *offset = size <= len ? size : len;
2672 size = copy_to_user(ubuf, buf, *offset);
2673 if (size)
2674 return -EFAULT;
2675
2676 return *offset;
2677 }
2678
2679 static const struct file_operations mtip_regs_fops = {
2680 .owner = THIS_MODULE,
2681 .open = simple_open,
2682 .read = mtip_hw_read_registers,
2683 .llseek = no_llseek,
2684 };
2685
2686 static const struct file_operations mtip_flags_fops = {
2687 .owner = THIS_MODULE,
2688 .open = simple_open,
2689 .read = mtip_hw_read_flags,
2690 .llseek = no_llseek,
2691 };
2692
2693 /*
2694 * Create the sysfs related attributes.
2695 *
2696 * @dd Pointer to the driver data structure.
2697 * @kobj Pointer to the kobj for the block device.
2698 *
2699 * return value
2700 * 0 Operation completed successfully.
2701 * -EINVAL Invalid parameter.
2702 */
2703 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2704 {
2705 if (!kobj || !dd)
2706 return -EINVAL;
2707
2708 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2709 dev_warn(&dd->pdev->dev,
2710 "Error creating 'status' sysfs entry\n");
2711 return 0;
2712 }
2713
2714 /*
2715 * Remove the sysfs related attributes.
2716 *
2717 * @dd Pointer to the driver data structure.
2718 * @kobj Pointer to the kobj for the block device.
2719 *
2720 * return value
2721 * 0 Operation completed successfully.
2722 * -EINVAL Invalid parameter.
2723 */
2724 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2725 {
2726 if (!kobj || !dd)
2727 return -EINVAL;
2728
2729 sysfs_remove_file(kobj, &dev_attr_status.attr);
2730
2731 return 0;
2732 }
2733
2734 static int mtip_hw_debugfs_init(struct driver_data *dd)
2735 {
2736 if (!dfs_parent)
2737 return -1;
2738
2739 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2740 if (IS_ERR_OR_NULL(dd->dfs_node)) {
2741 dev_warn(&dd->pdev->dev,
2742 "Error creating node %s under debugfs\n",
2743 dd->disk->disk_name);
2744 dd->dfs_node = NULL;
2745 return -1;
2746 }
2747
2748 debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd,
2749 &mtip_flags_fops);
2750 debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd,
2751 &mtip_regs_fops);
2752
2753 return 0;
2754 }
2755
2756 static void mtip_hw_debugfs_exit(struct driver_data *dd)
2757 {
2758 debugfs_remove_recursive(dd->dfs_node);
2759 }
2760
2761
2762 /*
2763 * Perform any init/resume time hardware setup
2764 *
2765 * @dd Pointer to the driver data structure.
2766 *
2767 * return value
2768 * None
2769 */
2770 static inline void hba_setup(struct driver_data *dd)
2771 {
2772 u32 hwdata;
2773 hwdata = readl(dd->mmio + HOST_HSORG);
2774
2775 /* interrupt bug workaround: use only 1 IS bit.*/
2776 writel(hwdata |
2777 HSORG_DISABLE_SLOTGRP_INTR |
2778 HSORG_DISABLE_SLOTGRP_PXIS,
2779 dd->mmio + HOST_HSORG);
2780 }
2781
2782 /*
2783 * Detect the details of the product, and store anything needed
2784 * into the driver data structure. This includes product type and
2785 * version and number of slot groups.
2786 *
2787 * @dd Pointer to the driver data structure.
2788 *
2789 * return value
2790 * None
2791 */
2792 static void mtip_detect_product(struct driver_data *dd)
2793 {
2794 u32 hwdata;
2795 unsigned int rev, slotgroups;
2796
2797 /*
2798 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2799 * info register:
2800 * [15:8] hardware/software interface rev#
2801 * [ 3] asic-style interface
2802 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2803 */
2804 hwdata = readl(dd->mmio + HOST_HSORG);
2805
2806 dd->product_type = MTIP_PRODUCT_UNKNOWN;
2807 dd->slot_groups = 1;
2808
2809 if (hwdata & 0x8) {
2810 dd->product_type = MTIP_PRODUCT_ASICFPGA;
2811 rev = (hwdata & HSORG_HWREV) >> 8;
2812 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2813 dev_info(&dd->pdev->dev,
2814 "ASIC-FPGA design, HS rev 0x%x, "
2815 "%i slot groups [%i slots]\n",
2816 rev,
2817 slotgroups,
2818 slotgroups * 32);
2819
2820 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2821 dev_warn(&dd->pdev->dev,
2822 "Warning: driver only supports "
2823 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2824 slotgroups = MTIP_MAX_SLOT_GROUPS;
2825 }
2826 dd->slot_groups = slotgroups;
2827 return;
2828 }
2829
2830 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2831 }
2832
2833 /*
2834 * Blocking wait for FTL rebuild to complete
2835 *
2836 * @dd Pointer to the DRIVER_DATA structure.
2837 *
2838 * return value
2839 * 0 FTL rebuild completed successfully
2840 * -EFAULT FTL rebuild error/timeout/interruption
2841 */
2842 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2843 {
2844 unsigned long timeout, cnt = 0, start;
2845
2846 dev_warn(&dd->pdev->dev,
2847 "FTL rebuild in progress. Polling for completion.\n");
2848
2849 start = jiffies;
2850 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2851
2852 do {
2853 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2854 &dd->dd_flag)))
2855 return -EFAULT;
2856 if (mtip_check_surprise_removal(dd->pdev))
2857 return -EFAULT;
2858
2859 if (mtip_get_identify(dd->port, NULL) < 0)
2860 return -EFAULT;
2861
2862 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2863 MTIP_FTL_REBUILD_MAGIC) {
2864 ssleep(1);
2865 /* Print message every 3 minutes */
2866 if (cnt++ >= 180) {
2867 dev_warn(&dd->pdev->dev,
2868 "FTL rebuild in progress (%d secs).\n",
2869 jiffies_to_msecs(jiffies - start) / 1000);
2870 cnt = 0;
2871 }
2872 } else {
2873 dev_warn(&dd->pdev->dev,
2874 "FTL rebuild complete (%d secs).\n",
2875 jiffies_to_msecs(jiffies - start) / 1000);
2876 mtip_block_initialize(dd);
2877 return 0;
2878 }
2879 ssleep(10);
2880 } while (time_before(jiffies, timeout));
2881
2882 /* Check for timeout */
2883 dev_err(&dd->pdev->dev,
2884 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
2885 jiffies_to_msecs(jiffies - start) / 1000);
2886 return -EFAULT;
2887 }
2888
2889 /*
2890 * service thread to issue queued commands
2891 *
2892 * @data Pointer to the driver data structure.
2893 *
2894 * return value
2895 * 0
2896 */
2897
2898 static int mtip_service_thread(void *data)
2899 {
2900 struct driver_data *dd = (struct driver_data *)data;
2901 unsigned long slot, slot_start, slot_wrap;
2902 unsigned int num_cmd_slots = dd->slot_groups * 32;
2903 struct mtip_port *port = dd->port;
2904
2905 while (1) {
2906 /*
2907 * the condition is to check neither an internal command is
2908 * is in progress nor error handling is active
2909 */
2910 wait_event_interruptible(port->svc_wait, (port->flags) &&
2911 !(port->flags & MTIP_PF_PAUSE_IO));
2912
2913 if (kthread_should_stop())
2914 break;
2915
2916 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
2917 &dd->dd_flag)))
2918 break;
2919
2920 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2921 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
2922 slot = 1;
2923 /* used to restrict the loop to one iteration */
2924 slot_start = num_cmd_slots;
2925 slot_wrap = 0;
2926 while (1) {
2927 slot = find_next_bit(port->cmds_to_issue,
2928 num_cmd_slots, slot);
2929 if (slot_wrap == 1) {
2930 if ((slot_start >= slot) ||
2931 (slot >= num_cmd_slots))
2932 break;
2933 }
2934 if (unlikely(slot_start == num_cmd_slots))
2935 slot_start = slot;
2936
2937 if (unlikely(slot == num_cmd_slots)) {
2938 slot = 1;
2939 slot_wrap = 1;
2940 continue;
2941 }
2942
2943 /* Issue the command to the hardware */
2944 mtip_issue_ncq_command(port, slot);
2945
2946 clear_bit(slot, port->cmds_to_issue);
2947 }
2948
2949 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2950 } else if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
2951 if (!mtip_ftl_rebuild_poll(dd))
2952 set_bit(MTIP_DDF_REBUILD_FAILED_BIT,
2953 &dd->dd_flag);
2954 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
2955 }
2956 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2957
2958 if (test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2959 break;
2960 }
2961 return 0;
2962 }
2963
2964 /*
2965 * Called once for each card.
2966 *
2967 * @dd Pointer to the driver data structure.
2968 *
2969 * return value
2970 * 0 on success, else an error code.
2971 */
2972 static int mtip_hw_init(struct driver_data *dd)
2973 {
2974 int i;
2975 int rv;
2976 unsigned int num_command_slots;
2977 unsigned long timeout, timetaken;
2978 unsigned char *buf;
2979 struct smart_attr attr242;
2980
2981 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
2982
2983 mtip_detect_product(dd);
2984 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
2985 rv = -EIO;
2986 goto out1;
2987 }
2988 num_command_slots = dd->slot_groups * 32;
2989
2990 hba_setup(dd);
2991
2992 tasklet_init(&dd->tasklet, mtip_tasklet, (unsigned long)dd);
2993
2994 dd->port = kzalloc(sizeof(struct mtip_port), GFP_KERNEL);
2995 if (!dd->port) {
2996 dev_err(&dd->pdev->dev,
2997 "Memory allocation: port structure\n");
2998 return -ENOMEM;
2999 }
3000
3001 /* Counting semaphore to track command slot usage */
3002 sema_init(&dd->port->cmd_slot, num_command_slots - 1);
3003
3004 /* Spinlock to prevent concurrent issue */
3005 spin_lock_init(&dd->port->cmd_issue_lock);
3006
3007 /* Set the port mmio base address. */
3008 dd->port->mmio = dd->mmio + PORT_OFFSET;
3009 dd->port->dd = dd;
3010
3011 /* Allocate memory for the command list. */
3012 dd->port->command_list =
3013 dmam_alloc_coherent(&dd->pdev->dev,
3014 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3015 &dd->port->command_list_dma,
3016 GFP_KERNEL);
3017 if (!dd->port->command_list) {
3018 dev_err(&dd->pdev->dev,
3019 "Memory allocation: command list\n");
3020 rv = -ENOMEM;
3021 goto out1;
3022 }
3023
3024 /* Clear the memory we have allocated. */
3025 memset(dd->port->command_list,
3026 0,
3027 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4));
3028
3029 /* Setup the addresse of the RX FIS. */
3030 dd->port->rxfis = dd->port->command_list + HW_CMD_SLOT_SZ;
3031 dd->port->rxfis_dma = dd->port->command_list_dma + HW_CMD_SLOT_SZ;
3032
3033 /* Setup the address of the command tables. */
3034 dd->port->command_table = dd->port->rxfis + AHCI_RX_FIS_SZ;
3035 dd->port->command_tbl_dma = dd->port->rxfis_dma + AHCI_RX_FIS_SZ;
3036
3037 /* Setup the address of the identify data. */
3038 dd->port->identify = dd->port->command_table +
3039 HW_CMD_TBL_AR_SZ;
3040 dd->port->identify_dma = dd->port->command_tbl_dma +
3041 HW_CMD_TBL_AR_SZ;
3042
3043 /* Setup the address of the sector buffer - for some non-ncq cmds */
3044 dd->port->sector_buffer = (void *) dd->port->identify + ATA_SECT_SIZE;
3045 dd->port->sector_buffer_dma = dd->port->identify_dma + ATA_SECT_SIZE;
3046
3047 /* Setup the address of the log buf - for read log command */
3048 dd->port->log_buf = (void *)dd->port->sector_buffer + ATA_SECT_SIZE;
3049 dd->port->log_buf_dma = dd->port->sector_buffer_dma + ATA_SECT_SIZE;
3050
3051 /* Setup the address of the smart buf - for smart read data command */
3052 dd->port->smart_buf = (void *)dd->port->log_buf + ATA_SECT_SIZE;
3053 dd->port->smart_buf_dma = dd->port->log_buf_dma + ATA_SECT_SIZE;
3054
3055
3056 /* Point the command headers at the command tables. */
3057 for (i = 0; i < num_command_slots; i++) {
3058 dd->port->commands[i].command_header =
3059 dd->port->command_list +
3060 (sizeof(struct mtip_cmd_hdr) * i);
3061 dd->port->commands[i].command_header_dma =
3062 dd->port->command_list_dma +
3063 (sizeof(struct mtip_cmd_hdr) * i);
3064
3065 dd->port->commands[i].command =
3066 dd->port->command_table + (HW_CMD_TBL_SZ * i);
3067 dd->port->commands[i].command_dma =
3068 dd->port->command_tbl_dma + (HW_CMD_TBL_SZ * i);
3069
3070 if (readl(dd->mmio + HOST_CAP) & HOST_CAP_64)
3071 dd->port->commands[i].command_header->ctbau =
3072 __force_bit2int cpu_to_le32(
3073 (dd->port->commands[i].command_dma >> 16) >> 16);
3074 dd->port->commands[i].command_header->ctba =
3075 __force_bit2int cpu_to_le32(
3076 dd->port->commands[i].command_dma & 0xFFFFFFFF);
3077
3078 /*
3079 * If this is not done, a bug is reported by the stock
3080 * FC11 i386. Due to the fact that it has lots of kernel
3081 * debugging enabled.
3082 */
3083 sg_init_table(dd->port->commands[i].sg, MTIP_MAX_SG);
3084
3085 /* Mark all commands as currently inactive.*/
3086 atomic_set(&dd->port->commands[i].active, 0);
3087 }
3088
3089 /* Setup the pointers to the extended s_active and CI registers. */
3090 for (i = 0; i < dd->slot_groups; i++) {
3091 dd->port->s_active[i] =
3092 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3093 dd->port->cmd_issue[i] =
3094 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3095 dd->port->completed[i] =
3096 dd->port->mmio + i*0x80 + PORT_SDBV;
3097 }
3098
3099 timetaken = jiffies;
3100 timeout = jiffies + msecs_to_jiffies(30000);
3101 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3102 time_before(jiffies, timeout)) {
3103 mdelay(100);
3104 }
3105 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3106 timetaken = jiffies - timetaken;
3107 dev_warn(&dd->pdev->dev,
3108 "Surprise removal detected at %u ms\n",
3109 jiffies_to_msecs(timetaken));
3110 rv = -ENODEV;
3111 goto out2 ;
3112 }
3113 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
3114 timetaken = jiffies - timetaken;
3115 dev_warn(&dd->pdev->dev,
3116 "Removal detected at %u ms\n",
3117 jiffies_to_msecs(timetaken));
3118 rv = -EFAULT;
3119 goto out2;
3120 }
3121
3122 /* Conditionally reset the HBA. */
3123 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3124 if (mtip_hba_reset(dd) < 0) {
3125 dev_err(&dd->pdev->dev,
3126 "Card did not reset within timeout\n");
3127 rv = -EIO;
3128 goto out2;
3129 }
3130 } else {
3131 /* Clear any pending interrupts on the HBA */
3132 writel(readl(dd->mmio + HOST_IRQ_STAT),
3133 dd->mmio + HOST_IRQ_STAT);
3134 }
3135
3136 mtip_init_port(dd->port);
3137 mtip_start_port(dd->port);
3138
3139 /* Setup the ISR and enable interrupts. */
3140 rv = devm_request_irq(&dd->pdev->dev,
3141 dd->pdev->irq,
3142 mtip_irq_handler,
3143 IRQF_SHARED,
3144 dev_driver_string(&dd->pdev->dev),
3145 dd);
3146
3147 if (rv) {
3148 dev_err(&dd->pdev->dev,
3149 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3150 goto out2;
3151 }
3152
3153 /* Enable interrupts on the HBA. */
3154 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3155 dd->mmio + HOST_CTL);
3156
3157 init_timer(&dd->port->cmd_timer);
3158 init_waitqueue_head(&dd->port->svc_wait);
3159
3160 dd->port->cmd_timer.data = (unsigned long int) dd->port;
3161 dd->port->cmd_timer.function = mtip_timeout_function;
3162 mod_timer(&dd->port->cmd_timer,
3163 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
3164
3165
3166 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
3167 rv = -EFAULT;
3168 goto out3;
3169 }
3170
3171 if (mtip_get_identify(dd->port, NULL) < 0) {
3172 rv = -EFAULT;
3173 goto out3;
3174 }
3175
3176 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3177 MTIP_FTL_REBUILD_MAGIC) {
3178 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3179 return MTIP_FTL_REBUILD_MAGIC;
3180 }
3181 mtip_dump_identify(dd->port);
3182
3183 /* check write protect, over temp and rebuild statuses */
3184 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3185 dd->port->log_buf,
3186 dd->port->log_buf_dma, 1);
3187 if (rv) {
3188 dev_warn(&dd->pdev->dev,
3189 "Error in READ LOG EXT (10h) command\n");
3190 /* non-critical error, don't fail the load */
3191 } else {
3192 buf = (unsigned char *)dd->port->log_buf;
3193 if (buf[259] & 0x1) {
3194 dev_info(&dd->pdev->dev,
3195 "Write protect bit is set.\n");
3196 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
3197 }
3198 if (buf[288] == 0xF7) {
3199 dev_info(&dd->pdev->dev,
3200 "Exceeded Tmax, drive in thermal shutdown.\n");
3201 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
3202 }
3203 if (buf[288] == 0xBF) {
3204 dev_info(&dd->pdev->dev,
3205 "Drive indicates rebuild has failed.\n");
3206 /* TODO */
3207 }
3208 }
3209
3210 /* get write protect progess */
3211 memset(&attr242, 0, sizeof(struct smart_attr));
3212 if (mtip_get_smart_attr(dd->port, 242, &attr242))
3213 dev_warn(&dd->pdev->dev,
3214 "Unable to check write protect progress\n");
3215 else
3216 dev_info(&dd->pdev->dev,
3217 "Write protect progress: %d%% (%d blocks)\n",
3218 attr242.cur, attr242.data);
3219 return rv;
3220
3221 out3:
3222 del_timer_sync(&dd->port->cmd_timer);
3223
3224 /* Disable interrupts on the HBA. */
3225 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3226 dd->mmio + HOST_CTL);
3227
3228 /*Release the IRQ. */
3229 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3230
3231 out2:
3232 mtip_deinit_port(dd->port);
3233
3234 /* Free the command/command header memory. */
3235 dmam_free_coherent(&dd->pdev->dev,
3236 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3237 dd->port->command_list,
3238 dd->port->command_list_dma);
3239 out1:
3240 /* Free the memory allocated for the for structure. */
3241 kfree(dd->port);
3242
3243 return rv;
3244 }
3245
3246 /*
3247 * Called to deinitialize an interface.
3248 *
3249 * @dd Pointer to the driver data structure.
3250 *
3251 * return value
3252 * 0
3253 */
3254 static int mtip_hw_exit(struct driver_data *dd)
3255 {
3256 /*
3257 * Send standby immediate (E0h) to the drive so that it
3258 * saves its state.
3259 */
3260 if (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
3261
3262 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags))
3263 if (mtip_standby_immediate(dd->port))
3264 dev_warn(&dd->pdev->dev,
3265 "STANDBY IMMEDIATE failed\n");
3266
3267 /* de-initialize the port. */
3268 mtip_deinit_port(dd->port);
3269
3270 /* Disable interrupts on the HBA. */
3271 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3272 dd->mmio + HOST_CTL);
3273 }
3274
3275 del_timer_sync(&dd->port->cmd_timer);
3276
3277 /* Release the IRQ. */
3278 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3279
3280 /* Stop the bottom half tasklet. */
3281 tasklet_kill(&dd->tasklet);
3282
3283 /* Free the command/command header memory. */
3284 dmam_free_coherent(&dd->pdev->dev,
3285 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3286 dd->port->command_list,
3287 dd->port->command_list_dma);
3288 /* Free the memory allocated for the for structure. */
3289 kfree(dd->port);
3290
3291 return 0;
3292 }
3293
3294 /*
3295 * Issue a Standby Immediate command to the device.
3296 *
3297 * This function is called by the Block Layer just before the
3298 * system powers off during a shutdown.
3299 *
3300 * @dd Pointer to the driver data structure.
3301 *
3302 * return value
3303 * 0
3304 */
3305 static int mtip_hw_shutdown(struct driver_data *dd)
3306 {
3307 /*
3308 * Send standby immediate (E0h) to the drive so that it
3309 * saves its state.
3310 */
3311 mtip_standby_immediate(dd->port);
3312
3313 return 0;
3314 }
3315
3316 /*
3317 * Suspend function
3318 *
3319 * This function is called by the Block Layer just before the
3320 * system hibernates.
3321 *
3322 * @dd Pointer to the driver data structure.
3323 *
3324 * return value
3325 * 0 Suspend was successful
3326 * -EFAULT Suspend was not successful
3327 */
3328 static int mtip_hw_suspend(struct driver_data *dd)
3329 {
3330 /*
3331 * Send standby immediate (E0h) to the drive
3332 * so that it saves its state.
3333 */
3334 if (mtip_standby_immediate(dd->port) != 0) {
3335 dev_err(&dd->pdev->dev,
3336 "Failed standby-immediate command\n");
3337 return -EFAULT;
3338 }
3339
3340 /* Disable interrupts on the HBA.*/
3341 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3342 dd->mmio + HOST_CTL);
3343 mtip_deinit_port(dd->port);
3344
3345 return 0;
3346 }
3347
3348 /*
3349 * Resume function
3350 *
3351 * This function is called by the Block Layer as the
3352 * system resumes.
3353 *
3354 * @dd Pointer to the driver data structure.
3355 *
3356 * return value
3357 * 0 Resume was successful
3358 * -EFAULT Resume was not successful
3359 */
3360 static int mtip_hw_resume(struct driver_data *dd)
3361 {
3362 /* Perform any needed hardware setup steps */
3363 hba_setup(dd);
3364
3365 /* Reset the HBA */
3366 if (mtip_hba_reset(dd) != 0) {
3367 dev_err(&dd->pdev->dev,
3368 "Unable to reset the HBA\n");
3369 return -EFAULT;
3370 }
3371
3372 /*
3373 * Enable the port, DMA engine, and FIS reception specific
3374 * h/w in controller.
3375 */
3376 mtip_init_port(dd->port);
3377 mtip_start_port(dd->port);
3378
3379 /* Enable interrupts on the HBA.*/
3380 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3381 dd->mmio + HOST_CTL);
3382
3383 return 0;
3384 }
3385
3386 /*
3387 * Helper function for reusing disk name
3388 * upon hot insertion.
3389 */
3390 static int rssd_disk_name_format(char *prefix,
3391 int index,
3392 char *buf,
3393 int buflen)
3394 {
3395 const int base = 'z' - 'a' + 1;
3396 char *begin = buf + strlen(prefix);
3397 char *end = buf + buflen;
3398 char *p;
3399 int unit;
3400
3401 p = end - 1;
3402 *p = '\0';
3403 unit = base;
3404 do {
3405 if (p == begin)
3406 return -EINVAL;
3407 *--p = 'a' + (index % unit);
3408 index = (index / unit) - 1;
3409 } while (index >= 0);
3410
3411 memmove(begin, p, end - p);
3412 memcpy(buf, prefix, strlen(prefix));
3413
3414 return 0;
3415 }
3416
3417 /*
3418 * Block layer IOCTL handler.
3419 *
3420 * @dev Pointer to the block_device structure.
3421 * @mode ignored
3422 * @cmd IOCTL command passed from the user application.
3423 * @arg Argument passed from the user application.
3424 *
3425 * return value
3426 * 0 IOCTL completed successfully.
3427 * -ENOTTY IOCTL not supported or invalid driver data
3428 * structure pointer.
3429 */
3430 static int mtip_block_ioctl(struct block_device *dev,
3431 fmode_t mode,
3432 unsigned cmd,
3433 unsigned long arg)
3434 {
3435 struct driver_data *dd = dev->bd_disk->private_data;
3436
3437 if (!capable(CAP_SYS_ADMIN))
3438 return -EACCES;
3439
3440 if (!dd)
3441 return -ENOTTY;
3442
3443 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3444 return -ENOTTY;
3445
3446 switch (cmd) {
3447 case BLKFLSBUF:
3448 return -ENOTTY;
3449 default:
3450 return mtip_hw_ioctl(dd, cmd, arg);
3451 }
3452 }
3453
3454 #ifdef CONFIG_COMPAT
3455 /*
3456 * Block layer compat IOCTL handler.
3457 *
3458 * @dev Pointer to the block_device structure.
3459 * @mode ignored
3460 * @cmd IOCTL command passed from the user application.
3461 * @arg Argument passed from the user application.
3462 *
3463 * return value
3464 * 0 IOCTL completed successfully.
3465 * -ENOTTY IOCTL not supported or invalid driver data
3466 * structure pointer.
3467 */
3468 static int mtip_block_compat_ioctl(struct block_device *dev,
3469 fmode_t mode,
3470 unsigned cmd,
3471 unsigned long arg)
3472 {
3473 struct driver_data *dd = dev->bd_disk->private_data;
3474
3475 if (!capable(CAP_SYS_ADMIN))
3476 return -EACCES;
3477
3478 if (!dd)
3479 return -ENOTTY;
3480
3481 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3482 return -ENOTTY;
3483
3484 switch (cmd) {
3485 case BLKFLSBUF:
3486 return -ENOTTY;
3487 case HDIO_DRIVE_TASKFILE: {
3488 struct mtip_compat_ide_task_request_s __user *compat_req_task;
3489 ide_task_request_t req_task;
3490 int compat_tasksize, outtotal, ret;
3491
3492 compat_tasksize =
3493 sizeof(struct mtip_compat_ide_task_request_s);
3494
3495 compat_req_task =
3496 (struct mtip_compat_ide_task_request_s __user *) arg;
3497
3498 if (copy_from_user(&req_task, (void __user *) arg,
3499 compat_tasksize - (2 * sizeof(compat_long_t))))
3500 return -EFAULT;
3501
3502 if (get_user(req_task.out_size, &compat_req_task->out_size))
3503 return -EFAULT;
3504
3505 if (get_user(req_task.in_size, &compat_req_task->in_size))
3506 return -EFAULT;
3507
3508 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3509
3510 ret = exec_drive_taskfile(dd, (void __user *) arg,
3511 &req_task, outtotal);
3512
3513 if (copy_to_user((void __user *) arg, &req_task,
3514 compat_tasksize -
3515 (2 * sizeof(compat_long_t))))
3516 return -EFAULT;
3517
3518 if (put_user(req_task.out_size, &compat_req_task->out_size))
3519 return -EFAULT;
3520
3521 if (put_user(req_task.in_size, &compat_req_task->in_size))
3522 return -EFAULT;
3523
3524 return ret;
3525 }
3526 default:
3527 return mtip_hw_ioctl(dd, cmd, arg);
3528 }
3529 }
3530 #endif
3531
3532 /*
3533 * Obtain the geometry of the device.
3534 *
3535 * You may think that this function is obsolete, but some applications,
3536 * fdisk for example still used CHS values. This function describes the
3537 * device as having 224 heads and 56 sectors per cylinder. These values are
3538 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3539 * partition is described in terms of a start and end cylinder this means
3540 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3541 * affects performance.
3542 *
3543 * @dev Pointer to the block_device strucutre.
3544 * @geo Pointer to a hd_geometry structure.
3545 *
3546 * return value
3547 * 0 Operation completed successfully.
3548 * -ENOTTY An error occurred while reading the drive capacity.
3549 */
3550 static int mtip_block_getgeo(struct block_device *dev,
3551 struct hd_geometry *geo)
3552 {
3553 struct driver_data *dd = dev->bd_disk->private_data;
3554 sector_t capacity;
3555
3556 if (!dd)
3557 return -ENOTTY;
3558
3559 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3560 dev_warn(&dd->pdev->dev,
3561 "Could not get drive capacity.\n");
3562 return -ENOTTY;
3563 }
3564
3565 geo->heads = 224;
3566 geo->sectors = 56;
3567 sector_div(capacity, (geo->heads * geo->sectors));
3568 geo->cylinders = capacity;
3569 return 0;
3570 }
3571
3572 /*
3573 * Block device operation function.
3574 *
3575 * This structure contains pointers to the functions required by the block
3576 * layer.
3577 */
3578 static const struct block_device_operations mtip_block_ops = {
3579 .ioctl = mtip_block_ioctl,
3580 #ifdef CONFIG_COMPAT
3581 .compat_ioctl = mtip_block_compat_ioctl,
3582 #endif
3583 .getgeo = mtip_block_getgeo,
3584 .owner = THIS_MODULE
3585 };
3586
3587 /*
3588 * Block layer make request function.
3589 *
3590 * This function is called by the kernel to process a BIO for
3591 * the P320 device.
3592 *
3593 * @queue Pointer to the request queue. Unused other than to obtain
3594 * the driver data structure.
3595 * @bio Pointer to the BIO.
3596 *
3597 */
3598 static void mtip_make_request(struct request_queue *queue, struct bio *bio)
3599 {
3600 struct driver_data *dd = queue->queuedata;
3601 struct scatterlist *sg;
3602 struct bio_vec *bvec;
3603 int nents = 0;
3604 int tag = 0;
3605
3606 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3607 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3608 &dd->dd_flag))) {
3609 bio_endio(bio, -ENXIO);
3610 return;
3611 }
3612 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
3613 bio_endio(bio, -ENODATA);
3614 return;
3615 }
3616 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3617 &dd->dd_flag) &&
3618 bio_data_dir(bio))) {
3619 bio_endio(bio, -ENODATA);
3620 return;
3621 }
3622 }
3623
3624 if (unlikely(!bio_has_data(bio))) {
3625 blk_queue_flush(queue, 0);
3626 bio_endio(bio, 0);
3627 return;
3628 }
3629
3630 sg = mtip_hw_get_scatterlist(dd, &tag);
3631 if (likely(sg != NULL)) {
3632 blk_queue_bounce(queue, &bio);
3633
3634 if (unlikely((bio)->bi_vcnt > MTIP_MAX_SG)) {
3635 dev_warn(&dd->pdev->dev,
3636 "Maximum number of SGL entries exceeded\n");
3637 bio_io_error(bio);
3638 mtip_hw_release_scatterlist(dd, tag);
3639 return;
3640 }
3641
3642 /* Create the scatter list for this bio. */
3643 bio_for_each_segment(bvec, bio, nents) {
3644 sg_set_page(&sg[nents],
3645 bvec->bv_page,
3646 bvec->bv_len,
3647 bvec->bv_offset);
3648 }
3649
3650 /* Issue the read/write. */
3651 mtip_hw_submit_io(dd,
3652 bio->bi_sector,
3653 bio_sectors(bio),
3654 nents,
3655 tag,
3656 bio_endio,
3657 bio,
3658 bio_data_dir(bio));
3659 } else
3660 bio_io_error(bio);
3661 }
3662
3663 /*
3664 * Block layer initialization function.
3665 *
3666 * This function is called once by the PCI layer for each P320
3667 * device that is connected to the system.
3668 *
3669 * @dd Pointer to the driver data structure.
3670 *
3671 * return value
3672 * 0 on success else an error code.
3673 */
3674 static int mtip_block_initialize(struct driver_data *dd)
3675 {
3676 int rv = 0, wait_for_rebuild = 0;
3677 sector_t capacity;
3678 unsigned int index = 0;
3679 struct kobject *kobj;
3680 unsigned char thd_name[16];
3681
3682 if (dd->disk)
3683 goto skip_create_disk; /* hw init done, before rebuild */
3684
3685 /* Initialize the protocol layer. */
3686 wait_for_rebuild = mtip_hw_init(dd);
3687 if (wait_for_rebuild < 0) {
3688 dev_err(&dd->pdev->dev,
3689 "Protocol layer initialization failed\n");
3690 rv = -EINVAL;
3691 goto protocol_init_error;
3692 }
3693
3694 dd->disk = alloc_disk(MTIP_MAX_MINORS);
3695 if (dd->disk == NULL) {
3696 dev_err(&dd->pdev->dev,
3697 "Unable to allocate gendisk structure\n");
3698 rv = -EINVAL;
3699 goto alloc_disk_error;
3700 }
3701
3702 /* Generate the disk name, implemented same as in sd.c */
3703 do {
3704 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL))
3705 goto ida_get_error;
3706
3707 spin_lock(&rssd_index_lock);
3708 rv = ida_get_new(&rssd_index_ida, &index);
3709 spin_unlock(&rssd_index_lock);
3710 } while (rv == -EAGAIN);
3711
3712 if (rv)
3713 goto ida_get_error;
3714
3715 rv = rssd_disk_name_format("rssd",
3716 index,
3717 dd->disk->disk_name,
3718 DISK_NAME_LEN);
3719 if (rv)
3720 goto disk_index_error;
3721
3722 dd->disk->driverfs_dev = &dd->pdev->dev;
3723 dd->disk->major = dd->major;
3724 dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS;
3725 dd->disk->fops = &mtip_block_ops;
3726 dd->disk->private_data = dd;
3727 dd->index = index;
3728
3729 /*
3730 * if rebuild pending, start the service thread, and delay the block
3731 * queue creation and add_disk()
3732 */
3733 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3734 goto start_service_thread;
3735
3736 skip_create_disk:
3737 /* Allocate the request queue. */
3738 dd->queue = blk_alloc_queue(GFP_KERNEL);
3739 if (dd->queue == NULL) {
3740 dev_err(&dd->pdev->dev,
3741 "Unable to allocate request queue\n");
3742 rv = -ENOMEM;
3743 goto block_queue_alloc_init_error;
3744 }
3745
3746 /* Attach our request function to the request queue. */
3747 blk_queue_make_request(dd->queue, mtip_make_request);
3748
3749 dd->disk->queue = dd->queue;
3750 dd->queue->queuedata = dd;
3751
3752 /* Set device limits. */
3753 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
3754 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3755 blk_queue_physical_block_size(dd->queue, 4096);
3756 blk_queue_max_hw_sectors(dd->queue, 0xffff);
3757 blk_queue_max_segment_size(dd->queue, 0x400000);
3758 blk_queue_io_min(dd->queue, 4096);
3759
3760 /*
3761 * write back cache is not supported in the device. FUA depends on
3762 * write back cache support, hence setting flush support to zero.
3763 */
3764 blk_queue_flush(dd->queue, 0);
3765
3766 /* Set the capacity of the device in 512 byte sectors. */
3767 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3768 dev_warn(&dd->pdev->dev,
3769 "Could not read drive capacity\n");
3770 rv = -EIO;
3771 goto read_capacity_error;
3772 }
3773 set_capacity(dd->disk, capacity);
3774
3775 /* Enable the block device and add it to /dev */
3776 add_disk(dd->disk);
3777
3778 /*
3779 * Now that the disk is active, initialize any sysfs attributes
3780 * managed by the protocol layer.
3781 */
3782 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3783 if (kobj) {
3784 mtip_hw_sysfs_init(dd, kobj);
3785 kobject_put(kobj);
3786 }
3787 mtip_hw_debugfs_init(dd);
3788
3789 if (dd->mtip_svc_handler) {
3790 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
3791 return rv; /* service thread created for handling rebuild */
3792 }
3793
3794 start_service_thread:
3795 sprintf(thd_name, "mtip_svc_thd_%02d", index);
3796
3797 dd->mtip_svc_handler = kthread_run(mtip_service_thread,
3798 dd, thd_name);
3799
3800 if (IS_ERR(dd->mtip_svc_handler)) {
3801 dev_err(&dd->pdev->dev, "service thread failed to start\n");
3802 dd->mtip_svc_handler = NULL;
3803 rv = -EFAULT;
3804 goto kthread_run_error;
3805 }
3806
3807 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3808 rv = wait_for_rebuild;
3809
3810 return rv;
3811
3812 kthread_run_error:
3813 mtip_hw_debugfs_exit(dd);
3814
3815 /* Delete our gendisk. This also removes the device from /dev */
3816 del_gendisk(dd->disk);
3817
3818 read_capacity_error:
3819 blk_cleanup_queue(dd->queue);
3820
3821 block_queue_alloc_init_error:
3822 disk_index_error:
3823 spin_lock(&rssd_index_lock);
3824 ida_remove(&rssd_index_ida, index);
3825 spin_unlock(&rssd_index_lock);
3826
3827 ida_get_error:
3828 put_disk(dd->disk);
3829
3830 alloc_disk_error:
3831 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
3832
3833 protocol_init_error:
3834 return rv;
3835 }
3836
3837 /*
3838 * Block layer deinitialization function.
3839 *
3840 * Called by the PCI layer as each P320 device is removed.
3841 *
3842 * @dd Pointer to the driver data structure.
3843 *
3844 * return value
3845 * 0
3846 */
3847 static int mtip_block_remove(struct driver_data *dd)
3848 {
3849 struct kobject *kobj;
3850
3851 if (dd->mtip_svc_handler) {
3852 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
3853 wake_up_interruptible(&dd->port->svc_wait);
3854 kthread_stop(dd->mtip_svc_handler);
3855 }
3856
3857 /* Clean up the sysfs attributes, if created */
3858 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
3859 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3860 if (kobj) {
3861 mtip_hw_sysfs_exit(dd, kobj);
3862 kobject_put(kobj);
3863 }
3864 }
3865 mtip_hw_debugfs_exit(dd);
3866
3867 /*
3868 * Delete our gendisk structure. This also removes the device
3869 * from /dev
3870 */
3871 del_gendisk(dd->disk);
3872
3873 spin_lock(&rssd_index_lock);
3874 ida_remove(&rssd_index_ida, dd->index);
3875 spin_unlock(&rssd_index_lock);
3876
3877 blk_cleanup_queue(dd->queue);
3878 dd->disk = NULL;
3879 dd->queue = NULL;
3880
3881 /* De-initialize the protocol layer. */
3882 mtip_hw_exit(dd);
3883
3884 return 0;
3885 }
3886
3887 /*
3888 * Function called by the PCI layer when just before the
3889 * machine shuts down.
3890 *
3891 * If a protocol layer shutdown function is present it will be called
3892 * by this function.
3893 *
3894 * @dd Pointer to the driver data structure.
3895 *
3896 * return value
3897 * 0
3898 */
3899 static int mtip_block_shutdown(struct driver_data *dd)
3900 {
3901 dev_info(&dd->pdev->dev,
3902 "Shutting down %s ...\n", dd->disk->disk_name);
3903
3904 /* Delete our gendisk structure, and cleanup the blk queue. */
3905 del_gendisk(dd->disk);
3906
3907 spin_lock(&rssd_index_lock);
3908 ida_remove(&rssd_index_ida, dd->index);
3909 spin_unlock(&rssd_index_lock);
3910
3911 blk_cleanup_queue(dd->queue);
3912 dd->disk = NULL;
3913 dd->queue = NULL;
3914
3915 mtip_hw_shutdown(dd);
3916 return 0;
3917 }
3918
3919 static int mtip_block_suspend(struct driver_data *dd)
3920 {
3921 dev_info(&dd->pdev->dev,
3922 "Suspending %s ...\n", dd->disk->disk_name);
3923 mtip_hw_suspend(dd);
3924 return 0;
3925 }
3926
3927 static int mtip_block_resume(struct driver_data *dd)
3928 {
3929 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
3930 dd->disk->disk_name);
3931 mtip_hw_resume(dd);
3932 return 0;
3933 }
3934
3935 /*
3936 * Called for each supported PCI device detected.
3937 *
3938 * This function allocates the private data structure, enables the
3939 * PCI device and then calls the block layer initialization function.
3940 *
3941 * return value
3942 * 0 on success else an error code.
3943 */
3944 static int mtip_pci_probe(struct pci_dev *pdev,
3945 const struct pci_device_id *ent)
3946 {
3947 int rv = 0;
3948 struct driver_data *dd = NULL;
3949
3950 /* Allocate memory for this devices private data. */
3951 dd = kzalloc(sizeof(struct driver_data), GFP_KERNEL);
3952 if (dd == NULL) {
3953 dev_err(&pdev->dev,
3954 "Unable to allocate memory for driver data\n");
3955 return -ENOMEM;
3956 }
3957
3958 /* Attach the private data to this PCI device. */
3959 pci_set_drvdata(pdev, dd);
3960
3961 rv = pcim_enable_device(pdev);
3962 if (rv < 0) {
3963 dev_err(&pdev->dev, "Unable to enable device\n");
3964 goto iomap_err;
3965 }
3966
3967 /* Map BAR5 to memory. */
3968 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
3969 if (rv < 0) {
3970 dev_err(&pdev->dev, "Unable to map regions\n");
3971 goto iomap_err;
3972 }
3973
3974 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
3975 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
3976
3977 if (rv) {
3978 rv = pci_set_consistent_dma_mask(pdev,
3979 DMA_BIT_MASK(32));
3980 if (rv) {
3981 dev_warn(&pdev->dev,
3982 "64-bit DMA enable failed\n");
3983 goto setmask_err;
3984 }
3985 }
3986 }
3987
3988 pci_set_master(pdev);
3989
3990 if (pci_enable_msi(pdev)) {
3991 dev_warn(&pdev->dev,
3992 "Unable to enable MSI interrupt.\n");
3993 goto block_initialize_err;
3994 }
3995
3996 /* Copy the info we may need later into the private data structure. */
3997 dd->major = mtip_major;
3998 dd->instance = instance;
3999 dd->pdev = pdev;
4000
4001 /* Initialize the block layer. */
4002 rv = mtip_block_initialize(dd);
4003 if (rv < 0) {
4004 dev_err(&pdev->dev,
4005 "Unable to initialize block layer\n");
4006 goto block_initialize_err;
4007 }
4008
4009 /*
4010 * Increment the instance count so that each device has a unique
4011 * instance number.
4012 */
4013 instance++;
4014 if (rv != MTIP_FTL_REBUILD_MAGIC)
4015 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4016 goto done;
4017
4018 block_initialize_err:
4019 pci_disable_msi(pdev);
4020
4021 setmask_err:
4022 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4023
4024 iomap_err:
4025 kfree(dd);
4026 pci_set_drvdata(pdev, NULL);
4027 return rv;
4028 done:
4029 return rv;
4030 }
4031
4032 /*
4033 * Called for each probed device when the device is removed or the
4034 * driver is unloaded.
4035 *
4036 * return value
4037 * None
4038 */
4039 static void mtip_pci_remove(struct pci_dev *pdev)
4040 {
4041 struct driver_data *dd = pci_get_drvdata(pdev);
4042 int counter = 0;
4043
4044 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4045
4046 if (mtip_check_surprise_removal(pdev)) {
4047 while (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
4048 counter++;
4049 msleep(20);
4050 if (counter == 10) {
4051 /* Cleanup the outstanding commands */
4052 mtip_command_cleanup(dd);
4053 break;
4054 }
4055 }
4056 }
4057
4058 /* Clean up the block layer. */
4059 mtip_block_remove(dd);
4060
4061 pci_disable_msi(pdev);
4062
4063 kfree(dd);
4064 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4065 }
4066
4067 /*
4068 * Called for each probed device when the device is suspended.
4069 *
4070 * return value
4071 * 0 Success
4072 * <0 Error
4073 */
4074 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4075 {
4076 int rv = 0;
4077 struct driver_data *dd = pci_get_drvdata(pdev);
4078
4079 if (!dd) {
4080 dev_err(&pdev->dev,
4081 "Driver private datastructure is NULL\n");
4082 return -EFAULT;
4083 }
4084
4085 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4086
4087 /* Disable ports & interrupts then send standby immediate */
4088 rv = mtip_block_suspend(dd);
4089 if (rv < 0) {
4090 dev_err(&pdev->dev,
4091 "Failed to suspend controller\n");
4092 return rv;
4093 }
4094
4095 /*
4096 * Save the pci config space to pdev structure &
4097 * disable the device
4098 */
4099 pci_save_state(pdev);
4100 pci_disable_device(pdev);
4101
4102 /* Move to Low power state*/
4103 pci_set_power_state(pdev, PCI_D3hot);
4104
4105 return rv;
4106 }
4107
4108 /*
4109 * Called for each probed device when the device is resumed.
4110 *
4111 * return value
4112 * 0 Success
4113 * <0 Error
4114 */
4115 static int mtip_pci_resume(struct pci_dev *pdev)
4116 {
4117 int rv = 0;
4118 struct driver_data *dd;
4119
4120 dd = pci_get_drvdata(pdev);
4121 if (!dd) {
4122 dev_err(&pdev->dev,
4123 "Driver private datastructure is NULL\n");
4124 return -EFAULT;
4125 }
4126
4127 /* Move the device to active State */
4128 pci_set_power_state(pdev, PCI_D0);
4129
4130 /* Restore PCI configuration space */
4131 pci_restore_state(pdev);
4132
4133 /* Enable the PCI device*/
4134 rv = pcim_enable_device(pdev);
4135 if (rv < 0) {
4136 dev_err(&pdev->dev,
4137 "Failed to enable card during resume\n");
4138 goto err;
4139 }
4140 pci_set_master(pdev);
4141
4142 /*
4143 * Calls hbaReset, initPort, & startPort function
4144 * then enables interrupts
4145 */
4146 rv = mtip_block_resume(dd);
4147 if (rv < 0)
4148 dev_err(&pdev->dev, "Unable to resume\n");
4149
4150 err:
4151 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4152
4153 return rv;
4154 }
4155
4156 /*
4157 * Shutdown routine
4158 *
4159 * return value
4160 * None
4161 */
4162 static void mtip_pci_shutdown(struct pci_dev *pdev)
4163 {
4164 struct driver_data *dd = pci_get_drvdata(pdev);
4165 if (dd)
4166 mtip_block_shutdown(dd);
4167 }
4168
4169 /* Table of device ids supported by this driver. */
4170 static DEFINE_PCI_DEVICE_TABLE(mtip_pci_tbl) = {
4171 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320_DEVICE_ID) },
4172 { 0 }
4173 };
4174
4175 /* Structure that describes the PCI driver functions. */
4176 static struct pci_driver mtip_pci_driver = {
4177 .name = MTIP_DRV_NAME,
4178 .id_table = mtip_pci_tbl,
4179 .probe = mtip_pci_probe,
4180 .remove = mtip_pci_remove,
4181 .suspend = mtip_pci_suspend,
4182 .resume = mtip_pci_resume,
4183 .shutdown = mtip_pci_shutdown,
4184 };
4185
4186 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4187
4188 /*
4189 * Module initialization function.
4190 *
4191 * Called once when the module is loaded. This function allocates a major
4192 * block device number to the Cyclone devices and registers the PCI layer
4193 * of the driver.
4194 *
4195 * Return value
4196 * 0 on success else error code.
4197 */
4198 static int __init mtip_init(void)
4199 {
4200 int error;
4201
4202 printk(KERN_INFO MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4203
4204 /* Allocate a major block device number to use with this driver. */
4205 error = register_blkdev(0, MTIP_DRV_NAME);
4206 if (error <= 0) {
4207 printk(KERN_ERR "Unable to register block device (%d)\n",
4208 error);
4209 return -EBUSY;
4210 }
4211 mtip_major = error;
4212
4213 if (!dfs_parent) {
4214 dfs_parent = debugfs_create_dir("rssd", NULL);
4215 if (IS_ERR_OR_NULL(dfs_parent)) {
4216 printk(KERN_WARNING "Error creating debugfs parent\n");
4217 dfs_parent = NULL;
4218 }
4219 }
4220
4221 /* Register our PCI operations. */
4222 error = pci_register_driver(&mtip_pci_driver);
4223 if (error) {
4224 debugfs_remove(dfs_parent);
4225 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4226 }
4227
4228 return error;
4229 }
4230
4231 /*
4232 * Module de-initialization function.
4233 *
4234 * Called once when the module is unloaded. This function deallocates
4235 * the major block device number allocated by mtip_init() and
4236 * unregisters the PCI layer of the driver.
4237 *
4238 * Return value
4239 * none
4240 */
4241 static void __exit mtip_exit(void)
4242 {
4243 debugfs_remove_recursive(dfs_parent);
4244
4245 /* Release the allocated major block device number. */
4246 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4247
4248 /* Unregister the PCI driver. */
4249 pci_unregister_driver(&mtip_pci_driver);
4250 }
4251
4252 MODULE_AUTHOR("Micron Technology, Inc");
4253 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4254 MODULE_LICENSE("GPL");
4255 MODULE_VERSION(MTIP_DRV_VERSION);
4256
4257 module_init(mtip_init);
4258 module_exit(mtip_exit);
Linux kernel - Deliverables
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