drivers/block/mtip32xx/mtip32xx.h

   1 /*
   2  * mtip32xx.h - Header file for the P320 SSD Block Driver
   3  *   Copyright (C) 2011 Micron Technology, Inc.
   4  *
   5  * Portions of this code were derived from works subjected to the
   6  * following copyright:
   7  *    Copyright (C) 2009 Integrated Device Technology, Inc.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  */
  20
  21 #ifndef __MTIP32XX_H__
  22 #define __MTIP32XX_H__
  23
  24 #include <linux/spinlock.h>
  25 #include <linux/rwsem.h>
  26 #include <linux/ata.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/genhd.h>
  29
  30 /* Offset of Subsystem Device ID in pci confoguration space */
  31 #define PCI_SUBSYSTEM_DEVICEID  0x2E
  32
  33 /* offset of Device Control register in PCIe extended capabilites space */
  34 #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET   0x48
  35
  36 /* check for erase mode support during secure erase */
  37 #define MTIP_SEC_ERASE_MODE     0x2
  38
  39 /* # of times to retry timed out/failed IOs */
  40 #define MTIP_MAX_RETRIES        2
  41
  42 /* Various timeout values in ms */
  43 #define MTIP_NCQ_CMD_TIMEOUT_MS      15000
  44 #define MTIP_IOCTL_CMD_TIMEOUT_MS    5000
  45 #define MTIP_INT_CMD_TIMEOUT_MS      5000
  46 #define MTIP_QUIESCE_IO_TIMEOUT_MS   (MTIP_NCQ_CMD_TIMEOUT_MS * \
  47                                      (MTIP_MAX_RETRIES + 1))
  48
  49 /* check for timeouts every 500ms */
  50 #define MTIP_TIMEOUT_CHECK_PERIOD       500
  51
  52 /* ftl rebuild */
  53 #define MTIP_FTL_REBUILD_OFFSET         142
  54 #define MTIP_FTL_REBUILD_MAGIC          0xED51
  55 #define MTIP_FTL_REBUILD_TIMEOUT_MS     2400000
  56
  57 /* unaligned IO handling */
  58 #define MTIP_MAX_UNALIGNED_SLOTS        2
  59
  60 /* Macro to extract the tag bit number from a tag value. */
  61 #define MTIP_TAG_BIT(tag)       (tag & 0x1F)
  62
  63 /*
  64  * Macro to extract the tag index from a tag value. The index
  65  * is used to access the correct s_active/Command Issue register based
  66  * on the tag value.
  67  */
  68 #define MTIP_TAG_INDEX(tag)     (tag >> 5)
  69
  70 /*
  71  * Maximum number of scatter gather entries
  72  * a single command may have.
  73  */
  74 #define MTIP_MAX_SG             504
  75
  76 /*
  77  * Maximum number of slot groups (Command Issue & s_active registers)
  78  * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
  79  */
  80 #define MTIP_MAX_SLOT_GROUPS    8
  81
  82 /* Internal command tag. */
  83 #define MTIP_TAG_INTERNAL       0
  84
  85 /* Micron Vendor ID & P320x SSD Device ID */
  86 #define PCI_VENDOR_ID_MICRON    0x1344
  87 #define P320H_DEVICE_ID         0x5150
  88 #define P320M_DEVICE_ID         0x5151
  89 #define P320S_DEVICE_ID         0x5152
  90 #define P325M_DEVICE_ID         0x5153
  91 #define P420H_DEVICE_ID         0x5160
  92 #define P420M_DEVICE_ID         0x5161
  93 #define P425M_DEVICE_ID         0x5163
  94
  95 /* Driver name and version strings */
  96 #define MTIP_DRV_NAME           "mtip32xx"
  97 #define MTIP_DRV_VERSION        "1.3.1"
  98
  99 /* Maximum number of minor device numbers per device. */
 100 #define MTIP_MAX_MINORS         16
 101
 102 /* Maximum number of supported command slots. */
 103 #define MTIP_MAX_COMMAND_SLOTS  (MTIP_MAX_SLOT_GROUPS * 32)
 104
 105 /*
 106  * Per-tag bitfield size in longs.
 107  * Linux bit manipulation functions
 108  * (i.e. test_and_set_bit, find_next_zero_bit)
 109  * manipulate memory in longs, so we try to make the math work.
 110  * take the slot groups and find the number of longs, rounding up.
 111  * Careful! i386 and x86_64 use different size longs!
 112  */
 113 #define U32_PER_LONG    (sizeof(long) / sizeof(u32))
 114 #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
 115                                         (U32_PER_LONG-1))/U32_PER_LONG)
 116
 117 /* BAR number used to access the HBA registers. */
 118 #define MTIP_ABAR               5
 119
 120 #ifdef DEBUG
 121  #define dbg_printk(format, arg...)     \
 122         printk(pr_fmt(format), ##arg);
 123 #else
 124  #define dbg_printk(format, arg...)
 125 #endif
 126
 127 #define MTIP_DFS_MAX_BUF_SIZE 1024
 128
 129 #define __force_bit2int (unsigned int __force)
 130
 131 enum {
 132         /* below are bit numbers in 'flags' defined in mtip_port */
 133         MTIP_PF_IC_ACTIVE_BIT       = 0, /* pio/ioctl */
 134         MTIP_PF_EH_ACTIVE_BIT       = 1, /* error handling */
 135         MTIP_PF_SE_ACTIVE_BIT       = 2, /* secure erase */
 136         MTIP_PF_DM_ACTIVE_BIT       = 3, /* download microcde */
 137         MTIP_PF_TO_ACTIVE_BIT       = 9, /* timeout handling */
 138         MTIP_PF_PAUSE_IO      = ((1 << MTIP_PF_IC_ACTIVE_BIT) |
 139                                 (1 << MTIP_PF_EH_ACTIVE_BIT) |
 140                                 (1 << MTIP_PF_SE_ACTIVE_BIT) |
 141                                 (1 << MTIP_PF_DM_ACTIVE_BIT) |
 142                                 (1 << MTIP_PF_TO_ACTIVE_BIT)),
 143
 144         MTIP_PF_SVC_THD_ACTIVE_BIT  = 4,
 145         MTIP_PF_ISSUE_CMDS_BIT      = 5,
 146         MTIP_PF_REBUILD_BIT         = 6,
 147         MTIP_PF_SVC_THD_STOP_BIT    = 8,
 148
 149         MTIP_PF_SVC_THD_WORK    = ((1 << MTIP_PF_EH_ACTIVE_BIT) |
 150                                   (1 << MTIP_PF_ISSUE_CMDS_BIT) |
 151                                   (1 << MTIP_PF_REBUILD_BIT) |
 152                                   (1 << MTIP_PF_SVC_THD_STOP_BIT) |
 153                                   (1 << MTIP_PF_TO_ACTIVE_BIT)),
 154
 155         /* below are bit numbers in 'dd_flag' defined in driver_data */
 156         MTIP_DDF_SEC_LOCK_BIT       = 0,
 157         MTIP_DDF_REMOVE_PENDING_BIT = 1,
 158         MTIP_DDF_OVER_TEMP_BIT      = 2,
 159         MTIP_DDF_WRITE_PROTECT_BIT  = 3,
 160         MTIP_DDF_CLEANUP_BIT        = 5,
 161         MTIP_DDF_RESUME_BIT         = 6,
 162         MTIP_DDF_INIT_DONE_BIT      = 7,
 163         MTIP_DDF_REBUILD_FAILED_BIT = 8,
 164         MTIP_DDF_REMOVAL_BIT        = 9,
 165
 166         MTIP_DDF_STOP_IO      = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
 167                                 (1 << MTIP_DDF_SEC_LOCK_BIT) |
 168                                 (1 << MTIP_DDF_OVER_TEMP_BIT) |
 169                                 (1 << MTIP_DDF_WRITE_PROTECT_BIT) |
 170                                 (1 << MTIP_DDF_REBUILD_FAILED_BIT)),
 171
 172 };
 173
 174 struct smart_attr {
 175         u8 attr_id;
 176         u16 flags;
 177         u8 cur;
 178         u8 worst;
 179         u32 data;
 180         u8 res[3];
 181 } __packed;
 182
 183 struct mtip_work {
 184         struct work_struct work;
 185         void *port;
 186         int cpu_binding;
 187         u32 completed;
 188 } ____cacheline_aligned_in_smp;
 189
 190 #define DEFINE_HANDLER(group)                                  \
 191         void mtip_workq_sdbf##group(struct work_struct *work)       \
 192         {                                                      \
 193                 struct mtip_work *w = (struct mtip_work *) work;         \
 194                 mtip_workq_sdbfx(w->port, group, w->completed);     \
 195         }
 196
 197 #define MTIP_TRIM_TIMEOUT_MS            240000
 198 #define MTIP_MAX_TRIM_ENTRIES           8
 199 #define MTIP_MAX_TRIM_ENTRY_LEN         0xfff8
 200
 201 struct mtip_trim_entry {
 202         u32 lba;   /* starting lba of region */
 203         u16 rsvd;  /* unused */
 204         u16 range; /* # of 512b blocks to trim */
 205 } __packed;
 206
 207 struct mtip_trim {
 208         /* Array of regions to trim */
 209         struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES];
 210 } __packed;
 211
 212 /* Register Frame Information Structure (FIS), host to device. */
 213 struct host_to_dev_fis {
 214         /*
 215          * FIS type.
 216          * - 27h Register FIS, host to device.
 217          * - 34h Register FIS, device to host.
 218          * - 39h DMA Activate FIS, device to host.
 219          * - 41h DMA Setup FIS, bi-directional.
 220          * - 46h Data FIS, bi-directional.
 221          * - 58h BIST Activate FIS, bi-directional.
 222          * - 5Fh PIO Setup FIS, device to host.
 223          * - A1h Set Device Bits FIS, device to host.
 224          */
 225         unsigned char type;
 226         unsigned char opts;
 227         unsigned char command;
 228         unsigned char features;
 229
 230         union {
 231                 unsigned char lba_low;
 232                 unsigned char sector;
 233         };
 234         union {
 235                 unsigned char lba_mid;
 236                 unsigned char cyl_low;
 237         };
 238         union {
 239                 unsigned char lba_hi;
 240                 unsigned char cyl_hi;
 241         };
 242         union {
 243                 unsigned char device;
 244                 unsigned char head;
 245         };
 246
 247         union {
 248                 unsigned char lba_low_ex;
 249                 unsigned char sector_ex;
 250         };
 251         union {
 252                 unsigned char lba_mid_ex;
 253                 unsigned char cyl_low_ex;
 254         };
 255         union {
 256                 unsigned char lba_hi_ex;
 257                 unsigned char cyl_hi_ex;
 258         };
 259         unsigned char features_ex;
 260
 261         unsigned char sect_count;
 262         unsigned char sect_cnt_ex;
 263         unsigned char res2;
 264         unsigned char control;
 265
 266         unsigned int res3;
 267 };
 268
 269 /* Command header structure. */
 270 struct mtip_cmd_hdr {
 271         /*
 272          * Command options.
 273          * - Bits 31:16 Number of PRD entries.
 274          * - Bits 15:8 Unused in this implementation.
 275          * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
 276          * - Bit 6 Write bit, should be set when writing data to the device.
 277          * - Bit 5 Unused in this implementation.
 278          * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
 279          */
 280         unsigned int opts;
 281         /* This field is unsed when using NCQ. */
 282         union {
 283                 unsigned int byte_count;
 284                 unsigned int status;
 285         };
 286         /*
 287          * Lower 32 bits of the command table address associated with this
 288          * header. The command table addresses must be 128 byte aligned.
 289          */
 290         unsigned int ctba;
 291         /*
 292          * If 64 bit addressing is used this field is the upper 32 bits
 293          * of the command table address associated with this command.
 294          */
 295         unsigned int ctbau;
 296         /* Reserved and unused. */
 297         unsigned int res[4];
 298 };
 299
 300 /* Command scatter gather structure (PRD). */
 301 struct mtip_cmd_sg {
 302         /*
 303          * Low 32 bits of the data buffer address. For P320 this
 304          * address must be 8 byte aligned signified by bits 2:0 being
 305          * set to 0.
 306          */
 307         unsigned int dba;
 308         /*
 309          * When 64 bit addressing is used this field is the upper
 310          * 32 bits of the data buffer address.
 311          */
 312         unsigned int dba_upper;
 313         /* Unused. */
 314         unsigned int reserved;
 315         /*
 316          * Bit 31: interrupt when this data block has been transferred.
 317          * Bits 30..22: reserved
 318          * Bits 21..0: byte count (minus 1).  For P320 the byte count must be
 319          * 8 byte aligned signified by bits 2:0 being set to 1.
 320          */
 321         unsigned int info;
 322 };
 323 struct mtip_port;
 324
 325 /* Structure used to describe a command. */
 326 struct mtip_cmd {
 327
 328         struct mtip_cmd_hdr *command_header; /* ptr to command header entry */
 329
 330         dma_addr_t command_header_dma; /* corresponding physical address */
 331
 332         void *command; /* ptr to command table entry */
 333
 334         dma_addr_t command_dma; /* corresponding physical address */
 335
 336         void *comp_data; /* data passed to completion function comp_func() */
 337         /*
 338          * Completion function called by the ISR upon completion of
 339          * a command.
 340          */
 341         void (*comp_func)(struct mtip_port *port,
 342                                 int tag,
 343                                 struct mtip_cmd *cmd,
 344                                 int status);
 345
 346         int scatter_ents; /* Number of scatter list entries used */
 347
 348         int unaligned; /* command is unaligned on 4k boundary */
 349
 350         struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
 351
 352         int retries; /* The number of retries left for this command. */
 353
 354         int direction; /* Data transfer direction */
 355 };
 356
 357 /* Structure used to describe a port. */
 358 struct mtip_port {
 359         /* Pointer back to the driver data for this port. */
 360         struct driver_data *dd;
 361         /*
 362          * Used to determine if the data pointed to by the
 363          * identify field is valid.
 364          */
 365         unsigned long identify_valid;
 366         /* Base address of the memory mapped IO for the port. */
 367         void __iomem *mmio;
 368         /* Array of pointers to the memory mapped s_active registers. */
 369         void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
 370         /* Array of pointers to the memory mapped completed registers. */
 371         void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
 372         /* Array of pointers to the memory mapped Command Issue registers. */
 373         void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
 374         /*
 375          * Pointer to the beginning of the command header memory as used
 376          * by the driver.
 377          */
 378         void *command_list;
 379         /*
 380          * Pointer to the beginning of the command header memory as used
 381          * by the DMA.
 382          */
 383         dma_addr_t command_list_dma;
 384         /*
 385          * Pointer to the beginning of the RX FIS memory as used
 386          * by the driver.
 387          */
 388         void *rxfis;
 389         /*
 390          * Pointer to the beginning of the RX FIS memory as used
 391          * by the DMA.
 392          */
 393         dma_addr_t rxfis_dma;
 394         /*
 395          * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART
 396          */
 397         void *block1;
 398         /*
 399          * DMA address of region for RX Fis, Identify, RLE10, and SMART
 400          */
 401         dma_addr_t block1_dma;
 402         /*
 403          * Pointer to the beginning of the identify data memory as used
 404          * by the driver.
 405          */
 406         u16 *identify;
 407         /*
 408          * Pointer to the beginning of the identify data memory as used
 409          * by the DMA.
 410          */
 411         dma_addr_t identify_dma;
 412         /*
 413          * Pointer to the beginning of a sector buffer that is used
 414          * by the driver when issuing internal commands.
 415          */
 416         u16 *sector_buffer;
 417         /*
 418          * Pointer to the beginning of a sector buffer that is used
 419          * by the DMA when the driver issues internal commands.
 420          */
 421         dma_addr_t sector_buffer_dma;
 422
 423         u16 *log_buf;
 424         dma_addr_t log_buf_dma;
 425
 426         u8 *smart_buf;
 427         dma_addr_t smart_buf_dma;
 428
 429         /*
 430          * used to queue commands when an internal command is in progress
 431          * or error handling is active
 432          */
 433         unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
 434         /* Used by mtip_service_thread to wait for an event */
 435         wait_queue_head_t svc_wait;
 436         /*
 437          * indicates the state of the port. Also, helps the service thread
 438          * to determine its action on wake up.
 439          */
 440         unsigned long flags;
 441         /*
 442          * Timer used to complete commands that have been active for too long.
 443          */
 444         unsigned long ic_pause_timer;
 445
 446         /* Semaphore to control queue depth of unaligned IOs */
 447         struct semaphore cmd_slot_unal;
 448
 449         /* Spinlock for working around command-issue bug. */
 450         spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
 451 };
 452
 453 /*
 454  * Driver private data structure.
 455  *
 456  * One structure is allocated per probed device.
 457  */
 458 struct driver_data {
 459         void __iomem *mmio; /* Base address of the HBA registers. */
 460
 461         int major; /* Major device number. */
 462
 463         int instance; /* Instance number. First device probed is 0, ... */
 464
 465         struct gendisk *disk; /* Pointer to our gendisk structure. */
 466
 467         struct pci_dev *pdev; /* Pointer to the PCI device structure. */
 468
 469         struct request_queue *queue; /* Our request queue. */
 470
 471         struct blk_mq_tag_set tags; /* blk_mq tags */
 472
 473         struct mtip_port *port; /* Pointer to the port data structure. */
 474
 475         unsigned product_type; /* magic value declaring the product type */
 476
 477         unsigned slot_groups; /* number of slot groups the product supports */
 478
 479         unsigned long index; /* Index to determine the disk name */
 480
 481         unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
 482
 483         struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
 484
 485         struct dentry *dfs_node;
 486
 487         bool trim_supp; /* flag indicating trim support */
 488
 489         bool sr;
 490
 491         int numa_node; /* NUMA support */
 492
 493         char workq_name[32];
 494
 495         struct workqueue_struct *isr_workq;
 496
 497         atomic_t irq_workers_active;
 498
 499         struct mtip_work work[MTIP_MAX_SLOT_GROUPS];
 500
 501         int isr_binding;
 502
 503         struct block_device *bdev;
 504
 505         struct list_head online_list; /* linkage for online list */
 506
 507         struct list_head remove_list; /* linkage for removing list */
 508
 509         int unal_qdepth; /* qdepth of unaligned IO queue */
 510 };
 511
 512 #endif