2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45 #define NVME_MINORS (1U << MINORBITS)
46 #define NVME_Q_DEPTH 1024
47 #define NVME_AQ_DEPTH 64
48 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
49 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
50 #define ADMIN_TIMEOUT (admin_timeout * HZ)
51 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
53 static unsigned char admin_timeout
= 60;
54 module_param(admin_timeout
, byte
, 0644);
55 MODULE_PARM_DESC(admin_timeout
, "timeout in seconds for admin commands");
57 unsigned char nvme_io_timeout
= 30;
58 module_param_named(io_timeout
, nvme_io_timeout
, byte
, 0644);
59 MODULE_PARM_DESC(io_timeout
, "timeout in seconds for I/O");
61 static unsigned char shutdown_timeout
= 5;
62 module_param(shutdown_timeout
, byte
, 0644);
63 MODULE_PARM_DESC(shutdown_timeout
, "timeout in seconds for controller shutdown");
65 static int nvme_major
;
66 module_param(nvme_major
, int, 0);
68 static int nvme_char_major
;
69 module_param(nvme_char_major
, int, 0);
71 static int use_threaded_interrupts
;
72 module_param(use_threaded_interrupts
, int, 0);
74 static DEFINE_SPINLOCK(dev_list_lock
);
75 static LIST_HEAD(dev_list
);
76 static struct task_struct
*nvme_thread
;
77 static struct workqueue_struct
*nvme_workq
;
78 static wait_queue_head_t nvme_kthread_wait
;
80 static struct class *nvme_class
;
82 static void nvme_reset_failed_dev(struct work_struct
*ws
);
83 static int nvme_process_cq(struct nvme_queue
*nvmeq
);
85 struct async_cmd_info
{
86 struct kthread_work work
;
87 struct kthread_worker
*worker
;
95 * An NVM Express queue. Each device has at least two (one for admin
96 * commands and one for I/O commands).
99 struct device
*q_dmadev
;
100 struct nvme_dev
*dev
;
101 char irqname
[24]; /* nvme4294967295-65535\0 */
103 struct nvme_command
*sq_cmds
;
104 volatile struct nvme_completion
*cqes
;
105 dma_addr_t sq_dma_addr
;
106 dma_addr_t cq_dma_addr
;
116 struct async_cmd_info cmdinfo
;
117 struct blk_mq_hw_ctx
*hctx
;
121 * Check we didin't inadvertently grow the command struct
123 static inline void _nvme_check_size(void)
125 BUILD_BUG_ON(sizeof(struct nvme_rw_command
) != 64);
126 BUILD_BUG_ON(sizeof(struct nvme_create_cq
) != 64);
127 BUILD_BUG_ON(sizeof(struct nvme_create_sq
) != 64);
128 BUILD_BUG_ON(sizeof(struct nvme_delete_queue
) != 64);
129 BUILD_BUG_ON(sizeof(struct nvme_features
) != 64);
130 BUILD_BUG_ON(sizeof(struct nvme_format_cmd
) != 64);
131 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd
) != 64);
132 BUILD_BUG_ON(sizeof(struct nvme_command
) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl
) != 4096);
134 BUILD_BUG_ON(sizeof(struct nvme_id_ns
) != 4096);
135 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type
) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_smart_log
) != 512);
139 typedef void (*nvme_completion_fn
)(struct nvme_queue
*, void *,
140 struct nvme_completion
*);
142 struct nvme_cmd_info
{
143 nvme_completion_fn fn
;
146 struct nvme_queue
*nvmeq
;
147 struct nvme_iod iod
[0];
151 * Max size of iod being embedded in the request payload
153 #define NVME_INT_PAGES 2
154 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
157 * Will slightly overestimate the number of pages needed. This is OK
158 * as it only leads to a small amount of wasted memory for the lifetime of
161 static int nvme_npages(unsigned size
, struct nvme_dev
*dev
)
163 unsigned nprps
= DIV_ROUND_UP(size
+ dev
->page_size
, dev
->page_size
);
164 return DIV_ROUND_UP(8 * nprps
, PAGE_SIZE
- 8);
167 static unsigned int nvme_cmd_size(struct nvme_dev
*dev
)
169 unsigned int ret
= sizeof(struct nvme_cmd_info
);
171 ret
+= sizeof(struct nvme_iod
);
172 ret
+= sizeof(__le64
*) * nvme_npages(NVME_INT_BYTES(dev
), dev
);
173 ret
+= sizeof(struct scatterlist
) * NVME_INT_PAGES
;
178 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
179 unsigned int hctx_idx
)
181 struct nvme_dev
*dev
= data
;
182 struct nvme_queue
*nvmeq
= dev
->queues
[0];
184 WARN_ON(nvmeq
->hctx
);
186 hctx
->driver_data
= nvmeq
;
190 static int nvme_admin_init_request(void *data
, struct request
*req
,
191 unsigned int hctx_idx
, unsigned int rq_idx
,
192 unsigned int numa_node
)
194 struct nvme_dev
*dev
= data
;
195 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
196 struct nvme_queue
*nvmeq
= dev
->queues
[0];
203 static void nvme_exit_hctx(struct blk_mq_hw_ctx
*hctx
, unsigned int hctx_idx
)
205 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
210 static int nvme_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
211 unsigned int hctx_idx
)
213 struct nvme_dev
*dev
= data
;
214 struct nvme_queue
*nvmeq
= dev
->queues
[
215 (hctx_idx
% dev
->queue_count
) + 1];
220 /* nvmeq queues are shared between namespaces. We assume here that
221 * blk-mq map the tags so they match up with the nvme queue tags. */
222 WARN_ON(nvmeq
->hctx
->tags
!= hctx
->tags
);
224 hctx
->driver_data
= nvmeq
;
228 static int nvme_init_request(void *data
, struct request
*req
,
229 unsigned int hctx_idx
, unsigned int rq_idx
,
230 unsigned int numa_node
)
232 struct nvme_dev
*dev
= data
;
233 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
234 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
241 static void nvme_set_info(struct nvme_cmd_info
*cmd
, void *ctx
,
242 nvme_completion_fn handler
)
247 blk_mq_start_request(blk_mq_rq_from_pdu(cmd
));
250 static void *iod_get_private(struct nvme_iod
*iod
)
252 return (void *) (iod
->private & ~0x1UL
);
256 * If bit 0 is set, the iod is embedded in the request payload.
258 static bool iod_should_kfree(struct nvme_iod
*iod
)
260 return (iod
->private & 0x01) == 0;
263 /* Special values must be less than 0x1000 */
264 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
265 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
266 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
267 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
269 static void special_completion(struct nvme_queue
*nvmeq
, void *ctx
,
270 struct nvme_completion
*cqe
)
272 if (ctx
== CMD_CTX_CANCELLED
)
274 if (ctx
== CMD_CTX_COMPLETED
) {
275 dev_warn(nvmeq
->q_dmadev
,
276 "completed id %d twice on queue %d\n",
277 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
280 if (ctx
== CMD_CTX_INVALID
) {
281 dev_warn(nvmeq
->q_dmadev
,
282 "invalid id %d completed on queue %d\n",
283 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
286 dev_warn(nvmeq
->q_dmadev
, "Unknown special completion %p\n", ctx
);
289 static void *cancel_cmd_info(struct nvme_cmd_info
*cmd
, nvme_completion_fn
*fn
)
296 cmd
->fn
= special_completion
;
297 cmd
->ctx
= CMD_CTX_CANCELLED
;
301 static void async_req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
302 struct nvme_completion
*cqe
)
304 struct request
*req
= ctx
;
306 u32 result
= le32_to_cpup(&cqe
->result
);
307 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
309 if (status
== NVME_SC_SUCCESS
|| status
== NVME_SC_ABORT_REQ
)
310 ++nvmeq
->dev
->event_limit
;
311 if (status
== NVME_SC_SUCCESS
)
312 dev_warn(nvmeq
->q_dmadev
,
313 "async event result %08x\n", result
);
315 blk_mq_free_hctx_request(nvmeq
->hctx
, req
);
318 static void abort_completion(struct nvme_queue
*nvmeq
, void *ctx
,
319 struct nvme_completion
*cqe
)
321 struct request
*req
= ctx
;
323 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
324 u32 result
= le32_to_cpup(&cqe
->result
);
326 blk_mq_free_hctx_request(nvmeq
->hctx
, req
);
328 dev_warn(nvmeq
->q_dmadev
, "Abort status:%x result:%x", status
, result
);
329 ++nvmeq
->dev
->abort_limit
;
332 static void async_completion(struct nvme_queue
*nvmeq
, void *ctx
,
333 struct nvme_completion
*cqe
)
335 struct async_cmd_info
*cmdinfo
= ctx
;
336 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
337 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
338 queue_kthread_work(cmdinfo
->worker
, &cmdinfo
->work
);
339 blk_mq_free_hctx_request(nvmeq
->hctx
, cmdinfo
->req
);
342 static inline struct nvme_cmd_info
*get_cmd_from_tag(struct nvme_queue
*nvmeq
,
345 struct blk_mq_hw_ctx
*hctx
= nvmeq
->hctx
;
346 struct request
*req
= blk_mq_tag_to_rq(hctx
->tags
, tag
);
348 return blk_mq_rq_to_pdu(req
);
352 * Called with local interrupts disabled and the q_lock held. May not sleep.
354 static void *nvme_finish_cmd(struct nvme_queue
*nvmeq
, int tag
,
355 nvme_completion_fn
*fn
)
357 struct nvme_cmd_info
*cmd
= get_cmd_from_tag(nvmeq
, tag
);
359 if (tag
>= nvmeq
->q_depth
) {
360 *fn
= special_completion
;
361 return CMD_CTX_INVALID
;
366 cmd
->fn
= special_completion
;
367 cmd
->ctx
= CMD_CTX_COMPLETED
;
372 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
373 * @nvmeq: The queue to use
374 * @cmd: The command to send
376 * Safe to use from interrupt context
378 static int __nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
380 u16 tail
= nvmeq
->sq_tail
;
382 memcpy(&nvmeq
->sq_cmds
[tail
], cmd
, sizeof(*cmd
));
383 if (++tail
== nvmeq
->q_depth
)
385 writel(tail
, nvmeq
->q_db
);
386 nvmeq
->sq_tail
= tail
;
391 static int nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
395 spin_lock_irqsave(&nvmeq
->q_lock
, flags
);
396 ret
= __nvme_submit_cmd(nvmeq
, cmd
);
397 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
401 static __le64
**iod_list(struct nvme_iod
*iod
)
403 return ((void *)iod
) + iod
->offset
;
406 static inline void iod_init(struct nvme_iod
*iod
, unsigned nbytes
,
407 unsigned nseg
, unsigned long private)
409 iod
->private = private;
410 iod
->offset
= offsetof(struct nvme_iod
, sg
[nseg
]);
412 iod
->length
= nbytes
;
416 static struct nvme_iod
*
417 __nvme_alloc_iod(unsigned nseg
, unsigned bytes
, struct nvme_dev
*dev
,
418 unsigned long priv
, gfp_t gfp
)
420 struct nvme_iod
*iod
= kmalloc(sizeof(struct nvme_iod
) +
421 sizeof(__le64
*) * nvme_npages(bytes
, dev
) +
422 sizeof(struct scatterlist
) * nseg
, gfp
);
425 iod_init(iod
, bytes
, nseg
, priv
);
430 static struct nvme_iod
*nvme_alloc_iod(struct request
*rq
, struct nvme_dev
*dev
,
433 unsigned size
= !(rq
->cmd_flags
& REQ_DISCARD
) ? blk_rq_bytes(rq
) :
434 sizeof(struct nvme_dsm_range
);
435 unsigned long mask
= 0;
436 struct nvme_iod
*iod
;
438 if (rq
->nr_phys_segments
<= NVME_INT_PAGES
&&
439 size
<= NVME_INT_BYTES(dev
)) {
440 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(rq
);
444 iod_init(iod
, size
, rq
->nr_phys_segments
,
445 (unsigned long) rq
| 0x01);
449 return __nvme_alloc_iod(rq
->nr_phys_segments
, size
, dev
,
450 (unsigned long) rq
, gfp
);
453 void nvme_free_iod(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
455 const int last_prp
= dev
->page_size
/ 8 - 1;
457 __le64
**list
= iod_list(iod
);
458 dma_addr_t prp_dma
= iod
->first_dma
;
460 if (iod
->npages
== 0)
461 dma_pool_free(dev
->prp_small_pool
, list
[0], prp_dma
);
462 for (i
= 0; i
< iod
->npages
; i
++) {
463 __le64
*prp_list
= list
[i
];
464 dma_addr_t next_prp_dma
= le64_to_cpu(prp_list
[last_prp
]);
465 dma_pool_free(dev
->prp_page_pool
, prp_list
, prp_dma
);
466 prp_dma
= next_prp_dma
;
469 if (iod_should_kfree(iod
))
473 static int nvme_error_status(u16 status
)
475 switch (status
& 0x7ff) {
476 case NVME_SC_SUCCESS
:
478 case NVME_SC_CAP_EXCEEDED
:
485 static void nvme_dif_prep(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
487 if (be32_to_cpu(pi
->ref_tag
) == v
)
488 pi
->ref_tag
= cpu_to_be32(p
);
491 static void nvme_dif_complete(u32 p
, u32 v
, struct t10_pi_tuple
*pi
)
493 if (be32_to_cpu(pi
->ref_tag
) == p
)
494 pi
->ref_tag
= cpu_to_be32(v
);
498 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
500 * The virtual start sector is the one that was originally submitted by the
501 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
502 * start sector may be different. Remap protection information to match the
503 * physical LBA on writes, and back to the original seed on reads.
505 * Type 0 and 3 do not have a ref tag, so no remapping required.
507 static void nvme_dif_remap(struct request
*req
,
508 void (*dif_swap
)(u32 p
, u32 v
, struct t10_pi_tuple
*pi
))
510 struct nvme_ns
*ns
= req
->rq_disk
->private_data
;
511 struct bio_integrity_payload
*bip
;
512 struct t10_pi_tuple
*pi
;
514 u32 i
, nlb
, ts
, phys
, virt
;
516 if (!ns
->pi_type
|| ns
->pi_type
== NVME_NS_DPS_PI_TYPE3
)
519 bip
= bio_integrity(req
->bio
);
523 pmap
= kmap_atomic(bip
->bip_vec
->bv_page
) + bip
->bip_vec
->bv_offset
;
528 virt
= bip_get_seed(bip
);
529 phys
= nvme_block_nr(ns
, blk_rq_pos(req
));
530 nlb
= (blk_rq_bytes(req
) >> ns
->lba_shift
);
531 ts
= ns
->disk
->integrity
->tuple_size
;
533 for (i
= 0; i
< nlb
; i
++, virt
++, phys
++) {
534 pi
= (struct t10_pi_tuple
*)p
;
535 dif_swap(phys
, virt
, pi
);
541 static void req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
542 struct nvme_completion
*cqe
)
544 struct nvme_iod
*iod
= ctx
;
545 struct request
*req
= iod_get_private(iod
);
546 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
548 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
550 if (unlikely(status
)) {
551 if (!(status
& NVME_SC_DNR
|| blk_noretry_request(req
))
552 && (jiffies
- req
->start_time
) < req
->timeout
) {
555 blk_mq_requeue_request(req
);
556 spin_lock_irqsave(req
->q
->queue_lock
, flags
);
557 if (!blk_queue_stopped(req
->q
))
558 blk_mq_kick_requeue_list(req
->q
);
559 spin_unlock_irqrestore(req
->q
->queue_lock
, flags
);
562 req
->errors
= nvme_error_status(status
);
567 dev_warn(&nvmeq
->dev
->pci_dev
->dev
,
568 "completing aborted command with status:%04x\n",
572 dma_unmap_sg(&nvmeq
->dev
->pci_dev
->dev
, iod
->sg
, iod
->nents
,
573 rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
574 if (blk_integrity_rq(req
)) {
575 if (!rq_data_dir(req
))
576 nvme_dif_remap(req
, nvme_dif_complete
);
577 dma_unmap_sg(&nvmeq
->dev
->pci_dev
->dev
, iod
->meta_sg
, 1,
578 rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
581 nvme_free_iod(nvmeq
->dev
, iod
);
583 blk_mq_complete_request(req
);
586 /* length is in bytes. gfp flags indicates whether we may sleep. */
587 int nvme_setup_prps(struct nvme_dev
*dev
, struct nvme_iod
*iod
, int total_len
,
590 struct dma_pool
*pool
;
591 int length
= total_len
;
592 struct scatterlist
*sg
= iod
->sg
;
593 int dma_len
= sg_dma_len(sg
);
594 u64 dma_addr
= sg_dma_address(sg
);
595 int offset
= offset_in_page(dma_addr
);
597 __le64
**list
= iod_list(iod
);
600 u32 page_size
= dev
->page_size
;
602 length
-= (page_size
- offset
);
606 dma_len
-= (page_size
- offset
);
608 dma_addr
+= (page_size
- offset
);
611 dma_addr
= sg_dma_address(sg
);
612 dma_len
= sg_dma_len(sg
);
615 if (length
<= page_size
) {
616 iod
->first_dma
= dma_addr
;
620 nprps
= DIV_ROUND_UP(length
, page_size
);
621 if (nprps
<= (256 / 8)) {
622 pool
= dev
->prp_small_pool
;
625 pool
= dev
->prp_page_pool
;
629 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
631 iod
->first_dma
= dma_addr
;
633 return (total_len
- length
) + page_size
;
636 iod
->first_dma
= prp_dma
;
639 if (i
== page_size
>> 3) {
640 __le64
*old_prp_list
= prp_list
;
641 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
643 return total_len
- length
;
644 list
[iod
->npages
++] = prp_list
;
645 prp_list
[0] = old_prp_list
[i
- 1];
646 old_prp_list
[i
- 1] = cpu_to_le64(prp_dma
);
649 prp_list
[i
++] = cpu_to_le64(dma_addr
);
650 dma_len
-= page_size
;
651 dma_addr
+= page_size
;
659 dma_addr
= sg_dma_address(sg
);
660 dma_len
= sg_dma_len(sg
);
667 * We reuse the small pool to allocate the 16-byte range here as it is not
668 * worth having a special pool for these or additional cases to handle freeing
671 static void nvme_submit_discard(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
672 struct request
*req
, struct nvme_iod
*iod
)
674 struct nvme_dsm_range
*range
=
675 (struct nvme_dsm_range
*)iod_list(iod
)[0];
676 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
678 range
->cattr
= cpu_to_le32(0);
679 range
->nlb
= cpu_to_le32(blk_rq_bytes(req
) >> ns
->lba_shift
);
680 range
->slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
682 memset(cmnd
, 0, sizeof(*cmnd
));
683 cmnd
->dsm
.opcode
= nvme_cmd_dsm
;
684 cmnd
->dsm
.command_id
= req
->tag
;
685 cmnd
->dsm
.nsid
= cpu_to_le32(ns
->ns_id
);
686 cmnd
->dsm
.prp1
= cpu_to_le64(iod
->first_dma
);
688 cmnd
->dsm
.attributes
= cpu_to_le32(NVME_DSMGMT_AD
);
690 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
692 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
695 static void nvme_submit_flush(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
698 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
700 memset(cmnd
, 0, sizeof(*cmnd
));
701 cmnd
->common
.opcode
= nvme_cmd_flush
;
702 cmnd
->common
.command_id
= cmdid
;
703 cmnd
->common
.nsid
= cpu_to_le32(ns
->ns_id
);
705 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
707 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
710 static int nvme_submit_iod(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
,
713 struct request
*req
= iod_get_private(iod
);
714 struct nvme_command
*cmnd
;
718 if (req
->cmd_flags
& REQ_FUA
)
719 control
|= NVME_RW_FUA
;
720 if (req
->cmd_flags
& (REQ_FAILFAST_DEV
| REQ_RAHEAD
))
721 control
|= NVME_RW_LR
;
723 if (req
->cmd_flags
& REQ_RAHEAD
)
724 dsmgmt
|= NVME_RW_DSM_FREQ_PREFETCH
;
726 cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
727 memset(cmnd
, 0, sizeof(*cmnd
));
729 cmnd
->rw
.opcode
= (rq_data_dir(req
) ? nvme_cmd_write
: nvme_cmd_read
);
730 cmnd
->rw
.command_id
= req
->tag
;
731 cmnd
->rw
.nsid
= cpu_to_le32(ns
->ns_id
);
732 cmnd
->rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
733 cmnd
->rw
.prp2
= cpu_to_le64(iod
->first_dma
);
734 cmnd
->rw
.slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
735 cmnd
->rw
.length
= cpu_to_le16((blk_rq_bytes(req
) >> ns
->lba_shift
) - 1);
737 if (blk_integrity_rq(req
)) {
738 cmnd
->rw
.metadata
= cpu_to_le64(sg_dma_address(iod
->meta_sg
));
739 switch (ns
->pi_type
) {
740 case NVME_NS_DPS_PI_TYPE3
:
741 control
|= NVME_RW_PRINFO_PRCHK_GUARD
;
743 case NVME_NS_DPS_PI_TYPE1
:
744 case NVME_NS_DPS_PI_TYPE2
:
745 control
|= NVME_RW_PRINFO_PRCHK_GUARD
|
746 NVME_RW_PRINFO_PRCHK_REF
;
747 cmnd
->rw
.reftag
= cpu_to_le32(
748 nvme_block_nr(ns
, blk_rq_pos(req
)));
752 control
|= NVME_RW_PRINFO_PRACT
;
754 cmnd
->rw
.control
= cpu_to_le16(control
);
755 cmnd
->rw
.dsmgmt
= cpu_to_le32(dsmgmt
);
757 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
759 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
764 static int nvme_queue_rq(struct blk_mq_hw_ctx
*hctx
,
765 const struct blk_mq_queue_data
*bd
)
767 struct nvme_ns
*ns
= hctx
->queue
->queuedata
;
768 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
769 struct request
*req
= bd
->rq
;
770 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
771 struct nvme_iod
*iod
;
772 enum dma_data_direction dma_dir
;
775 * If formated with metadata, require the block layer provide a buffer
776 * unless this namespace is formated such that the metadata can be
777 * stripped/generated by the controller with PRACT=1.
779 if (ns
->ms
&& !blk_integrity_rq(req
)) {
780 if (!(ns
->pi_type
&& ns
->ms
== 8)) {
781 req
->errors
= -EFAULT
;
782 blk_mq_complete_request(req
);
783 return BLK_MQ_RQ_QUEUE_OK
;
787 iod
= nvme_alloc_iod(req
, ns
->dev
, GFP_ATOMIC
);
789 return BLK_MQ_RQ_QUEUE_BUSY
;
791 if (req
->cmd_flags
& REQ_DISCARD
) {
794 * We reuse the small pool to allocate the 16-byte range here
795 * as it is not worth having a special pool for these or
796 * additional cases to handle freeing the iod.
798 range
= dma_pool_alloc(nvmeq
->dev
->prp_small_pool
,
803 iod_list(iod
)[0] = (__le64
*)range
;
805 } else if (req
->nr_phys_segments
) {
806 dma_dir
= rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
808 sg_init_table(iod
->sg
, req
->nr_phys_segments
);
809 iod
->nents
= blk_rq_map_sg(req
->q
, req
, iod
->sg
);
813 if (!dma_map_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
, dma_dir
))
816 if (blk_rq_bytes(req
) !=
817 nvme_setup_prps(nvmeq
->dev
, iod
, blk_rq_bytes(req
), GFP_ATOMIC
)) {
818 dma_unmap_sg(&nvmeq
->dev
->pci_dev
->dev
, iod
->sg
,
819 iod
->nents
, dma_dir
);
822 if (blk_integrity_rq(req
)) {
823 if (blk_rq_count_integrity_sg(req
->q
, req
->bio
) != 1)
826 sg_init_table(iod
->meta_sg
, 1);
827 if (blk_rq_map_integrity_sg(
828 req
->q
, req
->bio
, iod
->meta_sg
) != 1)
831 if (rq_data_dir(req
))
832 nvme_dif_remap(req
, nvme_dif_prep
);
834 if (!dma_map_sg(nvmeq
->q_dmadev
, iod
->meta_sg
, 1, dma_dir
))
839 nvme_set_info(cmd
, iod
, req_completion
);
840 spin_lock_irq(&nvmeq
->q_lock
);
841 if (req
->cmd_flags
& REQ_DISCARD
)
842 nvme_submit_discard(nvmeq
, ns
, req
, iod
);
843 else if (req
->cmd_flags
& REQ_FLUSH
)
844 nvme_submit_flush(nvmeq
, ns
, req
->tag
);
846 nvme_submit_iod(nvmeq
, iod
, ns
);
848 nvme_process_cq(nvmeq
);
849 spin_unlock_irq(&nvmeq
->q_lock
);
850 return BLK_MQ_RQ_QUEUE_OK
;
853 nvme_free_iod(nvmeq
->dev
, iod
);
854 return BLK_MQ_RQ_QUEUE_ERROR
;
856 nvme_free_iod(nvmeq
->dev
, iod
);
857 return BLK_MQ_RQ_QUEUE_BUSY
;
860 static int nvme_process_cq(struct nvme_queue
*nvmeq
)
864 head
= nvmeq
->cq_head
;
865 phase
= nvmeq
->cq_phase
;
869 nvme_completion_fn fn
;
870 struct nvme_completion cqe
= nvmeq
->cqes
[head
];
871 if ((le16_to_cpu(cqe
.status
) & 1) != phase
)
873 nvmeq
->sq_head
= le16_to_cpu(cqe
.sq_head
);
874 if (++head
== nvmeq
->q_depth
) {
878 ctx
= nvme_finish_cmd(nvmeq
, cqe
.command_id
, &fn
);
879 fn(nvmeq
, ctx
, &cqe
);
882 /* If the controller ignores the cq head doorbell and continuously
883 * writes to the queue, it is theoretically possible to wrap around
884 * the queue twice and mistakenly return IRQ_NONE. Linux only
885 * requires that 0.1% of your interrupts are handled, so this isn't
888 if (head
== nvmeq
->cq_head
&& phase
== nvmeq
->cq_phase
)
891 writel(head
, nvmeq
->q_db
+ nvmeq
->dev
->db_stride
);
892 nvmeq
->cq_head
= head
;
893 nvmeq
->cq_phase
= phase
;
899 /* Admin queue isn't initialized as a request queue. If at some point this
900 * happens anyway, make sure to notify the user */
901 static int nvme_admin_queue_rq(struct blk_mq_hw_ctx
*hctx
,
902 const struct blk_mq_queue_data
*bd
)
905 return BLK_MQ_RQ_QUEUE_ERROR
;
908 static irqreturn_t
nvme_irq(int irq
, void *data
)
911 struct nvme_queue
*nvmeq
= data
;
912 spin_lock(&nvmeq
->q_lock
);
913 nvme_process_cq(nvmeq
);
914 result
= nvmeq
->cqe_seen
? IRQ_HANDLED
: IRQ_NONE
;
916 spin_unlock(&nvmeq
->q_lock
);
920 static irqreturn_t
nvme_irq_check(int irq
, void *data
)
922 struct nvme_queue
*nvmeq
= data
;
923 struct nvme_completion cqe
= nvmeq
->cqes
[nvmeq
->cq_head
];
924 if ((le16_to_cpu(cqe
.status
) & 1) != nvmeq
->cq_phase
)
926 return IRQ_WAKE_THREAD
;
929 struct sync_cmd_info
{
930 struct task_struct
*task
;
935 static void sync_completion(struct nvme_queue
*nvmeq
, void *ctx
,
936 struct nvme_completion
*cqe
)
938 struct sync_cmd_info
*cmdinfo
= ctx
;
939 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
940 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
941 wake_up_process(cmdinfo
->task
);
945 * Returns 0 on success. If the result is negative, it's a Linux error code;
946 * if the result is positive, it's an NVM Express status code
948 static int nvme_submit_sync_cmd(struct request
*req
, struct nvme_command
*cmd
,
949 u32
*result
, unsigned timeout
)
951 struct sync_cmd_info cmdinfo
;
952 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
953 struct nvme_queue
*nvmeq
= cmd_rq
->nvmeq
;
955 cmdinfo
.task
= current
;
956 cmdinfo
.status
= -EINTR
;
958 cmd
->common
.command_id
= req
->tag
;
960 nvme_set_info(cmd_rq
, &cmdinfo
, sync_completion
);
962 set_current_state(TASK_UNINTERRUPTIBLE
);
963 nvme_submit_cmd(nvmeq
, cmd
);
967 *result
= cmdinfo
.result
;
968 return cmdinfo
.status
;
971 static int nvme_submit_async_admin_req(struct nvme_dev
*dev
)
973 struct nvme_queue
*nvmeq
= dev
->queues
[0];
974 struct nvme_command c
;
975 struct nvme_cmd_info
*cmd_info
;
978 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
, false);
982 req
->cmd_flags
|= REQ_NO_TIMEOUT
;
983 cmd_info
= blk_mq_rq_to_pdu(req
);
984 nvme_set_info(cmd_info
, req
, async_req_completion
);
986 memset(&c
, 0, sizeof(c
));
987 c
.common
.opcode
= nvme_admin_async_event
;
988 c
.common
.command_id
= req
->tag
;
990 return __nvme_submit_cmd(nvmeq
, &c
);
993 static int nvme_submit_admin_async_cmd(struct nvme_dev
*dev
,
994 struct nvme_command
*cmd
,
995 struct async_cmd_info
*cmdinfo
, unsigned timeout
)
997 struct nvme_queue
*nvmeq
= dev
->queues
[0];
999 struct nvme_cmd_info
*cmd_rq
;
1001 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_KERNEL
, false);
1003 return PTR_ERR(req
);
1005 req
->timeout
= timeout
;
1006 cmd_rq
= blk_mq_rq_to_pdu(req
);
1008 nvme_set_info(cmd_rq
, cmdinfo
, async_completion
);
1009 cmdinfo
->status
= -EINTR
;
1011 cmd
->common
.command_id
= req
->tag
;
1013 return nvme_submit_cmd(nvmeq
, cmd
);
1016 static int __nvme_submit_admin_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
1017 u32
*result
, unsigned timeout
)
1020 struct request
*req
;
1022 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_KERNEL
, false);
1024 return PTR_ERR(req
);
1025 res
= nvme_submit_sync_cmd(req
, cmd
, result
, timeout
);
1026 blk_mq_free_request(req
);
1030 int nvme_submit_admin_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
1033 return __nvme_submit_admin_cmd(dev
, cmd
, result
, ADMIN_TIMEOUT
);
1036 int nvme_submit_io_cmd(struct nvme_dev
*dev
, struct nvme_ns
*ns
,
1037 struct nvme_command
*cmd
, u32
*result
)
1040 struct request
*req
;
1042 req
= blk_mq_alloc_request(ns
->queue
, WRITE
, (GFP_KERNEL
|__GFP_WAIT
),
1045 return PTR_ERR(req
);
1046 res
= nvme_submit_sync_cmd(req
, cmd
, result
, NVME_IO_TIMEOUT
);
1047 blk_mq_free_request(req
);
1051 static int adapter_delete_queue(struct nvme_dev
*dev
, u8 opcode
, u16 id
)
1053 struct nvme_command c
;
1055 memset(&c
, 0, sizeof(c
));
1056 c
.delete_queue
.opcode
= opcode
;
1057 c
.delete_queue
.qid
= cpu_to_le16(id
);
1059 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
1062 static int adapter_alloc_cq(struct nvme_dev
*dev
, u16 qid
,
1063 struct nvme_queue
*nvmeq
)
1065 struct nvme_command c
;
1066 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_CQ_IRQ_ENABLED
;
1068 memset(&c
, 0, sizeof(c
));
1069 c
.create_cq
.opcode
= nvme_admin_create_cq
;
1070 c
.create_cq
.prp1
= cpu_to_le64(nvmeq
->cq_dma_addr
);
1071 c
.create_cq
.cqid
= cpu_to_le16(qid
);
1072 c
.create_cq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1073 c
.create_cq
.cq_flags
= cpu_to_le16(flags
);
1074 c
.create_cq
.irq_vector
= cpu_to_le16(nvmeq
->cq_vector
);
1076 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
1079 static int adapter_alloc_sq(struct nvme_dev
*dev
, u16 qid
,
1080 struct nvme_queue
*nvmeq
)
1082 struct nvme_command c
;
1083 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_SQ_PRIO_MEDIUM
;
1085 memset(&c
, 0, sizeof(c
));
1086 c
.create_sq
.opcode
= nvme_admin_create_sq
;
1087 c
.create_sq
.prp1
= cpu_to_le64(nvmeq
->sq_dma_addr
);
1088 c
.create_sq
.sqid
= cpu_to_le16(qid
);
1089 c
.create_sq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
1090 c
.create_sq
.sq_flags
= cpu_to_le16(flags
);
1091 c
.create_sq
.cqid
= cpu_to_le16(qid
);
1093 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
1096 static int adapter_delete_cq(struct nvme_dev
*dev
, u16 cqid
)
1098 return adapter_delete_queue(dev
, nvme_admin_delete_cq
, cqid
);
1101 static int adapter_delete_sq(struct nvme_dev
*dev
, u16 sqid
)
1103 return adapter_delete_queue(dev
, nvme_admin_delete_sq
, sqid
);
1106 int nvme_identify(struct nvme_dev
*dev
, unsigned nsid
, unsigned cns
,
1107 dma_addr_t dma_addr
)
1109 struct nvme_command c
;
1111 memset(&c
, 0, sizeof(c
));
1112 c
.identify
.opcode
= nvme_admin_identify
;
1113 c
.identify
.nsid
= cpu_to_le32(nsid
);
1114 c
.identify
.prp1
= cpu_to_le64(dma_addr
);
1115 c
.identify
.cns
= cpu_to_le32(cns
);
1117 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
1120 int nvme_get_features(struct nvme_dev
*dev
, unsigned fid
, unsigned nsid
,
1121 dma_addr_t dma_addr
, u32
*result
)
1123 struct nvme_command c
;
1125 memset(&c
, 0, sizeof(c
));
1126 c
.features
.opcode
= nvme_admin_get_features
;
1127 c
.features
.nsid
= cpu_to_le32(nsid
);
1128 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1129 c
.features
.fid
= cpu_to_le32(fid
);
1131 return nvme_submit_admin_cmd(dev
, &c
, result
);
1134 int nvme_set_features(struct nvme_dev
*dev
, unsigned fid
, unsigned dword11
,
1135 dma_addr_t dma_addr
, u32
*result
)
1137 struct nvme_command c
;
1139 memset(&c
, 0, sizeof(c
));
1140 c
.features
.opcode
= nvme_admin_set_features
;
1141 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1142 c
.features
.fid
= cpu_to_le32(fid
);
1143 c
.features
.dword11
= cpu_to_le32(dword11
);
1145 return nvme_submit_admin_cmd(dev
, &c
, result
);
1149 * nvme_abort_req - Attempt aborting a request
1151 * Schedule controller reset if the command was already aborted once before and
1152 * still hasn't been returned to the driver, or if this is the admin queue.
1154 static void nvme_abort_req(struct request
*req
)
1156 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
1157 struct nvme_queue
*nvmeq
= cmd_rq
->nvmeq
;
1158 struct nvme_dev
*dev
= nvmeq
->dev
;
1159 struct request
*abort_req
;
1160 struct nvme_cmd_info
*abort_cmd
;
1161 struct nvme_command cmd
;
1163 if (!nvmeq
->qid
|| cmd_rq
->aborted
) {
1164 unsigned long flags
;
1166 spin_lock_irqsave(&dev_list_lock
, flags
);
1167 if (work_busy(&dev
->reset_work
))
1169 list_del_init(&dev
->node
);
1170 dev_warn(&dev
->pci_dev
->dev
,
1171 "I/O %d QID %d timeout, reset controller\n",
1172 req
->tag
, nvmeq
->qid
);
1173 dev
->reset_workfn
= nvme_reset_failed_dev
;
1174 queue_work(nvme_workq
, &dev
->reset_work
);
1176 spin_unlock_irqrestore(&dev_list_lock
, flags
);
1180 if (!dev
->abort_limit
)
1183 abort_req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
,
1185 if (IS_ERR(abort_req
))
1188 abort_cmd
= blk_mq_rq_to_pdu(abort_req
);
1189 nvme_set_info(abort_cmd
, abort_req
, abort_completion
);
1191 memset(&cmd
, 0, sizeof(cmd
));
1192 cmd
.abort
.opcode
= nvme_admin_abort_cmd
;
1193 cmd
.abort
.cid
= req
->tag
;
1194 cmd
.abort
.sqid
= cpu_to_le16(nvmeq
->qid
);
1195 cmd
.abort
.command_id
= abort_req
->tag
;
1198 cmd_rq
->aborted
= 1;
1200 dev_warn(nvmeq
->q_dmadev
, "Aborting I/O %d QID %d\n", req
->tag
,
1202 if (nvme_submit_cmd(dev
->queues
[0], &cmd
) < 0) {
1203 dev_warn(nvmeq
->q_dmadev
,
1204 "Could not abort I/O %d QID %d",
1205 req
->tag
, nvmeq
->qid
);
1206 blk_mq_free_request(abort_req
);
1210 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx
*hctx
,
1211 struct request
*req
, void *data
, bool reserved
)
1213 struct nvme_queue
*nvmeq
= data
;
1215 nvme_completion_fn fn
;
1216 struct nvme_cmd_info
*cmd
;
1217 struct nvme_completion cqe
;
1219 if (!blk_mq_request_started(req
))
1222 cmd
= blk_mq_rq_to_pdu(req
);
1224 if (cmd
->ctx
== CMD_CTX_CANCELLED
)
1227 if (blk_queue_dying(req
->q
))
1228 cqe
.status
= cpu_to_le16((NVME_SC_ABORT_REQ
| NVME_SC_DNR
) << 1);
1230 cqe
.status
= cpu_to_le16(NVME_SC_ABORT_REQ
<< 1);
1233 dev_warn(nvmeq
->q_dmadev
, "Cancelling I/O %d QID %d\n",
1234 req
->tag
, nvmeq
->qid
);
1235 ctx
= cancel_cmd_info(cmd
, &fn
);
1236 fn(nvmeq
, ctx
, &cqe
);
1239 static enum blk_eh_timer_return
nvme_timeout(struct request
*req
, bool reserved
)
1241 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
1242 struct nvme_queue
*nvmeq
= cmd
->nvmeq
;
1244 dev_warn(nvmeq
->q_dmadev
, "Timeout I/O %d QID %d\n", req
->tag
,
1246 spin_lock_irq(&nvmeq
->q_lock
);
1247 nvme_abort_req(req
);
1248 spin_unlock_irq(&nvmeq
->q_lock
);
1251 * The aborted req will be completed on receiving the abort req.
1252 * We enable the timer again. If hit twice, it'll cause a device reset,
1253 * as the device then is in a faulty state.
1255 return BLK_EH_RESET_TIMER
;
1258 static void nvme_free_queue(struct nvme_queue
*nvmeq
)
1260 dma_free_coherent(nvmeq
->q_dmadev
, CQ_SIZE(nvmeq
->q_depth
),
1261 (void *)nvmeq
->cqes
, nvmeq
->cq_dma_addr
);
1262 dma_free_coherent(nvmeq
->q_dmadev
, SQ_SIZE(nvmeq
->q_depth
),
1263 nvmeq
->sq_cmds
, nvmeq
->sq_dma_addr
);
1267 static void nvme_free_queues(struct nvme_dev
*dev
, int lowest
)
1271 for (i
= dev
->queue_count
- 1; i
>= lowest
; i
--) {
1272 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1274 dev
->queues
[i
] = NULL
;
1275 nvme_free_queue(nvmeq
);
1280 * nvme_suspend_queue - put queue into suspended state
1281 * @nvmeq - queue to suspend
1283 static int nvme_suspend_queue(struct nvme_queue
*nvmeq
)
1287 spin_lock_irq(&nvmeq
->q_lock
);
1288 if (nvmeq
->cq_vector
== -1) {
1289 spin_unlock_irq(&nvmeq
->q_lock
);
1292 vector
= nvmeq
->dev
->entry
[nvmeq
->cq_vector
].vector
;
1293 nvmeq
->dev
->online_queues
--;
1294 nvmeq
->cq_vector
= -1;
1295 spin_unlock_irq(&nvmeq
->q_lock
);
1297 irq_set_affinity_hint(vector
, NULL
);
1298 free_irq(vector
, nvmeq
);
1303 static void nvme_clear_queue(struct nvme_queue
*nvmeq
)
1305 struct blk_mq_hw_ctx
*hctx
= nvmeq
->hctx
;
1307 spin_lock_irq(&nvmeq
->q_lock
);
1308 if (hctx
&& hctx
->tags
)
1309 blk_mq_tag_busy_iter(hctx
, nvme_cancel_queue_ios
, nvmeq
);
1310 spin_unlock_irq(&nvmeq
->q_lock
);
1313 static void nvme_disable_queue(struct nvme_dev
*dev
, int qid
)
1315 struct nvme_queue
*nvmeq
= dev
->queues
[qid
];
1319 if (nvme_suspend_queue(nvmeq
))
1322 /* Don't tell the adapter to delete the admin queue.
1323 * Don't tell a removed adapter to delete IO queues. */
1324 if (qid
&& readl(&dev
->bar
->csts
) != -1) {
1325 adapter_delete_sq(dev
, qid
);
1326 adapter_delete_cq(dev
, qid
);
1328 if (!qid
&& dev
->admin_q
)
1329 blk_mq_freeze_queue_start(dev
->admin_q
);
1331 spin_lock_irq(&nvmeq
->q_lock
);
1332 nvme_process_cq(nvmeq
);
1333 spin_unlock_irq(&nvmeq
->q_lock
);
1336 static struct nvme_queue
*nvme_alloc_queue(struct nvme_dev
*dev
, int qid
,
1339 struct device
*dmadev
= &dev
->pci_dev
->dev
;
1340 struct nvme_queue
*nvmeq
= kzalloc(sizeof(*nvmeq
), GFP_KERNEL
);
1344 nvmeq
->cqes
= dma_zalloc_coherent(dmadev
, CQ_SIZE(depth
),
1345 &nvmeq
->cq_dma_addr
, GFP_KERNEL
);
1349 nvmeq
->sq_cmds
= dma_alloc_coherent(dmadev
, SQ_SIZE(depth
),
1350 &nvmeq
->sq_dma_addr
, GFP_KERNEL
);
1351 if (!nvmeq
->sq_cmds
)
1354 nvmeq
->q_dmadev
= dmadev
;
1356 snprintf(nvmeq
->irqname
, sizeof(nvmeq
->irqname
), "nvme%dq%d",
1357 dev
->instance
, qid
);
1358 spin_lock_init(&nvmeq
->q_lock
);
1360 nvmeq
->cq_phase
= 1;
1361 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1362 nvmeq
->q_depth
= depth
;
1365 dev
->queues
[qid
] = nvmeq
;
1370 dma_free_coherent(dmadev
, CQ_SIZE(depth
), (void *)nvmeq
->cqes
,
1371 nvmeq
->cq_dma_addr
);
1377 static int queue_request_irq(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1380 if (use_threaded_interrupts
)
1381 return request_threaded_irq(dev
->entry
[nvmeq
->cq_vector
].vector
,
1382 nvme_irq_check
, nvme_irq
, IRQF_SHARED
,
1384 return request_irq(dev
->entry
[nvmeq
->cq_vector
].vector
, nvme_irq
,
1385 IRQF_SHARED
, name
, nvmeq
);
1388 static void nvme_init_queue(struct nvme_queue
*nvmeq
, u16 qid
)
1390 struct nvme_dev
*dev
= nvmeq
->dev
;
1392 spin_lock_irq(&nvmeq
->q_lock
);
1395 nvmeq
->cq_phase
= 1;
1396 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1397 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(nvmeq
->q_depth
));
1398 dev
->online_queues
++;
1399 spin_unlock_irq(&nvmeq
->q_lock
);
1402 static int nvme_create_queue(struct nvme_queue
*nvmeq
, int qid
)
1404 struct nvme_dev
*dev
= nvmeq
->dev
;
1407 nvmeq
->cq_vector
= qid
- 1;
1408 result
= adapter_alloc_cq(dev
, qid
, nvmeq
);
1412 result
= adapter_alloc_sq(dev
, qid
, nvmeq
);
1416 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1420 nvme_init_queue(nvmeq
, qid
);
1424 adapter_delete_sq(dev
, qid
);
1426 adapter_delete_cq(dev
, qid
);
1430 static int nvme_wait_ready(struct nvme_dev
*dev
, u64 cap
, bool enabled
)
1432 unsigned long timeout
;
1433 u32 bit
= enabled
? NVME_CSTS_RDY
: 0;
1435 timeout
= ((NVME_CAP_TIMEOUT(cap
) + 1) * HZ
/ 2) + jiffies
;
1437 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_RDY
) != bit
) {
1439 if (fatal_signal_pending(current
))
1441 if (time_after(jiffies
, timeout
)) {
1442 dev_err(&dev
->pci_dev
->dev
,
1443 "Device not ready; aborting %s\n", enabled
?
1444 "initialisation" : "reset");
1453 * If the device has been passed off to us in an enabled state, just clear
1454 * the enabled bit. The spec says we should set the 'shutdown notification
1455 * bits', but doing so may cause the device to complete commands to the
1456 * admin queue ... and we don't know what memory that might be pointing at!
1458 static int nvme_disable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1460 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1461 dev
->ctrl_config
&= ~NVME_CC_ENABLE
;
1462 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1464 return nvme_wait_ready(dev
, cap
, false);
1467 static int nvme_enable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1469 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1470 dev
->ctrl_config
|= NVME_CC_ENABLE
;
1471 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1473 return nvme_wait_ready(dev
, cap
, true);
1476 static int nvme_shutdown_ctrl(struct nvme_dev
*dev
)
1478 unsigned long timeout
;
1480 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1481 dev
->ctrl_config
|= NVME_CC_SHN_NORMAL
;
1483 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1485 timeout
= SHUTDOWN_TIMEOUT
+ jiffies
;
1486 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_SHST_MASK
) !=
1487 NVME_CSTS_SHST_CMPLT
) {
1489 if (fatal_signal_pending(current
))
1491 if (time_after(jiffies
, timeout
)) {
1492 dev_err(&dev
->pci_dev
->dev
,
1493 "Device shutdown incomplete; abort shutdown\n");
1501 static struct blk_mq_ops nvme_mq_admin_ops
= {
1502 .queue_rq
= nvme_admin_queue_rq
,
1503 .map_queue
= blk_mq_map_queue
,
1504 .init_hctx
= nvme_admin_init_hctx
,
1505 .exit_hctx
= nvme_exit_hctx
,
1506 .init_request
= nvme_admin_init_request
,
1507 .timeout
= nvme_timeout
,
1510 static struct blk_mq_ops nvme_mq_ops
= {
1511 .queue_rq
= nvme_queue_rq
,
1512 .map_queue
= blk_mq_map_queue
,
1513 .init_hctx
= nvme_init_hctx
,
1514 .exit_hctx
= nvme_exit_hctx
,
1515 .init_request
= nvme_init_request
,
1516 .timeout
= nvme_timeout
,
1519 static void nvme_dev_remove_admin(struct nvme_dev
*dev
)
1521 if (dev
->admin_q
&& !blk_queue_dying(dev
->admin_q
)) {
1522 blk_cleanup_queue(dev
->admin_q
);
1523 blk_mq_free_tag_set(&dev
->admin_tagset
);
1527 static int nvme_alloc_admin_tags(struct nvme_dev
*dev
)
1529 if (!dev
->admin_q
) {
1530 dev
->admin_tagset
.ops
= &nvme_mq_admin_ops
;
1531 dev
->admin_tagset
.nr_hw_queues
= 1;
1532 dev
->admin_tagset
.queue_depth
= NVME_AQ_DEPTH
- 1;
1533 dev
->admin_tagset
.timeout
= ADMIN_TIMEOUT
;
1534 dev
->admin_tagset
.numa_node
= dev_to_node(&dev
->pci_dev
->dev
);
1535 dev
->admin_tagset
.cmd_size
= nvme_cmd_size(dev
);
1536 dev
->admin_tagset
.driver_data
= dev
;
1538 if (blk_mq_alloc_tag_set(&dev
->admin_tagset
))
1541 dev
->admin_q
= blk_mq_init_queue(&dev
->admin_tagset
);
1542 if (IS_ERR(dev
->admin_q
)) {
1543 blk_mq_free_tag_set(&dev
->admin_tagset
);
1546 if (!blk_get_queue(dev
->admin_q
)) {
1547 nvme_dev_remove_admin(dev
);
1551 blk_mq_unfreeze_queue(dev
->admin_q
);
1556 static int nvme_configure_admin_queue(struct nvme_dev
*dev
)
1560 u64 cap
= readq(&dev
->bar
->cap
);
1561 struct nvme_queue
*nvmeq
;
1562 unsigned page_shift
= PAGE_SHIFT
;
1563 unsigned dev_page_min
= NVME_CAP_MPSMIN(cap
) + 12;
1564 unsigned dev_page_max
= NVME_CAP_MPSMAX(cap
) + 12;
1566 if (page_shift
< dev_page_min
) {
1567 dev_err(&dev
->pci_dev
->dev
,
1568 "Minimum device page size (%u) too large for "
1569 "host (%u)\n", 1 << dev_page_min
,
1573 if (page_shift
> dev_page_max
) {
1574 dev_info(&dev
->pci_dev
->dev
,
1575 "Device maximum page size (%u) smaller than "
1576 "host (%u); enabling work-around\n",
1577 1 << dev_page_max
, 1 << page_shift
);
1578 page_shift
= dev_page_max
;
1581 result
= nvme_disable_ctrl(dev
, cap
);
1585 nvmeq
= dev
->queues
[0];
1587 nvmeq
= nvme_alloc_queue(dev
, 0, NVME_AQ_DEPTH
);
1592 aqa
= nvmeq
->q_depth
- 1;
1595 dev
->page_size
= 1 << page_shift
;
1597 dev
->ctrl_config
= NVME_CC_CSS_NVM
;
1598 dev
->ctrl_config
|= (page_shift
- 12) << NVME_CC_MPS_SHIFT
;
1599 dev
->ctrl_config
|= NVME_CC_ARB_RR
| NVME_CC_SHN_NONE
;
1600 dev
->ctrl_config
|= NVME_CC_IOSQES
| NVME_CC_IOCQES
;
1602 writel(aqa
, &dev
->bar
->aqa
);
1603 writeq(nvmeq
->sq_dma_addr
, &dev
->bar
->asq
);
1604 writeq(nvmeq
->cq_dma_addr
, &dev
->bar
->acq
);
1606 result
= nvme_enable_ctrl(dev
, cap
);
1610 nvmeq
->cq_vector
= 0;
1611 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1618 nvme_free_queues(dev
, 0);
1622 struct nvme_iod
*nvme_map_user_pages(struct nvme_dev
*dev
, int write
,
1623 unsigned long addr
, unsigned length
)
1625 int i
, err
, count
, nents
, offset
;
1626 struct scatterlist
*sg
;
1627 struct page
**pages
;
1628 struct nvme_iod
*iod
;
1631 return ERR_PTR(-EINVAL
);
1632 if (!length
|| length
> INT_MAX
- PAGE_SIZE
)
1633 return ERR_PTR(-EINVAL
);
1635 offset
= offset_in_page(addr
);
1636 count
= DIV_ROUND_UP(offset
+ length
, PAGE_SIZE
);
1637 pages
= kcalloc(count
, sizeof(*pages
), GFP_KERNEL
);
1639 return ERR_PTR(-ENOMEM
);
1641 err
= get_user_pages_fast(addr
, count
, 1, pages
);
1649 iod
= __nvme_alloc_iod(count
, length
, dev
, 0, GFP_KERNEL
);
1654 sg_init_table(sg
, count
);
1655 for (i
= 0; i
< count
; i
++) {
1656 sg_set_page(&sg
[i
], pages
[i
],
1657 min_t(unsigned, length
, PAGE_SIZE
- offset
),
1659 length
-= (PAGE_SIZE
- offset
);
1662 sg_mark_end(&sg
[i
- 1]);
1665 nents
= dma_map_sg(&dev
->pci_dev
->dev
, sg
, count
,
1666 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1676 for (i
= 0; i
< count
; i
++)
1679 return ERR_PTR(err
);
1682 void nvme_unmap_user_pages(struct nvme_dev
*dev
, int write
,
1683 struct nvme_iod
*iod
)
1687 dma_unmap_sg(&dev
->pci_dev
->dev
, iod
->sg
, iod
->nents
,
1688 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1690 for (i
= 0; i
< iod
->nents
; i
++)
1691 put_page(sg_page(&iod
->sg
[i
]));
1694 static int nvme_submit_io(struct nvme_ns
*ns
, struct nvme_user_io __user
*uio
)
1696 struct nvme_dev
*dev
= ns
->dev
;
1697 struct nvme_user_io io
;
1698 struct nvme_command c
;
1699 unsigned length
, meta_len
;
1701 struct nvme_iod
*iod
, *meta_iod
= NULL
;
1702 dma_addr_t meta_dma_addr
;
1703 void *meta
, *uninitialized_var(meta_mem
);
1705 if (copy_from_user(&io
, uio
, sizeof(io
)))
1707 length
= (io
.nblocks
+ 1) << ns
->lba_shift
;
1708 meta_len
= (io
.nblocks
+ 1) * ns
->ms
;
1710 if (meta_len
&& ((io
.metadata
& 3) || !io
.metadata
))
1713 switch (io
.opcode
) {
1714 case nvme_cmd_write
:
1716 case nvme_cmd_compare
:
1717 iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.addr
, length
);
1724 return PTR_ERR(iod
);
1726 memset(&c
, 0, sizeof(c
));
1727 c
.rw
.opcode
= io
.opcode
;
1728 c
.rw
.flags
= io
.flags
;
1729 c
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
1730 c
.rw
.slba
= cpu_to_le64(io
.slba
);
1731 c
.rw
.length
= cpu_to_le16(io
.nblocks
);
1732 c
.rw
.control
= cpu_to_le16(io
.control
);
1733 c
.rw
.dsmgmt
= cpu_to_le32(io
.dsmgmt
);
1734 c
.rw
.reftag
= cpu_to_le32(io
.reftag
);
1735 c
.rw
.apptag
= cpu_to_le16(io
.apptag
);
1736 c
.rw
.appmask
= cpu_to_le16(io
.appmask
);
1739 meta_iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.metadata
,
1741 if (IS_ERR(meta_iod
)) {
1742 status
= PTR_ERR(meta_iod
);
1747 meta_mem
= dma_alloc_coherent(&dev
->pci_dev
->dev
, meta_len
,
1748 &meta_dma_addr
, GFP_KERNEL
);
1754 if (io
.opcode
& 1) {
1755 int meta_offset
= 0;
1757 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1758 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1759 meta_iod
->sg
[i
].offset
;
1760 memcpy(meta_mem
+ meta_offset
, meta
,
1761 meta_iod
->sg
[i
].length
);
1762 kunmap_atomic(meta
);
1763 meta_offset
+= meta_iod
->sg
[i
].length
;
1767 c
.rw
.metadata
= cpu_to_le64(meta_dma_addr
);
1770 length
= nvme_setup_prps(dev
, iod
, length
, GFP_KERNEL
);
1771 c
.rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
1772 c
.rw
.prp2
= cpu_to_le64(iod
->first_dma
);
1774 if (length
!= (io
.nblocks
+ 1) << ns
->lba_shift
)
1777 status
= nvme_submit_io_cmd(dev
, ns
, &c
, NULL
);
1780 if (status
== NVME_SC_SUCCESS
&& !(io
.opcode
& 1)) {
1781 int meta_offset
= 0;
1783 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1784 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1785 meta_iod
->sg
[i
].offset
;
1786 memcpy(meta
, meta_mem
+ meta_offset
,
1787 meta_iod
->sg
[i
].length
);
1788 kunmap_atomic(meta
);
1789 meta_offset
+= meta_iod
->sg
[i
].length
;
1793 dma_free_coherent(&dev
->pci_dev
->dev
, meta_len
, meta_mem
,
1798 nvme_unmap_user_pages(dev
, io
.opcode
& 1, iod
);
1799 nvme_free_iod(dev
, iod
);
1802 nvme_unmap_user_pages(dev
, io
.opcode
& 1, meta_iod
);
1803 nvme_free_iod(dev
, meta_iod
);
1809 static int nvme_user_cmd(struct nvme_dev
*dev
, struct nvme_ns
*ns
,
1810 struct nvme_passthru_cmd __user
*ucmd
)
1812 struct nvme_passthru_cmd cmd
;
1813 struct nvme_command c
;
1815 struct nvme_iod
*uninitialized_var(iod
);
1818 if (!capable(CAP_SYS_ADMIN
))
1820 if (copy_from_user(&cmd
, ucmd
, sizeof(cmd
)))
1823 memset(&c
, 0, sizeof(c
));
1824 c
.common
.opcode
= cmd
.opcode
;
1825 c
.common
.flags
= cmd
.flags
;
1826 c
.common
.nsid
= cpu_to_le32(cmd
.nsid
);
1827 c
.common
.cdw2
[0] = cpu_to_le32(cmd
.cdw2
);
1828 c
.common
.cdw2
[1] = cpu_to_le32(cmd
.cdw3
);
1829 c
.common
.cdw10
[0] = cpu_to_le32(cmd
.cdw10
);
1830 c
.common
.cdw10
[1] = cpu_to_le32(cmd
.cdw11
);
1831 c
.common
.cdw10
[2] = cpu_to_le32(cmd
.cdw12
);
1832 c
.common
.cdw10
[3] = cpu_to_le32(cmd
.cdw13
);
1833 c
.common
.cdw10
[4] = cpu_to_le32(cmd
.cdw14
);
1834 c
.common
.cdw10
[5] = cpu_to_le32(cmd
.cdw15
);
1836 length
= cmd
.data_len
;
1838 iod
= nvme_map_user_pages(dev
, cmd
.opcode
& 1, cmd
.addr
,
1841 return PTR_ERR(iod
);
1842 length
= nvme_setup_prps(dev
, iod
, length
, GFP_KERNEL
);
1843 c
.common
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
1844 c
.common
.prp2
= cpu_to_le64(iod
->first_dma
);
1847 timeout
= cmd
.timeout_ms
? msecs_to_jiffies(cmd
.timeout_ms
) :
1850 if (length
!= cmd
.data_len
)
1853 struct request
*req
;
1855 req
= blk_mq_alloc_request(ns
->queue
, WRITE
,
1856 (GFP_KERNEL
|__GFP_WAIT
), false);
1858 status
= PTR_ERR(req
);
1860 status
= nvme_submit_sync_cmd(req
, &c
, &cmd
.result
,
1862 blk_mq_free_request(req
);
1865 status
= __nvme_submit_admin_cmd(dev
, &c
, &cmd
.result
, timeout
);
1868 nvme_unmap_user_pages(dev
, cmd
.opcode
& 1, iod
);
1869 nvme_free_iod(dev
, iod
);
1872 if ((status
>= 0) && copy_to_user(&ucmd
->result
, &cmd
.result
,
1873 sizeof(cmd
.result
)))
1879 static int nvme_ioctl(struct block_device
*bdev
, fmode_t mode
, unsigned int cmd
,
1882 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1886 force_successful_syscall_return();
1888 case NVME_IOCTL_ADMIN_CMD
:
1889 return nvme_user_cmd(ns
->dev
, NULL
, (void __user
*)arg
);
1890 case NVME_IOCTL_IO_CMD
:
1891 return nvme_user_cmd(ns
->dev
, ns
, (void __user
*)arg
);
1892 case NVME_IOCTL_SUBMIT_IO
:
1893 return nvme_submit_io(ns
, (void __user
*)arg
);
1894 case SG_GET_VERSION_NUM
:
1895 return nvme_sg_get_version_num((void __user
*)arg
);
1897 return nvme_sg_io(ns
, (void __user
*)arg
);
1903 #ifdef CONFIG_COMPAT
1904 static int nvme_compat_ioctl(struct block_device
*bdev
, fmode_t mode
,
1905 unsigned int cmd
, unsigned long arg
)
1909 return -ENOIOCTLCMD
;
1911 return nvme_ioctl(bdev
, mode
, cmd
, arg
);
1914 #define nvme_compat_ioctl NULL
1917 static int nvme_open(struct block_device
*bdev
, fmode_t mode
)
1922 spin_lock(&dev_list_lock
);
1923 ns
= bdev
->bd_disk
->private_data
;
1926 else if (!kref_get_unless_zero(&ns
->dev
->kref
))
1928 spin_unlock(&dev_list_lock
);
1933 static void nvme_free_dev(struct kref
*kref
);
1935 static void nvme_release(struct gendisk
*disk
, fmode_t mode
)
1937 struct nvme_ns
*ns
= disk
->private_data
;
1938 struct nvme_dev
*dev
= ns
->dev
;
1940 kref_put(&dev
->kref
, nvme_free_dev
);
1943 static int nvme_getgeo(struct block_device
*bd
, struct hd_geometry
*geo
)
1945 /* some standard values */
1946 geo
->heads
= 1 << 6;
1947 geo
->sectors
= 1 << 5;
1948 geo
->cylinders
= get_capacity(bd
->bd_disk
) >> 11;
1952 static void nvme_config_discard(struct nvme_ns
*ns
)
1954 u32 logical_block_size
= queue_logical_block_size(ns
->queue
);
1955 ns
->queue
->limits
.discard_zeroes_data
= 0;
1956 ns
->queue
->limits
.discard_alignment
= logical_block_size
;
1957 ns
->queue
->limits
.discard_granularity
= logical_block_size
;
1958 ns
->queue
->limits
.max_discard_sectors
= 0xffffffff;
1959 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD
, ns
->queue
);
1962 static int nvme_noop_verify(struct blk_integrity_iter
*iter
)
1967 static int nvme_noop_generate(struct blk_integrity_iter
*iter
)
1972 struct blk_integrity nvme_meta_noop
= {
1973 .name
= "NVME_META_NOOP",
1974 .generate_fn
= nvme_noop_generate
,
1975 .verify_fn
= nvme_noop_verify
,
1978 static void nvme_init_integrity(struct nvme_ns
*ns
)
1980 struct blk_integrity integrity
;
1982 switch (ns
->pi_type
) {
1983 case NVME_NS_DPS_PI_TYPE3
:
1984 integrity
= t10_pi_type3_crc
;
1986 case NVME_NS_DPS_PI_TYPE1
:
1987 case NVME_NS_DPS_PI_TYPE2
:
1988 integrity
= t10_pi_type1_crc
;
1991 integrity
= nvme_meta_noop
;
1994 integrity
.tuple_size
= ns
->ms
;
1995 blk_integrity_register(ns
->disk
, &integrity
);
1996 blk_queue_max_integrity_segments(ns
->queue
, 1);
1999 static int nvme_revalidate_disk(struct gendisk
*disk
)
2001 struct nvme_ns
*ns
= disk
->private_data
;
2002 struct nvme_dev
*dev
= ns
->dev
;
2003 struct nvme_id_ns
*id
;
2004 dma_addr_t dma_addr
;
2005 int lbaf
, pi_type
, old_ms
;
2008 id
= dma_alloc_coherent(&dev
->pci_dev
->dev
, 4096, &dma_addr
,
2011 dev_warn(&dev
->pci_dev
->dev
, "%s: Memory alocation failure\n",
2015 if (nvme_identify(dev
, ns
->ns_id
, 0, dma_addr
)) {
2016 dev_warn(&dev
->pci_dev
->dev
,
2017 "identify failed ns:%d, setting capacity to 0\n",
2019 memset(id
, 0, sizeof(*id
));
2023 lbaf
= id
->flbas
& NVME_NS_FLBAS_LBA_MASK
;
2024 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
2025 ns
->ms
= le16_to_cpu(id
->lbaf
[lbaf
].ms
);
2028 * If identify namespace failed, use default 512 byte block size so
2029 * block layer can use before failing read/write for 0 capacity.
2031 if (ns
->lba_shift
== 0)
2033 bs
= 1 << ns
->lba_shift
;
2035 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2036 pi_type
= ns
->ms
== sizeof(struct t10_pi_tuple
) ?
2037 id
->dps
& NVME_NS_DPS_PI_MASK
: 0;
2039 if (disk
->integrity
&& (ns
->pi_type
!= pi_type
|| ns
->ms
!= old_ms
||
2040 bs
!= queue_logical_block_size(disk
->queue
) ||
2041 (ns
->ms
&& id
->flbas
& NVME_NS_FLBAS_META_EXT
)))
2042 blk_integrity_unregister(disk
);
2044 ns
->pi_type
= pi_type
;
2045 blk_queue_logical_block_size(ns
->queue
, bs
);
2047 if (ns
->ms
&& !disk
->integrity
&& (disk
->flags
& GENHD_FL_UP
) &&
2048 !(id
->flbas
& NVME_NS_FLBAS_META_EXT
))
2049 nvme_init_integrity(ns
);
2051 if (id
->ncap
== 0 || (ns
->ms
&& !disk
->integrity
))
2052 set_capacity(disk
, 0);
2054 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
2056 if (dev
->oncs
& NVME_CTRL_ONCS_DSM
)
2057 nvme_config_discard(ns
);
2059 dma_free_coherent(&dev
->pci_dev
->dev
, 4096, id
, dma_addr
);
2063 static const struct block_device_operations nvme_fops
= {
2064 .owner
= THIS_MODULE
,
2065 .ioctl
= nvme_ioctl
,
2066 .compat_ioctl
= nvme_compat_ioctl
,
2068 .release
= nvme_release
,
2069 .getgeo
= nvme_getgeo
,
2070 .revalidate_disk
= nvme_revalidate_disk
,
2073 static int nvme_kthread(void *data
)
2075 struct nvme_dev
*dev
, *next
;
2077 while (!kthread_should_stop()) {
2078 set_current_state(TASK_INTERRUPTIBLE
);
2079 spin_lock(&dev_list_lock
);
2080 list_for_each_entry_safe(dev
, next
, &dev_list
, node
) {
2082 if (readl(&dev
->bar
->csts
) & NVME_CSTS_CFS
) {
2083 if (work_busy(&dev
->reset_work
))
2085 list_del_init(&dev
->node
);
2086 dev_warn(&dev
->pci_dev
->dev
,
2087 "Failed status: %x, reset controller\n",
2088 readl(&dev
->bar
->csts
));
2089 dev
->reset_workfn
= nvme_reset_failed_dev
;
2090 queue_work(nvme_workq
, &dev
->reset_work
);
2093 for (i
= 0; i
< dev
->queue_count
; i
++) {
2094 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2097 spin_lock_irq(&nvmeq
->q_lock
);
2098 nvme_process_cq(nvmeq
);
2100 while ((i
== 0) && (dev
->event_limit
> 0)) {
2101 if (nvme_submit_async_admin_req(dev
))
2105 spin_unlock_irq(&nvmeq
->q_lock
);
2108 spin_unlock(&dev_list_lock
);
2109 schedule_timeout(round_jiffies_relative(HZ
));
2114 static void nvme_alloc_ns(struct nvme_dev
*dev
, unsigned nsid
)
2117 struct gendisk
*disk
;
2118 int node
= dev_to_node(&dev
->pci_dev
->dev
);
2120 ns
= kzalloc_node(sizeof(*ns
), GFP_KERNEL
, node
);
2124 ns
->queue
= blk_mq_init_queue(&dev
->tagset
);
2125 if (IS_ERR(ns
->queue
))
2127 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES
, ns
->queue
);
2128 queue_flag_set_unlocked(QUEUE_FLAG_NONROT
, ns
->queue
);
2129 queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS
, ns
->queue
);
2131 ns
->queue
->queuedata
= ns
;
2133 disk
= alloc_disk_node(0, node
);
2135 goto out_free_queue
;
2139 ns
->lba_shift
= 9; /* set to a default value for 512 until disk is validated */
2140 list_add_tail(&ns
->list
, &dev
->namespaces
);
2142 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
2143 if (dev
->max_hw_sectors
)
2144 blk_queue_max_hw_sectors(ns
->queue
, dev
->max_hw_sectors
);
2145 if (dev
->stripe_size
)
2146 blk_queue_chunk_sectors(ns
->queue
, dev
->stripe_size
>> 9);
2147 if (dev
->vwc
& NVME_CTRL_VWC_PRESENT
)
2148 blk_queue_flush(ns
->queue
, REQ_FLUSH
| REQ_FUA
);
2150 disk
->major
= nvme_major
;
2151 disk
->first_minor
= 0;
2152 disk
->fops
= &nvme_fops
;
2153 disk
->private_data
= ns
;
2154 disk
->queue
= ns
->queue
;
2155 disk
->driverfs_dev
= dev
->device
;
2156 disk
->flags
= GENHD_FL_EXT_DEVT
;
2157 sprintf(disk
->disk_name
, "nvme%dn%d", dev
->instance
, nsid
);
2160 * Initialize capacity to 0 until we establish the namespace format and
2161 * setup integrity extentions if necessary. The revalidate_disk after
2162 * add_disk allows the driver to register with integrity if the format
2165 set_capacity(disk
, 0);
2166 nvme_revalidate_disk(ns
->disk
);
2169 revalidate_disk(ns
->disk
);
2172 blk_cleanup_queue(ns
->queue
);
2177 static void nvme_create_io_queues(struct nvme_dev
*dev
)
2181 for (i
= dev
->queue_count
; i
<= dev
->max_qid
; i
++)
2182 if (!nvme_alloc_queue(dev
, i
, dev
->q_depth
))
2185 for (i
= dev
->online_queues
; i
<= dev
->queue_count
- 1; i
++)
2186 if (nvme_create_queue(dev
->queues
[i
], i
))
2190 static int set_queue_count(struct nvme_dev
*dev
, int count
)
2194 u32 q_count
= (count
- 1) | ((count
- 1) << 16);
2196 status
= nvme_set_features(dev
, NVME_FEAT_NUM_QUEUES
, q_count
, 0,
2201 dev_err(&dev
->pci_dev
->dev
, "Could not set queue count (%d)\n",
2205 return min(result
& 0xffff, result
>> 16) + 1;
2208 static size_t db_bar_size(struct nvme_dev
*dev
, unsigned nr_io_queues
)
2210 return 4096 + ((nr_io_queues
+ 1) * 8 * dev
->db_stride
);
2213 static int nvme_setup_io_queues(struct nvme_dev
*dev
)
2215 struct nvme_queue
*adminq
= dev
->queues
[0];
2216 struct pci_dev
*pdev
= dev
->pci_dev
;
2217 int result
, i
, vecs
, nr_io_queues
, size
;
2219 nr_io_queues
= num_possible_cpus();
2220 result
= set_queue_count(dev
, nr_io_queues
);
2223 if (result
< nr_io_queues
)
2224 nr_io_queues
= result
;
2226 size
= db_bar_size(dev
, nr_io_queues
);
2230 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), size
);
2233 if (!--nr_io_queues
)
2235 size
= db_bar_size(dev
, nr_io_queues
);
2237 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2238 adminq
->q_db
= dev
->dbs
;
2241 /* Deregister the admin queue's interrupt */
2242 free_irq(dev
->entry
[0].vector
, adminq
);
2245 * If we enable msix early due to not intx, disable it again before
2246 * setting up the full range we need.
2249 pci_disable_msix(pdev
);
2251 for (i
= 0; i
< nr_io_queues
; i
++)
2252 dev
->entry
[i
].entry
= i
;
2253 vecs
= pci_enable_msix_range(pdev
, dev
->entry
, 1, nr_io_queues
);
2255 vecs
= pci_enable_msi_range(pdev
, 1, min(nr_io_queues
, 32));
2259 for (i
= 0; i
< vecs
; i
++)
2260 dev
->entry
[i
].vector
= i
+ pdev
->irq
;
2265 * Should investigate if there's a performance win from allocating
2266 * more queues than interrupt vectors; it might allow the submission
2267 * path to scale better, even if the receive path is limited by the
2268 * number of interrupts.
2270 nr_io_queues
= vecs
;
2271 dev
->max_qid
= nr_io_queues
;
2273 result
= queue_request_irq(dev
, adminq
, adminq
->irqname
);
2277 /* Free previously allocated queues that are no longer usable */
2278 nvme_free_queues(dev
, nr_io_queues
+ 1);
2279 nvme_create_io_queues(dev
);
2284 nvme_free_queues(dev
, 1);
2289 * Return: error value if an error occurred setting up the queues or calling
2290 * Identify Device. 0 if these succeeded, even if adding some of the
2291 * namespaces failed. At the moment, these failures are silent. TBD which
2292 * failures should be reported.
2294 static int nvme_dev_add(struct nvme_dev
*dev
)
2296 struct pci_dev
*pdev
= dev
->pci_dev
;
2299 struct nvme_id_ctrl
*ctrl
;
2301 dma_addr_t dma_addr
;
2302 int shift
= NVME_CAP_MPSMIN(readq(&dev
->bar
->cap
)) + 12;
2304 mem
= dma_alloc_coherent(&pdev
->dev
, 4096, &dma_addr
, GFP_KERNEL
);
2308 res
= nvme_identify(dev
, 0, 1, dma_addr
);
2310 dev_err(&pdev
->dev
, "Identify Controller failed (%d)\n", res
);
2311 dma_free_coherent(&dev
->pci_dev
->dev
, 4096, mem
, dma_addr
);
2316 nn
= le32_to_cpup(&ctrl
->nn
);
2317 dev
->oncs
= le16_to_cpup(&ctrl
->oncs
);
2318 dev
->abort_limit
= ctrl
->acl
+ 1;
2319 dev
->vwc
= ctrl
->vwc
;
2320 dev
->event_limit
= min(ctrl
->aerl
+ 1, 8);
2321 memcpy(dev
->serial
, ctrl
->sn
, sizeof(ctrl
->sn
));
2322 memcpy(dev
->model
, ctrl
->mn
, sizeof(ctrl
->mn
));
2323 memcpy(dev
->firmware_rev
, ctrl
->fr
, sizeof(ctrl
->fr
));
2325 dev
->max_hw_sectors
= 1 << (ctrl
->mdts
+ shift
- 9);
2326 if ((pdev
->vendor
== PCI_VENDOR_ID_INTEL
) &&
2327 (pdev
->device
== 0x0953) && ctrl
->vs
[3]) {
2328 unsigned int max_hw_sectors
;
2330 dev
->stripe_size
= 1 << (ctrl
->vs
[3] + shift
);
2331 max_hw_sectors
= dev
->stripe_size
>> (shift
- 9);
2332 if (dev
->max_hw_sectors
) {
2333 dev
->max_hw_sectors
= min(max_hw_sectors
,
2334 dev
->max_hw_sectors
);
2336 dev
->max_hw_sectors
= max_hw_sectors
;
2338 dma_free_coherent(&dev
->pci_dev
->dev
, 4096, mem
, dma_addr
);
2340 dev
->tagset
.ops
= &nvme_mq_ops
;
2341 dev
->tagset
.nr_hw_queues
= dev
->online_queues
- 1;
2342 dev
->tagset
.timeout
= NVME_IO_TIMEOUT
;
2343 dev
->tagset
.numa_node
= dev_to_node(&dev
->pci_dev
->dev
);
2344 dev
->tagset
.queue_depth
=
2345 min_t(int, dev
->q_depth
, BLK_MQ_MAX_DEPTH
) - 1;
2346 dev
->tagset
.cmd_size
= nvme_cmd_size(dev
);
2347 dev
->tagset
.flags
= BLK_MQ_F_SHOULD_MERGE
;
2348 dev
->tagset
.driver_data
= dev
;
2350 if (blk_mq_alloc_tag_set(&dev
->tagset
))
2353 for (i
= 1; i
<= nn
; i
++)
2354 nvme_alloc_ns(dev
, i
);
2359 static int nvme_dev_map(struct nvme_dev
*dev
)
2362 int bars
, result
= -ENOMEM
;
2363 struct pci_dev
*pdev
= dev
->pci_dev
;
2365 if (pci_enable_device_mem(pdev
))
2368 dev
->entry
[0].vector
= pdev
->irq
;
2369 pci_set_master(pdev
);
2370 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2374 if (pci_request_selected_regions(pdev
, bars
, "nvme"))
2377 if (dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64)) &&
2378 dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32)))
2381 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), 8192);
2385 if (readl(&dev
->bar
->csts
) == -1) {
2391 * Some devices don't advertse INTx interrupts, pre-enable a single
2392 * MSIX vec for setup. We'll adjust this later.
2395 result
= pci_enable_msix(pdev
, dev
->entry
, 1);
2400 cap
= readq(&dev
->bar
->cap
);
2401 dev
->q_depth
= min_t(int, NVME_CAP_MQES(cap
) + 1, NVME_Q_DEPTH
);
2402 dev
->db_stride
= 1 << NVME_CAP_STRIDE(cap
);
2403 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2411 pci_release_regions(pdev
);
2413 pci_disable_device(pdev
);
2417 static void nvme_dev_unmap(struct nvme_dev
*dev
)
2419 if (dev
->pci_dev
->msi_enabled
)
2420 pci_disable_msi(dev
->pci_dev
);
2421 else if (dev
->pci_dev
->msix_enabled
)
2422 pci_disable_msix(dev
->pci_dev
);
2427 pci_release_regions(dev
->pci_dev
);
2430 if (pci_is_enabled(dev
->pci_dev
))
2431 pci_disable_device(dev
->pci_dev
);
2434 struct nvme_delq_ctx
{
2435 struct task_struct
*waiter
;
2436 struct kthread_worker
*worker
;
2440 static void nvme_wait_dq(struct nvme_delq_ctx
*dq
, struct nvme_dev
*dev
)
2442 dq
->waiter
= current
;
2446 set_current_state(TASK_KILLABLE
);
2447 if (!atomic_read(&dq
->refcount
))
2449 if (!schedule_timeout(ADMIN_TIMEOUT
) ||
2450 fatal_signal_pending(current
)) {
2452 * Disable the controller first since we can't trust it
2453 * at this point, but leave the admin queue enabled
2454 * until all queue deletion requests are flushed.
2455 * FIXME: This may take a while if there are more h/w
2456 * queues than admin tags.
2458 set_current_state(TASK_RUNNING
);
2459 nvme_disable_ctrl(dev
, readq(&dev
->bar
->cap
));
2460 nvme_clear_queue(dev
->queues
[0]);
2461 flush_kthread_worker(dq
->worker
);
2462 nvme_disable_queue(dev
, 0);
2466 set_current_state(TASK_RUNNING
);
2469 static void nvme_put_dq(struct nvme_delq_ctx
*dq
)
2471 atomic_dec(&dq
->refcount
);
2473 wake_up_process(dq
->waiter
);
2476 static struct nvme_delq_ctx
*nvme_get_dq(struct nvme_delq_ctx
*dq
)
2478 atomic_inc(&dq
->refcount
);
2482 static void nvme_del_queue_end(struct nvme_queue
*nvmeq
)
2484 struct nvme_delq_ctx
*dq
= nvmeq
->cmdinfo
.ctx
;
2488 static int adapter_async_del_queue(struct nvme_queue
*nvmeq
, u8 opcode
,
2489 kthread_work_func_t fn
)
2491 struct nvme_command c
;
2493 memset(&c
, 0, sizeof(c
));
2494 c
.delete_queue
.opcode
= opcode
;
2495 c
.delete_queue
.qid
= cpu_to_le16(nvmeq
->qid
);
2497 init_kthread_work(&nvmeq
->cmdinfo
.work
, fn
);
2498 return nvme_submit_admin_async_cmd(nvmeq
->dev
, &c
, &nvmeq
->cmdinfo
,
2502 static void nvme_del_cq_work_handler(struct kthread_work
*work
)
2504 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2506 nvme_del_queue_end(nvmeq
);
2509 static int nvme_delete_cq(struct nvme_queue
*nvmeq
)
2511 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_cq
,
2512 nvme_del_cq_work_handler
);
2515 static void nvme_del_sq_work_handler(struct kthread_work
*work
)
2517 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2519 int status
= nvmeq
->cmdinfo
.status
;
2522 status
= nvme_delete_cq(nvmeq
);
2524 nvme_del_queue_end(nvmeq
);
2527 static int nvme_delete_sq(struct nvme_queue
*nvmeq
)
2529 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_sq
,
2530 nvme_del_sq_work_handler
);
2533 static void nvme_del_queue_start(struct kthread_work
*work
)
2535 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2537 if (nvme_delete_sq(nvmeq
))
2538 nvme_del_queue_end(nvmeq
);
2541 static void nvme_disable_io_queues(struct nvme_dev
*dev
)
2544 DEFINE_KTHREAD_WORKER_ONSTACK(worker
);
2545 struct nvme_delq_ctx dq
;
2546 struct task_struct
*kworker_task
= kthread_run(kthread_worker_fn
,
2547 &worker
, "nvme%d", dev
->instance
);
2549 if (IS_ERR(kworker_task
)) {
2550 dev_err(&dev
->pci_dev
->dev
,
2551 "Failed to create queue del task\n");
2552 for (i
= dev
->queue_count
- 1; i
> 0; i
--)
2553 nvme_disable_queue(dev
, i
);
2558 atomic_set(&dq
.refcount
, 0);
2559 dq
.worker
= &worker
;
2560 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
2561 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2563 if (nvme_suspend_queue(nvmeq
))
2565 nvmeq
->cmdinfo
.ctx
= nvme_get_dq(&dq
);
2566 nvmeq
->cmdinfo
.worker
= dq
.worker
;
2567 init_kthread_work(&nvmeq
->cmdinfo
.work
, nvme_del_queue_start
);
2568 queue_kthread_work(dq
.worker
, &nvmeq
->cmdinfo
.work
);
2570 nvme_wait_dq(&dq
, dev
);
2571 kthread_stop(kworker_task
);
2575 * Remove the node from the device list and check
2576 * for whether or not we need to stop the nvme_thread.
2578 static void nvme_dev_list_remove(struct nvme_dev
*dev
)
2580 struct task_struct
*tmp
= NULL
;
2582 spin_lock(&dev_list_lock
);
2583 list_del_init(&dev
->node
);
2584 if (list_empty(&dev_list
) && !IS_ERR_OR_NULL(nvme_thread
)) {
2588 spin_unlock(&dev_list_lock
);
2594 static void nvme_freeze_queues(struct nvme_dev
*dev
)
2598 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2599 blk_mq_freeze_queue_start(ns
->queue
);
2601 spin_lock(ns
->queue
->queue_lock
);
2602 queue_flag_set(QUEUE_FLAG_STOPPED
, ns
->queue
);
2603 spin_unlock(ns
->queue
->queue_lock
);
2605 blk_mq_cancel_requeue_work(ns
->queue
);
2606 blk_mq_stop_hw_queues(ns
->queue
);
2610 static void nvme_unfreeze_queues(struct nvme_dev
*dev
)
2614 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2615 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED
, ns
->queue
);
2616 blk_mq_unfreeze_queue(ns
->queue
);
2617 blk_mq_start_stopped_hw_queues(ns
->queue
, true);
2618 blk_mq_kick_requeue_list(ns
->queue
);
2622 static void nvme_dev_shutdown(struct nvme_dev
*dev
)
2627 nvme_dev_list_remove(dev
);
2630 nvme_freeze_queues(dev
);
2631 csts
= readl(&dev
->bar
->csts
);
2633 if (csts
& NVME_CSTS_CFS
|| !(csts
& NVME_CSTS_RDY
)) {
2634 for (i
= dev
->queue_count
- 1; i
>= 0; i
--) {
2635 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2636 nvme_suspend_queue(nvmeq
);
2639 nvme_disable_io_queues(dev
);
2640 nvme_shutdown_ctrl(dev
);
2641 nvme_disable_queue(dev
, 0);
2643 nvme_dev_unmap(dev
);
2645 for (i
= dev
->queue_count
- 1; i
>= 0; i
--)
2646 nvme_clear_queue(dev
->queues
[i
]);
2649 static void nvme_dev_remove(struct nvme_dev
*dev
)
2653 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2654 if (ns
->disk
->flags
& GENHD_FL_UP
) {
2655 if (ns
->disk
->integrity
)
2656 blk_integrity_unregister(ns
->disk
);
2657 del_gendisk(ns
->disk
);
2659 if (!blk_queue_dying(ns
->queue
)) {
2660 blk_mq_abort_requeue_list(ns
->queue
);
2661 blk_cleanup_queue(ns
->queue
);
2666 static int nvme_setup_prp_pools(struct nvme_dev
*dev
)
2668 struct device
*dmadev
= &dev
->pci_dev
->dev
;
2669 dev
->prp_page_pool
= dma_pool_create("prp list page", dmadev
,
2670 PAGE_SIZE
, PAGE_SIZE
, 0);
2671 if (!dev
->prp_page_pool
)
2674 /* Optimisation for I/Os between 4k and 128k */
2675 dev
->prp_small_pool
= dma_pool_create("prp list 256", dmadev
,
2677 if (!dev
->prp_small_pool
) {
2678 dma_pool_destroy(dev
->prp_page_pool
);
2684 static void nvme_release_prp_pools(struct nvme_dev
*dev
)
2686 dma_pool_destroy(dev
->prp_page_pool
);
2687 dma_pool_destroy(dev
->prp_small_pool
);
2690 static DEFINE_IDA(nvme_instance_ida
);
2692 static int nvme_set_instance(struct nvme_dev
*dev
)
2694 int instance
, error
;
2697 if (!ida_pre_get(&nvme_instance_ida
, GFP_KERNEL
))
2700 spin_lock(&dev_list_lock
);
2701 error
= ida_get_new(&nvme_instance_ida
, &instance
);
2702 spin_unlock(&dev_list_lock
);
2703 } while (error
== -EAGAIN
);
2708 dev
->instance
= instance
;
2712 static void nvme_release_instance(struct nvme_dev
*dev
)
2714 spin_lock(&dev_list_lock
);
2715 ida_remove(&nvme_instance_ida
, dev
->instance
);
2716 spin_unlock(&dev_list_lock
);
2719 static void nvme_free_namespaces(struct nvme_dev
*dev
)
2721 struct nvme_ns
*ns
, *next
;
2723 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
) {
2724 list_del(&ns
->list
);
2726 spin_lock(&dev_list_lock
);
2727 ns
->disk
->private_data
= NULL
;
2728 spin_unlock(&dev_list_lock
);
2735 static void nvme_free_dev(struct kref
*kref
)
2737 struct nvme_dev
*dev
= container_of(kref
, struct nvme_dev
, kref
);
2739 pci_dev_put(dev
->pci_dev
);
2740 put_device(dev
->device
);
2741 nvme_free_namespaces(dev
);
2742 nvme_release_instance(dev
);
2743 blk_mq_free_tag_set(&dev
->tagset
);
2744 blk_put_queue(dev
->admin_q
);
2750 static int nvme_dev_open(struct inode
*inode
, struct file
*f
)
2752 struct nvme_dev
*dev
;
2753 int instance
= iminor(inode
);
2756 spin_lock(&dev_list_lock
);
2757 list_for_each_entry(dev
, &dev_list
, node
) {
2758 if (dev
->instance
== instance
) {
2759 if (!dev
->admin_q
) {
2763 if (!kref_get_unless_zero(&dev
->kref
))
2765 f
->private_data
= dev
;
2770 spin_unlock(&dev_list_lock
);
2775 static int nvme_dev_release(struct inode
*inode
, struct file
*f
)
2777 struct nvme_dev
*dev
= f
->private_data
;
2778 kref_put(&dev
->kref
, nvme_free_dev
);
2782 static long nvme_dev_ioctl(struct file
*f
, unsigned int cmd
, unsigned long arg
)
2784 struct nvme_dev
*dev
= f
->private_data
;
2788 case NVME_IOCTL_ADMIN_CMD
:
2789 return nvme_user_cmd(dev
, NULL
, (void __user
*)arg
);
2790 case NVME_IOCTL_IO_CMD
:
2791 if (list_empty(&dev
->namespaces
))
2793 ns
= list_first_entry(&dev
->namespaces
, struct nvme_ns
, list
);
2794 return nvme_user_cmd(dev
, ns
, (void __user
*)arg
);
2800 static const struct file_operations nvme_dev_fops
= {
2801 .owner
= THIS_MODULE
,
2802 .open
= nvme_dev_open
,
2803 .release
= nvme_dev_release
,
2804 .unlocked_ioctl
= nvme_dev_ioctl
,
2805 .compat_ioctl
= nvme_dev_ioctl
,
2808 static void nvme_set_irq_hints(struct nvme_dev
*dev
)
2810 struct nvme_queue
*nvmeq
;
2813 for (i
= 0; i
< dev
->online_queues
; i
++) {
2814 nvmeq
= dev
->queues
[i
];
2819 irq_set_affinity_hint(dev
->entry
[nvmeq
->cq_vector
].vector
,
2820 nvmeq
->hctx
->cpumask
);
2824 static int nvme_dev_start(struct nvme_dev
*dev
)
2827 bool start_thread
= false;
2829 result
= nvme_dev_map(dev
);
2833 result
= nvme_configure_admin_queue(dev
);
2837 spin_lock(&dev_list_lock
);
2838 if (list_empty(&dev_list
) && IS_ERR_OR_NULL(nvme_thread
)) {
2839 start_thread
= true;
2842 list_add(&dev
->node
, &dev_list
);
2843 spin_unlock(&dev_list_lock
);
2846 nvme_thread
= kthread_run(nvme_kthread
, NULL
, "nvme");
2847 wake_up_all(&nvme_kthread_wait
);
2849 wait_event_killable(nvme_kthread_wait
, nvme_thread
);
2851 if (IS_ERR_OR_NULL(nvme_thread
)) {
2852 result
= nvme_thread
? PTR_ERR(nvme_thread
) : -EINTR
;
2856 nvme_init_queue(dev
->queues
[0], 0);
2857 result
= nvme_alloc_admin_tags(dev
);
2861 result
= nvme_setup_io_queues(dev
);
2865 nvme_set_irq_hints(dev
);
2870 nvme_dev_remove_admin(dev
);
2872 nvme_disable_queue(dev
, 0);
2873 nvme_dev_list_remove(dev
);
2875 nvme_dev_unmap(dev
);
2879 static int nvme_remove_dead_ctrl(void *arg
)
2881 struct nvme_dev
*dev
= (struct nvme_dev
*)arg
;
2882 struct pci_dev
*pdev
= dev
->pci_dev
;
2884 if (pci_get_drvdata(pdev
))
2885 pci_stop_and_remove_bus_device_locked(pdev
);
2886 kref_put(&dev
->kref
, nvme_free_dev
);
2890 static void nvme_remove_disks(struct work_struct
*ws
)
2892 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2894 nvme_free_queues(dev
, 1);
2895 nvme_dev_remove(dev
);
2898 static int nvme_dev_resume(struct nvme_dev
*dev
)
2902 ret
= nvme_dev_start(dev
);
2905 if (dev
->online_queues
< 2) {
2906 spin_lock(&dev_list_lock
);
2907 dev
->reset_workfn
= nvme_remove_disks
;
2908 queue_work(nvme_workq
, &dev
->reset_work
);
2909 spin_unlock(&dev_list_lock
);
2911 nvme_unfreeze_queues(dev
);
2912 nvme_set_irq_hints(dev
);
2917 static void nvme_dev_reset(struct nvme_dev
*dev
)
2919 nvme_dev_shutdown(dev
);
2920 if (nvme_dev_resume(dev
)) {
2921 dev_warn(&dev
->pci_dev
->dev
, "Device failed to resume\n");
2922 kref_get(&dev
->kref
);
2923 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl
, dev
, "nvme%d",
2925 dev_err(&dev
->pci_dev
->dev
,
2926 "Failed to start controller remove task\n");
2927 kref_put(&dev
->kref
, nvme_free_dev
);
2932 static void nvme_reset_failed_dev(struct work_struct
*ws
)
2934 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2935 nvme_dev_reset(dev
);
2938 static void nvme_reset_workfn(struct work_struct
*work
)
2940 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, reset_work
);
2941 dev
->reset_workfn(work
);
2944 static void nvme_async_probe(struct work_struct
*work
);
2945 static int nvme_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2947 int node
, result
= -ENOMEM
;
2948 struct nvme_dev
*dev
;
2950 node
= dev_to_node(&pdev
->dev
);
2951 if (node
== NUMA_NO_NODE
)
2952 set_dev_node(&pdev
->dev
, 0);
2954 dev
= kzalloc_node(sizeof(*dev
), GFP_KERNEL
, node
);
2957 dev
->entry
= kzalloc_node(num_possible_cpus() * sizeof(*dev
->entry
),
2961 dev
->queues
= kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2966 INIT_LIST_HEAD(&dev
->namespaces
);
2967 dev
->reset_workfn
= nvme_reset_failed_dev
;
2968 INIT_WORK(&dev
->reset_work
, nvme_reset_workfn
);
2969 dev
->pci_dev
= pci_dev_get(pdev
);
2970 pci_set_drvdata(pdev
, dev
);
2971 result
= nvme_set_instance(dev
);
2975 result
= nvme_setup_prp_pools(dev
);
2979 kref_init(&dev
->kref
);
2980 dev
->device
= device_create(nvme_class
, &pdev
->dev
,
2981 MKDEV(nvme_char_major
, dev
->instance
),
2982 dev
, "nvme%d", dev
->instance
);
2983 if (IS_ERR(dev
->device
)) {
2984 result
= PTR_ERR(dev
->device
);
2987 get_device(dev
->device
);
2989 INIT_WORK(&dev
->probe_work
, nvme_async_probe
);
2990 schedule_work(&dev
->probe_work
);
2994 nvme_release_prp_pools(dev
);
2996 nvme_release_instance(dev
);
2998 pci_dev_put(dev
->pci_dev
);
3006 static void nvme_async_probe(struct work_struct
*work
)
3008 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, probe_work
);
3011 result
= nvme_dev_start(dev
);
3015 if (dev
->online_queues
> 1)
3016 result
= nvme_dev_add(dev
);
3020 nvme_set_irq_hints(dev
);
3023 if (!work_busy(&dev
->reset_work
)) {
3024 dev
->reset_workfn
= nvme_reset_failed_dev
;
3025 queue_work(nvme_workq
, &dev
->reset_work
);
3029 static void nvme_reset_notify(struct pci_dev
*pdev
, bool prepare
)
3031 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3034 nvme_dev_shutdown(dev
);
3036 nvme_dev_resume(dev
);
3039 static void nvme_shutdown(struct pci_dev
*pdev
)
3041 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3042 nvme_dev_shutdown(dev
);
3045 static void nvme_remove(struct pci_dev
*pdev
)
3047 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
3049 spin_lock(&dev_list_lock
);
3050 list_del_init(&dev
->node
);
3051 spin_unlock(&dev_list_lock
);
3053 pci_set_drvdata(pdev
, NULL
);
3054 flush_work(&dev
->probe_work
);
3055 flush_work(&dev
->reset_work
);
3056 nvme_dev_shutdown(dev
);
3057 nvme_dev_remove(dev
);
3058 nvme_dev_remove_admin(dev
);
3059 device_destroy(nvme_class
, MKDEV(nvme_char_major
, dev
->instance
));
3060 nvme_free_queues(dev
, 0);
3061 nvme_release_prp_pools(dev
);
3062 kref_put(&dev
->kref
, nvme_free_dev
);
3065 /* These functions are yet to be implemented */
3066 #define nvme_error_detected NULL
3067 #define nvme_dump_registers NULL
3068 #define nvme_link_reset NULL
3069 #define nvme_slot_reset NULL
3070 #define nvme_error_resume NULL
3072 #ifdef CONFIG_PM_SLEEP
3073 static int nvme_suspend(struct device
*dev
)
3075 struct pci_dev
*pdev
= to_pci_dev(dev
);
3076 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
3078 nvme_dev_shutdown(ndev
);
3082 static int nvme_resume(struct device
*dev
)
3084 struct pci_dev
*pdev
= to_pci_dev(dev
);
3085 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
3087 if (nvme_dev_resume(ndev
) && !work_busy(&ndev
->reset_work
)) {
3088 ndev
->reset_workfn
= nvme_reset_failed_dev
;
3089 queue_work(nvme_workq
, &ndev
->reset_work
);
3095 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops
, nvme_suspend
, nvme_resume
);
3097 static const struct pci_error_handlers nvme_err_handler
= {
3098 .error_detected
= nvme_error_detected
,
3099 .mmio_enabled
= nvme_dump_registers
,
3100 .link_reset
= nvme_link_reset
,
3101 .slot_reset
= nvme_slot_reset
,
3102 .resume
= nvme_error_resume
,
3103 .reset_notify
= nvme_reset_notify
,
3106 /* Move to pci_ids.h later */
3107 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3109 static const struct pci_device_id nvme_id_table
[] = {
3110 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS
, 0xffffff) },
3113 MODULE_DEVICE_TABLE(pci
, nvme_id_table
);
3115 static struct pci_driver nvme_driver
= {
3117 .id_table
= nvme_id_table
,
3118 .probe
= nvme_probe
,
3119 .remove
= nvme_remove
,
3120 .shutdown
= nvme_shutdown
,
3122 .pm
= &nvme_dev_pm_ops
,
3124 .err_handler
= &nvme_err_handler
,
3127 static int __init
nvme_init(void)
3131 init_waitqueue_head(&nvme_kthread_wait
);
3133 nvme_workq
= create_singlethread_workqueue("nvme");
3137 result
= register_blkdev(nvme_major
, "nvme");
3140 else if (result
> 0)
3141 nvme_major
= result
;
3143 result
= __register_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme",
3146 goto unregister_blkdev
;
3147 else if (result
> 0)
3148 nvme_char_major
= result
;
3150 nvme_class
= class_create(THIS_MODULE
, "nvme");
3152 goto unregister_chrdev
;
3154 result
= pci_register_driver(&nvme_driver
);
3160 class_destroy(nvme_class
);
3162 __unregister_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme");
3164 unregister_blkdev(nvme_major
, "nvme");
3166 destroy_workqueue(nvme_workq
);
3170 static void __exit
nvme_exit(void)
3172 pci_unregister_driver(&nvme_driver
);
3173 unregister_blkdev(nvme_major
, "nvme");
3174 destroy_workqueue(nvme_workq
);
3175 class_destroy(nvme_class
);
3176 __unregister_chrdev(nvme_char_major
, 0, NVME_MINORS
, "nvme");
3177 BUG_ON(nvme_thread
&& !IS_ERR(nvme_thread
));
3181 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3182 MODULE_LICENSE("GPL");
3183 MODULE_VERSION("1.0");
3184 module_init(nvme_init
);
3185 module_exit(nvme_exit
);