2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/types.h>
42 #include <asm-generic/io-64-nonatomic-lo-hi.h>
44 #define NVME_Q_DEPTH 1024
45 #define NVME_AQ_DEPTH 64
46 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
47 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
48 #define ADMIN_TIMEOUT (admin_timeout * HZ)
49 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
50 #define IOD_TIMEOUT (retry_time * HZ)
52 static unsigned char admin_timeout
= 60;
53 module_param(admin_timeout
, byte
, 0644);
54 MODULE_PARM_DESC(admin_timeout
, "timeout in seconds for admin commands");
56 unsigned char nvme_io_timeout
= 30;
57 module_param_named(io_timeout
, nvme_io_timeout
, byte
, 0644);
58 MODULE_PARM_DESC(io_timeout
, "timeout in seconds for I/O");
60 static unsigned char retry_time
= 30;
61 module_param(retry_time
, byte
, 0644);
62 MODULE_PARM_DESC(retry_time
, "time in seconds to retry failed I/O");
64 static unsigned char shutdown_timeout
= 5;
65 module_param(shutdown_timeout
, byte
, 0644);
66 MODULE_PARM_DESC(shutdown_timeout
, "timeout in seconds for controller shutdown");
68 static int nvme_major
;
69 module_param(nvme_major
, int, 0);
71 static int use_threaded_interrupts
;
72 module_param(use_threaded_interrupts
, int, 0);
74 static DEFINE_SPINLOCK(dev_list_lock
);
75 static LIST_HEAD(dev_list
);
76 static struct task_struct
*nvme_thread
;
77 static struct workqueue_struct
*nvme_workq
;
78 static wait_queue_head_t nvme_kthread_wait
;
79 static struct notifier_block nvme_nb
;
81 static void nvme_reset_failed_dev(struct work_struct
*ws
);
82 static int nvme_process_cq(struct nvme_queue
*nvmeq
);
84 struct async_cmd_info
{
85 struct kthread_work work
;
86 struct kthread_worker
*worker
;
94 * An NVM Express queue. Each device has at least two (one for admin
95 * commands and one for I/O commands).
98 struct llist_node node
;
99 struct device
*q_dmadev
;
100 struct nvme_dev
*dev
;
101 char irqname
[24]; /* nvme4294967295-65535\0 */
103 struct nvme_command
*sq_cmds
;
104 volatile struct nvme_completion
*cqes
;
105 dma_addr_t sq_dma_addr
;
106 dma_addr_t cq_dma_addr
;
116 struct async_cmd_info cmdinfo
;
117 struct blk_mq_hw_ctx
*hctx
;
121 * Check we didin't inadvertently grow the command struct
123 static inline void _nvme_check_size(void)
125 BUILD_BUG_ON(sizeof(struct nvme_rw_command
) != 64);
126 BUILD_BUG_ON(sizeof(struct nvme_create_cq
) != 64);
127 BUILD_BUG_ON(sizeof(struct nvme_create_sq
) != 64);
128 BUILD_BUG_ON(sizeof(struct nvme_delete_queue
) != 64);
129 BUILD_BUG_ON(sizeof(struct nvme_features
) != 64);
130 BUILD_BUG_ON(sizeof(struct nvme_format_cmd
) != 64);
131 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd
) != 64);
132 BUILD_BUG_ON(sizeof(struct nvme_command
) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl
) != 4096);
134 BUILD_BUG_ON(sizeof(struct nvme_id_ns
) != 4096);
135 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type
) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_smart_log
) != 512);
139 typedef void (*nvme_completion_fn
)(struct nvme_queue
*, void *,
140 struct nvme_completion
*);
142 struct nvme_cmd_info
{
143 nvme_completion_fn fn
;
146 struct nvme_queue
*nvmeq
;
149 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
150 unsigned int hctx_idx
)
152 struct nvme_dev
*dev
= data
;
153 struct nvme_queue
*nvmeq
= dev
->queues
[0];
155 WARN_ON(nvmeq
->hctx
);
157 hctx
->driver_data
= nvmeq
;
161 static int nvme_admin_init_request(void *data
, struct request
*req
,
162 unsigned int hctx_idx
, unsigned int rq_idx
,
163 unsigned int numa_node
)
165 struct nvme_dev
*dev
= data
;
166 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
167 struct nvme_queue
*nvmeq
= dev
->queues
[0];
174 static int nvme_init_hctx(struct blk_mq_hw_ctx
*hctx
, void *data
,
175 unsigned int hctx_idx
)
177 struct nvme_dev
*dev
= data
;
178 struct nvme_queue
*nvmeq
= dev
->queues
[
179 (hctx_idx
% dev
->queue_count
) + 1];
184 /* nvmeq queues are shared between namespaces. We assume here that
185 * blk-mq map the tags so they match up with the nvme queue tags. */
186 WARN_ON(nvmeq
->hctx
->tags
!= hctx
->tags
);
188 hctx
->driver_data
= nvmeq
;
192 static int nvme_init_request(void *data
, struct request
*req
,
193 unsigned int hctx_idx
, unsigned int rq_idx
,
194 unsigned int numa_node
)
196 struct nvme_dev
*dev
= data
;
197 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
198 struct nvme_queue
*nvmeq
= dev
->queues
[hctx_idx
+ 1];
205 static void nvme_set_info(struct nvme_cmd_info
*cmd
, void *ctx
,
206 nvme_completion_fn handler
)
213 /* Special values must be less than 0x1000 */
214 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
215 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
216 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
217 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
219 static void special_completion(struct nvme_queue
*nvmeq
, void *ctx
,
220 struct nvme_completion
*cqe
)
222 if (ctx
== CMD_CTX_CANCELLED
)
224 if (ctx
== CMD_CTX_COMPLETED
) {
225 dev_warn(nvmeq
->q_dmadev
,
226 "completed id %d twice on queue %d\n",
227 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
230 if (ctx
== CMD_CTX_INVALID
) {
231 dev_warn(nvmeq
->q_dmadev
,
232 "invalid id %d completed on queue %d\n",
233 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
236 dev_warn(nvmeq
->q_dmadev
, "Unknown special completion %p\n", ctx
);
239 static void *cancel_cmd_info(struct nvme_cmd_info
*cmd
, nvme_completion_fn
*fn
)
246 cmd
->fn
= special_completion
;
247 cmd
->ctx
= CMD_CTX_CANCELLED
;
251 static void async_req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
252 struct nvme_completion
*cqe
)
254 struct request
*req
= ctx
;
256 u32 result
= le32_to_cpup(&cqe
->result
);
257 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
259 if (status
== NVME_SC_SUCCESS
|| status
== NVME_SC_ABORT_REQ
)
260 ++nvmeq
->dev
->event_limit
;
261 if (status
== NVME_SC_SUCCESS
)
262 dev_warn(nvmeq
->q_dmadev
,
263 "async event result %08x\n", result
);
265 blk_mq_free_hctx_request(nvmeq
->hctx
, req
);
268 static void abort_completion(struct nvme_queue
*nvmeq
, void *ctx
,
269 struct nvme_completion
*cqe
)
271 struct request
*req
= ctx
;
273 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
274 u32 result
= le32_to_cpup(&cqe
->result
);
276 blk_mq_free_hctx_request(nvmeq
->hctx
, req
);
278 dev_warn(nvmeq
->q_dmadev
, "Abort status:%x result:%x", status
, result
);
279 ++nvmeq
->dev
->abort_limit
;
282 static void async_completion(struct nvme_queue
*nvmeq
, void *ctx
,
283 struct nvme_completion
*cqe
)
285 struct async_cmd_info
*cmdinfo
= ctx
;
286 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
287 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
288 queue_kthread_work(cmdinfo
->worker
, &cmdinfo
->work
);
289 blk_mq_free_hctx_request(nvmeq
->hctx
, cmdinfo
->req
);
292 static inline struct nvme_cmd_info
*get_cmd_from_tag(struct nvme_queue
*nvmeq
,
295 struct blk_mq_hw_ctx
*hctx
= nvmeq
->hctx
;
296 struct request
*req
= blk_mq_tag_to_rq(hctx
->tags
, tag
);
298 return blk_mq_rq_to_pdu(req
);
302 * Called with local interrupts disabled and the q_lock held. May not sleep.
304 static void *nvme_finish_cmd(struct nvme_queue
*nvmeq
, int tag
,
305 nvme_completion_fn
*fn
)
307 struct nvme_cmd_info
*cmd
= get_cmd_from_tag(nvmeq
, tag
);
309 if (tag
>= nvmeq
->q_depth
) {
310 *fn
= special_completion
;
311 return CMD_CTX_INVALID
;
316 cmd
->fn
= special_completion
;
317 cmd
->ctx
= CMD_CTX_COMPLETED
;
322 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
323 * @nvmeq: The queue to use
324 * @cmd: The command to send
326 * Safe to use from interrupt context
328 static int __nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
330 u16 tail
= nvmeq
->sq_tail
;
332 memcpy(&nvmeq
->sq_cmds
[tail
], cmd
, sizeof(*cmd
));
333 if (++tail
== nvmeq
->q_depth
)
335 writel(tail
, nvmeq
->q_db
);
336 nvmeq
->sq_tail
= tail
;
341 static int nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
345 spin_lock_irqsave(&nvmeq
->q_lock
, flags
);
346 ret
= __nvme_submit_cmd(nvmeq
, cmd
);
347 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
351 static __le64
**iod_list(struct nvme_iod
*iod
)
353 return ((void *)iod
) + iod
->offset
;
357 * Will slightly overestimate the number of pages needed. This is OK
358 * as it only leads to a small amount of wasted memory for the lifetime of
361 static int nvme_npages(unsigned size
, struct nvme_dev
*dev
)
363 unsigned nprps
= DIV_ROUND_UP(size
+ dev
->page_size
, dev
->page_size
);
364 return DIV_ROUND_UP(8 * nprps
, dev
->page_size
- 8);
367 static struct nvme_iod
*
368 nvme_alloc_iod(unsigned nseg
, unsigned nbytes
, struct nvme_dev
*dev
, gfp_t gfp
)
370 struct nvme_iod
*iod
= kmalloc(sizeof(struct nvme_iod
) +
371 sizeof(__le64
*) * nvme_npages(nbytes
, dev
) +
372 sizeof(struct scatterlist
) * nseg
, gfp
);
375 iod
->offset
= offsetof(struct nvme_iod
, sg
[nseg
]);
377 iod
->length
= nbytes
;
379 iod
->first_dma
= 0ULL;
385 void nvme_free_iod(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
387 const int last_prp
= dev
->page_size
/ 8 - 1;
389 __le64
**list
= iod_list(iod
);
390 dma_addr_t prp_dma
= iod
->first_dma
;
392 if (iod
->npages
== 0)
393 dma_pool_free(dev
->prp_small_pool
, list
[0], prp_dma
);
394 for (i
= 0; i
< iod
->npages
; i
++) {
395 __le64
*prp_list
= list
[i
];
396 dma_addr_t next_prp_dma
= le64_to_cpu(prp_list
[last_prp
]);
397 dma_pool_free(dev
->prp_page_pool
, prp_list
, prp_dma
);
398 prp_dma
= next_prp_dma
;
403 static int nvme_error_status(u16 status
)
405 switch (status
& 0x7ff) {
406 case NVME_SC_SUCCESS
:
408 case NVME_SC_CAP_EXCEEDED
:
415 static void req_completion(struct nvme_queue
*nvmeq
, void *ctx
,
416 struct nvme_completion
*cqe
)
418 struct nvme_iod
*iod
= ctx
;
419 struct request
*req
= iod
->private;
420 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
422 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
424 if (unlikely(status
)) {
425 if (!(status
& NVME_SC_DNR
|| blk_noretry_request(req
))
426 && (jiffies
- req
->start_time
) < req
->timeout
) {
427 blk_mq_requeue_request(req
);
428 blk_mq_kick_requeue_list(req
->q
);
431 req
->errors
= nvme_error_status(status
);
436 dev_warn(&nvmeq
->dev
->pci_dev
->dev
,
437 "completing aborted command with status:%04x\n",
441 dma_unmap_sg(&nvmeq
->dev
->pci_dev
->dev
, iod
->sg
, iod
->nents
,
442 rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
443 nvme_free_iod(nvmeq
->dev
, iod
);
445 blk_mq_complete_request(req
);
448 /* length is in bytes. gfp flags indicates whether we may sleep. */
449 int nvme_setup_prps(struct nvme_dev
*dev
, struct nvme_iod
*iod
, int total_len
,
452 struct dma_pool
*pool
;
453 int length
= total_len
;
454 struct scatterlist
*sg
= iod
->sg
;
455 int dma_len
= sg_dma_len(sg
);
456 u64 dma_addr
= sg_dma_address(sg
);
457 int offset
= offset_in_page(dma_addr
);
459 __le64
**list
= iod_list(iod
);
462 u32 page_size
= dev
->page_size
;
464 length
-= (page_size
- offset
);
468 dma_len
-= (page_size
- offset
);
470 dma_addr
+= (page_size
- offset
);
473 dma_addr
= sg_dma_address(sg
);
474 dma_len
= sg_dma_len(sg
);
477 if (length
<= page_size
) {
478 iod
->first_dma
= dma_addr
;
482 nprps
= DIV_ROUND_UP(length
, page_size
);
483 if (nprps
<= (256 / 8)) {
484 pool
= dev
->prp_small_pool
;
487 pool
= dev
->prp_page_pool
;
491 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
493 iod
->first_dma
= dma_addr
;
495 return (total_len
- length
) + page_size
;
498 iod
->first_dma
= prp_dma
;
501 if (i
== page_size
>> 3) {
502 __le64
*old_prp_list
= prp_list
;
503 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
505 return total_len
- length
;
506 list
[iod
->npages
++] = prp_list
;
507 prp_list
[0] = old_prp_list
[i
- 1];
508 old_prp_list
[i
- 1] = cpu_to_le64(prp_dma
);
511 prp_list
[i
++] = cpu_to_le64(dma_addr
);
512 dma_len
-= page_size
;
513 dma_addr
+= page_size
;
521 dma_addr
= sg_dma_address(sg
);
522 dma_len
= sg_dma_len(sg
);
529 * We reuse the small pool to allocate the 16-byte range here as it is not
530 * worth having a special pool for these or additional cases to handle freeing
533 static void nvme_submit_discard(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
534 struct request
*req
, struct nvme_iod
*iod
)
536 struct nvme_dsm_range
*range
=
537 (struct nvme_dsm_range
*)iod_list(iod
)[0];
538 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
540 range
->cattr
= cpu_to_le32(0);
541 range
->nlb
= cpu_to_le32(blk_rq_bytes(req
) >> ns
->lba_shift
);
542 range
->slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
544 memset(cmnd
, 0, sizeof(*cmnd
));
545 cmnd
->dsm
.opcode
= nvme_cmd_dsm
;
546 cmnd
->dsm
.command_id
= req
->tag
;
547 cmnd
->dsm
.nsid
= cpu_to_le32(ns
->ns_id
);
548 cmnd
->dsm
.prp1
= cpu_to_le64(iod
->first_dma
);
550 cmnd
->dsm
.attributes
= cpu_to_le32(NVME_DSMGMT_AD
);
552 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
554 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
557 static void nvme_submit_flush(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
560 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
562 memset(cmnd
, 0, sizeof(*cmnd
));
563 cmnd
->common
.opcode
= nvme_cmd_flush
;
564 cmnd
->common
.command_id
= cmdid
;
565 cmnd
->common
.nsid
= cpu_to_le32(ns
->ns_id
);
567 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
569 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
572 static int nvme_submit_iod(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
,
575 struct request
*req
= iod
->private;
576 struct nvme_command
*cmnd
;
580 if (req
->cmd_flags
& REQ_FUA
)
581 control
|= NVME_RW_FUA
;
582 if (req
->cmd_flags
& (REQ_FAILFAST_DEV
| REQ_RAHEAD
))
583 control
|= NVME_RW_LR
;
585 if (req
->cmd_flags
& REQ_RAHEAD
)
586 dsmgmt
|= NVME_RW_DSM_FREQ_PREFETCH
;
588 cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
589 memset(cmnd
, 0, sizeof(*cmnd
));
591 cmnd
->rw
.opcode
= (rq_data_dir(req
) ? nvme_cmd_write
: nvme_cmd_read
);
592 cmnd
->rw
.command_id
= req
->tag
;
593 cmnd
->rw
.nsid
= cpu_to_le32(ns
->ns_id
);
594 cmnd
->rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
595 cmnd
->rw
.prp2
= cpu_to_le64(iod
->first_dma
);
596 cmnd
->rw
.slba
= cpu_to_le64(nvme_block_nr(ns
, blk_rq_pos(req
)));
597 cmnd
->rw
.length
= cpu_to_le16((blk_rq_bytes(req
) >> ns
->lba_shift
) - 1);
598 cmnd
->rw
.control
= cpu_to_le16(control
);
599 cmnd
->rw
.dsmgmt
= cpu_to_le32(dsmgmt
);
601 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
603 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
608 static int nvme_queue_rq(struct blk_mq_hw_ctx
*hctx
,
609 const struct blk_mq_queue_data
*bd
)
611 struct nvme_ns
*ns
= hctx
->queue
->queuedata
;
612 struct nvme_queue
*nvmeq
= hctx
->driver_data
;
613 struct request
*req
= bd
->rq
;
614 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
615 struct nvme_iod
*iod
;
616 int psegs
= req
->nr_phys_segments
;
617 int result
= BLK_MQ_RQ_QUEUE_BUSY
;
618 enum dma_data_direction dma_dir
;
619 unsigned size
= !(req
->cmd_flags
& REQ_DISCARD
) ? blk_rq_bytes(req
) :
620 sizeof(struct nvme_dsm_range
);
623 * Requeued IO has already been prepped
629 iod
= nvme_alloc_iod(psegs
, size
, ns
->dev
, GFP_ATOMIC
);
636 nvme_set_info(cmd
, iod
, req_completion
);
638 if (req
->cmd_flags
& REQ_DISCARD
) {
641 * We reuse the small pool to allocate the 16-byte range here
642 * as it is not worth having a special pool for these or
643 * additional cases to handle freeing the iod.
645 range
= dma_pool_alloc(nvmeq
->dev
->prp_small_pool
,
650 iod_list(iod
)[0] = (__le64
*)range
;
653 dma_dir
= rq_data_dir(req
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
655 sg_init_table(iod
->sg
, psegs
);
656 iod
->nents
= blk_rq_map_sg(req
->q
, req
, iod
->sg
);
658 result
= BLK_MQ_RQ_QUEUE_ERROR
;
662 if (!dma_map_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
, dma_dir
))
665 if (blk_rq_bytes(req
) != nvme_setup_prps(nvmeq
->dev
, iod
,
666 blk_rq_bytes(req
), GFP_ATOMIC
))
670 blk_mq_start_request(req
);
673 spin_lock_irq(&nvmeq
->q_lock
);
674 if (req
->cmd_flags
& REQ_DISCARD
)
675 nvme_submit_discard(nvmeq
, ns
, req
, iod
);
676 else if (req
->cmd_flags
& REQ_FLUSH
)
677 nvme_submit_flush(nvmeq
, ns
, req
->tag
);
679 nvme_submit_iod(nvmeq
, iod
, ns
);
681 nvme_process_cq(nvmeq
);
682 spin_unlock_irq(&nvmeq
->q_lock
);
683 return BLK_MQ_RQ_QUEUE_OK
;
686 nvme_finish_cmd(nvmeq
, req
->tag
, NULL
);
687 nvme_free_iod(nvmeq
->dev
, iod
);
691 static int nvme_process_cq(struct nvme_queue
*nvmeq
)
695 head
= nvmeq
->cq_head
;
696 phase
= nvmeq
->cq_phase
;
700 nvme_completion_fn fn
;
701 struct nvme_completion cqe
= nvmeq
->cqes
[head
];
702 if ((le16_to_cpu(cqe
.status
) & 1) != phase
)
704 nvmeq
->sq_head
= le16_to_cpu(cqe
.sq_head
);
705 if (++head
== nvmeq
->q_depth
) {
709 ctx
= nvme_finish_cmd(nvmeq
, cqe
.command_id
, &fn
);
710 fn(nvmeq
, ctx
, &cqe
);
713 /* If the controller ignores the cq head doorbell and continuously
714 * writes to the queue, it is theoretically possible to wrap around
715 * the queue twice and mistakenly return IRQ_NONE. Linux only
716 * requires that 0.1% of your interrupts are handled, so this isn't
719 if (head
== nvmeq
->cq_head
&& phase
== nvmeq
->cq_phase
)
722 writel(head
, nvmeq
->q_db
+ nvmeq
->dev
->db_stride
);
723 nvmeq
->cq_head
= head
;
724 nvmeq
->cq_phase
= phase
;
730 /* Admin queue isn't initialized as a request queue. If at some point this
731 * happens anyway, make sure to notify the user */
732 static int nvme_admin_queue_rq(struct blk_mq_hw_ctx
*hctx
,
733 const struct blk_mq_queue_data
*bd
)
736 return BLK_MQ_RQ_QUEUE_ERROR
;
739 static irqreturn_t
nvme_irq(int irq
, void *data
)
742 struct nvme_queue
*nvmeq
= data
;
743 spin_lock(&nvmeq
->q_lock
);
744 nvme_process_cq(nvmeq
);
745 result
= nvmeq
->cqe_seen
? IRQ_HANDLED
: IRQ_NONE
;
747 spin_unlock(&nvmeq
->q_lock
);
751 static irqreturn_t
nvme_irq_check(int irq
, void *data
)
753 struct nvme_queue
*nvmeq
= data
;
754 struct nvme_completion cqe
= nvmeq
->cqes
[nvmeq
->cq_head
];
755 if ((le16_to_cpu(cqe
.status
) & 1) != nvmeq
->cq_phase
)
757 return IRQ_WAKE_THREAD
;
760 static void nvme_abort_cmd_info(struct nvme_queue
*nvmeq
, struct nvme_cmd_info
*
763 spin_lock_irq(&nvmeq
->q_lock
);
764 cancel_cmd_info(cmd_info
, NULL
);
765 spin_unlock_irq(&nvmeq
->q_lock
);
768 struct sync_cmd_info
{
769 struct task_struct
*task
;
774 static void sync_completion(struct nvme_queue
*nvmeq
, void *ctx
,
775 struct nvme_completion
*cqe
)
777 struct sync_cmd_info
*cmdinfo
= ctx
;
778 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
779 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
780 wake_up_process(cmdinfo
->task
);
784 * Returns 0 on success. If the result is negative, it's a Linux error code;
785 * if the result is positive, it's an NVM Express status code
787 static int nvme_submit_sync_cmd(struct request
*req
, struct nvme_command
*cmd
,
788 u32
*result
, unsigned timeout
)
791 struct sync_cmd_info cmdinfo
;
792 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
793 struct nvme_queue
*nvmeq
= cmd_rq
->nvmeq
;
795 cmdinfo
.task
= current
;
796 cmdinfo
.status
= -EINTR
;
798 cmd
->common
.command_id
= req
->tag
;
800 nvme_set_info(cmd_rq
, &cmdinfo
, sync_completion
);
802 set_current_state(TASK_KILLABLE
);
803 ret
= nvme_submit_cmd(nvmeq
, cmd
);
805 nvme_finish_cmd(nvmeq
, req
->tag
, NULL
);
806 set_current_state(TASK_RUNNING
);
808 schedule_timeout(timeout
);
810 if (cmdinfo
.status
== -EINTR
) {
811 nvme_abort_cmd_info(nvmeq
, blk_mq_rq_to_pdu(req
));
816 *result
= cmdinfo
.result
;
818 return cmdinfo
.status
;
821 static int nvme_submit_async_admin_req(struct nvme_dev
*dev
)
823 struct nvme_queue
*nvmeq
= dev
->queues
[0];
824 struct nvme_command c
;
825 struct nvme_cmd_info
*cmd_info
;
828 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
, false);
832 cmd_info
= blk_mq_rq_to_pdu(req
);
833 nvme_set_info(cmd_info
, req
, async_req_completion
);
835 memset(&c
, 0, sizeof(c
));
836 c
.common
.opcode
= nvme_admin_async_event
;
837 c
.common
.command_id
= req
->tag
;
839 return __nvme_submit_cmd(nvmeq
, &c
);
842 static int nvme_submit_admin_async_cmd(struct nvme_dev
*dev
,
843 struct nvme_command
*cmd
,
844 struct async_cmd_info
*cmdinfo
, unsigned timeout
)
846 struct nvme_queue
*nvmeq
= dev
->queues
[0];
848 struct nvme_cmd_info
*cmd_rq
;
850 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_KERNEL
, false);
854 req
->timeout
= timeout
;
855 cmd_rq
= blk_mq_rq_to_pdu(req
);
857 nvme_set_info(cmd_rq
, cmdinfo
, async_completion
);
858 cmdinfo
->status
= -EINTR
;
860 cmd
->common
.command_id
= req
->tag
;
862 return nvme_submit_cmd(nvmeq
, cmd
);
865 static int __nvme_submit_admin_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
866 u32
*result
, unsigned timeout
)
871 req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_KERNEL
, false);
874 res
= nvme_submit_sync_cmd(req
, cmd
, result
, timeout
);
875 blk_mq_free_request(req
);
879 int nvme_submit_admin_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
882 return __nvme_submit_admin_cmd(dev
, cmd
, result
, ADMIN_TIMEOUT
);
885 int nvme_submit_io_cmd(struct nvme_dev
*dev
, struct nvme_ns
*ns
,
886 struct nvme_command
*cmd
, u32
*result
)
891 req
= blk_mq_alloc_request(ns
->queue
, WRITE
, (GFP_KERNEL
|__GFP_WAIT
),
895 res
= nvme_submit_sync_cmd(req
, cmd
, result
, NVME_IO_TIMEOUT
);
896 blk_mq_free_request(req
);
900 static int adapter_delete_queue(struct nvme_dev
*dev
, u8 opcode
, u16 id
)
902 struct nvme_command c
;
904 memset(&c
, 0, sizeof(c
));
905 c
.delete_queue
.opcode
= opcode
;
906 c
.delete_queue
.qid
= cpu_to_le16(id
);
908 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
911 static int adapter_alloc_cq(struct nvme_dev
*dev
, u16 qid
,
912 struct nvme_queue
*nvmeq
)
914 struct nvme_command c
;
915 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_CQ_IRQ_ENABLED
;
917 memset(&c
, 0, sizeof(c
));
918 c
.create_cq
.opcode
= nvme_admin_create_cq
;
919 c
.create_cq
.prp1
= cpu_to_le64(nvmeq
->cq_dma_addr
);
920 c
.create_cq
.cqid
= cpu_to_le16(qid
);
921 c
.create_cq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
922 c
.create_cq
.cq_flags
= cpu_to_le16(flags
);
923 c
.create_cq
.irq_vector
= cpu_to_le16(nvmeq
->cq_vector
);
925 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
928 static int adapter_alloc_sq(struct nvme_dev
*dev
, u16 qid
,
929 struct nvme_queue
*nvmeq
)
931 struct nvme_command c
;
932 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_SQ_PRIO_MEDIUM
;
934 memset(&c
, 0, sizeof(c
));
935 c
.create_sq
.opcode
= nvme_admin_create_sq
;
936 c
.create_sq
.prp1
= cpu_to_le64(nvmeq
->sq_dma_addr
);
937 c
.create_sq
.sqid
= cpu_to_le16(qid
);
938 c
.create_sq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
939 c
.create_sq
.sq_flags
= cpu_to_le16(flags
);
940 c
.create_sq
.cqid
= cpu_to_le16(qid
);
942 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
945 static int adapter_delete_cq(struct nvme_dev
*dev
, u16 cqid
)
947 return adapter_delete_queue(dev
, nvme_admin_delete_cq
, cqid
);
950 static int adapter_delete_sq(struct nvme_dev
*dev
, u16 sqid
)
952 return adapter_delete_queue(dev
, nvme_admin_delete_sq
, sqid
);
955 int nvme_identify(struct nvme_dev
*dev
, unsigned nsid
, unsigned cns
,
958 struct nvme_command c
;
960 memset(&c
, 0, sizeof(c
));
961 c
.identify
.opcode
= nvme_admin_identify
;
962 c
.identify
.nsid
= cpu_to_le32(nsid
);
963 c
.identify
.prp1
= cpu_to_le64(dma_addr
);
964 c
.identify
.cns
= cpu_to_le32(cns
);
966 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
969 int nvme_get_features(struct nvme_dev
*dev
, unsigned fid
, unsigned nsid
,
970 dma_addr_t dma_addr
, u32
*result
)
972 struct nvme_command c
;
974 memset(&c
, 0, sizeof(c
));
975 c
.features
.opcode
= nvme_admin_get_features
;
976 c
.features
.nsid
= cpu_to_le32(nsid
);
977 c
.features
.prp1
= cpu_to_le64(dma_addr
);
978 c
.features
.fid
= cpu_to_le32(fid
);
980 return nvme_submit_admin_cmd(dev
, &c
, result
);
983 int nvme_set_features(struct nvme_dev
*dev
, unsigned fid
, unsigned dword11
,
984 dma_addr_t dma_addr
, u32
*result
)
986 struct nvme_command c
;
988 memset(&c
, 0, sizeof(c
));
989 c
.features
.opcode
= nvme_admin_set_features
;
990 c
.features
.prp1
= cpu_to_le64(dma_addr
);
991 c
.features
.fid
= cpu_to_le32(fid
);
992 c
.features
.dword11
= cpu_to_le32(dword11
);
994 return nvme_submit_admin_cmd(dev
, &c
, result
);
998 * nvme_abort_req - Attempt aborting a request
1000 * Schedule controller reset if the command was already aborted once before and
1001 * still hasn't been returned to the driver, or if this is the admin queue.
1003 static void nvme_abort_req(struct request
*req
)
1005 struct nvme_cmd_info
*cmd_rq
= blk_mq_rq_to_pdu(req
);
1006 struct nvme_queue
*nvmeq
= cmd_rq
->nvmeq
;
1007 struct nvme_dev
*dev
= nvmeq
->dev
;
1008 struct request
*abort_req
;
1009 struct nvme_cmd_info
*abort_cmd
;
1010 struct nvme_command cmd
;
1012 if (!nvmeq
->qid
|| cmd_rq
->aborted
) {
1013 if (work_busy(&dev
->reset_work
))
1015 list_del_init(&dev
->node
);
1016 dev_warn(&dev
->pci_dev
->dev
,
1017 "I/O %d QID %d timeout, reset controller\n",
1018 req
->tag
, nvmeq
->qid
);
1019 dev
->reset_workfn
= nvme_reset_failed_dev
;
1020 queue_work(nvme_workq
, &dev
->reset_work
);
1024 if (!dev
->abort_limit
)
1027 abort_req
= blk_mq_alloc_request(dev
->admin_q
, WRITE
, GFP_ATOMIC
,
1029 if (IS_ERR(abort_req
))
1032 abort_cmd
= blk_mq_rq_to_pdu(abort_req
);
1033 nvme_set_info(abort_cmd
, abort_req
, abort_completion
);
1035 memset(&cmd
, 0, sizeof(cmd
));
1036 cmd
.abort
.opcode
= nvme_admin_abort_cmd
;
1037 cmd
.abort
.cid
= req
->tag
;
1038 cmd
.abort
.sqid
= cpu_to_le16(nvmeq
->qid
);
1039 cmd
.abort
.command_id
= abort_req
->tag
;
1042 cmd_rq
->aborted
= 1;
1044 dev_warn(nvmeq
->q_dmadev
, "Aborting I/O %d QID %d\n", req
->tag
,
1046 if (nvme_submit_cmd(dev
->queues
[0], &cmd
) < 0) {
1047 dev_warn(nvmeq
->q_dmadev
,
1048 "Could not abort I/O %d QID %d",
1049 req
->tag
, nvmeq
->qid
);
1050 blk_mq_free_request(req
);
1054 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx
*hctx
,
1055 struct request
*req
, void *data
, bool reserved
)
1057 struct nvme_queue
*nvmeq
= data
;
1059 nvme_completion_fn fn
;
1060 struct nvme_cmd_info
*cmd
;
1061 static struct nvme_completion cqe
= {
1062 .status
= cpu_to_le16(NVME_SC_ABORT_REQ
<< 1),
1065 cmd
= blk_mq_rq_to_pdu(req
);
1067 if (cmd
->ctx
== CMD_CTX_CANCELLED
)
1070 dev_warn(nvmeq
->q_dmadev
, "Cancelling I/O %d QID %d\n",
1071 req
->tag
, nvmeq
->qid
);
1072 ctx
= cancel_cmd_info(cmd
, &fn
);
1073 fn(nvmeq
, ctx
, &cqe
);
1076 static enum blk_eh_timer_return
nvme_timeout(struct request
*req
, bool reserved
)
1078 struct nvme_cmd_info
*cmd
= blk_mq_rq_to_pdu(req
);
1079 struct nvme_queue
*nvmeq
= cmd
->nvmeq
;
1081 dev_warn(nvmeq
->q_dmadev
, "Timeout I/O %d QID %d\n", req
->tag
,
1083 if (nvmeq
->dev
->initialized
)
1084 nvme_abort_req(req
);
1087 * The aborted req will be completed on receiving the abort req.
1088 * We enable the timer again. If hit twice, it'll cause a device reset,
1089 * as the device then is in a faulty state.
1091 return BLK_EH_RESET_TIMER
;
1094 static void nvme_free_queue(struct nvme_queue
*nvmeq
)
1096 dma_free_coherent(nvmeq
->q_dmadev
, CQ_SIZE(nvmeq
->q_depth
),
1097 (void *)nvmeq
->cqes
, nvmeq
->cq_dma_addr
);
1098 dma_free_coherent(nvmeq
->q_dmadev
, SQ_SIZE(nvmeq
->q_depth
),
1099 nvmeq
->sq_cmds
, nvmeq
->sq_dma_addr
);
1103 static void nvme_free_queues(struct nvme_dev
*dev
, int lowest
)
1106 struct nvme_queue
*nvmeq
, *next
;
1107 struct llist_node
*entry
;
1110 for (i
= dev
->queue_count
- 1; i
>= lowest
; i
--) {
1111 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1112 llist_add(&nvmeq
->node
, &q_list
);
1114 dev
->queues
[i
] = NULL
;
1117 entry
= llist_del_all(&q_list
);
1118 llist_for_each_entry_safe(nvmeq
, next
, entry
, node
)
1119 nvme_free_queue(nvmeq
);
1123 * nvme_suspend_queue - put queue into suspended state
1124 * @nvmeq - queue to suspend
1126 static int nvme_suspend_queue(struct nvme_queue
*nvmeq
)
1128 int vector
= nvmeq
->dev
->entry
[nvmeq
->cq_vector
].vector
;
1130 spin_lock_irq(&nvmeq
->q_lock
);
1131 nvmeq
->dev
->online_queues
--;
1132 spin_unlock_irq(&nvmeq
->q_lock
);
1134 irq_set_affinity_hint(vector
, NULL
);
1135 free_irq(vector
, nvmeq
);
1140 static void nvme_clear_queue(struct nvme_queue
*nvmeq
)
1142 struct blk_mq_hw_ctx
*hctx
= nvmeq
->hctx
;
1144 spin_lock_irq(&nvmeq
->q_lock
);
1145 nvme_process_cq(nvmeq
);
1146 if (hctx
&& hctx
->tags
)
1147 blk_mq_tag_busy_iter(hctx
, nvme_cancel_queue_ios
, nvmeq
);
1148 spin_unlock_irq(&nvmeq
->q_lock
);
1151 static void nvme_disable_queue(struct nvme_dev
*dev
, int qid
)
1153 struct nvme_queue
*nvmeq
= dev
->queues
[qid
];
1157 if (nvme_suspend_queue(nvmeq
))
1160 /* Don't tell the adapter to delete the admin queue.
1161 * Don't tell a removed adapter to delete IO queues. */
1162 if (qid
&& readl(&dev
->bar
->csts
) != -1) {
1163 adapter_delete_sq(dev
, qid
);
1164 adapter_delete_cq(dev
, qid
);
1166 nvme_clear_queue(nvmeq
);
1169 static struct nvme_queue
*nvme_alloc_queue(struct nvme_dev
*dev
, int qid
,
1170 int depth
, int vector
)
1172 struct device
*dmadev
= &dev
->pci_dev
->dev
;
1173 struct nvme_queue
*nvmeq
= kzalloc(sizeof(*nvmeq
), GFP_KERNEL
);
1177 nvmeq
->cqes
= dma_zalloc_coherent(dmadev
, CQ_SIZE(depth
),
1178 &nvmeq
->cq_dma_addr
, GFP_KERNEL
);
1182 nvmeq
->sq_cmds
= dma_alloc_coherent(dmadev
, SQ_SIZE(depth
),
1183 &nvmeq
->sq_dma_addr
, GFP_KERNEL
);
1184 if (!nvmeq
->sq_cmds
)
1187 nvmeq
->q_dmadev
= dmadev
;
1189 snprintf(nvmeq
->irqname
, sizeof(nvmeq
->irqname
), "nvme%dq%d",
1190 dev
->instance
, qid
);
1191 spin_lock_init(&nvmeq
->q_lock
);
1193 nvmeq
->cq_phase
= 1;
1194 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1195 nvmeq
->q_depth
= depth
;
1196 nvmeq
->cq_vector
= vector
;
1199 dev
->queues
[qid
] = nvmeq
;
1204 dma_free_coherent(dmadev
, CQ_SIZE(depth
), (void *)nvmeq
->cqes
,
1205 nvmeq
->cq_dma_addr
);
1211 static int queue_request_irq(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1214 if (use_threaded_interrupts
)
1215 return request_threaded_irq(dev
->entry
[nvmeq
->cq_vector
].vector
,
1216 nvme_irq_check
, nvme_irq
, IRQF_SHARED
,
1218 return request_irq(dev
->entry
[nvmeq
->cq_vector
].vector
, nvme_irq
,
1219 IRQF_SHARED
, name
, nvmeq
);
1222 static void nvme_init_queue(struct nvme_queue
*nvmeq
, u16 qid
)
1224 struct nvme_dev
*dev
= nvmeq
->dev
;
1226 spin_lock_irq(&nvmeq
->q_lock
);
1229 nvmeq
->cq_phase
= 1;
1230 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1231 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(nvmeq
->q_depth
));
1232 dev
->online_queues
++;
1233 spin_unlock_irq(&nvmeq
->q_lock
);
1236 static int nvme_create_queue(struct nvme_queue
*nvmeq
, int qid
)
1238 struct nvme_dev
*dev
= nvmeq
->dev
;
1241 result
= adapter_alloc_cq(dev
, qid
, nvmeq
);
1245 result
= adapter_alloc_sq(dev
, qid
, nvmeq
);
1249 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1253 nvme_init_queue(nvmeq
, qid
);
1257 adapter_delete_sq(dev
, qid
);
1259 adapter_delete_cq(dev
, qid
);
1263 static int nvme_wait_ready(struct nvme_dev
*dev
, u64 cap
, bool enabled
)
1265 unsigned long timeout
;
1266 u32 bit
= enabled
? NVME_CSTS_RDY
: 0;
1268 timeout
= ((NVME_CAP_TIMEOUT(cap
) + 1) * HZ
/ 2) + jiffies
;
1270 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_RDY
) != bit
) {
1272 if (fatal_signal_pending(current
))
1274 if (time_after(jiffies
, timeout
)) {
1275 dev_err(&dev
->pci_dev
->dev
,
1276 "Device not ready; aborting %s\n", enabled
?
1277 "initialisation" : "reset");
1286 * If the device has been passed off to us in an enabled state, just clear
1287 * the enabled bit. The spec says we should set the 'shutdown notification
1288 * bits', but doing so may cause the device to complete commands to the
1289 * admin queue ... and we don't know what memory that might be pointing at!
1291 static int nvme_disable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1293 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1294 dev
->ctrl_config
&= ~NVME_CC_ENABLE
;
1295 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1297 return nvme_wait_ready(dev
, cap
, false);
1300 static int nvme_enable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1302 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1303 dev
->ctrl_config
|= NVME_CC_ENABLE
;
1304 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1306 return nvme_wait_ready(dev
, cap
, true);
1309 static int nvme_shutdown_ctrl(struct nvme_dev
*dev
)
1311 unsigned long timeout
;
1313 dev
->ctrl_config
&= ~NVME_CC_SHN_MASK
;
1314 dev
->ctrl_config
|= NVME_CC_SHN_NORMAL
;
1316 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1318 timeout
= SHUTDOWN_TIMEOUT
+ jiffies
;
1319 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_SHST_MASK
) !=
1320 NVME_CSTS_SHST_CMPLT
) {
1322 if (fatal_signal_pending(current
))
1324 if (time_after(jiffies
, timeout
)) {
1325 dev_err(&dev
->pci_dev
->dev
,
1326 "Device shutdown incomplete; abort shutdown\n");
1334 static struct blk_mq_ops nvme_mq_admin_ops
= {
1335 .queue_rq
= nvme_admin_queue_rq
,
1336 .map_queue
= blk_mq_map_queue
,
1337 .init_hctx
= nvme_admin_init_hctx
,
1338 .init_request
= nvme_admin_init_request
,
1339 .timeout
= nvme_timeout
,
1342 static struct blk_mq_ops nvme_mq_ops
= {
1343 .queue_rq
= nvme_queue_rq
,
1344 .map_queue
= blk_mq_map_queue
,
1345 .init_hctx
= nvme_init_hctx
,
1346 .init_request
= nvme_init_request
,
1347 .timeout
= nvme_timeout
,
1350 static int nvme_alloc_admin_tags(struct nvme_dev
*dev
)
1352 if (!dev
->admin_q
) {
1353 dev
->admin_tagset
.ops
= &nvme_mq_admin_ops
;
1354 dev
->admin_tagset
.nr_hw_queues
= 1;
1355 dev
->admin_tagset
.queue_depth
= NVME_AQ_DEPTH
- 1;
1356 dev
->admin_tagset
.timeout
= ADMIN_TIMEOUT
;
1357 dev
->admin_tagset
.numa_node
= dev_to_node(&dev
->pci_dev
->dev
);
1358 dev
->admin_tagset
.cmd_size
= sizeof(struct nvme_cmd_info
);
1359 dev
->admin_tagset
.driver_data
= dev
;
1361 if (blk_mq_alloc_tag_set(&dev
->admin_tagset
))
1364 dev
->admin_q
= blk_mq_init_queue(&dev
->admin_tagset
);
1365 if (!dev
->admin_q
) {
1366 blk_mq_free_tag_set(&dev
->admin_tagset
);
1374 static void nvme_free_admin_tags(struct nvme_dev
*dev
)
1377 blk_mq_free_tag_set(&dev
->admin_tagset
);
1380 static int nvme_configure_admin_queue(struct nvme_dev
*dev
)
1384 u64 cap
= readq(&dev
->bar
->cap
);
1385 struct nvme_queue
*nvmeq
;
1386 unsigned page_shift
= PAGE_SHIFT
;
1387 unsigned dev_page_min
= NVME_CAP_MPSMIN(cap
) + 12;
1388 unsigned dev_page_max
= NVME_CAP_MPSMAX(cap
) + 12;
1390 if (page_shift
< dev_page_min
) {
1391 dev_err(&dev
->pci_dev
->dev
,
1392 "Minimum device page size (%u) too large for "
1393 "host (%u)\n", 1 << dev_page_min
,
1397 if (page_shift
> dev_page_max
) {
1398 dev_info(&dev
->pci_dev
->dev
,
1399 "Device maximum page size (%u) smaller than "
1400 "host (%u); enabling work-around\n",
1401 1 << dev_page_max
, 1 << page_shift
);
1402 page_shift
= dev_page_max
;
1405 result
= nvme_disable_ctrl(dev
, cap
);
1409 nvmeq
= dev
->queues
[0];
1411 nvmeq
= nvme_alloc_queue(dev
, 0, NVME_AQ_DEPTH
, 0);
1416 aqa
= nvmeq
->q_depth
- 1;
1419 dev
->page_size
= 1 << page_shift
;
1421 dev
->ctrl_config
= NVME_CC_CSS_NVM
;
1422 dev
->ctrl_config
|= (page_shift
- 12) << NVME_CC_MPS_SHIFT
;
1423 dev
->ctrl_config
|= NVME_CC_ARB_RR
| NVME_CC_SHN_NONE
;
1424 dev
->ctrl_config
|= NVME_CC_IOSQES
| NVME_CC_IOCQES
;
1426 writel(aqa
, &dev
->bar
->aqa
);
1427 writeq(nvmeq
->sq_dma_addr
, &dev
->bar
->asq
);
1428 writeq(nvmeq
->cq_dma_addr
, &dev
->bar
->acq
);
1430 result
= nvme_enable_ctrl(dev
, cap
);
1434 result
= nvme_alloc_admin_tags(dev
);
1438 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1445 nvme_free_admin_tags(dev
);
1447 nvme_free_queues(dev
, 0);
1451 struct nvme_iod
*nvme_map_user_pages(struct nvme_dev
*dev
, int write
,
1452 unsigned long addr
, unsigned length
)
1454 int i
, err
, count
, nents
, offset
;
1455 struct scatterlist
*sg
;
1456 struct page
**pages
;
1457 struct nvme_iod
*iod
;
1460 return ERR_PTR(-EINVAL
);
1461 if (!length
|| length
> INT_MAX
- PAGE_SIZE
)
1462 return ERR_PTR(-EINVAL
);
1464 offset
= offset_in_page(addr
);
1465 count
= DIV_ROUND_UP(offset
+ length
, PAGE_SIZE
);
1466 pages
= kcalloc(count
, sizeof(*pages
), GFP_KERNEL
);
1468 return ERR_PTR(-ENOMEM
);
1470 err
= get_user_pages_fast(addr
, count
, 1, pages
);
1478 iod
= nvme_alloc_iod(count
, length
, dev
, GFP_KERNEL
);
1483 sg_init_table(sg
, count
);
1484 for (i
= 0; i
< count
; i
++) {
1485 sg_set_page(&sg
[i
], pages
[i
],
1486 min_t(unsigned, length
, PAGE_SIZE
- offset
),
1488 length
-= (PAGE_SIZE
- offset
);
1491 sg_mark_end(&sg
[i
- 1]);
1494 nents
= dma_map_sg(&dev
->pci_dev
->dev
, sg
, count
,
1495 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1505 for (i
= 0; i
< count
; i
++)
1508 return ERR_PTR(err
);
1511 void nvme_unmap_user_pages(struct nvme_dev
*dev
, int write
,
1512 struct nvme_iod
*iod
)
1516 dma_unmap_sg(&dev
->pci_dev
->dev
, iod
->sg
, iod
->nents
,
1517 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1519 for (i
= 0; i
< iod
->nents
; i
++)
1520 put_page(sg_page(&iod
->sg
[i
]));
1523 static int nvme_submit_io(struct nvme_ns
*ns
, struct nvme_user_io __user
*uio
)
1525 struct nvme_dev
*dev
= ns
->dev
;
1526 struct nvme_user_io io
;
1527 struct nvme_command c
;
1528 unsigned length
, meta_len
;
1530 struct nvme_iod
*iod
, *meta_iod
= NULL
;
1531 dma_addr_t meta_dma_addr
;
1532 void *meta
, *uninitialized_var(meta_mem
);
1534 if (copy_from_user(&io
, uio
, sizeof(io
)))
1536 length
= (io
.nblocks
+ 1) << ns
->lba_shift
;
1537 meta_len
= (io
.nblocks
+ 1) * ns
->ms
;
1539 if (meta_len
&& ((io
.metadata
& 3) || !io
.metadata
))
1542 switch (io
.opcode
) {
1543 case nvme_cmd_write
:
1545 case nvme_cmd_compare
:
1546 iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.addr
, length
);
1553 return PTR_ERR(iod
);
1555 memset(&c
, 0, sizeof(c
));
1556 c
.rw
.opcode
= io
.opcode
;
1557 c
.rw
.flags
= io
.flags
;
1558 c
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
1559 c
.rw
.slba
= cpu_to_le64(io
.slba
);
1560 c
.rw
.length
= cpu_to_le16(io
.nblocks
);
1561 c
.rw
.control
= cpu_to_le16(io
.control
);
1562 c
.rw
.dsmgmt
= cpu_to_le32(io
.dsmgmt
);
1563 c
.rw
.reftag
= cpu_to_le32(io
.reftag
);
1564 c
.rw
.apptag
= cpu_to_le16(io
.apptag
);
1565 c
.rw
.appmask
= cpu_to_le16(io
.appmask
);
1568 meta_iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.metadata
,
1570 if (IS_ERR(meta_iod
)) {
1571 status
= PTR_ERR(meta_iod
);
1576 meta_mem
= dma_alloc_coherent(&dev
->pci_dev
->dev
, meta_len
,
1577 &meta_dma_addr
, GFP_KERNEL
);
1583 if (io
.opcode
& 1) {
1584 int meta_offset
= 0;
1586 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1587 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1588 meta_iod
->sg
[i
].offset
;
1589 memcpy(meta_mem
+ meta_offset
, meta
,
1590 meta_iod
->sg
[i
].length
);
1591 kunmap_atomic(meta
);
1592 meta_offset
+= meta_iod
->sg
[i
].length
;
1596 c
.rw
.metadata
= cpu_to_le64(meta_dma_addr
);
1599 length
= nvme_setup_prps(dev
, iod
, length
, GFP_KERNEL
);
1600 c
.rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
1601 c
.rw
.prp2
= cpu_to_le64(iod
->first_dma
);
1603 if (length
!= (io
.nblocks
+ 1) << ns
->lba_shift
)
1606 status
= nvme_submit_io_cmd(dev
, ns
, &c
, NULL
);
1609 if (status
== NVME_SC_SUCCESS
&& !(io
.opcode
& 1)) {
1610 int meta_offset
= 0;
1612 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1613 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1614 meta_iod
->sg
[i
].offset
;
1615 memcpy(meta
, meta_mem
+ meta_offset
,
1616 meta_iod
->sg
[i
].length
);
1617 kunmap_atomic(meta
);
1618 meta_offset
+= meta_iod
->sg
[i
].length
;
1622 dma_free_coherent(&dev
->pci_dev
->dev
, meta_len
, meta_mem
,
1627 nvme_unmap_user_pages(dev
, io
.opcode
& 1, iod
);
1628 nvme_free_iod(dev
, iod
);
1631 nvme_unmap_user_pages(dev
, io
.opcode
& 1, meta_iod
);
1632 nvme_free_iod(dev
, meta_iod
);
1638 static int nvme_user_cmd(struct nvme_dev
*dev
, struct nvme_ns
*ns
,
1639 struct nvme_passthru_cmd __user
*ucmd
)
1641 struct nvme_passthru_cmd cmd
;
1642 struct nvme_command c
;
1644 struct nvme_iod
*uninitialized_var(iod
);
1647 if (!capable(CAP_SYS_ADMIN
))
1649 if (copy_from_user(&cmd
, ucmd
, sizeof(cmd
)))
1652 memset(&c
, 0, sizeof(c
));
1653 c
.common
.opcode
= cmd
.opcode
;
1654 c
.common
.flags
= cmd
.flags
;
1655 c
.common
.nsid
= cpu_to_le32(cmd
.nsid
);
1656 c
.common
.cdw2
[0] = cpu_to_le32(cmd
.cdw2
);
1657 c
.common
.cdw2
[1] = cpu_to_le32(cmd
.cdw3
);
1658 c
.common
.cdw10
[0] = cpu_to_le32(cmd
.cdw10
);
1659 c
.common
.cdw10
[1] = cpu_to_le32(cmd
.cdw11
);
1660 c
.common
.cdw10
[2] = cpu_to_le32(cmd
.cdw12
);
1661 c
.common
.cdw10
[3] = cpu_to_le32(cmd
.cdw13
);
1662 c
.common
.cdw10
[4] = cpu_to_le32(cmd
.cdw14
);
1663 c
.common
.cdw10
[5] = cpu_to_le32(cmd
.cdw15
);
1665 length
= cmd
.data_len
;
1667 iod
= nvme_map_user_pages(dev
, cmd
.opcode
& 1, cmd
.addr
,
1670 return PTR_ERR(iod
);
1671 length
= nvme_setup_prps(dev
, iod
, length
, GFP_KERNEL
);
1672 c
.common
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
1673 c
.common
.prp2
= cpu_to_le64(iod
->first_dma
);
1676 timeout
= cmd
.timeout_ms
? msecs_to_jiffies(cmd
.timeout_ms
) :
1679 if (length
!= cmd
.data_len
)
1682 struct request
*req
;
1684 req
= blk_mq_alloc_request(ns
->queue
, WRITE
,
1685 (GFP_KERNEL
|__GFP_WAIT
), false);
1689 status
= nvme_submit_sync_cmd(req
, &c
, &cmd
.result
,
1691 blk_mq_free_request(req
);
1694 status
= __nvme_submit_admin_cmd(dev
, &c
, &cmd
.result
, timeout
);
1697 nvme_unmap_user_pages(dev
, cmd
.opcode
& 1, iod
);
1698 nvme_free_iod(dev
, iod
);
1701 if ((status
>= 0) && copy_to_user(&ucmd
->result
, &cmd
.result
,
1702 sizeof(cmd
.result
)))
1708 static int nvme_ioctl(struct block_device
*bdev
, fmode_t mode
, unsigned int cmd
,
1711 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1715 force_successful_syscall_return();
1717 case NVME_IOCTL_ADMIN_CMD
:
1718 return nvme_user_cmd(ns
->dev
, NULL
, (void __user
*)arg
);
1719 case NVME_IOCTL_IO_CMD
:
1720 return nvme_user_cmd(ns
->dev
, ns
, (void __user
*)arg
);
1721 case NVME_IOCTL_SUBMIT_IO
:
1722 return nvme_submit_io(ns
, (void __user
*)arg
);
1723 case SG_GET_VERSION_NUM
:
1724 return nvme_sg_get_version_num((void __user
*)arg
);
1726 return nvme_sg_io(ns
, (void __user
*)arg
);
1732 #ifdef CONFIG_COMPAT
1733 static int nvme_compat_ioctl(struct block_device
*bdev
, fmode_t mode
,
1734 unsigned int cmd
, unsigned long arg
)
1738 return -ENOIOCTLCMD
;
1740 return nvme_ioctl(bdev
, mode
, cmd
, arg
);
1743 #define nvme_compat_ioctl NULL
1746 static int nvme_open(struct block_device
*bdev
, fmode_t mode
)
1751 spin_lock(&dev_list_lock
);
1752 ns
= bdev
->bd_disk
->private_data
;
1755 else if (!kref_get_unless_zero(&ns
->dev
->kref
))
1757 spin_unlock(&dev_list_lock
);
1762 static void nvme_free_dev(struct kref
*kref
);
1764 static void nvme_release(struct gendisk
*disk
, fmode_t mode
)
1766 struct nvme_ns
*ns
= disk
->private_data
;
1767 struct nvme_dev
*dev
= ns
->dev
;
1769 kref_put(&dev
->kref
, nvme_free_dev
);
1772 static int nvme_getgeo(struct block_device
*bd
, struct hd_geometry
*geo
)
1774 /* some standard values */
1775 geo
->heads
= 1 << 6;
1776 geo
->sectors
= 1 << 5;
1777 geo
->cylinders
= get_capacity(bd
->bd_disk
) >> 11;
1781 static int nvme_revalidate_disk(struct gendisk
*disk
)
1783 struct nvme_ns
*ns
= disk
->private_data
;
1784 struct nvme_dev
*dev
= ns
->dev
;
1785 struct nvme_id_ns
*id
;
1786 dma_addr_t dma_addr
;
1789 id
= dma_alloc_coherent(&dev
->pci_dev
->dev
, 4096, &dma_addr
,
1792 dev_warn(&dev
->pci_dev
->dev
, "%s: Memory alocation failure\n",
1797 if (nvme_identify(dev
, ns
->ns_id
, 0, dma_addr
))
1800 lbaf
= id
->flbas
& 0xf;
1801 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
1803 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
1804 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
1806 dma_free_coherent(&dev
->pci_dev
->dev
, 4096, id
, dma_addr
);
1810 static const struct block_device_operations nvme_fops
= {
1811 .owner
= THIS_MODULE
,
1812 .ioctl
= nvme_ioctl
,
1813 .compat_ioctl
= nvme_compat_ioctl
,
1815 .release
= nvme_release
,
1816 .getgeo
= nvme_getgeo
,
1817 .revalidate_disk
= nvme_revalidate_disk
,
1820 static int nvme_kthread(void *data
)
1822 struct nvme_dev
*dev
, *next
;
1824 while (!kthread_should_stop()) {
1825 set_current_state(TASK_INTERRUPTIBLE
);
1826 spin_lock(&dev_list_lock
);
1827 list_for_each_entry_safe(dev
, next
, &dev_list
, node
) {
1829 if (readl(&dev
->bar
->csts
) & NVME_CSTS_CFS
&&
1831 if (work_busy(&dev
->reset_work
))
1833 list_del_init(&dev
->node
);
1834 dev_warn(&dev
->pci_dev
->dev
,
1835 "Failed status: %x, reset controller\n",
1836 readl(&dev
->bar
->csts
));
1837 dev
->reset_workfn
= nvme_reset_failed_dev
;
1838 queue_work(nvme_workq
, &dev
->reset_work
);
1841 for (i
= 0; i
< dev
->queue_count
; i
++) {
1842 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
1845 spin_lock_irq(&nvmeq
->q_lock
);
1846 nvme_process_cq(nvmeq
);
1848 while ((i
== 0) && (dev
->event_limit
> 0)) {
1849 if (nvme_submit_async_admin_req(dev
))
1853 spin_unlock_irq(&nvmeq
->q_lock
);
1856 spin_unlock(&dev_list_lock
);
1857 schedule_timeout(round_jiffies_relative(HZ
));
1862 static void nvme_config_discard(struct nvme_ns
*ns
)
1864 u32 logical_block_size
= queue_logical_block_size(ns
->queue
);
1865 ns
->queue
->limits
.discard_zeroes_data
= 0;
1866 ns
->queue
->limits
.discard_alignment
= logical_block_size
;
1867 ns
->queue
->limits
.discard_granularity
= logical_block_size
;
1868 ns
->queue
->limits
.max_discard_sectors
= 0xffffffff;
1869 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD
, ns
->queue
);
1872 static struct nvme_ns
*nvme_alloc_ns(struct nvme_dev
*dev
, unsigned nsid
,
1873 struct nvme_id_ns
*id
, struct nvme_lba_range_type
*rt
)
1876 struct gendisk
*disk
;
1877 int node
= dev_to_node(&dev
->pci_dev
->dev
);
1880 if (rt
->attributes
& NVME_LBART_ATTRIB_HIDE
)
1883 ns
= kzalloc_node(sizeof(*ns
), GFP_KERNEL
, node
);
1886 ns
->queue
= blk_mq_init_queue(&dev
->tagset
);
1887 if (IS_ERR(ns
->queue
))
1889 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES
, ns
->queue
);
1890 queue_flag_set_unlocked(QUEUE_FLAG_NONROT
, ns
->queue
);
1891 queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS
, ns
->queue
);
1892 queue_flag_clear_unlocked(QUEUE_FLAG_IO_STAT
, ns
->queue
);
1894 ns
->queue
->queuedata
= ns
;
1896 disk
= alloc_disk_node(0, node
);
1898 goto out_free_queue
;
1902 lbaf
= id
->flbas
& 0xf;
1903 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
1904 ns
->ms
= le16_to_cpu(id
->lbaf
[lbaf
].ms
);
1905 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
1906 if (dev
->max_hw_sectors
)
1907 blk_queue_max_hw_sectors(ns
->queue
, dev
->max_hw_sectors
);
1908 if (dev
->stripe_size
)
1909 blk_queue_chunk_sectors(ns
->queue
, dev
->stripe_size
>> 9);
1910 if (dev
->vwc
& NVME_CTRL_VWC_PRESENT
)
1911 blk_queue_flush(ns
->queue
, REQ_FLUSH
| REQ_FUA
);
1913 disk
->major
= nvme_major
;
1914 disk
->first_minor
= 0;
1915 disk
->fops
= &nvme_fops
;
1916 disk
->private_data
= ns
;
1917 disk
->queue
= ns
->queue
;
1918 disk
->driverfs_dev
= &dev
->pci_dev
->dev
;
1919 disk
->flags
= GENHD_FL_EXT_DEVT
;
1920 sprintf(disk
->disk_name
, "nvme%dn%d", dev
->instance
, nsid
);
1921 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
1923 if (dev
->oncs
& NVME_CTRL_ONCS_DSM
)
1924 nvme_config_discard(ns
);
1929 blk_cleanup_queue(ns
->queue
);
1935 static void nvme_create_io_queues(struct nvme_dev
*dev
)
1939 for (i
= dev
->queue_count
; i
<= dev
->max_qid
; i
++)
1940 if (!nvme_alloc_queue(dev
, i
, dev
->q_depth
, i
- 1))
1943 for (i
= dev
->online_queues
; i
<= dev
->queue_count
- 1; i
++)
1944 if (nvme_create_queue(dev
->queues
[i
], i
))
1948 static int set_queue_count(struct nvme_dev
*dev
, int count
)
1952 u32 q_count
= (count
- 1) | ((count
- 1) << 16);
1954 status
= nvme_set_features(dev
, NVME_FEAT_NUM_QUEUES
, q_count
, 0,
1959 dev_err(&dev
->pci_dev
->dev
, "Could not set queue count (%d)\n",
1963 return min(result
& 0xffff, result
>> 16) + 1;
1966 static size_t db_bar_size(struct nvme_dev
*dev
, unsigned nr_io_queues
)
1968 return 4096 + ((nr_io_queues
+ 1) * 8 * dev
->db_stride
);
1971 static int nvme_setup_io_queues(struct nvme_dev
*dev
)
1973 struct nvme_queue
*adminq
= dev
->queues
[0];
1974 struct pci_dev
*pdev
= dev
->pci_dev
;
1975 int result
, i
, vecs
, nr_io_queues
, size
;
1977 nr_io_queues
= num_possible_cpus();
1978 result
= set_queue_count(dev
, nr_io_queues
);
1981 if (result
< nr_io_queues
)
1982 nr_io_queues
= result
;
1984 size
= db_bar_size(dev
, nr_io_queues
);
1988 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), size
);
1991 if (!--nr_io_queues
)
1993 size
= db_bar_size(dev
, nr_io_queues
);
1995 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
1996 adminq
->q_db
= dev
->dbs
;
1999 /* Deregister the admin queue's interrupt */
2000 free_irq(dev
->entry
[0].vector
, adminq
);
2002 for (i
= 0; i
< nr_io_queues
; i
++)
2003 dev
->entry
[i
].entry
= i
;
2004 vecs
= pci_enable_msix_range(pdev
, dev
->entry
, 1, nr_io_queues
);
2006 vecs
= pci_enable_msi_range(pdev
, 1, min(nr_io_queues
, 32));
2010 for (i
= 0; i
< vecs
; i
++)
2011 dev
->entry
[i
].vector
= i
+ pdev
->irq
;
2016 * Should investigate if there's a performance win from allocating
2017 * more queues than interrupt vectors; it might allow the submission
2018 * path to scale better, even if the receive path is limited by the
2019 * number of interrupts.
2021 nr_io_queues
= vecs
;
2022 dev
->max_qid
= nr_io_queues
;
2024 result
= queue_request_irq(dev
, adminq
, adminq
->irqname
);
2028 /* Free previously allocated queues that are no longer usable */
2029 nvme_free_queues(dev
, nr_io_queues
+ 1);
2030 nvme_create_io_queues(dev
);
2035 nvme_free_queues(dev
, 1);
2040 * Return: error value if an error occurred setting up the queues or calling
2041 * Identify Device. 0 if these succeeded, even if adding some of the
2042 * namespaces failed. At the moment, these failures are silent. TBD which
2043 * failures should be reported.
2045 static int nvme_dev_add(struct nvme_dev
*dev
)
2047 struct pci_dev
*pdev
= dev
->pci_dev
;
2051 struct nvme_id_ctrl
*ctrl
;
2052 struct nvme_id_ns
*id_ns
;
2054 dma_addr_t dma_addr
;
2055 int shift
= NVME_CAP_MPSMIN(readq(&dev
->bar
->cap
)) + 12;
2057 mem
= dma_alloc_coherent(&pdev
->dev
, 8192, &dma_addr
, GFP_KERNEL
);
2061 res
= nvme_identify(dev
, 0, 1, dma_addr
);
2063 dev_err(&pdev
->dev
, "Identify Controller failed (%d)\n", res
);
2069 nn
= le32_to_cpup(&ctrl
->nn
);
2070 dev
->oncs
= le16_to_cpup(&ctrl
->oncs
);
2071 dev
->abort_limit
= ctrl
->acl
+ 1;
2072 dev
->vwc
= ctrl
->vwc
;
2073 dev
->event_limit
= min(ctrl
->aerl
+ 1, 8);
2074 memcpy(dev
->serial
, ctrl
->sn
, sizeof(ctrl
->sn
));
2075 memcpy(dev
->model
, ctrl
->mn
, sizeof(ctrl
->mn
));
2076 memcpy(dev
->firmware_rev
, ctrl
->fr
, sizeof(ctrl
->fr
));
2078 dev
->max_hw_sectors
= 1 << (ctrl
->mdts
+ shift
- 9);
2079 if ((pdev
->vendor
== PCI_VENDOR_ID_INTEL
) &&
2080 (pdev
->device
== 0x0953) && ctrl
->vs
[3]) {
2081 unsigned int max_hw_sectors
;
2083 dev
->stripe_size
= 1 << (ctrl
->vs
[3] + shift
);
2084 max_hw_sectors
= dev
->stripe_size
>> (shift
- 9);
2085 if (dev
->max_hw_sectors
) {
2086 dev
->max_hw_sectors
= min(max_hw_sectors
,
2087 dev
->max_hw_sectors
);
2089 dev
->max_hw_sectors
= max_hw_sectors
;
2092 dev
->tagset
.ops
= &nvme_mq_ops
;
2093 dev
->tagset
.nr_hw_queues
= dev
->online_queues
- 1;
2094 dev
->tagset
.timeout
= NVME_IO_TIMEOUT
;
2095 dev
->tagset
.numa_node
= dev_to_node(&dev
->pci_dev
->dev
);
2096 dev
->tagset
.queue_depth
=
2097 min_t(int, dev
->q_depth
, BLK_MQ_MAX_DEPTH
) - 1;
2098 dev
->tagset
.cmd_size
= sizeof(struct nvme_cmd_info
);
2099 dev
->tagset
.flags
= BLK_MQ_F_SHOULD_MERGE
;
2100 dev
->tagset
.driver_data
= dev
;
2102 if (blk_mq_alloc_tag_set(&dev
->tagset
))
2106 for (i
= 1; i
<= nn
; i
++) {
2107 res
= nvme_identify(dev
, i
, 0, dma_addr
);
2111 if (id_ns
->ncap
== 0)
2114 res
= nvme_get_features(dev
, NVME_FEAT_LBA_RANGE
, i
,
2115 dma_addr
+ 4096, NULL
);
2117 memset(mem
+ 4096, 0, 4096);
2119 ns
= nvme_alloc_ns(dev
, i
, mem
, mem
+ 4096);
2121 list_add_tail(&ns
->list
, &dev
->namespaces
);
2123 list_for_each_entry(ns
, &dev
->namespaces
, list
)
2128 dma_free_coherent(&dev
->pci_dev
->dev
, 8192, mem
, dma_addr
);
2132 static int nvme_dev_map(struct nvme_dev
*dev
)
2135 int bars
, result
= -ENOMEM
;
2136 struct pci_dev
*pdev
= dev
->pci_dev
;
2138 if (pci_enable_device_mem(pdev
))
2141 dev
->entry
[0].vector
= pdev
->irq
;
2142 pci_set_master(pdev
);
2143 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2144 if (pci_request_selected_regions(pdev
, bars
, "nvme"))
2147 if (dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64)) &&
2148 dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32)))
2151 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), 8192);
2154 if (readl(&dev
->bar
->csts
) == -1) {
2158 cap
= readq(&dev
->bar
->cap
);
2159 dev
->q_depth
= min_t(int, NVME_CAP_MQES(cap
) + 1, NVME_Q_DEPTH
);
2160 dev
->db_stride
= 1 << NVME_CAP_STRIDE(cap
);
2161 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2169 pci_release_regions(pdev
);
2171 pci_disable_device(pdev
);
2175 static void nvme_dev_unmap(struct nvme_dev
*dev
)
2177 if (dev
->pci_dev
->msi_enabled
)
2178 pci_disable_msi(dev
->pci_dev
);
2179 else if (dev
->pci_dev
->msix_enabled
)
2180 pci_disable_msix(dev
->pci_dev
);
2185 pci_release_regions(dev
->pci_dev
);
2188 if (pci_is_enabled(dev
->pci_dev
))
2189 pci_disable_device(dev
->pci_dev
);
2192 struct nvme_delq_ctx
{
2193 struct task_struct
*waiter
;
2194 struct kthread_worker
*worker
;
2198 static void nvme_wait_dq(struct nvme_delq_ctx
*dq
, struct nvme_dev
*dev
)
2200 dq
->waiter
= current
;
2204 set_current_state(TASK_KILLABLE
);
2205 if (!atomic_read(&dq
->refcount
))
2207 if (!schedule_timeout(ADMIN_TIMEOUT
) ||
2208 fatal_signal_pending(current
)) {
2209 set_current_state(TASK_RUNNING
);
2211 nvme_disable_ctrl(dev
, readq(&dev
->bar
->cap
));
2212 nvme_disable_queue(dev
, 0);
2214 send_sig(SIGKILL
, dq
->worker
->task
, 1);
2215 flush_kthread_worker(dq
->worker
);
2219 set_current_state(TASK_RUNNING
);
2222 static void nvme_put_dq(struct nvme_delq_ctx
*dq
)
2224 atomic_dec(&dq
->refcount
);
2226 wake_up_process(dq
->waiter
);
2229 static struct nvme_delq_ctx
*nvme_get_dq(struct nvme_delq_ctx
*dq
)
2231 atomic_inc(&dq
->refcount
);
2235 static void nvme_del_queue_end(struct nvme_queue
*nvmeq
)
2237 struct nvme_delq_ctx
*dq
= nvmeq
->cmdinfo
.ctx
;
2239 nvme_clear_queue(nvmeq
);
2243 static int adapter_async_del_queue(struct nvme_queue
*nvmeq
, u8 opcode
,
2244 kthread_work_func_t fn
)
2246 struct nvme_command c
;
2248 memset(&c
, 0, sizeof(c
));
2249 c
.delete_queue
.opcode
= opcode
;
2250 c
.delete_queue
.qid
= cpu_to_le16(nvmeq
->qid
);
2252 init_kthread_work(&nvmeq
->cmdinfo
.work
, fn
);
2253 return nvme_submit_admin_async_cmd(nvmeq
->dev
, &c
, &nvmeq
->cmdinfo
,
2257 static void nvme_del_cq_work_handler(struct kthread_work
*work
)
2259 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2261 nvme_del_queue_end(nvmeq
);
2264 static int nvme_delete_cq(struct nvme_queue
*nvmeq
)
2266 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_cq
,
2267 nvme_del_cq_work_handler
);
2270 static void nvme_del_sq_work_handler(struct kthread_work
*work
)
2272 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2274 int status
= nvmeq
->cmdinfo
.status
;
2277 status
= nvme_delete_cq(nvmeq
);
2279 nvme_del_queue_end(nvmeq
);
2282 static int nvme_delete_sq(struct nvme_queue
*nvmeq
)
2284 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_sq
,
2285 nvme_del_sq_work_handler
);
2288 static void nvme_del_queue_start(struct kthread_work
*work
)
2290 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2292 allow_signal(SIGKILL
);
2293 if (nvme_delete_sq(nvmeq
))
2294 nvme_del_queue_end(nvmeq
);
2297 static void nvme_disable_io_queues(struct nvme_dev
*dev
)
2300 DEFINE_KTHREAD_WORKER_ONSTACK(worker
);
2301 struct nvme_delq_ctx dq
;
2302 struct task_struct
*kworker_task
= kthread_run(kthread_worker_fn
,
2303 &worker
, "nvme%d", dev
->instance
);
2305 if (IS_ERR(kworker_task
)) {
2306 dev_err(&dev
->pci_dev
->dev
,
2307 "Failed to create queue del task\n");
2308 for (i
= dev
->queue_count
- 1; i
> 0; i
--)
2309 nvme_disable_queue(dev
, i
);
2314 atomic_set(&dq
.refcount
, 0);
2315 dq
.worker
= &worker
;
2316 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
2317 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2319 if (nvme_suspend_queue(nvmeq
))
2321 nvmeq
->cmdinfo
.ctx
= nvme_get_dq(&dq
);
2322 nvmeq
->cmdinfo
.worker
= dq
.worker
;
2323 init_kthread_work(&nvmeq
->cmdinfo
.work
, nvme_del_queue_start
);
2324 queue_kthread_work(dq
.worker
, &nvmeq
->cmdinfo
.work
);
2326 nvme_wait_dq(&dq
, dev
);
2327 kthread_stop(kworker_task
);
2331 * Remove the node from the device list and check
2332 * for whether or not we need to stop the nvme_thread.
2334 static void nvme_dev_list_remove(struct nvme_dev
*dev
)
2336 struct task_struct
*tmp
= NULL
;
2338 spin_lock(&dev_list_lock
);
2339 list_del_init(&dev
->node
);
2340 if (list_empty(&dev_list
) && !IS_ERR_OR_NULL(nvme_thread
)) {
2344 spin_unlock(&dev_list_lock
);
2350 static void nvme_dev_shutdown(struct nvme_dev
*dev
)
2355 dev
->initialized
= 0;
2356 nvme_dev_list_remove(dev
);
2359 csts
= readl(&dev
->bar
->csts
);
2360 if (csts
& NVME_CSTS_CFS
|| !(csts
& NVME_CSTS_RDY
)) {
2361 for (i
= dev
->queue_count
- 1; i
>= 0; i
--) {
2362 struct nvme_queue
*nvmeq
= dev
->queues
[i
];
2363 nvme_suspend_queue(nvmeq
);
2364 nvme_clear_queue(nvmeq
);
2367 nvme_disable_io_queues(dev
);
2368 nvme_shutdown_ctrl(dev
);
2369 nvme_disable_queue(dev
, 0);
2371 nvme_dev_unmap(dev
);
2374 static void nvme_dev_remove_admin(struct nvme_dev
*dev
)
2376 if (dev
->admin_q
&& !blk_queue_dying(dev
->admin_q
))
2377 blk_cleanup_queue(dev
->admin_q
);
2380 static void nvme_dev_remove(struct nvme_dev
*dev
)
2384 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2385 if (ns
->disk
->flags
& GENHD_FL_UP
)
2386 del_gendisk(ns
->disk
);
2387 if (!blk_queue_dying(ns
->queue
))
2388 blk_cleanup_queue(ns
->queue
);
2392 static int nvme_setup_prp_pools(struct nvme_dev
*dev
)
2394 struct device
*dmadev
= &dev
->pci_dev
->dev
;
2395 dev
->prp_page_pool
= dma_pool_create("prp list page", dmadev
,
2396 PAGE_SIZE
, PAGE_SIZE
, 0);
2397 if (!dev
->prp_page_pool
)
2400 /* Optimisation for I/Os between 4k and 128k */
2401 dev
->prp_small_pool
= dma_pool_create("prp list 256", dmadev
,
2403 if (!dev
->prp_small_pool
) {
2404 dma_pool_destroy(dev
->prp_page_pool
);
2410 static void nvme_release_prp_pools(struct nvme_dev
*dev
)
2412 dma_pool_destroy(dev
->prp_page_pool
);
2413 dma_pool_destroy(dev
->prp_small_pool
);
2416 static DEFINE_IDA(nvme_instance_ida
);
2418 static int nvme_set_instance(struct nvme_dev
*dev
)
2420 int instance
, error
;
2423 if (!ida_pre_get(&nvme_instance_ida
, GFP_KERNEL
))
2426 spin_lock(&dev_list_lock
);
2427 error
= ida_get_new(&nvme_instance_ida
, &instance
);
2428 spin_unlock(&dev_list_lock
);
2429 } while (error
== -EAGAIN
);
2434 dev
->instance
= instance
;
2438 static void nvme_release_instance(struct nvme_dev
*dev
)
2440 spin_lock(&dev_list_lock
);
2441 ida_remove(&nvme_instance_ida
, dev
->instance
);
2442 spin_unlock(&dev_list_lock
);
2445 static void nvme_free_namespaces(struct nvme_dev
*dev
)
2447 struct nvme_ns
*ns
, *next
;
2449 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
) {
2450 list_del(&ns
->list
);
2452 spin_lock(&dev_list_lock
);
2453 ns
->disk
->private_data
= NULL
;
2454 spin_unlock(&dev_list_lock
);
2461 static void nvme_free_dev(struct kref
*kref
)
2463 struct nvme_dev
*dev
= container_of(kref
, struct nvme_dev
, kref
);
2465 pci_dev_put(dev
->pci_dev
);
2466 nvme_free_namespaces(dev
);
2467 blk_mq_free_tag_set(&dev
->tagset
);
2473 static int nvme_dev_open(struct inode
*inode
, struct file
*f
)
2475 struct nvme_dev
*dev
= container_of(f
->private_data
, struct nvme_dev
,
2477 kref_get(&dev
->kref
);
2478 f
->private_data
= dev
;
2482 static int nvme_dev_release(struct inode
*inode
, struct file
*f
)
2484 struct nvme_dev
*dev
= f
->private_data
;
2485 kref_put(&dev
->kref
, nvme_free_dev
);
2489 static long nvme_dev_ioctl(struct file
*f
, unsigned int cmd
, unsigned long arg
)
2491 struct nvme_dev
*dev
= f
->private_data
;
2495 case NVME_IOCTL_ADMIN_CMD
:
2496 return nvme_user_cmd(dev
, NULL
, (void __user
*)arg
);
2497 case NVME_IOCTL_IO_CMD
:
2498 if (list_empty(&dev
->namespaces
))
2500 ns
= list_first_entry(&dev
->namespaces
, struct nvme_ns
, list
);
2501 return nvme_user_cmd(dev
, ns
, (void __user
*)arg
);
2507 static const struct file_operations nvme_dev_fops
= {
2508 .owner
= THIS_MODULE
,
2509 .open
= nvme_dev_open
,
2510 .release
= nvme_dev_release
,
2511 .unlocked_ioctl
= nvme_dev_ioctl
,
2512 .compat_ioctl
= nvme_dev_ioctl
,
2515 static void nvme_set_irq_hints(struct nvme_dev
*dev
)
2517 struct nvme_queue
*nvmeq
;
2520 for (i
= 0; i
< dev
->online_queues
; i
++) {
2521 nvmeq
= dev
->queues
[i
];
2526 irq_set_affinity_hint(dev
->entry
[nvmeq
->cq_vector
].vector
,
2527 nvmeq
->hctx
->cpumask
);
2531 static int nvme_dev_start(struct nvme_dev
*dev
)
2534 bool start_thread
= false;
2536 result
= nvme_dev_map(dev
);
2540 result
= nvme_configure_admin_queue(dev
);
2544 spin_lock(&dev_list_lock
);
2545 if (list_empty(&dev_list
) && IS_ERR_OR_NULL(nvme_thread
)) {
2546 start_thread
= true;
2549 list_add(&dev
->node
, &dev_list
);
2550 spin_unlock(&dev_list_lock
);
2553 nvme_thread
= kthread_run(nvme_kthread
, NULL
, "nvme");
2554 wake_up_all(&nvme_kthread_wait
);
2556 wait_event_killable(nvme_kthread_wait
, nvme_thread
);
2558 if (IS_ERR_OR_NULL(nvme_thread
)) {
2559 result
= nvme_thread
? PTR_ERR(nvme_thread
) : -EINTR
;
2563 nvme_init_queue(dev
->queues
[0], 0);
2565 result
= nvme_setup_io_queues(dev
);
2569 nvme_set_irq_hints(dev
);
2574 nvme_disable_queue(dev
, 0);
2575 nvme_dev_list_remove(dev
);
2577 nvme_dev_unmap(dev
);
2581 static int nvme_remove_dead_ctrl(void *arg
)
2583 struct nvme_dev
*dev
= (struct nvme_dev
*)arg
;
2584 struct pci_dev
*pdev
= dev
->pci_dev
;
2586 if (pci_get_drvdata(pdev
))
2587 pci_stop_and_remove_bus_device_locked(pdev
);
2588 kref_put(&dev
->kref
, nvme_free_dev
);
2592 static void nvme_remove_disks(struct work_struct
*ws
)
2594 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2596 nvme_free_queues(dev
, 1);
2597 nvme_dev_remove(dev
);
2600 static int nvme_dev_resume(struct nvme_dev
*dev
)
2604 ret
= nvme_dev_start(dev
);
2607 if (dev
->online_queues
< 2) {
2608 spin_lock(&dev_list_lock
);
2609 dev
->reset_workfn
= nvme_remove_disks
;
2610 queue_work(nvme_workq
, &dev
->reset_work
);
2611 spin_unlock(&dev_list_lock
);
2613 dev
->initialized
= 1;
2617 static void nvme_dev_reset(struct nvme_dev
*dev
)
2619 nvme_dev_shutdown(dev
);
2620 if (nvme_dev_resume(dev
)) {
2621 dev_warn(&dev
->pci_dev
->dev
, "Device failed to resume\n");
2622 kref_get(&dev
->kref
);
2623 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl
, dev
, "nvme%d",
2625 dev_err(&dev
->pci_dev
->dev
,
2626 "Failed to start controller remove task\n");
2627 kref_put(&dev
->kref
, nvme_free_dev
);
2632 static void nvme_reset_failed_dev(struct work_struct
*ws
)
2634 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2635 nvme_dev_reset(dev
);
2638 static void nvme_reset_workfn(struct work_struct
*work
)
2640 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, reset_work
);
2641 dev
->reset_workfn(work
);
2644 static int nvme_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2646 int node
, result
= -ENOMEM
;
2647 struct nvme_dev
*dev
;
2649 node
= dev_to_node(&pdev
->dev
);
2650 if (node
== NUMA_NO_NODE
)
2651 set_dev_node(&pdev
->dev
, 0);
2653 dev
= kzalloc_node(sizeof(*dev
), GFP_KERNEL
, node
);
2656 dev
->entry
= kzalloc_node(num_possible_cpus() * sizeof(*dev
->entry
),
2660 dev
->queues
= kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2665 INIT_LIST_HEAD(&dev
->namespaces
);
2666 dev
->reset_workfn
= nvme_reset_failed_dev
;
2667 INIT_WORK(&dev
->reset_work
, nvme_reset_workfn
);
2668 dev
->pci_dev
= pci_dev_get(pdev
);
2669 pci_set_drvdata(pdev
, dev
);
2670 result
= nvme_set_instance(dev
);
2674 result
= nvme_setup_prp_pools(dev
);
2678 kref_init(&dev
->kref
);
2679 result
= nvme_dev_start(dev
);
2683 if (dev
->online_queues
> 1)
2684 result
= nvme_dev_add(dev
);
2688 scnprintf(dev
->name
, sizeof(dev
->name
), "nvme%d", dev
->instance
);
2689 dev
->miscdev
.minor
= MISC_DYNAMIC_MINOR
;
2690 dev
->miscdev
.parent
= &pdev
->dev
;
2691 dev
->miscdev
.name
= dev
->name
;
2692 dev
->miscdev
.fops
= &nvme_dev_fops
;
2693 result
= misc_register(&dev
->miscdev
);
2697 nvme_set_irq_hints(dev
);
2699 dev
->initialized
= 1;
2703 nvme_dev_remove(dev
);
2704 nvme_dev_remove_admin(dev
);
2705 nvme_free_namespaces(dev
);
2707 nvme_dev_shutdown(dev
);
2709 nvme_free_queues(dev
, 0);
2710 nvme_release_prp_pools(dev
);
2712 nvme_release_instance(dev
);
2714 pci_dev_put(dev
->pci_dev
);
2722 static void nvme_reset_notify(struct pci_dev
*pdev
, bool prepare
)
2724 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2727 nvme_dev_shutdown(dev
);
2729 nvme_dev_resume(dev
);
2732 static void nvme_shutdown(struct pci_dev
*pdev
)
2734 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2735 nvme_dev_shutdown(dev
);
2738 static void nvme_remove(struct pci_dev
*pdev
)
2740 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2742 spin_lock(&dev_list_lock
);
2743 list_del_init(&dev
->node
);
2744 spin_unlock(&dev_list_lock
);
2746 pci_set_drvdata(pdev
, NULL
);
2747 flush_work(&dev
->reset_work
);
2748 misc_deregister(&dev
->miscdev
);
2749 nvme_dev_remove(dev
);
2750 nvme_dev_shutdown(dev
);
2751 nvme_dev_remove_admin(dev
);
2752 nvme_free_queues(dev
, 0);
2753 nvme_free_admin_tags(dev
);
2754 nvme_release_instance(dev
);
2755 nvme_release_prp_pools(dev
);
2756 kref_put(&dev
->kref
, nvme_free_dev
);
2759 /* These functions are yet to be implemented */
2760 #define nvme_error_detected NULL
2761 #define nvme_dump_registers NULL
2762 #define nvme_link_reset NULL
2763 #define nvme_slot_reset NULL
2764 #define nvme_error_resume NULL
2766 #ifdef CONFIG_PM_SLEEP
2767 static int nvme_suspend(struct device
*dev
)
2769 struct pci_dev
*pdev
= to_pci_dev(dev
);
2770 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2772 nvme_dev_shutdown(ndev
);
2776 static int nvme_resume(struct device
*dev
)
2778 struct pci_dev
*pdev
= to_pci_dev(dev
);
2779 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2781 if (nvme_dev_resume(ndev
) && !work_busy(&ndev
->reset_work
)) {
2782 ndev
->reset_workfn
= nvme_reset_failed_dev
;
2783 queue_work(nvme_workq
, &ndev
->reset_work
);
2789 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops
, nvme_suspend
, nvme_resume
);
2791 static const struct pci_error_handlers nvme_err_handler
= {
2792 .error_detected
= nvme_error_detected
,
2793 .mmio_enabled
= nvme_dump_registers
,
2794 .link_reset
= nvme_link_reset
,
2795 .slot_reset
= nvme_slot_reset
,
2796 .resume
= nvme_error_resume
,
2797 .reset_notify
= nvme_reset_notify
,
2800 /* Move to pci_ids.h later */
2801 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
2803 static const struct pci_device_id nvme_id_table
[] = {
2804 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS
, 0xffffff) },
2807 MODULE_DEVICE_TABLE(pci
, nvme_id_table
);
2809 static struct pci_driver nvme_driver
= {
2811 .id_table
= nvme_id_table
,
2812 .probe
= nvme_probe
,
2813 .remove
= nvme_remove
,
2814 .shutdown
= nvme_shutdown
,
2816 .pm
= &nvme_dev_pm_ops
,
2818 .err_handler
= &nvme_err_handler
,
2821 static int __init
nvme_init(void)
2825 init_waitqueue_head(&nvme_kthread_wait
);
2827 nvme_workq
= create_singlethread_workqueue("nvme");
2831 result
= register_blkdev(nvme_major
, "nvme");
2834 else if (result
> 0)
2835 nvme_major
= result
;
2837 result
= pci_register_driver(&nvme_driver
);
2839 goto unregister_blkdev
;
2843 unregister_blkdev(nvme_major
, "nvme");
2845 destroy_workqueue(nvme_workq
);
2849 static void __exit
nvme_exit(void)
2851 pci_unregister_driver(&nvme_driver
);
2852 unregister_hotcpu_notifier(&nvme_nb
);
2853 unregister_blkdev(nvme_major
, "nvme");
2854 destroy_workqueue(nvme_workq
);
2855 BUG_ON(nvme_thread
&& !IS_ERR(nvme_thread
));
2859 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2860 MODULE_LICENSE("GPL");
2861 MODULE_VERSION("0.9");
2862 module_init(nvme_init
);
2863 module_exit(nvme_exit
);