2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bio.h>
17 #include <linux/bitops.h>
18 #include <linux/blkdev.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/percpu.h>
37 #include <linux/poison.h>
38 #include <linux/ptrace.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/types.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45 #include <trace/events/block.h>
47 #define NVME_Q_DEPTH 1024
48 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
49 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
50 #define ADMIN_TIMEOUT (60 * HZ)
51 #define IOD_TIMEOUT (4 * NVME_IO_TIMEOUT)
53 unsigned char io_timeout
= 30;
54 module_param(io_timeout
, byte
, 0644);
55 MODULE_PARM_DESC(io_timeout
, "timeout in seconds for I/O");
57 static int nvme_major
;
58 module_param(nvme_major
, int, 0);
60 static int use_threaded_interrupts
;
61 module_param(use_threaded_interrupts
, int, 0);
63 static DEFINE_SPINLOCK(dev_list_lock
);
64 static LIST_HEAD(dev_list
);
65 static struct task_struct
*nvme_thread
;
66 static struct workqueue_struct
*nvme_workq
;
67 static wait_queue_head_t nvme_kthread_wait
;
69 static void nvme_reset_failed_dev(struct work_struct
*ws
);
71 struct async_cmd_info
{
72 struct kthread_work work
;
73 struct kthread_worker
*worker
;
80 * An NVM Express queue. Each device has at least two (one for admin
81 * commands and one for I/O commands).
84 struct rcu_head r_head
;
85 struct device
*q_dmadev
;
87 char irqname
[24]; /* nvme4294967295-65535\0 */
89 struct nvme_command
*sq_cmds
;
90 volatile struct nvme_completion
*cqes
;
91 dma_addr_t sq_dma_addr
;
92 dma_addr_t cq_dma_addr
;
93 wait_queue_head_t sq_full
;
94 wait_queue_t sq_cong_wait
;
95 struct bio_list sq_cong
;
96 struct list_head iod_bio
;
107 cpumask_var_t cpu_mask
;
108 struct async_cmd_info cmdinfo
;
109 unsigned long cmdid_data
[];
113 * Check we didin't inadvertently grow the command struct
115 static inline void _nvme_check_size(void)
117 BUILD_BUG_ON(sizeof(struct nvme_rw_command
) != 64);
118 BUILD_BUG_ON(sizeof(struct nvme_create_cq
) != 64);
119 BUILD_BUG_ON(sizeof(struct nvme_create_sq
) != 64);
120 BUILD_BUG_ON(sizeof(struct nvme_delete_queue
) != 64);
121 BUILD_BUG_ON(sizeof(struct nvme_features
) != 64);
122 BUILD_BUG_ON(sizeof(struct nvme_format_cmd
) != 64);
123 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd
) != 64);
124 BUILD_BUG_ON(sizeof(struct nvme_command
) != 64);
125 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl
) != 4096);
126 BUILD_BUG_ON(sizeof(struct nvme_id_ns
) != 4096);
127 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type
) != 64);
128 BUILD_BUG_ON(sizeof(struct nvme_smart_log
) != 512);
131 typedef void (*nvme_completion_fn
)(struct nvme_queue
*, void *,
132 struct nvme_completion
*);
134 struct nvme_cmd_info
{
135 nvme_completion_fn fn
;
137 unsigned long timeout
;
141 static struct nvme_cmd_info
*nvme_cmd_info(struct nvme_queue
*nvmeq
)
143 return (void *)&nvmeq
->cmdid_data
[BITS_TO_LONGS(nvmeq
->q_depth
)];
146 static unsigned nvme_queue_extra(int depth
)
148 return DIV_ROUND_UP(depth
, 8) + (depth
* sizeof(struct nvme_cmd_info
));
152 * alloc_cmdid() - Allocate a Command ID
153 * @nvmeq: The queue that will be used for this command
154 * @ctx: A pointer that will be passed to the handler
155 * @handler: The function to call on completion
157 * Allocate a Command ID for a queue. The data passed in will
158 * be passed to the completion handler. This is implemented by using
159 * the bottom two bits of the ctx pointer to store the handler ID.
160 * Passing in a pointer that's not 4-byte aligned will cause a BUG.
161 * We can change this if it becomes a problem.
163 * May be called with local interrupts disabled and the q_lock held,
164 * or with interrupts enabled and no locks held.
166 static int alloc_cmdid(struct nvme_queue
*nvmeq
, void *ctx
,
167 nvme_completion_fn handler
, unsigned timeout
)
169 int depth
= nvmeq
->q_depth
- 1;
170 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
174 cmdid
= find_first_zero_bit(nvmeq
->cmdid_data
, depth
);
177 } while (test_and_set_bit(cmdid
, nvmeq
->cmdid_data
));
179 info
[cmdid
].fn
= handler
;
180 info
[cmdid
].ctx
= ctx
;
181 info
[cmdid
].timeout
= jiffies
+ timeout
;
182 info
[cmdid
].aborted
= 0;
186 static int alloc_cmdid_killable(struct nvme_queue
*nvmeq
, void *ctx
,
187 nvme_completion_fn handler
, unsigned timeout
)
190 wait_event_killable(nvmeq
->sq_full
,
191 (cmdid
= alloc_cmdid(nvmeq
, ctx
, handler
, timeout
)) >= 0);
192 return (cmdid
< 0) ? -EINTR
: cmdid
;
195 /* Special values must be less than 0x1000 */
196 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
197 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
198 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
199 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
200 #define CMD_CTX_FLUSH (0x318 + CMD_CTX_BASE)
201 #define CMD_CTX_ABORT (0x31C + CMD_CTX_BASE)
203 static void special_completion(struct nvme_queue
*nvmeq
, void *ctx
,
204 struct nvme_completion
*cqe
)
206 if (ctx
== CMD_CTX_CANCELLED
)
208 if (ctx
== CMD_CTX_FLUSH
)
210 if (ctx
== CMD_CTX_ABORT
) {
211 ++nvmeq
->dev
->abort_limit
;
214 if (ctx
== CMD_CTX_COMPLETED
) {
215 dev_warn(nvmeq
->q_dmadev
,
216 "completed id %d twice on queue %d\n",
217 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
220 if (ctx
== CMD_CTX_INVALID
) {
221 dev_warn(nvmeq
->q_dmadev
,
222 "invalid id %d completed on queue %d\n",
223 cqe
->command_id
, le16_to_cpup(&cqe
->sq_id
));
227 dev_warn(nvmeq
->q_dmadev
, "Unknown special completion %p\n", ctx
);
230 static void async_completion(struct nvme_queue
*nvmeq
, void *ctx
,
231 struct nvme_completion
*cqe
)
233 struct async_cmd_info
*cmdinfo
= ctx
;
234 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
235 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
236 queue_kthread_work(cmdinfo
->worker
, &cmdinfo
->work
);
240 * Called with local interrupts disabled and the q_lock held. May not sleep.
242 static void *free_cmdid(struct nvme_queue
*nvmeq
, int cmdid
,
243 nvme_completion_fn
*fn
)
246 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
248 if (cmdid
>= nvmeq
->q_depth
|| !info
[cmdid
].fn
) {
250 *fn
= special_completion
;
251 return CMD_CTX_INVALID
;
254 *fn
= info
[cmdid
].fn
;
255 ctx
= info
[cmdid
].ctx
;
256 info
[cmdid
].fn
= special_completion
;
257 info
[cmdid
].ctx
= CMD_CTX_COMPLETED
;
258 clear_bit(cmdid
, nvmeq
->cmdid_data
);
259 wake_up(&nvmeq
->sq_full
);
263 static void *cancel_cmdid(struct nvme_queue
*nvmeq
, int cmdid
,
264 nvme_completion_fn
*fn
)
267 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
269 *fn
= info
[cmdid
].fn
;
270 ctx
= info
[cmdid
].ctx
;
271 info
[cmdid
].fn
= special_completion
;
272 info
[cmdid
].ctx
= CMD_CTX_CANCELLED
;
276 static struct nvme_queue
*raw_nvmeq(struct nvme_dev
*dev
, int qid
)
278 return rcu_dereference_raw(dev
->queues
[qid
]);
281 static struct nvme_queue
*get_nvmeq(struct nvme_dev
*dev
) __acquires(RCU
)
283 unsigned queue_id
= get_cpu_var(*dev
->io_queue
);
285 return rcu_dereference(dev
->queues
[queue_id
]);
288 static void put_nvmeq(struct nvme_queue
*nvmeq
) __releases(RCU
)
291 put_cpu_var(nvmeq
->dev
->io_queue
);
294 static struct nvme_queue
*lock_nvmeq(struct nvme_dev
*dev
, int q_idx
)
298 return rcu_dereference(dev
->queues
[q_idx
]);
301 static void unlock_nvmeq(struct nvme_queue
*nvmeq
) __releases(RCU
)
307 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
308 * @nvmeq: The queue to use
309 * @cmd: The command to send
311 * Safe to use from interrupt context
313 static int nvme_submit_cmd(struct nvme_queue
*nvmeq
, struct nvme_command
*cmd
)
317 spin_lock_irqsave(&nvmeq
->q_lock
, flags
);
318 if (nvmeq
->q_suspended
) {
319 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
322 tail
= nvmeq
->sq_tail
;
323 memcpy(&nvmeq
->sq_cmds
[tail
], cmd
, sizeof(*cmd
));
324 if (++tail
== nvmeq
->q_depth
)
326 writel(tail
, nvmeq
->q_db
);
327 nvmeq
->sq_tail
= tail
;
328 spin_unlock_irqrestore(&nvmeq
->q_lock
, flags
);
333 static __le64
**iod_list(struct nvme_iod
*iod
)
335 return ((void *)iod
) + iod
->offset
;
339 * Will slightly overestimate the number of pages needed. This is OK
340 * as it only leads to a small amount of wasted memory for the lifetime of
343 static int nvme_npages(unsigned size
)
345 unsigned nprps
= DIV_ROUND_UP(size
+ PAGE_SIZE
, PAGE_SIZE
);
346 return DIV_ROUND_UP(8 * nprps
, PAGE_SIZE
- 8);
349 static struct nvme_iod
*
350 nvme_alloc_iod(unsigned nseg
, unsigned nbytes
, gfp_t gfp
)
352 struct nvme_iod
*iod
= kmalloc(sizeof(struct nvme_iod
) +
353 sizeof(__le64
*) * nvme_npages(nbytes
) +
354 sizeof(struct scatterlist
) * nseg
, gfp
);
357 iod
->offset
= offsetof(struct nvme_iod
, sg
[nseg
]);
359 iod
->length
= nbytes
;
361 iod
->first_dma
= 0ULL;
362 iod
->start_time
= jiffies
;
368 void nvme_free_iod(struct nvme_dev
*dev
, struct nvme_iod
*iod
)
370 const int last_prp
= PAGE_SIZE
/ 8 - 1;
372 __le64
**list
= iod_list(iod
);
373 dma_addr_t prp_dma
= iod
->first_dma
;
375 if (iod
->npages
== 0)
376 dma_pool_free(dev
->prp_small_pool
, list
[0], prp_dma
);
377 for (i
= 0; i
< iod
->npages
; i
++) {
378 __le64
*prp_list
= list
[i
];
379 dma_addr_t next_prp_dma
= le64_to_cpu(prp_list
[last_prp
]);
380 dma_pool_free(dev
->prp_page_pool
, prp_list
, prp_dma
);
381 prp_dma
= next_prp_dma
;
386 static void nvme_start_io_acct(struct bio
*bio
)
388 struct gendisk
*disk
= bio
->bi_bdev
->bd_disk
;
389 const int rw
= bio_data_dir(bio
);
390 int cpu
= part_stat_lock();
391 part_round_stats(cpu
, &disk
->part0
);
392 part_stat_inc(cpu
, &disk
->part0
, ios
[rw
]);
393 part_stat_add(cpu
, &disk
->part0
, sectors
[rw
], bio_sectors(bio
));
394 part_inc_in_flight(&disk
->part0
, rw
);
398 static void nvme_end_io_acct(struct bio
*bio
, unsigned long start_time
)
400 struct gendisk
*disk
= bio
->bi_bdev
->bd_disk
;
401 const int rw
= bio_data_dir(bio
);
402 unsigned long duration
= jiffies
- start_time
;
403 int cpu
= part_stat_lock();
404 part_stat_add(cpu
, &disk
->part0
, ticks
[rw
], duration
);
405 part_round_stats(cpu
, &disk
->part0
);
406 part_dec_in_flight(&disk
->part0
, rw
);
410 static void bio_completion(struct nvme_queue
*nvmeq
, void *ctx
,
411 struct nvme_completion
*cqe
)
413 struct nvme_iod
*iod
= ctx
;
414 struct bio
*bio
= iod
->private;
415 u16 status
= le16_to_cpup(&cqe
->status
) >> 1;
418 if (unlikely(status
)) {
419 if (!(status
& NVME_SC_DNR
||
420 bio
->bi_rw
& REQ_FAILFAST_MASK
) &&
421 (jiffies
- iod
->start_time
) < IOD_TIMEOUT
) {
422 if (!waitqueue_active(&nvmeq
->sq_full
))
423 add_wait_queue(&nvmeq
->sq_full
,
424 &nvmeq
->sq_cong_wait
);
425 list_add_tail(&iod
->node
, &nvmeq
->iod_bio
);
426 wake_up(&nvmeq
->sq_full
);
432 dma_unmap_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
,
433 bio_data_dir(bio
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
434 nvme_end_io_acct(bio
, iod
->start_time
);
436 nvme_free_iod(nvmeq
->dev
, iod
);
438 trace_block_bio_complete(bdev_get_queue(bio
->bi_bdev
), bio
, error
);
439 bio_endio(bio
, error
);
442 /* length is in bytes. gfp flags indicates whether we may sleep. */
443 int nvme_setup_prps(struct nvme_dev
*dev
, struct nvme_iod
*iod
, int total_len
,
446 struct dma_pool
*pool
;
447 int length
= total_len
;
448 struct scatterlist
*sg
= iod
->sg
;
449 int dma_len
= sg_dma_len(sg
);
450 u64 dma_addr
= sg_dma_address(sg
);
451 int offset
= offset_in_page(dma_addr
);
453 __le64
**list
= iod_list(iod
);
457 length
-= (PAGE_SIZE
- offset
);
461 dma_len
-= (PAGE_SIZE
- offset
);
463 dma_addr
+= (PAGE_SIZE
- offset
);
466 dma_addr
= sg_dma_address(sg
);
467 dma_len
= sg_dma_len(sg
);
470 if (length
<= PAGE_SIZE
) {
471 iod
->first_dma
= dma_addr
;
475 nprps
= DIV_ROUND_UP(length
, PAGE_SIZE
);
476 if (nprps
<= (256 / 8)) {
477 pool
= dev
->prp_small_pool
;
480 pool
= dev
->prp_page_pool
;
484 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
486 iod
->first_dma
= dma_addr
;
488 return (total_len
- length
) + PAGE_SIZE
;
491 iod
->first_dma
= prp_dma
;
494 if (i
== PAGE_SIZE
/ 8) {
495 __le64
*old_prp_list
= prp_list
;
496 prp_list
= dma_pool_alloc(pool
, gfp
, &prp_dma
);
498 return total_len
- length
;
499 list
[iod
->npages
++] = prp_list
;
500 prp_list
[0] = old_prp_list
[i
- 1];
501 old_prp_list
[i
- 1] = cpu_to_le64(prp_dma
);
504 prp_list
[i
++] = cpu_to_le64(dma_addr
);
505 dma_len
-= PAGE_SIZE
;
506 dma_addr
+= PAGE_SIZE
;
514 dma_addr
= sg_dma_address(sg
);
515 dma_len
= sg_dma_len(sg
);
521 static int nvme_split_and_submit(struct bio
*bio
, struct nvme_queue
*nvmeq
,
524 struct bio
*split
= bio_split(bio
, len
>> 9, GFP_ATOMIC
, NULL
);
528 trace_block_split(bdev_get_queue(bio
->bi_bdev
), bio
,
529 split
->bi_iter
.bi_sector
);
530 bio_chain(split
, bio
);
532 if (!waitqueue_active(&nvmeq
->sq_full
))
533 add_wait_queue(&nvmeq
->sq_full
, &nvmeq
->sq_cong_wait
);
534 bio_list_add(&nvmeq
->sq_cong
, split
);
535 bio_list_add(&nvmeq
->sq_cong
, bio
);
536 wake_up(&nvmeq
->sq_full
);
541 /* NVMe scatterlists require no holes in the virtual address */
542 #define BIOVEC_NOT_VIRT_MERGEABLE(vec1, vec2) ((vec2)->bv_offset || \
543 (((vec1)->bv_offset + (vec1)->bv_len) % PAGE_SIZE))
545 static int nvme_map_bio(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
,
546 struct bio
*bio
, enum dma_data_direction dma_dir
, int psegs
)
548 struct bio_vec bvec
, bvprv
;
549 struct bvec_iter iter
;
550 struct scatterlist
*sg
= NULL
;
551 int length
= 0, nsegs
= 0, split_len
= bio
->bi_iter
.bi_size
;
554 if (nvmeq
->dev
->stripe_size
)
555 split_len
= nvmeq
->dev
->stripe_size
-
556 ((bio
->bi_iter
.bi_sector
<< 9) &
557 (nvmeq
->dev
->stripe_size
- 1));
559 sg_init_table(iod
->sg
, psegs
);
560 bio_for_each_segment(bvec
, bio
, iter
) {
561 if (!first
&& BIOVEC_PHYS_MERGEABLE(&bvprv
, &bvec
)) {
562 sg
->length
+= bvec
.bv_len
;
564 if (!first
&& BIOVEC_NOT_VIRT_MERGEABLE(&bvprv
, &bvec
))
565 return nvme_split_and_submit(bio
, nvmeq
,
568 sg
= sg
? sg
+ 1 : iod
->sg
;
569 sg_set_page(sg
, bvec
.bv_page
,
570 bvec
.bv_len
, bvec
.bv_offset
);
574 if (split_len
- length
< bvec
.bv_len
)
575 return nvme_split_and_submit(bio
, nvmeq
, split_len
);
576 length
+= bvec
.bv_len
;
582 if (dma_map_sg(nvmeq
->q_dmadev
, iod
->sg
, iod
->nents
, dma_dir
) == 0)
585 BUG_ON(length
!= bio
->bi_iter
.bi_size
);
589 static int nvme_submit_discard(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
590 struct bio
*bio
, struct nvme_iod
*iod
, int cmdid
)
592 struct nvme_dsm_range
*range
=
593 (struct nvme_dsm_range
*)iod_list(iod
)[0];
594 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
596 range
->cattr
= cpu_to_le32(0);
597 range
->nlb
= cpu_to_le32(bio
->bi_iter
.bi_size
>> ns
->lba_shift
);
598 range
->slba
= cpu_to_le64(nvme_block_nr(ns
, bio
->bi_iter
.bi_sector
));
600 memset(cmnd
, 0, sizeof(*cmnd
));
601 cmnd
->dsm
.opcode
= nvme_cmd_dsm
;
602 cmnd
->dsm
.command_id
= cmdid
;
603 cmnd
->dsm
.nsid
= cpu_to_le32(ns
->ns_id
);
604 cmnd
->dsm
.prp1
= cpu_to_le64(iod
->first_dma
);
606 cmnd
->dsm
.attributes
= cpu_to_le32(NVME_DSMGMT_AD
);
608 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
610 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
615 static int nvme_submit_flush(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
618 struct nvme_command
*cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
620 memset(cmnd
, 0, sizeof(*cmnd
));
621 cmnd
->common
.opcode
= nvme_cmd_flush
;
622 cmnd
->common
.command_id
= cmdid
;
623 cmnd
->common
.nsid
= cpu_to_le32(ns
->ns_id
);
625 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
627 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
632 int nvme_submit_flush_data(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
)
634 int cmdid
= alloc_cmdid(nvmeq
, (void *)CMD_CTX_FLUSH
,
635 special_completion
, NVME_IO_TIMEOUT
);
636 if (unlikely(cmdid
< 0))
639 return nvme_submit_flush(nvmeq
, ns
, cmdid
);
642 static int nvme_submit_iod(struct nvme_queue
*nvmeq
, struct nvme_iod
*iod
)
644 struct bio
*bio
= iod
->private;
645 struct nvme_ns
*ns
= bio
->bi_bdev
->bd_disk
->private_data
;
646 struct nvme_command
*cmnd
;
651 cmdid
= alloc_cmdid(nvmeq
, iod
, bio_completion
, NVME_IO_TIMEOUT
);
652 if (unlikely(cmdid
< 0))
655 if (bio
->bi_rw
& REQ_DISCARD
)
656 return nvme_submit_discard(nvmeq
, ns
, bio
, iod
, cmdid
);
657 if ((bio
->bi_rw
& REQ_FLUSH
) && !iod
->nents
)
658 return nvme_submit_flush(nvmeq
, ns
, cmdid
);
661 if (bio
->bi_rw
& REQ_FUA
)
662 control
|= NVME_RW_FUA
;
663 if (bio
->bi_rw
& (REQ_FAILFAST_DEV
| REQ_RAHEAD
))
664 control
|= NVME_RW_LR
;
667 if (bio
->bi_rw
& REQ_RAHEAD
)
668 dsmgmt
|= NVME_RW_DSM_FREQ_PREFETCH
;
670 cmnd
= &nvmeq
->sq_cmds
[nvmeq
->sq_tail
];
671 memset(cmnd
, 0, sizeof(*cmnd
));
673 cmnd
->rw
.opcode
= bio_data_dir(bio
) ? nvme_cmd_write
: nvme_cmd_read
;
674 cmnd
->rw
.command_id
= cmdid
;
675 cmnd
->rw
.nsid
= cpu_to_le32(ns
->ns_id
);
676 cmnd
->rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
677 cmnd
->rw
.prp2
= cpu_to_le64(iod
->first_dma
);
678 cmnd
->rw
.slba
= cpu_to_le64(nvme_block_nr(ns
, bio
->bi_iter
.bi_sector
));
680 cpu_to_le16((bio
->bi_iter
.bi_size
>> ns
->lba_shift
) - 1);
681 cmnd
->rw
.control
= cpu_to_le16(control
);
682 cmnd
->rw
.dsmgmt
= cpu_to_le32(dsmgmt
);
684 if (++nvmeq
->sq_tail
== nvmeq
->q_depth
)
686 writel(nvmeq
->sq_tail
, nvmeq
->q_db
);
692 * Called with local interrupts disabled and the q_lock held. May not sleep.
694 static int nvme_submit_bio_queue(struct nvme_queue
*nvmeq
, struct nvme_ns
*ns
,
697 struct nvme_iod
*iod
;
698 int psegs
= bio_phys_segments(ns
->queue
, bio
);
701 if ((bio
->bi_rw
& REQ_FLUSH
) && psegs
) {
702 result
= nvme_submit_flush_data(nvmeq
, ns
);
707 iod
= nvme_alloc_iod(psegs
, bio
->bi_iter
.bi_size
, GFP_ATOMIC
);
712 if (bio
->bi_rw
& REQ_DISCARD
) {
715 * We reuse the small pool to allocate the 16-byte range here
716 * as it is not worth having a special pool for these or
717 * additional cases to handle freeing the iod.
719 range
= dma_pool_alloc(nvmeq
->dev
->prp_small_pool
,
726 iod_list(iod
)[0] = (__le64
*)range
;
729 result
= nvme_map_bio(nvmeq
, iod
, bio
,
730 bio_data_dir(bio
) ? DMA_TO_DEVICE
: DMA_FROM_DEVICE
,
734 if (nvme_setup_prps(nvmeq
->dev
, iod
, result
, GFP_ATOMIC
) !=
739 nvme_start_io_acct(bio
);
741 if (unlikely(nvme_submit_iod(nvmeq
, iod
))) {
742 if (!waitqueue_active(&nvmeq
->sq_full
))
743 add_wait_queue(&nvmeq
->sq_full
, &nvmeq
->sq_cong_wait
);
744 list_add_tail(&iod
->node
, &nvmeq
->iod_bio
);
749 nvme_free_iod(nvmeq
->dev
, iod
);
753 static int nvme_process_cq(struct nvme_queue
*nvmeq
)
757 head
= nvmeq
->cq_head
;
758 phase
= nvmeq
->cq_phase
;
762 nvme_completion_fn fn
;
763 struct nvme_completion cqe
= nvmeq
->cqes
[head
];
764 if ((le16_to_cpu(cqe
.status
) & 1) != phase
)
766 nvmeq
->sq_head
= le16_to_cpu(cqe
.sq_head
);
767 if (++head
== nvmeq
->q_depth
) {
772 ctx
= free_cmdid(nvmeq
, cqe
.command_id
, &fn
);
773 fn(nvmeq
, ctx
, &cqe
);
776 /* If the controller ignores the cq head doorbell and continuously
777 * writes to the queue, it is theoretically possible to wrap around
778 * the queue twice and mistakenly return IRQ_NONE. Linux only
779 * requires that 0.1% of your interrupts are handled, so this isn't
782 if (head
== nvmeq
->cq_head
&& phase
== nvmeq
->cq_phase
)
785 writel(head
, nvmeq
->q_db
+ nvmeq
->dev
->db_stride
);
786 nvmeq
->cq_head
= head
;
787 nvmeq
->cq_phase
= phase
;
793 static void nvme_make_request(struct request_queue
*q
, struct bio
*bio
)
795 struct nvme_ns
*ns
= q
->queuedata
;
796 struct nvme_queue
*nvmeq
= get_nvmeq(ns
->dev
);
801 bio_endio(bio
, -EIO
);
805 spin_lock_irq(&nvmeq
->q_lock
);
806 if (!nvmeq
->q_suspended
&& bio_list_empty(&nvmeq
->sq_cong
))
807 result
= nvme_submit_bio_queue(nvmeq
, ns
, bio
);
808 if (unlikely(result
)) {
809 if (!waitqueue_active(&nvmeq
->sq_full
))
810 add_wait_queue(&nvmeq
->sq_full
, &nvmeq
->sq_cong_wait
);
811 bio_list_add(&nvmeq
->sq_cong
, bio
);
814 nvme_process_cq(nvmeq
);
815 spin_unlock_irq(&nvmeq
->q_lock
);
819 static irqreturn_t
nvme_irq(int irq
, void *data
)
822 struct nvme_queue
*nvmeq
= data
;
823 spin_lock(&nvmeq
->q_lock
);
824 nvme_process_cq(nvmeq
);
825 result
= nvmeq
->cqe_seen
? IRQ_HANDLED
: IRQ_NONE
;
827 spin_unlock(&nvmeq
->q_lock
);
831 static irqreturn_t
nvme_irq_check(int irq
, void *data
)
833 struct nvme_queue
*nvmeq
= data
;
834 struct nvme_completion cqe
= nvmeq
->cqes
[nvmeq
->cq_head
];
835 if ((le16_to_cpu(cqe
.status
) & 1) != nvmeq
->cq_phase
)
837 return IRQ_WAKE_THREAD
;
840 static void nvme_abort_command(struct nvme_queue
*nvmeq
, int cmdid
)
842 spin_lock_irq(&nvmeq
->q_lock
);
843 cancel_cmdid(nvmeq
, cmdid
, NULL
);
844 spin_unlock_irq(&nvmeq
->q_lock
);
847 struct sync_cmd_info
{
848 struct task_struct
*task
;
853 static void sync_completion(struct nvme_queue
*nvmeq
, void *ctx
,
854 struct nvme_completion
*cqe
)
856 struct sync_cmd_info
*cmdinfo
= ctx
;
857 cmdinfo
->result
= le32_to_cpup(&cqe
->result
);
858 cmdinfo
->status
= le16_to_cpup(&cqe
->status
) >> 1;
859 wake_up_process(cmdinfo
->task
);
863 * Returns 0 on success. If the result is negative, it's a Linux error code;
864 * if the result is positive, it's an NVM Express status code
866 static int nvme_submit_sync_cmd(struct nvme_dev
*dev
, int q_idx
,
867 struct nvme_command
*cmd
,
868 u32
*result
, unsigned timeout
)
871 struct sync_cmd_info cmdinfo
;
872 struct nvme_queue
*nvmeq
;
874 nvmeq
= lock_nvmeq(dev
, q_idx
);
880 cmdinfo
.task
= current
;
881 cmdinfo
.status
= -EINTR
;
883 cmdid
= alloc_cmdid(nvmeq
, &cmdinfo
, sync_completion
, timeout
);
888 cmd
->common
.command_id
= cmdid
;
890 set_current_state(TASK_KILLABLE
);
891 ret
= nvme_submit_cmd(nvmeq
, cmd
);
893 free_cmdid(nvmeq
, cmdid
, NULL
);
895 set_current_state(TASK_RUNNING
);
899 schedule_timeout(timeout
);
901 if (cmdinfo
.status
== -EINTR
) {
902 nvmeq
= lock_nvmeq(dev
, q_idx
);
904 nvme_abort_command(nvmeq
, cmdid
);
910 *result
= cmdinfo
.result
;
912 return cmdinfo
.status
;
915 static int nvme_submit_async_cmd(struct nvme_queue
*nvmeq
,
916 struct nvme_command
*cmd
,
917 struct async_cmd_info
*cmdinfo
, unsigned timeout
)
921 cmdid
= alloc_cmdid_killable(nvmeq
, cmdinfo
, async_completion
, timeout
);
924 cmdinfo
->status
= -EINTR
;
925 cmd
->common
.command_id
= cmdid
;
926 return nvme_submit_cmd(nvmeq
, cmd
);
929 int nvme_submit_admin_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
932 return nvme_submit_sync_cmd(dev
, 0, cmd
, result
, ADMIN_TIMEOUT
);
935 int nvme_submit_io_cmd(struct nvme_dev
*dev
, struct nvme_command
*cmd
,
938 return nvme_submit_sync_cmd(dev
, smp_processor_id() + 1, cmd
, result
,
942 static int nvme_submit_admin_cmd_async(struct nvme_dev
*dev
,
943 struct nvme_command
*cmd
, struct async_cmd_info
*cmdinfo
)
945 return nvme_submit_async_cmd(raw_nvmeq(dev
, 0), cmd
, cmdinfo
,
949 static int adapter_delete_queue(struct nvme_dev
*dev
, u8 opcode
, u16 id
)
952 struct nvme_command c
;
954 memset(&c
, 0, sizeof(c
));
955 c
.delete_queue
.opcode
= opcode
;
956 c
.delete_queue
.qid
= cpu_to_le16(id
);
958 status
= nvme_submit_admin_cmd(dev
, &c
, NULL
);
964 static int adapter_alloc_cq(struct nvme_dev
*dev
, u16 qid
,
965 struct nvme_queue
*nvmeq
)
968 struct nvme_command c
;
969 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_CQ_IRQ_ENABLED
;
971 memset(&c
, 0, sizeof(c
));
972 c
.create_cq
.opcode
= nvme_admin_create_cq
;
973 c
.create_cq
.prp1
= cpu_to_le64(nvmeq
->cq_dma_addr
);
974 c
.create_cq
.cqid
= cpu_to_le16(qid
);
975 c
.create_cq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
976 c
.create_cq
.cq_flags
= cpu_to_le16(flags
);
977 c
.create_cq
.irq_vector
= cpu_to_le16(nvmeq
->cq_vector
);
979 status
= nvme_submit_admin_cmd(dev
, &c
, NULL
);
985 static int adapter_alloc_sq(struct nvme_dev
*dev
, u16 qid
,
986 struct nvme_queue
*nvmeq
)
989 struct nvme_command c
;
990 int flags
= NVME_QUEUE_PHYS_CONTIG
| NVME_SQ_PRIO_MEDIUM
;
992 memset(&c
, 0, sizeof(c
));
993 c
.create_sq
.opcode
= nvme_admin_create_sq
;
994 c
.create_sq
.prp1
= cpu_to_le64(nvmeq
->sq_dma_addr
);
995 c
.create_sq
.sqid
= cpu_to_le16(qid
);
996 c
.create_sq
.qsize
= cpu_to_le16(nvmeq
->q_depth
- 1);
997 c
.create_sq
.sq_flags
= cpu_to_le16(flags
);
998 c
.create_sq
.cqid
= cpu_to_le16(qid
);
1000 status
= nvme_submit_admin_cmd(dev
, &c
, NULL
);
1006 static int adapter_delete_cq(struct nvme_dev
*dev
, u16 cqid
)
1008 return adapter_delete_queue(dev
, nvme_admin_delete_cq
, cqid
);
1011 static int adapter_delete_sq(struct nvme_dev
*dev
, u16 sqid
)
1013 return adapter_delete_queue(dev
, nvme_admin_delete_sq
, sqid
);
1016 int nvme_identify(struct nvme_dev
*dev
, unsigned nsid
, unsigned cns
,
1017 dma_addr_t dma_addr
)
1019 struct nvme_command c
;
1021 memset(&c
, 0, sizeof(c
));
1022 c
.identify
.opcode
= nvme_admin_identify
;
1023 c
.identify
.nsid
= cpu_to_le32(nsid
);
1024 c
.identify
.prp1
= cpu_to_le64(dma_addr
);
1025 c
.identify
.cns
= cpu_to_le32(cns
);
1027 return nvme_submit_admin_cmd(dev
, &c
, NULL
);
1030 int nvme_get_features(struct nvme_dev
*dev
, unsigned fid
, unsigned nsid
,
1031 dma_addr_t dma_addr
, u32
*result
)
1033 struct nvme_command c
;
1035 memset(&c
, 0, sizeof(c
));
1036 c
.features
.opcode
= nvme_admin_get_features
;
1037 c
.features
.nsid
= cpu_to_le32(nsid
);
1038 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1039 c
.features
.fid
= cpu_to_le32(fid
);
1041 return nvme_submit_admin_cmd(dev
, &c
, result
);
1044 int nvme_set_features(struct nvme_dev
*dev
, unsigned fid
, unsigned dword11
,
1045 dma_addr_t dma_addr
, u32
*result
)
1047 struct nvme_command c
;
1049 memset(&c
, 0, sizeof(c
));
1050 c
.features
.opcode
= nvme_admin_set_features
;
1051 c
.features
.prp1
= cpu_to_le64(dma_addr
);
1052 c
.features
.fid
= cpu_to_le32(fid
);
1053 c
.features
.dword11
= cpu_to_le32(dword11
);
1055 return nvme_submit_admin_cmd(dev
, &c
, result
);
1059 * nvme_abort_cmd - Attempt aborting a command
1060 * @cmdid: Command id of a timed out IO
1061 * @queue: The queue with timed out IO
1063 * Schedule controller reset if the command was already aborted once before and
1064 * still hasn't been returned to the driver, or if this is the admin queue.
1066 static void nvme_abort_cmd(int cmdid
, struct nvme_queue
*nvmeq
)
1069 struct nvme_command cmd
;
1070 struct nvme_dev
*dev
= nvmeq
->dev
;
1071 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
1072 struct nvme_queue
*adminq
;
1074 if (!nvmeq
->qid
|| info
[cmdid
].aborted
) {
1075 if (work_busy(&dev
->reset_work
))
1077 list_del_init(&dev
->node
);
1078 dev_warn(&dev
->pci_dev
->dev
,
1079 "I/O %d QID %d timeout, reset controller\n", cmdid
,
1081 dev
->reset_workfn
= nvme_reset_failed_dev
;
1082 queue_work(nvme_workq
, &dev
->reset_work
);
1086 if (!dev
->abort_limit
)
1089 adminq
= rcu_dereference(dev
->queues
[0]);
1090 a_cmdid
= alloc_cmdid(adminq
, CMD_CTX_ABORT
, special_completion
,
1095 memset(&cmd
, 0, sizeof(cmd
));
1096 cmd
.abort
.opcode
= nvme_admin_abort_cmd
;
1097 cmd
.abort
.cid
= cmdid
;
1098 cmd
.abort
.sqid
= cpu_to_le16(nvmeq
->qid
);
1099 cmd
.abort
.command_id
= a_cmdid
;
1102 info
[cmdid
].aborted
= 1;
1103 info
[cmdid
].timeout
= jiffies
+ ADMIN_TIMEOUT
;
1105 dev_warn(nvmeq
->q_dmadev
, "Aborting I/O %d QID %d\n", cmdid
,
1107 nvme_submit_cmd(adminq
, &cmd
);
1111 * nvme_cancel_ios - Cancel outstanding I/Os
1112 * @queue: The queue to cancel I/Os on
1113 * @timeout: True to only cancel I/Os which have timed out
1115 static void nvme_cancel_ios(struct nvme_queue
*nvmeq
, bool timeout
)
1117 int depth
= nvmeq
->q_depth
- 1;
1118 struct nvme_cmd_info
*info
= nvme_cmd_info(nvmeq
);
1119 unsigned long now
= jiffies
;
1122 for_each_set_bit(cmdid
, nvmeq
->cmdid_data
, depth
) {
1124 nvme_completion_fn fn
;
1125 static struct nvme_completion cqe
= {
1126 .status
= cpu_to_le16(NVME_SC_ABORT_REQ
<< 1),
1129 if (timeout
&& !time_after(now
, info
[cmdid
].timeout
))
1131 if (info
[cmdid
].ctx
== CMD_CTX_CANCELLED
)
1133 if (timeout
&& nvmeq
->dev
->initialized
) {
1134 nvme_abort_cmd(cmdid
, nvmeq
);
1137 dev_warn(nvmeq
->q_dmadev
, "Cancelling I/O %d QID %d\n", cmdid
,
1139 ctx
= cancel_cmdid(nvmeq
, cmdid
, &fn
);
1140 fn(nvmeq
, ctx
, &cqe
);
1144 static void nvme_free_queue(struct rcu_head
*r
)
1146 struct nvme_queue
*nvmeq
= container_of(r
, struct nvme_queue
, r_head
);
1148 spin_lock_irq(&nvmeq
->q_lock
);
1149 while (bio_list_peek(&nvmeq
->sq_cong
)) {
1150 struct bio
*bio
= bio_list_pop(&nvmeq
->sq_cong
);
1151 bio_endio(bio
, -EIO
);
1153 while (!list_empty(&nvmeq
->iod_bio
)) {
1154 static struct nvme_completion cqe
= {
1155 .status
= cpu_to_le16(
1156 (NVME_SC_ABORT_REQ
| NVME_SC_DNR
) << 1),
1158 struct nvme_iod
*iod
= list_first_entry(&nvmeq
->iod_bio
,
1161 list_del(&iod
->node
);
1162 bio_completion(nvmeq
, iod
, &cqe
);
1164 spin_unlock_irq(&nvmeq
->q_lock
);
1166 dma_free_coherent(nvmeq
->q_dmadev
, CQ_SIZE(nvmeq
->q_depth
),
1167 (void *)nvmeq
->cqes
, nvmeq
->cq_dma_addr
);
1168 dma_free_coherent(nvmeq
->q_dmadev
, SQ_SIZE(nvmeq
->q_depth
),
1169 nvmeq
->sq_cmds
, nvmeq
->sq_dma_addr
);
1171 free_cpumask_var(nvmeq
->cpu_mask
);
1175 static void nvme_free_queues(struct nvme_dev
*dev
, int lowest
)
1179 for (i
= dev
->queue_count
- 1; i
>= lowest
; i
--) {
1180 struct nvme_queue
*nvmeq
= raw_nvmeq(dev
, i
);
1181 rcu_assign_pointer(dev
->queues
[i
], NULL
);
1182 call_rcu(&nvmeq
->r_head
, nvme_free_queue
);
1188 * nvme_suspend_queue - put queue into suspended state
1189 * @nvmeq - queue to suspend
1191 * Returns 1 if already suspended, 0 otherwise.
1193 static int nvme_suspend_queue(struct nvme_queue
*nvmeq
)
1195 int vector
= nvmeq
->dev
->entry
[nvmeq
->cq_vector
].vector
;
1197 spin_lock_irq(&nvmeq
->q_lock
);
1198 if (nvmeq
->q_suspended
) {
1199 spin_unlock_irq(&nvmeq
->q_lock
);
1202 nvmeq
->q_suspended
= 1;
1203 nvmeq
->dev
->online_queues
--;
1204 spin_unlock_irq(&nvmeq
->q_lock
);
1206 irq_set_affinity_hint(vector
, NULL
);
1207 free_irq(vector
, nvmeq
);
1212 static void nvme_clear_queue(struct nvme_queue
*nvmeq
)
1214 spin_lock_irq(&nvmeq
->q_lock
);
1215 nvme_process_cq(nvmeq
);
1216 nvme_cancel_ios(nvmeq
, false);
1217 spin_unlock_irq(&nvmeq
->q_lock
);
1220 static void nvme_disable_queue(struct nvme_dev
*dev
, int qid
)
1222 struct nvme_queue
*nvmeq
= raw_nvmeq(dev
, qid
);
1226 if (nvme_suspend_queue(nvmeq
))
1229 /* Don't tell the adapter to delete the admin queue.
1230 * Don't tell a removed adapter to delete IO queues. */
1231 if (qid
&& readl(&dev
->bar
->csts
) != -1) {
1232 adapter_delete_sq(dev
, qid
);
1233 adapter_delete_cq(dev
, qid
);
1235 nvme_clear_queue(nvmeq
);
1238 static struct nvme_queue
*nvme_alloc_queue(struct nvme_dev
*dev
, int qid
,
1239 int depth
, int vector
)
1241 struct device
*dmadev
= &dev
->pci_dev
->dev
;
1242 unsigned extra
= nvme_queue_extra(depth
);
1243 struct nvme_queue
*nvmeq
= kzalloc(sizeof(*nvmeq
) + extra
, GFP_KERNEL
);
1247 nvmeq
->cqes
= dma_alloc_coherent(dmadev
, CQ_SIZE(depth
),
1248 &nvmeq
->cq_dma_addr
, GFP_KERNEL
);
1251 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(depth
));
1253 nvmeq
->sq_cmds
= dma_alloc_coherent(dmadev
, SQ_SIZE(depth
),
1254 &nvmeq
->sq_dma_addr
, GFP_KERNEL
);
1255 if (!nvmeq
->sq_cmds
)
1258 if (qid
&& !zalloc_cpumask_var(&nvmeq
->cpu_mask
, GFP_KERNEL
))
1261 nvmeq
->q_dmadev
= dmadev
;
1263 snprintf(nvmeq
->irqname
, sizeof(nvmeq
->irqname
), "nvme%dq%d",
1264 dev
->instance
, qid
);
1265 spin_lock_init(&nvmeq
->q_lock
);
1267 nvmeq
->cq_phase
= 1;
1268 init_waitqueue_head(&nvmeq
->sq_full
);
1269 init_waitqueue_entry(&nvmeq
->sq_cong_wait
, nvme_thread
);
1270 bio_list_init(&nvmeq
->sq_cong
);
1271 INIT_LIST_HEAD(&nvmeq
->iod_bio
);
1272 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1273 nvmeq
->q_depth
= depth
;
1274 nvmeq
->cq_vector
= vector
;
1276 nvmeq
->q_suspended
= 1;
1278 rcu_assign_pointer(dev
->queues
[qid
], nvmeq
);
1283 dma_free_coherent(dmadev
, SQ_SIZE(depth
), (void *)nvmeq
->sq_cmds
,
1284 nvmeq
->sq_dma_addr
);
1286 dma_free_coherent(dmadev
, CQ_SIZE(depth
), (void *)nvmeq
->cqes
,
1287 nvmeq
->cq_dma_addr
);
1293 static int queue_request_irq(struct nvme_dev
*dev
, struct nvme_queue
*nvmeq
,
1296 if (use_threaded_interrupts
)
1297 return request_threaded_irq(dev
->entry
[nvmeq
->cq_vector
].vector
,
1298 nvme_irq_check
, nvme_irq
, IRQF_SHARED
,
1300 return request_irq(dev
->entry
[nvmeq
->cq_vector
].vector
, nvme_irq
,
1301 IRQF_SHARED
, name
, nvmeq
);
1304 static void nvme_init_queue(struct nvme_queue
*nvmeq
, u16 qid
)
1306 struct nvme_dev
*dev
= nvmeq
->dev
;
1307 unsigned extra
= nvme_queue_extra(nvmeq
->q_depth
);
1311 nvmeq
->cq_phase
= 1;
1312 nvmeq
->q_db
= &dev
->dbs
[qid
* 2 * dev
->db_stride
];
1313 memset(nvmeq
->cmdid_data
, 0, extra
);
1314 memset((void *)nvmeq
->cqes
, 0, CQ_SIZE(nvmeq
->q_depth
));
1315 nvme_cancel_ios(nvmeq
, false);
1316 nvmeq
->q_suspended
= 0;
1317 dev
->online_queues
++;
1320 static int nvme_create_queue(struct nvme_queue
*nvmeq
, int qid
)
1322 struct nvme_dev
*dev
= nvmeq
->dev
;
1325 result
= adapter_alloc_cq(dev
, qid
, nvmeq
);
1329 result
= adapter_alloc_sq(dev
, qid
, nvmeq
);
1333 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1337 spin_lock_irq(&nvmeq
->q_lock
);
1338 nvme_init_queue(nvmeq
, qid
);
1339 spin_unlock_irq(&nvmeq
->q_lock
);
1344 adapter_delete_sq(dev
, qid
);
1346 adapter_delete_cq(dev
, qid
);
1350 static int nvme_wait_ready(struct nvme_dev
*dev
, u64 cap
, bool enabled
)
1352 unsigned long timeout
;
1353 u32 bit
= enabled
? NVME_CSTS_RDY
: 0;
1355 timeout
= ((NVME_CAP_TIMEOUT(cap
) + 1) * HZ
/ 2) + jiffies
;
1357 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_RDY
) != bit
) {
1359 if (fatal_signal_pending(current
))
1361 if (time_after(jiffies
, timeout
)) {
1362 dev_err(&dev
->pci_dev
->dev
,
1363 "Device not ready; aborting %s\n", enabled
?
1364 "initialisation" : "reset");
1373 * If the device has been passed off to us in an enabled state, just clear
1374 * the enabled bit. The spec says we should set the 'shutdown notification
1375 * bits', but doing so may cause the device to complete commands to the
1376 * admin queue ... and we don't know what memory that might be pointing at!
1378 static int nvme_disable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1380 u32 cc
= readl(&dev
->bar
->cc
);
1382 if (cc
& NVME_CC_ENABLE
)
1383 writel(cc
& ~NVME_CC_ENABLE
, &dev
->bar
->cc
);
1384 return nvme_wait_ready(dev
, cap
, false);
1387 static int nvme_enable_ctrl(struct nvme_dev
*dev
, u64 cap
)
1389 return nvme_wait_ready(dev
, cap
, true);
1392 static int nvme_shutdown_ctrl(struct nvme_dev
*dev
)
1394 unsigned long timeout
;
1397 cc
= (readl(&dev
->bar
->cc
) & ~NVME_CC_SHN_MASK
) | NVME_CC_SHN_NORMAL
;
1398 writel(cc
, &dev
->bar
->cc
);
1400 timeout
= 2 * HZ
+ jiffies
;
1401 while ((readl(&dev
->bar
->csts
) & NVME_CSTS_SHST_MASK
) !=
1402 NVME_CSTS_SHST_CMPLT
) {
1404 if (fatal_signal_pending(current
))
1406 if (time_after(jiffies
, timeout
)) {
1407 dev_err(&dev
->pci_dev
->dev
,
1408 "Device shutdown incomplete; abort shutdown\n");
1416 static int nvme_configure_admin_queue(struct nvme_dev
*dev
)
1420 u64 cap
= readq(&dev
->bar
->cap
);
1421 struct nvme_queue
*nvmeq
;
1423 result
= nvme_disable_ctrl(dev
, cap
);
1427 nvmeq
= raw_nvmeq(dev
, 0);
1429 nvmeq
= nvme_alloc_queue(dev
, 0, 64, 0);
1434 aqa
= nvmeq
->q_depth
- 1;
1437 dev
->ctrl_config
= NVME_CC_ENABLE
| NVME_CC_CSS_NVM
;
1438 dev
->ctrl_config
|= (PAGE_SHIFT
- 12) << NVME_CC_MPS_SHIFT
;
1439 dev
->ctrl_config
|= NVME_CC_ARB_RR
| NVME_CC_SHN_NONE
;
1440 dev
->ctrl_config
|= NVME_CC_IOSQES
| NVME_CC_IOCQES
;
1442 writel(aqa
, &dev
->bar
->aqa
);
1443 writeq(nvmeq
->sq_dma_addr
, &dev
->bar
->asq
);
1444 writeq(nvmeq
->cq_dma_addr
, &dev
->bar
->acq
);
1445 writel(dev
->ctrl_config
, &dev
->bar
->cc
);
1447 result
= nvme_enable_ctrl(dev
, cap
);
1451 result
= queue_request_irq(dev
, nvmeq
, nvmeq
->irqname
);
1455 spin_lock_irq(&nvmeq
->q_lock
);
1456 nvme_init_queue(nvmeq
, 0);
1457 spin_unlock_irq(&nvmeq
->q_lock
);
1461 struct nvme_iod
*nvme_map_user_pages(struct nvme_dev
*dev
, int write
,
1462 unsigned long addr
, unsigned length
)
1464 int i
, err
, count
, nents
, offset
;
1465 struct scatterlist
*sg
;
1466 struct page
**pages
;
1467 struct nvme_iod
*iod
;
1470 return ERR_PTR(-EINVAL
);
1471 if (!length
|| length
> INT_MAX
- PAGE_SIZE
)
1472 return ERR_PTR(-EINVAL
);
1474 offset
= offset_in_page(addr
);
1475 count
= DIV_ROUND_UP(offset
+ length
, PAGE_SIZE
);
1476 pages
= kcalloc(count
, sizeof(*pages
), GFP_KERNEL
);
1478 return ERR_PTR(-ENOMEM
);
1480 err
= get_user_pages_fast(addr
, count
, 1, pages
);
1487 iod
= nvme_alloc_iod(count
, length
, GFP_KERNEL
);
1489 sg_init_table(sg
, count
);
1490 for (i
= 0; i
< count
; i
++) {
1491 sg_set_page(&sg
[i
], pages
[i
],
1492 min_t(unsigned, length
, PAGE_SIZE
- offset
),
1494 length
-= (PAGE_SIZE
- offset
);
1497 sg_mark_end(&sg
[i
- 1]);
1501 nents
= dma_map_sg(&dev
->pci_dev
->dev
, sg
, count
,
1502 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1512 for (i
= 0; i
< count
; i
++)
1515 return ERR_PTR(err
);
1518 void nvme_unmap_user_pages(struct nvme_dev
*dev
, int write
,
1519 struct nvme_iod
*iod
)
1523 dma_unmap_sg(&dev
->pci_dev
->dev
, iod
->sg
, iod
->nents
,
1524 write
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1526 for (i
= 0; i
< iod
->nents
; i
++)
1527 put_page(sg_page(&iod
->sg
[i
]));
1530 static int nvme_submit_io(struct nvme_ns
*ns
, struct nvme_user_io __user
*uio
)
1532 struct nvme_dev
*dev
= ns
->dev
;
1533 struct nvme_user_io io
;
1534 struct nvme_command c
;
1535 unsigned length
, meta_len
;
1537 struct nvme_iod
*iod
, *meta_iod
= NULL
;
1538 dma_addr_t meta_dma_addr
;
1539 void *meta
, *uninitialized_var(meta_mem
);
1541 if (copy_from_user(&io
, uio
, sizeof(io
)))
1543 length
= (io
.nblocks
+ 1) << ns
->lba_shift
;
1544 meta_len
= (io
.nblocks
+ 1) * ns
->ms
;
1546 if (meta_len
&& ((io
.metadata
& 3) || !io
.metadata
))
1549 switch (io
.opcode
) {
1550 case nvme_cmd_write
:
1552 case nvme_cmd_compare
:
1553 iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.addr
, length
);
1560 return PTR_ERR(iod
);
1562 memset(&c
, 0, sizeof(c
));
1563 c
.rw
.opcode
= io
.opcode
;
1564 c
.rw
.flags
= io
.flags
;
1565 c
.rw
.nsid
= cpu_to_le32(ns
->ns_id
);
1566 c
.rw
.slba
= cpu_to_le64(io
.slba
);
1567 c
.rw
.length
= cpu_to_le16(io
.nblocks
);
1568 c
.rw
.control
= cpu_to_le16(io
.control
);
1569 c
.rw
.dsmgmt
= cpu_to_le32(io
.dsmgmt
);
1570 c
.rw
.reftag
= cpu_to_le32(io
.reftag
);
1571 c
.rw
.apptag
= cpu_to_le16(io
.apptag
);
1572 c
.rw
.appmask
= cpu_to_le16(io
.appmask
);
1575 meta_iod
= nvme_map_user_pages(dev
, io
.opcode
& 1, io
.metadata
,
1577 if (IS_ERR(meta_iod
)) {
1578 status
= PTR_ERR(meta_iod
);
1583 meta_mem
= dma_alloc_coherent(&dev
->pci_dev
->dev
, meta_len
,
1584 &meta_dma_addr
, GFP_KERNEL
);
1590 if (io
.opcode
& 1) {
1591 int meta_offset
= 0;
1593 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1594 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1595 meta_iod
->sg
[i
].offset
;
1596 memcpy(meta_mem
+ meta_offset
, meta
,
1597 meta_iod
->sg
[i
].length
);
1598 kunmap_atomic(meta
);
1599 meta_offset
+= meta_iod
->sg
[i
].length
;
1603 c
.rw
.metadata
= cpu_to_le64(meta_dma_addr
);
1606 length
= nvme_setup_prps(dev
, iod
, length
, GFP_KERNEL
);
1607 c
.rw
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
1608 c
.rw
.prp2
= cpu_to_le64(iod
->first_dma
);
1610 if (length
!= (io
.nblocks
+ 1) << ns
->lba_shift
)
1613 status
= nvme_submit_io_cmd(dev
, &c
, NULL
);
1616 if (status
== NVME_SC_SUCCESS
&& !(io
.opcode
& 1)) {
1617 int meta_offset
= 0;
1619 for (i
= 0; i
< meta_iod
->nents
; i
++) {
1620 meta
= kmap_atomic(sg_page(&meta_iod
->sg
[i
])) +
1621 meta_iod
->sg
[i
].offset
;
1622 memcpy(meta
, meta_mem
+ meta_offset
,
1623 meta_iod
->sg
[i
].length
);
1624 kunmap_atomic(meta
);
1625 meta_offset
+= meta_iod
->sg
[i
].length
;
1629 dma_free_coherent(&dev
->pci_dev
->dev
, meta_len
, meta_mem
,
1634 nvme_unmap_user_pages(dev
, io
.opcode
& 1, iod
);
1635 nvme_free_iod(dev
, iod
);
1638 nvme_unmap_user_pages(dev
, io
.opcode
& 1, meta_iod
);
1639 nvme_free_iod(dev
, meta_iod
);
1645 static int nvme_user_admin_cmd(struct nvme_dev
*dev
,
1646 struct nvme_admin_cmd __user
*ucmd
)
1648 struct nvme_admin_cmd cmd
;
1649 struct nvme_command c
;
1651 struct nvme_iod
*uninitialized_var(iod
);
1654 if (!capable(CAP_SYS_ADMIN
))
1656 if (copy_from_user(&cmd
, ucmd
, sizeof(cmd
)))
1659 memset(&c
, 0, sizeof(c
));
1660 c
.common
.opcode
= cmd
.opcode
;
1661 c
.common
.flags
= cmd
.flags
;
1662 c
.common
.nsid
= cpu_to_le32(cmd
.nsid
);
1663 c
.common
.cdw2
[0] = cpu_to_le32(cmd
.cdw2
);
1664 c
.common
.cdw2
[1] = cpu_to_le32(cmd
.cdw3
);
1665 c
.common
.cdw10
[0] = cpu_to_le32(cmd
.cdw10
);
1666 c
.common
.cdw10
[1] = cpu_to_le32(cmd
.cdw11
);
1667 c
.common
.cdw10
[2] = cpu_to_le32(cmd
.cdw12
);
1668 c
.common
.cdw10
[3] = cpu_to_le32(cmd
.cdw13
);
1669 c
.common
.cdw10
[4] = cpu_to_le32(cmd
.cdw14
);
1670 c
.common
.cdw10
[5] = cpu_to_le32(cmd
.cdw15
);
1672 length
= cmd
.data_len
;
1674 iod
= nvme_map_user_pages(dev
, cmd
.opcode
& 1, cmd
.addr
,
1677 return PTR_ERR(iod
);
1678 length
= nvme_setup_prps(dev
, iod
, length
, GFP_KERNEL
);
1679 c
.common
.prp1
= cpu_to_le64(sg_dma_address(iod
->sg
));
1680 c
.common
.prp2
= cpu_to_le64(iod
->first_dma
);
1683 timeout
= cmd
.timeout_ms
? msecs_to_jiffies(cmd
.timeout_ms
) :
1685 if (length
!= cmd
.data_len
)
1688 status
= nvme_submit_sync_cmd(dev
, 0, &c
, &cmd
.result
, timeout
);
1691 nvme_unmap_user_pages(dev
, cmd
.opcode
& 1, iod
);
1692 nvme_free_iod(dev
, iod
);
1695 if ((status
>= 0) && copy_to_user(&ucmd
->result
, &cmd
.result
,
1696 sizeof(cmd
.result
)))
1702 static int nvme_ioctl(struct block_device
*bdev
, fmode_t mode
, unsigned int cmd
,
1705 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1709 force_successful_syscall_return();
1711 case NVME_IOCTL_ADMIN_CMD
:
1712 return nvme_user_admin_cmd(ns
->dev
, (void __user
*)arg
);
1713 case NVME_IOCTL_SUBMIT_IO
:
1714 return nvme_submit_io(ns
, (void __user
*)arg
);
1715 case SG_GET_VERSION_NUM
:
1716 return nvme_sg_get_version_num((void __user
*)arg
);
1718 return nvme_sg_io(ns
, (void __user
*)arg
);
1724 #ifdef CONFIG_COMPAT
1725 static int nvme_compat_ioctl(struct block_device
*bdev
, fmode_t mode
,
1726 unsigned int cmd
, unsigned long arg
)
1728 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1732 return nvme_sg_io32(ns
, arg
);
1734 return nvme_ioctl(bdev
, mode
, cmd
, arg
);
1737 #define nvme_compat_ioctl NULL
1740 static int nvme_open(struct block_device
*bdev
, fmode_t mode
)
1742 struct nvme_ns
*ns
= bdev
->bd_disk
->private_data
;
1743 struct nvme_dev
*dev
= ns
->dev
;
1745 kref_get(&dev
->kref
);
1749 static void nvme_free_dev(struct kref
*kref
);
1751 static void nvme_release(struct gendisk
*disk
, fmode_t mode
)
1753 struct nvme_ns
*ns
= disk
->private_data
;
1754 struct nvme_dev
*dev
= ns
->dev
;
1756 kref_put(&dev
->kref
, nvme_free_dev
);
1759 static int nvme_getgeo(struct block_device
*bd
, struct hd_geometry
*geo
)
1761 /* some standard values */
1762 geo
->heads
= 1 << 6;
1763 geo
->sectors
= 1 << 5;
1764 geo
->cylinders
= get_capacity(bd
->bd_disk
) >> 11;
1768 static const struct block_device_operations nvme_fops
= {
1769 .owner
= THIS_MODULE
,
1770 .ioctl
= nvme_ioctl
,
1771 .compat_ioctl
= nvme_compat_ioctl
,
1773 .release
= nvme_release
,
1774 .getgeo
= nvme_getgeo
,
1777 static void nvme_resubmit_iods(struct nvme_queue
*nvmeq
)
1779 struct nvme_iod
*iod
, *next
;
1781 list_for_each_entry_safe(iod
, next
, &nvmeq
->iod_bio
, node
) {
1782 if (unlikely(nvme_submit_iod(nvmeq
, iod
)))
1784 list_del(&iod
->node
);
1785 if (bio_list_empty(&nvmeq
->sq_cong
) &&
1786 list_empty(&nvmeq
->iod_bio
))
1787 remove_wait_queue(&nvmeq
->sq_full
,
1788 &nvmeq
->sq_cong_wait
);
1792 static void nvme_resubmit_bios(struct nvme_queue
*nvmeq
)
1794 while (bio_list_peek(&nvmeq
->sq_cong
)) {
1795 struct bio
*bio
= bio_list_pop(&nvmeq
->sq_cong
);
1796 struct nvme_ns
*ns
= bio
->bi_bdev
->bd_disk
->private_data
;
1798 if (bio_list_empty(&nvmeq
->sq_cong
) &&
1799 list_empty(&nvmeq
->iod_bio
))
1800 remove_wait_queue(&nvmeq
->sq_full
,
1801 &nvmeq
->sq_cong_wait
);
1802 if (nvme_submit_bio_queue(nvmeq
, ns
, bio
)) {
1803 if (!waitqueue_active(&nvmeq
->sq_full
))
1804 add_wait_queue(&nvmeq
->sq_full
,
1805 &nvmeq
->sq_cong_wait
);
1806 bio_list_add_head(&nvmeq
->sq_cong
, bio
);
1812 static int nvme_kthread(void *data
)
1814 struct nvme_dev
*dev
, *next
;
1816 while (!kthread_should_stop()) {
1817 set_current_state(TASK_INTERRUPTIBLE
);
1818 spin_lock(&dev_list_lock
);
1819 list_for_each_entry_safe(dev
, next
, &dev_list
, node
) {
1821 if (readl(&dev
->bar
->csts
) & NVME_CSTS_CFS
&&
1823 if (work_busy(&dev
->reset_work
))
1825 list_del_init(&dev
->node
);
1826 dev_warn(&dev
->pci_dev
->dev
,
1827 "Failed status, reset controller\n");
1828 dev
->reset_workfn
= nvme_reset_failed_dev
;
1829 queue_work(nvme_workq
, &dev
->reset_work
);
1833 for (i
= 0; i
< dev
->queue_count
; i
++) {
1834 struct nvme_queue
*nvmeq
=
1835 rcu_dereference(dev
->queues
[i
]);
1838 spin_lock_irq(&nvmeq
->q_lock
);
1839 if (nvmeq
->q_suspended
)
1841 nvme_process_cq(nvmeq
);
1842 nvme_cancel_ios(nvmeq
, true);
1843 nvme_resubmit_bios(nvmeq
);
1844 nvme_resubmit_iods(nvmeq
);
1846 spin_unlock_irq(&nvmeq
->q_lock
);
1850 spin_unlock(&dev_list_lock
);
1851 schedule_timeout(round_jiffies_relative(HZ
));
1856 static void nvme_config_discard(struct nvme_ns
*ns
)
1858 u32 logical_block_size
= queue_logical_block_size(ns
->queue
);
1859 ns
->queue
->limits
.discard_zeroes_data
= 0;
1860 ns
->queue
->limits
.discard_alignment
= logical_block_size
;
1861 ns
->queue
->limits
.discard_granularity
= logical_block_size
;
1862 ns
->queue
->limits
.max_discard_sectors
= 0xffffffff;
1863 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD
, ns
->queue
);
1866 static struct nvme_ns
*nvme_alloc_ns(struct nvme_dev
*dev
, unsigned nsid
,
1867 struct nvme_id_ns
*id
, struct nvme_lba_range_type
*rt
)
1870 struct gendisk
*disk
;
1873 if (rt
->attributes
& NVME_LBART_ATTRIB_HIDE
)
1876 ns
= kzalloc(sizeof(*ns
), GFP_KERNEL
);
1879 ns
->queue
= blk_alloc_queue(GFP_KERNEL
);
1882 ns
->queue
->queue_flags
= QUEUE_FLAG_DEFAULT
;
1883 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES
, ns
->queue
);
1884 queue_flag_set_unlocked(QUEUE_FLAG_NONROT
, ns
->queue
);
1885 blk_queue_make_request(ns
->queue
, nvme_make_request
);
1887 ns
->queue
->queuedata
= ns
;
1889 disk
= alloc_disk(0);
1891 goto out_free_queue
;
1894 lbaf
= id
->flbas
& 0xf;
1895 ns
->lba_shift
= id
->lbaf
[lbaf
].ds
;
1896 ns
->ms
= le16_to_cpu(id
->lbaf
[lbaf
].ms
);
1897 blk_queue_logical_block_size(ns
->queue
, 1 << ns
->lba_shift
);
1898 if (dev
->max_hw_sectors
)
1899 blk_queue_max_hw_sectors(ns
->queue
, dev
->max_hw_sectors
);
1900 if (dev
->vwc
& NVME_CTRL_VWC_PRESENT
)
1901 blk_queue_flush(ns
->queue
, REQ_FLUSH
| REQ_FUA
);
1903 disk
->major
= nvme_major
;
1904 disk
->first_minor
= 0;
1905 disk
->fops
= &nvme_fops
;
1906 disk
->private_data
= ns
;
1907 disk
->queue
= ns
->queue
;
1908 disk
->driverfs_dev
= &dev
->pci_dev
->dev
;
1909 disk
->flags
= GENHD_FL_EXT_DEVT
;
1910 sprintf(disk
->disk_name
, "nvme%dn%d", dev
->instance
, nsid
);
1911 set_capacity(disk
, le64_to_cpup(&id
->nsze
) << (ns
->lba_shift
- 9));
1913 if (dev
->oncs
& NVME_CTRL_ONCS_DSM
)
1914 nvme_config_discard(ns
);
1919 blk_cleanup_queue(ns
->queue
);
1925 static int nvme_find_closest_node(int node
)
1927 int n
, val
, min_val
= INT_MAX
, best_node
= node
;
1929 for_each_online_node(n
) {
1932 val
= node_distance(node
, n
);
1933 if (val
< min_val
) {
1941 static void nvme_set_queue_cpus(cpumask_t
*qmask
, struct nvme_queue
*nvmeq
,
1945 for_each_cpu(cpu
, qmask
) {
1946 if (cpumask_weight(nvmeq
->cpu_mask
) >= count
)
1948 if (!cpumask_test_and_set_cpu(cpu
, nvmeq
->cpu_mask
))
1949 *per_cpu_ptr(nvmeq
->dev
->io_queue
, cpu
) = nvmeq
->qid
;
1953 static void nvme_add_cpus(cpumask_t
*mask
, const cpumask_t
*unassigned_cpus
,
1954 const cpumask_t
*new_mask
, struct nvme_queue
*nvmeq
, int cpus_per_queue
)
1957 for_each_cpu(next_cpu
, new_mask
) {
1958 cpumask_or(mask
, mask
, get_cpu_mask(next_cpu
));
1959 cpumask_or(mask
, mask
, topology_thread_cpumask(next_cpu
));
1960 cpumask_and(mask
, mask
, unassigned_cpus
);
1961 nvme_set_queue_cpus(mask
, nvmeq
, cpus_per_queue
);
1965 static void nvme_create_io_queues(struct nvme_dev
*dev
)
1969 max
= min(dev
->max_qid
, num_online_cpus());
1970 for (i
= dev
->queue_count
; i
<= max
; i
++)
1971 if (!nvme_alloc_queue(dev
, i
, dev
->q_depth
, i
- 1))
1974 max
= min(dev
->queue_count
- 1, num_online_cpus());
1975 for (i
= dev
->online_queues
; i
<= max
; i
++)
1976 if (nvme_create_queue(raw_nvmeq(dev
, i
), i
))
1981 * If there are fewer queues than online cpus, this will try to optimally
1982 * assign a queue to multiple cpus by grouping cpus that are "close" together:
1983 * thread siblings, core, socket, closest node, then whatever else is
1986 static void nvme_assign_io_queues(struct nvme_dev
*dev
)
1988 unsigned cpu
, cpus_per_queue
, queues
, remainder
, i
;
1989 cpumask_var_t unassigned_cpus
;
1991 nvme_create_io_queues(dev
);
1993 queues
= min(dev
->online_queues
- 1, num_online_cpus());
1997 cpus_per_queue
= num_online_cpus() / queues
;
1998 remainder
= queues
- (num_online_cpus() - queues
* cpus_per_queue
);
2000 if (!alloc_cpumask_var(&unassigned_cpus
, GFP_KERNEL
))
2003 cpumask_copy(unassigned_cpus
, cpu_online_mask
);
2004 cpu
= cpumask_first(unassigned_cpus
);
2005 for (i
= 1; i
<= queues
; i
++) {
2006 struct nvme_queue
*nvmeq
= lock_nvmeq(dev
, i
);
2009 cpumask_clear(nvmeq
->cpu_mask
);
2010 if (!cpumask_weight(unassigned_cpus
)) {
2011 unlock_nvmeq(nvmeq
);
2015 mask
= *get_cpu_mask(cpu
);
2016 nvme_set_queue_cpus(&mask
, nvmeq
, cpus_per_queue
);
2017 if (cpus_weight(mask
) < cpus_per_queue
)
2018 nvme_add_cpus(&mask
, unassigned_cpus
,
2019 topology_thread_cpumask(cpu
),
2020 nvmeq
, cpus_per_queue
);
2021 if (cpus_weight(mask
) < cpus_per_queue
)
2022 nvme_add_cpus(&mask
, unassigned_cpus
,
2023 topology_core_cpumask(cpu
),
2024 nvmeq
, cpus_per_queue
);
2025 if (cpus_weight(mask
) < cpus_per_queue
)
2026 nvme_add_cpus(&mask
, unassigned_cpus
,
2027 cpumask_of_node(cpu_to_node(cpu
)),
2028 nvmeq
, cpus_per_queue
);
2029 if (cpus_weight(mask
) < cpus_per_queue
)
2030 nvme_add_cpus(&mask
, unassigned_cpus
,
2032 nvme_find_closest_node(
2034 nvmeq
, cpus_per_queue
);
2035 if (cpus_weight(mask
) < cpus_per_queue
)
2036 nvme_add_cpus(&mask
, unassigned_cpus
,
2038 nvmeq
, cpus_per_queue
);
2040 WARN(cpumask_weight(nvmeq
->cpu_mask
) != cpus_per_queue
,
2041 "nvme%d qid:%d mis-matched queue-to-cpu assignment\n",
2044 irq_set_affinity_hint(dev
->entry
[nvmeq
->cq_vector
].vector
,
2046 cpumask_andnot(unassigned_cpus
, unassigned_cpus
,
2048 cpu
= cpumask_next(cpu
, unassigned_cpus
);
2049 if (remainder
&& !--remainder
)
2051 unlock_nvmeq(nvmeq
);
2053 WARN(cpumask_weight(unassigned_cpus
), "nvme%d unassigned online cpus\n",
2056 cpumask_andnot(unassigned_cpus
, cpu_possible_mask
, cpu_online_mask
);
2057 for_each_cpu(cpu
, unassigned_cpus
)
2058 *per_cpu_ptr(dev
->io_queue
, cpu
) = (i
++ % queues
) + 1;
2059 free_cpumask_var(unassigned_cpus
);
2062 static int set_queue_count(struct nvme_dev
*dev
, int count
)
2066 u32 q_count
= (count
- 1) | ((count
- 1) << 16);
2068 status
= nvme_set_features(dev
, NVME_FEAT_NUM_QUEUES
, q_count
, 0,
2073 dev_err(&dev
->pci_dev
->dev
, "Could not set queue count (%d)\n",
2077 return min(result
& 0xffff, result
>> 16) + 1;
2080 static size_t db_bar_size(struct nvme_dev
*dev
, unsigned nr_io_queues
)
2082 return 4096 + ((nr_io_queues
+ 1) * 8 * dev
->db_stride
);
2085 static int nvme_cpu_notify(struct notifier_block
*self
,
2086 unsigned long action
, void *hcpu
)
2088 struct nvme_dev
*dev
= container_of(self
, struct nvme_dev
, nb
);
2092 nvme_assign_io_queues(dev
);
2098 static int nvme_setup_io_queues(struct nvme_dev
*dev
)
2100 struct nvme_queue
*adminq
= raw_nvmeq(dev
, 0);
2101 struct pci_dev
*pdev
= dev
->pci_dev
;
2102 int result
, i
, vecs
, nr_io_queues
, size
;
2104 nr_io_queues
= num_possible_cpus();
2105 result
= set_queue_count(dev
, nr_io_queues
);
2108 if (result
< nr_io_queues
)
2109 nr_io_queues
= result
;
2111 size
= db_bar_size(dev
, nr_io_queues
);
2115 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), size
);
2118 if (!--nr_io_queues
)
2120 size
= db_bar_size(dev
, nr_io_queues
);
2122 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2123 adminq
->q_db
= dev
->dbs
;
2126 /* Deregister the admin queue's interrupt */
2127 free_irq(dev
->entry
[0].vector
, adminq
);
2129 for (i
= 0; i
< nr_io_queues
; i
++)
2130 dev
->entry
[i
].entry
= i
;
2131 vecs
= pci_enable_msix_range(pdev
, dev
->entry
, 1, nr_io_queues
);
2133 vecs
= pci_enable_msi_range(pdev
, 1, min(nr_io_queues
, 32));
2137 for (i
= 0; i
< vecs
; i
++)
2138 dev
->entry
[i
].vector
= i
+ pdev
->irq
;
2143 * Should investigate if there's a performance win from allocating
2144 * more queues than interrupt vectors; it might allow the submission
2145 * path to scale better, even if the receive path is limited by the
2146 * number of interrupts.
2148 nr_io_queues
= vecs
;
2149 dev
->max_qid
= nr_io_queues
;
2151 result
= queue_request_irq(dev
, adminq
, adminq
->irqname
);
2153 adminq
->q_suspended
= 1;
2157 /* Free previously allocated queues that are no longer usable */
2158 nvme_free_queues(dev
, nr_io_queues
+ 1);
2159 nvme_assign_io_queues(dev
);
2161 dev
->nb
.notifier_call
= &nvme_cpu_notify
;
2162 result
= register_hotcpu_notifier(&dev
->nb
);
2169 nvme_free_queues(dev
, 1);
2174 * Return: error value if an error occurred setting up the queues or calling
2175 * Identify Device. 0 if these succeeded, even if adding some of the
2176 * namespaces failed. At the moment, these failures are silent. TBD which
2177 * failures should be reported.
2179 static int nvme_dev_add(struct nvme_dev
*dev
)
2181 struct pci_dev
*pdev
= dev
->pci_dev
;
2185 struct nvme_id_ctrl
*ctrl
;
2186 struct nvme_id_ns
*id_ns
;
2188 dma_addr_t dma_addr
;
2189 int shift
= NVME_CAP_MPSMIN(readq(&dev
->bar
->cap
)) + 12;
2191 mem
= dma_alloc_coherent(&pdev
->dev
, 8192, &dma_addr
, GFP_KERNEL
);
2195 res
= nvme_identify(dev
, 0, 1, dma_addr
);
2197 dev_err(&pdev
->dev
, "Identify Controller failed (%d)\n", res
);
2203 nn
= le32_to_cpup(&ctrl
->nn
);
2204 dev
->oncs
= le16_to_cpup(&ctrl
->oncs
);
2205 dev
->abort_limit
= ctrl
->acl
+ 1;
2206 dev
->vwc
= ctrl
->vwc
;
2207 memcpy(dev
->serial
, ctrl
->sn
, sizeof(ctrl
->sn
));
2208 memcpy(dev
->model
, ctrl
->mn
, sizeof(ctrl
->mn
));
2209 memcpy(dev
->firmware_rev
, ctrl
->fr
, sizeof(ctrl
->fr
));
2211 dev
->max_hw_sectors
= 1 << (ctrl
->mdts
+ shift
- 9);
2212 if ((pdev
->vendor
== PCI_VENDOR_ID_INTEL
) &&
2213 (pdev
->device
== 0x0953) && ctrl
->vs
[3])
2214 dev
->stripe_size
= 1 << (ctrl
->vs
[3] + shift
);
2217 for (i
= 1; i
<= nn
; i
++) {
2218 res
= nvme_identify(dev
, i
, 0, dma_addr
);
2222 if (id_ns
->ncap
== 0)
2225 res
= nvme_get_features(dev
, NVME_FEAT_LBA_RANGE
, i
,
2226 dma_addr
+ 4096, NULL
);
2228 memset(mem
+ 4096, 0, 4096);
2230 ns
= nvme_alloc_ns(dev
, i
, mem
, mem
+ 4096);
2232 list_add_tail(&ns
->list
, &dev
->namespaces
);
2234 list_for_each_entry(ns
, &dev
->namespaces
, list
)
2239 dma_free_coherent(&dev
->pci_dev
->dev
, 8192, mem
, dma_addr
);
2243 static int nvme_dev_map(struct nvme_dev
*dev
)
2246 int bars
, result
= -ENOMEM
;
2247 struct pci_dev
*pdev
= dev
->pci_dev
;
2249 if (pci_enable_device_mem(pdev
))
2252 dev
->entry
[0].vector
= pdev
->irq
;
2253 pci_set_master(pdev
);
2254 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
2255 if (pci_request_selected_regions(pdev
, bars
, "nvme"))
2258 if (dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64)) &&
2259 dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32)))
2262 dev
->bar
= ioremap(pci_resource_start(pdev
, 0), 8192);
2265 if (readl(&dev
->bar
->csts
) == -1) {
2269 cap
= readq(&dev
->bar
->cap
);
2270 dev
->q_depth
= min_t(int, NVME_CAP_MQES(cap
) + 1, NVME_Q_DEPTH
);
2271 dev
->db_stride
= 1 << NVME_CAP_STRIDE(cap
);
2272 dev
->dbs
= ((void __iomem
*)dev
->bar
) + 4096;
2280 pci_release_regions(pdev
);
2282 pci_disable_device(pdev
);
2286 static void nvme_dev_unmap(struct nvme_dev
*dev
)
2288 if (dev
->pci_dev
->msi_enabled
)
2289 pci_disable_msi(dev
->pci_dev
);
2290 else if (dev
->pci_dev
->msix_enabled
)
2291 pci_disable_msix(dev
->pci_dev
);
2296 pci_release_regions(dev
->pci_dev
);
2299 if (pci_is_enabled(dev
->pci_dev
))
2300 pci_disable_device(dev
->pci_dev
);
2303 struct nvme_delq_ctx
{
2304 struct task_struct
*waiter
;
2305 struct kthread_worker
*worker
;
2309 static void nvme_wait_dq(struct nvme_delq_ctx
*dq
, struct nvme_dev
*dev
)
2311 dq
->waiter
= current
;
2315 set_current_state(TASK_KILLABLE
);
2316 if (!atomic_read(&dq
->refcount
))
2318 if (!schedule_timeout(ADMIN_TIMEOUT
) ||
2319 fatal_signal_pending(current
)) {
2320 set_current_state(TASK_RUNNING
);
2322 nvme_disable_ctrl(dev
, readq(&dev
->bar
->cap
));
2323 nvme_disable_queue(dev
, 0);
2325 send_sig(SIGKILL
, dq
->worker
->task
, 1);
2326 flush_kthread_worker(dq
->worker
);
2330 set_current_state(TASK_RUNNING
);
2333 static void nvme_put_dq(struct nvme_delq_ctx
*dq
)
2335 atomic_dec(&dq
->refcount
);
2337 wake_up_process(dq
->waiter
);
2340 static struct nvme_delq_ctx
*nvme_get_dq(struct nvme_delq_ctx
*dq
)
2342 atomic_inc(&dq
->refcount
);
2346 static void nvme_del_queue_end(struct nvme_queue
*nvmeq
)
2348 struct nvme_delq_ctx
*dq
= nvmeq
->cmdinfo
.ctx
;
2350 nvme_clear_queue(nvmeq
);
2354 static int adapter_async_del_queue(struct nvme_queue
*nvmeq
, u8 opcode
,
2355 kthread_work_func_t fn
)
2357 struct nvme_command c
;
2359 memset(&c
, 0, sizeof(c
));
2360 c
.delete_queue
.opcode
= opcode
;
2361 c
.delete_queue
.qid
= cpu_to_le16(nvmeq
->qid
);
2363 init_kthread_work(&nvmeq
->cmdinfo
.work
, fn
);
2364 return nvme_submit_admin_cmd_async(nvmeq
->dev
, &c
, &nvmeq
->cmdinfo
);
2367 static void nvme_del_cq_work_handler(struct kthread_work
*work
)
2369 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2371 nvme_del_queue_end(nvmeq
);
2374 static int nvme_delete_cq(struct nvme_queue
*nvmeq
)
2376 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_cq
,
2377 nvme_del_cq_work_handler
);
2380 static void nvme_del_sq_work_handler(struct kthread_work
*work
)
2382 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2384 int status
= nvmeq
->cmdinfo
.status
;
2387 status
= nvme_delete_cq(nvmeq
);
2389 nvme_del_queue_end(nvmeq
);
2392 static int nvme_delete_sq(struct nvme_queue
*nvmeq
)
2394 return adapter_async_del_queue(nvmeq
, nvme_admin_delete_sq
,
2395 nvme_del_sq_work_handler
);
2398 static void nvme_del_queue_start(struct kthread_work
*work
)
2400 struct nvme_queue
*nvmeq
= container_of(work
, struct nvme_queue
,
2402 allow_signal(SIGKILL
);
2403 if (nvme_delete_sq(nvmeq
))
2404 nvme_del_queue_end(nvmeq
);
2407 static void nvme_disable_io_queues(struct nvme_dev
*dev
)
2410 DEFINE_KTHREAD_WORKER_ONSTACK(worker
);
2411 struct nvme_delq_ctx dq
;
2412 struct task_struct
*kworker_task
= kthread_run(kthread_worker_fn
,
2413 &worker
, "nvme%d", dev
->instance
);
2415 if (IS_ERR(kworker_task
)) {
2416 dev_err(&dev
->pci_dev
->dev
,
2417 "Failed to create queue del task\n");
2418 for (i
= dev
->queue_count
- 1; i
> 0; i
--)
2419 nvme_disable_queue(dev
, i
);
2424 atomic_set(&dq
.refcount
, 0);
2425 dq
.worker
= &worker
;
2426 for (i
= dev
->queue_count
- 1; i
> 0; i
--) {
2427 struct nvme_queue
*nvmeq
= raw_nvmeq(dev
, i
);
2429 if (nvme_suspend_queue(nvmeq
))
2431 nvmeq
->cmdinfo
.ctx
= nvme_get_dq(&dq
);
2432 nvmeq
->cmdinfo
.worker
= dq
.worker
;
2433 init_kthread_work(&nvmeq
->cmdinfo
.work
, nvme_del_queue_start
);
2434 queue_kthread_work(dq
.worker
, &nvmeq
->cmdinfo
.work
);
2436 nvme_wait_dq(&dq
, dev
);
2437 kthread_stop(kworker_task
);
2441 * Remove the node from the device list and check
2442 * for whether or not we need to stop the nvme_thread.
2444 static void nvme_dev_list_remove(struct nvme_dev
*dev
)
2446 struct task_struct
*tmp
= NULL
;
2448 spin_lock(&dev_list_lock
);
2449 list_del_init(&dev
->node
);
2450 if (list_empty(&dev_list
) && !IS_ERR_OR_NULL(nvme_thread
)) {
2454 spin_unlock(&dev_list_lock
);
2460 static void nvme_dev_shutdown(struct nvme_dev
*dev
)
2464 dev
->initialized
= 0;
2465 unregister_hotcpu_notifier(&dev
->nb
);
2467 nvme_dev_list_remove(dev
);
2469 if (!dev
->bar
|| (dev
->bar
&& readl(&dev
->bar
->csts
) == -1)) {
2470 for (i
= dev
->queue_count
- 1; i
>= 0; i
--) {
2471 struct nvme_queue
*nvmeq
= raw_nvmeq(dev
, i
);
2472 nvme_suspend_queue(nvmeq
);
2473 nvme_clear_queue(nvmeq
);
2476 nvme_disable_io_queues(dev
);
2477 nvme_shutdown_ctrl(dev
);
2478 nvme_disable_queue(dev
, 0);
2480 nvme_dev_unmap(dev
);
2483 static void nvme_dev_remove(struct nvme_dev
*dev
)
2487 list_for_each_entry(ns
, &dev
->namespaces
, list
) {
2488 if (ns
->disk
->flags
& GENHD_FL_UP
)
2489 del_gendisk(ns
->disk
);
2490 if (!blk_queue_dying(ns
->queue
))
2491 blk_cleanup_queue(ns
->queue
);
2495 static int nvme_setup_prp_pools(struct nvme_dev
*dev
)
2497 struct device
*dmadev
= &dev
->pci_dev
->dev
;
2498 dev
->prp_page_pool
= dma_pool_create("prp list page", dmadev
,
2499 PAGE_SIZE
, PAGE_SIZE
, 0);
2500 if (!dev
->prp_page_pool
)
2503 /* Optimisation for I/Os between 4k and 128k */
2504 dev
->prp_small_pool
= dma_pool_create("prp list 256", dmadev
,
2506 if (!dev
->prp_small_pool
) {
2507 dma_pool_destroy(dev
->prp_page_pool
);
2513 static void nvme_release_prp_pools(struct nvme_dev
*dev
)
2515 dma_pool_destroy(dev
->prp_page_pool
);
2516 dma_pool_destroy(dev
->prp_small_pool
);
2519 static DEFINE_IDA(nvme_instance_ida
);
2521 static int nvme_set_instance(struct nvme_dev
*dev
)
2523 int instance
, error
;
2526 if (!ida_pre_get(&nvme_instance_ida
, GFP_KERNEL
))
2529 spin_lock(&dev_list_lock
);
2530 error
= ida_get_new(&nvme_instance_ida
, &instance
);
2531 spin_unlock(&dev_list_lock
);
2532 } while (error
== -EAGAIN
);
2537 dev
->instance
= instance
;
2541 static void nvme_release_instance(struct nvme_dev
*dev
)
2543 spin_lock(&dev_list_lock
);
2544 ida_remove(&nvme_instance_ida
, dev
->instance
);
2545 spin_unlock(&dev_list_lock
);
2548 static void nvme_free_namespaces(struct nvme_dev
*dev
)
2550 struct nvme_ns
*ns
, *next
;
2552 list_for_each_entry_safe(ns
, next
, &dev
->namespaces
, list
) {
2553 list_del(&ns
->list
);
2559 static void nvme_free_dev(struct kref
*kref
)
2561 struct nvme_dev
*dev
= container_of(kref
, struct nvme_dev
, kref
);
2563 nvme_free_namespaces(dev
);
2564 free_percpu(dev
->io_queue
);
2570 static int nvme_dev_open(struct inode
*inode
, struct file
*f
)
2572 struct nvme_dev
*dev
= container_of(f
->private_data
, struct nvme_dev
,
2574 kref_get(&dev
->kref
);
2575 f
->private_data
= dev
;
2579 static int nvme_dev_release(struct inode
*inode
, struct file
*f
)
2581 struct nvme_dev
*dev
= f
->private_data
;
2582 kref_put(&dev
->kref
, nvme_free_dev
);
2586 static long nvme_dev_ioctl(struct file
*f
, unsigned int cmd
, unsigned long arg
)
2588 struct nvme_dev
*dev
= f
->private_data
;
2590 case NVME_IOCTL_ADMIN_CMD
:
2591 return nvme_user_admin_cmd(dev
, (void __user
*)arg
);
2597 static const struct file_operations nvme_dev_fops
= {
2598 .owner
= THIS_MODULE
,
2599 .open
= nvme_dev_open
,
2600 .release
= nvme_dev_release
,
2601 .unlocked_ioctl
= nvme_dev_ioctl
,
2602 .compat_ioctl
= nvme_dev_ioctl
,
2605 static int nvme_dev_start(struct nvme_dev
*dev
)
2608 bool start_thread
= false;
2610 result
= nvme_dev_map(dev
);
2614 result
= nvme_configure_admin_queue(dev
);
2618 spin_lock(&dev_list_lock
);
2619 if (list_empty(&dev_list
) && IS_ERR_OR_NULL(nvme_thread
)) {
2620 start_thread
= true;
2623 list_add(&dev
->node
, &dev_list
);
2624 spin_unlock(&dev_list_lock
);
2627 nvme_thread
= kthread_run(nvme_kthread
, NULL
, "nvme");
2628 wake_up(&nvme_kthread_wait
);
2630 wait_event_killable(nvme_kthread_wait
, nvme_thread
);
2632 if (IS_ERR_OR_NULL(nvme_thread
)) {
2633 result
= nvme_thread
? PTR_ERR(nvme_thread
) : -EINTR
;
2637 result
= nvme_setup_io_queues(dev
);
2638 if (result
&& result
!= -EBUSY
)
2644 nvme_disable_queue(dev
, 0);
2645 nvme_dev_list_remove(dev
);
2647 nvme_dev_unmap(dev
);
2651 static int nvme_remove_dead_ctrl(void *arg
)
2653 struct nvme_dev
*dev
= (struct nvme_dev
*)arg
;
2654 struct pci_dev
*pdev
= dev
->pci_dev
;
2656 if (pci_get_drvdata(pdev
))
2657 pci_stop_and_remove_bus_device(pdev
);
2658 kref_put(&dev
->kref
, nvme_free_dev
);
2662 static void nvme_remove_disks(struct work_struct
*ws
)
2664 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2666 nvme_dev_remove(dev
);
2667 nvme_free_queues(dev
, 1);
2670 static int nvme_dev_resume(struct nvme_dev
*dev
)
2674 ret
= nvme_dev_start(dev
);
2675 if (ret
&& ret
!= -EBUSY
)
2677 if (ret
== -EBUSY
) {
2678 spin_lock(&dev_list_lock
);
2679 dev
->reset_workfn
= nvme_remove_disks
;
2680 queue_work(nvme_workq
, &dev
->reset_work
);
2681 spin_unlock(&dev_list_lock
);
2683 dev
->initialized
= 1;
2687 static void nvme_dev_reset(struct nvme_dev
*dev
)
2689 nvme_dev_shutdown(dev
);
2690 if (nvme_dev_resume(dev
)) {
2691 dev_err(&dev
->pci_dev
->dev
, "Device failed to resume\n");
2692 kref_get(&dev
->kref
);
2693 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl
, dev
, "nvme%d",
2695 dev_err(&dev
->pci_dev
->dev
,
2696 "Failed to start controller remove task\n");
2697 kref_put(&dev
->kref
, nvme_free_dev
);
2702 static void nvme_reset_failed_dev(struct work_struct
*ws
)
2704 struct nvme_dev
*dev
= container_of(ws
, struct nvme_dev
, reset_work
);
2705 nvme_dev_reset(dev
);
2708 static void nvme_reset_workfn(struct work_struct
*work
)
2710 struct nvme_dev
*dev
= container_of(work
, struct nvme_dev
, reset_work
);
2711 dev
->reset_workfn(work
);
2714 static int nvme_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
2716 int result
= -ENOMEM
;
2717 struct nvme_dev
*dev
;
2719 dev
= kzalloc(sizeof(*dev
), GFP_KERNEL
);
2722 dev
->entry
= kcalloc(num_possible_cpus(), sizeof(*dev
->entry
),
2726 dev
->queues
= kcalloc(num_possible_cpus() + 1, sizeof(void *),
2730 dev
->io_queue
= alloc_percpu(unsigned short);
2734 INIT_LIST_HEAD(&dev
->namespaces
);
2735 dev
->reset_workfn
= nvme_reset_failed_dev
;
2736 INIT_WORK(&dev
->reset_work
, nvme_reset_workfn
);
2737 dev
->pci_dev
= pdev
;
2738 pci_set_drvdata(pdev
, dev
);
2739 result
= nvme_set_instance(dev
);
2743 result
= nvme_setup_prp_pools(dev
);
2747 kref_init(&dev
->kref
);
2748 result
= nvme_dev_start(dev
);
2750 if (result
== -EBUSY
)
2755 result
= nvme_dev_add(dev
);
2760 scnprintf(dev
->name
, sizeof(dev
->name
), "nvme%d", dev
->instance
);
2761 dev
->miscdev
.minor
= MISC_DYNAMIC_MINOR
;
2762 dev
->miscdev
.parent
= &pdev
->dev
;
2763 dev
->miscdev
.name
= dev
->name
;
2764 dev
->miscdev
.fops
= &nvme_dev_fops
;
2765 result
= misc_register(&dev
->miscdev
);
2769 dev
->initialized
= 1;
2773 nvme_dev_remove(dev
);
2774 nvme_free_namespaces(dev
);
2776 nvme_dev_shutdown(dev
);
2778 nvme_free_queues(dev
, 0);
2779 nvme_release_prp_pools(dev
);
2781 nvme_release_instance(dev
);
2783 free_percpu(dev
->io_queue
);
2790 static void nvme_shutdown(struct pci_dev
*pdev
)
2792 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2793 nvme_dev_shutdown(dev
);
2796 static void nvme_remove(struct pci_dev
*pdev
)
2798 struct nvme_dev
*dev
= pci_get_drvdata(pdev
);
2800 spin_lock(&dev_list_lock
);
2801 list_del_init(&dev
->node
);
2802 spin_unlock(&dev_list_lock
);
2804 pci_set_drvdata(pdev
, NULL
);
2805 flush_work(&dev
->reset_work
);
2806 misc_deregister(&dev
->miscdev
);
2807 nvme_dev_remove(dev
);
2808 nvme_dev_shutdown(dev
);
2809 nvme_free_queues(dev
, 0);
2811 nvme_release_instance(dev
);
2812 nvme_release_prp_pools(dev
);
2813 kref_put(&dev
->kref
, nvme_free_dev
);
2816 /* These functions are yet to be implemented */
2817 #define nvme_error_detected NULL
2818 #define nvme_dump_registers NULL
2819 #define nvme_link_reset NULL
2820 #define nvme_slot_reset NULL
2821 #define nvme_error_resume NULL
2823 #ifdef CONFIG_PM_SLEEP
2824 static int nvme_suspend(struct device
*dev
)
2826 struct pci_dev
*pdev
= to_pci_dev(dev
);
2827 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2829 nvme_dev_shutdown(ndev
);
2833 static int nvme_resume(struct device
*dev
)
2835 struct pci_dev
*pdev
= to_pci_dev(dev
);
2836 struct nvme_dev
*ndev
= pci_get_drvdata(pdev
);
2838 if (nvme_dev_resume(ndev
) && !work_busy(&ndev
->reset_work
)) {
2839 ndev
->reset_workfn
= nvme_reset_failed_dev
;
2840 queue_work(nvme_workq
, &ndev
->reset_work
);
2846 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops
, nvme_suspend
, nvme_resume
);
2848 static const struct pci_error_handlers nvme_err_handler
= {
2849 .error_detected
= nvme_error_detected
,
2850 .mmio_enabled
= nvme_dump_registers
,
2851 .link_reset
= nvme_link_reset
,
2852 .slot_reset
= nvme_slot_reset
,
2853 .resume
= nvme_error_resume
,
2856 /* Move to pci_ids.h later */
2857 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
2859 static const struct pci_device_id nvme_id_table
[] = {
2860 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS
, 0xffffff) },
2863 MODULE_DEVICE_TABLE(pci
, nvme_id_table
);
2865 static struct pci_driver nvme_driver
= {
2867 .id_table
= nvme_id_table
,
2868 .probe
= nvme_probe
,
2869 .remove
= nvme_remove
,
2870 .shutdown
= nvme_shutdown
,
2872 .pm
= &nvme_dev_pm_ops
,
2874 .err_handler
= &nvme_err_handler
,
2877 static int __init
nvme_init(void)
2881 init_waitqueue_head(&nvme_kthread_wait
);
2883 nvme_workq
= create_singlethread_workqueue("nvme");
2887 result
= register_blkdev(nvme_major
, "nvme");
2890 else if (result
> 0)
2891 nvme_major
= result
;
2893 result
= pci_register_driver(&nvme_driver
);
2895 goto unregister_blkdev
;
2899 unregister_blkdev(nvme_major
, "nvme");
2901 destroy_workqueue(nvme_workq
);
2905 static void __exit
nvme_exit(void)
2907 pci_unregister_driver(&nvme_driver
);
2908 unregister_blkdev(nvme_major
, "nvme");
2909 destroy_workqueue(nvme_workq
);
2910 BUG_ON(nvme_thread
&& !IS_ERR(nvme_thread
));
2913 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2914 MODULE_LICENSE("GPL");
2915 MODULE_VERSION("0.9");
2916 module_init(nvme_init
);
2917 module_exit(nvme_exit
);