projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge remote-tracking branches 'regmap/fix/irq', 'regmap/fix/rbtree' and 'regmap...
[deliverable/linux.git] / drivers / block / nvme-scsi.c
1 /*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15 /*
16 * Refer to the SCSI-NVMe Translation spec for details on how
17 * each command is translated.
18 */
19
20 #include <linux/nvme.h>
21 #include <linux/bio.h>
22 #include <linux/bitops.h>
23 #include <linux/blkdev.h>
24 #include <linux/compat.h>
25 #include <linux/delay.h>
26 #include <linux/errno.h>
27 #include <linux/fs.h>
28 #include <linux/genhd.h>
29 #include <linux/idr.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/io.h>
33 #include <linux/kdev_t.h>
34 #include <linux/kthread.h>
35 #include <linux/kernel.h>
36 #include <linux/mm.h>
37 #include <linux/module.h>
38 #include <linux/moduleparam.h>
39 #include <linux/pci.h>
40 #include <linux/poison.h>
41 #include <linux/sched.h>
42 #include <linux/slab.h>
43 #include <linux/types.h>
44 #include <scsi/sg.h>
45 #include <scsi/scsi.h>
46
47
48 static int sg_version_num = 30534; /* 2 digits for each component */
49
50 #define SNTI_TRANSLATION_SUCCESS 0
51 #define SNTI_INTERNAL_ERROR 1
52
53 /* VPD Page Codes */
54 #define VPD_SUPPORTED_PAGES 0x00
55 #define VPD_SERIAL_NUMBER 0x80
56 #define VPD_DEVICE_IDENTIFIERS 0x83
57 #define VPD_EXTENDED_INQUIRY 0x86
58 #define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
59
60 /* CDB offsets */
61 #define REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET 6
62 #define REPORT_LUNS_SR_OFFSET 2
63 #define READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET 10
64 #define REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET 4
65 #define REQUEST_SENSE_DESC_OFFSET 1
66 #define REQUEST_SENSE_DESC_MASK 0x01
67 #define DESCRIPTOR_FORMAT_SENSE_DATA_TYPE 1
68 #define INQUIRY_EVPD_BYTE_OFFSET 1
69 #define INQUIRY_PAGE_CODE_BYTE_OFFSET 2
70 #define INQUIRY_EVPD_BIT_MASK 1
71 #define INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET 3
72 #define START_STOP_UNIT_CDB_IMMED_OFFSET 1
73 #define START_STOP_UNIT_CDB_IMMED_MASK 0x1
74 #define START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET 3
75 #define START_STOP_UNIT_CDB_POWER_COND_MOD_MASK 0xF
76 #define START_STOP_UNIT_CDB_POWER_COND_OFFSET 4
77 #define START_STOP_UNIT_CDB_POWER_COND_MASK 0xF0
78 #define START_STOP_UNIT_CDB_NO_FLUSH_OFFSET 4
79 #define START_STOP_UNIT_CDB_NO_FLUSH_MASK 0x4
80 #define START_STOP_UNIT_CDB_START_OFFSET 4
81 #define START_STOP_UNIT_CDB_START_MASK 0x1
82 #define WRITE_BUFFER_CDB_MODE_OFFSET 1
83 #define WRITE_BUFFER_CDB_MODE_MASK 0x1F
84 #define WRITE_BUFFER_CDB_BUFFER_ID_OFFSET 2
85 #define WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET 3
86 #define WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET 6
87 #define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET 1
88 #define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK 0xC0
89 #define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT 6
90 #define FORMAT_UNIT_CDB_LONG_LIST_OFFSET 1
91 #define FORMAT_UNIT_CDB_LONG_LIST_MASK 0x20
92 #define FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET 1
93 #define FORMAT_UNIT_CDB_FORMAT_DATA_MASK 0x10
94 #define FORMAT_UNIT_SHORT_PARM_LIST_LEN 4
95 #define FORMAT_UNIT_LONG_PARM_LIST_LEN 8
96 #define FORMAT_UNIT_PROT_INT_OFFSET 3
97 #define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
98 #define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
99 #define UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET 7
100
101 /* Misc. defines */
102 #define NIBBLE_SHIFT 4
103 #define FIXED_SENSE_DATA 0x70
104 #define DESC_FORMAT_SENSE_DATA 0x72
105 #define FIXED_SENSE_DATA_ADD_LENGTH 10
106 #define LUN_ENTRY_SIZE 8
107 #define LUN_DATA_HEADER_SIZE 8
108 #define ALL_LUNS_RETURNED 0x02
109 #define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
110 #define RESTRICTED_LUNS_RETURNED 0x00
111 #define NVME_POWER_STATE_START_VALID 0x00
112 #define NVME_POWER_STATE_ACTIVE 0x01
113 #define NVME_POWER_STATE_IDLE 0x02
114 #define NVME_POWER_STATE_STANDBY 0x03
115 #define NVME_POWER_STATE_LU_CONTROL 0x07
116 #define POWER_STATE_0 0
117 #define POWER_STATE_1 1
118 #define POWER_STATE_2 2
119 #define POWER_STATE_3 3
120 #define DOWNLOAD_SAVE_ACTIVATE 0x05
121 #define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
122 #define ACTIVATE_DEFERRED_MICROCODE 0x0F
123 #define FORMAT_UNIT_IMMED_MASK 0x2
124 #define FORMAT_UNIT_IMMED_OFFSET 1
125 #define KELVIN_TEMP_FACTOR 273
126 #define FIXED_FMT_SENSE_DATA_SIZE 18
127 #define DESC_FMT_SENSE_DATA_SIZE 8
128
129 /* SCSI/NVMe defines and bit masks */
130 #define INQ_STANDARD_INQUIRY_PAGE 0x00
131 #define INQ_SUPPORTED_VPD_PAGES_PAGE 0x00
132 #define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
133 #define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
134 #define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
135 #define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
136 #define INQ_SERIAL_NUMBER_LENGTH 0x14
137 #define INQ_NUM_SUPPORTED_VPD_PAGES 5
138 #define VERSION_SPC_4 0x06
139 #define ACA_UNSUPPORTED 0
140 #define STANDARD_INQUIRY_LENGTH 36
141 #define ADDITIONAL_STD_INQ_LENGTH 31
142 #define EXTENDED_INQUIRY_DATA_PAGE_LENGTH 0x3C
143 #define RESERVED_FIELD 0
144
145 /* SCSI READ/WRITE Defines */
146 #define IO_CDB_WP_MASK 0xE0
147 #define IO_CDB_WP_SHIFT 5
148 #define IO_CDB_FUA_MASK 0x8
149 #define IO_6_CDB_LBA_OFFSET 0
150 #define IO_6_CDB_LBA_MASK 0x001FFFFF
151 #define IO_6_CDB_TX_LEN_OFFSET 4
152 #define IO_6_DEFAULT_TX_LEN 256
153 #define IO_10_CDB_LBA_OFFSET 2
154 #define IO_10_CDB_TX_LEN_OFFSET 7
155 #define IO_10_CDB_WP_OFFSET 1
156 #define IO_10_CDB_FUA_OFFSET 1
157 #define IO_12_CDB_LBA_OFFSET 2
158 #define IO_12_CDB_TX_LEN_OFFSET 6
159 #define IO_12_CDB_WP_OFFSET 1
160 #define IO_12_CDB_FUA_OFFSET 1
161 #define IO_16_CDB_FUA_OFFSET 1
162 #define IO_16_CDB_WP_OFFSET 1
163 #define IO_16_CDB_LBA_OFFSET 2
164 #define IO_16_CDB_TX_LEN_OFFSET 10
165
166 /* Mode Sense/Select defines */
167 #define MODE_PAGE_INFO_EXCEP 0x1C
168 #define MODE_PAGE_CACHING 0x08
169 #define MODE_PAGE_CONTROL 0x0A
170 #define MODE_PAGE_POWER_CONDITION 0x1A
171 #define MODE_PAGE_RETURN_ALL 0x3F
172 #define MODE_PAGE_BLK_DES_LEN 0x08
173 #define MODE_PAGE_LLBAA_BLK_DES_LEN 0x10
174 #define MODE_PAGE_CACHING_LEN 0x14
175 #define MODE_PAGE_CONTROL_LEN 0x0C
176 #define MODE_PAGE_POW_CND_LEN 0x28
177 #define MODE_PAGE_INF_EXC_LEN 0x0C
178 #define MODE_PAGE_ALL_LEN 0x54
179 #define MODE_SENSE6_MPH_SIZE 4
180 #define MODE_SENSE6_ALLOC_LEN_OFFSET 4
181 #define MODE_SENSE_PAGE_CONTROL_OFFSET 2
182 #define MODE_SENSE_PAGE_CONTROL_MASK 0xC0
183 #define MODE_SENSE_PAGE_CODE_OFFSET 2
184 #define MODE_SENSE_PAGE_CODE_MASK 0x3F
185 #define MODE_SENSE_LLBAA_OFFSET 1
186 #define MODE_SENSE_LLBAA_MASK 0x10
187 #define MODE_SENSE_LLBAA_SHIFT 4
188 #define MODE_SENSE_DBD_OFFSET 1
189 #define MODE_SENSE_DBD_MASK 8
190 #define MODE_SENSE_DBD_SHIFT 3
191 #define MODE_SENSE10_MPH_SIZE 8
192 #define MODE_SENSE10_ALLOC_LEN_OFFSET 7
193 #define MODE_SELECT_CDB_PAGE_FORMAT_OFFSET 1
194 #define MODE_SELECT_CDB_SAVE_PAGES_OFFSET 1
195 #define MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET 4
196 #define MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET 7
197 #define MODE_SELECT_CDB_PAGE_FORMAT_MASK 0x10
198 #define MODE_SELECT_CDB_SAVE_PAGES_MASK 0x1
199 #define MODE_SELECT_6_BD_OFFSET 3
200 #define MODE_SELECT_10_BD_OFFSET 6
201 #define MODE_SELECT_10_LLBAA_OFFSET 4
202 #define MODE_SELECT_10_LLBAA_MASK 1
203 #define MODE_SELECT_6_MPH_SIZE 4
204 #define MODE_SELECT_10_MPH_SIZE 8
205 #define CACHING_MODE_PAGE_WCE_MASK 0x04
206 #define MODE_SENSE_BLK_DESC_ENABLED 0
207 #define MODE_SENSE_BLK_DESC_COUNT 1
208 #define MODE_SELECT_PAGE_CODE_MASK 0x3F
209 #define SHORT_DESC_BLOCK 8
210 #define LONG_DESC_BLOCK 16
211 #define MODE_PAGE_POW_CND_LEN_FIELD 0x26
212 #define MODE_PAGE_INF_EXC_LEN_FIELD 0x0A
213 #define MODE_PAGE_CACHING_LEN_FIELD 0x12
214 #define MODE_PAGE_CONTROL_LEN_FIELD 0x0A
215 #define MODE_SENSE_PC_CURRENT_VALUES 0
216
217 /* Log Sense defines */
218 #define LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE 0x00
219 #define LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH 0x07
220 #define LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE 0x2F
221 #define LOG_PAGE_TEMPERATURE_PAGE 0x0D
222 #define LOG_SENSE_CDB_SP_OFFSET 1
223 #define LOG_SENSE_CDB_SP_NOT_ENABLED 0
224 #define LOG_SENSE_CDB_PC_OFFSET 2
225 #define LOG_SENSE_CDB_PC_MASK 0xC0
226 #define LOG_SENSE_CDB_PC_SHIFT 6
227 #define LOG_SENSE_CDB_PC_CUMULATIVE_VALUES 1
228 #define LOG_SENSE_CDB_PAGE_CODE_MASK 0x3F
229 #define LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET 7
230 #define REMAINING_INFO_EXCP_PAGE_LENGTH 0x8
231 #define LOG_INFO_EXCP_PAGE_LENGTH 0xC
232 #define REMAINING_TEMP_PAGE_LENGTH 0xC
233 #define LOG_TEMP_PAGE_LENGTH 0x10
234 #define LOG_TEMP_UNKNOWN 0xFF
235 #define SUPPORTED_LOG_PAGES_PAGE_LENGTH 0x3
236
237 /* Read Capacity defines */
238 #define READ_CAP_10_RESP_SIZE 8
239 #define READ_CAP_16_RESP_SIZE 32
240
241 /* NVMe Namespace and Command Defines */
242 #define BYTES_TO_DWORDS 4
243 #define NVME_MAX_FIRMWARE_SLOT 7
244
245 /* Report LUNs defines */
246 #define REPORT_LUNS_FIRST_LUN_OFFSET 8
247
248 /* SCSI ADDITIONAL SENSE Codes */
249
250 #define SCSI_ASC_NO_SENSE 0x00
251 #define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
252 #define SCSI_ASC_LUN_NOT_READY 0x04
253 #define SCSI_ASC_WARNING 0x0B
254 #define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
255 #define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
256 #define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
257 #define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
258 #define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
259 #define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
260 #define SCSI_ASC_ILLEGAL_COMMAND 0x20
261 #define SCSI_ASC_ILLEGAL_BLOCK 0x21
262 #define SCSI_ASC_INVALID_CDB 0x24
263 #define SCSI_ASC_INVALID_LUN 0x25
264 #define SCSI_ASC_INVALID_PARAMETER 0x26
265 #define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
266 #define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
267
268 /* SCSI ADDITIONAL SENSE Code Qualifiers */
269
270 #define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
271 #define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
272 #define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
273 #define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
274 #define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
275 #define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
276 #define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
277 #define SCSI_ASCQ_INVALID_LUN_ID 0x09
278
279 /**
280 * DEVICE_SPECIFIC_PARAMETER in mode parameter header (see sbc2r16) to
281 * enable DPOFUA support type 0x10 value.
282 */
283 #define DEVICE_SPECIFIC_PARAMETER 0
284 #define VPD_ID_DESCRIPTOR_LENGTH sizeof(VPD_IDENTIFICATION_DESCRIPTOR)
285
286 /* MACROs to extract information from CDBs */
287
288 #define GET_OPCODE(cdb) cdb[0]
289
290 #define GET_U8_FROM_CDB(cdb, index) (cdb[index] << 0)
291
292 #define GET_U16_FROM_CDB(cdb, index) ((cdb[index] << 8) | (cdb[index + 1] << 0))
293
294 #define GET_U24_FROM_CDB(cdb, index) ((cdb[index] << 16) | \
295 (cdb[index + 1] << 8) | \
296 (cdb[index + 2] << 0))
297
298 #define GET_U32_FROM_CDB(cdb, index) ((cdb[index] << 24) | \
299 (cdb[index + 1] << 16) | \
300 (cdb[index + 2] << 8) | \
301 (cdb[index + 3] << 0))
302
303 #define GET_U64_FROM_CDB(cdb, index) ((((u64)cdb[index]) << 56) | \
304 (((u64)cdb[index + 1]) << 48) | \
305 (((u64)cdb[index + 2]) << 40) | \
306 (((u64)cdb[index + 3]) << 32) | \
307 (((u64)cdb[index + 4]) << 24) | \
308 (((u64)cdb[index + 5]) << 16) | \
309 (((u64)cdb[index + 6]) << 8) | \
310 (((u64)cdb[index + 7]) << 0))
311
312 /* Inquiry Helper Macros */
313 #define GET_INQ_EVPD_BIT(cdb) \
314 ((GET_U8_FROM_CDB(cdb, INQUIRY_EVPD_BYTE_OFFSET) & \
315 INQUIRY_EVPD_BIT_MASK) ? 1 : 0)
316
317 #define GET_INQ_PAGE_CODE(cdb) \
318 (GET_U8_FROM_CDB(cdb, INQUIRY_PAGE_CODE_BYTE_OFFSET))
319
320 #define GET_INQ_ALLOC_LENGTH(cdb) \
321 (GET_U16_FROM_CDB(cdb, INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET))
322
323 /* Report LUNs Helper Macros */
324 #define GET_REPORT_LUNS_ALLOC_LENGTH(cdb) \
325 (GET_U32_FROM_CDB(cdb, REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET))
326
327 /* Read Capacity Helper Macros */
328 #define GET_READ_CAP_16_ALLOC_LENGTH(cdb) \
329 (GET_U32_FROM_CDB(cdb, READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET))
330
331 #define IS_READ_CAP_16(cdb) \
332 ((cdb[0] == SERVICE_ACTION_IN_16 && cdb[1] == SAI_READ_CAPACITY_16) ? 1 : 0)
333
334 /* Request Sense Helper Macros */
335 #define GET_REQUEST_SENSE_ALLOC_LENGTH(cdb) \
336 (GET_U8_FROM_CDB(cdb, REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET))
337
338 /* Mode Sense Helper Macros */
339 #define GET_MODE_SENSE_DBD(cdb) \
340 ((GET_U8_FROM_CDB(cdb, MODE_SENSE_DBD_OFFSET) & MODE_SENSE_DBD_MASK) >> \
341 MODE_SENSE_DBD_SHIFT)
342
343 #define GET_MODE_SENSE_LLBAA(cdb) \
344 ((GET_U8_FROM_CDB(cdb, MODE_SENSE_LLBAA_OFFSET) & \
345 MODE_SENSE_LLBAA_MASK) >> MODE_SENSE_LLBAA_SHIFT)
346
347 #define GET_MODE_SENSE_MPH_SIZE(cdb10) \
348 (cdb10 ? MODE_SENSE10_MPH_SIZE : MODE_SENSE6_MPH_SIZE)
349
350
351 /* Struct to gather data that needs to be extracted from a SCSI CDB.
352 Not conforming to any particular CDB variant, but compatible with all. */
353
354 struct nvme_trans_io_cdb {
355 u8 fua;
356 u8 prot_info;
357 u64 lba;
358 u32 xfer_len;
359 };
360
361
362 /* Internal Helper Functions */
363
364
365 /* Copy data to userspace memory */
366
367 static int nvme_trans_copy_to_user(struct sg_io_hdr *hdr, void *from,
368 unsigned long n)
369 {
370 int res = SNTI_TRANSLATION_SUCCESS;
371 unsigned long not_copied;
372 int i;
373 void *index = from;
374 size_t remaining = n;
375 size_t xfer_len;
376
377 if (hdr->iovec_count > 0) {
378 struct sg_iovec sgl;
379
380 for (i = 0; i < hdr->iovec_count; i++) {
381 not_copied = copy_from_user(&sgl, hdr->dxferp +
382 i * sizeof(struct sg_iovec),
383 sizeof(struct sg_iovec));
384 if (not_copied)
385 return -EFAULT;
386 xfer_len = min(remaining, sgl.iov_len);
387 not_copied = copy_to_user(sgl.iov_base, index,
388 xfer_len);
389 if (not_copied) {
390 res = -EFAULT;
391 break;
392 }
393 index += xfer_len;
394 remaining -= xfer_len;
395 if (remaining == 0)
396 break;
397 }
398 return res;
399 }
400 not_copied = copy_to_user(hdr->dxferp, from, n);
401 if (not_copied)
402 res = -EFAULT;
403 return res;
404 }
405
406 /* Copy data from userspace memory */
407
408 static int nvme_trans_copy_from_user(struct sg_io_hdr *hdr, void *to,
409 unsigned long n)
410 {
411 int res = SNTI_TRANSLATION_SUCCESS;
412 unsigned long not_copied;
413 int i;
414 void *index = to;
415 size_t remaining = n;
416 size_t xfer_len;
417
418 if (hdr->iovec_count > 0) {
419 struct sg_iovec sgl;
420
421 for (i = 0; i < hdr->iovec_count; i++) {
422 not_copied = copy_from_user(&sgl, hdr->dxferp +
423 i * sizeof(struct sg_iovec),
424 sizeof(struct sg_iovec));
425 if (not_copied)
426 return -EFAULT;
427 xfer_len = min(remaining, sgl.iov_len);
428 not_copied = copy_from_user(index, sgl.iov_base,
429 xfer_len);
430 if (not_copied) {
431 res = -EFAULT;
432 break;
433 }
434 index += xfer_len;
435 remaining -= xfer_len;
436 if (remaining == 0)
437 break;
438 }
439 return res;
440 }
441
442 not_copied = copy_from_user(to, hdr->dxferp, n);
443 if (not_copied)
444 res = -EFAULT;
445 return res;
446 }
447
448 /* Status/Sense Buffer Writeback */
449
450 static int nvme_trans_completion(struct sg_io_hdr *hdr, u8 status, u8 sense_key,
451 u8 asc, u8 ascq)
452 {
453 int res = SNTI_TRANSLATION_SUCCESS;
454 u8 xfer_len;
455 u8 resp[DESC_FMT_SENSE_DATA_SIZE];
456
457 if (scsi_status_is_good(status)) {
458 hdr->status = SAM_STAT_GOOD;
459 hdr->masked_status = GOOD;
460 hdr->host_status = DID_OK;
461 hdr->driver_status = DRIVER_OK;
462 hdr->sb_len_wr = 0;
463 } else {
464 hdr->status = status;
465 hdr->masked_status = status >> 1;
466 hdr->host_status = DID_OK;
467 hdr->driver_status = DRIVER_OK;
468
469 memset(resp, 0, DESC_FMT_SENSE_DATA_SIZE);
470 resp[0] = DESC_FORMAT_SENSE_DATA;
471 resp[1] = sense_key;
472 resp[2] = asc;
473 resp[3] = ascq;
474
475 xfer_len = min_t(u8, hdr->mx_sb_len, DESC_FMT_SENSE_DATA_SIZE);
476 hdr->sb_len_wr = xfer_len;
477 if (copy_to_user(hdr->sbp, resp, xfer_len) > 0)
478 res = -EFAULT;
479 }
480
481 return res;
482 }
483
484 static int nvme_trans_status_code(struct sg_io_hdr *hdr, int nvme_sc)
485 {
486 u8 status, sense_key, asc, ascq;
487 int res = SNTI_TRANSLATION_SUCCESS;
488
489 /* For non-nvme (Linux) errors, simply return the error code */
490 if (nvme_sc < 0)
491 return nvme_sc;
492
493 /* Mask DNR, More, and reserved fields */
494 nvme_sc &= 0x7FF;
495
496 switch (nvme_sc) {
497 /* Generic Command Status */
498 case NVME_SC_SUCCESS:
499 status = SAM_STAT_GOOD;
500 sense_key = NO_SENSE;
501 asc = SCSI_ASC_NO_SENSE;
502 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
503 break;
504 case NVME_SC_INVALID_OPCODE:
505 status = SAM_STAT_CHECK_CONDITION;
506 sense_key = ILLEGAL_REQUEST;
507 asc = SCSI_ASC_ILLEGAL_COMMAND;
508 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
509 break;
510 case NVME_SC_INVALID_FIELD:
511 status = SAM_STAT_CHECK_CONDITION;
512 sense_key = ILLEGAL_REQUEST;
513 asc = SCSI_ASC_INVALID_CDB;
514 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
515 break;
516 case NVME_SC_DATA_XFER_ERROR:
517 status = SAM_STAT_CHECK_CONDITION;
518 sense_key = MEDIUM_ERROR;
519 asc = SCSI_ASC_NO_SENSE;
520 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
521 break;
522 case NVME_SC_POWER_LOSS:
523 status = SAM_STAT_TASK_ABORTED;
524 sense_key = ABORTED_COMMAND;
525 asc = SCSI_ASC_WARNING;
526 ascq = SCSI_ASCQ_POWER_LOSS_EXPECTED;
527 break;
528 case NVME_SC_INTERNAL:
529 status = SAM_STAT_CHECK_CONDITION;
530 sense_key = HARDWARE_ERROR;
531 asc = SCSI_ASC_INTERNAL_TARGET_FAILURE;
532 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
533 break;
534 case NVME_SC_ABORT_REQ:
535 status = SAM_STAT_TASK_ABORTED;
536 sense_key = ABORTED_COMMAND;
537 asc = SCSI_ASC_NO_SENSE;
538 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
539 break;
540 case NVME_SC_ABORT_QUEUE:
541 status = SAM_STAT_TASK_ABORTED;
542 sense_key = ABORTED_COMMAND;
543 asc = SCSI_ASC_NO_SENSE;
544 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
545 break;
546 case NVME_SC_FUSED_FAIL:
547 status = SAM_STAT_TASK_ABORTED;
548 sense_key = ABORTED_COMMAND;
549 asc = SCSI_ASC_NO_SENSE;
550 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
551 break;
552 case NVME_SC_FUSED_MISSING:
553 status = SAM_STAT_TASK_ABORTED;
554 sense_key = ABORTED_COMMAND;
555 asc = SCSI_ASC_NO_SENSE;
556 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
557 break;
558 case NVME_SC_INVALID_NS:
559 status = SAM_STAT_CHECK_CONDITION;
560 sense_key = ILLEGAL_REQUEST;
561 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
562 ascq = SCSI_ASCQ_INVALID_LUN_ID;
563 break;
564 case NVME_SC_LBA_RANGE:
565 status = SAM_STAT_CHECK_CONDITION;
566 sense_key = ILLEGAL_REQUEST;
567 asc = SCSI_ASC_ILLEGAL_BLOCK;
568 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
569 break;
570 case NVME_SC_CAP_EXCEEDED:
571 status = SAM_STAT_CHECK_CONDITION;
572 sense_key = MEDIUM_ERROR;
573 asc = SCSI_ASC_NO_SENSE;
574 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
575 break;
576 case NVME_SC_NS_NOT_READY:
577 status = SAM_STAT_CHECK_CONDITION;
578 sense_key = NOT_READY;
579 asc = SCSI_ASC_LUN_NOT_READY;
580 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
581 break;
582
583 /* Command Specific Status */
584 case NVME_SC_INVALID_FORMAT:
585 status = SAM_STAT_CHECK_CONDITION;
586 sense_key = ILLEGAL_REQUEST;
587 asc = SCSI_ASC_FORMAT_COMMAND_FAILED;
588 ascq = SCSI_ASCQ_FORMAT_COMMAND_FAILED;
589 break;
590 case NVME_SC_BAD_ATTRIBUTES:
591 status = SAM_STAT_CHECK_CONDITION;
592 sense_key = ILLEGAL_REQUEST;
593 asc = SCSI_ASC_INVALID_CDB;
594 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
595 break;
596
597 /* Media Errors */
598 case NVME_SC_WRITE_FAULT:
599 status = SAM_STAT_CHECK_CONDITION;
600 sense_key = MEDIUM_ERROR;
601 asc = SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT;
602 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
603 break;
604 case NVME_SC_READ_ERROR:
605 status = SAM_STAT_CHECK_CONDITION;
606 sense_key = MEDIUM_ERROR;
607 asc = SCSI_ASC_UNRECOVERED_READ_ERROR;
608 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
609 break;
610 case NVME_SC_GUARD_CHECK:
611 status = SAM_STAT_CHECK_CONDITION;
612 sense_key = MEDIUM_ERROR;
613 asc = SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED;
614 ascq = SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED;
615 break;
616 case NVME_SC_APPTAG_CHECK:
617 status = SAM_STAT_CHECK_CONDITION;
618 sense_key = MEDIUM_ERROR;
619 asc = SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED;
620 ascq = SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED;
621 break;
622 case NVME_SC_REFTAG_CHECK:
623 status = SAM_STAT_CHECK_CONDITION;
624 sense_key = MEDIUM_ERROR;
625 asc = SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED;
626 ascq = SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED;
627 break;
628 case NVME_SC_COMPARE_FAILED:
629 status = SAM_STAT_CHECK_CONDITION;
630 sense_key = MISCOMPARE;
631 asc = SCSI_ASC_MISCOMPARE_DURING_VERIFY;
632 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
633 break;
634 case NVME_SC_ACCESS_DENIED:
635 status = SAM_STAT_CHECK_CONDITION;
636 sense_key = ILLEGAL_REQUEST;
637 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
638 ascq = SCSI_ASCQ_INVALID_LUN_ID;
639 break;
640
641 /* Unspecified/Default */
642 case NVME_SC_CMDID_CONFLICT:
643 case NVME_SC_CMD_SEQ_ERROR:
644 case NVME_SC_CQ_INVALID:
645 case NVME_SC_QID_INVALID:
646 case NVME_SC_QUEUE_SIZE:
647 case NVME_SC_ABORT_LIMIT:
648 case NVME_SC_ABORT_MISSING:
649 case NVME_SC_ASYNC_LIMIT:
650 case NVME_SC_FIRMWARE_SLOT:
651 case NVME_SC_FIRMWARE_IMAGE:
652 case NVME_SC_INVALID_VECTOR:
653 case NVME_SC_INVALID_LOG_PAGE:
654 default:
655 status = SAM_STAT_CHECK_CONDITION;
656 sense_key = ILLEGAL_REQUEST;
657 asc = SCSI_ASC_NO_SENSE;
658 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
659 break;
660 }
661
662 res = nvme_trans_completion(hdr, status, sense_key, asc, ascq);
663
664 return res;
665 }
666
667 /* INQUIRY Helper Functions */
668
669 static int nvme_trans_standard_inquiry_page(struct nvme_ns *ns,
670 struct sg_io_hdr *hdr, u8 *inq_response,
671 int alloc_len)
672 {
673 struct nvme_dev *dev = ns->dev;
674 dma_addr_t dma_addr;
675 void *mem;
676 struct nvme_id_ns *id_ns;
677 int res = SNTI_TRANSLATION_SUCCESS;
678 int nvme_sc;
679 int xfer_len;
680 u8 resp_data_format = 0x02;
681 u8 protect;
682 u8 cmdque = 0x01 << 1;
683 u8 fw_offset = sizeof(dev->firmware_rev);
684
685 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
686 &dma_addr, GFP_KERNEL);
687 if (mem == NULL) {
688 res = -ENOMEM;
689 goto out_dma;
690 }
691
692 /* nvme ns identify - use DPS value for PROTECT field */
693 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
694 res = nvme_trans_status_code(hdr, nvme_sc);
695 /*
696 * If nvme_sc was -ve, res will be -ve here.
697 * If nvme_sc was +ve, the status would bace been translated, and res
698 * can only be 0 or -ve.
699 * - If 0 && nvme_sc > 0, then go into next if where res gets nvme_sc
700 * - If -ve, return because its a Linux error.
701 */
702 if (res)
703 goto out_free;
704 if (nvme_sc) {
705 res = nvme_sc;
706 goto out_free;
707 }
708 id_ns = mem;
709 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
710
711 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
712 inq_response[2] = VERSION_SPC_4;
713 inq_response[3] = resp_data_format; /*normaca=0 | hisup=0 */
714 inq_response[4] = ADDITIONAL_STD_INQ_LENGTH;
715 inq_response[5] = protect; /* sccs=0 | acc=0 | tpgs=0 | pc3=0 */
716 inq_response[7] = cmdque; /* wbus16=0 | sync=0 | vs=0 */
717 strncpy(&inq_response[8], "NVMe ", 8);
718 strncpy(&inq_response[16], dev->model, 16);
719
720 while (dev->firmware_rev[fw_offset - 1] == ' ' && fw_offset > 4)
721 fw_offset--;
722 fw_offset -= 4;
723 strncpy(&inq_response[32], dev->firmware_rev + fw_offset, 4);
724
725 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
726 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
727
728 out_free:
729 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
730 dma_addr);
731 out_dma:
732 return res;
733 }
734
735 static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
736 struct sg_io_hdr *hdr, u8 *inq_response,
737 int alloc_len)
738 {
739 int res = SNTI_TRANSLATION_SUCCESS;
740 int xfer_len;
741
742 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
743 inq_response[1] = INQ_SUPPORTED_VPD_PAGES_PAGE; /* Page Code */
744 inq_response[3] = INQ_NUM_SUPPORTED_VPD_PAGES; /* Page Length */
745 inq_response[4] = INQ_SUPPORTED_VPD_PAGES_PAGE;
746 inq_response[5] = INQ_UNIT_SERIAL_NUMBER_PAGE;
747 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
748 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
749 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
750
751 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
752 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
753
754 return res;
755 }
756
757 static int nvme_trans_unit_serial_page(struct nvme_ns *ns,
758 struct sg_io_hdr *hdr, u8 *inq_response,
759 int alloc_len)
760 {
761 struct nvme_dev *dev = ns->dev;
762 int res = SNTI_TRANSLATION_SUCCESS;
763 int xfer_len;
764
765 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
766 inq_response[1] = INQ_UNIT_SERIAL_NUMBER_PAGE; /* Page Code */
767 inq_response[3] = INQ_SERIAL_NUMBER_LENGTH; /* Page Length */
768 strncpy(&inq_response[4], dev->serial, INQ_SERIAL_NUMBER_LENGTH);
769
770 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
771 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
772
773 return res;
774 }
775
776 static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
777 u8 *inq_response, int alloc_len)
778 {
779 struct nvme_dev *dev = ns->dev;
780 dma_addr_t dma_addr;
781 void *mem;
782 int res = SNTI_TRANSLATION_SUCCESS;
783 int nvme_sc;
784 int xfer_len;
785 __be32 tmp_id = cpu_to_be32(ns->ns_id);
786
787 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
788 &dma_addr, GFP_KERNEL);
789 if (mem == NULL) {
790 res = -ENOMEM;
791 goto out_dma;
792 }
793
794 memset(inq_response, 0, alloc_len);
795 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
796 if (readl(&dev->bar->vs) >= NVME_VS(1, 1)) {
797 struct nvme_id_ns *id_ns = mem;
798 void *eui = id_ns->eui64;
799 int len = sizeof(id_ns->eui64);
800
801 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
802 res = nvme_trans_status_code(hdr, nvme_sc);
803 if (res)
804 goto out_free;
805 if (nvme_sc) {
806 res = nvme_sc;
807 goto out_free;
808 }
809
810 if (readl(&dev->bar->vs) >= NVME_VS(1, 2)) {
811 if (bitmap_empty(eui, len * 8)) {
812 eui = id_ns->nguid;
813 len = sizeof(id_ns->nguid);
814 }
815 }
816 if (bitmap_empty(eui, len * 8))
817 goto scsi_string;
818
819 inq_response[3] = 4 + len; /* Page Length */
820 /* Designation Descriptor start */
821 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
822 inq_response[5] = 0x02; /* PIV=0b | Asso=00b | Designator Type=2h */
823 inq_response[6] = 0x00; /* Rsvd */
824 inq_response[7] = len; /* Designator Length */
825 memcpy(&inq_response[8], eui, len);
826 } else {
827 scsi_string:
828 if (alloc_len < 72) {
829 res = nvme_trans_completion(hdr,
830 SAM_STAT_CHECK_CONDITION,
831 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
832 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
833 goto out_free;
834 }
835 inq_response[3] = 0x48; /* Page Length */
836 /* Designation Descriptor start */
837 inq_response[4] = 0x03; /* Proto ID=0h | Code set=3h */
838 inq_response[5] = 0x08; /* PIV=0b | Asso=00b | Designator Type=8h */
839 inq_response[6] = 0x00; /* Rsvd */
840 inq_response[7] = 0x44; /* Designator Length */
841
842 sprintf(&inq_response[8], "%04x", dev->pci_dev->vendor);
843 memcpy(&inq_response[12], dev->model, sizeof(dev->model));
844 sprintf(&inq_response[52], "%04x", tmp_id);
845 memcpy(&inq_response[56], dev->serial, sizeof(dev->serial));
846 }
847 xfer_len = alloc_len;
848 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
849
850 out_free:
851 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
852 dma_addr);
853 out_dma:
854 return res;
855 }
856
857 static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
858 int alloc_len)
859 {
860 u8 *inq_response;
861 int res = SNTI_TRANSLATION_SUCCESS;
862 int nvme_sc;
863 struct nvme_dev *dev = ns->dev;
864 dma_addr_t dma_addr;
865 void *mem;
866 struct nvme_id_ctrl *id_ctrl;
867 struct nvme_id_ns *id_ns;
868 int xfer_len;
869 u8 microcode = 0x80;
870 u8 spt;
871 u8 spt_lut[8] = {0, 0, 2, 1, 4, 6, 5, 7};
872 u8 grd_chk, app_chk, ref_chk, protect;
873 u8 uask_sup = 0x20;
874 u8 v_sup;
875 u8 luiclr = 0x01;
876
877 inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
878 if (inq_response == NULL) {
879 res = -ENOMEM;
880 goto out_mem;
881 }
882
883 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
884 &dma_addr, GFP_KERNEL);
885 if (mem == NULL) {
886 res = -ENOMEM;
887 goto out_dma;
888 }
889
890 /* nvme ns identify */
891 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
892 res = nvme_trans_status_code(hdr, nvme_sc);
893 if (res)
894 goto out_free;
895 if (nvme_sc) {
896 res = nvme_sc;
897 goto out_free;
898 }
899 id_ns = mem;
900 spt = spt_lut[(id_ns->dpc) & 0x07] << 3;
901 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
902 grd_chk = protect << 2;
903 app_chk = protect << 1;
904 ref_chk = protect;
905
906 /* nvme controller identify */
907 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
908 res = nvme_trans_status_code(hdr, nvme_sc);
909 if (res)
910 goto out_free;
911 if (nvme_sc) {
912 res = nvme_sc;
913 goto out_free;
914 }
915 id_ctrl = mem;
916 v_sup = id_ctrl->vwc;
917
918 memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
919 inq_response[1] = INQ_EXTENDED_INQUIRY_DATA_PAGE; /* Page Code */
920 inq_response[2] = 0x00; /* Page Length MSB */
921 inq_response[3] = 0x3C; /* Page Length LSB */
922 inq_response[4] = microcode | spt | grd_chk | app_chk | ref_chk;
923 inq_response[5] = uask_sup;
924 inq_response[6] = v_sup;
925 inq_response[7] = luiclr;
926 inq_response[8] = 0;
927 inq_response[9] = 0;
928
929 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
930 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
931
932 out_free:
933 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
934 dma_addr);
935 out_dma:
936 kfree(inq_response);
937 out_mem:
938 return res;
939 }
940
941 static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
942 int alloc_len)
943 {
944 u8 *inq_response;
945 int res = SNTI_TRANSLATION_SUCCESS;
946 int xfer_len;
947
948 inq_response = kzalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
949 if (inq_response == NULL) {
950 res = -ENOMEM;
951 goto out_mem;
952 }
953
954 inq_response[1] = INQ_BDEV_CHARACTERISTICS_PAGE; /* Page Code */
955 inq_response[2] = 0x00; /* Page Length MSB */
956 inq_response[3] = 0x3C; /* Page Length LSB */
957 inq_response[4] = 0x00; /* Medium Rotation Rate MSB */
958 inq_response[5] = 0x01; /* Medium Rotation Rate LSB */
959 inq_response[6] = 0x00; /* Form Factor */
960
961 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
962 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
963
964 kfree(inq_response);
965 out_mem:
966 return res;
967 }
968
969 /* LOG SENSE Helper Functions */
970
971 static int nvme_trans_log_supp_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
972 int alloc_len)
973 {
974 int res = SNTI_TRANSLATION_SUCCESS;
975 int xfer_len;
976 u8 *log_response;
977
978 log_response = kzalloc(LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH, GFP_KERNEL);
979 if (log_response == NULL) {
980 res = -ENOMEM;
981 goto out_mem;
982 }
983
984 log_response[0] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
985 /* Subpage=0x00, Page Length MSB=0 */
986 log_response[3] = SUPPORTED_LOG_PAGES_PAGE_LENGTH;
987 log_response[4] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
988 log_response[5] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
989 log_response[6] = LOG_PAGE_TEMPERATURE_PAGE;
990
991 xfer_len = min(alloc_len, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
992 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
993
994 kfree(log_response);
995 out_mem:
996 return res;
997 }
998
999 static int nvme_trans_log_info_exceptions(struct nvme_ns *ns,
1000 struct sg_io_hdr *hdr, int alloc_len)
1001 {
1002 int res = SNTI_TRANSLATION_SUCCESS;
1003 int xfer_len;
1004 u8 *log_response;
1005 struct nvme_command c;
1006 struct nvme_dev *dev = ns->dev;
1007 struct nvme_smart_log *smart_log;
1008 dma_addr_t dma_addr;
1009 void *mem;
1010 u8 temp_c;
1011 u16 temp_k;
1012
1013 log_response = kzalloc(LOG_INFO_EXCP_PAGE_LENGTH, GFP_KERNEL);
1014 if (log_response == NULL) {
1015 res = -ENOMEM;
1016 goto out_mem;
1017 }
1018
1019 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1020 sizeof(struct nvme_smart_log),
1021 &dma_addr, GFP_KERNEL);
1022 if (mem == NULL) {
1023 res = -ENOMEM;
1024 goto out_dma;
1025 }
1026
1027 /* Get SMART Log Page */
1028 memset(&c, 0, sizeof(c));
1029 c.common.opcode = nvme_admin_get_log_page;
1030 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1031 c.common.prp1 = cpu_to_le64(dma_addr);
1032 c.common.cdw10[0] = cpu_to_le32((((sizeof(struct nvme_smart_log) /
1033 BYTES_TO_DWORDS) - 1) << 16) | NVME_LOG_SMART);
1034 res = nvme_submit_admin_cmd(dev, &c, NULL);
1035 if (res != NVME_SC_SUCCESS) {
1036 temp_c = LOG_TEMP_UNKNOWN;
1037 } else {
1038 smart_log = mem;
1039 temp_k = (smart_log->temperature[1] << 8) +
1040 (smart_log->temperature[0]);
1041 temp_c = temp_k - KELVIN_TEMP_FACTOR;
1042 }
1043
1044 log_response[0] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
1045 /* Subpage=0x00, Page Length MSB=0 */
1046 log_response[3] = REMAINING_INFO_EXCP_PAGE_LENGTH;
1047 /* Informational Exceptions Log Parameter 1 Start */
1048 /* Parameter Code=0x0000 bytes 4,5 */
1049 log_response[6] = 0x23; /* DU=0, TSD=1, ETC=0, TMC=0, FMT_AND_LNK=11b */
1050 log_response[7] = 0x04; /* PARAMETER LENGTH */
1051 /* Add sense Code and qualifier = 0x00 each */
1052 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1053 log_response[10] = temp_c;
1054
1055 xfer_len = min(alloc_len, LOG_INFO_EXCP_PAGE_LENGTH);
1056 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1057
1058 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1059 mem, dma_addr);
1060 out_dma:
1061 kfree(log_response);
1062 out_mem:
1063 return res;
1064 }
1065
1066 static int nvme_trans_log_temperature(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1067 int alloc_len)
1068 {
1069 int res = SNTI_TRANSLATION_SUCCESS;
1070 int xfer_len;
1071 u8 *log_response;
1072 struct nvme_command c;
1073 struct nvme_dev *dev = ns->dev;
1074 struct nvme_smart_log *smart_log;
1075 dma_addr_t dma_addr;
1076 void *mem;
1077 u32 feature_resp;
1078 u8 temp_c_cur, temp_c_thresh;
1079 u16 temp_k;
1080
1081 log_response = kzalloc(LOG_TEMP_PAGE_LENGTH, GFP_KERNEL);
1082 if (log_response == NULL) {
1083 res = -ENOMEM;
1084 goto out_mem;
1085 }
1086
1087 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1088 sizeof(struct nvme_smart_log),
1089 &dma_addr, GFP_KERNEL);
1090 if (mem == NULL) {
1091 res = -ENOMEM;
1092 goto out_dma;
1093 }
1094
1095 /* Get SMART Log Page */
1096 memset(&c, 0, sizeof(c));
1097 c.common.opcode = nvme_admin_get_log_page;
1098 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1099 c.common.prp1 = cpu_to_le64(dma_addr);
1100 c.common.cdw10[0] = cpu_to_le32((((sizeof(struct nvme_smart_log) /
1101 BYTES_TO_DWORDS) - 1) << 16) | NVME_LOG_SMART);
1102 res = nvme_submit_admin_cmd(dev, &c, NULL);
1103 if (res != NVME_SC_SUCCESS) {
1104 temp_c_cur = LOG_TEMP_UNKNOWN;
1105 } else {
1106 smart_log = mem;
1107 temp_k = (smart_log->temperature[1] << 8) +
1108 (smart_log->temperature[0]);
1109 temp_c_cur = temp_k - KELVIN_TEMP_FACTOR;
1110 }
1111
1112 /* Get Features for Temp Threshold */
1113 res = nvme_get_features(dev, NVME_FEAT_TEMP_THRESH, 0, 0,
1114 &feature_resp);
1115 if (res != NVME_SC_SUCCESS)
1116 temp_c_thresh = LOG_TEMP_UNKNOWN;
1117 else
1118 temp_c_thresh = (feature_resp & 0xFFFF) - KELVIN_TEMP_FACTOR;
1119
1120 log_response[0] = LOG_PAGE_TEMPERATURE_PAGE;
1121 /* Subpage=0x00, Page Length MSB=0 */
1122 log_response[3] = REMAINING_TEMP_PAGE_LENGTH;
1123 /* Temperature Log Parameter 1 (Temperature) Start */
1124 /* Parameter Code = 0x0000 */
1125 log_response[6] = 0x01; /* Format and Linking = 01b */
1126 log_response[7] = 0x02; /* Parameter Length */
1127 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1128 log_response[9] = temp_c_cur;
1129 /* Temperature Log Parameter 2 (Reference Temperature) Start */
1130 log_response[11] = 0x01; /* Parameter Code = 0x0001 */
1131 log_response[12] = 0x01; /* Format and Linking = 01b */
1132 log_response[13] = 0x02; /* Parameter Length */
1133 /* Use Temperature Thresh from NVMe Get Log Page, convert to C from K */
1134 log_response[15] = temp_c_thresh;
1135
1136 xfer_len = min(alloc_len, LOG_TEMP_PAGE_LENGTH);
1137 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1138
1139 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1140 mem, dma_addr);
1141 out_dma:
1142 kfree(log_response);
1143 out_mem:
1144 return res;
1145 }
1146
1147 /* MODE SENSE Helper Functions */
1148
1149 static int nvme_trans_fill_mode_parm_hdr(u8 *resp, int len, u8 cdb10, u8 llbaa,
1150 u16 mode_data_length, u16 blk_desc_len)
1151 {
1152 /* Quick check to make sure I don't stomp on my own memory... */
1153 if ((cdb10 && len < 8) || (!cdb10 && len < 4))
1154 return SNTI_INTERNAL_ERROR;
1155
1156 if (cdb10) {
1157 resp[0] = (mode_data_length & 0xFF00) >> 8;
1158 resp[1] = (mode_data_length & 0x00FF);
1159 /* resp[2] and [3] are zero */
1160 resp[4] = llbaa;
1161 resp[5] = RESERVED_FIELD;
1162 resp[6] = (blk_desc_len & 0xFF00) >> 8;
1163 resp[7] = (blk_desc_len & 0x00FF);
1164 } else {
1165 resp[0] = (mode_data_length & 0x00FF);
1166 /* resp[1] and [2] are zero */
1167 resp[3] = (blk_desc_len & 0x00FF);
1168 }
1169
1170 return SNTI_TRANSLATION_SUCCESS;
1171 }
1172
1173 static int nvme_trans_fill_blk_desc(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1174 u8 *resp, int len, u8 llbaa)
1175 {
1176 int res = SNTI_TRANSLATION_SUCCESS;
1177 int nvme_sc;
1178 struct nvme_dev *dev = ns->dev;
1179 dma_addr_t dma_addr;
1180 void *mem;
1181 struct nvme_id_ns *id_ns;
1182 u8 flbas;
1183 u32 lba_length;
1184
1185 if (llbaa == 0 && len < MODE_PAGE_BLK_DES_LEN)
1186 return SNTI_INTERNAL_ERROR;
1187 else if (llbaa > 0 && len < MODE_PAGE_LLBAA_BLK_DES_LEN)
1188 return SNTI_INTERNAL_ERROR;
1189
1190 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1191 &dma_addr, GFP_KERNEL);
1192 if (mem == NULL) {
1193 res = -ENOMEM;
1194 goto out;
1195 }
1196
1197 /* nvme ns identify */
1198 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1199 res = nvme_trans_status_code(hdr, nvme_sc);
1200 if (res)
1201 goto out_dma;
1202 if (nvme_sc) {
1203 res = nvme_sc;
1204 goto out_dma;
1205 }
1206 id_ns = mem;
1207 flbas = (id_ns->flbas) & 0x0F;
1208 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1209
1210 if (llbaa == 0) {
1211 __be32 tmp_cap = cpu_to_be32(le64_to_cpu(id_ns->ncap));
1212 /* Byte 4 is reserved */
1213 __be32 tmp_len = cpu_to_be32(lba_length & 0x00FFFFFF);
1214
1215 memcpy(resp, &tmp_cap, sizeof(u32));
1216 memcpy(&resp[4], &tmp_len, sizeof(u32));
1217 } else {
1218 __be64 tmp_cap = cpu_to_be64(le64_to_cpu(id_ns->ncap));
1219 __be32 tmp_len = cpu_to_be32(lba_length);
1220
1221 memcpy(resp, &tmp_cap, sizeof(u64));
1222 /* Bytes 8, 9, 10, 11 are reserved */
1223 memcpy(&resp[12], &tmp_len, sizeof(u32));
1224 }
1225
1226 out_dma:
1227 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1228 dma_addr);
1229 out:
1230 return res;
1231 }
1232
1233 static int nvme_trans_fill_control_page(struct nvme_ns *ns,
1234 struct sg_io_hdr *hdr, u8 *resp,
1235 int len)
1236 {
1237 if (len < MODE_PAGE_CONTROL_LEN)
1238 return SNTI_INTERNAL_ERROR;
1239
1240 resp[0] = MODE_PAGE_CONTROL;
1241 resp[1] = MODE_PAGE_CONTROL_LEN_FIELD;
1242 resp[2] = 0x0E; /* TST=000b, TMF_ONLY=0, DPICZ=1,
1243 * D_SENSE=1, GLTSD=1, RLEC=0 */
1244 resp[3] = 0x12; /* Q_ALGO_MODIFIER=1h, NUAR=0, QERR=01b */
1245 /* Byte 4: VS=0, RAC=0, UA_INT=0, SWP=0 */
1246 resp[5] = 0x40; /* ATO=0, TAS=1, ATMPE=0, RWWP=0, AUTOLOAD=0 */
1247 /* resp[6] and [7] are obsolete, thus zero */
1248 resp[8] = 0xFF; /* Busy timeout period = 0xffff */
1249 resp[9] = 0xFF;
1250 /* Bytes 10,11: Extended selftest completion time = 0x0000 */
1251
1252 return SNTI_TRANSLATION_SUCCESS;
1253 }
1254
1255 static int nvme_trans_fill_caching_page(struct nvme_ns *ns,
1256 struct sg_io_hdr *hdr,
1257 u8 *resp, int len)
1258 {
1259 int res = SNTI_TRANSLATION_SUCCESS;
1260 int nvme_sc;
1261 struct nvme_dev *dev = ns->dev;
1262 u32 feature_resp;
1263 u8 vwc;
1264
1265 if (len < MODE_PAGE_CACHING_LEN)
1266 return SNTI_INTERNAL_ERROR;
1267
1268 nvme_sc = nvme_get_features(dev, NVME_FEAT_VOLATILE_WC, 0, 0,
1269 &feature_resp);
1270 res = nvme_trans_status_code(hdr, nvme_sc);
1271 if (res)
1272 goto out;
1273 if (nvme_sc) {
1274 res = nvme_sc;
1275 goto out;
1276 }
1277 vwc = feature_resp & 0x00000001;
1278
1279 resp[0] = MODE_PAGE_CACHING;
1280 resp[1] = MODE_PAGE_CACHING_LEN_FIELD;
1281 resp[2] = vwc << 2;
1282
1283 out:
1284 return res;
1285 }
1286
1287 static int nvme_trans_fill_pow_cnd_page(struct nvme_ns *ns,
1288 struct sg_io_hdr *hdr, u8 *resp,
1289 int len)
1290 {
1291 int res = SNTI_TRANSLATION_SUCCESS;
1292
1293 if (len < MODE_PAGE_POW_CND_LEN)
1294 return SNTI_INTERNAL_ERROR;
1295
1296 resp[0] = MODE_PAGE_POWER_CONDITION;
1297 resp[1] = MODE_PAGE_POW_CND_LEN_FIELD;
1298 /* All other bytes are zero */
1299
1300 return res;
1301 }
1302
1303 static int nvme_trans_fill_inf_exc_page(struct nvme_ns *ns,
1304 struct sg_io_hdr *hdr, u8 *resp,
1305 int len)
1306 {
1307 int res = SNTI_TRANSLATION_SUCCESS;
1308
1309 if (len < MODE_PAGE_INF_EXC_LEN)
1310 return SNTI_INTERNAL_ERROR;
1311
1312 resp[0] = MODE_PAGE_INFO_EXCEP;
1313 resp[1] = MODE_PAGE_INF_EXC_LEN_FIELD;
1314 resp[2] = 0x88;
1315 /* All other bytes are zero */
1316
1317 return res;
1318 }
1319
1320 static int nvme_trans_fill_all_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1321 u8 *resp, int len)
1322 {
1323 int res = SNTI_TRANSLATION_SUCCESS;
1324 u16 mode_pages_offset_1 = 0;
1325 u16 mode_pages_offset_2, mode_pages_offset_3, mode_pages_offset_4;
1326
1327 mode_pages_offset_2 = mode_pages_offset_1 + MODE_PAGE_CACHING_LEN;
1328 mode_pages_offset_3 = mode_pages_offset_2 + MODE_PAGE_CONTROL_LEN;
1329 mode_pages_offset_4 = mode_pages_offset_3 + MODE_PAGE_POW_CND_LEN;
1330
1331 res = nvme_trans_fill_caching_page(ns, hdr, &resp[mode_pages_offset_1],
1332 MODE_PAGE_CACHING_LEN);
1333 if (res != SNTI_TRANSLATION_SUCCESS)
1334 goto out;
1335 res = nvme_trans_fill_control_page(ns, hdr, &resp[mode_pages_offset_2],
1336 MODE_PAGE_CONTROL_LEN);
1337 if (res != SNTI_TRANSLATION_SUCCESS)
1338 goto out;
1339 res = nvme_trans_fill_pow_cnd_page(ns, hdr, &resp[mode_pages_offset_3],
1340 MODE_PAGE_POW_CND_LEN);
1341 if (res != SNTI_TRANSLATION_SUCCESS)
1342 goto out;
1343 res = nvme_trans_fill_inf_exc_page(ns, hdr, &resp[mode_pages_offset_4],
1344 MODE_PAGE_INF_EXC_LEN);
1345 if (res != SNTI_TRANSLATION_SUCCESS)
1346 goto out;
1347
1348 out:
1349 return res;
1350 }
1351
1352 static inline int nvme_trans_get_blk_desc_len(u8 dbd, u8 llbaa)
1353 {
1354 if (dbd == MODE_SENSE_BLK_DESC_ENABLED) {
1355 /* SPC-4: len = 8 x Num_of_descriptors if llbaa = 0, 16x if 1 */
1356 return 8 * (llbaa + 1) * MODE_SENSE_BLK_DESC_COUNT;
1357 } else {
1358 return 0;
1359 }
1360 }
1361
1362 static int nvme_trans_mode_page_create(struct nvme_ns *ns,
1363 struct sg_io_hdr *hdr, u8 *cmd,
1364 u16 alloc_len, u8 cdb10,
1365 int (*mode_page_fill_func)
1366 (struct nvme_ns *,
1367 struct sg_io_hdr *hdr, u8 *, int),
1368 u16 mode_pages_tot_len)
1369 {
1370 int res = SNTI_TRANSLATION_SUCCESS;
1371 int xfer_len;
1372 u8 *response;
1373 u8 dbd, llbaa;
1374 u16 resp_size;
1375 int mph_size;
1376 u16 mode_pages_offset_1;
1377 u16 blk_desc_len, blk_desc_offset, mode_data_length;
1378
1379 dbd = GET_MODE_SENSE_DBD(cmd);
1380 llbaa = GET_MODE_SENSE_LLBAA(cmd);
1381 mph_size = GET_MODE_SENSE_MPH_SIZE(cdb10);
1382 blk_desc_len = nvme_trans_get_blk_desc_len(dbd, llbaa);
1383
1384 resp_size = mph_size + blk_desc_len + mode_pages_tot_len;
1385 /* Refer spc4r34 Table 440 for calculation of Mode data Length field */
1386 mode_data_length = 3 + (3 * cdb10) + blk_desc_len + mode_pages_tot_len;
1387
1388 blk_desc_offset = mph_size;
1389 mode_pages_offset_1 = blk_desc_offset + blk_desc_len;
1390
1391 response = kzalloc(resp_size, GFP_KERNEL);
1392 if (response == NULL) {
1393 res = -ENOMEM;
1394 goto out_mem;
1395 }
1396
1397 res = nvme_trans_fill_mode_parm_hdr(&response[0], mph_size, cdb10,
1398 llbaa, mode_data_length, blk_desc_len);
1399 if (res != SNTI_TRANSLATION_SUCCESS)
1400 goto out_free;
1401 if (blk_desc_len > 0) {
1402 res = nvme_trans_fill_blk_desc(ns, hdr,
1403 &response[blk_desc_offset],
1404 blk_desc_len, llbaa);
1405 if (res != SNTI_TRANSLATION_SUCCESS)
1406 goto out_free;
1407 }
1408 res = mode_page_fill_func(ns, hdr, &response[mode_pages_offset_1],
1409 mode_pages_tot_len);
1410 if (res != SNTI_TRANSLATION_SUCCESS)
1411 goto out_free;
1412
1413 xfer_len = min(alloc_len, resp_size);
1414 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
1415
1416 out_free:
1417 kfree(response);
1418 out_mem:
1419 return res;
1420 }
1421
1422 /* Read Capacity Helper Functions */
1423
1424 static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
1425 u8 cdb16)
1426 {
1427 u8 flbas;
1428 u32 lba_length;
1429 u64 rlba;
1430 u8 prot_en;
1431 u8 p_type_lut[4] = {0, 0, 1, 2};
1432 __be64 tmp_rlba;
1433 __be32 tmp_rlba_32;
1434 __be32 tmp_len;
1435
1436 flbas = (id_ns->flbas) & 0x0F;
1437 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1438 rlba = le64_to_cpup(&id_ns->nsze) - 1;
1439 (id_ns->dps) ? (prot_en = 0x01) : (prot_en = 0);
1440
1441 if (!cdb16) {
1442 if (rlba > 0xFFFFFFFF)
1443 rlba = 0xFFFFFFFF;
1444 tmp_rlba_32 = cpu_to_be32(rlba);
1445 tmp_len = cpu_to_be32(lba_length);
1446 memcpy(response, &tmp_rlba_32, sizeof(u32));
1447 memcpy(&response[4], &tmp_len, sizeof(u32));
1448 } else {
1449 tmp_rlba = cpu_to_be64(rlba);
1450 tmp_len = cpu_to_be32(lba_length);
1451 memcpy(response, &tmp_rlba, sizeof(u64));
1452 memcpy(&response[8], &tmp_len, sizeof(u32));
1453 response[12] = (p_type_lut[id_ns->dps & 0x3] << 1) | prot_en;
1454 /* P_I_Exponent = 0x0 | LBPPBE = 0x0 */
1455 /* LBPME = 0 | LBPRZ = 0 | LALBA = 0x00 */
1456 /* Bytes 16-31 - Reserved */
1457 }
1458 }
1459
1460 /* Start Stop Unit Helper Functions */
1461
1462 static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1463 u8 pc, u8 pcmod, u8 start)
1464 {
1465 int res = SNTI_TRANSLATION_SUCCESS;
1466 int nvme_sc;
1467 struct nvme_dev *dev = ns->dev;
1468 dma_addr_t dma_addr;
1469 void *mem;
1470 struct nvme_id_ctrl *id_ctrl;
1471 int lowest_pow_st; /* max npss = lowest power consumption */
1472 unsigned ps_desired = 0;
1473
1474 /* NVMe Controller Identify */
1475 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1476 sizeof(struct nvme_id_ctrl),
1477 &dma_addr, GFP_KERNEL);
1478 if (mem == NULL) {
1479 res = -ENOMEM;
1480 goto out;
1481 }
1482 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
1483 res = nvme_trans_status_code(hdr, nvme_sc);
1484 if (res)
1485 goto out_dma;
1486 if (nvme_sc) {
1487 res = nvme_sc;
1488 goto out_dma;
1489 }
1490 id_ctrl = mem;
1491 lowest_pow_st = max(POWER_STATE_0, (int)(id_ctrl->npss - 1));
1492
1493 switch (pc) {
1494 case NVME_POWER_STATE_START_VALID:
1495 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1496 if (pcmod == 0 && start == 0x1)
1497 ps_desired = POWER_STATE_0;
1498 if (pcmod == 0 && start == 0x0)
1499 ps_desired = lowest_pow_st;
1500 break;
1501 case NVME_POWER_STATE_ACTIVE:
1502 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1503 if (pcmod == 0)
1504 ps_desired = POWER_STATE_0;
1505 break;
1506 case NVME_POWER_STATE_IDLE:
1507 /* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
1508 if (pcmod == 0x0)
1509 ps_desired = POWER_STATE_1;
1510 else if (pcmod == 0x1)
1511 ps_desired = POWER_STATE_2;
1512 else if (pcmod == 0x2)
1513 ps_desired = POWER_STATE_3;
1514 break;
1515 case NVME_POWER_STATE_STANDBY:
1516 /* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
1517 if (pcmod == 0x0)
1518 ps_desired = max(POWER_STATE_0, (lowest_pow_st - 2));
1519 else if (pcmod == 0x1)
1520 ps_desired = max(POWER_STATE_0, (lowest_pow_st - 1));
1521 break;
1522 case NVME_POWER_STATE_LU_CONTROL:
1523 default:
1524 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1525 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1526 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1527 break;
1528 }
1529 nvme_sc = nvme_set_features(dev, NVME_FEAT_POWER_MGMT, ps_desired, 0,
1530 NULL);
1531 res = nvme_trans_status_code(hdr, nvme_sc);
1532 if (res)
1533 goto out_dma;
1534 if (nvme_sc)
1535 res = nvme_sc;
1536 out_dma:
1537 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
1538 dma_addr);
1539 out:
1540 return res;
1541 }
1542
1543 /* Write Buffer Helper Functions */
1544 /* Also using this for Format Unit with hdr passed as NULL, and buffer_id, 0 */
1545
1546 static int nvme_trans_send_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1547 u8 opcode, u32 tot_len, u32 offset,
1548 u8 buffer_id)
1549 {
1550 int res = SNTI_TRANSLATION_SUCCESS;
1551 int nvme_sc;
1552 struct nvme_dev *dev = ns->dev;
1553 struct nvme_command c;
1554 struct nvme_iod *iod = NULL;
1555 unsigned length;
1556
1557 memset(&c, 0, sizeof(c));
1558 c.common.opcode = opcode;
1559 if (opcode == nvme_admin_download_fw) {
1560 if (hdr->iovec_count > 0) {
1561 /* Assuming SGL is not allowed for this command */
1562 res = nvme_trans_completion(hdr,
1563 SAM_STAT_CHECK_CONDITION,
1564 ILLEGAL_REQUEST,
1565 SCSI_ASC_INVALID_CDB,
1566 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1567 goto out;
1568 }
1569 iod = nvme_map_user_pages(dev, DMA_TO_DEVICE,
1570 (unsigned long)hdr->dxferp, tot_len);
1571 if (IS_ERR(iod)) {
1572 res = PTR_ERR(iod);
1573 goto out;
1574 }
1575 length = nvme_setup_prps(dev, iod, tot_len, GFP_KERNEL);
1576 if (length != tot_len) {
1577 res = -ENOMEM;
1578 goto out_unmap;
1579 }
1580
1581 c.dlfw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1582 c.dlfw.prp2 = cpu_to_le64(iod->first_dma);
1583 c.dlfw.numd = cpu_to_le32((tot_len/BYTES_TO_DWORDS) - 1);
1584 c.dlfw.offset = cpu_to_le32(offset/BYTES_TO_DWORDS);
1585 } else if (opcode == nvme_admin_activate_fw) {
1586 u32 cdw10 = buffer_id | NVME_FWACT_REPL_ACTV;
1587 c.common.cdw10[0] = cpu_to_le32(cdw10);
1588 }
1589
1590 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1591 res = nvme_trans_status_code(hdr, nvme_sc);
1592 if (res)
1593 goto out_unmap;
1594 if (nvme_sc)
1595 res = nvme_sc;
1596
1597 out_unmap:
1598 if (opcode == nvme_admin_download_fw) {
1599 nvme_unmap_user_pages(dev, DMA_TO_DEVICE, iod);
1600 nvme_free_iod(dev, iod);
1601 }
1602 out:
1603 return res;
1604 }
1605
1606 /* Mode Select Helper Functions */
1607
1608 static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
1609 u16 *bd_len, u8 *llbaa)
1610 {
1611 if (cdb10) {
1612 /* 10 Byte CDB */
1613 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
1614 parm_list[MODE_SELECT_10_BD_OFFSET + 1];
1615 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &
1616 MODE_SELECT_10_LLBAA_MASK;
1617 } else {
1618 /* 6 Byte CDB */
1619 *bd_len = parm_list[MODE_SELECT_6_BD_OFFSET];
1620 }
1621 }
1622
1623 static void nvme_trans_modesel_save_bd(struct nvme_ns *ns, u8 *parm_list,
1624 u16 idx, u16 bd_len, u8 llbaa)
1625 {
1626 u16 bd_num;
1627
1628 bd_num = bd_len / ((llbaa == 0) ?
1629 SHORT_DESC_BLOCK : LONG_DESC_BLOCK);
1630 /* Store block descriptor info if a FORMAT UNIT comes later */
1631 /* TODO Saving 1st BD info; what to do if multiple BD received? */
1632 if (llbaa == 0) {
1633 /* Standard Block Descriptor - spc4r34 7.5.5.1 */
1634 ns->mode_select_num_blocks =
1635 (parm_list[idx + 1] << 16) +
1636 (parm_list[idx + 2] << 8) +
1637 (parm_list[idx + 3]);
1638
1639 ns->mode_select_block_len =
1640 (parm_list[idx + 5] << 16) +
1641 (parm_list[idx + 6] << 8) +
1642 (parm_list[idx + 7]);
1643 } else {
1644 /* Long LBA Block Descriptor - sbc3r27 6.4.2.3 */
1645 ns->mode_select_num_blocks =
1646 (((u64)parm_list[idx + 0]) << 56) +
1647 (((u64)parm_list[idx + 1]) << 48) +
1648 (((u64)parm_list[idx + 2]) << 40) +
1649 (((u64)parm_list[idx + 3]) << 32) +
1650 (((u64)parm_list[idx + 4]) << 24) +
1651 (((u64)parm_list[idx + 5]) << 16) +
1652 (((u64)parm_list[idx + 6]) << 8) +
1653 ((u64)parm_list[idx + 7]);
1654
1655 ns->mode_select_block_len =
1656 (parm_list[idx + 12] << 24) +
1657 (parm_list[idx + 13] << 16) +
1658 (parm_list[idx + 14] << 8) +
1659 (parm_list[idx + 15]);
1660 }
1661 }
1662
1663 static int nvme_trans_modesel_get_mp(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1664 u8 *mode_page, u8 page_code)
1665 {
1666 int res = SNTI_TRANSLATION_SUCCESS;
1667 int nvme_sc;
1668 struct nvme_dev *dev = ns->dev;
1669 unsigned dword11;
1670
1671 switch (page_code) {
1672 case MODE_PAGE_CACHING:
1673 dword11 = ((mode_page[2] & CACHING_MODE_PAGE_WCE_MASK) ? 1 : 0);
1674 nvme_sc = nvme_set_features(dev, NVME_FEAT_VOLATILE_WC, dword11,
1675 0, NULL);
1676 res = nvme_trans_status_code(hdr, nvme_sc);
1677 if (res)
1678 break;
1679 if (nvme_sc) {
1680 res = nvme_sc;
1681 break;
1682 }
1683 break;
1684 case MODE_PAGE_CONTROL:
1685 break;
1686 case MODE_PAGE_POWER_CONDITION:
1687 /* Verify the OS is not trying to set timers */
1688 if ((mode_page[2] & 0x01) != 0 || (mode_page[3] & 0x0F) != 0) {
1689 res = nvme_trans_completion(hdr,
1690 SAM_STAT_CHECK_CONDITION,
1691 ILLEGAL_REQUEST,
1692 SCSI_ASC_INVALID_PARAMETER,
1693 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1694 if (!res)
1695 res = SNTI_INTERNAL_ERROR;
1696 break;
1697 }
1698 break;
1699 default:
1700 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1701 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1702 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1703 if (!res)
1704 res = SNTI_INTERNAL_ERROR;
1705 break;
1706 }
1707
1708 return res;
1709 }
1710
1711 static int nvme_trans_modesel_data(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1712 u8 *cmd, u16 parm_list_len, u8 pf,
1713 u8 sp, u8 cdb10)
1714 {
1715 int res = SNTI_TRANSLATION_SUCCESS;
1716 u8 *parm_list;
1717 u16 bd_len;
1718 u8 llbaa = 0;
1719 u16 index, saved_index;
1720 u8 page_code;
1721 u16 mp_size;
1722
1723 /* Get parm list from data-in/out buffer */
1724 parm_list = kmalloc(parm_list_len, GFP_KERNEL);
1725 if (parm_list == NULL) {
1726 res = -ENOMEM;
1727 goto out;
1728 }
1729
1730 res = nvme_trans_copy_from_user(hdr, parm_list, parm_list_len);
1731 if (res != SNTI_TRANSLATION_SUCCESS)
1732 goto out_mem;
1733
1734 nvme_trans_modesel_get_bd_len(parm_list, cdb10, &bd_len, &llbaa);
1735 index = (cdb10) ? (MODE_SELECT_10_MPH_SIZE) : (MODE_SELECT_6_MPH_SIZE);
1736
1737 if (bd_len != 0) {
1738 /* Block Descriptors present, parse */
1739 nvme_trans_modesel_save_bd(ns, parm_list, index, bd_len, llbaa);
1740 index += bd_len;
1741 }
1742 saved_index = index;
1743
1744 /* Multiple mode pages may be present; iterate through all */
1745 /* In 1st Iteration, don't do NVME Command, only check for CDB errors */
1746 do {
1747 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1748 mp_size = parm_list[index + 1] + 2;
1749 if ((page_code != MODE_PAGE_CACHING) &&
1750 (page_code != MODE_PAGE_CONTROL) &&
1751 (page_code != MODE_PAGE_POWER_CONDITION)) {
1752 res = nvme_trans_completion(hdr,
1753 SAM_STAT_CHECK_CONDITION,
1754 ILLEGAL_REQUEST,
1755 SCSI_ASC_INVALID_CDB,
1756 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1757 goto out_mem;
1758 }
1759 index += mp_size;
1760 } while (index < parm_list_len);
1761
1762 /* In 2nd Iteration, do the NVME Commands */
1763 index = saved_index;
1764 do {
1765 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1766 mp_size = parm_list[index + 1] + 2;
1767 res = nvme_trans_modesel_get_mp(ns, hdr, &parm_list[index],
1768 page_code);
1769 if (res != SNTI_TRANSLATION_SUCCESS)
1770 break;
1771 index += mp_size;
1772 } while (index < parm_list_len);
1773
1774 out_mem:
1775 kfree(parm_list);
1776 out:
1777 return res;
1778 }
1779
1780 /* Format Unit Helper Functions */
1781
1782 static int nvme_trans_fmt_set_blk_size_count(struct nvme_ns *ns,
1783 struct sg_io_hdr *hdr)
1784 {
1785 int res = SNTI_TRANSLATION_SUCCESS;
1786 int nvme_sc;
1787 struct nvme_dev *dev = ns->dev;
1788 dma_addr_t dma_addr;
1789 void *mem;
1790 struct nvme_id_ns *id_ns;
1791 u8 flbas;
1792
1793 /*
1794 * SCSI Expects a MODE SELECT would have been issued prior to
1795 * a FORMAT UNIT, and the block size and number would be used
1796 * from the block descriptor in it. If a MODE SELECT had not
1797 * been issued, FORMAT shall use the current values for both.
1798 */
1799
1800 if (ns->mode_select_num_blocks == 0 || ns->mode_select_block_len == 0) {
1801 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1802 sizeof(struct nvme_id_ns), &dma_addr, GFP_KERNEL);
1803 if (mem == NULL) {
1804 res = -ENOMEM;
1805 goto out;
1806 }
1807 /* nvme ns identify */
1808 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1809 res = nvme_trans_status_code(hdr, nvme_sc);
1810 if (res)
1811 goto out_dma;
1812 if (nvme_sc) {
1813 res = nvme_sc;
1814 goto out_dma;
1815 }
1816 id_ns = mem;
1817
1818 if (ns->mode_select_num_blocks == 0)
1819 ns->mode_select_num_blocks = le64_to_cpu(id_ns->ncap);
1820 if (ns->mode_select_block_len == 0) {
1821 flbas = (id_ns->flbas) & 0x0F;
1822 ns->mode_select_block_len =
1823 (1 << (id_ns->lbaf[flbas].ds));
1824 }
1825 out_dma:
1826 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1827 mem, dma_addr);
1828 }
1829 out:
1830 return res;
1831 }
1832
1833 static int nvme_trans_fmt_get_parm_header(struct sg_io_hdr *hdr, u8 len,
1834 u8 format_prot_info, u8 *nvme_pf_code)
1835 {
1836 int res = SNTI_TRANSLATION_SUCCESS;
1837 u8 *parm_list;
1838 u8 pf_usage, pf_code;
1839
1840 parm_list = kmalloc(len, GFP_KERNEL);
1841 if (parm_list == NULL) {
1842 res = -ENOMEM;
1843 goto out;
1844 }
1845 res = nvme_trans_copy_from_user(hdr, parm_list, len);
1846 if (res != SNTI_TRANSLATION_SUCCESS)
1847 goto out_mem;
1848
1849 if ((parm_list[FORMAT_UNIT_IMMED_OFFSET] &
1850 FORMAT_UNIT_IMMED_MASK) != 0) {
1851 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1852 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1853 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1854 goto out_mem;
1855 }
1856
1857 if (len == FORMAT_UNIT_LONG_PARM_LIST_LEN &&
1858 (parm_list[FORMAT_UNIT_PROT_INT_OFFSET] & 0x0F) != 0) {
1859 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1860 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1861 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1862 goto out_mem;
1863 }
1864 pf_usage = parm_list[FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET] &
1865 FORMAT_UNIT_PROT_FIELD_USAGE_MASK;
1866 pf_code = (pf_usage << 2) | format_prot_info;
1867 switch (pf_code) {
1868 case 0:
1869 *nvme_pf_code = 0;
1870 break;
1871 case 2:
1872 *nvme_pf_code = 1;
1873 break;
1874 case 3:
1875 *nvme_pf_code = 2;
1876 break;
1877 case 7:
1878 *nvme_pf_code = 3;
1879 break;
1880 default:
1881 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1882 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1883 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1884 break;
1885 }
1886
1887 out_mem:
1888 kfree(parm_list);
1889 out:
1890 return res;
1891 }
1892
1893 static int nvme_trans_fmt_send_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1894 u8 prot_info)
1895 {
1896 int res = SNTI_TRANSLATION_SUCCESS;
1897 int nvme_sc;
1898 struct nvme_dev *dev = ns->dev;
1899 dma_addr_t dma_addr;
1900 void *mem;
1901 struct nvme_id_ns *id_ns;
1902 u8 i;
1903 u8 flbas, nlbaf;
1904 u8 selected_lbaf = 0xFF;
1905 u32 cdw10 = 0;
1906 struct nvme_command c;
1907
1908 /* Loop thru LBAF's in id_ns to match reqd lbaf, put in cdw10 */
1909 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1910 &dma_addr, GFP_KERNEL);
1911 if (mem == NULL) {
1912 res = -ENOMEM;
1913 goto out;
1914 }
1915 /* nvme ns identify */
1916 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1917 res = nvme_trans_status_code(hdr, nvme_sc);
1918 if (res)
1919 goto out_dma;
1920 if (nvme_sc) {
1921 res = nvme_sc;
1922 goto out_dma;
1923 }
1924 id_ns = mem;
1925 flbas = (id_ns->flbas) & 0x0F;
1926 nlbaf = id_ns->nlbaf;
1927
1928 for (i = 0; i < nlbaf; i++) {
1929 if (ns->mode_select_block_len == (1 << (id_ns->lbaf[i].ds))) {
1930 selected_lbaf = i;
1931 break;
1932 }
1933 }
1934 if (selected_lbaf > 0x0F) {
1935 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1936 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1937 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1938 }
1939 if (ns->mode_select_num_blocks != le64_to_cpu(id_ns->ncap)) {
1940 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1941 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1942 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1943 }
1944
1945 cdw10 |= prot_info << 5;
1946 cdw10 |= selected_lbaf & 0x0F;
1947 memset(&c, 0, sizeof(c));
1948 c.format.opcode = nvme_admin_format_nvm;
1949 c.format.nsid = cpu_to_le32(ns->ns_id);
1950 c.format.cdw10 = cpu_to_le32(cdw10);
1951
1952 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1953 res = nvme_trans_status_code(hdr, nvme_sc);
1954 if (res)
1955 goto out_dma;
1956 if (nvme_sc)
1957 res = nvme_sc;
1958
1959 out_dma:
1960 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1961 dma_addr);
1962 out:
1963 return res;
1964 }
1965
1966 /* Read/Write Helper Functions */
1967
1968 static inline void nvme_trans_get_io_cdb6(u8 *cmd,
1969 struct nvme_trans_io_cdb *cdb_info)
1970 {
1971 cdb_info->fua = 0;
1972 cdb_info->prot_info = 0;
1973 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_6_CDB_LBA_OFFSET) &
1974 IO_6_CDB_LBA_MASK;
1975 cdb_info->xfer_len = GET_U8_FROM_CDB(cmd, IO_6_CDB_TX_LEN_OFFSET);
1976
1977 /* sbc3r27 sec 5.32 - TRANSFER LEN of 0 implies a 256 Block transfer */
1978 if (cdb_info->xfer_len == 0)
1979 cdb_info->xfer_len = IO_6_DEFAULT_TX_LEN;
1980 }
1981
1982 static inline void nvme_trans_get_io_cdb10(u8 *cmd,
1983 struct nvme_trans_io_cdb *cdb_info)
1984 {
1985 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_10_CDB_FUA_OFFSET) &
1986 IO_CDB_FUA_MASK;
1987 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_10_CDB_WP_OFFSET) &
1988 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1989 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_10_CDB_LBA_OFFSET);
1990 cdb_info->xfer_len = GET_U16_FROM_CDB(cmd, IO_10_CDB_TX_LEN_OFFSET);
1991 }
1992
1993 static inline void nvme_trans_get_io_cdb12(u8 *cmd,
1994 struct nvme_trans_io_cdb *cdb_info)
1995 {
1996 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_12_CDB_FUA_OFFSET) &
1997 IO_CDB_FUA_MASK;
1998 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_12_CDB_WP_OFFSET) &
1999 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
2000 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_12_CDB_LBA_OFFSET);
2001 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_12_CDB_TX_LEN_OFFSET);
2002 }
2003
2004 static inline void nvme_trans_get_io_cdb16(u8 *cmd,
2005 struct nvme_trans_io_cdb *cdb_info)
2006 {
2007 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_16_CDB_FUA_OFFSET) &
2008 IO_CDB_FUA_MASK;
2009 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_16_CDB_WP_OFFSET) &
2010 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
2011 cdb_info->lba = GET_U64_FROM_CDB(cmd, IO_16_CDB_LBA_OFFSET);
2012 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_16_CDB_TX_LEN_OFFSET);
2013 }
2014
2015 static inline u32 nvme_trans_io_get_num_cmds(struct sg_io_hdr *hdr,
2016 struct nvme_trans_io_cdb *cdb_info,
2017 u32 max_blocks)
2018 {
2019 /* If using iovecs, send one nvme command per vector */
2020 if (hdr->iovec_count > 0)
2021 return hdr->iovec_count;
2022 else if (cdb_info->xfer_len > max_blocks)
2023 return ((cdb_info->xfer_len - 1) / max_blocks) + 1;
2024 else
2025 return 1;
2026 }
2027
2028 static u16 nvme_trans_io_get_control(struct nvme_ns *ns,
2029 struct nvme_trans_io_cdb *cdb_info)
2030 {
2031 u16 control = 0;
2032
2033 /* When Protection information support is added, implement here */
2034
2035 if (cdb_info->fua > 0)
2036 control |= NVME_RW_FUA;
2037
2038 return control;
2039 }
2040
2041 static int nvme_trans_do_nvme_io(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2042 struct nvme_trans_io_cdb *cdb_info, u8 is_write)
2043 {
2044 int res = SNTI_TRANSLATION_SUCCESS;
2045 int nvme_sc;
2046 struct nvme_dev *dev = ns->dev;
2047 u32 num_cmds;
2048 struct nvme_iod *iod;
2049 u64 unit_len;
2050 u64 unit_num_blocks; /* Number of blocks to xfer in each nvme cmd */
2051 u32 retcode;
2052 u32 i = 0;
2053 u64 nvme_offset = 0;
2054 void __user *next_mapping_addr;
2055 struct nvme_command c;
2056 u8 opcode = (is_write ? nvme_cmd_write : nvme_cmd_read);
2057 u16 control;
2058 u32 max_blocks = queue_max_hw_sectors(ns->queue);
2059
2060 num_cmds = nvme_trans_io_get_num_cmds(hdr, cdb_info, max_blocks);
2061
2062 /*
2063 * This loop handles two cases.
2064 * First, when an SGL is used in the form of an iovec list:
2065 * - Use iov_base as the next mapping address for the nvme command_id
2066 * - Use iov_len as the data transfer length for the command.
2067 * Second, when we have a single buffer
2068 * - If larger than max_blocks, split into chunks, offset
2069 * each nvme command accordingly.
2070 */
2071 for (i = 0; i < num_cmds; i++) {
2072 memset(&c, 0, sizeof(c));
2073 if (hdr->iovec_count > 0) {
2074 struct sg_iovec sgl;
2075
2076 retcode = copy_from_user(&sgl, hdr->dxferp +
2077 i * sizeof(struct sg_iovec),
2078 sizeof(struct sg_iovec));
2079 if (retcode)
2080 return -EFAULT;
2081 unit_len = sgl.iov_len;
2082 unit_num_blocks = unit_len >> ns->lba_shift;
2083 next_mapping_addr = sgl.iov_base;
2084 } else {
2085 unit_num_blocks = min((u64)max_blocks,
2086 (cdb_info->xfer_len - nvme_offset));
2087 unit_len = unit_num_blocks << ns->lba_shift;
2088 next_mapping_addr = hdr->dxferp +
2089 ((1 << ns->lba_shift) * nvme_offset);
2090 }
2091
2092 c.rw.opcode = opcode;
2093 c.rw.nsid = cpu_to_le32(ns->ns_id);
2094 c.rw.slba = cpu_to_le64(cdb_info->lba + nvme_offset);
2095 c.rw.length = cpu_to_le16(unit_num_blocks - 1);
2096 control = nvme_trans_io_get_control(ns, cdb_info);
2097 c.rw.control = cpu_to_le16(control);
2098
2099 iod = nvme_map_user_pages(dev,
2100 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2101 (unsigned long)next_mapping_addr, unit_len);
2102 if (IS_ERR(iod)) {
2103 res = PTR_ERR(iod);
2104 goto out;
2105 }
2106 retcode = nvme_setup_prps(dev, iod, unit_len, GFP_KERNEL);
2107 if (retcode != unit_len) {
2108 nvme_unmap_user_pages(dev,
2109 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2110 iod);
2111 nvme_free_iod(dev, iod);
2112 res = -ENOMEM;
2113 goto out;
2114 }
2115 c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
2116 c.rw.prp2 = cpu_to_le64(iod->first_dma);
2117
2118 nvme_offset += unit_num_blocks;
2119
2120 nvme_sc = nvme_submit_io_cmd(dev, ns, &c, NULL);
2121 if (nvme_sc != NVME_SC_SUCCESS) {
2122 nvme_unmap_user_pages(dev,
2123 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2124 iod);
2125 nvme_free_iod(dev, iod);
2126 res = nvme_trans_status_code(hdr, nvme_sc);
2127 goto out;
2128 }
2129 nvme_unmap_user_pages(dev,
2130 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2131 iod);
2132 nvme_free_iod(dev, iod);
2133 }
2134 res = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2135
2136 out:
2137 return res;
2138 }
2139
2140
2141 /* SCSI Command Translation Functions */
2142
2143 static int nvme_trans_io(struct nvme_ns *ns, struct sg_io_hdr *hdr, u8 is_write,
2144 u8 *cmd)
2145 {
2146 int res = SNTI_TRANSLATION_SUCCESS;
2147 struct nvme_trans_io_cdb cdb_info;
2148 u8 opcode = cmd[0];
2149 u64 xfer_bytes;
2150 u64 sum_iov_len = 0;
2151 struct sg_iovec sgl;
2152 int i;
2153 size_t not_copied;
2154
2155 /* Extract Fields from CDB */
2156 switch (opcode) {
2157 case WRITE_6:
2158 case READ_6:
2159 nvme_trans_get_io_cdb6(cmd, &cdb_info);
2160 break;
2161 case WRITE_10:
2162 case READ_10:
2163 nvme_trans_get_io_cdb10(cmd, &cdb_info);
2164 break;
2165 case WRITE_12:
2166 case READ_12:
2167 nvme_trans_get_io_cdb12(cmd, &cdb_info);
2168 break;
2169 case WRITE_16:
2170 case READ_16:
2171 nvme_trans_get_io_cdb16(cmd, &cdb_info);
2172 break;
2173 default:
2174 /* Will never really reach here */
2175 res = SNTI_INTERNAL_ERROR;
2176 goto out;
2177 }
2178
2179 /* Calculate total length of transfer (in bytes) */
2180 if (hdr->iovec_count > 0) {
2181 for (i = 0; i < hdr->iovec_count; i++) {
2182 not_copied = copy_from_user(&sgl, hdr->dxferp +
2183 i * sizeof(struct sg_iovec),
2184 sizeof(struct sg_iovec));
2185 if (not_copied)
2186 return -EFAULT;
2187 sum_iov_len += sgl.iov_len;
2188 /* IO vector sizes should be multiples of block size */
2189 if (sgl.iov_len % (1 << ns->lba_shift) != 0) {
2190 res = nvme_trans_completion(hdr,
2191 SAM_STAT_CHECK_CONDITION,
2192 ILLEGAL_REQUEST,
2193 SCSI_ASC_INVALID_PARAMETER,
2194 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2195 goto out;
2196 }
2197 }
2198 } else {
2199 sum_iov_len = hdr->dxfer_len;
2200 }
2201
2202 /* As Per sg ioctl howto, if the lengths differ, use the lower one */
2203 xfer_bytes = min(((u64)hdr->dxfer_len), sum_iov_len);
2204
2205 /* If block count and actual data buffer size dont match, error out */
2206 if (xfer_bytes != (cdb_info.xfer_len << ns->lba_shift)) {
2207 res = -EINVAL;
2208 goto out;
2209 }
2210
2211 /* Check for 0 length transfer - it is not illegal */
2212 if (cdb_info.xfer_len == 0)
2213 goto out;
2214
2215 /* Send NVMe IO Command(s) */
2216 res = nvme_trans_do_nvme_io(ns, hdr, &cdb_info, is_write);
2217 if (res != SNTI_TRANSLATION_SUCCESS)
2218 goto out;
2219
2220 out:
2221 return res;
2222 }
2223
2224 static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2225 u8 *cmd)
2226 {
2227 int res = SNTI_TRANSLATION_SUCCESS;
2228 u8 evpd;
2229 u8 page_code;
2230 int alloc_len;
2231 u8 *inq_response;
2232
2233 evpd = GET_INQ_EVPD_BIT(cmd);
2234 page_code = GET_INQ_PAGE_CODE(cmd);
2235 alloc_len = GET_INQ_ALLOC_LENGTH(cmd);
2236
2237 inq_response = kmalloc(alloc_len, GFP_KERNEL);
2238 if (inq_response == NULL) {
2239 res = -ENOMEM;
2240 goto out_mem;
2241 }
2242
2243 if (evpd == 0) {
2244 if (page_code == INQ_STANDARD_INQUIRY_PAGE) {
2245 res = nvme_trans_standard_inquiry_page(ns, hdr,
2246 inq_response, alloc_len);
2247 } else {
2248 res = nvme_trans_completion(hdr,
2249 SAM_STAT_CHECK_CONDITION,
2250 ILLEGAL_REQUEST,
2251 SCSI_ASC_INVALID_CDB,
2252 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2253 }
2254 } else {
2255 switch (page_code) {
2256 case VPD_SUPPORTED_PAGES:
2257 res = nvme_trans_supported_vpd_pages(ns, hdr,
2258 inq_response, alloc_len);
2259 break;
2260 case VPD_SERIAL_NUMBER:
2261 res = nvme_trans_unit_serial_page(ns, hdr, inq_response,
2262 alloc_len);
2263 break;
2264 case VPD_DEVICE_IDENTIFIERS:
2265 res = nvme_trans_device_id_page(ns, hdr, inq_response,
2266 alloc_len);
2267 break;
2268 case VPD_EXTENDED_INQUIRY:
2269 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
2270 break;
2271 case VPD_BLOCK_DEV_CHARACTERISTICS:
2272 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
2273 break;
2274 default:
2275 res = nvme_trans_completion(hdr,
2276 SAM_STAT_CHECK_CONDITION,
2277 ILLEGAL_REQUEST,
2278 SCSI_ASC_INVALID_CDB,
2279 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2280 break;
2281 }
2282 }
2283 kfree(inq_response);
2284 out_mem:
2285 return res;
2286 }
2287
2288 static int nvme_trans_log_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2289 u8 *cmd)
2290 {
2291 int res = SNTI_TRANSLATION_SUCCESS;
2292 u16 alloc_len;
2293 u8 sp;
2294 u8 pc;
2295 u8 page_code;
2296
2297 sp = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_SP_OFFSET);
2298 if (sp != LOG_SENSE_CDB_SP_NOT_ENABLED) {
2299 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2300 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2301 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2302 goto out;
2303 }
2304 pc = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_PC_OFFSET);
2305 page_code = pc & LOG_SENSE_CDB_PAGE_CODE_MASK;
2306 pc = (pc & LOG_SENSE_CDB_PC_MASK) >> LOG_SENSE_CDB_PC_SHIFT;
2307 if (pc != LOG_SENSE_CDB_PC_CUMULATIVE_VALUES) {
2308 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2309 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2310 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2311 goto out;
2312 }
2313 alloc_len = GET_U16_FROM_CDB(cmd, LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET);
2314 switch (page_code) {
2315 case LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE:
2316 res = nvme_trans_log_supp_pages(ns, hdr, alloc_len);
2317 break;
2318 case LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE:
2319 res = nvme_trans_log_info_exceptions(ns, hdr, alloc_len);
2320 break;
2321 case LOG_PAGE_TEMPERATURE_PAGE:
2322 res = nvme_trans_log_temperature(ns, hdr, alloc_len);
2323 break;
2324 default:
2325 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2326 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2327 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2328 break;
2329 }
2330
2331 out:
2332 return res;
2333 }
2334
2335 static int nvme_trans_mode_select(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2336 u8 *cmd)
2337 {
2338 int res = SNTI_TRANSLATION_SUCCESS;
2339 u8 cdb10 = 0;
2340 u16 parm_list_len;
2341 u8 page_format;
2342 u8 save_pages;
2343
2344 page_format = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_PAGE_FORMAT_OFFSET);
2345 page_format &= MODE_SELECT_CDB_PAGE_FORMAT_MASK;
2346
2347 save_pages = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_SAVE_PAGES_OFFSET);
2348 save_pages &= MODE_SELECT_CDB_SAVE_PAGES_MASK;
2349
2350 if (GET_OPCODE(cmd) == MODE_SELECT) {
2351 parm_list_len = GET_U8_FROM_CDB(cmd,
2352 MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET);
2353 } else {
2354 parm_list_len = GET_U16_FROM_CDB(cmd,
2355 MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET);
2356 cdb10 = 1;
2357 }
2358
2359 if (parm_list_len != 0) {
2360 /*
2361 * According to SPC-4 r24, a paramter list length field of 0
2362 * shall not be considered an error
2363 */
2364 res = nvme_trans_modesel_data(ns, hdr, cmd, parm_list_len,
2365 page_format, save_pages, cdb10);
2366 }
2367
2368 return res;
2369 }
2370
2371 static int nvme_trans_mode_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2372 u8 *cmd)
2373 {
2374 int res = SNTI_TRANSLATION_SUCCESS;
2375 u16 alloc_len;
2376 u8 cdb10 = 0;
2377 u8 page_code;
2378 u8 pc;
2379
2380 if (GET_OPCODE(cmd) == MODE_SENSE) {
2381 alloc_len = GET_U8_FROM_CDB(cmd, MODE_SENSE6_ALLOC_LEN_OFFSET);
2382 } else {
2383 alloc_len = GET_U16_FROM_CDB(cmd,
2384 MODE_SENSE10_ALLOC_LEN_OFFSET);
2385 cdb10 = 1;
2386 }
2387
2388 pc = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CONTROL_OFFSET) &
2389 MODE_SENSE_PAGE_CONTROL_MASK;
2390 if (pc != MODE_SENSE_PC_CURRENT_VALUES) {
2391 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2392 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2393 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2394 goto out;
2395 }
2396
2397 page_code = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CODE_OFFSET) &
2398 MODE_SENSE_PAGE_CODE_MASK;
2399 switch (page_code) {
2400 case MODE_PAGE_CACHING:
2401 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2402 cdb10,
2403 &nvme_trans_fill_caching_page,
2404 MODE_PAGE_CACHING_LEN);
2405 break;
2406 case MODE_PAGE_CONTROL:
2407 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2408 cdb10,
2409 &nvme_trans_fill_control_page,
2410 MODE_PAGE_CONTROL_LEN);
2411 break;
2412 case MODE_PAGE_POWER_CONDITION:
2413 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2414 cdb10,
2415 &nvme_trans_fill_pow_cnd_page,
2416 MODE_PAGE_POW_CND_LEN);
2417 break;
2418 case MODE_PAGE_INFO_EXCEP:
2419 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2420 cdb10,
2421 &nvme_trans_fill_inf_exc_page,
2422 MODE_PAGE_INF_EXC_LEN);
2423 break;
2424 case MODE_PAGE_RETURN_ALL:
2425 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2426 cdb10,
2427 &nvme_trans_fill_all_pages,
2428 MODE_PAGE_ALL_LEN);
2429 break;
2430 default:
2431 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2432 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2433 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2434 break;
2435 }
2436
2437 out:
2438 return res;
2439 }
2440
2441 static int nvme_trans_read_capacity(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2442 u8 *cmd)
2443 {
2444 int res = SNTI_TRANSLATION_SUCCESS;
2445 int nvme_sc;
2446 u32 alloc_len = READ_CAP_10_RESP_SIZE;
2447 u32 resp_size = READ_CAP_10_RESP_SIZE;
2448 u32 xfer_len;
2449 u8 cdb16;
2450 struct nvme_dev *dev = ns->dev;
2451 dma_addr_t dma_addr;
2452 void *mem;
2453 struct nvme_id_ns *id_ns;
2454 u8 *response;
2455
2456 cdb16 = IS_READ_CAP_16(cmd);
2457 if (cdb16) {
2458 alloc_len = GET_READ_CAP_16_ALLOC_LENGTH(cmd);
2459 resp_size = READ_CAP_16_RESP_SIZE;
2460 }
2461
2462 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
2463 &dma_addr, GFP_KERNEL);
2464 if (mem == NULL) {
2465 res = -ENOMEM;
2466 goto out;
2467 }
2468 /* nvme ns identify */
2469 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
2470 res = nvme_trans_status_code(hdr, nvme_sc);
2471 if (res)
2472 goto out_dma;
2473 if (nvme_sc) {
2474 res = nvme_sc;
2475 goto out_dma;
2476 }
2477 id_ns = mem;
2478
2479 response = kzalloc(resp_size, GFP_KERNEL);
2480 if (response == NULL) {
2481 res = -ENOMEM;
2482 goto out_dma;
2483 }
2484 nvme_trans_fill_read_cap(response, id_ns, cdb16);
2485
2486 xfer_len = min(alloc_len, resp_size);
2487 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2488
2489 kfree(response);
2490 out_dma:
2491 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
2492 dma_addr);
2493 out:
2494 return res;
2495 }
2496
2497 static int nvme_trans_report_luns(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2498 u8 *cmd)
2499 {
2500 int res = SNTI_TRANSLATION_SUCCESS;
2501 int nvme_sc;
2502 u32 alloc_len, xfer_len, resp_size;
2503 u8 select_report;
2504 u8 *response;
2505 struct nvme_dev *dev = ns->dev;
2506 dma_addr_t dma_addr;
2507 void *mem;
2508 struct nvme_id_ctrl *id_ctrl;
2509 u32 ll_length, lun_id;
2510 u8 lun_id_offset = REPORT_LUNS_FIRST_LUN_OFFSET;
2511 __be32 tmp_len;
2512
2513 alloc_len = GET_REPORT_LUNS_ALLOC_LENGTH(cmd);
2514 select_report = GET_U8_FROM_CDB(cmd, REPORT_LUNS_SR_OFFSET);
2515
2516 if ((select_report != ALL_LUNS_RETURNED) &&
2517 (select_report != ALL_WELL_KNOWN_LUNS_RETURNED) &&
2518 (select_report != RESTRICTED_LUNS_RETURNED)) {
2519 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2520 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2521 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2522 goto out;
2523 } else {
2524 /* NVMe Controller Identify */
2525 mem = dma_alloc_coherent(&dev->pci_dev->dev,
2526 sizeof(struct nvme_id_ctrl),
2527 &dma_addr, GFP_KERNEL);
2528 if (mem == NULL) {
2529 res = -ENOMEM;
2530 goto out;
2531 }
2532 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
2533 res = nvme_trans_status_code(hdr, nvme_sc);
2534 if (res)
2535 goto out_dma;
2536 if (nvme_sc) {
2537 res = nvme_sc;
2538 goto out_dma;
2539 }
2540 id_ctrl = mem;
2541 ll_length = le32_to_cpu(id_ctrl->nn) * LUN_ENTRY_SIZE;
2542 resp_size = ll_length + LUN_DATA_HEADER_SIZE;
2543
2544 if (alloc_len < resp_size) {
2545 res = nvme_trans_completion(hdr,
2546 SAM_STAT_CHECK_CONDITION,
2547 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2548 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2549 goto out_dma;
2550 }
2551
2552 response = kzalloc(resp_size, GFP_KERNEL);
2553 if (response == NULL) {
2554 res = -ENOMEM;
2555 goto out_dma;
2556 }
2557
2558 /* The first LUN ID will always be 0 per the SAM spec */
2559 for (lun_id = 0; lun_id < le32_to_cpu(id_ctrl->nn); lun_id++) {
2560 /*
2561 * Set the LUN Id and then increment to the next LUN
2562 * location in the parameter data.
2563 */
2564 __be64 tmp_id = cpu_to_be64(lun_id);
2565 memcpy(&response[lun_id_offset], &tmp_id, sizeof(u64));
2566 lun_id_offset += LUN_ENTRY_SIZE;
2567 }
2568 tmp_len = cpu_to_be32(ll_length);
2569 memcpy(response, &tmp_len, sizeof(u32));
2570 }
2571
2572 xfer_len = min(alloc_len, resp_size);
2573 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2574
2575 kfree(response);
2576 out_dma:
2577 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
2578 dma_addr);
2579 out:
2580 return res;
2581 }
2582
2583 static int nvme_trans_request_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2584 u8 *cmd)
2585 {
2586 int res = SNTI_TRANSLATION_SUCCESS;
2587 u8 alloc_len, xfer_len, resp_size;
2588 u8 desc_format;
2589 u8 *response;
2590
2591 alloc_len = GET_REQUEST_SENSE_ALLOC_LENGTH(cmd);
2592 desc_format = GET_U8_FROM_CDB(cmd, REQUEST_SENSE_DESC_OFFSET);
2593 desc_format &= REQUEST_SENSE_DESC_MASK;
2594
2595 resp_size = ((desc_format) ? (DESC_FMT_SENSE_DATA_SIZE) :
2596 (FIXED_FMT_SENSE_DATA_SIZE));
2597 response = kzalloc(resp_size, GFP_KERNEL);
2598 if (response == NULL) {
2599 res = -ENOMEM;
2600 goto out;
2601 }
2602
2603 if (desc_format == DESCRIPTOR_FORMAT_SENSE_DATA_TYPE) {
2604 /* Descriptor Format Sense Data */
2605 response[0] = DESC_FORMAT_SENSE_DATA;
2606 response[1] = NO_SENSE;
2607 /* TODO How is LOW POWER CONDITION ON handled? (byte 2) */
2608 response[2] = SCSI_ASC_NO_SENSE;
2609 response[3] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2610 /* SDAT_OVFL = 0 | Additional Sense Length = 0 */
2611 } else {
2612 /* Fixed Format Sense Data */
2613 response[0] = FIXED_SENSE_DATA;
2614 /* Byte 1 = Obsolete */
2615 response[2] = NO_SENSE; /* FM, EOM, ILI, SDAT_OVFL = 0 */
2616 /* Bytes 3-6 - Information - set to zero */
2617 response[7] = FIXED_SENSE_DATA_ADD_LENGTH;
2618 /* Bytes 8-11 - Cmd Specific Information - set to zero */
2619 response[12] = SCSI_ASC_NO_SENSE;
2620 response[13] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2621 /* Byte 14 = Field Replaceable Unit Code = 0 */
2622 /* Bytes 15-17 - SKSV=0; Sense Key Specific = 0 */
2623 }
2624
2625 xfer_len = min(alloc_len, resp_size);
2626 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2627
2628 kfree(response);
2629 out:
2630 return res;
2631 }
2632
2633 static int nvme_trans_security_protocol(struct nvme_ns *ns,
2634 struct sg_io_hdr *hdr,
2635 u8 *cmd)
2636 {
2637 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2638 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2639 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2640 }
2641
2642 static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2643 u8 *cmd)
2644 {
2645 int res = SNTI_TRANSLATION_SUCCESS;
2646 int nvme_sc;
2647 struct nvme_command c;
2648 u8 immed, pcmod, pc, no_flush, start;
2649
2650 immed = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_IMMED_OFFSET);
2651 pcmod = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET);
2652 pc = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_OFFSET);
2653 no_flush = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_NO_FLUSH_OFFSET);
2654 start = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_START_OFFSET);
2655
2656 immed &= START_STOP_UNIT_CDB_IMMED_MASK;
2657 pcmod &= START_STOP_UNIT_CDB_POWER_COND_MOD_MASK;
2658 pc = (pc & START_STOP_UNIT_CDB_POWER_COND_MASK) >> NIBBLE_SHIFT;
2659 no_flush &= START_STOP_UNIT_CDB_NO_FLUSH_MASK;
2660 start &= START_STOP_UNIT_CDB_START_MASK;
2661
2662 if (immed != 0) {
2663 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2664 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2665 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2666 } else {
2667 if (no_flush == 0) {
2668 /* Issue NVME FLUSH command prior to START STOP UNIT */
2669 memset(&c, 0, sizeof(c));
2670 c.common.opcode = nvme_cmd_flush;
2671 c.common.nsid = cpu_to_le32(ns->ns_id);
2672
2673 nvme_sc = nvme_submit_io_cmd(ns->dev, ns, &c, NULL);
2674 res = nvme_trans_status_code(hdr, nvme_sc);
2675 if (res)
2676 goto out;
2677 if (nvme_sc) {
2678 res = nvme_sc;
2679 goto out;
2680 }
2681 }
2682 /* Setup the expected power state transition */
2683 res = nvme_trans_power_state(ns, hdr, pc, pcmod, start);
2684 }
2685
2686 out:
2687 return res;
2688 }
2689
2690 static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
2691 struct sg_io_hdr *hdr, u8 *cmd)
2692 {
2693 int res = SNTI_TRANSLATION_SUCCESS;
2694 int nvme_sc;
2695 struct nvme_command c;
2696
2697 memset(&c, 0, sizeof(c));
2698 c.common.opcode = nvme_cmd_flush;
2699 c.common.nsid = cpu_to_le32(ns->ns_id);
2700
2701 nvme_sc = nvme_submit_io_cmd(ns->dev, ns, &c, NULL);
2702
2703 res = nvme_trans_status_code(hdr, nvme_sc);
2704 if (res)
2705 goto out;
2706 if (nvme_sc)
2707 res = nvme_sc;
2708
2709 out:
2710 return res;
2711 }
2712
2713 static int nvme_trans_format_unit(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2714 u8 *cmd)
2715 {
2716 int res = SNTI_TRANSLATION_SUCCESS;
2717 u8 parm_hdr_len = 0;
2718 u8 nvme_pf_code = 0;
2719 u8 format_prot_info, long_list, format_data;
2720
2721 format_prot_info = GET_U8_FROM_CDB(cmd,
2722 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET);
2723 long_list = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_LONG_LIST_OFFSET);
2724 format_data = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET);
2725
2726 format_prot_info = (format_prot_info &
2727 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK) >>
2728 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT;
2729 long_list &= FORMAT_UNIT_CDB_LONG_LIST_MASK;
2730 format_data &= FORMAT_UNIT_CDB_FORMAT_DATA_MASK;
2731
2732 if (format_data != 0) {
2733 if (format_prot_info != 0) {
2734 if (long_list == 0)
2735 parm_hdr_len = FORMAT_UNIT_SHORT_PARM_LIST_LEN;
2736 else
2737 parm_hdr_len = FORMAT_UNIT_LONG_PARM_LIST_LEN;
2738 }
2739 } else if (format_data == 0 && format_prot_info != 0) {
2740 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2741 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2742 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2743 goto out;
2744 }
2745
2746 /* Get parm header from data-in/out buffer */
2747 /*
2748 * According to the translation spec, the only fields in the parameter
2749 * list we are concerned with are in the header. So allocate only that.
2750 */
2751 if (parm_hdr_len > 0) {
2752 res = nvme_trans_fmt_get_parm_header(hdr, parm_hdr_len,
2753 format_prot_info, &nvme_pf_code);
2754 if (res != SNTI_TRANSLATION_SUCCESS)
2755 goto out;
2756 }
2757
2758 /* Attempt to activate any previously downloaded firmware image */
2759 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw, 0, 0, 0);
2760
2761 /* Determine Block size and count and send format command */
2762 res = nvme_trans_fmt_set_blk_size_count(ns, hdr);
2763 if (res != SNTI_TRANSLATION_SUCCESS)
2764 goto out;
2765
2766 res = nvme_trans_fmt_send_cmd(ns, hdr, nvme_pf_code);
2767
2768 out:
2769 return res;
2770 }
2771
2772 static int nvme_trans_test_unit_ready(struct nvme_ns *ns,
2773 struct sg_io_hdr *hdr,
2774 u8 *cmd)
2775 {
2776 int res = SNTI_TRANSLATION_SUCCESS;
2777 struct nvme_dev *dev = ns->dev;
2778
2779 if (!(readl(&dev->bar->csts) & NVME_CSTS_RDY))
2780 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2781 NOT_READY, SCSI_ASC_LUN_NOT_READY,
2782 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2783 else
2784 res = nvme_trans_completion(hdr, SAM_STAT_GOOD, NO_SENSE, 0, 0);
2785
2786 return res;
2787 }
2788
2789 static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2790 u8 *cmd)
2791 {
2792 int res = SNTI_TRANSLATION_SUCCESS;
2793 u32 buffer_offset, parm_list_length;
2794 u8 buffer_id, mode;
2795
2796 parm_list_length =
2797 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET);
2798 if (parm_list_length % BYTES_TO_DWORDS != 0) {
2799 /* NVMe expects Firmware file to be a whole number of DWORDS */
2800 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2801 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2802 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2803 goto out;
2804 }
2805 buffer_id = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_ID_OFFSET);
2806 if (buffer_id > NVME_MAX_FIRMWARE_SLOT) {
2807 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2808 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2809 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2810 goto out;
2811 }
2812 mode = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_MODE_OFFSET) &
2813 WRITE_BUFFER_CDB_MODE_MASK;
2814 buffer_offset =
2815 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET);
2816
2817 switch (mode) {
2818 case DOWNLOAD_SAVE_ACTIVATE:
2819 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2820 parm_list_length, buffer_offset,
2821 buffer_id);
2822 if (res != SNTI_TRANSLATION_SUCCESS)
2823 goto out;
2824 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2825 parm_list_length, buffer_offset,
2826 buffer_id);
2827 break;
2828 case DOWNLOAD_SAVE_DEFER_ACTIVATE:
2829 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2830 parm_list_length, buffer_offset,
2831 buffer_id);
2832 break;
2833 case ACTIVATE_DEFERRED_MICROCODE:
2834 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2835 parm_list_length, buffer_offset,
2836 buffer_id);
2837 break;
2838 default:
2839 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2840 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2841 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2842 break;
2843 }
2844
2845 out:
2846 return res;
2847 }
2848
2849 struct scsi_unmap_blk_desc {
2850 __be64 slba;
2851 __be32 nlb;
2852 u32 resv;
2853 };
2854
2855 struct scsi_unmap_parm_list {
2856 __be16 unmap_data_len;
2857 __be16 unmap_blk_desc_data_len;
2858 u32 resv;
2859 struct scsi_unmap_blk_desc desc[0];
2860 };
2861
2862 static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2863 u8 *cmd)
2864 {
2865 struct nvme_dev *dev = ns->dev;
2866 struct scsi_unmap_parm_list *plist;
2867 struct nvme_dsm_range *range;
2868 struct nvme_command c;
2869 int i, nvme_sc, res = -ENOMEM;
2870 u16 ndesc, list_len;
2871 dma_addr_t dma_addr;
2872
2873 list_len = GET_U16_FROM_CDB(cmd, UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET);
2874 if (!list_len)
2875 return -EINVAL;
2876
2877 plist = kmalloc(list_len, GFP_KERNEL);
2878 if (!plist)
2879 return -ENOMEM;
2880
2881 res = nvme_trans_copy_from_user(hdr, plist, list_len);
2882 if (res != SNTI_TRANSLATION_SUCCESS)
2883 goto out;
2884
2885 ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
2886 if (!ndesc || ndesc > 256) {
2887 res = -EINVAL;
2888 goto out;
2889 }
2890
2891 range = dma_alloc_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2892 &dma_addr, GFP_KERNEL);
2893 if (!range)
2894 goto out;
2895
2896 for (i = 0; i < ndesc; i++) {
2897 range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
2898 range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
2899 range[i].cattr = 0;
2900 }
2901
2902 memset(&c, 0, sizeof(c));
2903 c.dsm.opcode = nvme_cmd_dsm;
2904 c.dsm.nsid = cpu_to_le32(ns->ns_id);
2905 c.dsm.prp1 = cpu_to_le64(dma_addr);
2906 c.dsm.nr = cpu_to_le32(ndesc - 1);
2907 c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
2908
2909 nvme_sc = nvme_submit_io_cmd(dev, ns, &c, NULL);
2910 res = nvme_trans_status_code(hdr, nvme_sc);
2911
2912 dma_free_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2913 range, dma_addr);
2914 out:
2915 kfree(plist);
2916 return res;
2917 }
2918
2919 static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
2920 {
2921 u8 cmd[BLK_MAX_CDB];
2922 int retcode;
2923 unsigned int opcode;
2924
2925 if (hdr->cmdp == NULL)
2926 return -EMSGSIZE;
2927 if (copy_from_user(cmd, hdr->cmdp, hdr->cmd_len))
2928 return -EFAULT;
2929
2930 /*
2931 * Prime the hdr with good status for scsi commands that don't require
2932 * an nvme command for translation.
2933 */
2934 retcode = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2935 if (retcode)
2936 return retcode;
2937
2938 opcode = cmd[0];
2939
2940 switch (opcode) {
2941 case READ_6:
2942 case READ_10:
2943 case READ_12:
2944 case READ_16:
2945 retcode = nvme_trans_io(ns, hdr, 0, cmd);
2946 break;
2947 case WRITE_6:
2948 case WRITE_10:
2949 case WRITE_12:
2950 case WRITE_16:
2951 retcode = nvme_trans_io(ns, hdr, 1, cmd);
2952 break;
2953 case INQUIRY:
2954 retcode = nvme_trans_inquiry(ns, hdr, cmd);
2955 break;
2956 case LOG_SENSE:
2957 retcode = nvme_trans_log_sense(ns, hdr, cmd);
2958 break;
2959 case MODE_SELECT:
2960 case MODE_SELECT_10:
2961 retcode = nvme_trans_mode_select(ns, hdr, cmd);
2962 break;
2963 case MODE_SENSE:
2964 case MODE_SENSE_10:
2965 retcode = nvme_trans_mode_sense(ns, hdr, cmd);
2966 break;
2967 case READ_CAPACITY:
2968 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2969 break;
2970 case SERVICE_ACTION_IN_16:
2971 if (IS_READ_CAP_16(cmd))
2972 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2973 else
2974 goto out;
2975 break;
2976 case REPORT_LUNS:
2977 retcode = nvme_trans_report_luns(ns, hdr, cmd);
2978 break;
2979 case REQUEST_SENSE:
2980 retcode = nvme_trans_request_sense(ns, hdr, cmd);
2981 break;
2982 case SECURITY_PROTOCOL_IN:
2983 case SECURITY_PROTOCOL_OUT:
2984 retcode = nvme_trans_security_protocol(ns, hdr, cmd);
2985 break;
2986 case START_STOP:
2987 retcode = nvme_trans_start_stop(ns, hdr, cmd);
2988 break;
2989 case SYNCHRONIZE_CACHE:
2990 retcode = nvme_trans_synchronize_cache(ns, hdr, cmd);
2991 break;
2992 case FORMAT_UNIT:
2993 retcode = nvme_trans_format_unit(ns, hdr, cmd);
2994 break;
2995 case TEST_UNIT_READY:
2996 retcode = nvme_trans_test_unit_ready(ns, hdr, cmd);
2997 break;
2998 case WRITE_BUFFER:
2999 retcode = nvme_trans_write_buffer(ns, hdr, cmd);
3000 break;
3001 case UNMAP:
3002 retcode = nvme_trans_unmap(ns, hdr, cmd);
3003 break;
3004 default:
3005 out:
3006 retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
3007 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
3008 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
3009 break;
3010 }
3011 return retcode;
3012 }
3013
3014 int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr)
3015 {
3016 struct sg_io_hdr hdr;
3017 int retcode;
3018
3019 if (!capable(CAP_SYS_ADMIN))
3020 return -EACCES;
3021 if (copy_from_user(&hdr, u_hdr, sizeof(hdr)))
3022 return -EFAULT;
3023 if (hdr.interface_id != 'S')
3024 return -EINVAL;
3025 if (hdr.cmd_len > BLK_MAX_CDB)
3026 return -EINVAL;
3027
3028 retcode = nvme_scsi_translate(ns, &hdr);
3029 if (retcode < 0)
3030 return retcode;
3031 if (retcode > 0)
3032 retcode = SNTI_TRANSLATION_SUCCESS;
3033 if (copy_to_user(u_hdr, &hdr, sizeof(sg_io_hdr_t)) > 0)
3034 return -EFAULT;
3035
3036 return retcode;
3037 }
3038
3039 int nvme_sg_get_version_num(int __user *ip)
3040 {
3041 return put_user(sg_version_num, ip);
3042 }
Linux kernel - Deliverables
This page took 0.129976 seconds and 5 git commands to generate.