2 * sx8.c: Driver for Promise SATA SX8 looks-like-I2O hardware
4 * Copyright 2004-2005 Red Hat, Inc.
6 * Author/maintainer: Jeff Garzik <jgarzik@pobox.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/pci.h>
17 #include <linux/slab.h>
18 #include <linux/spinlock.h>
19 #include <linux/blkdev.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/compiler.h>
23 #include <linux/workqueue.h>
24 #include <linux/bitops.h>
25 #include <linux/delay.h>
26 #include <linux/time.h>
27 #include <linux/hdreg.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/completion.h>
30 #include <linux/scatterlist.h>
32 #include <asm/uaccess.h>
36 #define CARM_VERBOSE_DEBUG
39 #undef CARM_VERBOSE_DEBUG
43 #define DRV_NAME "sx8"
44 #define DRV_VERSION "1.0"
45 #define PFX DRV_NAME ": "
47 MODULE_AUTHOR("Jeff Garzik");
48 MODULE_LICENSE("GPL");
49 MODULE_DESCRIPTION("Promise SATA SX8 block driver");
50 MODULE_VERSION(DRV_VERSION
);
53 * SX8 hardware has a single message queue for all ATA ports.
54 * When this driver was written, the hardware (firmware?) would
55 * corrupt data eventually, if more than one request was outstanding.
56 * As one can imagine, having 8 ports bottlenecking on a single
57 * command hurts performance.
59 * Based on user reports, later versions of the hardware (firmware?)
60 * seem to be able to survive with more than one command queued.
62 * Therefore, we default to the safe option -- 1 command -- but
63 * allow the user to increase this.
65 * SX8 should be able to support up to ~60 queued commands (CARM_MAX_REQ),
66 * but problems seem to occur when you exceed ~30, even on newer hardware.
68 static int max_queue
= 1;
69 module_param(max_queue
, int, 0444);
70 MODULE_PARM_DESC(max_queue
, "Maximum number of queued commands. (min==1, max==30, safe==1)");
73 #define NEXT_RESP(idx) ((idx + 1) % RMSG_Q_LEN)
75 /* 0xf is just arbitrary, non-zero noise; this is sorta like poisoning */
76 #define TAG_ENCODE(tag) (((tag) << 16) | 0xf)
77 #define TAG_DECODE(tag) (((tag) >> 16) & 0x1f)
78 #define TAG_VALID(tag) ((((tag) & 0xf) == 0xf) && (TAG_DECODE(tag) < 32))
80 /* note: prints function name for you */
82 #define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
83 #ifdef CARM_VERBOSE_DEBUG
84 #define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
86 #define VPRINTK(fmt, args...)
87 #endif /* CARM_VERBOSE_DEBUG */
89 #define DPRINTK(fmt, args...)
90 #define VPRINTK(fmt, args...)
91 #endif /* CARM_DEBUG */
96 #define assert(expr) \
97 if(unlikely(!(expr))) { \
98 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
99 #expr, __FILE__, __func__, __LINE__); \
103 /* defines only for the constants which don't work well as enums */
107 /* adapter-wide limits */
109 CARM_SHM_SIZE
= (4096 << 7),
110 CARM_MINORS_PER_MAJOR
= 256 / CARM_MAX_PORTS
,
111 CARM_MAX_WAIT_Q
= CARM_MAX_PORTS
+ 1,
113 /* command message queue limits */
114 CARM_MAX_REQ
= 64, /* max command msgs per host */
115 CARM_MSG_LOW_WATER
= (CARM_MAX_REQ
/ 4), /* refill mark */
117 /* S/G limits, host-wide and per-request */
118 CARM_MAX_REQ_SG
= 32, /* max s/g entries per request */
119 CARM_MAX_HOST_SG
= 600, /* max s/g entries per host */
120 CARM_SG_LOW_WATER
= (CARM_MAX_HOST_SG
/ 4), /* re-fill mark */
122 /* hardware registers */
124 CARM_INT_STAT
= 0x10, /* interrupt status */
125 CARM_INT_MASK
= 0x14, /* interrupt mask */
126 CARM_HMUC
= 0x18, /* host message unit control */
127 RBUF_ADDR_LO
= 0x20, /* response msg DMA buf low 32 bits */
128 RBUF_ADDR_HI
= 0x24, /* response msg DMA buf high 32 bits */
130 CARM_RESP_IDX
= 0x2c,
131 CARM_CMS0
= 0x30, /* command message size reg 0 */
136 /* bits in CARM_INT_{STAT,MASK} */
137 INT_RESERVED
= 0xfffffff0,
138 INT_WATCHDOG
= (1 << 3), /* watchdog timer */
139 INT_Q_OVERFLOW
= (1 << 2), /* cmd msg q overflow */
140 INT_Q_AVAILABLE
= (1 << 1), /* cmd msg q has free space */
141 INT_RESPONSE
= (1 << 0), /* response msg available */
142 INT_ACK_MASK
= INT_WATCHDOG
| INT_Q_OVERFLOW
,
143 INT_DEF_MASK
= INT_RESERVED
| INT_Q_OVERFLOW
|
146 /* command messages, and related register bits */
147 CARM_HAVE_RESP
= 0x01,
151 CARM_MSG_GET_CAPACITY
= 4,
158 CARM_WZBC
= (1 << 0),
160 CARM_Q_FULL
= (1 << 3),
164 /* CARM_MSG_IOCTL messages */
165 CARM_IOC_SCAN_CHAN
= 5, /* scan channels for devices */
166 CARM_IOC_GET_TCQ
= 13, /* get tcq/ncq depth */
167 CARM_IOC_SET_TCQ
= 14, /* set tcq/ncq depth */
169 IOC_SCAN_CHAN_NODEV
= 0x1f,
170 IOC_SCAN_CHAN_OFFSET
= 0x40,
172 /* CARM_MSG_ARRAY messages */
175 ARRAY_NO_EXIST
= (1 << 31),
177 /* response messages */
178 RMSG_SZ
= 8, /* sizeof(struct carm_response) */
179 RMSG_Q_LEN
= 48, /* resp. msg list length */
180 RMSG_OK
= 1, /* bit indicating msg was successful */
181 /* length of entire resp. msg buffer */
182 RBUF_LEN
= RMSG_SZ
* RMSG_Q_LEN
,
184 PDC_SHM_SIZE
= (4096 << 7), /* length of entire h/w buffer */
186 /* CARM_MSG_MISC messages */
191 /* MISC_GET_FW_VER feature bits */
192 FW_VER_4PORT
= (1 << 2), /* 1=4 ports, 0=8 ports */
193 FW_VER_NON_RAID
= (1 << 1), /* 1=non-RAID firmware, 0=RAID */
194 FW_VER_ZCR
= (1 << 0), /* zero channel RAID (whatever that is) */
196 /* carm_host flags */
197 FL_NON_RAID
= FW_VER_NON_RAID
,
198 FL_4PORT
= FW_VER_4PORT
,
199 FL_FW_VER_MASK
= (FW_VER_NON_RAID
| FW_VER_4PORT
),
201 FL_DYN_MAJOR
= (1 << 17),
205 CARM_SG_BOUNDARY
= 0xffffUL
, /* s/g segment boundary */
208 enum scatter_gather_types
{
214 HST_INVALID
, /* invalid state; never used */
215 HST_ALLOC_BUF
, /* setting up master SHM area */
216 HST_ERROR
, /* we never leave here */
217 HST_PORT_SCAN
, /* start dev scan */
218 HST_DEV_SCAN_START
, /* start per-device probe */
219 HST_DEV_SCAN
, /* continue per-device probe */
220 HST_DEV_ACTIVATE
, /* activate devices we found */
221 HST_PROBE_FINISHED
, /* probe is complete */
222 HST_PROBE_START
, /* initiate probe */
223 HST_SYNC_TIME
, /* tell firmware what time it is */
224 HST_GET_FW_VER
, /* get firmware version, adapter port cnt */
228 static const char *state_name
[] = {
233 "HST_DEV_SCAN_START",
236 "HST_PROBE_FINISHED",
244 unsigned int port_no
;
245 struct gendisk
*disk
;
246 struct carm_host
*host
;
248 /* attached device characteristics */
256 struct carm_request
{
259 unsigned int msg_type
;
260 unsigned int msg_subtype
;
261 unsigned int msg_bucket
;
263 struct carm_port
*port
;
264 struct scatterlist sg
[CARM_MAX_REQ_SG
];
278 struct pci_dev
*pdev
;
282 struct request_queue
*oob_q
;
285 unsigned int hw_sg_used
;
287 unsigned int resp_idx
;
289 unsigned int wait_q_prod
;
290 unsigned int wait_q_cons
;
291 struct request_queue
*wait_q
[CARM_MAX_WAIT_Q
];
295 struct carm_request req
[CARM_MAX_REQ
];
300 unsigned long dev_active
;
301 unsigned long dev_present
;
302 struct carm_port port
[CARM_MAX_PORTS
];
304 struct work_struct fsm_task
;
306 struct completion probe_comp
;
309 struct carm_response
{
312 } __attribute__((packed
));
317 } __attribute__((packed
));
328 struct carm_msg_sg sg
[32];
329 } __attribute__((packed
));
331 struct carm_msg_allocbuf
{
345 struct carm_msg_sg sg
[8];
346 } __attribute__((packed
));
348 struct carm_msg_ioctl
{
356 } __attribute__((packed
));
358 struct carm_msg_sync_time
{
365 } __attribute__((packed
));
367 struct carm_msg_get_fw_ver
{
374 } __attribute__((packed
));
381 } __attribute__((packed
));
383 struct carm_array_info
{
391 __le16 stripe_blk_sz
;
405 /* device list continues beyond this point? */
406 } __attribute__((packed
));
408 static int carm_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
);
409 static void carm_remove_one (struct pci_dev
*pdev
);
410 static int carm_bdev_getgeo(struct block_device
*bdev
, struct hd_geometry
*geo
);
412 static struct pci_device_id carm_pci_tbl
[] = {
413 { PCI_VENDOR_ID_PROMISE
, 0x8000, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, },
414 { PCI_VENDOR_ID_PROMISE
, 0x8002, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, },
415 { } /* terminate list */
417 MODULE_DEVICE_TABLE(pci
, carm_pci_tbl
);
419 static struct pci_driver carm_driver
= {
421 .id_table
= carm_pci_tbl
,
422 .probe
= carm_init_one
,
423 .remove
= carm_remove_one
,
426 static struct block_device_operations carm_bd_ops
= {
427 .owner
= THIS_MODULE
,
428 .getgeo
= carm_bdev_getgeo
,
431 static unsigned int carm_host_id
;
432 static unsigned long carm_major_alloc
;
436 static int carm_bdev_getgeo(struct block_device
*bdev
, struct hd_geometry
*geo
)
438 struct carm_port
*port
= bdev
->bd_disk
->private_data
;
440 geo
->heads
= (u8
) port
->dev_geom_head
;
441 geo
->sectors
= (u8
) port
->dev_geom_sect
;
442 geo
->cylinders
= port
->dev_geom_cyl
;
446 static const u32 msg_sizes
[] = { 32, 64, 128, CARM_MSG_SIZE
};
448 static inline int carm_lookup_bucket(u32 msg_size
)
452 for (i
= 0; i
< ARRAY_SIZE(msg_sizes
); i
++)
453 if (msg_size
<= msg_sizes
[i
])
459 static void carm_init_buckets(void __iomem
*mmio
)
463 for (i
= 0; i
< ARRAY_SIZE(msg_sizes
); i
++)
464 writel(msg_sizes
[i
], mmio
+ CARM_CMS0
+ (4 * i
));
467 static inline void *carm_ref_msg(struct carm_host
*host
,
468 unsigned int msg_idx
)
470 return host
->msg_base
+ (msg_idx
* CARM_MSG_SIZE
);
473 static inline dma_addr_t
carm_ref_msg_dma(struct carm_host
*host
,
474 unsigned int msg_idx
)
476 return host
->msg_dma
+ (msg_idx
* CARM_MSG_SIZE
);
479 static int carm_send_msg(struct carm_host
*host
,
480 struct carm_request
*crq
)
482 void __iomem
*mmio
= host
->mmio
;
483 u32 msg
= (u32
) carm_ref_msg_dma(host
, crq
->tag
);
484 u32 cm_bucket
= crq
->msg_bucket
;
490 tmp
= readl(mmio
+ CARM_HMUC
);
491 if (tmp
& CARM_Q_FULL
) {
493 tmp
= readl(mmio
+ CARM_INT_MASK
);
494 tmp
|= INT_Q_AVAILABLE
;
495 writel(tmp
, mmio
+ CARM_INT_MASK
);
496 readl(mmio
+ CARM_INT_MASK
); /* flush */
498 DPRINTK("host msg queue full\n");
501 writel(msg
| (cm_bucket
<< 1), mmio
+ CARM_IHQP
);
502 readl(mmio
+ CARM_IHQP
); /* flush */
508 static struct carm_request
*carm_get_request(struct carm_host
*host
)
512 /* obey global hardware limit on S/G entries */
513 if (host
->hw_sg_used
>= (CARM_MAX_HOST_SG
- CARM_MAX_REQ_SG
))
516 for (i
= 0; i
< max_queue
; i
++)
517 if ((host
->msg_alloc
& (1ULL << i
)) == 0) {
518 struct carm_request
*crq
= &host
->req
[i
];
522 host
->msg_alloc
|= (1ULL << i
);
525 assert(host
->n_msgs
<= CARM_MAX_REQ
);
526 sg_init_table(crq
->sg
, CARM_MAX_REQ_SG
);
530 DPRINTK("no request available, returning NULL\n");
534 static int carm_put_request(struct carm_host
*host
, struct carm_request
*crq
)
536 assert(crq
->tag
< max_queue
);
538 if (unlikely((host
->msg_alloc
& (1ULL << crq
->tag
)) == 0))
539 return -EINVAL
; /* tried to clear a tag that was not active */
541 assert(host
->hw_sg_used
>= crq
->n_elem
);
543 host
->msg_alloc
&= ~(1ULL << crq
->tag
);
544 host
->hw_sg_used
-= crq
->n_elem
;
550 static struct carm_request
*carm_get_special(struct carm_host
*host
)
553 struct carm_request
*crq
= NULL
;
557 while (tries
-- > 0) {
558 spin_lock_irqsave(&host
->lock
, flags
);
559 crq
= carm_get_request(host
);
560 spin_unlock_irqrestore(&host
->lock
, flags
);
570 rq
= blk_get_request(host
->oob_q
, WRITE
/* bogus */, GFP_KERNEL
);
572 spin_lock_irqsave(&host
->lock
, flags
);
573 carm_put_request(host
, crq
);
574 spin_unlock_irqrestore(&host
->lock
, flags
);
582 static int carm_array_info (struct carm_host
*host
, unsigned int array_idx
)
584 struct carm_msg_ioctl
*ioc
;
588 struct carm_request
*crq
;
591 crq
= carm_get_special(host
);
599 ioc
= carm_ref_msg(host
, idx
);
600 msg_dma
= carm_ref_msg_dma(host
, idx
);
601 msg_data
= (u32
) (msg_dma
+ sizeof(struct carm_array_info
));
603 crq
->msg_type
= CARM_MSG_ARRAY
;
604 crq
->msg_subtype
= CARM_ARRAY_INFO
;
605 rc
= carm_lookup_bucket(sizeof(struct carm_msg_ioctl
) +
606 sizeof(struct carm_array_info
));
608 crq
->msg_bucket
= (u32
) rc
;
610 memset(ioc
, 0, sizeof(*ioc
));
611 ioc
->type
= CARM_MSG_ARRAY
;
612 ioc
->subtype
= CARM_ARRAY_INFO
;
613 ioc
->array_id
= (u8
) array_idx
;
614 ioc
->handle
= cpu_to_le32(TAG_ENCODE(idx
));
615 ioc
->data_addr
= cpu_to_le32(msg_data
);
617 spin_lock_irq(&host
->lock
);
618 assert(host
->state
== HST_DEV_SCAN_START
||
619 host
->state
== HST_DEV_SCAN
);
620 spin_unlock_irq(&host
->lock
);
622 DPRINTK("blk_insert_request, tag == %u\n", idx
);
623 blk_insert_request(host
->oob_q
, crq
->rq
, 1, crq
);
628 spin_lock_irq(&host
->lock
);
629 host
->state
= HST_ERROR
;
630 spin_unlock_irq(&host
->lock
);
634 typedef unsigned int (*carm_sspc_t
)(struct carm_host
*, unsigned int, void *);
636 static int carm_send_special (struct carm_host
*host
, carm_sspc_t func
)
638 struct carm_request
*crq
;
639 struct carm_msg_ioctl
*ioc
;
641 unsigned int idx
, msg_size
;
644 crq
= carm_get_special(host
);
650 mem
= carm_ref_msg(host
, idx
);
652 msg_size
= func(host
, idx
, mem
);
655 crq
->msg_type
= ioc
->type
;
656 crq
->msg_subtype
= ioc
->subtype
;
657 rc
= carm_lookup_bucket(msg_size
);
659 crq
->msg_bucket
= (u32
) rc
;
661 DPRINTK("blk_insert_request, tag == %u\n", idx
);
662 blk_insert_request(host
->oob_q
, crq
->rq
, 1, crq
);
667 static unsigned int carm_fill_sync_time(struct carm_host
*host
,
668 unsigned int idx
, void *mem
)
671 struct carm_msg_sync_time
*st
= mem
;
673 do_gettimeofday(&tv
);
675 memset(st
, 0, sizeof(*st
));
676 st
->type
= CARM_MSG_MISC
;
677 st
->subtype
= MISC_SET_TIME
;
678 st
->handle
= cpu_to_le32(TAG_ENCODE(idx
));
679 st
->timestamp
= cpu_to_le32(tv
.tv_sec
);
681 return sizeof(struct carm_msg_sync_time
);
684 static unsigned int carm_fill_alloc_buf(struct carm_host
*host
,
685 unsigned int idx
, void *mem
)
687 struct carm_msg_allocbuf
*ab
= mem
;
689 memset(ab
, 0, sizeof(*ab
));
690 ab
->type
= CARM_MSG_MISC
;
691 ab
->subtype
= MISC_ALLOC_MEM
;
692 ab
->handle
= cpu_to_le32(TAG_ENCODE(idx
));
694 ab
->sg_type
= SGT_32BIT
;
695 ab
->addr
= cpu_to_le32(host
->shm_dma
+ (PDC_SHM_SIZE
>> 1));
696 ab
->len
= cpu_to_le32(PDC_SHM_SIZE
>> 1);
697 ab
->evt_pool
= cpu_to_le32(host
->shm_dma
+ (16 * 1024));
698 ab
->n_evt
= cpu_to_le32(1024);
699 ab
->rbuf_pool
= cpu_to_le32(host
->shm_dma
);
700 ab
->n_rbuf
= cpu_to_le32(RMSG_Q_LEN
);
701 ab
->msg_pool
= cpu_to_le32(host
->shm_dma
+ RBUF_LEN
);
702 ab
->n_msg
= cpu_to_le32(CARM_Q_LEN
);
703 ab
->sg
[0].start
= cpu_to_le32(host
->shm_dma
+ (PDC_SHM_SIZE
>> 1));
704 ab
->sg
[0].len
= cpu_to_le32(65536);
706 return sizeof(struct carm_msg_allocbuf
);
709 static unsigned int carm_fill_scan_channels(struct carm_host
*host
,
710 unsigned int idx
, void *mem
)
712 struct carm_msg_ioctl
*ioc
= mem
;
713 u32 msg_data
= (u32
) (carm_ref_msg_dma(host
, idx
) +
714 IOC_SCAN_CHAN_OFFSET
);
716 memset(ioc
, 0, sizeof(*ioc
));
717 ioc
->type
= CARM_MSG_IOCTL
;
718 ioc
->subtype
= CARM_IOC_SCAN_CHAN
;
719 ioc
->handle
= cpu_to_le32(TAG_ENCODE(idx
));
720 ioc
->data_addr
= cpu_to_le32(msg_data
);
722 /* fill output data area with "no device" default values */
723 mem
+= IOC_SCAN_CHAN_OFFSET
;
724 memset(mem
, IOC_SCAN_CHAN_NODEV
, CARM_MAX_PORTS
);
726 return IOC_SCAN_CHAN_OFFSET
+ CARM_MAX_PORTS
;
729 static unsigned int carm_fill_get_fw_ver(struct carm_host
*host
,
730 unsigned int idx
, void *mem
)
732 struct carm_msg_get_fw_ver
*ioc
= mem
;
733 u32 msg_data
= (u32
) (carm_ref_msg_dma(host
, idx
) + sizeof(*ioc
));
735 memset(ioc
, 0, sizeof(*ioc
));
736 ioc
->type
= CARM_MSG_MISC
;
737 ioc
->subtype
= MISC_GET_FW_VER
;
738 ioc
->handle
= cpu_to_le32(TAG_ENCODE(idx
));
739 ioc
->data_addr
= cpu_to_le32(msg_data
);
741 return sizeof(struct carm_msg_get_fw_ver
) +
742 sizeof(struct carm_fw_ver
);
745 static inline void carm_end_request_queued(struct carm_host
*host
,
746 struct carm_request
*crq
,
749 struct request
*req
= crq
->rq
;
752 __blk_end_request_all(req
, error
);
754 rc
= carm_put_request(host
, crq
);
758 static inline void carm_push_q (struct carm_host
*host
, struct request_queue
*q
)
760 unsigned int idx
= host
->wait_q_prod
% CARM_MAX_WAIT_Q
;
763 VPRINTK("STOPPED QUEUE %p\n", q
);
765 host
->wait_q
[idx
] = q
;
767 BUG_ON(host
->wait_q_prod
== host
->wait_q_cons
); /* overrun */
770 static inline struct request_queue
*carm_pop_q(struct carm_host
*host
)
774 if (host
->wait_q_prod
== host
->wait_q_cons
)
777 idx
= host
->wait_q_cons
% CARM_MAX_WAIT_Q
;
780 return host
->wait_q
[idx
];
783 static inline void carm_round_robin(struct carm_host
*host
)
785 struct request_queue
*q
= carm_pop_q(host
);
788 VPRINTK("STARTED QUEUE %p\n", q
);
792 static inline void carm_end_rq(struct carm_host
*host
, struct carm_request
*crq
,
795 carm_end_request_queued(host
, crq
, error
);
797 carm_round_robin(host
);
798 else if ((host
->n_msgs
<= CARM_MSG_LOW_WATER
) &&
799 (host
->hw_sg_used
<= CARM_SG_LOW_WATER
)) {
800 carm_round_robin(host
);
804 static void carm_oob_rq_fn(struct request_queue
*q
)
806 struct carm_host
*host
= q
->queuedata
;
807 struct carm_request
*crq
;
812 DPRINTK("get req\n");
813 rq
= elv_next_request(q
);
817 blkdev_dequeue_request(rq
);
821 assert(crq
->rq
== rq
);
825 DPRINTK("send req\n");
826 rc
= carm_send_msg(host
, crq
);
828 blk_requeue_request(q
, rq
);
829 carm_push_q(host
, q
);
830 return; /* call us again later, eventually */
835 static void carm_rq_fn(struct request_queue
*q
)
837 struct carm_port
*port
= q
->queuedata
;
838 struct carm_host
*host
= port
->host
;
839 struct carm_msg_rw
*msg
;
840 struct carm_request
*crq
;
842 struct scatterlist
*sg
;
843 int writing
= 0, pci_dir
, i
, n_elem
, rc
;
845 unsigned int msg_size
;
848 VPRINTK("get req\n");
849 rq
= elv_next_request(q
);
853 crq
= carm_get_request(host
);
855 carm_push_q(host
, q
);
856 return; /* call us again later, eventually */
860 blkdev_dequeue_request(rq
);
862 if (rq_data_dir(rq
) == WRITE
) {
864 pci_dir
= PCI_DMA_TODEVICE
;
866 pci_dir
= PCI_DMA_FROMDEVICE
;
869 /* get scatterlist from block layer */
871 n_elem
= blk_rq_map_sg(q
, rq
, sg
);
873 carm_end_rq(host
, crq
, -EIO
);
874 return; /* request with no s/g entries? */
877 /* map scatterlist to PCI bus addresses */
878 n_elem
= pci_map_sg(host
->pdev
, sg
, n_elem
, pci_dir
);
880 carm_end_rq(host
, crq
, -EIO
);
881 return; /* request with no s/g entries? */
883 crq
->n_elem
= n_elem
;
885 host
->hw_sg_used
+= n_elem
;
888 * build read/write message
891 VPRINTK("build msg\n");
892 msg
= (struct carm_msg_rw
*) carm_ref_msg(host
, crq
->tag
);
895 msg
->type
= CARM_MSG_WRITE
;
896 crq
->msg_type
= CARM_MSG_WRITE
;
898 msg
->type
= CARM_MSG_READ
;
899 crq
->msg_type
= CARM_MSG_READ
;
902 msg
->id
= port
->port_no
;
903 msg
->sg_count
= n_elem
;
904 msg
->sg_type
= SGT_32BIT
;
905 msg
->handle
= cpu_to_le32(TAG_ENCODE(crq
->tag
));
906 msg
->lba
= cpu_to_le32(blk_rq_pos(rq
) & 0xffffffff);
907 tmp
= (blk_rq_pos(rq
) >> 16) >> 16;
908 msg
->lba_high
= cpu_to_le16( (u16
) tmp
);
909 msg
->lba_count
= cpu_to_le16(blk_rq_sectors(rq
));
911 msg_size
= sizeof(struct carm_msg_rw
) - sizeof(msg
->sg
);
912 for (i
= 0; i
< n_elem
; i
++) {
913 struct carm_msg_sg
*carm_sg
= &msg
->sg
[i
];
914 carm_sg
->start
= cpu_to_le32(sg_dma_address(&crq
->sg
[i
]));
915 carm_sg
->len
= cpu_to_le32(sg_dma_len(&crq
->sg
[i
]));
916 msg_size
+= sizeof(struct carm_msg_sg
);
919 rc
= carm_lookup_bucket(msg_size
);
921 crq
->msg_bucket
= (u32
) rc
;
924 * queue read/write message to hardware
927 VPRINTK("send msg, tag == %u\n", crq
->tag
);
928 rc
= carm_send_msg(host
, crq
);
930 carm_put_request(host
, crq
);
931 blk_requeue_request(q
, rq
);
932 carm_push_q(host
, q
);
933 return; /* call us again later, eventually */
936 goto queue_one_request
;
939 static void carm_handle_array_info(struct carm_host
*host
,
940 struct carm_request
*crq
, u8
*mem
,
943 struct carm_port
*port
;
944 u8
*msg_data
= mem
+ sizeof(struct carm_array_info
);
945 struct carm_array_info
*desc
= (struct carm_array_info
*) msg_data
;
952 carm_end_rq(host
, crq
, error
);
956 if (le32_to_cpu(desc
->array_status
) & ARRAY_NO_EXIST
)
959 cur_port
= host
->cur_scan_dev
;
961 /* should never occur */
962 if ((cur_port
< 0) || (cur_port
>= CARM_MAX_PORTS
)) {
963 printk(KERN_ERR PFX
"BUG: cur_scan_dev==%d, array_id==%d\n",
964 cur_port
, (int) desc
->array_id
);
968 port
= &host
->port
[cur_port
];
970 lo
= (u64
) le32_to_cpu(desc
->size
);
971 hi
= (u64
) le16_to_cpu(desc
->size_hi
);
973 port
->capacity
= lo
| (hi
<< 32);
974 port
->dev_geom_head
= le16_to_cpu(desc
->head
);
975 port
->dev_geom_sect
= le16_to_cpu(desc
->sect
);
976 port
->dev_geom_cyl
= le16_to_cpu(desc
->cyl
);
978 host
->dev_active
|= (1 << cur_port
);
980 strncpy(port
->name
, desc
->name
, sizeof(port
->name
));
981 port
->name
[sizeof(port
->name
) - 1] = 0;
982 slen
= strlen(port
->name
);
983 while (slen
&& (port
->name
[slen
- 1] == ' ')) {
984 port
->name
[slen
- 1] = 0;
988 printk(KERN_INFO DRV_NAME
"(%s): port %u device %Lu sectors\n",
989 pci_name(host
->pdev
), port
->port_no
,
990 (unsigned long long) port
->capacity
);
991 printk(KERN_INFO DRV_NAME
"(%s): port %u device \"%s\"\n",
992 pci_name(host
->pdev
), port
->port_no
, port
->name
);
995 assert(host
->state
== HST_DEV_SCAN
);
996 schedule_work(&host
->fsm_task
);
999 static void carm_handle_scan_chan(struct carm_host
*host
,
1000 struct carm_request
*crq
, u8
*mem
,
1003 u8
*msg_data
= mem
+ IOC_SCAN_CHAN_OFFSET
;
1004 unsigned int i
, dev_count
= 0;
1005 int new_state
= HST_DEV_SCAN_START
;
1009 carm_end_rq(host
, crq
, error
);
1012 new_state
= HST_ERROR
;
1016 /* TODO: scan and support non-disk devices */
1017 for (i
= 0; i
< 8; i
++)
1018 if (msg_data
[i
] == 0) { /* direct-access device (disk) */
1019 host
->dev_present
|= (1 << i
);
1023 printk(KERN_INFO DRV_NAME
"(%s): found %u interesting devices\n",
1024 pci_name(host
->pdev
), dev_count
);
1027 assert(host
->state
== HST_PORT_SCAN
);
1028 host
->state
= new_state
;
1029 schedule_work(&host
->fsm_task
);
1032 static void carm_handle_generic(struct carm_host
*host
,
1033 struct carm_request
*crq
, int error
,
1034 int cur_state
, int next_state
)
1038 carm_end_rq(host
, crq
, error
);
1040 assert(host
->state
== cur_state
);
1042 host
->state
= HST_ERROR
;
1044 host
->state
= next_state
;
1045 schedule_work(&host
->fsm_task
);
1048 static inline void carm_handle_rw(struct carm_host
*host
,
1049 struct carm_request
*crq
, int error
)
1055 if (rq_data_dir(crq
->rq
) == WRITE
)
1056 pci_dir
= PCI_DMA_TODEVICE
;
1058 pci_dir
= PCI_DMA_FROMDEVICE
;
1060 pci_unmap_sg(host
->pdev
, &crq
->sg
[0], crq
->n_elem
, pci_dir
);
1062 carm_end_rq(host
, crq
, error
);
1065 static inline void carm_handle_resp(struct carm_host
*host
,
1066 __le32 ret_handle_le
, u32 status
)
1068 u32 handle
= le32_to_cpu(ret_handle_le
);
1069 unsigned int msg_idx
;
1070 struct carm_request
*crq
;
1071 int error
= (status
== RMSG_OK
) ? 0 : -EIO
;
1074 VPRINTK("ENTER, handle == 0x%x\n", handle
);
1076 if (unlikely(!TAG_VALID(handle
))) {
1077 printk(KERN_ERR DRV_NAME
"(%s): BUG: invalid tag 0x%x\n",
1078 pci_name(host
->pdev
), handle
);
1082 msg_idx
= TAG_DECODE(handle
);
1083 VPRINTK("tag == %u\n", msg_idx
);
1085 crq
= &host
->req
[msg_idx
];
1088 if (likely(crq
->msg_type
== CARM_MSG_READ
||
1089 crq
->msg_type
== CARM_MSG_WRITE
)) {
1090 carm_handle_rw(host
, crq
, error
);
1094 mem
= carm_ref_msg(host
, msg_idx
);
1096 switch (crq
->msg_type
) {
1097 case CARM_MSG_IOCTL
: {
1098 switch (crq
->msg_subtype
) {
1099 case CARM_IOC_SCAN_CHAN
:
1100 carm_handle_scan_chan(host
, crq
, mem
, error
);
1103 /* unknown / invalid response */
1109 case CARM_MSG_MISC
: {
1110 switch (crq
->msg_subtype
) {
1111 case MISC_ALLOC_MEM
:
1112 carm_handle_generic(host
, crq
, error
,
1113 HST_ALLOC_BUF
, HST_SYNC_TIME
);
1116 carm_handle_generic(host
, crq
, error
,
1117 HST_SYNC_TIME
, HST_GET_FW_VER
);
1119 case MISC_GET_FW_VER
: {
1120 struct carm_fw_ver
*ver
= (struct carm_fw_ver
*)
1121 mem
+ sizeof(struct carm_msg_get_fw_ver
);
1123 host
->fw_ver
= le32_to_cpu(ver
->version
);
1124 host
->flags
|= (ver
->features
& FL_FW_VER_MASK
);
1126 carm_handle_generic(host
, crq
, error
,
1127 HST_GET_FW_VER
, HST_PORT_SCAN
);
1131 /* unknown / invalid response */
1137 case CARM_MSG_ARRAY
: {
1138 switch (crq
->msg_subtype
) {
1139 case CARM_ARRAY_INFO
:
1140 carm_handle_array_info(host
, crq
, mem
, error
);
1143 /* unknown / invalid response */
1150 /* unknown / invalid response */
1157 printk(KERN_WARNING DRV_NAME
"(%s): BUG: unhandled message type %d/%d\n",
1158 pci_name(host
->pdev
), crq
->msg_type
, crq
->msg_subtype
);
1159 carm_end_rq(host
, crq
, -EIO
);
1162 static inline void carm_handle_responses(struct carm_host
*host
)
1164 void __iomem
*mmio
= host
->mmio
;
1165 struct carm_response
*resp
= (struct carm_response
*) host
->shm
;
1166 unsigned int work
= 0;
1167 unsigned int idx
= host
->resp_idx
% RMSG_Q_LEN
;
1170 u32 status
= le32_to_cpu(resp
[idx
].status
);
1172 if (status
== 0xffffffff) {
1173 VPRINTK("ending response on index %u\n", idx
);
1174 writel(idx
<< 3, mmio
+ CARM_RESP_IDX
);
1178 /* response to a message we sent */
1179 else if ((status
& (1 << 31)) == 0) {
1180 VPRINTK("handling msg response on index %u\n", idx
);
1181 carm_handle_resp(host
, resp
[idx
].ret_handle
, status
);
1182 resp
[idx
].status
= cpu_to_le32(0xffffffff);
1185 /* asynchronous events the hardware throws our way */
1186 else if ((status
& 0xff000000) == (1 << 31)) {
1187 u8
*evt_type_ptr
= (u8
*) &resp
[idx
];
1188 u8 evt_type
= *evt_type_ptr
;
1189 printk(KERN_WARNING DRV_NAME
"(%s): unhandled event type %d\n",
1190 pci_name(host
->pdev
), (int) evt_type
);
1191 resp
[idx
].status
= cpu_to_le32(0xffffffff);
1194 idx
= NEXT_RESP(idx
);
1198 VPRINTK("EXIT, work==%u\n", work
);
1199 host
->resp_idx
+= work
;
1202 static irqreturn_t
carm_interrupt(int irq
, void *__host
)
1204 struct carm_host
*host
= __host
;
1208 unsigned long flags
;
1211 VPRINTK("no host\n");
1215 spin_lock_irqsave(&host
->lock
, flags
);
1219 /* reading should also clear interrupts */
1220 mask
= readl(mmio
+ CARM_INT_STAT
);
1222 if (mask
== 0 || mask
== 0xffffffff) {
1223 VPRINTK("no work, mask == 0x%x\n", mask
);
1227 if (mask
& INT_ACK_MASK
)
1228 writel(mask
, mmio
+ CARM_INT_STAT
);
1230 if (unlikely(host
->state
== HST_INVALID
)) {
1231 VPRINTK("not initialized yet, mask = 0x%x\n", mask
);
1235 if (mask
& CARM_HAVE_RESP
) {
1237 carm_handle_responses(host
);
1241 spin_unlock_irqrestore(&host
->lock
, flags
);
1243 return IRQ_RETVAL(handled
);
1246 static void carm_fsm_task (struct work_struct
*work
)
1248 struct carm_host
*host
=
1249 container_of(work
, struct carm_host
, fsm_task
);
1250 unsigned long flags
;
1252 int rc
, i
, next_dev
;
1254 int new_state
= HST_INVALID
;
1256 spin_lock_irqsave(&host
->lock
, flags
);
1257 state
= host
->state
;
1258 spin_unlock_irqrestore(&host
->lock
, flags
);
1260 DPRINTK("ENTER, state == %s\n", state_name
[state
]);
1263 case HST_PROBE_START
:
1264 new_state
= HST_ALLOC_BUF
;
1269 rc
= carm_send_special(host
, carm_fill_alloc_buf
);
1271 new_state
= HST_ERROR
;
1277 rc
= carm_send_special(host
, carm_fill_sync_time
);
1279 new_state
= HST_ERROR
;
1284 case HST_GET_FW_VER
:
1285 rc
= carm_send_special(host
, carm_fill_get_fw_ver
);
1287 new_state
= HST_ERROR
;
1293 rc
= carm_send_special(host
, carm_fill_scan_channels
);
1295 new_state
= HST_ERROR
;
1300 case HST_DEV_SCAN_START
:
1301 host
->cur_scan_dev
= -1;
1302 new_state
= HST_DEV_SCAN
;
1308 for (i
= host
->cur_scan_dev
+ 1; i
< CARM_MAX_PORTS
; i
++)
1309 if (host
->dev_present
& (1 << i
)) {
1314 if (next_dev
>= 0) {
1315 host
->cur_scan_dev
= next_dev
;
1316 rc
= carm_array_info(host
, next_dev
);
1318 new_state
= HST_ERROR
;
1322 new_state
= HST_DEV_ACTIVATE
;
1327 case HST_DEV_ACTIVATE
: {
1329 for (i
= 0; i
< CARM_MAX_PORTS
; i
++)
1330 if (host
->dev_active
& (1 << i
)) {
1331 struct carm_port
*port
= &host
->port
[i
];
1332 struct gendisk
*disk
= port
->disk
;
1334 set_capacity(disk
, port
->capacity
);
1339 printk(KERN_INFO DRV_NAME
"(%s): %d ports activated\n",
1340 pci_name(host
->pdev
), activated
);
1342 new_state
= HST_PROBE_FINISHED
;
1347 case HST_PROBE_FINISHED
:
1348 complete(&host
->probe_comp
);
1356 /* should never occur */
1357 printk(KERN_ERR PFX
"BUG: unknown state %d\n", state
);
1362 if (new_state
!= HST_INVALID
) {
1363 spin_lock_irqsave(&host
->lock
, flags
);
1364 host
->state
= new_state
;
1365 spin_unlock_irqrestore(&host
->lock
, flags
);
1368 schedule_work(&host
->fsm_task
);
1371 static int carm_init_wait(void __iomem
*mmio
, u32 bits
, unsigned int test_bit
)
1375 for (i
= 0; i
< 50000; i
++) {
1376 u32 tmp
= readl(mmio
+ CARM_LMUC
);
1380 if ((tmp
& bits
) == bits
)
1383 if ((tmp
& bits
) == 0)
1390 printk(KERN_ERR PFX
"carm_init_wait timeout, bits == 0x%x, test_bit == %s\n",
1391 bits
, test_bit
? "yes" : "no");
1395 static void carm_init_responses(struct carm_host
*host
)
1397 void __iomem
*mmio
= host
->mmio
;
1399 struct carm_response
*resp
= (struct carm_response
*) host
->shm
;
1401 for (i
= 0; i
< RMSG_Q_LEN
; i
++)
1402 resp
[i
].status
= cpu_to_le32(0xffffffff);
1404 writel(0, mmio
+ CARM_RESP_IDX
);
1407 static int carm_init_host(struct carm_host
*host
)
1409 void __iomem
*mmio
= host
->mmio
;
1416 writel(0, mmio
+ CARM_INT_MASK
);
1418 tmp8
= readb(mmio
+ CARM_INITC
);
1421 writeb(tmp8
, mmio
+ CARM_INITC
);
1422 readb(mmio
+ CARM_INITC
); /* flush */
1424 DPRINTK("snooze...\n");
1428 tmp
= readl(mmio
+ CARM_HMUC
);
1429 if (tmp
& CARM_CME
) {
1430 DPRINTK("CME bit present, waiting\n");
1431 rc
= carm_init_wait(mmio
, CARM_CME
, 1);
1433 DPRINTK("EXIT, carm_init_wait 1 failed\n");
1437 if (tmp
& CARM_RME
) {
1438 DPRINTK("RME bit present, waiting\n");
1439 rc
= carm_init_wait(mmio
, CARM_RME
, 1);
1441 DPRINTK("EXIT, carm_init_wait 2 failed\n");
1446 tmp
&= ~(CARM_RME
| CARM_CME
);
1447 writel(tmp
, mmio
+ CARM_HMUC
);
1448 readl(mmio
+ CARM_HMUC
); /* flush */
1450 rc
= carm_init_wait(mmio
, CARM_RME
| CARM_CME
, 0);
1452 DPRINTK("EXIT, carm_init_wait 3 failed\n");
1456 carm_init_buckets(mmio
);
1458 writel(host
->shm_dma
& 0xffffffff, mmio
+ RBUF_ADDR_LO
);
1459 writel((host
->shm_dma
>> 16) >> 16, mmio
+ RBUF_ADDR_HI
);
1460 writel(RBUF_LEN
, mmio
+ RBUF_BYTE_SZ
);
1462 tmp
= readl(mmio
+ CARM_HMUC
);
1463 tmp
|= (CARM_RME
| CARM_CME
| CARM_WZBC
);
1464 writel(tmp
, mmio
+ CARM_HMUC
);
1465 readl(mmio
+ CARM_HMUC
); /* flush */
1467 rc
= carm_init_wait(mmio
, CARM_RME
| CARM_CME
, 1);
1469 DPRINTK("EXIT, carm_init_wait 4 failed\n");
1473 writel(0, mmio
+ CARM_HMPHA
);
1474 writel(INT_DEF_MASK
, mmio
+ CARM_INT_MASK
);
1476 carm_init_responses(host
);
1478 /* start initialization, probing state machine */
1479 spin_lock_irq(&host
->lock
);
1480 assert(host
->state
== HST_INVALID
);
1481 host
->state
= HST_PROBE_START
;
1482 spin_unlock_irq(&host
->lock
);
1483 schedule_work(&host
->fsm_task
);
1489 static int carm_init_disks(struct carm_host
*host
)
1494 for (i
= 0; i
< CARM_MAX_PORTS
; i
++) {
1495 struct gendisk
*disk
;
1496 struct request_queue
*q
;
1497 struct carm_port
*port
;
1499 port
= &host
->port
[i
];
1503 disk
= alloc_disk(CARM_MINORS_PER_MAJOR
);
1510 sprintf(disk
->disk_name
, DRV_NAME
"/%u",
1511 (unsigned int) (host
->id
* CARM_MAX_PORTS
) + i
);
1512 disk
->major
= host
->major
;
1513 disk
->first_minor
= i
* CARM_MINORS_PER_MAJOR
;
1514 disk
->fops
= &carm_bd_ops
;
1515 disk
->private_data
= port
;
1517 q
= blk_init_queue(carm_rq_fn
, &host
->lock
);
1523 blk_queue_max_hw_segments(q
, CARM_MAX_REQ_SG
);
1524 blk_queue_max_phys_segments(q
, CARM_MAX_REQ_SG
);
1525 blk_queue_segment_boundary(q
, CARM_SG_BOUNDARY
);
1527 q
->queuedata
= port
;
1533 static void carm_free_disks(struct carm_host
*host
)
1537 for (i
= 0; i
< CARM_MAX_PORTS
; i
++) {
1538 struct gendisk
*disk
= host
->port
[i
].disk
;
1540 struct request_queue
*q
= disk
->queue
;
1542 if (disk
->flags
& GENHD_FL_UP
)
1545 blk_cleanup_queue(q
);
1551 static int carm_init_shm(struct carm_host
*host
)
1553 host
->shm
= pci_alloc_consistent(host
->pdev
, CARM_SHM_SIZE
,
1558 host
->msg_base
= host
->shm
+ RBUF_LEN
;
1559 host
->msg_dma
= host
->shm_dma
+ RBUF_LEN
;
1561 memset(host
->shm
, 0xff, RBUF_LEN
);
1562 memset(host
->msg_base
, 0, PDC_SHM_SIZE
- RBUF_LEN
);
1567 static int carm_init_one (struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1569 static unsigned int printed_version
;
1570 struct carm_host
*host
;
1571 unsigned int pci_dac
;
1573 struct request_queue
*q
;
1576 if (!printed_version
++)
1577 printk(KERN_DEBUG DRV_NAME
" version " DRV_VERSION
"\n");
1579 rc
= pci_enable_device(pdev
);
1583 rc
= pci_request_regions(pdev
, DRV_NAME
);
1587 #ifdef IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
1588 rc
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(64));
1590 rc
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64));
1592 printk(KERN_ERR DRV_NAME
"(%s): consistent DMA mask failure\n",
1594 goto err_out_regions
;
1599 rc
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1601 printk(KERN_ERR DRV_NAME
"(%s): DMA mask failure\n",
1603 goto err_out_regions
;
1606 #ifdef IF_64BIT_DMA_IS_POSSIBLE /* grrrr... */
1610 host
= kzalloc(sizeof(*host
), GFP_KERNEL
);
1612 printk(KERN_ERR DRV_NAME
"(%s): memory alloc failure\n",
1615 goto err_out_regions
;
1619 host
->flags
= pci_dac
? FL_DAC
: 0;
1620 spin_lock_init(&host
->lock
);
1621 INIT_WORK(&host
->fsm_task
, carm_fsm_task
);
1622 init_completion(&host
->probe_comp
);
1624 for (i
= 0; i
< ARRAY_SIZE(host
->req
); i
++)
1625 host
->req
[i
].tag
= i
;
1627 host
->mmio
= ioremap(pci_resource_start(pdev
, 0),
1628 pci_resource_len(pdev
, 0));
1630 printk(KERN_ERR DRV_NAME
"(%s): MMIO alloc failure\n",
1636 rc
= carm_init_shm(host
);
1638 printk(KERN_ERR DRV_NAME
"(%s): DMA SHM alloc failure\n",
1640 goto err_out_iounmap
;
1643 q
= blk_init_queue(carm_oob_rq_fn
, &host
->lock
);
1645 printk(KERN_ERR DRV_NAME
"(%s): OOB queue alloc failure\n",
1648 goto err_out_pci_free
;
1651 q
->queuedata
= host
;
1654 * Figure out which major to use: 160, 161, or dynamic
1656 if (!test_and_set_bit(0, &carm_major_alloc
))
1658 else if (!test_and_set_bit(1, &carm_major_alloc
))
1661 host
->flags
|= FL_DYN_MAJOR
;
1663 host
->id
= carm_host_id
;
1664 sprintf(host
->name
, DRV_NAME
"%d", carm_host_id
);
1666 rc
= register_blkdev(host
->major
, host
->name
);
1668 goto err_out_free_majors
;
1669 if (host
->flags
& FL_DYN_MAJOR
)
1672 rc
= carm_init_disks(host
);
1674 goto err_out_blkdev_disks
;
1676 pci_set_master(pdev
);
1678 rc
= request_irq(pdev
->irq
, carm_interrupt
, IRQF_SHARED
, DRV_NAME
, host
);
1680 printk(KERN_ERR DRV_NAME
"(%s): irq alloc failure\n",
1682 goto err_out_blkdev_disks
;
1685 rc
= carm_init_host(host
);
1687 goto err_out_free_irq
;
1689 DPRINTK("waiting for probe_comp\n");
1690 wait_for_completion(&host
->probe_comp
);
1692 printk(KERN_INFO
"%s: pci %s, ports %d, io %llx, irq %u, major %d\n",
1693 host
->name
, pci_name(pdev
), (int) CARM_MAX_PORTS
,
1694 (unsigned long long)pci_resource_start(pdev
, 0),
1695 pdev
->irq
, host
->major
);
1698 pci_set_drvdata(pdev
, host
);
1702 free_irq(pdev
->irq
, host
);
1703 err_out_blkdev_disks
:
1704 carm_free_disks(host
);
1705 unregister_blkdev(host
->major
, host
->name
);
1706 err_out_free_majors
:
1707 if (host
->major
== 160)
1708 clear_bit(0, &carm_major_alloc
);
1709 else if (host
->major
== 161)
1710 clear_bit(1, &carm_major_alloc
);
1711 blk_cleanup_queue(host
->oob_q
);
1713 pci_free_consistent(pdev
, CARM_SHM_SIZE
, host
->shm
, host
->shm_dma
);
1715 iounmap(host
->mmio
);
1719 pci_release_regions(pdev
);
1721 pci_disable_device(pdev
);
1725 static void carm_remove_one (struct pci_dev
*pdev
)
1727 struct carm_host
*host
= pci_get_drvdata(pdev
);
1730 printk(KERN_ERR PFX
"BUG: no host data for PCI(%s)\n",
1735 free_irq(pdev
->irq
, host
);
1736 carm_free_disks(host
);
1737 unregister_blkdev(host
->major
, host
->name
);
1738 if (host
->major
== 160)
1739 clear_bit(0, &carm_major_alloc
);
1740 else if (host
->major
== 161)
1741 clear_bit(1, &carm_major_alloc
);
1742 blk_cleanup_queue(host
->oob_q
);
1743 pci_free_consistent(pdev
, CARM_SHM_SIZE
, host
->shm
, host
->shm_dma
);
1744 iounmap(host
->mmio
);
1746 pci_release_regions(pdev
);
1747 pci_disable_device(pdev
);
1748 pci_set_drvdata(pdev
, NULL
);
1751 static int __init
carm_init(void)
1753 return pci_register_driver(&carm_driver
);
1756 static void __exit
carm_exit(void)
1758 pci_unregister_driver(&carm_driver
);
1761 module_init(carm_init
);
1762 module_exit(carm_exit
);