6db9b7f436aa6ae71bc4d351a760ce2ce2f7342f
[deliverable/linux.git] / drivers / char / agp / ati-agp.c
1 /*
2 * ATi AGPGART routines.
3 */
4
5 #include <linux/types.h>
6 #include <linux/module.h>
7 #include <linux/pci.h>
8 #include <linux/init.h>
9 #include <linux/string.h>
10 #include <linux/slab.h>
11 #include <linux/agp_backend.h>
12 #include <asm/agp.h>
13 #include "agp.h"
14
15 #define ATI_GART_MMBASE_ADDR 0x14
16 #define ATI_RS100_APSIZE 0xac
17 #define ATI_RS100_IG_AGPMODE 0xb0
18 #define ATI_RS300_APSIZE 0xf8
19 #define ATI_RS300_IG_AGPMODE 0xfc
20 #define ATI_GART_FEATURE_ID 0x00
21 #define ATI_GART_BASE 0x04
22 #define ATI_GART_CACHE_SZBASE 0x08
23 #define ATI_GART_CACHE_CNTRL 0x0c
24 #define ATI_GART_CACHE_ENTRY_CNTRL 0x10
25
26
27 static struct aper_size_info_lvl2 ati_generic_sizes[7] =
28 {
29 {2048, 524288, 0x0000000c},
30 {1024, 262144, 0x0000000a},
31 {512, 131072, 0x00000008},
32 {256, 65536, 0x00000006},
33 {128, 32768, 0x00000004},
34 {64, 16384, 0x00000002},
35 {32, 8192, 0x00000000}
36 };
37
38 static struct gatt_mask ati_generic_masks[] =
39 {
40 { .mask = 1, .type = 0}
41 };
42
43
44 typedef struct _ati_page_map {
45 unsigned long *real;
46 unsigned long __iomem *remapped;
47 } ati_page_map;
48
49 static struct _ati_generic_private {
50 volatile u8 __iomem *registers;
51 ati_page_map **gatt_pages;
52 int num_tables;
53 } ati_generic_private;
54
55 static int ati_create_page_map(ati_page_map *page_map)
56 {
57 int i, err = 0;
58
59 page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL);
60 if (page_map->real == NULL)
61 return -ENOMEM;
62
63 SetPageReserved(virt_to_page(page_map->real));
64 err = map_page_into_agp(virt_to_page(page_map->real));
65 page_map->remapped = ioremap_nocache(virt_to_gart(page_map->real),
66 PAGE_SIZE);
67 if (page_map->remapped == NULL || err) {
68 ClearPageReserved(virt_to_page(page_map->real));
69 free_page((unsigned long) page_map->real);
70 page_map->real = NULL;
71 return -ENOMEM;
72 }
73 /*CACHE_FLUSH();*/
74 global_cache_flush();
75
76 for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
77 writel(agp_bridge->scratch_page, page_map->remapped+i);
78 readl(page_map->remapped+i); /* PCI Posting. */
79 }
80
81 return 0;
82 }
83
84
85 static void ati_free_page_map(ati_page_map *page_map)
86 {
87 unmap_page_from_agp(virt_to_page(page_map->real));
88 iounmap(page_map->remapped);
89 ClearPageReserved(virt_to_page(page_map->real));
90 free_page((unsigned long) page_map->real);
91 }
92
93
94 static void ati_free_gatt_pages(void)
95 {
96 int i;
97 ati_page_map **tables;
98 ati_page_map *entry;
99
100 tables = ati_generic_private.gatt_pages;
101 for (i = 0; i < ati_generic_private.num_tables; i++) {
102 entry = tables[i];
103 if (entry != NULL) {
104 if (entry->real != NULL)
105 ati_free_page_map(entry);
106 kfree(entry);
107 }
108 }
109 kfree(tables);
110 }
111
112
113 static int ati_create_gatt_pages(int nr_tables)
114 {
115 ati_page_map **tables;
116 ati_page_map *entry;
117 int retval = 0;
118 int i;
119
120 tables = kzalloc((nr_tables + 1) * sizeof(ati_page_map *),GFP_KERNEL);
121 if (tables == NULL)
122 return -ENOMEM;
123
124 for (i = 0; i < nr_tables; i++) {
125 entry = kzalloc(sizeof(ati_page_map), GFP_KERNEL);
126 if (entry == NULL) {
127 while (i>0) {
128 kfree (tables[i-1]);
129 i--;
130 }
131 kfree (tables);
132 tables = NULL;
133 retval = -ENOMEM;
134 break;
135 }
136 tables[i] = entry;
137 retval = ati_create_page_map(entry);
138 if (retval != 0) break;
139 }
140 ati_generic_private.num_tables = nr_tables;
141 ati_generic_private.gatt_pages = tables;
142
143 if (retval != 0)
144 ati_free_gatt_pages();
145
146 return retval;
147 }
148
149 static int is_r200(void)
150 {
151 if ((agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS100) ||
152 (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200) ||
153 (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200_B) ||
154 (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS250))
155 return 1;
156 return 0;
157 }
158
159 static int ati_fetch_size(void)
160 {
161 int i;
162 u32 temp;
163 struct aper_size_info_lvl2 *values;
164
165 if (is_r200())
166 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
167 else
168 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
169
170 temp = (temp & 0x0000000e);
171 values = A_SIZE_LVL2(agp_bridge->driver->aperture_sizes);
172 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
173 if (temp == values[i].size_value) {
174 agp_bridge->previous_size =
175 agp_bridge->current_size = (void *) (values + i);
176
177 agp_bridge->aperture_size_idx = i;
178 return values[i].size;
179 }
180 }
181
182 return 0;
183 }
184
185 static void ati_tlbflush(struct agp_memory * mem)
186 {
187 writel(1, ati_generic_private.registers+ATI_GART_CACHE_CNTRL);
188 readl(ati_generic_private.registers+ATI_GART_CACHE_CNTRL); /* PCI Posting. */
189 }
190
191 static void ati_cleanup(void)
192 {
193 struct aper_size_info_lvl2 *previous_size;
194 u32 temp;
195
196 previous_size = A_SIZE_LVL2(agp_bridge->previous_size);
197
198 /* Write back the previous size and disable gart translation */
199 if (is_r200()) {
200 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
201 temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
202 pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp);
203 } else {
204 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
205 temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
206 pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
207 }
208 iounmap((volatile u8 __iomem *)ati_generic_private.registers);
209 }
210
211
212 static int ati_configure(void)
213 {
214 u32 temp;
215
216 /* Get the memory mapped registers */
217 pci_read_config_dword(agp_bridge->dev, ATI_GART_MMBASE_ADDR, &temp);
218 temp = (temp & 0xfffff000);
219 ati_generic_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
220
221 if (is_r200())
222 pci_write_config_dword(agp_bridge->dev, ATI_RS100_IG_AGPMODE, 0x20000);
223 else
224 pci_write_config_dword(agp_bridge->dev, ATI_RS300_IG_AGPMODE, 0x20000);
225
226 /* address to map too */
227 /*
228 pci_read_config_dword(agp_bridge.dev, AGP_APBASE, &temp);
229 agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
230 printk(KERN_INFO PFX "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr);
231 */
232 writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID);
233 readl(ati_generic_private.registers+ATI_GART_FEATURE_ID); /* PCI Posting.*/
234
235 /* SIGNALED_SYSTEM_ERROR @ NB_STATUS */
236 pci_read_config_dword(agp_bridge->dev, 4, &temp);
237 pci_write_config_dword(agp_bridge->dev, 4, temp | (1<<14));
238
239 /* Write out the address of the gatt table */
240 writel(agp_bridge->gatt_bus_addr, ati_generic_private.registers+ATI_GART_BASE);
241 readl(ati_generic_private.registers+ATI_GART_BASE); /* PCI Posting. */
242
243 return 0;
244 }
245
246
247 #ifdef CONFIG_PM
248 static int agp_ati_resume(struct pci_dev *dev)
249 {
250 pci_restore_state(dev);
251
252 return ati_configure();
253 }
254
255 static int agp_ati_suspend(struct pci_dev *dev, pm_message_t state)
256 {
257 pci_save_state(dev);
258
259 return 0;
260 }
261 #endif
262
263 /*
264 *Since we don't need contigious memory we just try
265 * to get the gatt table once
266 */
267
268 #define GET_PAGE_DIR_OFF(addr) (addr >> 22)
269 #define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr) - \
270 GET_PAGE_DIR_OFF(agp_bridge->gart_bus_addr))
271 #define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12)
272 #undef GET_GATT
273 #define GET_GATT(addr) (ati_generic_private.gatt_pages[\
274 GET_PAGE_DIR_IDX(addr)]->remapped)
275
276 static int ati_insert_memory(struct agp_memory * mem,
277 off_t pg_start, int type)
278 {
279 int i, j, num_entries;
280 unsigned long __iomem *cur_gatt;
281 unsigned long addr;
282
283 num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
284
285 if (type != 0 || mem->type != 0)
286 return -EINVAL;
287
288 if ((pg_start + mem->page_count) > num_entries)
289 return -EINVAL;
290
291 j = pg_start;
292 while (j < (pg_start + mem->page_count)) {
293 addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
294 cur_gatt = GET_GATT(addr);
295 if (!PGE_EMPTY(agp_bridge,readl(cur_gatt+GET_GATT_OFF(addr))))
296 return -EBUSY;
297 j++;
298 }
299
300 if (mem->is_flushed == FALSE) {
301 /*CACHE_FLUSH(); */
302 global_cache_flush();
303 mem->is_flushed = TRUE;
304 }
305
306 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
307 addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
308 cur_gatt = GET_GATT(addr);
309 writel(agp_bridge->driver->mask_memory(agp_bridge,
310 mem->memory[i], mem->type), cur_gatt+GET_GATT_OFF(addr));
311 readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
312 }
313 agp_bridge->driver->tlb_flush(mem);
314 return 0;
315 }
316
317 static int ati_remove_memory(struct agp_memory * mem, off_t pg_start,
318 int type)
319 {
320 int i;
321 unsigned long __iomem *cur_gatt;
322 unsigned long addr;
323
324 if (type != 0 || mem->type != 0)
325 return -EINVAL;
326
327 for (i = pg_start; i < (mem->page_count + pg_start); i++) {
328 addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
329 cur_gatt = GET_GATT(addr);
330 writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
331 readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
332 }
333
334 agp_bridge->driver->tlb_flush(mem);
335 return 0;
336 }
337
338 static int ati_create_gatt_table(struct agp_bridge_data *bridge)
339 {
340 struct aper_size_info_lvl2 *value;
341 ati_page_map page_dir;
342 unsigned long addr;
343 int retval;
344 u32 temp;
345 int i;
346 struct aper_size_info_lvl2 *current_size;
347
348 value = A_SIZE_LVL2(agp_bridge->current_size);
349 retval = ati_create_page_map(&page_dir);
350 if (retval != 0)
351 return retval;
352
353 retval = ati_create_gatt_pages(value->num_entries / 1024);
354 if (retval != 0) {
355 ati_free_page_map(&page_dir);
356 return retval;
357 }
358
359 agp_bridge->gatt_table_real = (u32 *)page_dir.real;
360 agp_bridge->gatt_table = (u32 __iomem *) page_dir.remapped;
361 agp_bridge->gatt_bus_addr = virt_to_gart(page_dir.real);
362
363 /* Write out the size register */
364 current_size = A_SIZE_LVL2(agp_bridge->current_size);
365
366 if (is_r200()) {
367 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
368 temp = (((temp & ~(0x0000000e)) | current_size->size_value)
369 | 0x00000001);
370 pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp);
371 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
372 } else {
373 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
374 temp = (((temp & ~(0x0000000e)) | current_size->size_value)
375 | 0x00000001);
376 pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
377 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
378 }
379
380 /*
381 * Get the address for the gart region.
382 * This is a bus address even on the alpha, b/c its
383 * used to program the agp master not the cpu
384 */
385 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
386 addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
387 agp_bridge->gart_bus_addr = addr;
388
389 /* Calculate the agp offset */
390 for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
391 writel(virt_to_gart(ati_generic_private.gatt_pages[i]->real) | 1,
392 page_dir.remapped+GET_PAGE_DIR_OFF(addr));
393 readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr)); /* PCI Posting. */
394 }
395
396 return 0;
397 }
398
399 static int ati_free_gatt_table(struct agp_bridge_data *bridge)
400 {
401 ati_page_map page_dir;
402
403 page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
404 page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
405
406 ati_free_gatt_pages();
407 ati_free_page_map(&page_dir);
408 return 0;
409 }
410
411 static struct agp_bridge_driver ati_generic_bridge = {
412 .owner = THIS_MODULE,
413 .aperture_sizes = ati_generic_sizes,
414 .size_type = LVL2_APER_SIZE,
415 .num_aperture_sizes = 7,
416 .configure = ati_configure,
417 .fetch_size = ati_fetch_size,
418 .cleanup = ati_cleanup,
419 .tlb_flush = ati_tlbflush,
420 .mask_memory = agp_generic_mask_memory,
421 .masks = ati_generic_masks,
422 .agp_enable = agp_generic_enable,
423 .cache_flush = global_cache_flush,
424 .create_gatt_table = ati_create_gatt_table,
425 .free_gatt_table = ati_free_gatt_table,
426 .insert_memory = ati_insert_memory,
427 .remove_memory = ati_remove_memory,
428 .alloc_by_type = agp_generic_alloc_by_type,
429 .free_by_type = agp_generic_free_by_type,
430 .agp_alloc_page = agp_generic_alloc_page,
431 .agp_destroy_page = agp_generic_destroy_page,
432 };
433
434
435 static struct agp_device_ids ati_agp_device_ids[] __devinitdata =
436 {
437 {
438 .device_id = PCI_DEVICE_ID_ATI_RS100,
439 .chipset_name = "IGP320/M",
440 },
441 {
442 .device_id = PCI_DEVICE_ID_ATI_RS200,
443 .chipset_name = "IGP330/340/345/350/M",
444 },
445 {
446 .device_id = PCI_DEVICE_ID_ATI_RS200_B,
447 .chipset_name = "IGP345M",
448 },
449 {
450 .device_id = PCI_DEVICE_ID_ATI_RS250,
451 .chipset_name = "IGP7000/M",
452 },
453 {
454 .device_id = PCI_DEVICE_ID_ATI_RS300_100,
455 .chipset_name = "IGP9100/M",
456 },
457 {
458 .device_id = PCI_DEVICE_ID_ATI_RS300_133,
459 .chipset_name = "IGP9100/M",
460 },
461 {
462 .device_id = PCI_DEVICE_ID_ATI_RS300_166,
463 .chipset_name = "IGP9100/M",
464 },
465 {
466 .device_id = PCI_DEVICE_ID_ATI_RS300_200,
467 .chipset_name = "IGP9100/M",
468 },
469 {
470 .device_id = PCI_DEVICE_ID_ATI_RS350_200,
471 .chipset_name = "IGP9100/M",
472 },
473 { }, /* dummy final entry, always present */
474 };
475
476 static int __devinit agp_ati_probe(struct pci_dev *pdev,
477 const struct pci_device_id *ent)
478 {
479 struct agp_device_ids *devs = ati_agp_device_ids;
480 struct agp_bridge_data *bridge;
481 u8 cap_ptr;
482 int j;
483
484 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
485 if (!cap_ptr)
486 return -ENODEV;
487
488 /* probe for known chipsets */
489 for (j = 0; devs[j].chipset_name; j++) {
490 if (pdev->device == devs[j].device_id)
491 goto found;
492 }
493
494 printk(KERN_ERR PFX
495 "Unsupported Ati chipset (device id: %04x)\n", pdev->device);
496 return -ENODEV;
497
498 found:
499 bridge = agp_alloc_bridge();
500 if (!bridge)
501 return -ENOMEM;
502
503 bridge->dev = pdev;
504 bridge->capndx = cap_ptr;
505
506 bridge->driver = &ati_generic_bridge;
507
508 printk(KERN_INFO PFX "Detected Ati %s chipset\n",
509 devs[j].chipset_name);
510
511 /* Fill in the mode register */
512 pci_read_config_dword(pdev,
513 bridge->capndx+PCI_AGP_STATUS,
514 &bridge->mode);
515
516 pci_set_drvdata(pdev, bridge);
517 return agp_add_bridge(bridge);
518 }
519
520 static void __devexit agp_ati_remove(struct pci_dev *pdev)
521 {
522 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
523
524 agp_remove_bridge(bridge);
525 agp_put_bridge(bridge);
526 }
527
528 static struct pci_device_id agp_ati_pci_table[] = {
529 {
530 .class = (PCI_CLASS_BRIDGE_HOST << 8),
531 .class_mask = ~0,
532 .vendor = PCI_VENDOR_ID_ATI,
533 .device = PCI_ANY_ID,
534 .subvendor = PCI_ANY_ID,
535 .subdevice = PCI_ANY_ID,
536 },
537 { }
538 };
539
540 MODULE_DEVICE_TABLE(pci, agp_ati_pci_table);
541
542 static struct pci_driver agp_ati_pci_driver = {
543 .name = "agpgart-ati",
544 .id_table = agp_ati_pci_table,
545 .probe = agp_ati_probe,
546 .remove = agp_ati_remove,
547 #ifdef CONFIG_PM
548 .resume = agp_ati_resume,
549 .suspend = agp_ati_suspend,
550 #endif
551 };
552
553 static int __init agp_ati_init(void)
554 {
555 if (agp_off)
556 return -EINVAL;
557 return pci_register_driver(&agp_ati_pci_driver);
558 }
559
560 static void __exit agp_ati_cleanup(void)
561 {
562 pci_unregister_driver(&agp_ati_pci_driver);
563 }
564
565 module_init(agp_ati_init);
566 module_exit(agp_ati_cleanup);
567
568 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
569 MODULE_LICENSE("GPL and additional rights");
570
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