agp: use dev_printk when possible
[deliverable/linux.git] / drivers / char / agp / generic.c
1 /*
2 * AGPGART driver.
3 * Copyright (C) 2004 Silicon Graphics, Inc.
4 * Copyright (C) 2002-2005 Dave Jones.
5 * Copyright (C) 1999 Jeff Hartmann.
6 * Copyright (C) 1999 Precision Insight, Inc.
7 * Copyright (C) 1999 Xi Graphics, Inc.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included
17 * in all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
25 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * TODO:
28 * - Allocate more than order 0 pages to avoid too much linear map splitting.
29 */
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/init.h>
33 #include <linux/pagemap.h>
34 #include <linux/miscdevice.h>
35 #include <linux/pm.h>
36 #include <linux/agp_backend.h>
37 #include <linux/vmalloc.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/mm.h>
40 #include <linux/sched.h>
41 #include <asm/io.h>
42 #include <asm/cacheflush.h>
43 #include <asm/pgtable.h>
44 #include "agp.h"
45
46 __u32 *agp_gatt_table;
47 int agp_memory_reserved;
48
49 /*
50 * Needed by the Nforce GART driver for the time being. Would be
51 * nice to do this some other way instead of needing this export.
52 */
53 EXPORT_SYMBOL_GPL(agp_memory_reserved);
54
55 /*
56 * Generic routines for handling agp_memory structures -
57 * They use the basic page allocation routines to do the brunt of the work.
58 */
59
60 void agp_free_key(int key)
61 {
62 if (key < 0)
63 return;
64
65 if (key < MAXKEY)
66 clear_bit(key, agp_bridge->key_list);
67 }
68 EXPORT_SYMBOL(agp_free_key);
69
70
71 static int agp_get_key(void)
72 {
73 int bit;
74
75 bit = find_first_zero_bit(agp_bridge->key_list, MAXKEY);
76 if (bit < MAXKEY) {
77 set_bit(bit, agp_bridge->key_list);
78 return bit;
79 }
80 return -1;
81 }
82
83 void agp_flush_chipset(struct agp_bridge_data *bridge)
84 {
85 if (bridge->driver->chipset_flush)
86 bridge->driver->chipset_flush(bridge);
87 }
88 EXPORT_SYMBOL(agp_flush_chipset);
89
90 /*
91 * Use kmalloc if possible for the page list. Otherwise fall back to
92 * vmalloc. This speeds things up and also saves memory for small AGP
93 * regions.
94 */
95
96 void agp_alloc_page_array(size_t size, struct agp_memory *mem)
97 {
98 mem->memory = NULL;
99 mem->vmalloc_flag = false;
100
101 if (size <= 2*PAGE_SIZE)
102 mem->memory = kmalloc(size, GFP_KERNEL | __GFP_NORETRY);
103 if (mem->memory == NULL) {
104 mem->memory = vmalloc(size);
105 mem->vmalloc_flag = true;
106 }
107 }
108 EXPORT_SYMBOL(agp_alloc_page_array);
109
110 void agp_free_page_array(struct agp_memory *mem)
111 {
112 if (mem->vmalloc_flag) {
113 vfree(mem->memory);
114 } else {
115 kfree(mem->memory);
116 }
117 }
118 EXPORT_SYMBOL(agp_free_page_array);
119
120
121 static struct agp_memory *agp_create_user_memory(unsigned long num_agp_pages)
122 {
123 struct agp_memory *new;
124 unsigned long alloc_size = num_agp_pages*sizeof(struct page *);
125
126 new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
127 if (new == NULL)
128 return NULL;
129
130 new->key = agp_get_key();
131
132 if (new->key < 0) {
133 kfree(new);
134 return NULL;
135 }
136
137 agp_alloc_page_array(alloc_size, new);
138
139 if (new->memory == NULL) {
140 agp_free_key(new->key);
141 kfree(new);
142 return NULL;
143 }
144 new->num_scratch_pages = 0;
145 return new;
146 }
147
148 struct agp_memory *agp_create_memory(int scratch_pages)
149 {
150 struct agp_memory *new;
151
152 new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
153 if (new == NULL)
154 return NULL;
155
156 new->key = agp_get_key();
157
158 if (new->key < 0) {
159 kfree(new);
160 return NULL;
161 }
162
163 agp_alloc_page_array(PAGE_SIZE * scratch_pages, new);
164
165 if (new->memory == NULL) {
166 agp_free_key(new->key);
167 kfree(new);
168 return NULL;
169 }
170 new->num_scratch_pages = scratch_pages;
171 new->type = AGP_NORMAL_MEMORY;
172 return new;
173 }
174 EXPORT_SYMBOL(agp_create_memory);
175
176 /**
177 * agp_free_memory - free memory associated with an agp_memory pointer.
178 *
179 * @curr: agp_memory pointer to be freed.
180 *
181 * It is the only function that can be called when the backend is not owned
182 * by the caller. (So it can free memory on client death.)
183 */
184 void agp_free_memory(struct agp_memory *curr)
185 {
186 size_t i;
187
188 if (curr == NULL)
189 return;
190
191 if (curr->is_bound)
192 agp_unbind_memory(curr);
193
194 if (curr->type >= AGP_USER_TYPES) {
195 agp_generic_free_by_type(curr);
196 return;
197 }
198
199 if (curr->type != 0) {
200 curr->bridge->driver->free_by_type(curr);
201 return;
202 }
203 if (curr->page_count != 0) {
204 for (i = 0; i < curr->page_count; i++) {
205 curr->memory[i] = (unsigned long)gart_to_virt(curr->memory[i]);
206 curr->bridge->driver->agp_destroy_page((void *)curr->memory[i],
207 AGP_PAGE_DESTROY_UNMAP);
208 }
209 for (i = 0; i < curr->page_count; i++) {
210 curr->bridge->driver->agp_destroy_page((void *)curr->memory[i],
211 AGP_PAGE_DESTROY_FREE);
212 }
213 }
214 agp_free_key(curr->key);
215 agp_free_page_array(curr);
216 kfree(curr);
217 }
218 EXPORT_SYMBOL(agp_free_memory);
219
220 #define ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
221
222 /**
223 * agp_allocate_memory - allocate a group of pages of a certain type.
224 *
225 * @page_count: size_t argument of the number of pages
226 * @type: u32 argument of the type of memory to be allocated.
227 *
228 * Every agp bridge device will allow you to allocate AGP_NORMAL_MEMORY which
229 * maps to physical ram. Any other type is device dependent.
230 *
231 * It returns NULL whenever memory is unavailable.
232 */
233 struct agp_memory *agp_allocate_memory(struct agp_bridge_data *bridge,
234 size_t page_count, u32 type)
235 {
236 int scratch_pages;
237 struct agp_memory *new;
238 size_t i;
239
240 if (!bridge)
241 return NULL;
242
243 if ((atomic_read(&bridge->current_memory_agp) + page_count) > bridge->max_memory_agp)
244 return NULL;
245
246 if (type >= AGP_USER_TYPES) {
247 new = agp_generic_alloc_user(page_count, type);
248 if (new)
249 new->bridge = bridge;
250 return new;
251 }
252
253 if (type != 0) {
254 new = bridge->driver->alloc_by_type(page_count, type);
255 if (new)
256 new->bridge = bridge;
257 return new;
258 }
259
260 scratch_pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
261
262 new = agp_create_memory(scratch_pages);
263
264 if (new == NULL)
265 return NULL;
266
267 for (i = 0; i < page_count; i++) {
268 void *addr = bridge->driver->agp_alloc_page(bridge);
269
270 if (addr == NULL) {
271 agp_free_memory(new);
272 return NULL;
273 }
274 new->memory[i] = virt_to_gart(addr);
275 new->page_count++;
276 }
277 new->bridge = bridge;
278
279 return new;
280 }
281 EXPORT_SYMBOL(agp_allocate_memory);
282
283
284 /* End - Generic routines for handling agp_memory structures */
285
286
287 static int agp_return_size(void)
288 {
289 int current_size;
290 void *temp;
291
292 temp = agp_bridge->current_size;
293
294 switch (agp_bridge->driver->size_type) {
295 case U8_APER_SIZE:
296 current_size = A_SIZE_8(temp)->size;
297 break;
298 case U16_APER_SIZE:
299 current_size = A_SIZE_16(temp)->size;
300 break;
301 case U32_APER_SIZE:
302 current_size = A_SIZE_32(temp)->size;
303 break;
304 case LVL2_APER_SIZE:
305 current_size = A_SIZE_LVL2(temp)->size;
306 break;
307 case FIXED_APER_SIZE:
308 current_size = A_SIZE_FIX(temp)->size;
309 break;
310 default:
311 current_size = 0;
312 break;
313 }
314
315 current_size -= (agp_memory_reserved / (1024*1024));
316 if (current_size <0)
317 current_size = 0;
318 return current_size;
319 }
320
321
322 int agp_num_entries(void)
323 {
324 int num_entries;
325 void *temp;
326
327 temp = agp_bridge->current_size;
328
329 switch (agp_bridge->driver->size_type) {
330 case U8_APER_SIZE:
331 num_entries = A_SIZE_8(temp)->num_entries;
332 break;
333 case U16_APER_SIZE:
334 num_entries = A_SIZE_16(temp)->num_entries;
335 break;
336 case U32_APER_SIZE:
337 num_entries = A_SIZE_32(temp)->num_entries;
338 break;
339 case LVL2_APER_SIZE:
340 num_entries = A_SIZE_LVL2(temp)->num_entries;
341 break;
342 case FIXED_APER_SIZE:
343 num_entries = A_SIZE_FIX(temp)->num_entries;
344 break;
345 default:
346 num_entries = 0;
347 break;
348 }
349
350 num_entries -= agp_memory_reserved>>PAGE_SHIFT;
351 if (num_entries<0)
352 num_entries = 0;
353 return num_entries;
354 }
355 EXPORT_SYMBOL_GPL(agp_num_entries);
356
357
358 /**
359 * agp_copy_info - copy bridge state information
360 *
361 * @info: agp_kern_info pointer. The caller should insure that this pointer is valid.
362 *
363 * This function copies information about the agp bridge device and the state of
364 * the agp backend into an agp_kern_info pointer.
365 */
366 int agp_copy_info(struct agp_bridge_data *bridge, struct agp_kern_info *info)
367 {
368 memset(info, 0, sizeof(struct agp_kern_info));
369 if (!bridge) {
370 info->chipset = NOT_SUPPORTED;
371 return -EIO;
372 }
373
374 info->version.major = bridge->version->major;
375 info->version.minor = bridge->version->minor;
376 info->chipset = SUPPORTED;
377 info->device = bridge->dev;
378 if (bridge->mode & AGPSTAT_MODE_3_0)
379 info->mode = bridge->mode & ~AGP3_RESERVED_MASK;
380 else
381 info->mode = bridge->mode & ~AGP2_RESERVED_MASK;
382 info->aper_base = bridge->gart_bus_addr;
383 info->aper_size = agp_return_size();
384 info->max_memory = bridge->max_memory_agp;
385 info->current_memory = atomic_read(&bridge->current_memory_agp);
386 info->cant_use_aperture = bridge->driver->cant_use_aperture;
387 info->vm_ops = bridge->vm_ops;
388 info->page_mask = ~0UL;
389 return 0;
390 }
391 EXPORT_SYMBOL(agp_copy_info);
392
393 /* End - Routine to copy over information structure */
394
395 /*
396 * Routines for handling swapping of agp_memory into the GATT -
397 * These routines take agp_memory and insert them into the GATT.
398 * They call device specific routines to actually write to the GATT.
399 */
400
401 /**
402 * agp_bind_memory - Bind an agp_memory structure into the GATT.
403 *
404 * @curr: agp_memory pointer
405 * @pg_start: an offset into the graphics aperture translation table
406 *
407 * It returns -EINVAL if the pointer == NULL.
408 * It returns -EBUSY if the area of the table requested is already in use.
409 */
410 int agp_bind_memory(struct agp_memory *curr, off_t pg_start)
411 {
412 int ret_val;
413
414 if (curr == NULL)
415 return -EINVAL;
416
417 if (curr->is_bound) {
418 printk(KERN_INFO PFX "memory %p is already bound!\n", curr);
419 return -EINVAL;
420 }
421 if (!curr->is_flushed) {
422 curr->bridge->driver->cache_flush();
423 curr->is_flushed = true;
424 }
425 ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type);
426
427 if (ret_val != 0)
428 return ret_val;
429
430 curr->is_bound = true;
431 curr->pg_start = pg_start;
432 return 0;
433 }
434 EXPORT_SYMBOL(agp_bind_memory);
435
436
437 /**
438 * agp_unbind_memory - Removes an agp_memory structure from the GATT
439 *
440 * @curr: agp_memory pointer to be removed from the GATT.
441 *
442 * It returns -EINVAL if this piece of agp_memory is not currently bound to
443 * the graphics aperture translation table or if the agp_memory pointer == NULL
444 */
445 int agp_unbind_memory(struct agp_memory *curr)
446 {
447 int ret_val;
448
449 if (curr == NULL)
450 return -EINVAL;
451
452 if (!curr->is_bound) {
453 printk(KERN_INFO PFX "memory %p was not bound!\n", curr);
454 return -EINVAL;
455 }
456
457 ret_val = curr->bridge->driver->remove_memory(curr, curr->pg_start, curr->type);
458
459 if (ret_val != 0)
460 return ret_val;
461
462 curr->is_bound = false;
463 curr->pg_start = 0;
464 return 0;
465 }
466 EXPORT_SYMBOL(agp_unbind_memory);
467
468 /* End - Routines for handling swapping of agp_memory into the GATT */
469
470
471 /* Generic Agp routines - Start */
472 static void agp_v2_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
473 {
474 u32 tmp;
475
476 if (*requested_mode & AGP2_RESERVED_MASK) {
477 printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
478 *requested_mode & AGP2_RESERVED_MASK, *requested_mode);
479 *requested_mode &= ~AGP2_RESERVED_MASK;
480 }
481
482 /*
483 * Some dumb bridges are programmed to disobey the AGP2 spec.
484 * This is likely a BIOS misprogramming rather than poweron default, or
485 * it would be a lot more common.
486 * https://bugs.freedesktop.org/show_bug.cgi?id=8816
487 * AGPv2 spec 6.1.9 states:
488 * The RATE field indicates the data transfer rates supported by this
489 * device. A.G.P. devices must report all that apply.
490 * Fix them up as best we can.
491 */
492 switch (*bridge_agpstat & 7) {
493 case 4:
494 *bridge_agpstat |= (AGPSTAT2_2X | AGPSTAT2_1X);
495 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x4 rate"
496 "Fixing up support for x2 & x1\n");
497 break;
498 case 2:
499 *bridge_agpstat |= AGPSTAT2_1X;
500 printk(KERN_INFO PFX "BIOS bug. AGP bridge claims to only support x2 rate"
501 "Fixing up support for x1\n");
502 break;
503 default:
504 break;
505 }
506
507 /* Check the speed bits make sense. Only one should be set. */
508 tmp = *requested_mode & 7;
509 switch (tmp) {
510 case 0:
511 printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to x1 mode.\n", current->comm);
512 *requested_mode |= AGPSTAT2_1X;
513 break;
514 case 1:
515 case 2:
516 break;
517 case 3:
518 *requested_mode &= ~(AGPSTAT2_1X); /* rate=2 */
519 break;
520 case 4:
521 break;
522 case 5:
523 case 6:
524 case 7:
525 *requested_mode &= ~(AGPSTAT2_1X|AGPSTAT2_2X); /* rate=4*/
526 break;
527 }
528
529 /* disable SBA if it's not supported */
530 if (!((*bridge_agpstat & AGPSTAT_SBA) && (*vga_agpstat & AGPSTAT_SBA) && (*requested_mode & AGPSTAT_SBA)))
531 *bridge_agpstat &= ~AGPSTAT_SBA;
532
533 /* Set rate */
534 if (!((*bridge_agpstat & AGPSTAT2_4X) && (*vga_agpstat & AGPSTAT2_4X) && (*requested_mode & AGPSTAT2_4X)))
535 *bridge_agpstat &= ~AGPSTAT2_4X;
536
537 if (!((*bridge_agpstat & AGPSTAT2_2X) && (*vga_agpstat & AGPSTAT2_2X) && (*requested_mode & AGPSTAT2_2X)))
538 *bridge_agpstat &= ~AGPSTAT2_2X;
539
540 if (!((*bridge_agpstat & AGPSTAT2_1X) && (*vga_agpstat & AGPSTAT2_1X) && (*requested_mode & AGPSTAT2_1X)))
541 *bridge_agpstat &= ~AGPSTAT2_1X;
542
543 /* Now we know what mode it should be, clear out the unwanted bits. */
544 if (*bridge_agpstat & AGPSTAT2_4X)
545 *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_2X); /* 4X */
546
547 if (*bridge_agpstat & AGPSTAT2_2X)
548 *bridge_agpstat &= ~(AGPSTAT2_1X | AGPSTAT2_4X); /* 2X */
549
550 if (*bridge_agpstat & AGPSTAT2_1X)
551 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X); /* 1X */
552
553 /* Apply any errata. */
554 if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
555 *bridge_agpstat &= ~AGPSTAT_FW;
556
557 if (agp_bridge->flags & AGP_ERRATA_SBA)
558 *bridge_agpstat &= ~AGPSTAT_SBA;
559
560 if (agp_bridge->flags & AGP_ERRATA_1X) {
561 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
562 *bridge_agpstat |= AGPSTAT2_1X;
563 }
564
565 /* If we've dropped down to 1X, disable fast writes. */
566 if (*bridge_agpstat & AGPSTAT2_1X)
567 *bridge_agpstat &= ~AGPSTAT_FW;
568 }
569
570 /*
571 * requested_mode = Mode requested by (typically) X.
572 * bridge_agpstat = PCI_AGP_STATUS from agp bridge.
573 * vga_agpstat = PCI_AGP_STATUS from graphic card.
574 */
575 static void agp_v3_parse_one(u32 *requested_mode, u32 *bridge_agpstat, u32 *vga_agpstat)
576 {
577 u32 origbridge=*bridge_agpstat, origvga=*vga_agpstat;
578 u32 tmp;
579
580 if (*requested_mode & AGP3_RESERVED_MASK) {
581 printk(KERN_INFO PFX "reserved bits set (%x) in mode 0x%x. Fixed.\n",
582 *requested_mode & AGP3_RESERVED_MASK, *requested_mode);
583 *requested_mode &= ~AGP3_RESERVED_MASK;
584 }
585
586 /* Check the speed bits make sense. */
587 tmp = *requested_mode & 7;
588 if (tmp == 0) {
589 printk(KERN_INFO PFX "%s tried to set rate=x0. Setting to AGP3 x4 mode.\n", current->comm);
590 *requested_mode |= AGPSTAT3_4X;
591 }
592 if (tmp >= 3) {
593 printk(KERN_INFO PFX "%s tried to set rate=x%d. Setting to AGP3 x8 mode.\n", current->comm, tmp * 4);
594 *requested_mode = (*requested_mode & ~7) | AGPSTAT3_8X;
595 }
596
597 /* ARQSZ - Set the value to the maximum one.
598 * Don't allow the mode register to override values. */
599 *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_ARQSZ) |
600 max_t(u32,(*bridge_agpstat & AGPSTAT_ARQSZ),(*vga_agpstat & AGPSTAT_ARQSZ)));
601
602 /* Calibration cycle.
603 * Don't allow the mode register to override values. */
604 *bridge_agpstat = ((*bridge_agpstat & ~AGPSTAT_CAL_MASK) |
605 min_t(u32,(*bridge_agpstat & AGPSTAT_CAL_MASK),(*vga_agpstat & AGPSTAT_CAL_MASK)));
606
607 /* SBA *must* be supported for AGP v3 */
608 *bridge_agpstat |= AGPSTAT_SBA;
609
610 /*
611 * Set speed.
612 * Check for invalid speeds. This can happen when applications
613 * written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware
614 */
615 if (*requested_mode & AGPSTAT_MODE_3_0) {
616 /*
617 * Caller hasn't a clue what it is doing. Bridge is in 3.0 mode,
618 * have been passed a 3.0 mode, but with 2.x speed bits set.
619 * AGP2.x 4x -> AGP3.0 4x.
620 */
621 if (*requested_mode & AGPSTAT2_4X) {
622 printk(KERN_INFO PFX "%s passes broken AGP3 flags (%x). Fixed.\n",
623 current->comm, *requested_mode);
624 *requested_mode &= ~AGPSTAT2_4X;
625 *requested_mode |= AGPSTAT3_4X;
626 }
627 } else {
628 /*
629 * The caller doesn't know what they are doing. We are in 3.0 mode,
630 * but have been passed an AGP 2.x mode.
631 * Convert AGP 1x,2x,4x -> AGP 3.0 4x.
632 */
633 printk(KERN_INFO PFX "%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.\n",
634 current->comm, *requested_mode);
635 *requested_mode &= ~(AGPSTAT2_4X | AGPSTAT2_2X | AGPSTAT2_1X);
636 *requested_mode |= AGPSTAT3_4X;
637 }
638
639 if (*requested_mode & AGPSTAT3_8X) {
640 if (!(*bridge_agpstat & AGPSTAT3_8X)) {
641 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
642 *bridge_agpstat |= AGPSTAT3_4X;
643 printk(KERN_INFO PFX "%s requested AGPx8 but bridge not capable.\n", current->comm);
644 return;
645 }
646 if (!(*vga_agpstat & AGPSTAT3_8X)) {
647 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
648 *bridge_agpstat |= AGPSTAT3_4X;
649 printk(KERN_INFO PFX "%s requested AGPx8 but graphic card not capable.\n", current->comm);
650 return;
651 }
652 /* All set, bridge & device can do AGP x8*/
653 *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
654 goto done;
655
656 } else if (*requested_mode & AGPSTAT3_4X) {
657 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
658 *bridge_agpstat |= AGPSTAT3_4X;
659 goto done;
660
661 } else {
662
663 /*
664 * If we didn't specify an AGP mode, we see if both
665 * the graphics card, and the bridge can do x8, and use if so.
666 * If not, we fall back to x4 mode.
667 */
668 if ((*bridge_agpstat & AGPSTAT3_8X) && (*vga_agpstat & AGPSTAT3_8X)) {
669 printk(KERN_INFO PFX "No AGP mode specified. Setting to highest mode "
670 "supported by bridge & card (x8).\n");
671 *bridge_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
672 *vga_agpstat &= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
673 } else {
674 printk(KERN_INFO PFX "Fell back to AGPx4 mode because");
675 if (!(*bridge_agpstat & AGPSTAT3_8X)) {
676 printk(KERN_INFO PFX "bridge couldn't do x8. bridge_agpstat:%x (orig=%x)\n",
677 *bridge_agpstat, origbridge);
678 *bridge_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
679 *bridge_agpstat |= AGPSTAT3_4X;
680 }
681 if (!(*vga_agpstat & AGPSTAT3_8X)) {
682 printk(KERN_INFO PFX "graphics card couldn't do x8. vga_agpstat:%x (orig=%x)\n",
683 *vga_agpstat, origvga);
684 *vga_agpstat &= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
685 *vga_agpstat |= AGPSTAT3_4X;
686 }
687 }
688 }
689
690 done:
691 /* Apply any errata. */
692 if (agp_bridge->flags & AGP_ERRATA_FASTWRITES)
693 *bridge_agpstat &= ~AGPSTAT_FW;
694
695 if (agp_bridge->flags & AGP_ERRATA_SBA)
696 *bridge_agpstat &= ~AGPSTAT_SBA;
697
698 if (agp_bridge->flags & AGP_ERRATA_1X) {
699 *bridge_agpstat &= ~(AGPSTAT2_2X | AGPSTAT2_4X);
700 *bridge_agpstat |= AGPSTAT2_1X;
701 }
702 }
703
704
705 /**
706 * agp_collect_device_status - determine correct agp_cmd from various agp_stat's
707 * @bridge: an agp_bridge_data struct allocated for the AGP host bridge.
708 * @requested_mode: requested agp_stat from userspace (Typically from X)
709 * @bridge_agpstat: current agp_stat from AGP bridge.
710 *
711 * This function will hunt for an AGP graphics card, and try to match
712 * the requested mode to the capabilities of both the bridge and the card.
713 */
714 u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 requested_mode, u32 bridge_agpstat)
715 {
716 struct pci_dev *device = NULL;
717 u32 vga_agpstat;
718 u8 cap_ptr;
719
720 for (;;) {
721 device = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, device);
722 if (!device) {
723 printk(KERN_INFO PFX "Couldn't find an AGP VGA controller.\n");
724 return 0;
725 }
726 cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP);
727 if (cap_ptr)
728 break;
729 }
730
731 /*
732 * Ok, here we have a AGP device. Disable impossible
733 * settings, and adjust the readqueue to the minimum.
734 */
735 pci_read_config_dword(device, cap_ptr+PCI_AGP_STATUS, &vga_agpstat);
736
737 /* adjust RQ depth */
738 bridge_agpstat = ((bridge_agpstat & ~AGPSTAT_RQ_DEPTH) |
739 min_t(u32, (requested_mode & AGPSTAT_RQ_DEPTH),
740 min_t(u32, (bridge_agpstat & AGPSTAT_RQ_DEPTH), (vga_agpstat & AGPSTAT_RQ_DEPTH))));
741
742 /* disable FW if it's not supported */
743 if (!((bridge_agpstat & AGPSTAT_FW) &&
744 (vga_agpstat & AGPSTAT_FW) &&
745 (requested_mode & AGPSTAT_FW)))
746 bridge_agpstat &= ~AGPSTAT_FW;
747
748 /* Check to see if we are operating in 3.0 mode */
749 if (agp_bridge->mode & AGPSTAT_MODE_3_0)
750 agp_v3_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
751 else
752 agp_v2_parse_one(&requested_mode, &bridge_agpstat, &vga_agpstat);
753
754 pci_dev_put(device);
755 return bridge_agpstat;
756 }
757 EXPORT_SYMBOL(agp_collect_device_status);
758
759
760 void agp_device_command(u32 bridge_agpstat, bool agp_v3)
761 {
762 struct pci_dev *device = NULL;
763 int mode;
764
765 mode = bridge_agpstat & 0x7;
766 if (agp_v3)
767 mode *= 4;
768
769 for_each_pci_dev(device) {
770 u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
771 if (!agp)
772 continue;
773
774 dev_info(&device->dev, "putting AGP V%d device into %dx mode\n",
775 agp_v3 ? 3 : 2, mode);
776 pci_write_config_dword(device, agp + PCI_AGP_COMMAND, bridge_agpstat);
777 }
778 }
779 EXPORT_SYMBOL(agp_device_command);
780
781
782 void get_agp_version(struct agp_bridge_data *bridge)
783 {
784 u32 ncapid;
785
786 /* Exit early if already set by errata workarounds. */
787 if (bridge->major_version != 0)
788 return;
789
790 pci_read_config_dword(bridge->dev, bridge->capndx, &ncapid);
791 bridge->major_version = (ncapid >> AGP_MAJOR_VERSION_SHIFT) & 0xf;
792 bridge->minor_version = (ncapid >> AGP_MINOR_VERSION_SHIFT) & 0xf;
793 }
794 EXPORT_SYMBOL(get_agp_version);
795
796
797 void agp_generic_enable(struct agp_bridge_data *bridge, u32 requested_mode)
798 {
799 u32 bridge_agpstat, temp;
800
801 get_agp_version(agp_bridge);
802
803 dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n",
804 agp_bridge->major_version, agp_bridge->minor_version);
805
806 pci_read_config_dword(agp_bridge->dev,
807 agp_bridge->capndx + PCI_AGP_STATUS, &bridge_agpstat);
808
809 bridge_agpstat = agp_collect_device_status(agp_bridge, requested_mode, bridge_agpstat);
810 if (bridge_agpstat == 0)
811 /* Something bad happened. FIXME: Return error code? */
812 return;
813
814 bridge_agpstat |= AGPSTAT_AGP_ENABLE;
815
816 /* Do AGP version specific frobbing. */
817 if (bridge->major_version >= 3) {
818 if (bridge->mode & AGPSTAT_MODE_3_0) {
819 /* If we have 3.5, we can do the isoch stuff. */
820 if (bridge->minor_version >= 5)
821 agp_3_5_enable(bridge);
822 agp_device_command(bridge_agpstat, true);
823 return;
824 } else {
825 /* Disable calibration cycle in RX91<1> when not in AGP3.0 mode of operation.*/
826 bridge_agpstat &= ~(7<<10) ;
827 pci_read_config_dword(bridge->dev,
828 bridge->capndx+AGPCTRL, &temp);
829 temp |= (1<<9);
830 pci_write_config_dword(bridge->dev,
831 bridge->capndx+AGPCTRL, temp);
832
833 dev_info(&bridge->dev->dev, "bridge is in legacy mode, falling back to 2.x\n");
834 }
835 }
836
837 /* AGP v<3 */
838 agp_device_command(bridge_agpstat, false);
839 }
840 EXPORT_SYMBOL(agp_generic_enable);
841
842
843 int agp_generic_create_gatt_table(struct agp_bridge_data *bridge)
844 {
845 char *table;
846 char *table_end;
847 int size;
848 int page_order;
849 int num_entries;
850 int i;
851 void *temp;
852 struct page *page;
853
854 /* The generic routines can't handle 2 level gatt's */
855 if (bridge->driver->size_type == LVL2_APER_SIZE)
856 return -EINVAL;
857
858 table = NULL;
859 i = bridge->aperture_size_idx;
860 temp = bridge->current_size;
861 size = page_order = num_entries = 0;
862
863 if (bridge->driver->size_type != FIXED_APER_SIZE) {
864 do {
865 switch (bridge->driver->size_type) {
866 case U8_APER_SIZE:
867 size = A_SIZE_8(temp)->size;
868 page_order =
869 A_SIZE_8(temp)->page_order;
870 num_entries =
871 A_SIZE_8(temp)->num_entries;
872 break;
873 case U16_APER_SIZE:
874 size = A_SIZE_16(temp)->size;
875 page_order = A_SIZE_16(temp)->page_order;
876 num_entries = A_SIZE_16(temp)->num_entries;
877 break;
878 case U32_APER_SIZE:
879 size = A_SIZE_32(temp)->size;
880 page_order = A_SIZE_32(temp)->page_order;
881 num_entries = A_SIZE_32(temp)->num_entries;
882 break;
883 /* This case will never really happen. */
884 case FIXED_APER_SIZE:
885 case LVL2_APER_SIZE:
886 default:
887 size = page_order = num_entries = 0;
888 break;
889 }
890
891 table = alloc_gatt_pages(page_order);
892
893 if (table == NULL) {
894 i++;
895 switch (bridge->driver->size_type) {
896 case U8_APER_SIZE:
897 bridge->current_size = A_IDX8(bridge);
898 break;
899 case U16_APER_SIZE:
900 bridge->current_size = A_IDX16(bridge);
901 break;
902 case U32_APER_SIZE:
903 bridge->current_size = A_IDX32(bridge);
904 break;
905 /* These cases will never really happen. */
906 case FIXED_APER_SIZE:
907 case LVL2_APER_SIZE:
908 default:
909 break;
910 }
911 temp = bridge->current_size;
912 } else {
913 bridge->aperture_size_idx = i;
914 }
915 } while (!table && (i < bridge->driver->num_aperture_sizes));
916 } else {
917 size = ((struct aper_size_info_fixed *) temp)->size;
918 page_order = ((struct aper_size_info_fixed *) temp)->page_order;
919 num_entries = ((struct aper_size_info_fixed *) temp)->num_entries;
920 table = alloc_gatt_pages(page_order);
921 }
922
923 if (table == NULL)
924 return -ENOMEM;
925
926 table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
927
928 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
929 SetPageReserved(page);
930
931 bridge->gatt_table_real = (u32 *) table;
932 agp_gatt_table = (void *)table;
933
934 bridge->driver->cache_flush();
935 #ifdef CONFIG_X86
936 set_memory_uc((unsigned long)table, 1 << page_order);
937 bridge->gatt_table = (void *)table;
938 #else
939 bridge->gatt_table = ioremap_nocache(virt_to_gart(table),
940 (PAGE_SIZE * (1 << page_order)));
941 bridge->driver->cache_flush();
942 #endif
943
944 if (bridge->gatt_table == NULL) {
945 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
946 ClearPageReserved(page);
947
948 free_gatt_pages(table, page_order);
949
950 return -ENOMEM;
951 }
952 bridge->gatt_bus_addr = virt_to_gart(bridge->gatt_table_real);
953
954 /* AK: bogus, should encode addresses > 4GB */
955 for (i = 0; i < num_entries; i++) {
956 writel(bridge->scratch_page, bridge->gatt_table+i);
957 readl(bridge->gatt_table+i); /* PCI Posting. */
958 }
959
960 return 0;
961 }
962 EXPORT_SYMBOL(agp_generic_create_gatt_table);
963
964 int agp_generic_free_gatt_table(struct agp_bridge_data *bridge)
965 {
966 int page_order;
967 char *table, *table_end;
968 void *temp;
969 struct page *page;
970
971 temp = bridge->current_size;
972
973 switch (bridge->driver->size_type) {
974 case U8_APER_SIZE:
975 page_order = A_SIZE_8(temp)->page_order;
976 break;
977 case U16_APER_SIZE:
978 page_order = A_SIZE_16(temp)->page_order;
979 break;
980 case U32_APER_SIZE:
981 page_order = A_SIZE_32(temp)->page_order;
982 break;
983 case FIXED_APER_SIZE:
984 page_order = A_SIZE_FIX(temp)->page_order;
985 break;
986 case LVL2_APER_SIZE:
987 /* The generic routines can't deal with 2 level gatt's */
988 return -EINVAL;
989 break;
990 default:
991 page_order = 0;
992 break;
993 }
994
995 /* Do not worry about freeing memory, because if this is
996 * called, then all agp memory is deallocated and removed
997 * from the table. */
998
999 #ifdef CONFIG_X86
1000 set_memory_wb((unsigned long)bridge->gatt_table, 1 << page_order);
1001 #else
1002 iounmap(bridge->gatt_table);
1003 #endif
1004 table = (char *) bridge->gatt_table_real;
1005 table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
1006
1007 for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
1008 ClearPageReserved(page);
1009
1010 free_gatt_pages(bridge->gatt_table_real, page_order);
1011
1012 agp_gatt_table = NULL;
1013 bridge->gatt_table = NULL;
1014 bridge->gatt_table_real = NULL;
1015 bridge->gatt_bus_addr = 0;
1016
1017 return 0;
1018 }
1019 EXPORT_SYMBOL(agp_generic_free_gatt_table);
1020
1021
1022 int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
1023 {
1024 int num_entries;
1025 size_t i;
1026 off_t j;
1027 void *temp;
1028 struct agp_bridge_data *bridge;
1029 int mask_type;
1030
1031 bridge = mem->bridge;
1032 if (!bridge)
1033 return -EINVAL;
1034
1035 if (mem->page_count == 0)
1036 return 0;
1037
1038 temp = bridge->current_size;
1039
1040 switch (bridge->driver->size_type) {
1041 case U8_APER_SIZE:
1042 num_entries = A_SIZE_8(temp)->num_entries;
1043 break;
1044 case U16_APER_SIZE:
1045 num_entries = A_SIZE_16(temp)->num_entries;
1046 break;
1047 case U32_APER_SIZE:
1048 num_entries = A_SIZE_32(temp)->num_entries;
1049 break;
1050 case FIXED_APER_SIZE:
1051 num_entries = A_SIZE_FIX(temp)->num_entries;
1052 break;
1053 case LVL2_APER_SIZE:
1054 /* The generic routines can't deal with 2 level gatt's */
1055 return -EINVAL;
1056 break;
1057 default:
1058 num_entries = 0;
1059 break;
1060 }
1061
1062 num_entries -= agp_memory_reserved/PAGE_SIZE;
1063 if (num_entries < 0) num_entries = 0;
1064
1065 if (type != mem->type)
1066 return -EINVAL;
1067
1068 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1069 if (mask_type != 0) {
1070 /* The generic routines know nothing of memory types */
1071 return -EINVAL;
1072 }
1073
1074 /* AK: could wrap */
1075 if ((pg_start + mem->page_count) > num_entries)
1076 return -EINVAL;
1077
1078 j = pg_start;
1079
1080 while (j < (pg_start + mem->page_count)) {
1081 if (!PGE_EMPTY(bridge, readl(bridge->gatt_table+j)))
1082 return -EBUSY;
1083 j++;
1084 }
1085
1086 if (!mem->is_flushed) {
1087 bridge->driver->cache_flush();
1088 mem->is_flushed = true;
1089 }
1090
1091 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
1092 writel(bridge->driver->mask_memory(bridge, mem->memory[i], mask_type),
1093 bridge->gatt_table+j);
1094 }
1095 readl(bridge->gatt_table+j-1); /* PCI Posting. */
1096
1097 bridge->driver->tlb_flush(mem);
1098 return 0;
1099 }
1100 EXPORT_SYMBOL(agp_generic_insert_memory);
1101
1102
1103 int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
1104 {
1105 size_t i;
1106 struct agp_bridge_data *bridge;
1107 int mask_type;
1108
1109 bridge = mem->bridge;
1110 if (!bridge)
1111 return -EINVAL;
1112
1113 if (mem->page_count == 0)
1114 return 0;
1115
1116 if (type != mem->type)
1117 return -EINVAL;
1118
1119 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
1120 if (mask_type != 0) {
1121 /* The generic routines know nothing of memory types */
1122 return -EINVAL;
1123 }
1124
1125 /* AK: bogus, should encode addresses > 4GB */
1126 for (i = pg_start; i < (mem->page_count + pg_start); i++) {
1127 writel(bridge->scratch_page, bridge->gatt_table+i);
1128 }
1129 readl(bridge->gatt_table+i-1); /* PCI Posting. */
1130
1131 bridge->driver->tlb_flush(mem);
1132 return 0;
1133 }
1134 EXPORT_SYMBOL(agp_generic_remove_memory);
1135
1136 struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type)
1137 {
1138 return NULL;
1139 }
1140 EXPORT_SYMBOL(agp_generic_alloc_by_type);
1141
1142 void agp_generic_free_by_type(struct agp_memory *curr)
1143 {
1144 agp_free_page_array(curr);
1145 agp_free_key(curr->key);
1146 kfree(curr);
1147 }
1148 EXPORT_SYMBOL(agp_generic_free_by_type);
1149
1150 struct agp_memory *agp_generic_alloc_user(size_t page_count, int type)
1151 {
1152 struct agp_memory *new;
1153 int i;
1154 int pages;
1155
1156 pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE;
1157 new = agp_create_user_memory(page_count);
1158 if (new == NULL)
1159 return NULL;
1160
1161 for (i = 0; i < page_count; i++)
1162 new->memory[i] = 0;
1163 new->page_count = 0;
1164 new->type = type;
1165 new->num_scratch_pages = pages;
1166
1167 return new;
1168 }
1169 EXPORT_SYMBOL(agp_generic_alloc_user);
1170
1171 /*
1172 * Basic Page Allocation Routines -
1173 * These routines handle page allocation and by default they reserve the allocated
1174 * memory. They also handle incrementing the current_memory_agp value, Which is checked
1175 * against a maximum value.
1176 */
1177
1178 void *agp_generic_alloc_page(struct agp_bridge_data *bridge)
1179 {
1180 struct page * page;
1181
1182 page = alloc_page(GFP_KERNEL | GFP_DMA32);
1183 if (page == NULL)
1184 return NULL;
1185
1186 map_page_into_agp(page);
1187
1188 get_page(page);
1189 atomic_inc(&agp_bridge->current_memory_agp);
1190 return page_address(page);
1191 }
1192 EXPORT_SYMBOL(agp_generic_alloc_page);
1193
1194
1195 void agp_generic_destroy_page(void *addr, int flags)
1196 {
1197 struct page *page;
1198
1199 if (addr == NULL)
1200 return;
1201
1202 page = virt_to_page(addr);
1203 if (flags & AGP_PAGE_DESTROY_UNMAP)
1204 unmap_page_from_agp(page);
1205
1206 if (flags & AGP_PAGE_DESTROY_FREE) {
1207 put_page(page);
1208 free_page((unsigned long)addr);
1209 atomic_dec(&agp_bridge->current_memory_agp);
1210 }
1211 }
1212 EXPORT_SYMBOL(agp_generic_destroy_page);
1213
1214 /* End Basic Page Allocation Routines */
1215
1216
1217 /**
1218 * agp_enable - initialise the agp point-to-point connection.
1219 *
1220 * @mode: agp mode register value to configure with.
1221 */
1222 void agp_enable(struct agp_bridge_data *bridge, u32 mode)
1223 {
1224 if (!bridge)
1225 return;
1226 bridge->driver->agp_enable(bridge, mode);
1227 }
1228 EXPORT_SYMBOL(agp_enable);
1229
1230 /* When we remove the global variable agp_bridge from all drivers
1231 * then agp_alloc_bridge and agp_generic_find_bridge need to be updated
1232 */
1233
1234 struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev)
1235 {
1236 if (list_empty(&agp_bridges))
1237 return NULL;
1238
1239 return agp_bridge;
1240 }
1241
1242 static void ipi_handler(void *null)
1243 {
1244 flush_agp_cache();
1245 }
1246
1247 void global_cache_flush(void)
1248 {
1249 if (on_each_cpu(ipi_handler, NULL, 1) != 0)
1250 panic(PFX "timed out waiting for the other CPUs!\n");
1251 }
1252 EXPORT_SYMBOL(global_cache_flush);
1253
1254 unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
1255 unsigned long addr, int type)
1256 {
1257 /* memory type is ignored in the generic routine */
1258 if (bridge->driver->masks)
1259 return addr | bridge->driver->masks[0].mask;
1260 else
1261 return addr;
1262 }
1263 EXPORT_SYMBOL(agp_generic_mask_memory);
1264
1265 int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,
1266 int type)
1267 {
1268 if (type >= AGP_USER_TYPES)
1269 return 0;
1270 return type;
1271 }
1272 EXPORT_SYMBOL(agp_generic_type_to_mask_type);
1273
1274 /*
1275 * These functions are implemented according to the AGPv3 spec,
1276 * which covers implementation details that had previously been
1277 * left open.
1278 */
1279
1280 int agp3_generic_fetch_size(void)
1281 {
1282 u16 temp_size;
1283 int i;
1284 struct aper_size_info_16 *values;
1285
1286 pci_read_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, &temp_size);
1287 values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
1288
1289 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
1290 if (temp_size == values[i].size_value) {
1291 agp_bridge->previous_size =
1292 agp_bridge->current_size = (void *) (values + i);
1293
1294 agp_bridge->aperture_size_idx = i;
1295 return values[i].size;
1296 }
1297 }
1298 return 0;
1299 }
1300 EXPORT_SYMBOL(agp3_generic_fetch_size);
1301
1302 void agp3_generic_tlbflush(struct agp_memory *mem)
1303 {
1304 u32 ctrl;
1305 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1306 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_GTLBEN);
1307 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl);
1308 }
1309 EXPORT_SYMBOL(agp3_generic_tlbflush);
1310
1311 int agp3_generic_configure(void)
1312 {
1313 u32 temp;
1314 struct aper_size_info_16 *current_size;
1315
1316 current_size = A_SIZE_16(agp_bridge->current_size);
1317
1318 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1319 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1320
1321 /* set aperture size */
1322 pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value);
1323 /* set gart pointer */
1324 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPGARTLO, agp_bridge->gatt_bus_addr);
1325 /* enable aperture and GTLB */
1326 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp);
1327 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp | AGPCTRL_APERENB | AGPCTRL_GTLBEN);
1328 return 0;
1329 }
1330 EXPORT_SYMBOL(agp3_generic_configure);
1331
1332 void agp3_generic_cleanup(void)
1333 {
1334 u32 ctrl;
1335 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1336 pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_APERENB);
1337 }
1338 EXPORT_SYMBOL(agp3_generic_cleanup);
1339
1340 const struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES] =
1341 {
1342 {4096, 1048576, 10,0x000},
1343 {2048, 524288, 9, 0x800},
1344 {1024, 262144, 8, 0xc00},
1345 { 512, 131072, 7, 0xe00},
1346 { 256, 65536, 6, 0xf00},
1347 { 128, 32768, 5, 0xf20},
1348 { 64, 16384, 4, 0xf30},
1349 { 32, 8192, 3, 0xf38},
1350 { 16, 4096, 2, 0xf3c},
1351 { 8, 2048, 1, 0xf3e},
1352 { 4, 1024, 0, 0xf3f}
1353 };
1354 EXPORT_SYMBOL(agp3_generic_sizes);
1355
This page took 0.071584 seconds and 5 git commands to generate.