2 * Intel AGPGART routines.
6 * Intel(R) 855GM/852GM and 865G support added by David Dawes
7 * <dawes@tungstengraphics.com>.
9 * Intel(R) 915G/915GM support added by Alan Hourihane
10 * <alanh@tungstengraphics.com>.
13 #include <linux/module.h>
14 #include <linux/pci.h>
15 #include <linux/init.h>
16 #include <linux/pagemap.h>
17 #include <linux/agp_backend.h>
20 /* Intel 815 register */
21 #define INTEL_815_APCONT 0x51
22 #define INTEL_815_ATTBASE_MASK ~0x1FFFFFFF
24 /* Intel i820 registers */
25 #define INTEL_I820_RDCR 0x51
26 #define INTEL_I820_ERRSTS 0xc8
28 /* Intel i840 registers */
29 #define INTEL_I840_MCHCFG 0x50
30 #define INTEL_I840_ERRSTS 0xc8
32 /* Intel i850 registers */
33 #define INTEL_I850_MCHCFG 0x50
34 #define INTEL_I850_ERRSTS 0xc8
36 /* intel 915G registers */
37 #define I915_GMADDR 0x18
38 #define I915_MMADDR 0x10
39 #define I915_PTEADDR 0x1C
40 #define I915_GMCH_GMS_STOLEN_48M (0x6 << 4)
41 #define I915_GMCH_GMS_STOLEN_64M (0x7 << 4)
44 /* Intel 7505 registers */
45 #define INTEL_I7505_APSIZE 0x74
46 #define INTEL_I7505_NCAPID 0x60
47 #define INTEL_I7505_NISTAT 0x6c
48 #define INTEL_I7505_ATTBASE 0x78
49 #define INTEL_I7505_ERRSTS 0x42
50 #define INTEL_I7505_AGPCTRL 0x70
51 #define INTEL_I7505_MCHCFG 0x50
53 static struct aper_size_info_fixed intel_i810_sizes
[] =
56 /* The 32M mode still requires a 64k gatt */
60 #define AGP_DCACHE_MEMORY 1
61 #define AGP_PHYS_MEMORY 2
63 static struct gatt_mask intel_i810_masks
[] =
65 {.mask
= I810_PTE_VALID
, .type
= 0},
66 {.mask
= (I810_PTE_VALID
| I810_PTE_LOCAL
), .type
= AGP_DCACHE_MEMORY
},
67 {.mask
= I810_PTE_VALID
, .type
= 0}
70 static struct _intel_i810_private
{
71 struct pci_dev
*i810_dev
; /* device one */
72 volatile u8 __iomem
*registers
;
73 int num_dcache_entries
;
76 static int intel_i810_fetch_size(void)
79 struct aper_size_info_fixed
*values
;
81 pci_read_config_dword(agp_bridge
->dev
, I810_SMRAM_MISCC
, &smram_miscc
);
82 values
= A_SIZE_FIX(agp_bridge
->driver
->aperture_sizes
);
84 if ((smram_miscc
& I810_GMS
) == I810_GMS_DISABLE
) {
85 printk(KERN_WARNING PFX
"i810 is disabled\n");
88 if ((smram_miscc
& I810_GFX_MEM_WIN_SIZE
) == I810_GFX_MEM_WIN_32M
) {
89 agp_bridge
->previous_size
=
90 agp_bridge
->current_size
= (void *) (values
+ 1);
91 agp_bridge
->aperture_size_idx
= 1;
92 return values
[1].size
;
94 agp_bridge
->previous_size
=
95 agp_bridge
->current_size
= (void *) (values
);
96 agp_bridge
->aperture_size_idx
= 0;
97 return values
[0].size
;
103 static int intel_i810_configure(void)
105 struct aper_size_info_fixed
*current_size
;
109 current_size
= A_SIZE_FIX(agp_bridge
->current_size
);
111 pci_read_config_dword(intel_i810_private
.i810_dev
, I810_MMADDR
, &temp
);
114 intel_i810_private
.registers
= ioremap(temp
, 128 * 4096);
115 if (!intel_i810_private
.registers
) {
116 printk(KERN_ERR PFX
"Unable to remap memory.\n");
120 if ((readl(intel_i810_private
.registers
+I810_DRAM_CTL
)
121 & I810_DRAM_ROW_0
) == I810_DRAM_ROW_0_SDRAM
) {
122 /* This will need to be dynamically assigned */
123 printk(KERN_INFO PFX
"detected 4MB dedicated video ram.\n");
124 intel_i810_private
.num_dcache_entries
= 1024;
126 pci_read_config_dword(intel_i810_private
.i810_dev
, I810_GMADDR
, &temp
);
127 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
128 writel(agp_bridge
->gatt_bus_addr
| I810_PGETBL_ENABLED
, intel_i810_private
.registers
+I810_PGETBL_CTL
);
129 readl(intel_i810_private
.registers
+I810_PGETBL_CTL
); /* PCI Posting. */
131 if (agp_bridge
->driver
->needs_scratch_page
) {
132 for (i
= 0; i
< current_size
->num_entries
; i
++) {
133 writel(agp_bridge
->scratch_page
, intel_i810_private
.registers
+I810_PTE_BASE
+(i
*4));
134 readl(intel_i810_private
.registers
+I810_PTE_BASE
+(i
*4)); /* PCI posting. */
137 global_cache_flush();
141 static void intel_i810_cleanup(void)
143 writel(0, intel_i810_private
.registers
+I810_PGETBL_CTL
);
144 readl(intel_i810_private
.registers
); /* PCI Posting. */
145 iounmap(intel_i810_private
.registers
);
148 static void intel_i810_tlbflush(struct agp_memory
*mem
)
153 static void intel_i810_agp_enable(struct agp_bridge_data
*bridge
, u32 mode
)
158 /* Exists to support ARGB cursors */
159 static void *i8xx_alloc_pages(void)
163 page
= alloc_pages(GFP_KERNEL
, 2);
167 if (change_page_attr(page
, 4, PAGE_KERNEL_NOCACHE
) < 0) {
175 atomic_inc(&agp_bridge
->current_memory_agp
);
176 return page_address(page
);
179 static void i8xx_destroy_pages(void *addr
)
186 page
= virt_to_page(addr
);
187 change_page_attr(page
, 4, PAGE_KERNEL
);
191 free_pages((unsigned long)addr
, 2);
192 atomic_dec(&agp_bridge
->current_memory_agp
);
195 static int intel_i810_insert_entries(struct agp_memory
*mem
, off_t pg_start
,
198 int i
, j
, num_entries
;
201 temp
= agp_bridge
->current_size
;
202 num_entries
= A_SIZE_FIX(temp
)->num_entries
;
204 if ((pg_start
+ mem
->page_count
) > num_entries
) {
207 for (j
= pg_start
; j
< (pg_start
+ mem
->page_count
); j
++) {
208 if (!PGE_EMPTY(agp_bridge
, readl(agp_bridge
->gatt_table
+j
)))
212 if (type
!= 0 || mem
->type
!= 0) {
213 if ((type
== AGP_DCACHE_MEMORY
) && (mem
->type
== AGP_DCACHE_MEMORY
)) {
215 global_cache_flush();
216 for (i
= pg_start
; i
< (pg_start
+ mem
->page_count
); i
++) {
217 writel((i
*4096)|I810_PTE_LOCAL
|I810_PTE_VALID
, intel_i810_private
.registers
+I810_PTE_BASE
+(i
*4));
218 readl(intel_i810_private
.registers
+I810_PTE_BASE
+(i
*4)); /* PCI Posting. */
220 global_cache_flush();
221 agp_bridge
->driver
->tlb_flush(mem
);
224 if((type
== AGP_PHYS_MEMORY
) && (mem
->type
== AGP_PHYS_MEMORY
))
230 global_cache_flush();
231 for (i
= 0, j
= pg_start
; i
< mem
->page_count
; i
++, j
++) {
232 writel(agp_bridge
->driver
->mask_memory(agp_bridge
,
233 mem
->memory
[i
], mem
->type
),
234 intel_i810_private
.registers
+I810_PTE_BASE
+(j
*4));
235 readl(intel_i810_private
.registers
+I810_PTE_BASE
+(j
*4)); /* PCI Posting. */
237 global_cache_flush();
239 agp_bridge
->driver
->tlb_flush(mem
);
243 static int intel_i810_remove_entries(struct agp_memory
*mem
, off_t pg_start
,
248 for (i
= pg_start
; i
< (mem
->page_count
+ pg_start
); i
++) {
249 writel(agp_bridge
->scratch_page
, intel_i810_private
.registers
+I810_PTE_BASE
+(i
*4));
250 readl(intel_i810_private
.registers
+I810_PTE_BASE
+(i
*4)); /* PCI Posting. */
253 global_cache_flush();
254 agp_bridge
->driver
->tlb_flush(mem
);
259 * The i810/i830 requires a physical address to program its mouse
260 * pointer into hardware.
261 * However the Xserver still writes to it through the agp aperture.
263 static struct agp_memory
*alloc_agpphysmem_i8xx(size_t pg_count
, int type
)
265 struct agp_memory
*new;
268 if (pg_count
!= 1 && pg_count
!= 4)
272 case 1: addr
= agp_bridge
->driver
->agp_alloc_page(agp_bridge
);
276 /* kludge to get 4 physical pages for ARGB cursor */
277 addr
= i8xx_alloc_pages();
286 new = agp_create_memory(pg_count
);
290 new->memory
[0] = virt_to_gart(addr
);
292 /* kludge to get 4 physical pages for ARGB cursor */
293 new->memory
[1] = new->memory
[0] + PAGE_SIZE
;
294 new->memory
[2] = new->memory
[1] + PAGE_SIZE
;
295 new->memory
[3] = new->memory
[2] + PAGE_SIZE
;
297 new->page_count
= pg_count
;
298 new->num_scratch_pages
= pg_count
;
299 new->type
= AGP_PHYS_MEMORY
;
300 new->physical
= new->memory
[0];
304 static struct agp_memory
*intel_i810_alloc_by_type(size_t pg_count
, int type
)
306 struct agp_memory
*new;
308 if (type
== AGP_DCACHE_MEMORY
) {
309 if (pg_count
!= intel_i810_private
.num_dcache_entries
)
312 new = agp_create_memory(1);
316 new->type
= AGP_DCACHE_MEMORY
;
317 new->page_count
= pg_count
;
318 new->num_scratch_pages
= 0;
322 if (type
== AGP_PHYS_MEMORY
)
323 return alloc_agpphysmem_i8xx(pg_count
, type
);
328 static void intel_i810_free_by_type(struct agp_memory
*curr
)
330 agp_free_key(curr
->key
);
331 if(curr
->type
== AGP_PHYS_MEMORY
) {
332 if (curr
->page_count
== 4)
333 i8xx_destroy_pages(gart_to_virt(curr
->memory
[0]));
335 agp_bridge
->driver
->agp_destroy_page(
336 gart_to_virt(curr
->memory
[0]));
344 static unsigned long intel_i810_mask_memory(struct agp_bridge_data
*bridge
,
345 unsigned long addr
, int type
)
347 /* Type checking must be done elsewhere */
348 return addr
| bridge
->driver
->masks
[type
].mask
;
351 static struct aper_size_info_fixed intel_i830_sizes
[] =
354 /* The 64M mode still requires a 128k gatt */
359 static struct _intel_i830_private
{
360 struct pci_dev
*i830_dev
; /* device one */
361 volatile u8 __iomem
*registers
;
362 volatile u32 __iomem
*gtt
; /* I915G */
364 } intel_i830_private
;
366 static void intel_i830_init_gtt_entries(void)
372 static const int ddt
[4] = { 0, 16, 32, 64 };
375 pci_read_config_word(agp_bridge
->dev
,I830_GMCH_CTRL
,&gmch_ctrl
);
377 /* We obtain the size of the GTT, which is also stored (for some
378 * reason) at the top of stolen memory. Then we add 4KB to that
379 * for the video BIOS popup, which is also stored in there. */
380 size
= agp_bridge
->driver
->fetch_size() + 4;
382 if (agp_bridge
->dev
->device
== PCI_DEVICE_ID_INTEL_82830_HB
||
383 agp_bridge
->dev
->device
== PCI_DEVICE_ID_INTEL_82845G_HB
) {
384 switch (gmch_ctrl
& I830_GMCH_GMS_MASK
) {
385 case I830_GMCH_GMS_STOLEN_512
:
386 gtt_entries
= KB(512) - KB(size
);
388 case I830_GMCH_GMS_STOLEN_1024
:
389 gtt_entries
= MB(1) - KB(size
);
391 case I830_GMCH_GMS_STOLEN_8192
:
392 gtt_entries
= MB(8) - KB(size
);
394 case I830_GMCH_GMS_LOCAL
:
395 rdct
= readb(intel_i830_private
.registers
+I830_RDRAM_CHANNEL_TYPE
);
396 gtt_entries
= (I830_RDRAM_ND(rdct
) + 1) *
397 MB(ddt
[I830_RDRAM_DDT(rdct
)]);
405 switch (gmch_ctrl
& I830_GMCH_GMS_MASK
) {
406 case I855_GMCH_GMS_STOLEN_1M
:
407 gtt_entries
= MB(1) - KB(size
);
409 case I855_GMCH_GMS_STOLEN_4M
:
410 gtt_entries
= MB(4) - KB(size
);
412 case I855_GMCH_GMS_STOLEN_8M
:
413 gtt_entries
= MB(8) - KB(size
);
415 case I855_GMCH_GMS_STOLEN_16M
:
416 gtt_entries
= MB(16) - KB(size
);
418 case I855_GMCH_GMS_STOLEN_32M
:
419 gtt_entries
= MB(32) - KB(size
);
421 case I915_GMCH_GMS_STOLEN_48M
:
422 /* Check it's really I915G */
423 if (agp_bridge
->dev
->device
== PCI_DEVICE_ID_INTEL_82915G_HB
||
424 agp_bridge
->dev
->device
== PCI_DEVICE_ID_INTEL_82915GM_HB
||
425 agp_bridge
->dev
->device
== PCI_DEVICE_ID_INTEL_82945G_HB
)
426 gtt_entries
= MB(48) - KB(size
);
430 case I915_GMCH_GMS_STOLEN_64M
:
431 /* Check it's really I915G */
432 if (agp_bridge
->dev
->device
== PCI_DEVICE_ID_INTEL_82915G_HB
||
433 agp_bridge
->dev
->device
== PCI_DEVICE_ID_INTEL_82915GM_HB
||
434 agp_bridge
->dev
->device
== PCI_DEVICE_ID_INTEL_82945G_HB
)
435 gtt_entries
= MB(64) - KB(size
);
444 printk(KERN_INFO PFX
"Detected %dK %s memory.\n",
445 gtt_entries
/ KB(1), local
? "local" : "stolen");
448 "No pre-allocated video memory detected.\n");
449 gtt_entries
/= KB(4);
451 intel_i830_private
.gtt_entries
= gtt_entries
;
454 /* The intel i830 automatically initializes the agp aperture during POST.
455 * Use the memory already set aside for in the GTT.
457 static int intel_i830_create_gatt_table(struct agp_bridge_data
*bridge
)
460 struct aper_size_info_fixed
*size
;
464 size
= agp_bridge
->current_size
;
465 page_order
= size
->page_order
;
466 num_entries
= size
->num_entries
;
467 agp_bridge
->gatt_table_real
= NULL
;
469 pci_read_config_dword(intel_i830_private
.i830_dev
,I810_MMADDR
,&temp
);
472 intel_i830_private
.registers
= ioremap(temp
,128 * 4096);
473 if (!intel_i830_private
.registers
)
476 temp
= readl(intel_i830_private
.registers
+I810_PGETBL_CTL
) & 0xfffff000;
477 global_cache_flush(); /* FIXME: ?? */
479 /* we have to call this as early as possible after the MMIO base address is known */
480 intel_i830_init_gtt_entries();
482 agp_bridge
->gatt_table
= NULL
;
484 agp_bridge
->gatt_bus_addr
= temp
;
489 /* Return the gatt table to a sane state. Use the top of stolen
490 * memory for the GTT.
492 static int intel_i830_free_gatt_table(struct agp_bridge_data
*bridge
)
497 static int intel_i830_fetch_size(void)
500 struct aper_size_info_fixed
*values
;
502 values
= A_SIZE_FIX(agp_bridge
->driver
->aperture_sizes
);
504 if (agp_bridge
->dev
->device
!= PCI_DEVICE_ID_INTEL_82830_HB
&&
505 agp_bridge
->dev
->device
!= PCI_DEVICE_ID_INTEL_82845G_HB
) {
506 /* 855GM/852GM/865G has 128MB aperture size */
507 agp_bridge
->previous_size
= agp_bridge
->current_size
= (void *) values
;
508 agp_bridge
->aperture_size_idx
= 0;
509 return values
[0].size
;
512 pci_read_config_word(agp_bridge
->dev
,I830_GMCH_CTRL
,&gmch_ctrl
);
514 if ((gmch_ctrl
& I830_GMCH_MEM_MASK
) == I830_GMCH_MEM_128M
) {
515 agp_bridge
->previous_size
= agp_bridge
->current_size
= (void *) values
;
516 agp_bridge
->aperture_size_idx
= 0;
517 return values
[0].size
;
519 agp_bridge
->previous_size
= agp_bridge
->current_size
= (void *) (values
+ 1);
520 agp_bridge
->aperture_size_idx
= 1;
521 return values
[1].size
;
527 static int intel_i830_configure(void)
529 struct aper_size_info_fixed
*current_size
;
534 current_size
= A_SIZE_FIX(agp_bridge
->current_size
);
536 pci_read_config_dword(intel_i830_private
.i830_dev
,I810_GMADDR
,&temp
);
537 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
539 pci_read_config_word(agp_bridge
->dev
,I830_GMCH_CTRL
,&gmch_ctrl
);
540 gmch_ctrl
|= I830_GMCH_ENABLED
;
541 pci_write_config_word(agp_bridge
->dev
,I830_GMCH_CTRL
,gmch_ctrl
);
543 writel(agp_bridge
->gatt_bus_addr
|I810_PGETBL_ENABLED
, intel_i830_private
.registers
+I810_PGETBL_CTL
);
544 readl(intel_i830_private
.registers
+I810_PGETBL_CTL
); /* PCI Posting. */
546 if (agp_bridge
->driver
->needs_scratch_page
) {
547 for (i
= intel_i830_private
.gtt_entries
; i
< current_size
->num_entries
; i
++) {
548 writel(agp_bridge
->scratch_page
, intel_i830_private
.registers
+I810_PTE_BASE
+(i
*4));
549 readl(intel_i830_private
.registers
+I810_PTE_BASE
+(i
*4)); /* PCI Posting. */
553 global_cache_flush();
557 static void intel_i830_cleanup(void)
559 iounmap(intel_i830_private
.registers
);
562 static int intel_i830_insert_entries(struct agp_memory
*mem
,off_t pg_start
, int type
)
567 temp
= agp_bridge
->current_size
;
568 num_entries
= A_SIZE_FIX(temp
)->num_entries
;
570 if (pg_start
< intel_i830_private
.gtt_entries
) {
571 printk (KERN_DEBUG PFX
"pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
572 pg_start
,intel_i830_private
.gtt_entries
);
574 printk (KERN_INFO PFX
"Trying to insert into local/stolen memory\n");
578 if ((pg_start
+ mem
->page_count
) > num_entries
)
581 /* The i830 can't check the GTT for entries since its read only,
582 * depend on the caller to make the correct offset decisions.
585 if ((type
!= 0 && type
!= AGP_PHYS_MEMORY
) ||
586 (mem
->type
!= 0 && mem
->type
!= AGP_PHYS_MEMORY
))
589 global_cache_flush(); /* FIXME: Necessary ?*/
591 for (i
= 0, j
= pg_start
; i
< mem
->page_count
; i
++, j
++) {
592 writel(agp_bridge
->driver
->mask_memory(agp_bridge
,
593 mem
->memory
[i
], mem
->type
),
594 intel_i830_private
.registers
+I810_PTE_BASE
+(j
*4));
595 readl(intel_i830_private
.registers
+I810_PTE_BASE
+(j
*4)); /* PCI Posting. */
598 global_cache_flush();
599 agp_bridge
->driver
->tlb_flush(mem
);
603 static int intel_i830_remove_entries(struct agp_memory
*mem
,off_t pg_start
,
608 global_cache_flush();
610 if (pg_start
< intel_i830_private
.gtt_entries
) {
611 printk (KERN_INFO PFX
"Trying to disable local/stolen memory\n");
615 for (i
= pg_start
; i
< (mem
->page_count
+ pg_start
); i
++) {
616 writel(agp_bridge
->scratch_page
, intel_i830_private
.registers
+I810_PTE_BASE
+(i
*4));
617 readl(intel_i830_private
.registers
+I810_PTE_BASE
+(i
*4)); /* PCI Posting. */
620 global_cache_flush();
621 agp_bridge
->driver
->tlb_flush(mem
);
625 static struct agp_memory
*intel_i830_alloc_by_type(size_t pg_count
,int type
)
627 if (type
== AGP_PHYS_MEMORY
)
628 return alloc_agpphysmem_i8xx(pg_count
, type
);
630 /* always return NULL for other allocation types for now */
634 static int intel_i915_configure(void)
636 struct aper_size_info_fixed
*current_size
;
641 current_size
= A_SIZE_FIX(agp_bridge
->current_size
);
643 pci_read_config_dword(intel_i830_private
.i830_dev
, I915_GMADDR
, &temp
);
645 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
647 pci_read_config_word(agp_bridge
->dev
,I830_GMCH_CTRL
,&gmch_ctrl
);
648 gmch_ctrl
|= I830_GMCH_ENABLED
;
649 pci_write_config_word(agp_bridge
->dev
,I830_GMCH_CTRL
,gmch_ctrl
);
651 writel(agp_bridge
->gatt_bus_addr
|I810_PGETBL_ENABLED
, intel_i830_private
.registers
+I810_PGETBL_CTL
);
652 readl(intel_i830_private
.registers
+I810_PGETBL_CTL
); /* PCI Posting. */
654 if (agp_bridge
->driver
->needs_scratch_page
) {
655 for (i
= intel_i830_private
.gtt_entries
; i
< current_size
->num_entries
; i
++) {
656 writel(agp_bridge
->scratch_page
, intel_i830_private
.gtt
+i
);
657 readl(intel_i830_private
.gtt
+i
); /* PCI Posting. */
661 global_cache_flush();
665 static void intel_i915_cleanup(void)
667 iounmap(intel_i830_private
.gtt
);
668 iounmap(intel_i830_private
.registers
);
671 static int intel_i915_insert_entries(struct agp_memory
*mem
,off_t pg_start
,
677 temp
= agp_bridge
->current_size
;
678 num_entries
= A_SIZE_FIX(temp
)->num_entries
;
680 if (pg_start
< intel_i830_private
.gtt_entries
) {
681 printk (KERN_DEBUG PFX
"pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",
682 pg_start
,intel_i830_private
.gtt_entries
);
684 printk (KERN_INFO PFX
"Trying to insert into local/stolen memory\n");
688 if ((pg_start
+ mem
->page_count
) > num_entries
)
691 /* The i830 can't check the GTT for entries since its read only,
692 * depend on the caller to make the correct offset decisions.
695 if ((type
!= 0 && type
!= AGP_PHYS_MEMORY
) ||
696 (mem
->type
!= 0 && mem
->type
!= AGP_PHYS_MEMORY
))
699 global_cache_flush();
701 for (i
= 0, j
= pg_start
; i
< mem
->page_count
; i
++, j
++) {
702 writel(agp_bridge
->driver
->mask_memory(agp_bridge
,
703 mem
->memory
[i
], mem
->type
), intel_i830_private
.gtt
+j
);
704 readl(intel_i830_private
.gtt
+j
); /* PCI Posting. */
707 global_cache_flush();
708 agp_bridge
->driver
->tlb_flush(mem
);
712 static int intel_i915_remove_entries(struct agp_memory
*mem
,off_t pg_start
,
717 global_cache_flush();
719 if (pg_start
< intel_i830_private
.gtt_entries
) {
720 printk (KERN_INFO PFX
"Trying to disable local/stolen memory\n");
724 for (i
= pg_start
; i
< (mem
->page_count
+ pg_start
); i
++) {
725 writel(agp_bridge
->scratch_page
, intel_i830_private
.gtt
+i
);
726 readl(intel_i830_private
.gtt
+i
);
729 global_cache_flush();
730 agp_bridge
->driver
->tlb_flush(mem
);
734 static int intel_i915_fetch_size(void)
736 struct aper_size_info_fixed
*values
;
737 u32 temp
, offset
= 0;
739 #define I915_256MB_ADDRESS_MASK (1<<27)
741 values
= A_SIZE_FIX(agp_bridge
->driver
->aperture_sizes
);
743 pci_read_config_dword(intel_i830_private
.i830_dev
, I915_GMADDR
, &temp
);
744 if (temp
& I915_256MB_ADDRESS_MASK
)
745 offset
= 0; /* 128MB aperture */
747 offset
= 2; /* 256MB aperture */
748 agp_bridge
->previous_size
= agp_bridge
->current_size
= (void *)(values
+ offset
);
749 return values
[offset
].size
;
752 /* The intel i915 automatically initializes the agp aperture during POST.
753 * Use the memory already set aside for in the GTT.
755 static int intel_i915_create_gatt_table(struct agp_bridge_data
*bridge
)
758 struct aper_size_info_fixed
*size
;
762 size
= agp_bridge
->current_size
;
763 page_order
= size
->page_order
;
764 num_entries
= size
->num_entries
;
765 agp_bridge
->gatt_table_real
= NULL
;
767 pci_read_config_dword(intel_i830_private
.i830_dev
, I915_MMADDR
, &temp
);
768 pci_read_config_dword(intel_i830_private
.i830_dev
, I915_PTEADDR
,&temp2
);
770 intel_i830_private
.gtt
= ioremap(temp2
, 256 * 1024);
771 if (!intel_i830_private
.gtt
)
776 intel_i830_private
.registers
= ioremap(temp
,128 * 4096);
777 if (!intel_i830_private
.registers
)
780 temp
= readl(intel_i830_private
.registers
+I810_PGETBL_CTL
) & 0xfffff000;
781 global_cache_flush(); /* FIXME: ? */
783 /* we have to call this as early as possible after the MMIO base address is known */
784 intel_i830_init_gtt_entries();
786 agp_bridge
->gatt_table
= NULL
;
788 agp_bridge
->gatt_bus_addr
= temp
;
793 static int intel_fetch_size(void)
797 struct aper_size_info_16
*values
;
799 pci_read_config_word(agp_bridge
->dev
, INTEL_APSIZE
, &temp
);
800 values
= A_SIZE_16(agp_bridge
->driver
->aperture_sizes
);
802 for (i
= 0; i
< agp_bridge
->driver
->num_aperture_sizes
; i
++) {
803 if (temp
== values
[i
].size_value
) {
804 agp_bridge
->previous_size
= agp_bridge
->current_size
= (void *) (values
+ i
);
805 agp_bridge
->aperture_size_idx
= i
;
806 return values
[i
].size
;
813 static int __intel_8xx_fetch_size(u8 temp
)
816 struct aper_size_info_8
*values
;
818 values
= A_SIZE_8(agp_bridge
->driver
->aperture_sizes
);
820 for (i
= 0; i
< agp_bridge
->driver
->num_aperture_sizes
; i
++) {
821 if (temp
== values
[i
].size_value
) {
822 agp_bridge
->previous_size
=
823 agp_bridge
->current_size
= (void *) (values
+ i
);
824 agp_bridge
->aperture_size_idx
= i
;
825 return values
[i
].size
;
831 static int intel_8xx_fetch_size(void)
835 pci_read_config_byte(agp_bridge
->dev
, INTEL_APSIZE
, &temp
);
836 return __intel_8xx_fetch_size(temp
);
839 static int intel_815_fetch_size(void)
843 /* Intel 815 chipsets have a _weird_ APSIZE register with only
844 * one non-reserved bit, so mask the others out ... */
845 pci_read_config_byte(agp_bridge
->dev
, INTEL_APSIZE
, &temp
);
848 return __intel_8xx_fetch_size(temp
);
851 static void intel_tlbflush(struct agp_memory
*mem
)
853 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x2200);
854 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x2280);
858 static void intel_8xx_tlbflush(struct agp_memory
*mem
)
861 pci_read_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, &temp
);
862 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, temp
& ~(1 << 7));
863 pci_read_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, &temp
);
864 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, temp
| (1 << 7));
868 static void intel_cleanup(void)
871 struct aper_size_info_16
*previous_size
;
873 previous_size
= A_SIZE_16(agp_bridge
->previous_size
);
874 pci_read_config_word(agp_bridge
->dev
, INTEL_NBXCFG
, &temp
);
875 pci_write_config_word(agp_bridge
->dev
, INTEL_NBXCFG
, temp
& ~(1 << 9));
876 pci_write_config_word(agp_bridge
->dev
, INTEL_APSIZE
, previous_size
->size_value
);
880 static void intel_8xx_cleanup(void)
883 struct aper_size_info_8
*previous_size
;
885 previous_size
= A_SIZE_8(agp_bridge
->previous_size
);
886 pci_read_config_word(agp_bridge
->dev
, INTEL_NBXCFG
, &temp
);
887 pci_write_config_word(agp_bridge
->dev
, INTEL_NBXCFG
, temp
& ~(1 << 9));
888 pci_write_config_byte(agp_bridge
->dev
, INTEL_APSIZE
, previous_size
->size_value
);
892 static int intel_configure(void)
896 struct aper_size_info_16
*current_size
;
898 current_size
= A_SIZE_16(agp_bridge
->current_size
);
901 pci_write_config_word(agp_bridge
->dev
, INTEL_APSIZE
, current_size
->size_value
);
903 /* address to map to */
904 pci_read_config_dword(agp_bridge
->dev
, AGP_APBASE
, &temp
);
905 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
907 /* attbase - aperture base */
908 pci_write_config_dword(agp_bridge
->dev
, INTEL_ATTBASE
, agp_bridge
->gatt_bus_addr
);
911 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x2280);
914 pci_read_config_word(agp_bridge
->dev
, INTEL_NBXCFG
, &temp2
);
915 pci_write_config_word(agp_bridge
->dev
, INTEL_NBXCFG
,
916 (temp2
& ~(1 << 10)) | (1 << 9));
917 /* clear any possible error conditions */
918 pci_write_config_byte(agp_bridge
->dev
, INTEL_ERRSTS
+ 1, 7);
922 static int intel_815_configure(void)
926 struct aper_size_info_8
*current_size
;
928 /* attbase - aperture base */
929 /* the Intel 815 chipset spec. says that bits 29-31 in the
930 * ATTBASE register are reserved -> try not to write them */
931 if (agp_bridge
->gatt_bus_addr
& INTEL_815_ATTBASE_MASK
) {
932 printk (KERN_EMERG PFX
"gatt bus addr too high");
936 current_size
= A_SIZE_8(agp_bridge
->current_size
);
939 pci_write_config_byte(agp_bridge
->dev
, INTEL_APSIZE
,
940 current_size
->size_value
);
942 /* address to map to */
943 pci_read_config_dword(agp_bridge
->dev
, AGP_APBASE
, &temp
);
944 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
946 pci_read_config_dword(agp_bridge
->dev
, INTEL_ATTBASE
, &addr
);
947 addr
&= INTEL_815_ATTBASE_MASK
;
948 addr
|= agp_bridge
->gatt_bus_addr
;
949 pci_write_config_dword(agp_bridge
->dev
, INTEL_ATTBASE
, addr
);
952 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x0000);
955 pci_read_config_byte(agp_bridge
->dev
, INTEL_815_APCONT
, &temp2
);
956 pci_write_config_byte(agp_bridge
->dev
, INTEL_815_APCONT
, temp2
| (1 << 1));
958 /* clear any possible error conditions */
959 /* Oddness : this chipset seems to have no ERRSTS register ! */
963 static void intel_820_tlbflush(struct agp_memory
*mem
)
968 static void intel_820_cleanup(void)
971 struct aper_size_info_8
*previous_size
;
973 previous_size
= A_SIZE_8(agp_bridge
->previous_size
);
974 pci_read_config_byte(agp_bridge
->dev
, INTEL_I820_RDCR
, &temp
);
975 pci_write_config_byte(agp_bridge
->dev
, INTEL_I820_RDCR
,
977 pci_write_config_byte(agp_bridge
->dev
, INTEL_APSIZE
,
978 previous_size
->size_value
);
982 static int intel_820_configure(void)
986 struct aper_size_info_8
*current_size
;
988 current_size
= A_SIZE_8(agp_bridge
->current_size
);
991 pci_write_config_byte(agp_bridge
->dev
, INTEL_APSIZE
, current_size
->size_value
);
993 /* address to map to */
994 pci_read_config_dword(agp_bridge
->dev
, AGP_APBASE
, &temp
);
995 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
997 /* attbase - aperture base */
998 pci_write_config_dword(agp_bridge
->dev
, INTEL_ATTBASE
, agp_bridge
->gatt_bus_addr
);
1001 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x0000);
1003 /* global enable aperture access */
1004 /* This flag is not accessed through MCHCFG register as in */
1006 pci_read_config_byte(agp_bridge
->dev
, INTEL_I820_RDCR
, &temp2
);
1007 pci_write_config_byte(agp_bridge
->dev
, INTEL_I820_RDCR
, temp2
| (1 << 1));
1008 /* clear any possible AGP-related error conditions */
1009 pci_write_config_word(agp_bridge
->dev
, INTEL_I820_ERRSTS
, 0x001c);
1013 static int intel_840_configure(void)
1017 struct aper_size_info_8
*current_size
;
1019 current_size
= A_SIZE_8(agp_bridge
->current_size
);
1022 pci_write_config_byte(agp_bridge
->dev
, INTEL_APSIZE
, current_size
->size_value
);
1024 /* address to map to */
1025 pci_read_config_dword(agp_bridge
->dev
, AGP_APBASE
, &temp
);
1026 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
1028 /* attbase - aperture base */
1029 pci_write_config_dword(agp_bridge
->dev
, INTEL_ATTBASE
, agp_bridge
->gatt_bus_addr
);
1032 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x0000);
1035 pci_read_config_word(agp_bridge
->dev
, INTEL_I840_MCHCFG
, &temp2
);
1036 pci_write_config_word(agp_bridge
->dev
, INTEL_I840_MCHCFG
, temp2
| (1 << 9));
1037 /* clear any possible error conditions */
1038 pci_write_config_word(agp_bridge
->dev
, INTEL_I840_ERRSTS
, 0xc000);
1042 static int intel_845_configure(void)
1046 struct aper_size_info_8
*current_size
;
1048 current_size
= A_SIZE_8(agp_bridge
->current_size
);
1051 pci_write_config_byte(agp_bridge
->dev
, INTEL_APSIZE
, current_size
->size_value
);
1053 if (agp_bridge
->apbase_config
!= 0) {
1054 pci_write_config_dword(agp_bridge
->dev
, AGP_APBASE
,
1055 agp_bridge
->apbase_config
);
1057 /* address to map to */
1058 pci_read_config_dword(agp_bridge
->dev
, AGP_APBASE
, &temp
);
1059 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
1060 agp_bridge
->apbase_config
= temp
;
1063 /* attbase - aperture base */
1064 pci_write_config_dword(agp_bridge
->dev
, INTEL_ATTBASE
, agp_bridge
->gatt_bus_addr
);
1067 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x0000);
1070 pci_read_config_byte(agp_bridge
->dev
, INTEL_I845_AGPM
, &temp2
);
1071 pci_write_config_byte(agp_bridge
->dev
, INTEL_I845_AGPM
, temp2
| (1 << 1));
1072 /* clear any possible error conditions */
1073 pci_write_config_word(agp_bridge
->dev
, INTEL_I845_ERRSTS
, 0x001c);
1077 static int intel_850_configure(void)
1081 struct aper_size_info_8
*current_size
;
1083 current_size
= A_SIZE_8(agp_bridge
->current_size
);
1086 pci_write_config_byte(agp_bridge
->dev
, INTEL_APSIZE
, current_size
->size_value
);
1088 /* address to map to */
1089 pci_read_config_dword(agp_bridge
->dev
, AGP_APBASE
, &temp
);
1090 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
1092 /* attbase - aperture base */
1093 pci_write_config_dword(agp_bridge
->dev
, INTEL_ATTBASE
, agp_bridge
->gatt_bus_addr
);
1096 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x0000);
1099 pci_read_config_word(agp_bridge
->dev
, INTEL_I850_MCHCFG
, &temp2
);
1100 pci_write_config_word(agp_bridge
->dev
, INTEL_I850_MCHCFG
, temp2
| (1 << 9));
1101 /* clear any possible AGP-related error conditions */
1102 pci_write_config_word(agp_bridge
->dev
, INTEL_I850_ERRSTS
, 0x001c);
1106 static int intel_860_configure(void)
1110 struct aper_size_info_8
*current_size
;
1112 current_size
= A_SIZE_8(agp_bridge
->current_size
);
1115 pci_write_config_byte(agp_bridge
->dev
, INTEL_APSIZE
, current_size
->size_value
);
1117 /* address to map to */
1118 pci_read_config_dword(agp_bridge
->dev
, AGP_APBASE
, &temp
);
1119 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
1121 /* attbase - aperture base */
1122 pci_write_config_dword(agp_bridge
->dev
, INTEL_ATTBASE
, agp_bridge
->gatt_bus_addr
);
1125 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x0000);
1128 pci_read_config_word(agp_bridge
->dev
, INTEL_I860_MCHCFG
, &temp2
);
1129 pci_write_config_word(agp_bridge
->dev
, INTEL_I860_MCHCFG
, temp2
| (1 << 9));
1130 /* clear any possible AGP-related error conditions */
1131 pci_write_config_word(agp_bridge
->dev
, INTEL_I860_ERRSTS
, 0xf700);
1135 static int intel_830mp_configure(void)
1139 struct aper_size_info_8
*current_size
;
1141 current_size
= A_SIZE_8(agp_bridge
->current_size
);
1144 pci_write_config_byte(agp_bridge
->dev
, INTEL_APSIZE
, current_size
->size_value
);
1146 /* address to map to */
1147 pci_read_config_dword(agp_bridge
->dev
, AGP_APBASE
, &temp
);
1148 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
1150 /* attbase - aperture base */
1151 pci_write_config_dword(agp_bridge
->dev
, INTEL_ATTBASE
, agp_bridge
->gatt_bus_addr
);
1154 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x0000);
1157 pci_read_config_word(agp_bridge
->dev
, INTEL_NBXCFG
, &temp2
);
1158 pci_write_config_word(agp_bridge
->dev
, INTEL_NBXCFG
, temp2
| (1 << 9));
1159 /* clear any possible AGP-related error conditions */
1160 pci_write_config_word(agp_bridge
->dev
, INTEL_I830_ERRSTS
, 0x1c);
1164 static int intel_7505_configure(void)
1168 struct aper_size_info_8
*current_size
;
1170 current_size
= A_SIZE_8(agp_bridge
->current_size
);
1173 pci_write_config_byte(agp_bridge
->dev
, INTEL_APSIZE
, current_size
->size_value
);
1175 /* address to map to */
1176 pci_read_config_dword(agp_bridge
->dev
, AGP_APBASE
, &temp
);
1177 agp_bridge
->gart_bus_addr
= (temp
& PCI_BASE_ADDRESS_MEM_MASK
);
1179 /* attbase - aperture base */
1180 pci_write_config_dword(agp_bridge
->dev
, INTEL_ATTBASE
, agp_bridge
->gatt_bus_addr
);
1183 pci_write_config_dword(agp_bridge
->dev
, INTEL_AGPCTRL
, 0x0000);
1186 pci_read_config_word(agp_bridge
->dev
, INTEL_I7505_MCHCFG
, &temp2
);
1187 pci_write_config_word(agp_bridge
->dev
, INTEL_I7505_MCHCFG
, temp2
| (1 << 9));
1192 /* Setup function */
1193 static struct gatt_mask intel_generic_masks
[] =
1195 {.mask
= 0x00000017, .type
= 0}
1198 static struct aper_size_info_8 intel_815_sizes
[2] =
1204 static struct aper_size_info_8 intel_8xx_sizes
[7] =
1207 {128, 32768, 5, 32},
1215 static struct aper_size_info_16 intel_generic_sizes
[7] =
1218 {128, 32768, 5, 32},
1226 static struct aper_size_info_8 intel_830mp_sizes
[4] =
1229 {128, 32768, 5, 32},
1234 static struct agp_bridge_driver intel_generic_driver
= {
1235 .owner
= THIS_MODULE
,
1236 .aperture_sizes
= intel_generic_sizes
,
1237 .size_type
= U16_APER_SIZE
,
1238 .num_aperture_sizes
= 7,
1239 .configure
= intel_configure
,
1240 .fetch_size
= intel_fetch_size
,
1241 .cleanup
= intel_cleanup
,
1242 .tlb_flush
= intel_tlbflush
,
1243 .mask_memory
= agp_generic_mask_memory
,
1244 .masks
= intel_generic_masks
,
1245 .agp_enable
= agp_generic_enable
,
1246 .cache_flush
= global_cache_flush
,
1247 .create_gatt_table
= agp_generic_create_gatt_table
,
1248 .free_gatt_table
= agp_generic_free_gatt_table
,
1249 .insert_memory
= agp_generic_insert_memory
,
1250 .remove_memory
= agp_generic_remove_memory
,
1251 .alloc_by_type
= agp_generic_alloc_by_type
,
1252 .free_by_type
= agp_generic_free_by_type
,
1253 .agp_alloc_page
= agp_generic_alloc_page
,
1254 .agp_destroy_page
= agp_generic_destroy_page
,
1257 static struct agp_bridge_driver intel_810_driver
= {
1258 .owner
= THIS_MODULE
,
1259 .aperture_sizes
= intel_i810_sizes
,
1260 .size_type
= FIXED_APER_SIZE
,
1261 .num_aperture_sizes
= 2,
1262 .needs_scratch_page
= TRUE
,
1263 .configure
= intel_i810_configure
,
1264 .fetch_size
= intel_i810_fetch_size
,
1265 .cleanup
= intel_i810_cleanup
,
1266 .tlb_flush
= intel_i810_tlbflush
,
1267 .mask_memory
= intel_i810_mask_memory
,
1268 .masks
= intel_i810_masks
,
1269 .agp_enable
= intel_i810_agp_enable
,
1270 .cache_flush
= global_cache_flush
,
1271 .create_gatt_table
= agp_generic_create_gatt_table
,
1272 .free_gatt_table
= agp_generic_free_gatt_table
,
1273 .insert_memory
= intel_i810_insert_entries
,
1274 .remove_memory
= intel_i810_remove_entries
,
1275 .alloc_by_type
= intel_i810_alloc_by_type
,
1276 .free_by_type
= intel_i810_free_by_type
,
1277 .agp_alloc_page
= agp_generic_alloc_page
,
1278 .agp_destroy_page
= agp_generic_destroy_page
,
1281 static struct agp_bridge_driver intel_815_driver
= {
1282 .owner
= THIS_MODULE
,
1283 .aperture_sizes
= intel_815_sizes
,
1284 .size_type
= U8_APER_SIZE
,
1285 .num_aperture_sizes
= 2,
1286 .configure
= intel_815_configure
,
1287 .fetch_size
= intel_815_fetch_size
,
1288 .cleanup
= intel_8xx_cleanup
,
1289 .tlb_flush
= intel_8xx_tlbflush
,
1290 .mask_memory
= agp_generic_mask_memory
,
1291 .masks
= intel_generic_masks
,
1292 .agp_enable
= agp_generic_enable
,
1293 .cache_flush
= global_cache_flush
,
1294 .create_gatt_table
= agp_generic_create_gatt_table
,
1295 .free_gatt_table
= agp_generic_free_gatt_table
,
1296 .insert_memory
= agp_generic_insert_memory
,
1297 .remove_memory
= agp_generic_remove_memory
,
1298 .alloc_by_type
= agp_generic_alloc_by_type
,
1299 .free_by_type
= agp_generic_free_by_type
,
1300 .agp_alloc_page
= agp_generic_alloc_page
,
1301 .agp_destroy_page
= agp_generic_destroy_page
,
1304 static struct agp_bridge_driver intel_830_driver
= {
1305 .owner
= THIS_MODULE
,
1306 .aperture_sizes
= intel_i830_sizes
,
1307 .size_type
= FIXED_APER_SIZE
,
1308 .num_aperture_sizes
= 3,
1309 .needs_scratch_page
= TRUE
,
1310 .configure
= intel_i830_configure
,
1311 .fetch_size
= intel_i830_fetch_size
,
1312 .cleanup
= intel_i830_cleanup
,
1313 .tlb_flush
= intel_i810_tlbflush
,
1314 .mask_memory
= intel_i810_mask_memory
,
1315 .masks
= intel_i810_masks
,
1316 .agp_enable
= intel_i810_agp_enable
,
1317 .cache_flush
= global_cache_flush
,
1318 .create_gatt_table
= intel_i830_create_gatt_table
,
1319 .free_gatt_table
= intel_i830_free_gatt_table
,
1320 .insert_memory
= intel_i830_insert_entries
,
1321 .remove_memory
= intel_i830_remove_entries
,
1322 .alloc_by_type
= intel_i830_alloc_by_type
,
1323 .free_by_type
= intel_i810_free_by_type
,
1324 .agp_alloc_page
= agp_generic_alloc_page
,
1325 .agp_destroy_page
= agp_generic_destroy_page
,
1328 static struct agp_bridge_driver intel_820_driver
= {
1329 .owner
= THIS_MODULE
,
1330 .aperture_sizes
= intel_8xx_sizes
,
1331 .size_type
= U8_APER_SIZE
,
1332 .num_aperture_sizes
= 7,
1333 .configure
= intel_820_configure
,
1334 .fetch_size
= intel_8xx_fetch_size
,
1335 .cleanup
= intel_820_cleanup
,
1336 .tlb_flush
= intel_820_tlbflush
,
1337 .mask_memory
= agp_generic_mask_memory
,
1338 .masks
= intel_generic_masks
,
1339 .agp_enable
= agp_generic_enable
,
1340 .cache_flush
= global_cache_flush
,
1341 .create_gatt_table
= agp_generic_create_gatt_table
,
1342 .free_gatt_table
= agp_generic_free_gatt_table
,
1343 .insert_memory
= agp_generic_insert_memory
,
1344 .remove_memory
= agp_generic_remove_memory
,
1345 .alloc_by_type
= agp_generic_alloc_by_type
,
1346 .free_by_type
= agp_generic_free_by_type
,
1347 .agp_alloc_page
= agp_generic_alloc_page
,
1348 .agp_destroy_page
= agp_generic_destroy_page
,
1351 static struct agp_bridge_driver intel_830mp_driver
= {
1352 .owner
= THIS_MODULE
,
1353 .aperture_sizes
= intel_830mp_sizes
,
1354 .size_type
= U8_APER_SIZE
,
1355 .num_aperture_sizes
= 4,
1356 .configure
= intel_830mp_configure
,
1357 .fetch_size
= intel_8xx_fetch_size
,
1358 .cleanup
= intel_8xx_cleanup
,
1359 .tlb_flush
= intel_8xx_tlbflush
,
1360 .mask_memory
= agp_generic_mask_memory
,
1361 .masks
= intel_generic_masks
,
1362 .agp_enable
= agp_generic_enable
,
1363 .cache_flush
= global_cache_flush
,
1364 .create_gatt_table
= agp_generic_create_gatt_table
,
1365 .free_gatt_table
= agp_generic_free_gatt_table
,
1366 .insert_memory
= agp_generic_insert_memory
,
1367 .remove_memory
= agp_generic_remove_memory
,
1368 .alloc_by_type
= agp_generic_alloc_by_type
,
1369 .free_by_type
= agp_generic_free_by_type
,
1370 .agp_alloc_page
= agp_generic_alloc_page
,
1371 .agp_destroy_page
= agp_generic_destroy_page
,
1374 static struct agp_bridge_driver intel_840_driver
= {
1375 .owner
= THIS_MODULE
,
1376 .aperture_sizes
= intel_8xx_sizes
,
1377 .size_type
= U8_APER_SIZE
,
1378 .num_aperture_sizes
= 7,
1379 .configure
= intel_840_configure
,
1380 .fetch_size
= intel_8xx_fetch_size
,
1381 .cleanup
= intel_8xx_cleanup
,
1382 .tlb_flush
= intel_8xx_tlbflush
,
1383 .mask_memory
= agp_generic_mask_memory
,
1384 .masks
= intel_generic_masks
,
1385 .agp_enable
= agp_generic_enable
,
1386 .cache_flush
= global_cache_flush
,
1387 .create_gatt_table
= agp_generic_create_gatt_table
,
1388 .free_gatt_table
= agp_generic_free_gatt_table
,
1389 .insert_memory
= agp_generic_insert_memory
,
1390 .remove_memory
= agp_generic_remove_memory
,
1391 .alloc_by_type
= agp_generic_alloc_by_type
,
1392 .free_by_type
= agp_generic_free_by_type
,
1393 .agp_alloc_page
= agp_generic_alloc_page
,
1394 .agp_destroy_page
= agp_generic_destroy_page
,
1397 static struct agp_bridge_driver intel_845_driver
= {
1398 .owner
= THIS_MODULE
,
1399 .aperture_sizes
= intel_8xx_sizes
,
1400 .size_type
= U8_APER_SIZE
,
1401 .num_aperture_sizes
= 7,
1402 .configure
= intel_845_configure
,
1403 .fetch_size
= intel_8xx_fetch_size
,
1404 .cleanup
= intel_8xx_cleanup
,
1405 .tlb_flush
= intel_8xx_tlbflush
,
1406 .mask_memory
= agp_generic_mask_memory
,
1407 .masks
= intel_generic_masks
,
1408 .agp_enable
= agp_generic_enable
,
1409 .cache_flush
= global_cache_flush
,
1410 .create_gatt_table
= agp_generic_create_gatt_table
,
1411 .free_gatt_table
= agp_generic_free_gatt_table
,
1412 .insert_memory
= agp_generic_insert_memory
,
1413 .remove_memory
= agp_generic_remove_memory
,
1414 .alloc_by_type
= agp_generic_alloc_by_type
,
1415 .free_by_type
= agp_generic_free_by_type
,
1416 .agp_alloc_page
= agp_generic_alloc_page
,
1417 .agp_destroy_page
= agp_generic_destroy_page
,
1420 static struct agp_bridge_driver intel_850_driver
= {
1421 .owner
= THIS_MODULE
,
1422 .aperture_sizes
= intel_8xx_sizes
,
1423 .size_type
= U8_APER_SIZE
,
1424 .num_aperture_sizes
= 7,
1425 .configure
= intel_850_configure
,
1426 .fetch_size
= intel_8xx_fetch_size
,
1427 .cleanup
= intel_8xx_cleanup
,
1428 .tlb_flush
= intel_8xx_tlbflush
,
1429 .mask_memory
= agp_generic_mask_memory
,
1430 .masks
= intel_generic_masks
,
1431 .agp_enable
= agp_generic_enable
,
1432 .cache_flush
= global_cache_flush
,
1433 .create_gatt_table
= agp_generic_create_gatt_table
,
1434 .free_gatt_table
= agp_generic_free_gatt_table
,
1435 .insert_memory
= agp_generic_insert_memory
,
1436 .remove_memory
= agp_generic_remove_memory
,
1437 .alloc_by_type
= agp_generic_alloc_by_type
,
1438 .free_by_type
= agp_generic_free_by_type
,
1439 .agp_alloc_page
= agp_generic_alloc_page
,
1440 .agp_destroy_page
= agp_generic_destroy_page
,
1443 static struct agp_bridge_driver intel_860_driver
= {
1444 .owner
= THIS_MODULE
,
1445 .aperture_sizes
= intel_8xx_sizes
,
1446 .size_type
= U8_APER_SIZE
,
1447 .num_aperture_sizes
= 7,
1448 .configure
= intel_860_configure
,
1449 .fetch_size
= intel_8xx_fetch_size
,
1450 .cleanup
= intel_8xx_cleanup
,
1451 .tlb_flush
= intel_8xx_tlbflush
,
1452 .mask_memory
= agp_generic_mask_memory
,
1453 .masks
= intel_generic_masks
,
1454 .agp_enable
= agp_generic_enable
,
1455 .cache_flush
= global_cache_flush
,
1456 .create_gatt_table
= agp_generic_create_gatt_table
,
1457 .free_gatt_table
= agp_generic_free_gatt_table
,
1458 .insert_memory
= agp_generic_insert_memory
,
1459 .remove_memory
= agp_generic_remove_memory
,
1460 .alloc_by_type
= agp_generic_alloc_by_type
,
1461 .free_by_type
= agp_generic_free_by_type
,
1462 .agp_alloc_page
= agp_generic_alloc_page
,
1463 .agp_destroy_page
= agp_generic_destroy_page
,
1466 static struct agp_bridge_driver intel_915_driver
= {
1467 .owner
= THIS_MODULE
,
1468 .aperture_sizes
= intel_i830_sizes
,
1469 .size_type
= FIXED_APER_SIZE
,
1470 .num_aperture_sizes
= 3,
1471 .needs_scratch_page
= TRUE
,
1472 .configure
= intel_i915_configure
,
1473 .fetch_size
= intel_i915_fetch_size
,
1474 .cleanup
= intel_i915_cleanup
,
1475 .tlb_flush
= intel_i810_tlbflush
,
1476 .mask_memory
= intel_i810_mask_memory
,
1477 .masks
= intel_i810_masks
,
1478 .agp_enable
= intel_i810_agp_enable
,
1479 .cache_flush
= global_cache_flush
,
1480 .create_gatt_table
= intel_i915_create_gatt_table
,
1481 .free_gatt_table
= intel_i830_free_gatt_table
,
1482 .insert_memory
= intel_i915_insert_entries
,
1483 .remove_memory
= intel_i915_remove_entries
,
1484 .alloc_by_type
= intel_i830_alloc_by_type
,
1485 .free_by_type
= intel_i810_free_by_type
,
1486 .agp_alloc_page
= agp_generic_alloc_page
,
1487 .agp_destroy_page
= agp_generic_destroy_page
,
1491 static struct agp_bridge_driver intel_7505_driver
= {
1492 .owner
= THIS_MODULE
,
1493 .aperture_sizes
= intel_8xx_sizes
,
1494 .size_type
= U8_APER_SIZE
,
1495 .num_aperture_sizes
= 7,
1496 .configure
= intel_7505_configure
,
1497 .fetch_size
= intel_8xx_fetch_size
,
1498 .cleanup
= intel_8xx_cleanup
,
1499 .tlb_flush
= intel_8xx_tlbflush
,
1500 .mask_memory
= agp_generic_mask_memory
,
1501 .masks
= intel_generic_masks
,
1502 .agp_enable
= agp_generic_enable
,
1503 .cache_flush
= global_cache_flush
,
1504 .create_gatt_table
= agp_generic_create_gatt_table
,
1505 .free_gatt_table
= agp_generic_free_gatt_table
,
1506 .insert_memory
= agp_generic_insert_memory
,
1507 .remove_memory
= agp_generic_remove_memory
,
1508 .alloc_by_type
= agp_generic_alloc_by_type
,
1509 .free_by_type
= agp_generic_free_by_type
,
1510 .agp_alloc_page
= agp_generic_alloc_page
,
1511 .agp_destroy_page
= agp_generic_destroy_page
,
1514 static int find_i810(u16 device
)
1516 struct pci_dev
*i810_dev
;
1518 i810_dev
= pci_get_device(PCI_VENDOR_ID_INTEL
, device
, NULL
);
1521 intel_i810_private
.i810_dev
= i810_dev
;
1525 static int find_i830(u16 device
)
1527 struct pci_dev
*i830_dev
;
1529 i830_dev
= pci_get_device(PCI_VENDOR_ID_INTEL
, device
, NULL
);
1530 if (i830_dev
&& PCI_FUNC(i830_dev
->devfn
) != 0) {
1531 i830_dev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
1538 intel_i830_private
.i830_dev
= i830_dev
;
1542 static int __devinit
agp_intel_probe(struct pci_dev
*pdev
,
1543 const struct pci_device_id
*ent
)
1545 struct agp_bridge_data
*bridge
;
1546 char *name
= "(unknown)";
1550 cap_ptr
= pci_find_capability(pdev
, PCI_CAP_ID_AGP
);
1552 bridge
= agp_alloc_bridge();
1556 switch (pdev
->device
) {
1557 case PCI_DEVICE_ID_INTEL_82443LX_0
:
1558 bridge
->driver
= &intel_generic_driver
;
1561 case PCI_DEVICE_ID_INTEL_82443BX_0
:
1562 bridge
->driver
= &intel_generic_driver
;
1565 case PCI_DEVICE_ID_INTEL_82443GX_0
:
1566 bridge
->driver
= &intel_generic_driver
;
1569 case PCI_DEVICE_ID_INTEL_82810_MC1
:
1571 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1
))
1573 bridge
->driver
= &intel_810_driver
;
1575 case PCI_DEVICE_ID_INTEL_82810_MC3
:
1576 name
= "i810 DC100";
1577 if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3
))
1579 bridge
->driver
= &intel_810_driver
;
1581 case PCI_DEVICE_ID_INTEL_82810E_MC
:
1583 if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG
))
1585 bridge
->driver
= &intel_810_driver
;
1587 case PCI_DEVICE_ID_INTEL_82815_MC
:
1589 * The i815 can operate either as an i810 style
1590 * integrated device, or as an AGP4X motherboard.
1592 if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC
))
1593 bridge
->driver
= &intel_810_driver
;
1595 bridge
->driver
= &intel_815_driver
;
1598 case PCI_DEVICE_ID_INTEL_82820_HB
:
1599 case PCI_DEVICE_ID_INTEL_82820_UP_HB
:
1600 bridge
->driver
= &intel_820_driver
;
1603 case PCI_DEVICE_ID_INTEL_82830_HB
:
1604 if (find_i830(PCI_DEVICE_ID_INTEL_82830_CGC
)) {
1605 bridge
->driver
= &intel_830_driver
;
1607 bridge
->driver
= &intel_830mp_driver
;
1611 case PCI_DEVICE_ID_INTEL_82840_HB
:
1612 bridge
->driver
= &intel_840_driver
;
1615 case PCI_DEVICE_ID_INTEL_82845_HB
:
1616 bridge
->driver
= &intel_845_driver
;
1619 case PCI_DEVICE_ID_INTEL_82845G_HB
:
1620 if (find_i830(PCI_DEVICE_ID_INTEL_82845G_IG
)) {
1621 bridge
->driver
= &intel_830_driver
;
1623 bridge
->driver
= &intel_845_driver
;
1627 case PCI_DEVICE_ID_INTEL_82850_HB
:
1628 bridge
->driver
= &intel_850_driver
;
1631 case PCI_DEVICE_ID_INTEL_82855PM_HB
:
1632 bridge
->driver
= &intel_845_driver
;
1635 case PCI_DEVICE_ID_INTEL_82855GM_HB
:
1636 if (find_i830(PCI_DEVICE_ID_INTEL_82855GM_IG
)) {
1637 bridge
->driver
= &intel_830_driver
;
1640 bridge
->driver
= &intel_845_driver
;
1644 case PCI_DEVICE_ID_INTEL_82860_HB
:
1645 bridge
->driver
= &intel_860_driver
;
1648 case PCI_DEVICE_ID_INTEL_82865_HB
:
1649 if (find_i830(PCI_DEVICE_ID_INTEL_82865_IG
)) {
1650 bridge
->driver
= &intel_830_driver
;
1652 bridge
->driver
= &intel_845_driver
;
1656 case PCI_DEVICE_ID_INTEL_82875_HB
:
1657 bridge
->driver
= &intel_845_driver
;
1660 case PCI_DEVICE_ID_INTEL_82915G_HB
:
1661 if (find_i830(PCI_DEVICE_ID_INTEL_82915G_IG
)) {
1662 bridge
->driver
= &intel_915_driver
;
1664 bridge
->driver
= &intel_845_driver
;
1668 case PCI_DEVICE_ID_INTEL_82915GM_HB
:
1669 if (find_i830(PCI_DEVICE_ID_INTEL_82915GM_IG
)) {
1670 bridge
->driver
= &intel_915_driver
;
1672 bridge
->driver
= &intel_845_driver
;
1676 case PCI_DEVICE_ID_INTEL_82945G_HB
:
1677 if (find_i830(PCI_DEVICE_ID_INTEL_82945G_IG
)) {
1678 bridge
->driver
= &intel_915_driver
;
1680 bridge
->driver
= &intel_845_driver
;
1684 case PCI_DEVICE_ID_INTEL_7505_0
:
1685 bridge
->driver
= &intel_7505_driver
;
1688 case PCI_DEVICE_ID_INTEL_7205_0
:
1689 bridge
->driver
= &intel_7505_driver
;
1694 printk(KERN_WARNING PFX
"Unsupported Intel chipset (device id: %04x)\n",
1696 agp_put_bridge(bridge
);
1701 bridge
->capndx
= cap_ptr
;
1703 if (bridge
->driver
== &intel_810_driver
)
1704 bridge
->dev_private_data
= &intel_i810_private
;
1705 else if (bridge
->driver
== &intel_830_driver
)
1706 bridge
->dev_private_data
= &intel_i830_private
;
1708 printk(KERN_INFO PFX
"Detected an Intel %s Chipset.\n", name
);
1711 * The following fixes the case where the BIOS has "forgotten" to
1712 * provide an address range for the GART.
1713 * 20030610 - hamish@zot.org
1715 r
= &pdev
->resource
[0];
1716 if (!r
->start
&& r
->end
) {
1717 if(pci_assign_resource(pdev
, 0)) {
1718 printk(KERN_ERR PFX
"could not assign resource 0\n");
1719 agp_put_bridge(bridge
);
1725 * If the device has not been properly setup, the following will catch
1726 * the problem and should stop the system from crashing.
1727 * 20030610 - hamish@zot.org
1729 if (pci_enable_device(pdev
)) {
1730 printk(KERN_ERR PFX
"Unable to Enable PCI device\n");
1731 agp_put_bridge(bridge
);
1735 /* Fill in the mode register */
1737 pci_read_config_dword(pdev
,
1738 bridge
->capndx
+PCI_AGP_STATUS
,
1742 pci_set_drvdata(pdev
, bridge
);
1743 return agp_add_bridge(bridge
);
1746 printk(KERN_ERR PFX
"Detected an Intel %s chipset, "
1747 "but could not find the secondary device.\n", name
);
1748 agp_put_bridge(bridge
);
1752 static void __devexit
agp_intel_remove(struct pci_dev
*pdev
)
1754 struct agp_bridge_data
*bridge
= pci_get_drvdata(pdev
);
1756 agp_remove_bridge(bridge
);
1758 if (intel_i810_private
.i810_dev
)
1759 pci_dev_put(intel_i810_private
.i810_dev
);
1760 if (intel_i830_private
.i830_dev
)
1761 pci_dev_put(intel_i830_private
.i830_dev
);
1763 agp_put_bridge(bridge
);
1766 static int agp_intel_resume(struct pci_dev
*pdev
)
1768 struct agp_bridge_data
*bridge
= pci_get_drvdata(pdev
);
1770 pci_restore_state(pdev
);
1772 if (bridge
->driver
== &intel_generic_driver
)
1774 else if (bridge
->driver
== &intel_850_driver
)
1775 intel_850_configure();
1776 else if (bridge
->driver
== &intel_845_driver
)
1777 intel_845_configure();
1778 else if (bridge
->driver
== &intel_830mp_driver
)
1779 intel_830mp_configure();
1780 else if (bridge
->driver
== &intel_915_driver
)
1781 intel_i915_configure();
1782 else if (bridge
->driver
== &intel_830_driver
)
1783 intel_i830_configure();
1784 else if (bridge
->driver
== &intel_810_driver
)
1785 intel_i810_configure();
1790 static struct pci_device_id agp_intel_pci_table
[] = {
1793 .class = (PCI_CLASS_BRIDGE_HOST << 8), \
1795 .vendor = PCI_VENDOR_ID_INTEL, \
1797 .subvendor = PCI_ANY_ID, \
1798 .subdevice = PCI_ANY_ID, \
1800 ID(PCI_DEVICE_ID_INTEL_82443LX_0
),
1801 ID(PCI_DEVICE_ID_INTEL_82443BX_0
),
1802 ID(PCI_DEVICE_ID_INTEL_82443GX_0
),
1803 ID(PCI_DEVICE_ID_INTEL_82810_MC1
),
1804 ID(PCI_DEVICE_ID_INTEL_82810_MC3
),
1805 ID(PCI_DEVICE_ID_INTEL_82810E_MC
),
1806 ID(PCI_DEVICE_ID_INTEL_82815_MC
),
1807 ID(PCI_DEVICE_ID_INTEL_82820_HB
),
1808 ID(PCI_DEVICE_ID_INTEL_82820_UP_HB
),
1809 ID(PCI_DEVICE_ID_INTEL_82830_HB
),
1810 ID(PCI_DEVICE_ID_INTEL_82840_HB
),
1811 ID(PCI_DEVICE_ID_INTEL_82845_HB
),
1812 ID(PCI_DEVICE_ID_INTEL_82845G_HB
),
1813 ID(PCI_DEVICE_ID_INTEL_82850_HB
),
1814 ID(PCI_DEVICE_ID_INTEL_82855PM_HB
),
1815 ID(PCI_DEVICE_ID_INTEL_82855GM_HB
),
1816 ID(PCI_DEVICE_ID_INTEL_82860_HB
),
1817 ID(PCI_DEVICE_ID_INTEL_82865_HB
),
1818 ID(PCI_DEVICE_ID_INTEL_82875_HB
),
1819 ID(PCI_DEVICE_ID_INTEL_7505_0
),
1820 ID(PCI_DEVICE_ID_INTEL_7205_0
),
1821 ID(PCI_DEVICE_ID_INTEL_82915G_HB
),
1822 ID(PCI_DEVICE_ID_INTEL_82915GM_HB
),
1823 ID(PCI_DEVICE_ID_INTEL_82945G_HB
),
1827 MODULE_DEVICE_TABLE(pci
, agp_intel_pci_table
);
1829 static struct pci_driver agp_intel_pci_driver
= {
1830 .owner
= THIS_MODULE
,
1831 .name
= "agpgart-intel",
1832 .id_table
= agp_intel_pci_table
,
1833 .probe
= agp_intel_probe
,
1834 .remove
= __devexit_p(agp_intel_remove
),
1835 .resume
= agp_intel_resume
,
1838 static int __init
agp_intel_init(void)
1842 return pci_register_driver(&agp_intel_pci_driver
);
1845 static void __exit
agp_intel_cleanup(void)
1847 pci_unregister_driver(&agp_intel_pci_driver
);
1850 module_init(agp_intel_init
);
1851 module_exit(agp_intel_cleanup
);
1853 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
1854 MODULE_LICENSE("GPL and additional rights");