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drm: Replace filp in ioctl arguments with drm_file *file_priv.
[deliverable/linux.git] / drivers / char / drm / i810_dma.c
1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
33 #include "drmP.h"
34 #include "drm.h"
35 #include "i810_drm.h"
36 #include "i810_drv.h"
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/pagemap.h>
40
41 #define I810_BUF_FREE 2
42 #define I810_BUF_CLIENT 1
43 #define I810_BUF_HARDWARE 0
44
45 #define I810_BUF_UNMAPPED 0
46 #define I810_BUF_MAPPED 1
47
48 static struct drm_buf *i810_freelist_get(struct drm_device * dev)
49 {
50 struct drm_device_dma *dma = dev->dma;
51 int i;
52 int used;
53
54 /* Linear search might not be the best solution */
55
56 for (i = 0; i < dma->buf_count; i++) {
57 struct drm_buf *buf = dma->buflist[i];
58 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
59 /* In use is already a pointer */
60 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
61 I810_BUF_CLIENT);
62 if (used == I810_BUF_FREE) {
63 return buf;
64 }
65 }
66 return NULL;
67 }
68
69 /* This should only be called if the buffer is not sent to the hardware
70 * yet, the hardware updates in use for us once its on the ring buffer.
71 */
72
73 static int i810_freelist_put(struct drm_device * dev, struct drm_buf * buf)
74 {
75 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
76 int used;
77
78 /* In use is already a pointer */
79 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
80 if (used != I810_BUF_CLIENT) {
81 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
82 return -EINVAL;
83 }
84
85 return 0;
86 }
87
88 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
89 {
90 struct drm_file *priv = filp->private_data;
91 struct drm_device *dev;
92 drm_i810_private_t *dev_priv;
93 struct drm_buf *buf;
94 drm_i810_buf_priv_t *buf_priv;
95
96 lock_kernel();
97 dev = priv->head->dev;
98 dev_priv = dev->dev_private;
99 buf = dev_priv->mmap_buffer;
100 buf_priv = buf->dev_private;
101
102 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
103 vma->vm_file = filp;
104
105 buf_priv->currently_mapped = I810_BUF_MAPPED;
106 unlock_kernel();
107
108 if (io_remap_pfn_range(vma, vma->vm_start,
109 vma->vm_pgoff,
110 vma->vm_end - vma->vm_start, vma->vm_page_prot))
111 return -EAGAIN;
112 return 0;
113 }
114
115 static const struct file_operations i810_buffer_fops = {
116 .open = drm_open,
117 .release = drm_release,
118 .ioctl = drm_ioctl,
119 .mmap = i810_mmap_buffers,
120 .fasync = drm_fasync,
121 };
122
123 static int i810_map_buffer(struct drm_buf * buf, struct drm_file *file_priv)
124 {
125 struct drm_device *dev = file_priv->head->dev;
126 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
127 drm_i810_private_t *dev_priv = dev->dev_private;
128 const struct file_operations *old_fops;
129 int retcode = 0;
130
131 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
132 return -EINVAL;
133
134 down_write(&current->mm->mmap_sem);
135 old_fops = file_priv->filp->f_op;
136 file_priv->filp->f_op = &i810_buffer_fops;
137 dev_priv->mmap_buffer = buf;
138 buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total,
139 PROT_READ | PROT_WRITE,
140 MAP_SHARED, buf->bus_address);
141 dev_priv->mmap_buffer = NULL;
142 file_priv->filp->f_op = old_fops;
143 if (IS_ERR(buf_priv->virtual)) {
144 /* Real error */
145 DRM_ERROR("mmap error\n");
146 retcode = PTR_ERR(buf_priv->virtual);
147 buf_priv->virtual = NULL;
148 }
149 up_write(&current->mm->mmap_sem);
150
151 return retcode;
152 }
153
154 static int i810_unmap_buffer(struct drm_buf * buf)
155 {
156 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
157 int retcode = 0;
158
159 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
160 return -EINVAL;
161
162 down_write(&current->mm->mmap_sem);
163 retcode = do_munmap(current->mm,
164 (unsigned long)buf_priv->virtual,
165 (size_t) buf->total);
166 up_write(&current->mm->mmap_sem);
167
168 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
169 buf_priv->virtual = NULL;
170
171 return retcode;
172 }
173
174 static int i810_dma_get_buffer(struct drm_device * dev, drm_i810_dma_t * d,
175 struct drm_file *file_priv)
176 {
177 struct drm_buf *buf;
178 drm_i810_buf_priv_t *buf_priv;
179 int retcode = 0;
180
181 buf = i810_freelist_get(dev);
182 if (!buf) {
183 retcode = -ENOMEM;
184 DRM_DEBUG("retcode=%d\n", retcode);
185 return retcode;
186 }
187
188 retcode = i810_map_buffer(buf, file_priv);
189 if (retcode) {
190 i810_freelist_put(dev, buf);
191 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
192 return retcode;
193 }
194 buf->file_priv = file_priv;
195 buf_priv = buf->dev_private;
196 d->granted = 1;
197 d->request_idx = buf->idx;
198 d->request_size = buf->total;
199 d->virtual = buf_priv->virtual;
200
201 return retcode;
202 }
203
204 static int i810_dma_cleanup(struct drm_device * dev)
205 {
206 struct drm_device_dma *dma = dev->dma;
207
208 /* Make sure interrupts are disabled here because the uninstall ioctl
209 * may not have been called from userspace and after dev_private
210 * is freed, it's too late.
211 */
212 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
213 drm_irq_uninstall(dev);
214
215 if (dev->dev_private) {
216 int i;
217 drm_i810_private_t *dev_priv =
218 (drm_i810_private_t *) dev->dev_private;
219
220 if (dev_priv->ring.virtual_start) {
221 drm_core_ioremapfree(&dev_priv->ring.map, dev);
222 }
223 if (dev_priv->hw_status_page) {
224 pci_free_consistent(dev->pdev, PAGE_SIZE,
225 dev_priv->hw_status_page,
226 dev_priv->dma_status_page);
227 /* Need to rewrite hardware status page */
228 I810_WRITE(0x02080, 0x1ffff000);
229 }
230 drm_free(dev->dev_private, sizeof(drm_i810_private_t),
231 DRM_MEM_DRIVER);
232 dev->dev_private = NULL;
233
234 for (i = 0; i < dma->buf_count; i++) {
235 struct drm_buf *buf = dma->buflist[i];
236 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
237
238 if (buf_priv->kernel_virtual && buf->total)
239 drm_core_ioremapfree(&buf_priv->map, dev);
240 }
241 }
242 return 0;
243 }
244
245 static int i810_wait_ring(struct drm_device * dev, int n)
246 {
247 drm_i810_private_t *dev_priv = dev->dev_private;
248 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
249 int iters = 0;
250 unsigned long end;
251 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
252
253 end = jiffies + (HZ * 3);
254 while (ring->space < n) {
255 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
256 ring->space = ring->head - (ring->tail + 8);
257 if (ring->space < 0)
258 ring->space += ring->Size;
259
260 if (ring->head != last_head) {
261 end = jiffies + (HZ * 3);
262 last_head = ring->head;
263 }
264
265 iters++;
266 if (time_before(end, jiffies)) {
267 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
268 DRM_ERROR("lockup\n");
269 goto out_wait_ring;
270 }
271 udelay(1);
272 }
273
274 out_wait_ring:
275 return iters;
276 }
277
278 static void i810_kernel_lost_context(struct drm_device * dev)
279 {
280 drm_i810_private_t *dev_priv = dev->dev_private;
281 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
282
283 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
284 ring->tail = I810_READ(LP_RING + RING_TAIL);
285 ring->space = ring->head - (ring->tail + 8);
286 if (ring->space < 0)
287 ring->space += ring->Size;
288 }
289
290 static int i810_freelist_init(struct drm_device * dev, drm_i810_private_t * dev_priv)
291 {
292 struct drm_device_dma *dma = dev->dma;
293 int my_idx = 24;
294 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
295 int i;
296
297 if (dma->buf_count > 1019) {
298 /* Not enough space in the status page for the freelist */
299 return -EINVAL;
300 }
301
302 for (i = 0; i < dma->buf_count; i++) {
303 struct drm_buf *buf = dma->buflist[i];
304 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
305
306 buf_priv->in_use = hw_status++;
307 buf_priv->my_use_idx = my_idx;
308 my_idx += 4;
309
310 *buf_priv->in_use = I810_BUF_FREE;
311
312 buf_priv->map.offset = buf->bus_address;
313 buf_priv->map.size = buf->total;
314 buf_priv->map.type = _DRM_AGP;
315 buf_priv->map.flags = 0;
316 buf_priv->map.mtrr = 0;
317
318 drm_core_ioremap(&buf_priv->map, dev);
319 buf_priv->kernel_virtual = buf_priv->map.handle;
320
321 }
322 return 0;
323 }
324
325 static int i810_dma_initialize(struct drm_device * dev,
326 drm_i810_private_t * dev_priv,
327 drm_i810_init_t * init)
328 {
329 struct drm_map_list *r_list;
330 memset(dev_priv, 0, sizeof(drm_i810_private_t));
331
332 list_for_each_entry(r_list, &dev->maplist, head) {
333 if (r_list->map &&
334 r_list->map->type == _DRM_SHM &&
335 r_list->map->flags & _DRM_CONTAINS_LOCK) {
336 dev_priv->sarea_map = r_list->map;
337 break;
338 }
339 }
340 if (!dev_priv->sarea_map) {
341 dev->dev_private = (void *)dev_priv;
342 i810_dma_cleanup(dev);
343 DRM_ERROR("can not find sarea!\n");
344 return -EINVAL;
345 }
346 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
347 if (!dev_priv->mmio_map) {
348 dev->dev_private = (void *)dev_priv;
349 i810_dma_cleanup(dev);
350 DRM_ERROR("can not find mmio map!\n");
351 return -EINVAL;
352 }
353 dev->agp_buffer_token = init->buffers_offset;
354 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
355 if (!dev->agp_buffer_map) {
356 dev->dev_private = (void *)dev_priv;
357 i810_dma_cleanup(dev);
358 DRM_ERROR("can not find dma buffer map!\n");
359 return -EINVAL;
360 }
361
362 dev_priv->sarea_priv = (drm_i810_sarea_t *)
363 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
364
365 dev_priv->ring.Start = init->ring_start;
366 dev_priv->ring.End = init->ring_end;
367 dev_priv->ring.Size = init->ring_size;
368
369 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
370 dev_priv->ring.map.size = init->ring_size;
371 dev_priv->ring.map.type = _DRM_AGP;
372 dev_priv->ring.map.flags = 0;
373 dev_priv->ring.map.mtrr = 0;
374
375 drm_core_ioremap(&dev_priv->ring.map, dev);
376
377 if (dev_priv->ring.map.handle == NULL) {
378 dev->dev_private = (void *)dev_priv;
379 i810_dma_cleanup(dev);
380 DRM_ERROR("can not ioremap virtual address for"
381 " ring buffer\n");
382 return -ENOMEM;
383 }
384
385 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
386
387 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
388
389 dev_priv->w = init->w;
390 dev_priv->h = init->h;
391 dev_priv->pitch = init->pitch;
392 dev_priv->back_offset = init->back_offset;
393 dev_priv->depth_offset = init->depth_offset;
394 dev_priv->front_offset = init->front_offset;
395
396 dev_priv->overlay_offset = init->overlay_offset;
397 dev_priv->overlay_physical = init->overlay_physical;
398
399 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
400 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
401 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
402
403 /* Program Hardware Status Page */
404 dev_priv->hw_status_page =
405 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
406 &dev_priv->dma_status_page);
407 if (!dev_priv->hw_status_page) {
408 dev->dev_private = (void *)dev_priv;
409 i810_dma_cleanup(dev);
410 DRM_ERROR("Can not allocate hardware status page\n");
411 return -ENOMEM;
412 }
413 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
414 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
415
416 I810_WRITE(0x02080, dev_priv->dma_status_page);
417 DRM_DEBUG("Enabled hardware status page\n");
418
419 /* Now we need to init our freelist */
420 if (i810_freelist_init(dev, dev_priv) != 0) {
421 dev->dev_private = (void *)dev_priv;
422 i810_dma_cleanup(dev);
423 DRM_ERROR("Not enough space in the status page for"
424 " the freelist\n");
425 return -ENOMEM;
426 }
427 dev->dev_private = (void *)dev_priv;
428
429 return 0;
430 }
431
432 /* i810 DRM version 1.1 used a smaller init structure with different
433 * ordering of values than is currently used (drm >= 1.2). There is
434 * no defined way to detect the XFree version to correct this problem,
435 * however by checking using this procedure we can detect the correct
436 * thing to do.
437 *
438 * #1 Read the Smaller init structure from user-space
439 * #2 Verify the overlay_physical is a valid physical address, or NULL
440 * If it isn't then we have a v1.1 client. Fix up params.
441 * If it is, then we have a 1.2 client... get the rest of the data.
442 */
443 static int i810_dma_init_compat(drm_i810_init_t * init, unsigned long arg)
444 {
445
446 /* Get v1.1 init data */
447 if (copy_from_user(init, (drm_i810_pre12_init_t __user *) arg,
448 sizeof(drm_i810_pre12_init_t))) {
449 return -EFAULT;
450 }
451
452 if ((!init->overlay_physical) || (init->overlay_physical > 4096)) {
453
454 /* This is a v1.2 client, just get the v1.2 init data */
455 DRM_INFO("Using POST v1.2 init.\n");
456 if (copy_from_user(init, (drm_i810_init_t __user *) arg,
457 sizeof(drm_i810_init_t))) {
458 return -EFAULT;
459 }
460 } else {
461
462 /* This is a v1.1 client, fix the params */
463 DRM_INFO("Using PRE v1.2 init.\n");
464 init->pitch_bits = init->h;
465 init->pitch = init->w;
466 init->h = init->overlay_physical;
467 init->w = init->overlay_offset;
468 init->overlay_physical = 0;
469 init->overlay_offset = 0;
470 }
471
472 return 0;
473 }
474
475 static int i810_dma_init(struct inode *inode, struct drm_file *file_priv,
476 unsigned int cmd, unsigned long arg)
477 {
478 struct drm_device *dev = file_priv->head->dev;
479 drm_i810_private_t *dev_priv;
480 drm_i810_init_t init;
481 int retcode = 0;
482
483 /* Get only the init func */
484 if (copy_from_user
485 (&init, (void __user *)arg, sizeof(drm_i810_init_func_t)))
486 return -EFAULT;
487
488 switch (init.func) {
489 case I810_INIT_DMA:
490 /* This case is for backward compatibility. It
491 * handles XFree 4.1.0 and 4.2.0, and has to
492 * do some parameter checking as described below.
493 * It will someday go away.
494 */
495 retcode = i810_dma_init_compat(&init, arg);
496 if (retcode)
497 return retcode;
498
499 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
500 DRM_MEM_DRIVER);
501 if (dev_priv == NULL)
502 return -ENOMEM;
503 retcode = i810_dma_initialize(dev, dev_priv, &init);
504 break;
505
506 default:
507 case I810_INIT_DMA_1_4:
508 DRM_INFO("Using v1.4 init.\n");
509 if (copy_from_user(&init, (drm_i810_init_t __user *) arg,
510 sizeof(drm_i810_init_t))) {
511 return -EFAULT;
512 }
513 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
514 DRM_MEM_DRIVER);
515 if (dev_priv == NULL)
516 return -ENOMEM;
517 retcode = i810_dma_initialize(dev, dev_priv, &init);
518 break;
519
520 case I810_CLEANUP_DMA:
521 DRM_INFO("DMA Cleanup\n");
522 retcode = i810_dma_cleanup(dev);
523 break;
524 }
525
526 return retcode;
527 }
528
529 /* Most efficient way to verify state for the i810 is as it is
530 * emitted. Non-conformant state is silently dropped.
531 *
532 * Use 'volatile' & local var tmp to force the emitted values to be
533 * identical to the verified ones.
534 */
535 static void i810EmitContextVerified(struct drm_device * dev,
536 volatile unsigned int *code)
537 {
538 drm_i810_private_t *dev_priv = dev->dev_private;
539 int i, j = 0;
540 unsigned int tmp;
541 RING_LOCALS;
542
543 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
544
545 OUT_RING(GFX_OP_COLOR_FACTOR);
546 OUT_RING(code[I810_CTXREG_CF1]);
547
548 OUT_RING(GFX_OP_STIPPLE);
549 OUT_RING(code[I810_CTXREG_ST1]);
550
551 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
552 tmp = code[i];
553
554 if ((tmp & (7 << 29)) == (3 << 29) &&
555 (tmp & (0x1f << 24)) < (0x1d << 24)) {
556 OUT_RING(tmp);
557 j++;
558 } else
559 printk("constext state dropped!!!\n");
560 }
561
562 if (j & 1)
563 OUT_RING(0);
564
565 ADVANCE_LP_RING();
566 }
567
568 static void i810EmitTexVerified(struct drm_device * dev, volatile unsigned int *code)
569 {
570 drm_i810_private_t *dev_priv = dev->dev_private;
571 int i, j = 0;
572 unsigned int tmp;
573 RING_LOCALS;
574
575 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
576
577 OUT_RING(GFX_OP_MAP_INFO);
578 OUT_RING(code[I810_TEXREG_MI1]);
579 OUT_RING(code[I810_TEXREG_MI2]);
580 OUT_RING(code[I810_TEXREG_MI3]);
581
582 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
583 tmp = code[i];
584
585 if ((tmp & (7 << 29)) == (3 << 29) &&
586 (tmp & (0x1f << 24)) < (0x1d << 24)) {
587 OUT_RING(tmp);
588 j++;
589 } else
590 printk("texture state dropped!!!\n");
591 }
592
593 if (j & 1)
594 OUT_RING(0);
595
596 ADVANCE_LP_RING();
597 }
598
599 /* Need to do some additional checking when setting the dest buffer.
600 */
601 static void i810EmitDestVerified(struct drm_device * dev,
602 volatile unsigned int *code)
603 {
604 drm_i810_private_t *dev_priv = dev->dev_private;
605 unsigned int tmp;
606 RING_LOCALS;
607
608 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
609
610 tmp = code[I810_DESTREG_DI1];
611 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
612 OUT_RING(CMD_OP_DESTBUFFER_INFO);
613 OUT_RING(tmp);
614 } else
615 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
616 tmp, dev_priv->front_di1, dev_priv->back_di1);
617
618 /* invarient:
619 */
620 OUT_RING(CMD_OP_Z_BUFFER_INFO);
621 OUT_RING(dev_priv->zi1);
622
623 OUT_RING(GFX_OP_DESTBUFFER_VARS);
624 OUT_RING(code[I810_DESTREG_DV1]);
625
626 OUT_RING(GFX_OP_DRAWRECT_INFO);
627 OUT_RING(code[I810_DESTREG_DR1]);
628 OUT_RING(code[I810_DESTREG_DR2]);
629 OUT_RING(code[I810_DESTREG_DR3]);
630 OUT_RING(code[I810_DESTREG_DR4]);
631 OUT_RING(0);
632
633 ADVANCE_LP_RING();
634 }
635
636 static void i810EmitState(struct drm_device * dev)
637 {
638 drm_i810_private_t *dev_priv = dev->dev_private;
639 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
640 unsigned int dirty = sarea_priv->dirty;
641
642 DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
643
644 if (dirty & I810_UPLOAD_BUFFERS) {
645 i810EmitDestVerified(dev, sarea_priv->BufferState);
646 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
647 }
648
649 if (dirty & I810_UPLOAD_CTX) {
650 i810EmitContextVerified(dev, sarea_priv->ContextState);
651 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
652 }
653
654 if (dirty & I810_UPLOAD_TEX0) {
655 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
656 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
657 }
658
659 if (dirty & I810_UPLOAD_TEX1) {
660 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
661 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
662 }
663 }
664
665 /* need to verify
666 */
667 static void i810_dma_dispatch_clear(struct drm_device * dev, int flags,
668 unsigned int clear_color,
669 unsigned int clear_zval)
670 {
671 drm_i810_private_t *dev_priv = dev->dev_private;
672 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
673 int nbox = sarea_priv->nbox;
674 struct drm_clip_rect *pbox = sarea_priv->boxes;
675 int pitch = dev_priv->pitch;
676 int cpp = 2;
677 int i;
678 RING_LOCALS;
679
680 if (dev_priv->current_page == 1) {
681 unsigned int tmp = flags;
682
683 flags &= ~(I810_FRONT | I810_BACK);
684 if (tmp & I810_FRONT)
685 flags |= I810_BACK;
686 if (tmp & I810_BACK)
687 flags |= I810_FRONT;
688 }
689
690 i810_kernel_lost_context(dev);
691
692 if (nbox > I810_NR_SAREA_CLIPRECTS)
693 nbox = I810_NR_SAREA_CLIPRECTS;
694
695 for (i = 0; i < nbox; i++, pbox++) {
696 unsigned int x = pbox->x1;
697 unsigned int y = pbox->y1;
698 unsigned int width = (pbox->x2 - x) * cpp;
699 unsigned int height = pbox->y2 - y;
700 unsigned int start = y * pitch + x * cpp;
701
702 if (pbox->x1 > pbox->x2 ||
703 pbox->y1 > pbox->y2 ||
704 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
705 continue;
706
707 if (flags & I810_FRONT) {
708 BEGIN_LP_RING(6);
709 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
710 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
711 OUT_RING((height << 16) | width);
712 OUT_RING(start);
713 OUT_RING(clear_color);
714 OUT_RING(0);
715 ADVANCE_LP_RING();
716 }
717
718 if (flags & I810_BACK) {
719 BEGIN_LP_RING(6);
720 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
721 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
722 OUT_RING((height << 16) | width);
723 OUT_RING(dev_priv->back_offset + start);
724 OUT_RING(clear_color);
725 OUT_RING(0);
726 ADVANCE_LP_RING();
727 }
728
729 if (flags & I810_DEPTH) {
730 BEGIN_LP_RING(6);
731 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
732 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
733 OUT_RING((height << 16) | width);
734 OUT_RING(dev_priv->depth_offset + start);
735 OUT_RING(clear_zval);
736 OUT_RING(0);
737 ADVANCE_LP_RING();
738 }
739 }
740 }
741
742 static void i810_dma_dispatch_swap(struct drm_device * dev)
743 {
744 drm_i810_private_t *dev_priv = dev->dev_private;
745 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
746 int nbox = sarea_priv->nbox;
747 struct drm_clip_rect *pbox = sarea_priv->boxes;
748 int pitch = dev_priv->pitch;
749 int cpp = 2;
750 int i;
751 RING_LOCALS;
752
753 DRM_DEBUG("swapbuffers\n");
754
755 i810_kernel_lost_context(dev);
756
757 if (nbox > I810_NR_SAREA_CLIPRECTS)
758 nbox = I810_NR_SAREA_CLIPRECTS;
759
760 for (i = 0; i < nbox; i++, pbox++) {
761 unsigned int w = pbox->x2 - pbox->x1;
762 unsigned int h = pbox->y2 - pbox->y1;
763 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
764 unsigned int start = dst;
765
766 if (pbox->x1 > pbox->x2 ||
767 pbox->y1 > pbox->y2 ||
768 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
769 continue;
770
771 BEGIN_LP_RING(6);
772 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
773 OUT_RING(pitch | (0xCC << 16));
774 OUT_RING((h << 16) | (w * cpp));
775 if (dev_priv->current_page == 0)
776 OUT_RING(dev_priv->front_offset + start);
777 else
778 OUT_RING(dev_priv->back_offset + start);
779 OUT_RING(pitch);
780 if (dev_priv->current_page == 0)
781 OUT_RING(dev_priv->back_offset + start);
782 else
783 OUT_RING(dev_priv->front_offset + start);
784 ADVANCE_LP_RING();
785 }
786 }
787
788 static void i810_dma_dispatch_vertex(struct drm_device * dev,
789 struct drm_buf * buf, int discard, int used)
790 {
791 drm_i810_private_t *dev_priv = dev->dev_private;
792 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
793 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
794 struct drm_clip_rect *box = sarea_priv->boxes;
795 int nbox = sarea_priv->nbox;
796 unsigned long address = (unsigned long)buf->bus_address;
797 unsigned long start = address - dev->agp->base;
798 int i = 0;
799 RING_LOCALS;
800
801 i810_kernel_lost_context(dev);
802
803 if (nbox > I810_NR_SAREA_CLIPRECTS)
804 nbox = I810_NR_SAREA_CLIPRECTS;
805
806 if (used > 4 * 1024)
807 used = 0;
808
809 if (sarea_priv->dirty)
810 i810EmitState(dev);
811
812 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
813 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
814
815 *(u32 *) buf_priv->kernel_virtual =
816 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
817
818 if (used & 4) {
819 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
820 used += 4;
821 }
822
823 i810_unmap_buffer(buf);
824 }
825
826 if (used) {
827 do {
828 if (i < nbox) {
829 BEGIN_LP_RING(4);
830 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
831 SC_ENABLE);
832 OUT_RING(GFX_OP_SCISSOR_INFO);
833 OUT_RING(box[i].x1 | (box[i].y1 << 16));
834 OUT_RING((box[i].x2 -
835 1) | ((box[i].y2 - 1) << 16));
836 ADVANCE_LP_RING();
837 }
838
839 BEGIN_LP_RING(4);
840 OUT_RING(CMD_OP_BATCH_BUFFER);
841 OUT_RING(start | BB1_PROTECTED);
842 OUT_RING(start + used - 4);
843 OUT_RING(0);
844 ADVANCE_LP_RING();
845
846 } while (++i < nbox);
847 }
848
849 if (discard) {
850 dev_priv->counter++;
851
852 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
853 I810_BUF_HARDWARE);
854
855 BEGIN_LP_RING(8);
856 OUT_RING(CMD_STORE_DWORD_IDX);
857 OUT_RING(20);
858 OUT_RING(dev_priv->counter);
859 OUT_RING(CMD_STORE_DWORD_IDX);
860 OUT_RING(buf_priv->my_use_idx);
861 OUT_RING(I810_BUF_FREE);
862 OUT_RING(CMD_REPORT_HEAD);
863 OUT_RING(0);
864 ADVANCE_LP_RING();
865 }
866 }
867
868 static void i810_dma_dispatch_flip(struct drm_device * dev)
869 {
870 drm_i810_private_t *dev_priv = dev->dev_private;
871 int pitch = dev_priv->pitch;
872 RING_LOCALS;
873
874 DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
875 __FUNCTION__,
876 dev_priv->current_page,
877 dev_priv->sarea_priv->pf_current_page);
878
879 i810_kernel_lost_context(dev);
880
881 BEGIN_LP_RING(2);
882 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
883 OUT_RING(0);
884 ADVANCE_LP_RING();
885
886 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
887 /* On i815 at least ASYNC is buggy */
888 /* pitch<<5 is from 11.2.8 p158,
889 its the pitch / 8 then left shifted 8,
890 so (pitch >> 3) << 8 */
891 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
892 if (dev_priv->current_page == 0) {
893 OUT_RING(dev_priv->back_offset);
894 dev_priv->current_page = 1;
895 } else {
896 OUT_RING(dev_priv->front_offset);
897 dev_priv->current_page = 0;
898 }
899 OUT_RING(0);
900 ADVANCE_LP_RING();
901
902 BEGIN_LP_RING(2);
903 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
904 OUT_RING(0);
905 ADVANCE_LP_RING();
906
907 /* Increment the frame counter. The client-side 3D driver must
908 * throttle the framerate by waiting for this value before
909 * performing the swapbuffer ioctl.
910 */
911 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
912
913 }
914
915 static void i810_dma_quiescent(struct drm_device * dev)
916 {
917 drm_i810_private_t *dev_priv = dev->dev_private;
918 RING_LOCALS;
919
920 /* printk("%s\n", __FUNCTION__); */
921
922 i810_kernel_lost_context(dev);
923
924 BEGIN_LP_RING(4);
925 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
926 OUT_RING(CMD_REPORT_HEAD);
927 OUT_RING(0);
928 OUT_RING(0);
929 ADVANCE_LP_RING();
930
931 i810_wait_ring(dev, dev_priv->ring.Size - 8);
932 }
933
934 static int i810_flush_queue(struct drm_device * dev)
935 {
936 drm_i810_private_t *dev_priv = dev->dev_private;
937 struct drm_device_dma *dma = dev->dma;
938 int i, ret = 0;
939 RING_LOCALS;
940
941 /* printk("%s\n", __FUNCTION__); */
942
943 i810_kernel_lost_context(dev);
944
945 BEGIN_LP_RING(2);
946 OUT_RING(CMD_REPORT_HEAD);
947 OUT_RING(0);
948 ADVANCE_LP_RING();
949
950 i810_wait_ring(dev, dev_priv->ring.Size - 8);
951
952 for (i = 0; i < dma->buf_count; i++) {
953 struct drm_buf *buf = dma->buflist[i];
954 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
955
956 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
957 I810_BUF_FREE);
958
959 if (used == I810_BUF_HARDWARE)
960 DRM_DEBUG("reclaimed from HARDWARE\n");
961 if (used == I810_BUF_CLIENT)
962 DRM_DEBUG("still on client\n");
963 }
964
965 return ret;
966 }
967
968 /* Must be called with the lock held */
969 static void i810_reclaim_buffers(struct drm_device * dev,
970 struct drm_file *file_priv)
971 {
972 struct drm_device_dma *dma = dev->dma;
973 int i;
974
975 if (!dma)
976 return;
977 if (!dev->dev_private)
978 return;
979 if (!dma->buflist)
980 return;
981
982 i810_flush_queue(dev);
983
984 for (i = 0; i < dma->buf_count; i++) {
985 struct drm_buf *buf = dma->buflist[i];
986 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
987
988 if (buf->file_priv == file_priv && buf_priv) {
989 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
990 I810_BUF_FREE);
991
992 if (used == I810_BUF_CLIENT)
993 DRM_DEBUG("reclaimed from client\n");
994 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
995 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
996 }
997 }
998 }
999
1000 static int i810_flush_ioctl(struct inode *inode, struct drm_file *file_priv,
1001 unsigned int cmd, unsigned long arg)
1002 {
1003 struct drm_device *dev = file_priv->head->dev;
1004
1005 LOCK_TEST_WITH_RETURN(dev, file_priv);
1006
1007 i810_flush_queue(dev);
1008 return 0;
1009 }
1010
1011 static int i810_dma_vertex(struct inode *inode, struct drm_file *file_priv,
1012 unsigned int cmd, unsigned long arg)
1013 {
1014 struct drm_device *dev = file_priv->head->dev;
1015 struct drm_device_dma *dma = dev->dma;
1016 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1017 u32 *hw_status = dev_priv->hw_status_page;
1018 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1019 dev_priv->sarea_priv;
1020 drm_i810_vertex_t vertex;
1021
1022 if (copy_from_user
1023 (&vertex, (drm_i810_vertex_t __user *) arg, sizeof(vertex)))
1024 return -EFAULT;
1025
1026 LOCK_TEST_WITH_RETURN(dev, file_priv);
1027
1028 DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
1029 vertex.idx, vertex.used, vertex.discard);
1030
1031 if (vertex.idx < 0 || vertex.idx > dma->buf_count)
1032 return -EINVAL;
1033
1034 i810_dma_dispatch_vertex(dev,
1035 dma->buflist[vertex.idx],
1036 vertex.discard, vertex.used);
1037
1038 atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]);
1039 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1040 sarea_priv->last_enqueue = dev_priv->counter - 1;
1041 sarea_priv->last_dispatch = (int)hw_status[5];
1042
1043 return 0;
1044 }
1045
1046 static int i810_clear_bufs(struct inode *inode, struct drm_file *file_priv,
1047 unsigned int cmd, unsigned long arg)
1048 {
1049 struct drm_device *dev = file_priv->head->dev;
1050 drm_i810_clear_t clear;
1051
1052 if (copy_from_user
1053 (&clear, (drm_i810_clear_t __user *) arg, sizeof(clear)))
1054 return -EFAULT;
1055
1056 LOCK_TEST_WITH_RETURN(dev, file_priv);
1057
1058 /* GH: Someone's doing nasty things... */
1059 if (!dev->dev_private) {
1060 return -EINVAL;
1061 }
1062
1063 i810_dma_dispatch_clear(dev, clear.flags,
1064 clear.clear_color, clear.clear_depth);
1065 return 0;
1066 }
1067
1068 static int i810_swap_bufs(struct inode *inode, struct drm_file *file_priv,
1069 unsigned int cmd, unsigned long arg)
1070 {
1071 struct drm_device *dev = file_priv->head->dev;
1072
1073 DRM_DEBUG("i810_swap_bufs\n");
1074
1075 LOCK_TEST_WITH_RETURN(dev, file_priv);
1076
1077 i810_dma_dispatch_swap(dev);
1078 return 0;
1079 }
1080
1081 static int i810_getage(struct inode *inode, struct drm_file *file_priv,
1082 unsigned int cmd,
1083 unsigned long arg)
1084 {
1085 struct drm_device *dev = file_priv->head->dev;
1086 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1087 u32 *hw_status = dev_priv->hw_status_page;
1088 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1089 dev_priv->sarea_priv;
1090
1091 sarea_priv->last_dispatch = (int)hw_status[5];
1092 return 0;
1093 }
1094
1095 static int i810_getbuf(struct inode *inode, struct drm_file *file_priv,
1096 unsigned int cmd, unsigned long arg)
1097 {
1098 struct drm_device *dev = file_priv->head->dev;
1099 int retcode = 0;
1100 drm_i810_dma_t d;
1101 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1102 u32 *hw_status = dev_priv->hw_status_page;
1103 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1104 dev_priv->sarea_priv;
1105
1106 if (copy_from_user(&d, (drm_i810_dma_t __user *) arg, sizeof(d)))
1107 return -EFAULT;
1108
1109 LOCK_TEST_WITH_RETURN(dev, file_priv);
1110
1111 d.granted = 0;
1112
1113 retcode = i810_dma_get_buffer(dev, &d, file_priv);
1114
1115 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1116 current->pid, retcode, d.granted);
1117
1118 if (copy_to_user((void __user *) arg, &d, sizeof(d)))
1119 return -EFAULT;
1120 sarea_priv->last_dispatch = (int)hw_status[5];
1121
1122 return retcode;
1123 }
1124
1125 static int i810_copybuf(struct inode *inode, struct drm_file *file_priv,
1126 unsigned int cmd, unsigned long arg)
1127 {
1128 /* Never copy - 2.4.x doesn't need it */
1129 return 0;
1130 }
1131
1132 static int i810_docopy(struct inode *inode, struct drm_file *file_priv,
1133 unsigned int cmd, unsigned long arg)
1134 {
1135 /* Never copy - 2.4.x doesn't need it */
1136 return 0;
1137 }
1138
1139 static void i810_dma_dispatch_mc(struct drm_device * dev, struct drm_buf * buf, int used,
1140 unsigned int last_render)
1141 {
1142 drm_i810_private_t *dev_priv = dev->dev_private;
1143 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1144 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1145 unsigned long address = (unsigned long)buf->bus_address;
1146 unsigned long start = address - dev->agp->base;
1147 int u;
1148 RING_LOCALS;
1149
1150 i810_kernel_lost_context(dev);
1151
1152 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1153 if (u != I810_BUF_CLIENT) {
1154 DRM_DEBUG("MC found buffer that isn't mine!\n");
1155 }
1156
1157 if (used > 4 * 1024)
1158 used = 0;
1159
1160 sarea_priv->dirty = 0x7f;
1161
1162 DRM_DEBUG("dispatch mc addr 0x%lx, used 0x%x\n", address, used);
1163
1164 dev_priv->counter++;
1165 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1166 DRM_DEBUG("i810_dma_dispatch_mc\n");
1167 DRM_DEBUG("start : %lx\n", start);
1168 DRM_DEBUG("used : %d\n", used);
1169 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1170
1171 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1172 if (used & 4) {
1173 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1174 used += 4;
1175 }
1176
1177 i810_unmap_buffer(buf);
1178 }
1179 BEGIN_LP_RING(4);
1180 OUT_RING(CMD_OP_BATCH_BUFFER);
1181 OUT_RING(start | BB1_PROTECTED);
1182 OUT_RING(start + used - 4);
1183 OUT_RING(0);
1184 ADVANCE_LP_RING();
1185
1186 BEGIN_LP_RING(8);
1187 OUT_RING(CMD_STORE_DWORD_IDX);
1188 OUT_RING(buf_priv->my_use_idx);
1189 OUT_RING(I810_BUF_FREE);
1190 OUT_RING(0);
1191
1192 OUT_RING(CMD_STORE_DWORD_IDX);
1193 OUT_RING(16);
1194 OUT_RING(last_render);
1195 OUT_RING(0);
1196 ADVANCE_LP_RING();
1197 }
1198
1199 static int i810_dma_mc(struct inode *inode, struct drm_file *file_priv,
1200 unsigned int cmd, unsigned long arg)
1201 {
1202 struct drm_device *dev = file_priv->head->dev;
1203 struct drm_device_dma *dma = dev->dma;
1204 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1205 u32 *hw_status = dev_priv->hw_status_page;
1206 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1207 dev_priv->sarea_priv;
1208 drm_i810_mc_t mc;
1209
1210 if (copy_from_user(&mc, (drm_i810_mc_t __user *) arg, sizeof(mc)))
1211 return -EFAULT;
1212
1213 LOCK_TEST_WITH_RETURN(dev, file_priv);
1214
1215 if (mc.idx >= dma->buf_count || mc.idx < 0)
1216 return -EINVAL;
1217
1218 i810_dma_dispatch_mc(dev, dma->buflist[mc.idx], mc.used,
1219 mc.last_render);
1220
1221 atomic_add(mc.used, &dev->counts[_DRM_STAT_SECONDARY]);
1222 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1223 sarea_priv->last_enqueue = dev_priv->counter - 1;
1224 sarea_priv->last_dispatch = (int)hw_status[5];
1225
1226 return 0;
1227 }
1228
1229 static int i810_rstatus(struct inode *inode, struct drm_file *file_priv,
1230 unsigned int cmd, unsigned long arg)
1231 {
1232 struct drm_device *dev = file_priv->head->dev;
1233 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1234
1235 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1236 }
1237
1238 static int i810_ov0_info(struct inode *inode, struct drm_file *file_priv,
1239 unsigned int cmd, unsigned long arg)
1240 {
1241 struct drm_device *dev = file_priv->head->dev;
1242 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1243 drm_i810_overlay_t data;
1244
1245 data.offset = dev_priv->overlay_offset;
1246 data.physical = dev_priv->overlay_physical;
1247 if (copy_to_user
1248 ((drm_i810_overlay_t __user *) arg, &data, sizeof(data)))
1249 return -EFAULT;
1250 return 0;
1251 }
1252
1253 static int i810_fstatus(struct inode *inode, struct drm_file *file_priv,
1254 unsigned int cmd, unsigned long arg)
1255 {
1256 struct drm_device *dev = file_priv->head->dev;
1257 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1258
1259 LOCK_TEST_WITH_RETURN(dev, file_priv);
1260
1261 return I810_READ(0x30008);
1262 }
1263
1264 static int i810_ov0_flip(struct inode *inode, struct drm_file *file_priv,
1265 unsigned int cmd, unsigned long arg)
1266 {
1267 struct drm_device *dev = file_priv->head->dev;
1268 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1269
1270 LOCK_TEST_WITH_RETURN(dev, file_priv);
1271
1272 //Tell the overlay to update
1273 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1274
1275 return 0;
1276 }
1277
1278 /* Not sure why this isn't set all the time:
1279 */
1280 static void i810_do_init_pageflip(struct drm_device * dev)
1281 {
1282 drm_i810_private_t *dev_priv = dev->dev_private;
1283
1284 DRM_DEBUG("%s\n", __FUNCTION__);
1285 dev_priv->page_flipping = 1;
1286 dev_priv->current_page = 0;
1287 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1288 }
1289
1290 static int i810_do_cleanup_pageflip(struct drm_device * dev)
1291 {
1292 drm_i810_private_t *dev_priv = dev->dev_private;
1293
1294 DRM_DEBUG("%s\n", __FUNCTION__);
1295 if (dev_priv->current_page != 0)
1296 i810_dma_dispatch_flip(dev);
1297
1298 dev_priv->page_flipping = 0;
1299 return 0;
1300 }
1301
1302 static int i810_flip_bufs(struct inode *inode, struct drm_file *file_priv,
1303 unsigned int cmd, unsigned long arg)
1304 {
1305 struct drm_device *dev = file_priv->head->dev;
1306 drm_i810_private_t *dev_priv = dev->dev_private;
1307
1308 DRM_DEBUG("%s\n", __FUNCTION__);
1309
1310 LOCK_TEST_WITH_RETURN(dev, file_priv);
1311
1312 if (!dev_priv->page_flipping)
1313 i810_do_init_pageflip(dev);
1314
1315 i810_dma_dispatch_flip(dev);
1316 return 0;
1317 }
1318
1319 int i810_driver_load(struct drm_device *dev, unsigned long flags)
1320 {
1321 /* i810 has 4 more counters */
1322 dev->counters += 4;
1323 dev->types[6] = _DRM_STAT_IRQ;
1324 dev->types[7] = _DRM_STAT_PRIMARY;
1325 dev->types[8] = _DRM_STAT_SECONDARY;
1326 dev->types[9] = _DRM_STAT_DMA;
1327
1328 return 0;
1329 }
1330
1331 void i810_driver_lastclose(struct drm_device * dev)
1332 {
1333 i810_dma_cleanup(dev);
1334 }
1335
1336 void i810_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1337 {
1338 if (dev->dev_private) {
1339 drm_i810_private_t *dev_priv = dev->dev_private;
1340 if (dev_priv->page_flipping) {
1341 i810_do_cleanup_pageflip(dev);
1342 }
1343 }
1344 }
1345
1346 void i810_driver_reclaim_buffers_locked(struct drm_device * dev,
1347 struct drm_file *file_priv)
1348 {
1349 i810_reclaim_buffers(dev, file_priv);
1350 }
1351
1352 int i810_driver_dma_quiescent(struct drm_device * dev)
1353 {
1354 i810_dma_quiescent(dev);
1355 return 0;
1356 }
1357
1358 drm_ioctl_desc_t i810_ioctls[] = {
1359 [DRM_IOCTL_NR(DRM_I810_INIT)] = {i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
1360 [DRM_IOCTL_NR(DRM_I810_VERTEX)] = {i810_dma_vertex, DRM_AUTH},
1361 [DRM_IOCTL_NR(DRM_I810_CLEAR)] = {i810_clear_bufs, DRM_AUTH},
1362 [DRM_IOCTL_NR(DRM_I810_FLUSH)] = {i810_flush_ioctl, DRM_AUTH},
1363 [DRM_IOCTL_NR(DRM_I810_GETAGE)] = {i810_getage, DRM_AUTH},
1364 [DRM_IOCTL_NR(DRM_I810_GETBUF)] = {i810_getbuf, DRM_AUTH},
1365 [DRM_IOCTL_NR(DRM_I810_SWAP)] = {i810_swap_bufs, DRM_AUTH},
1366 [DRM_IOCTL_NR(DRM_I810_COPY)] = {i810_copybuf, DRM_AUTH},
1367 [DRM_IOCTL_NR(DRM_I810_DOCOPY)] = {i810_docopy, DRM_AUTH},
1368 [DRM_IOCTL_NR(DRM_I810_OV0INFO)] = {i810_ov0_info, DRM_AUTH},
1369 [DRM_IOCTL_NR(DRM_I810_FSTATUS)] = {i810_fstatus, DRM_AUTH},
1370 [DRM_IOCTL_NR(DRM_I810_OV0FLIP)] = {i810_ov0_flip, DRM_AUTH},
1371 [DRM_IOCTL_NR(DRM_I810_MC)] = {i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY},
1372 [DRM_IOCTL_NR(DRM_I810_RSTATUS)] = {i810_rstatus, DRM_AUTH},
1373 [DRM_IOCTL_NR(DRM_I810_FLIP)] = {i810_flip_bufs, DRM_AUTH}
1374 };
1375
1376 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1377
1378 /**
1379 * Determine if the device really is AGP or not.
1380 *
1381 * All Intel graphics chipsets are treated as AGP, even if they are really
1382 * PCI-e.
1383 *
1384 * \param dev The device to be tested.
1385 *
1386 * \returns
1387 * A value of 1 is always retured to indictate every i810 is AGP.
1388 */
1389 int i810_driver_device_is_agp(struct drm_device * dev)
1390 {
1391 return 1;
1392 }
Linux kernel - Deliverables
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