3 * Copyright 2004 BEAM Ltd.
4 * Copyright 2002 Tungsten Graphics, Inc.
5 * Copyright 2005 Thomas Hellstrom.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
29 * Terry Barnaby <terry1@beam.ltd.uk>
30 * Keith Whitwell <keith@tungstengraphics.com>
31 * Thomas Hellstrom <unichrome@shipmail.org>
33 * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
34 * interrupt, as well as an infrastructure to handle other interrupts of the chip.
35 * The refresh rate is also calculated for video playback sync purposes.
43 #define VIA_REG_INTERRUPT 0x200
45 /* VIA_REG_INTERRUPT */
46 #define VIA_IRQ_GLOBAL (1 << 31)
47 #define VIA_IRQ_VBLANK_ENABLE (1 << 19)
48 #define VIA_IRQ_VBLANK_PENDING (1 << 3)
49 #define VIA_IRQ_HQV0_ENABLE (1 << 11)
50 #define VIA_IRQ_HQV1_ENABLE (1 << 25)
51 #define VIA_IRQ_HQV0_PENDING (1 << 9)
52 #define VIA_IRQ_HQV1_PENDING (1 << 10)
55 * Device-specific IRQs go here. This type might need to be extended with
56 * the register if there are multiple IRQ control registers.
57 * Currently we activate the HQV interrupts of Unichrome Pro group A.
60 static maskarray_t via_pro_group_a_irqs
[] = {
61 {VIA_IRQ_HQV0_ENABLE
, VIA_IRQ_HQV0_PENDING
, 0x000003D0, 0x00008010,
63 {VIA_IRQ_HQV1_ENABLE
, VIA_IRQ_HQV1_PENDING
, 0x000013D0, 0x00008010,
66 static int via_num_pro_group_a
=
67 sizeof(via_pro_group_a_irqs
) / sizeof(maskarray_t
);
69 static maskarray_t via_unichrome_irqs
[] = { };
70 static int via_num_unichrome
= sizeof(via_unichrome_irqs
) / sizeof(maskarray_t
);
72 static unsigned time_diff(struct timeval
*now
, struct timeval
*then
)
74 return (now
->tv_usec
>= then
->tv_usec
) ?
75 now
->tv_usec
- then
->tv_usec
:
76 1000000 - (then
->tv_usec
- now
->tv_usec
);
79 irqreturn_t
via_driver_irq_handler(DRM_IRQ_ARGS
)
81 drm_device_t
*dev
= (drm_device_t
*) arg
;
82 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
85 struct timeval cur_vblank
;
86 drm_via_irq_t
*cur_irq
= dev_priv
->via_irqs
;
89 status
= VIA_READ(VIA_REG_INTERRUPT
);
90 if (status
& VIA_IRQ_VBLANK_PENDING
) {
91 atomic_inc(&dev
->vbl_received
);
92 if (!(atomic_read(&dev
->vbl_received
) & 0x0F)) {
93 do_gettimeofday(&cur_vblank
);
94 if (dev_priv
->last_vblank_valid
) {
95 dev_priv
->usec_per_vblank
=
96 time_diff(&cur_vblank
,
97 &dev_priv
->last_vblank
) >> 4;
99 dev_priv
->last_vblank
= cur_vblank
;
100 dev_priv
->last_vblank_valid
= 1;
102 if (!(atomic_read(&dev
->vbl_received
) & 0xFF)) {
103 DRM_DEBUG("US per vblank is: %u\n",
104 dev_priv
->usec_per_vblank
);
106 DRM_WAKEUP(&dev
->vbl_queue
);
107 drm_vbl_send_signals(dev
);
111 for (i
= 0; i
< dev_priv
->num_irqs
; ++i
) {
112 if (status
& cur_irq
->pending_mask
) {
113 atomic_inc(&cur_irq
->irq_received
);
114 DRM_WAKEUP(&cur_irq
->irq_queue
);
120 /* Acknowlege interrupts */
121 VIA_WRITE(VIA_REG_INTERRUPT
, status
);
129 static __inline__
void viadrv_acknowledge_irqs(drm_via_private_t
* dev_priv
)
134 /* Acknowlege interrupts */
135 status
= VIA_READ(VIA_REG_INTERRUPT
);
136 VIA_WRITE(VIA_REG_INTERRUPT
, status
|
137 dev_priv
->irq_pending_mask
);
141 int via_driver_vblank_wait(drm_device_t
* dev
, unsigned int *sequence
)
143 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
144 unsigned int cur_vblank
;
147 DRM_DEBUG("viadrv_vblank_wait\n");
149 DRM_ERROR("%s called with no initialization\n", __FUNCTION__
);
153 viadrv_acknowledge_irqs(dev_priv
);
155 /* Assume that the user has missed the current sequence number
156 * by about a day rather than she wants to wait for years
157 * using vertical blanks...
160 DRM_WAIT_ON(ret
, dev
->vbl_queue
, 3 * DRM_HZ
,
161 (((cur_vblank
= atomic_read(&dev
->vbl_received
)) -
162 *sequence
) <= (1 << 23)));
164 *sequence
= cur_vblank
;
169 via_driver_irq_wait(drm_device_t
* dev
, unsigned int irq
, int force_sequence
,
170 unsigned int *sequence
)
172 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
173 unsigned int cur_irq_sequence
;
174 drm_via_irq_t
*cur_irq
= dev_priv
->via_irqs
;
176 maskarray_t
*masks
= dev_priv
->irq_masks
;
178 DRM_DEBUG("%s\n", __FUNCTION__
);
181 DRM_ERROR("%s called with no initialization\n", __FUNCTION__
);
182 return DRM_ERR(EINVAL
);
185 if (irq
>= dev_priv
->num_irqs
) {
186 DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__
,
188 return DRM_ERR(EINVAL
);
193 if (masks
[irq
][2] && !force_sequence
) {
194 DRM_WAIT_ON(ret
, cur_irq
->irq_queue
, 3 * DRM_HZ
,
195 ((VIA_READ(masks
[irq
][2]) & masks
[irq
][3]) ==
197 cur_irq_sequence
= atomic_read(&cur_irq
->irq_received
);
199 DRM_WAIT_ON(ret
, cur_irq
->irq_queue
, 3 * DRM_HZ
,
200 (((cur_irq_sequence
=
201 atomic_read(&cur_irq
->irq_received
)) -
202 *sequence
) <= (1 << 23)));
204 *sequence
= cur_irq_sequence
;
212 void via_driver_irq_preinstall(drm_device_t
* dev
)
214 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
216 drm_via_irq_t
*cur_irq
= dev_priv
->via_irqs
;
219 DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv
);
222 dev_priv
->irq_enable_mask
= VIA_IRQ_VBLANK_ENABLE
;
223 dev_priv
->irq_pending_mask
= VIA_IRQ_VBLANK_PENDING
;
225 dev_priv
->irq_masks
= (dev_priv
->pro_group_a
) ?
226 via_pro_group_a_irqs
: via_unichrome_irqs
;
227 dev_priv
->num_irqs
= (dev_priv
->pro_group_a
) ?
228 via_num_pro_group_a
: via_num_unichrome
;
230 for (i
= 0; i
< dev_priv
->num_irqs
; ++i
) {
231 atomic_set(&cur_irq
->irq_received
, 0);
232 cur_irq
->enable_mask
= dev_priv
->irq_masks
[i
][0];
233 cur_irq
->pending_mask
= dev_priv
->irq_masks
[i
][1];
234 DRM_INIT_WAITQUEUE(&cur_irq
->irq_queue
);
235 dev_priv
->irq_enable_mask
|= cur_irq
->enable_mask
;
236 dev_priv
->irq_pending_mask
|= cur_irq
->pending_mask
;
239 DRM_DEBUG("Initializing IRQ %d\n", i
);
242 dev_priv
->last_vblank_valid
= 0;
244 // Clear VSync interrupt regs
245 status
= VIA_READ(VIA_REG_INTERRUPT
);
246 VIA_WRITE(VIA_REG_INTERRUPT
, status
&
247 ~(dev_priv
->irq_enable_mask
));
249 /* Clear bits if they're already high */
250 viadrv_acknowledge_irqs(dev_priv
);
254 void via_driver_irq_postinstall(drm_device_t
* dev
)
256 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
259 DRM_DEBUG("via_driver_irq_postinstall\n");
261 status
= VIA_READ(VIA_REG_INTERRUPT
);
262 VIA_WRITE(VIA_REG_INTERRUPT
, status
| VIA_IRQ_GLOBAL
263 | dev_priv
->irq_enable_mask
);
265 /* Some magic, oh for some data sheets ! */
267 VIA_WRITE8(0x83d4, 0x11);
268 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);
273 void via_driver_irq_uninstall(drm_device_t
* dev
)
275 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
278 DRM_DEBUG("driver_irq_uninstall)\n");
281 /* Some more magic, oh for some data sheets ! */
283 VIA_WRITE8(0x83d4, 0x11);
284 VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
286 status
= VIA_READ(VIA_REG_INTERRUPT
);
287 VIA_WRITE(VIA_REG_INTERRUPT
, status
&
288 ~(VIA_IRQ_VBLANK_ENABLE
| dev_priv
->irq_enable_mask
));
292 int via_wait_irq(DRM_IOCTL_ARGS
)
294 drm_file_t
*priv
= filp
->private_data
;
295 drm_device_t
*dev
= priv
->head
->dev
;
296 drm_via_irqwait_t __user
*argp
= (void __user
*)data
;
297 drm_via_irqwait_t irqwait
;
300 drm_via_private_t
*dev_priv
= (drm_via_private_t
*) dev
->dev_private
;
301 drm_via_irq_t
*cur_irq
= dev_priv
->via_irqs
;
305 return DRM_ERR(EINVAL
);
307 DRM_COPY_FROM_USER_IOCTL(irqwait
, argp
, sizeof(irqwait
));
308 if (irqwait
.request
.irq
>= dev_priv
->num_irqs
) {
309 DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__
,
310 irqwait
.request
.irq
);
311 return DRM_ERR(EINVAL
);
314 cur_irq
+= irqwait
.request
.irq
;
316 switch (irqwait
.request
.type
& ~VIA_IRQ_FLAGS_MASK
) {
317 case VIA_IRQ_RELATIVE
:
318 irqwait
.request
.sequence
+= atomic_read(&cur_irq
->irq_received
);
319 irqwait
.request
.type
&= ~_DRM_VBLANK_RELATIVE
;
320 case VIA_IRQ_ABSOLUTE
:
323 return DRM_ERR(EINVAL
);
326 if (irqwait
.request
.type
& VIA_IRQ_SIGNAL
) {
327 DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n",
329 return DRM_ERR(EINVAL
);
332 force_sequence
= (irqwait
.request
.type
& VIA_IRQ_FORCE_SEQUENCE
);
334 ret
= via_driver_irq_wait(dev
, irqwait
.request
.irq
, force_sequence
,
335 &irqwait
.request
.sequence
);
336 do_gettimeofday(&now
);
337 irqwait
.reply
.tval_sec
= now
.tv_sec
;
338 irqwait
.reply
.tval_usec
= now
.tv_usec
;
340 DRM_COPY_TO_USER_IOCTL(argp
, irqwait
, sizeof(irqwait
));